[clang] [X86][Clang] Allow constexpr evaluation of F16C CVTPS2PH intrinsics (PR #162295)

ericxu233 wrote: @RKSimon > Do you think you can handle the avx512 vcvtps2ph*_mask builtins as well? It > should main Do I do all vcvtps2ph instructions? Some instructions are from AVX512_FP16 which have native support for half-precision floats. In order to support these instructions, I nee

[clang] [X86][Clang] Allow constexpr evaluation of F16C CVTPS2PH intrinsics (PR #162295)

@@ -12442,6 +12442,81 @@ bool VectorExprEvaluator::VisitCallExpr(const CallExpr *E) { return Success(APValue(Elems.data(), NumElems), E); } + + case clang::X86::BI__builtin_ia32_vcvtps2ph: + case clang::X86::BI__builtin_ia32_vcvtps2ph256: { +APValue SrcVec; +i

[clang] [X86][Clang] Allow constexpr evaluation of F16C CVTPS2PH intrinsics (PR #162295)

@@ -67,3 +67,60 @@ __m128i test_mm256_cvtps_ph(__m256 a) { // CHECK: call <8 x i16> @llvm.x86.vcvtps2ph.256(<8 x float> %{{.*}}, i32 0) return _mm256_cvtps_ph(a, 0); } + +// A value exactly halfway between 1.0 and the next representable FP16 number. +// In binary, its signi

[clang] [X86][Clang] Allow constexpr evaluation of F16C CVTPS2PH intrinsics (PR #162295)

@@ -67,3 +67,60 @@ __m128i test_mm256_cvtps_ph(__m256 a) { // CHECK: call <8 x i16> @llvm.x86.vcvtps2ph.256(<8 x float> %{{.*}}, i32 0) return _mm256_cvtps_ph(a, 0); } + +// A value exactly halfway between 1.0 and the next representable FP16 number. +// In binary, its signi

[clang] [X86][Clang] Allow constexpr evaluation of F16C CVTPS2PH intrinsics (PR #162295)

@@ -67,3 +67,60 @@ __m128i test_mm256_cvtps_ph(__m256 a) { // CHECK: call <8 x i16> @llvm.x86.vcvtps2ph.256(<8 x float> %{{.*}}, i32 0) return _mm256_cvtps_ph(a, 0); } + +// A value exactly halfway between 1.0 and the next representable FP16 number. +// In binary, its signi

[clang] [X86][Clang] Allow constexpr evaluation of F16C CVTPS2PH intrinsics (PR #162295)

@@ -3002,6 +3002,91 @@ static bool interp__builtin_vec_set(InterpState &S, CodePtr OpPC, return true; } +static bool interp__builtin_ia32_vcvtps2ph(InterpState &S, CodePtr OpPC, + const CallExpr *Call) { + // Arguments are: vector

[clang] [X86][Clang] Allow constexpr evaluation of F16C CVTPS2PH intrinsics (PR #162295)

@@ -3002,6 +3002,91 @@ static bool interp__builtin_vec_set(InterpState &S, CodePtr OpPC, return true; } +static bool interp__builtin_ia32_vcvtps2ph(InterpState &S, CodePtr OpPC, + const CallExpr *Call) { + // Arguments are: vector

[clang] [X86][Clang] Allow constexpr evaluation of F16C CVTPS2PH intrinsics (PR #162295)

@@ -3002,6 +3002,91 @@ static bool interp__builtin_vec_set(InterpState &S, CodePtr OpPC, return true; } +static bool interp__builtin_ia32_vcvtps2ph(InterpState &S, CodePtr OpPC, + const CallExpr *Call) { + // Arguments are: vector

[clang] [X86][Clang] Allow constexpr evaluation of F16C CVTPS2PH intrinsics (PR #162295)

https://github.com/ericxu233 updated https://github.com/llvm/llvm-project/pull/162295 >From 77575319c2b2b382aa7af9121390aceb34f5d23f Mon Sep 17 00:00:00 2001 From: ericxu233 Date: Sun, 5 Oct 2025 01:41:40 -0400 Subject: [PATCH 1/3] [X86][Clang] Allow constexpr evaluation of F16C CVTPS2PH intri

[clang] [X86][Clang] Allow constexpr evaluation of F16C CVTPS2PH intrinsics (PR #162295)

@@ -3002,6 +3002,91 @@ static bool interp__builtin_vec_set(InterpState &S, CodePtr OpPC, return true; } +static bool interp__builtin_ia32_vcvtps2ph(InterpState &S, CodePtr OpPC, + const CallExpr *Call) { + // Arguments are: vector