https://github.com/davemgreen approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/146515
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Author: David Green
Date: 2025-07-04T15:27:33+01:00
New Revision: 9fcea2e4656acbf6025e73da641e619ff12ee3d0
URL:
https://github.com/llvm/llvm-project/commit/9fcea2e4656acbf6025e73da641e619ff12ee3d0
DIFF:
https://github.com/llvm/llvm-project/commit/9fcea2e4656acbf6025e73da641e619ff12ee3d0.diff
L
https://github.com/davemgreen approved this pull request.
Thanks for doing this. LGTM.
https://github.com/llvm/llvm-project/pull/146896
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Author: David Green
Date: 2025-07-03T21:27:48+01:00
New Revision: ec350657893db46c8a1fb20972df653ce56355e0
URL:
https://github.com/llvm/llvm-project/commit/ec350657893db46c8a1fb20972df653ce56355e0
DIFF:
https://github.com/llvm/llvm-project/commit/ec350657893db46c8a1fb20972df653ce56355e0.diff
L
@@ -176,25 +176,43 @@ StringRef sys::detail::getHostCPUNameForARM(StringRef
ProcCpuinfoContent) {
SmallVector Lines;
ProcCpuinfoContent.split(Lines, '\n');
- // Look for the CPU implementer line.
+ // Look for the CPU implementer and hardware lines, and store the CPU pa
@@ -176,25 +176,43 @@ StringRef sys::detail::getHostCPUNameForARM(StringRef
ProcCpuinfoContent) {
SmallVector Lines;
ProcCpuinfoContent.split(Lines, '\n');
- // Look for the CPU implementer line.
+ // Look for the CPU implementer and hardware lines, and store the CPU pa
https://github.com/davemgreen edited
https://github.com/llvm/llvm-project/pull/146515
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Author: David Green
Date: 2025-07-03T07:41:13+01:00
New Revision: 1f8f477bd03869a9b5b2e7ff0c24c74397aba486
URL:
https://github.com/llvm/llvm-project/commit/1f8f477bd03869a9b5b2e7ff0c24c74397aba486
DIFF:
https://github.com/llvm/llvm-project/commit/1f8f477bd03869a9b5b2e7ff0c24c74397aba486.diff
L
@@ -176,25 +176,43 @@ StringRef sys::detail::getHostCPUNameForARM(StringRef
ProcCpuinfoContent) {
SmallVector Lines;
ProcCpuinfoContent.split(Lines, '\n');
- // Look for the CPU implementer line.
+ // Look for the CPU implementer and hardware lines, and store the CPU pa
Author: David Green
Date: 2025-06-30T17:15:26+01:00
New Revision: 6bd9ff04afdfbef1cf753f2cdd8a4e85ef6685eb
URL:
https://github.com/llvm/llvm-project/commit/6bd9ff04afdfbef1cf753f2cdd8a4e85ef6685eb
DIFF:
https://github.com/llvm/llvm-project/commit/6bd9ff04afdfbef1cf753f2cdd8a4e85ef6685eb.diff
L
https://github.com/davemgreen commented:
Thanks
https://github.com/llvm/llvm-project/pull/146107
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davemgreen wrote:
The best kind of patch.
> When compiling with -march=armv9-a+nosve we found that Clang still defines
> the __ARM_FEATURE_SVE2 macro
Could we add a test for this, in case it comes up again in the future? Negative
features have not worked super well in the past and could do wi
https://github.com/davemgreen closed
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OK. LGTM then. Thanks for the quick fix.
https://github.com/llvm/llvm-project/pull/146260
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https://github.com/davemgreen commented:
The llvm test look OK if you wanted to push those separately.
https://github.com/llvm/llvm-project/pull/146260
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@@ -170,7 +170,7 @@ getAArch64MicroArchFeaturesFromMtune(const Driver &D,
StringRef Mtune,
// 'cyclone' and later have zero-cycle register moves and zeroing.
if (MtuneLowerCase == "cyclone" ||
StringRef(MtuneLowerCase).starts_with("apple")) {
-Features.push_back(
davemgreen wrote:
I haven't seen anything else like that I don't believe, and my understanding is
the new IR should be simpler than before. Let me know if you have anything that
can show the issue you are running into. Thanks
https://github.com/llvm/llvm-project/pull/135064
___
davemgreen wrote:
> The issue seems to be with pointers to functions, adding
>
> ```
>FDTy = getContext().getBaseElementType(FDTy);
> return (FDTy->isPointerOrReferenceType() &&
> getContext().getTypeSize(FDTy) == 64 &&
> -!FDTy->getPointeeTy
@@ -0,0 +1,723 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
UTC_ARGS: --version 5
+; RUN: llc -mtriple=aarch64 -verify-machineinstrs --mattr=+cpa
-aarch64-use-featcpa-codegen=true -O0 -global-isel=1 -global-isel-abort=1 %s -o
- 2>&1 | FileCh
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@@ -0,0 +1,723 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
UTC_ARGS: --version 5
+; RUN: llc -mtriple=aarch64 -verify-machineinstrs --mattr=+cpa
-aarch64-use-featcpa-codegen=true -O0 -global-isel=1 -global-isel-abort=1 %s -o
- 2>&1 | FileCh
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@@ -10716,6 +10716,21 @@ let Predicates = [HasCPA] in {
// Scalar multiply-add/subtract
def MADDPT : MulAccumCPA<0, "maddpt">;
def MSUBPT : MulAccumCPA<1, "msubpt">;
+
+ def : Pat<(ptradd GPR64sp:$Rn, GPR64sp:$Rm),
+(ADDPT_shift GPR64sp:$Rn, GPR64sp:$Rm, (i32
https://github.com/davemgreen commented:
Thanks for the updates, this is quite a bit simpler now. As far as I can tell
this looks OK to me.
https://github.com/llvm/llvm-project/pull/105669
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https:
davemgreen wrote:
> Personally I'd default to off, particularly after having clang default this
> to off for the last 10 years.
I didn't believe this changed the defaults (I may be mistaken, let me know if I
am!). It was already enabled on Android + Fuchsia, and I believe this patch
keeps tha
https://github.com/davemgreen edited
https://github.com/llvm/llvm-project/pull/143915
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https://github.com/davemgreen approved this pull request.
I think this LGTM. I left a comment for maybe having a "IsPossiblyACortexA53"
check that would could reuse in a few places, but that is probably best
extended as a separate issue.
https://github.com/llvm/llvm-project/pull/143915
___
@@ -91,7 +91,9 @@ void fuchsia::Linker::ConstructJob(Compilation &C, const
JobAction &JA,
CmdArgs.push_back("--execute-only");
std::string CPU = getCPUName(D, Args, Triple);
-if (CPU.empty() || CPU == "generic" || CPU == "cortex-a53")
+if (Args.hasFlag(options
Author: David Green
Date: 2025-06-12T20:51:58+01:00
New Revision: 030a471753421477c7ef345cc60091788252fabc
URL:
https://github.com/llvm/llvm-project/commit/030a471753421477c7ef345cc60091788252fabc
DIFF:
https://github.com/llvm/llvm-project/commit/030a471753421477c7ef345cc60091788252fabc.diff
L
davemgreen wrote:
Thanks for the report - I'll put together a fix to exclude address spaces for
the moment.
https://github.com/llvm/llvm-project/pull/135064
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davemgreen wrote:
Cheers
https://github.com/llvm/llvm-project/pull/142760
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davemgreen wrote:
Ping - thanks
https://github.com/llvm/llvm-project/pull/142760
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https://github.com/davemgreen approved this pull request.
https://github.com/llvm/llvm-project/pull/143570
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https://github.com/llvm/llvm-project/pull/142557
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davemgreen wrote:
Rebase and ping - it feels like this is a decent compromise for keeping the
code simple.
https://github.com/llvm/llvm-project/pull/135064
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https://github.com/davemgreen updated
https://github.com/llvm/llvm-project/pull/135064
>From 6667abfc2191ffca673767c92713f346599f2a35 Mon Sep 17 00:00:00 2001
From: David Green
Date: Thu, 5 Jun 2025 12:01:08 +0100
Subject: [PATCH] [AArch64] Change the coercion type of structs with pointer
memb
@@ -424,21 +424,74 @@ entry:
ret <2 x double> %0
}
-declare <4 x float> @llvm.ceil.v4f32(<4 x float>)
davemgreen wrote:
Yep - they are not necessary any more for intrinsics, since
https://discourse.llvm.org/t/recent-improvements-to-the-ir-parser/77366.
It
https://github.com/davemgreen created
https://github.com/llvm/llvm-project/pull/142760
This updates the element types used in the new __Int8x8_t types added in
#126945, mostly to allow C++ name mangling in ItaniumMangling
mangleAArch64VectorBase to work correctly. Char is replaced by SignedCha
https://github.com/davemgreen created
https://github.com/llvm/llvm-project/pull/142559
This marks ffloor as legal providing that armv8 and neon is present (or
fullfp16 for the fp16 instructions). The existing arm_neon_vrintm intrinsics
are auto-upgraded to llvm.floor.
If this is OK I will upd
https://github.com/davemgreen created
https://github.com/llvm/llvm-project/pull/142557
Now that #141786 handles scalar and neon types, this adds MVE definitions and
legalization for llvm.roundeven intrinsics. The existing llvm.arm.mve.vrintn
are auto-upgraded to llvm.roundeven like other vrint
https://github.com/davemgreen closed
https://github.com/llvm/llvm-project/pull/126945
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Author: David Green
Date: 2025-06-02T19:30:02+01:00
New Revision: 9f7f4acbf0fc42357e7c804447cb7c2468ca4f4e
URL:
https://github.com/llvm/llvm-project/commit/9f7f4acbf0fc42357e7c804447cb7c2468ca4f4e
DIFF:
https://github.com/llvm/llvm-project/commit/9f7f4acbf0fc42357e7c804447cb7c2468ca4f4e.diff
L
Author: David Green
Date: 2025-06-02T17:29:46+01:00
New Revision: be6fc0092e44c7fa3981639cbfe692c78a5eb418
URL:
https://github.com/llvm/llvm-project/commit/be6fc0092e44c7fa3981639cbfe692c78a5eb418
DIFF:
https://github.com/llvm/llvm-project/commit/be6fc0092e44c7fa3981639cbfe692c78a5eb418.diff
L
https://github.com/davemgreen closed
https://github.com/llvm/llvm-project/pull/141841
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https://github.com/davemgreen updated
https://github.com/llvm/llvm-project/pull/141841
>From 2ed4ce494dbabd94f5b60ae13ee1631fe40a0a4e Mon Sep 17 00:00:00 2001
From: David Green
Date: Wed, 28 May 2025 20:39:53 +0100
Subject: [PATCH 1/2] [ASTWriter] Do not write ObjCCategories if empty.
This is
https://github.com/davemgreen updated
https://github.com/llvm/llvm-project/pull/141841
>From 161981f3aca4ec68f7036f50947281a0ebf9f3f8 Mon Sep 17 00:00:00 2001
From: David Green
Date: Wed, 28 May 2025 20:39:53 +0100
Subject: [PATCH 1/2] [ASTWriter] Do not write ObjCCategories if empty.
This is
davemgreen wrote:
> This change makes sense to me. I have two questions:
>
> 1. Can we add a test that checks that the block is omitted? (maybe via
> `llvm-bcanalyzer -dump`)
> 2. Can we make the `explicit-build.cpp` test more robust? (possibly by
> writing out import signatures)
Thanks - For
davemgreen wrote:
Patch up in #141850
https://github.com/llvm/llvm-project/pull/126945
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https://github.com/davemgreen created
https://github.com/llvm/llvm-project/pull/141841
This is a fix for a completely unrelated patch, that started to cause failures
in the explicit-build.cpp test because the size of the b.pcm and b-not-a.pcm
files became the same. The alignment added by empty
davemgreen wrote:
> LGTM with one nitpick. I've run this through a fuzzer which tests ABI
> compatibility with GCC and didn't find any problems.
Thanks for the review and the extra testing!
https://github.com/llvm/llvm-project/pull/126945
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https://github.com/davemgreen updated
https://github.com/llvm/llvm-project/pull/126945
>From 5a17166859760dcbc258892be46f7f909c2b00a9 Mon Sep 17 00:00:00 2001
From: Tomas Matheson
Date: Wed, 12 Feb 2025 14:31:47 +
Subject: [PATCH 1/3] Add missing Neon Types
The AAPCS64 adds a number of vec
Author: David Green
Date: 2025-05-28T12:26:54+01:00
New Revision: 3a42cbd47d3e92b8794378d2a0e8ec7ae81950d7
URL:
https://github.com/llvm/llvm-project/commit/3a42cbd47d3e92b8794378d2a0e8ec7ae81950d7
DIFF:
https://github.com/llvm/llvm-project/commit/3a42cbd47d3e92b8794378d2a0e8ec7ae81950d7.diff
L
https://github.com/davemgreen updated
https://github.com/llvm/llvm-project/pull/126945
>From 410d78202cac8221048a83ea466b59cb6e78ea87 Mon Sep 17 00:00:00 2001
From: Tomas Matheson
Date: Wed, 12 Feb 2025 14:31:47 +
Subject: [PATCH 1/2] Add missing Neon Types
The AAPCS64 adds a number of vec
https://github.com/davemgreen edited
https://github.com/llvm/llvm-project/pull/126945
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davemgreen wrote:
I was discussing with @tmatheson-arm and he said I could take this over. I've
updated this branch (apparently that does work), trying to address the issues
and clean things up a bit. The new types are not longer a keyword, but that
seems to be OK providing we mark them as imp
davemgreen wrote:
These two are failing:
Clang.CodeGen/paren-list-agg-init.cpp
Clang.CodeGenCXX/microsoft-abi-throw.cpp
Can you try and fix them? (or remove them from this review and handle them
separately). The others look OK.
https://github.com/llvm/llvm-project/pull/140373
__
@@ -22,7 +22,7 @@ define signext i8 @test1(i32 %A) {
; CHECK-V7: @ %bb.0:
; CHECK-V7-NEXT:sbfx r0, r0, #8, #8
; CHECK-V7-NEXT:bx lr
-; CHECk-V7: sbfx r0, r0, #8, #8
+; CHECK-V7: sbfx r0, r0, #8, #8
davemgreen wrote:
Same here.
https://github.com
@@ -121,7 +121,7 @@ define i32 @test_orr_extract_from_mul_1(i32 %x, i32 %y) {
; CHECK-THUMB-NEXT:orrs r0, r1
; CHECK-THUMB-NEXT:bx lr
entry:
-; CHECk-THUMB: orrs r0, r1
+; CHECK-THUMB: orrs r0, r1
davemgreen wrote:
You can remove this line entirely, th
https://github.com/davemgreen updated
https://github.com/llvm/llvm-project/pull/135064
>From 9a56ee32712c213b0fa06257bda9c2f31ec44416 Mon Sep 17 00:00:00 2001
From: David Green
Date: Thu, 15 May 2025 20:36:44 +0100
Subject: [PATCH] [AArch64] Change the coercion type of structs with pointer
mem
Author: David Green
Date: 2025-05-15T11:51:58+01:00
New Revision: f8f11c541dec9bfc19f80918cf12da71d6ae7b99
URL:
https://github.com/llvm/llvm-project/commit/f8f11c541dec9bfc19f80918cf12da71d6ae7b99
DIFF:
https://github.com/llvm/llvm-project/commit/f8f11c541dec9bfc19f80918cf12da71d6ae7b99.diff
L
https://github.com/davemgreen edited
https://github.com/llvm/llvm-project/pull/135064
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davemgreen wrote:
It looks like this came from #122280 / #122716. Sorry about the break, it
should have updated the CPU dependencies correctly too.
LGTM
https://github.com/llvm/llvm-project/pull/139212
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https://github.com/llvm/llvm-project/pull/139055
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@@ -1262,7 +1262,7 @@ INSTANTIATE_TEST_SUITE_P(
AArch64CPUAliasTestParams::PrintToStringParamName);
// Note: number of CPUs includes aliases.
-static constexpr unsigned NumAArch64CPUArchs = 89;
+static constexpr unsigned NumAArch64CPUArchs = 90;
davemgreen
https://github.com/davemgreen commented:
Can you add a release-note that this new CPU has been added?
https://github.com/llvm/llvm-project/pull/139055
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https://github.com/llvm/llvm-project/pull/135064
Rate limit ยท GitHub
body {
background-color: #f6f8fa;
color: #24292e;
font-family: -apple-system,BlinkMacSystemFont,Segoe
UI,Helvetica,Arial,san
https://github.com/davemgreen updated
https://github.com/llvm/llvm-project/pull/135064
>From d9e27ec881ec493174f3aee7a4faec567640e5e8 Mon Sep 17 00:00:00 2001
From: David Green
Date: Wed, 9 Apr 2025 11:18:25 +0100
Subject: [PATCH 1/3] [AArch64] Add a test case for the coerced arguments. NFC
--
davemgreen wrote:
Rebase and ping - thanks.
https://github.com/llvm/llvm-project/pull/135064
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https://github.com/davemgreen closed
https://github.com/llvm/llvm-project/pull/137330
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https://github.com/davemgreen approved this pull request.
Thanks. LGTM
https://github.com/llvm/llvm-project/pull/137330
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@@ -862,7 +862,7 @@ def ProcessorFeatures {
FeatureSB, FeatureSSBS, FeaturePAuth,
FeatureFlagM, FeaturePredRes,
FeatureSVE, FeatureSVE2, FeatureComplxNum,
FeatureCRC, FeatureDotProd,
https://github.com/davemgreen commented:
Hi - I tried this with the latest
https://github.com/gcc-mirror/gcc/blob/master/libstdc%2B%2B-v3/config/cpu/aarch64/opt/ext/opt_random.h
and it seemed to need some fixes and then it might have failed to mangle the
types if they were used? I can provide
@@ -201,6 +201,42 @@ SVE_OPAQUE_TYPE(__SVCount_t, __SVCount_t, SveCount,
SveCountTy)
SVE_SCALAR_TYPE(__mfp8, __mfp8, MFloat8, MFloat8Ty, 8)
+// Unlike the SVE types above, the Neon vector types are parsed as keywords and
+// mapped to the equivalent __attribute__(neon_vector
@@ -201,6 +201,42 @@ SVE_OPAQUE_TYPE(__SVCount_t, __SVCount_t, SveCount,
SveCountTy)
SVE_SCALAR_TYPE(__mfp8, __mfp8, MFloat8, MFloat8Ty, 8)
+// Unlike the SVE types above, the Neon vector types are parsed as keywords and
+// mapped to the equivalent __attribute__(neon_vector
@@ -201,6 +201,42 @@ SVE_OPAQUE_TYPE(__SVCount_t, __SVCount_t, SveCount,
SveCountTy)
SVE_SCALAR_TYPE(__mfp8, __mfp8, MFloat8, MFloat8Ty, 8)
+// Unlike the SVE types above, the Neon vector types are parsed as keywords and
+// mapped to the equivalent __attribute__(neon_vector
@@ -1366,6 +1366,13 @@ static QualType
ConvertDeclSpecToType(TypeProcessingState &state) {
break;
#include "clang/Basic/OpenCLImageTypes.def"
+#define NEON_VECTOR_TYPE(Name, BaseType, ElBits, NumEls, VectorKind)
\
+ case DeclSpec::TST_##Name:
https://github.com/davemgreen edited
https://github.com/llvm/llvm-project/pull/126945
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davemgreen wrote:
@john-brawn-arm did the work for AArch64, I'm not sure if he would have an idea
how much work it would involve for the Arm backend.
https://github.com/llvm/llvm-project/pull/137101
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davemgreen wrote:
I believe the backend would still need work to make sure this is supported,
which has not been done yet. I was expecting it to fail more noisily, but it
appears the strict nodes are lowered to generic nodes. That doesn't mean that
strict-fp is supported by the Arm backend, as
https://github.com/davemgreen updated
https://github.com/llvm/llvm-project/pull/135064
>From 8655b5aff2162bfc13d3f263d6b7830e0186c097 Mon Sep 17 00:00:00 2001
From: David Green
Date: Wed, 9 Apr 2025 11:18:25 +0100
Subject: [PATCH 1/2] [AArch64] Add a test case for the coerced arguments. NFC
--
@@ -485,6 +485,39 @@ ABIArgInfo AArch64ABIInfo::classifyArgumentType(QualType
Ty, bool IsVariadicFn,
}
Size = llvm::alignTo(Size, Alignment);
+// If the Aggregate is made up of pointers, use an array of pointers for
the
+// coerced type. This prevents having
https://github.com/davemgreen updated
https://github.com/llvm/llvm-project/pull/135064
>From 8655b5aff2162bfc13d3f263d6b7830e0186c097 Mon Sep 17 00:00:00 2001
From: David Green
Date: Wed, 9 Apr 2025 11:18:25 +0100
Subject: [PATCH 1/2] [AArch64] Add a test case for the coerced arguments. NFC
--
https://github.com/davemgreen approved this pull request.
Thanks. LGTM
https://github.com/llvm/llvm-project/pull/130623
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@@ -419,6 +419,9 @@ Bug Fixes to Attribute Support
- No longer crashing on ``__attribute__((align_value(N)))`` during template
instantiation when the function parameter type is not a pointer or reference.
(#GH26612)
+- The ``+nosimd`` attribute is now fully supported for AA
https://github.com/davemgreen edited
https://github.com/llvm/llvm-project/pull/130623
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https://github.com/davemgreen updated
https://github.com/llvm/llvm-project/pull/135064
>From 33a204bcc884178971c4327528b1e3b75336914e Mon Sep 17 00:00:00 2001
From: David Green
Date: Wed, 9 Apr 2025 11:18:25 +0100
Subject: [PATCH 1/6] [AArch64] Add a test case for the coerced arguments. NFC
--
@@ -679,21 +679,17 @@ llvm::ARM::FPUKind arm::getARMTargetFeatures(const Driver
&D,
CPUArgFPUKind != llvm::ARM::FK_INVALID ? CPUArgFPUKind :
ArchArgFPUKind;
(void)llvm::ARM::getFPUFeatures(FPUKind, Features);
} else {
-bool Generic = true;
-if (!ForAS) {
https://github.com/davemgreen updated
https://github.com/llvm/llvm-project/pull/135064
>From 33a204bcc884178971c4327528b1e3b75336914e Mon Sep 17 00:00:00 2001
From: David Green
Date: Wed, 9 Apr 2025 11:18:25 +0100
Subject: [PATCH 1/5] [AArch64] Add a test case for the coerced arguments. NFC
--
@@ -38,6 +38,9 @@ Potentially Breaking Changes
- Fix missing diagnostics for uses of declarations when performing typename
access,
such as when performing member access on a '[[deprecated]]' type alias.
(#GH58547)
+- For ARM targets, when using cc1as, the features included
https://github.com/davemgreen approved this pull request.
The other thing this patch does is bring the preprocessor features for
-march=armv8.1-m in line with the assembly features. It was previously enabling
__ARM_VFPV2__ but not allowing vfpv2 instructions.
I'm still not sure about the Win/D
@@ -679,21 +679,17 @@ llvm::ARM::FPUKind arm::getARMTargetFeatures(const Driver
&D,
CPUArgFPUKind != llvm::ARM::FK_INVALID ? CPUArgFPUKind :
ArchArgFPUKind;
(void)llvm::ARM::getFPUFeatures(FPUKind, Features);
} else {
-bool Generic = true;
-if (!ForAS) {
@@ -485,6 +485,24 @@ ABIArgInfo AArch64ABIInfo::classifyArgumentType(QualType
Ty, bool IsVariadicFn,
}
Size = llvm::alignTo(Size, Alignment);
+// If the Aggregate is made up of pointers, use an array of pointers for
the
+// coerced type. This prevents having
https://github.com/davemgreen updated
https://github.com/llvm/llvm-project/pull/135064
>From 33a204bcc884178971c4327528b1e3b75336914e Mon Sep 17 00:00:00 2001
From: David Green
Date: Wed, 9 Apr 2025 11:18:25 +0100
Subject: [PATCH 1/4] [AArch64] Add a test case for the coerced arguments. NFC
--
https://github.com/davemgreen created
https://github.com/llvm/llvm-project/pull/135064
The aim here is to avoid a ptrtoint->inttoptr round-trip through the function
argument whilst keeping the calling convention the same. Given a struct which
is <= 128bits in size, which can only contain either
=?utf-8?q?Csan=C3=A1d_Hajd=C3=BA?=
Message-ID:
In-Reply-To:
https://github.com/davemgreen approved this pull request.
Thanks, LGTM
https://github.com/llvm/llvm-project/pull/134802
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