ardb added inline comments.
Comment at: clang/lib/Driver/ToolChains/Arch/ARM.cpp:155
+ llvm::ARM::ArchKind AK = llvm::ARM::parseArch(Triple.getArchName());
+ return Ver >= 7 || AK == llvm::ARM::ArchKind::ARMV6T2 ||
+ (Ver == 6 && Triple.isARM());
peter.
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ardb marked an inline comment as done.
Closed by commit rG24772720c545: [ARM] reject -mtp=cp15 if target subarch does
not support it (authored by ardb).
Repository:
rG LLVM Github Monorepo
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htt
This revision was automatically updated to reflect the committed changes.
ardb marked an inline comment as done.
Closed by commit rGa19da876ab93: [ARM] implement support for TLS register based
stack protector (authored by ardb).
Repository:
rG LLVM Github Monorepo
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h
ardb added a comment.
I would argue that the existing __builtin_addressof() should absorb this
behavior, rather than adding a special builtin related to CFI.
As is documented for __builtin_addressof(), its intended use is in cases where
the & operator may return something other than the address
ardb marked 2 inline comments as done.
ardb added inline comments.
Comment at: clang/lib/Driver/ToolChains/Clang.cpp:3190-3191
+ }
+ CmdArgs.push_back("-target-feature");
+ CmdArgs.push_back("+read-tp-hard");
+}
nickdesaulniers wrote:
> ardb wr
ardb updated this revision to Diff 384564.
ardb added a comment.
- disallow -mtp=soft when TLS based stack protector is enabled
Repository:
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https://reviews.llvm.org/D112768/new/
https://reviews.llvm.org/D112768
Files:
clang/include/clang
ardb added inline comments.
Comment at: clang/lib/Driver/ToolChains/Clang.cpp:3177-3179
+ if (!Args.hasArg(options::OPT_mstack_protector_guard_offset_EQ)) {
+D.Diag(diag::err_drv_ssp_missing_offset_argument)
+<< A->getOption().getName() << Value;
ardb marked 2 inline comments as done.
ardb added inline comments.
Comment at: clang/lib/Driver/ToolChains/Arch/ARM.cpp:160-161
+if (ThreadPointer == ReadTPMode::Cp15 &&
+getARMSubArchVersionNumber(Triple) < 7 &&
+llvm::ARM::parseArch(Triple.getArchName()) !=
ardb updated this revision to Diff 384175.
ardb edited the summary of this revision.
ardb added a comment.
Fix test issue and add more test cases
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Files:
clang/lib/Driver/ToolChains/Arch/ARM.cpp
ardb updated this revision to Diff 384154.
ardb added a comment.
- fix failure in newly added LLVM test
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ardb created this revision.
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Currently, we permit -mtp=cp15 even fo
ardb updated this revision to Diff 384116.
ardb added a comment.
- add diagnostics to the frontend and asserts to the backend to ensure that the
TLS stack protector is only used on target subarchs that implement the hardware
TLS register to begin with
- ensure that the offset parameter is not om
ardb added inline comments.
Comment at: llvm/lib/Target/ARM/ARMInstrInfo.cpp:102
+ if (M.getStackProtectorGuard() == "tls") {
+expandLoadStackGuardBase(MI, ARM::MRC, ARM::LDRi12);
+return;
nickdesaulniers wrote:
> ardb wrote:
> > nickdesaulniers wrote:
>
ardb updated this revision to Diff 383390.
ardb edited the summary of this revision.
ardb added a comment.
- split off LOAD_STACK_GUARD conversion
- deal with guard offsets >= 4096 bytes
- reject offsets < 0 or >= 1 MiB
- add backend test to check that the MRC/LDR sequence is emitted twice
Repos
ardb added a comment.
I have split off the LOAD_STACK_GUARD changes into
[ARM] implement LOAD_STACK_GUARD for remaining targets
Comment at: llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp:4900
+.addImm(15)
+.addImm(0)
+.addImm(13)
nickdesaul
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Implement support
ardb added a comment.
Thanks all. Could someone with commit access please merge this? Thanks.
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h
ardb updated this revision to Diff 382839.
ardb added a comment.
Add another test suggested by Nick.
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Files:
llvm/lib/Target/ARM/ARMInstrThumb.td
llvm/lib/Target/ARM/ARMInstrThumb2.td
llvm/t
ardb updated this revision to Diff 382826.
ardb added a comment.
Drop new Clang CodeGen test, and add the Thumb2 check to an existing backend
test instead.
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ardb added inline comments.
Comment at: clang/test/CodeGen/arm-tphard.c:10
+}
+
nickdesaulniers wrote:
> Let's make this a test under llvm/test/CodeGen/, using IR:
> ```
> ; RUN: llc --mtriple=armv7-linux-gnueabihf -o - %s | FileCheck %s
> ; RUN: llc --mtriple=th
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In ARM mode, passing -mtp=cp
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