[PATCH] D112420: [clang][ARM] PACBTI-M assembly support

labrinea accepted this revision. labrinea added a comment. This revision is now accepted and ready to land. Looks like you've addressed Oliver's comments. I don't have any new suggestions from my end. Just make sure you've removed the test xfail before merging. Comment at: cla

[PATCH] D110065: [AArch64] Add support for the 'R' architecture profile.

This revision was automatically updated to reflect the committed changes. Closed by commit rG8689f5e6e773: [AArch64] Add support for the 'R' architecture profile. (authored by labrinea). Changed prior to commit: https://reviews.llvm.org/D110065?vs=382584&id=382605#toc Repository: rG LLVM Git

[PATCH] D110065: [AArch64] Add support for the 'R' architecture profile.

labrinea updated this revision to Diff 382584. labrinea added a comment. Changed AppleA10 to HasV8_0aOps CHANGES SINCE LAST ACTION https://reviews.llvm.org/D110065/new/ https://reviews.llvm.org/D110065 Files: clang/lib/Basic/Targets/AArch64.cpp clang/lib/Basic/Targets/AArch64.h clang/l

[PATCH] D110065: [AArch64] Add support for the 'R' architecture profile.

labrinea updated this revision to Diff 382294. labrinea added a comment. Added v8.1a_ops on AppleA10. However, the target parser lists it as v8.0a, which seems odd. Out of the scope of this patch anyway. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D110065/new/ https://reviews.llvm.org

[PATCH] D110065: [AArch64] Add support for the 'R' architecture profile.

labrinea updated this revision to Diff 382288. labrinea marked an inline comment as done. labrinea added a comment. Added a comment explaining system register lookups by alternative name as suggested and rebased on top of https://reviews.llvm.org/D111551. @john.brawn you may want to re-review th

[PATCH] D110065: [AArch64] Add support for the 'R' architecture profile.

labrinea marked an inline comment as done. labrinea added inline comments. Comment at: llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp:1548 + +static const AArch64SysReg::SysReg *lookupSysReg(unsigned Val, bool Read, + c

[PATCH] D110065: [AArch64] Add support for the 'R' architecture profile.

labrinea updated this revision to Diff 380171. labrinea added a comment. Added an alternative name to indicate sytem register aliasing. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D110065/new/ https://reviews.llvm.org/D110065 Files: clang/lib/Basic/Targets/AArch64.cpp clang/lib/Ba

[PATCH] D110065: [AArch64] Add support for the 'R' architecture profile.

labrinea updated this revision to Diff 376942. labrinea edited the summary of this revision. labrinea added a comment. Change from last revision: The driver implicitly enables the 'A' profile features (as if -march=armv8-a was specified on the command line) when only the target triple is specifi

[PATCH] D110065: [AArch64] Add support for the 'R' architecture profile.

labrinea added subscribers: nickdesaulniers, t.p.northover, srhines. labrinea added a comment. I wanted to clarify the chosen strategy as the desciption was perhaps not very informative. The are some instructions and system registers that are present in v8-a but not in v8-r, and so I am inclined

[PATCH] D110065: [AArch64] Add support for the 'R' architecture profile.

labrinea updated this revision to Diff 374572. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D110065/new/ https://reviews.llvm.org/D110065 Files: clang/lib/Basic/Targets/AArch64.cpp clang/lib/Basic/Targets/AArch64.h clang/test/Driver/aarch64-cpus.c clang/test/Preprocessor/aarch64-

[PATCH] D110065: [AArch64] Add support for the 'R' architecture profile.

labrinea created this revision. labrinea added reviewers: ostannard, miyuki, cfe-commits, llvm-commits. Herald added subscribers: hiraditya, kristof.beyls. labrinea requested review of this revision. Herald added projects: clang, LLVM. The patch introduces subtarget features to predicate certain i

[PATCH] D109157: [ARM] Mitigate the cve-2021-35465 security vulnurability.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG1bd5ea968e92: [ARM] Mitigate the cve-2021-35465 security vulnurability. (authored by labrinea). Repository: rG LLVM Github Monorepo CHANGES SINCE

[PATCH] D109157: [ARM] Mitigate the cve-2021-35465 security vulnurability.

labrinea updated this revision to Diff 372677. labrinea added a comment. Changes in this revision: - added `-verify-machineinstrs` to the tests - that yield two bugs that I had to address: *** Bad machine code: Explicit operand marked as def *** - function:func - basic block: %bb.0 ent

[PATCH] D109157: [ARM] Mitigate the cve-2021-35465 security vulnurability.

labrinea updated this revision to Diff 372674. labrinea added a comment. Changes in this revision: - Replaced the backend option that enables the mitigation with a subtarget feature so that it works with LTO (@lenary thanks for the offline hint) - Enabled the subtarget feature on the affected CP

[PATCH] D109157: [ARM] Mitigate the cve-2021-35465 security vulnurability.

labrinea added a comment. @ostannard, can you explain what you meant with supporting LTO? I didn't quite undestand. Are you happy with the rest of the changes? CHANGES SINCE LAST ACTION https://reviews.llvm.org/D109157/new/ https://reviews.llvm.org/D109157 __

[PATCH] D109157: [ARM] Mitigate the cve-2021-35465 security vulnurability.

labrinea updated this revision to Diff 371083. labrinea added a comment. Changes in this revision: - renamed fix_cve_2021_35465 to Fix_CVE_2021_35465 - added more Driver tests to cover the use of -mfix-cmse-cve-2021-35465 with -mno-fix-cmse-cve-2021-35465 - fixed code indentation CHANGES SINCE

[PATCH] D109157: [ARM] Mitigate the cve-2021-35465 security vulnurability.

labrinea marked 4 inline comments as done and 6 inline comments as done. labrinea added inline comments. Comment at: clang/lib/Driver/ToolChains/Clang.cpp:1666 +CmdArgs.push_back("-mllvm"); +if (A->getOption().matches(options::OPT_mfix_cmse_cve_2021_35465)) + CmdArgs

[PATCH] D109157: [ARM] Mitigate the cve-2021-35465 security vulnurability.

labrinea updated this revision to Diff 371028. labrinea added a comment. Changes in this revision: - pass the -arm-fix-cmse-cve-2021-35465 option once - document -m(no)fix-cmse-cve-2021-35465 in ClangCommandLineReference.rst - add clang tests with the mitigation expicitely disabled on affected cp

[PATCH] D109157: [ARM] Mitigate the cve-2021-35465 security vulnurability.

labrinea added inline comments. Comment at: clang/lib/Driver/ToolChains/Clang.cpp:1665 + +CmdArgs.push_back("-mllvm"); +if (A->getOption().matches(options::OPT_mfix_cmse_cve_2021_35465)) ostannard wrote: > ostannard wrote: > > labrinea wrote: > > > ostann

[PATCH] D109157: [ARM] Mitigate the cve-2021-35465 security vulnurability.

labrinea added inline comments. Comment at: clang/lib/Driver/ToolChains/Clang.cpp:1665 + +CmdArgs.push_back("-mllvm"); +if (A->getOption().matches(options::OPT_mfix_cmse_cve_2021_35465)) ostannard wrote: > Are these optional also being passed through to t

[PATCH] D109157: [ARM] Mitigate the cve-2021-35465 security vulnurability.

labrinea created this revision. labrinea added reviewers: llvm-commits, momchil.velikov. Herald added subscribers: dang, hiraditya, kristof.beyls. labrinea requested review of this revision. Herald added projects: clang, LLVM. Herald added a subscriber: cfe-commits. Recently a vulnerability issue

[PATCH] D94098: [Clang][AArch64] Inline assembly support for the ACLE type 'data512_t'.

This revision was landed with ongoing or failed builds. This revision was automatically updated to reflect the committed changes. Closed by commit rG29b263a34f1a: [Clang][AArch64] Inline assembly support for the ACLE type 'data512_t' (authored by labrinea). Repository: rG LLVM Github Monorepo

[PATCH] D94098: [Clang][AArch64] Inline assembly support for the ACLE type 'data512_t'.

labrinea added a comment. ping CHANGES SINCE LAST ACTION https://reviews.llvm.org/D94098/new/ https://reviews.llvm.org/D94098 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[PATCH] D94098: [Clang][AArch64] Inline assembly support for the ACLE type 'data512_t'.

labrinea updated this revision to Diff 360208. labrinea added a comment. This revision uses `i512` to pass the asm operands by-value. I've explained in my last comment what would be the challenges had we chosen `[i64 x 8]`. CHANGES SINCE LAST ACTION https://reviews.llvm.org/D94098/new/ https

[PATCH] D94098: [Clang][AArch64] Inline assembly support for the ACLE type 'data512_t'.

labrinea added a comment. > struct foo { unsigned long long x[8]; }; > void store(int *in, void *addr) > { > > struct foo x = { in[0], in[1], in[4], in[16], in[25], in[36], in[49], > in[64] }; > __asm__ volatile ("st64b %0,[%1]" : : "r" (x), "r" (addr) : "memory" ); > > } For this particular

[PATCH] D94098: [Clang][AArch64] Inline assembly support for the ACLE type 'data512_t'.

labrinea added a comment. Ok, I've tried a few things. If we add a couple of new target hooks we can make clang pass both input and output asm operands by value as `type { [8 x i64] }` avoiding the integer conversion. One issue with that is that the inline asm verifier asserts if an inline asm

[PATCH] D94098: [Clang][AArch64] Inline assembly support for the ACLE type 'data512_t'.

labrinea added a comment. In D94098#2868751 , @efriedma wrote: > The part I'm confused about is that you're forcing it to use "*r". At the IR > level, LLVM handles something like `call void asm sideeffect "#$0", "r"([8 x > i64] %c)` fine. You'll have t

[PATCH] D94098: [Clang][AArch64] Inline assembly support for the ACLE type 'data512_t'.

labrinea added a comment. In D94098#2865372 , @efriedma wrote: > I'm confused what your goal here is, exactly. The point of allowing 512-bit > inline asm operands is presumably to allow writing efficient code involving > inline asm... but you're intenti

[PATCH] D94098: [Clang][AArch64] Inline assembly support for the ACLE type 'data512_t'.

labrinea updated this revision to Diff 355908. labrinea retitled this revision from "[Clang] Inline assembly support for the ACLE type 'data512_t'." to "[Clang][AArch64] Inline assembly support for the ACLE type 'data512_t'.". labrinea edited the summary of this revision. labrinea added a reviewe

[PATCH] D95655: [AArch64] Adding Neon Sm3 & Sm4 Intrinsics

labrinea accepted this revision. labrinea added a comment. This revision is now accepted and ready to land. LGTM, thanks @rsanthir.quic ! CHANGES SINCE LAST ACTION https://reviews.llvm.org/D95655/new/ https://reviews.llvm.org/D95655 ___ cfe-commits

[PATCH] D95655: Adding Neon Sm3 & Sm4 Intrinsics

labrinea added inline comments. Comment at: llvm/test/CodeGen/AArch64/neon-sm4-sm3.ll:24 + +define <4 x i32> @test_vsm3ss1(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c, <4 x i32> %d) { +; CHECK-LABEL: test_vsm3ss1: The forth argument (<4 x i32> %d) is redundant. =

[PATCH] D94098: [Clang] Inline assembly support for the ACLE type 'data512_t'.

labrinea created this revision. labrinea added reviewers: cfe-commits, t.p.northover, ab, kristof.beyls, simon_tatham. labrinea requested review of this revision. Herald added a project: clang. This patch emits the new LLVM IR type introduced in https://reviews.llvm.org/D94091 when generating IR

[PATCH] D76077: [ARM] Add __bf16 as new Bfloat16 C Type

labrinea added inline comments. Comment at: clang/lib/CodeGen/CGBuiltin.cpp:6989 + false, + getTarget().hasBFloat16Type()); llvm::Type *Ty = VTy; shouldn't this be `getTargetHooks().getA

[PATCH] D79710: [clang][BFloat] add create/set/get/dup intrinsics

labrinea added inline comments. Comment at: clang/include/clang/Basic/arm_neon.td:1854 + def VDUP_LANE_BF : WOpInst<"vdup_lane", ".qI", "bQb", OP_DUP_LN>; + def VDUP_LANEQ_BF: WOpInst<"vdup_laneq", ".QI", "bQb", OP_DUP_LN> { +let isLaneQ = 1; My local build

[PATCH] D80928: [BFloat] Add convert/copy instrinsic support

labrinea created this revision. labrinea added reviewers: fpetrogalli, LukeGeeson, stuij, momchil.velikov, SjoerdMeijer, miyuki. Herald added subscribers: hiraditya, kristof.beyls. Herald added projects: clang, LLVM. This patch is part of a series implementing the Bfloat16 extension of the Armv8

[PATCH] D76077: [ARM] Add __bf16 as new Bfloat16 C Type

labrinea added inline comments. Comment at: clang/lib/CodeGen/CGBuiltin.cpp:4493 + case NeonTypeFlags::BFloat16: +if (HasBFloat16Type) + return llvm::VectorType::get(CGF->BFloatTy, V1Ty ? 1 : (4 << IsQuad)); This is not what we should be checking for he

cfe-commits@lists.llvm.org

labrinea added inline comments. Comment at: clang/test/CodeGen/aarch64-bf16-ldst-intrinsics.c:36 +// CHECK32: ret <4 x bfloat> %vld1_lane + +bfloat16x8_t test_vld1q_lane_bf16(bfloat16_t const *ptr, bfloat16x8_t src) { CHECK-NEXT or CHECK-DAG are preferable for se

[PATCH] D79711: [ARM] Add poly64_t on AArch32.

labrinea added a comment. > Should poly128_t be available on AArch32 too? I don't see anything in the > ACLE version you linked restricting it to AArch64 only, and the intrinsics > reference has a number of intrinsics available for both ISAs using it. It should but it is not that simple. The re

[PATCH] D79710: [clang][BFloat] add create/set/get/dup intrinsics

labrinea added inline comments. Comment at: clang/include/clang/Basic/arm_neon.td:1845 + +// V8.2-A BFloat intrinsics +let ArchGuard = "defined(__ARM_FEATURE_BF16_VECTOR_ARITHMETIC)" in { v8.6-A ? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D64048: [TargetParser][ARM] Account dependencies when processing target features

labrinea updated this revision to Diff 208010. labrinea added a comment. Added the dependency of mve on dsp and some missing tests to cover those cases. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D64048/new/ https://reviews.llvm.org/D64048 Files

[PATCH] D63936: [clang][Driver][ARM] Favor -mfpu over default CPU features

labrinea added inline comments. Comment at: llvm/lib/Support/ARMTargetParser.cpp:412 - if (Extensions & AEK_CRC) -Features.push_back("+crc"); - else -Features.push_back("-crc"); - - if (Extensions & AEK_DSP) -Features.push_back("+dsp"); - else -Features.push

[PATCH] D63936: [clang][Driver][ARM] Favor -mfpu over default CPU features

labrinea added inline comments. Comment at: llvm/lib/Support/ARMTargetParser.cpp:412 - if (Extensions & AEK_CRC) -Features.push_back("+crc"); - else -Features.push_back("-crc"); - - if (Extensions & AEK_DSP) -Features.push_back("+dsp"); - else -Features.push

[PATCH] D64048: [TargetParser][ARM] Account dependencies when processing target features

labrinea created this revision. labrinea added reviewers: llvm-commits, ostannard. Herald added subscribers: cfe-commits, dmgreen, hiraditya, kristof.beyls, javed.absar. Herald added projects: clang, LLVM. Teaches `ARM::appendArchExtFeatures` to account dependencies when processing target featur

[PATCH] D63936: [clang][Driver][ARM] Favor -mfpu over default CPU features

labrinea updated this revision to Diff 207436. labrinea added a comment. I've split the patch. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D63936/new/ https://reviews.llvm.org/D63936 Files: clang/lib/Driver/ToolChains/Arch/ARM.cpp clang/test/

[PATCH] D64044: [clang][Driver][ARM] NFC: Remove unused function parameter

labrinea created this revision. labrinea added reviewers: ostannard, simon_tatham, cfe-commits. Herald added subscribers: kristof.beyls, javed.absar. Herald added a project: clang. Removes a vector reference that was added by D62998 , since the preexisting functio

[PATCH] D63936: [ARM] Minor fixes in command line option parsing

labrinea added a comment. @simon_tatham, thanks for clarifying. I think my change is doing the right thing then: favors the `-mfpu` option over the default CPU features. I will split the patch as @ostannard suggested. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://r

[PATCH] D63936: [ARM] Minor fixes in command line option parsing

labrinea added a comment. In D63936#1563872 , @ostannard wrote: > > The second change this patch makes > > Could this be spilt into two patches? Looking at D62998 more carefully I realized that we deliberately favor cpu

[PATCH] D63936: [ARM] Minor fixes in command line option parsing

labrinea created this revision. labrinea added reviewers: simon_tatham, SjoerdMeijer, ostannard. Herald added subscribers: dmgreen, hiraditya, kristof.beyls, javed.absar. Herald added projects: clang, LLVM. When processing the command line options `march`, `mcpu` and `mfpu`, we store the implied

[PATCH] D26968: [ARM] Add Driver support for emitting the missing Tag_ABI_enum_size build attribute values

labrinea abandoned this revision. labrinea added a comment. Hi Renato, apologies for the long silence. Unfortunately this work is more complicated than I initially thought. We'll have to rethink about it thoroughly. I am going to abandon the patch for now. Thank you for reviewing this. https: