Thank you Paul - perfect hit!
> However, this cannot work. See the GNU make Manual, section "Chains of
> Implicit Rules" in the chapter "Implicit Rules":
> No single implicit rule can appear more than once in a chain. This
> means that `make' will not even consider such a ridiculous thing
%% Yaroslav Halchenko <[EMAIL PROTECTED]> writes:
>> However, this cannot work. See the GNU make Manual, section "Chains of
>> Implicit Rules" in the chapter "Implicit Rules":
>> No single implicit rule can appear more than once in a chain. This
>> means that `make' will not even conside
%% Yaroslav Halchenko <[EMAIL PROTECTED]> writes:
yh> > cat Makefile
yh> SO=1
yh> T=2
yh> VER=$(SO).$(T)
yh> lib%.so:lib%.so.$(SO)
yh> ln -snf $$(basename $<) $@
yh> lib%.so.$(SO):lib%.so.$(VER)
yh> ln -snf $$(basename $<) $@
yh> a/b/c/lib%.so.1.2: a/b/c/libz%
%% "Martin Dorey" <[EMAIL PROTECTED]> writes:
md> YMMV but I got into the habit of always using static pattern rules
md> some years ago.
That's too bad: pattern rules are very powerful and they reduce the
effort involved with parsing makefiles, and yield a smaller memory
footprint at runtime.
> make could not figure out full graph of implicit rules
>From the info pages:
4.12.2 Static Pattern Rules versus Implicit Rules
...
An implicit rule _can_ apply to any target that matches its
pattern,
but it _does_ apply ... only when the prerequisites can be found.
...
By con
