Damien Zammit, le sam. 12 juil. 2025 12:34:44 +, a ecrit:
> This code may be needed in the future, so add it in now
> but keep it disabled. The special EOI handling for
> interrupts may only need to be done for one kind of trigger mode.
Applied, thanks!
> ---
> i386/i386at/ioapic.c | 19 +++
Applied, thanks!
Damien Zammit, le sam. 12 juil. 2025 12:34:23 +, a ecrit:
> ---
> i386/i386at/ioapic.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/i386/i386at/ioapic.c b/i386/i386at/ioapic.c
> index 85359664..465a9f3b 100644
> --- a/i386/i386at/ioapic.c
> +++ b/i386/i386at/ioap
This code may be needed in the future, so add it in now
but keep it disabled. The special EOI handling for
interrupts may only need to be done for one kind of trigger mode.
---
i386/i386at/ioapic.c | 19 ---
1 file changed, 16 insertions(+), 3 deletions(-)
diff --git a/i386/i386a
---
i386/i386at/ioapic.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/i386/i386at/ioapic.c b/i386/i386at/ioapic.c
index 85359664..465a9f3b 100644
--- a/i386/i386at/ioapic.c
+++ b/i386/i386at/ioapic.c
@@ -304,6 +304,7 @@ lapic_tmr_bit(uint8_t vec)
void
ioapic_irq_eoi(int pin)
{
+/* FI
Damien Zammit, le sam. 12 juil. 2025 11:30:01 +, a ecrit:
> Also, do the lapic eoi before the ioapic eoi.
Why?
> Add code for conditioning on TMR bit, but keep it disabled for now.
>
> TESTED: on SMP and UP+apic: receives a large file over rumpnet.
>
> ---
> i386/i386/irq.c | 23 +
Damien Zammit, le sam. 12 juil. 2025 11:05:59 +, a ecrit:
> On 7/12/25 8:21 PM, Samuel Thibault wrote:
> > This is the locking for the management of ndisabled and calling
> > mask/unmask only.
>
> Yes, correct, however inside the ioapic_irq_eoi() function we are
> masking/unmasking again,
Bu
Now that we have locking per apic pin, we need to
prevent usual pin maskings from stepping on EOI special masking
procedures. Also, do the lapic eoi before the ioapic eoi.
Add code for conditioning on TMR bit, but keep it disabled for now.
TESTED: on SMP and UP+apic: receives a large file over rum
Hi Samuel,
On 7/12/25 8:21 PM, Samuel Thibault wrote:
> This is the locking for the management of ndisabled and calling
> mask/unmask only.
Yes, correct, however inside the ioapic_irq_eoi() function we are
masking/unmasking again,
so I think we need to protect the mask per irq as well wrapped ar
Hello,
Just a quick skim over it.
Damien Zammit, le lun. 07 juil. 2025 09:26:54 +, a ecrit:
> +int
> +main (int argc, char **argv)
> +{
> +
> + /* Make sure we will not swap out,
> + * because dma buffers for net drivers don't work otherwise */
> + err = wire_task_self ();
> + if (err)
Damien Zammit, le sam. 12 juil. 2025 09:49:06 +, a ecrit:
> On 7/11/25 4:56 PM, Damien Zammit wrote:
> > This avoids race condition with multiple devices raising interrupts
> > simultaneously on the same IRQ and causing mask to fail.
>
> If we add locking per apic pin,
This is the locking for
Damien Zammit, le ven. 11 juil. 2025 06:56:30 +, a ecrit:
> This avoids race condition with multiple devices raising interrupts
> simultaneously on the same IRQ and causing mask to fail.
>
> TESTED: on SMP and UP+apic gnumach, boots to console and receives
> a large file over rumpnet on debian
Hi,
On 7/11/25 4:56 PM, Damien Zammit wrote:
> This avoids race condition with multiple devices raising interrupts
> simultaneously on the same IRQ and causing mask to fail.
If we add locking per apic pin, we need to lock in EOI as well.
I have been testing a patch locally here but it has introd
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