Re: cache coherency in DMA and MMIO

On 10-4-22 下午11:01, Samuel Thibault wrote: > Samuel Thibault, le Thu 22 Apr 2010 16:51:38 +0200, a écrit : >> Da Zheng, le Thu 22 Apr 2010 22:37:51 +0800, a écrit : >>> So does the driver need to consider about cache coherency problems on PC >>> when >>> interacting with the external device? >> >>

Re: cache coherency in DMA and MMIO

Samuel Thibault, le Thu 22 Apr 2010 16:51:38 +0200, a écrit : > Da Zheng, le Thu 22 Apr 2010 22:37:51 +0800, a écrit : > > So does the driver need to consider about cache coherency problems on PC > > when > > interacting with the external device? > > Yes (since you can not rely on the BIOS), you

Re: cache coherency in DMA and MMIO

Hello, Da Zheng, le Thu 22 Apr 2010 22:37:51 +0800, a écrit : > So does the driver need to consider about cache coherency problems on PC when > interacting with the external device? Yes (since you can not rely on the BIOS), you need to remap the mmio range with cache disabled: INTEL_PTE_NCACHE|IN

[bug #29642] gdb: breakpoints in triggered in other threads result in SIGTRAP

URL: Summary: gdb: breakpoints in triggered in other threads result in SIGTRAP Project: The GNU Hurd Submitted by: hammy Submitted on: Thu 22 Apr 2010 04:38:30 PM CEST Category: None

cache coherency in DMA and MMIO

Hello, I try to make e1000 work with my porting of DDE Linux26. After I tested the code, it seems the variables in the transmission queue, which are access by the device with DMA, are not changed by the device after a packet is transmitted. antrik suggested that it might be related to cache cohere