[Bug gas/28083] New: [x86-64] "wrssq %rax, %rax" causes an error, although it is a valid instruction

2021-07-13 Thread newdefectus at gmail dot com
NCONFIRMED Severity: minor Priority: P2 Component: gas Assignee: unassigned at sourceware dot org Reporter: newdefectus at gmail dot com Target Milestone: --- Ditto for "wrssd %eax, %eax". According to the Intel docs, the first operand (secon

[Bug gas/28087] New: [x86-64] vcvtpd2dq, vcvtpd2ps, and vcvttpd2dq don't have their VEX encoding

2021-07-14 Thread newdefectus at gmail dot com
IRMED Severity: normal Priority: P2 Component: gas Assignee: unassigned at sourceware dot org Reporter: newdefectus at gmail dot com Target Milestone: --- According to the Intel docs, "vcvtpd2dq (%rcx), %ymm2" should assemble to C5 FB E6 11, however G

[Bug gas/28088] New: [x86-64] "int1" instruction missing

2021-07-14 Thread newdefectus at gmail dot com
onent: gas Assignee: unassigned at sourceware dot org Reporter: newdefectus at gmail dot com Target Milestone: --- Intel docs define the "int1" instruction as the single-byte opcode F1, but GAS doesn't recognize it. -- You are receiving this mail because: Y