https://sourceware.org/bugzilla/show_bug.cgi?id=27916
Bug ID: 27916
Summary: RISC-V: Porting ARM/AARCH64 mapping symbols to riscv.
Product: binutils
Version: unspecified
Status: NEW
Severity: enhancement
Priority: P2
https://sourceware.org/bugzilla/show_bug.cgi?id=27916
Nelson Chu changed:
What|Removed |Added
Assignee|unassigned at sourceware dot org |nelsonc1225 at
sourceware dot org
https://sourceware.org/bugzilla/show_bug.cgi?id=27916
Nelson Chu changed:
What|Removed |Added
Target||riscv*-*-*
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You are receiving this ma
https://sourceware.org/bugzilla/show_bug.cgi?id=27906
--- Comment #1 from cvs-commit at gcc dot gnu.org ---
The master branch has been updated by H.J. Lu :
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=3f335b75d8219d213f225d98b8879c303fdd73a3
commit 3f335b75d8219d213f225d98b8879c30
https://sourceware.org/bugzilla/show_bug.cgi?id=27906
H.J. Lu changed:
What|Removed |Added
Resolution|--- |FIXED
Status|NEW
https://sourceware.org/bugzilla/show_bug.cgi?id=27833
--- Comment #5 from Dimitar Dimitrov ---
Yes, same problem occurs for all 3 newlib targets. As far as I'm aware, they
all support LTO.
Unfortunately I don't have setup to cross-compile for glibs, since it requires
either a virtual machine or
https://sourceware.org/bugzilla/show_bug.cgi?id=27905
--- Comment #6 from cvs-commit at gcc dot gnu.org ---
The master branch has been updated by H.J. Lu :
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=50c95a739c91ae70cf8481936611aa1f5397a384
commit 50c95a739c91ae70cf8481936611aa1f
https://sourceware.org/bugzilla/show_bug.cgi?id=27905
H.J. Lu changed:
What|Removed |Added
Resolution|--- |FIXED
Status|NEW
