https://sourceware.org/bugzilla/show_bug.cgi?id=25355
--- Comment #47 from cvs-commit at gcc dot gnu.org ---
The binutils-2_34-branch branch has been updated by Nick Clifton
:
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=804b7fd4fdc545a6ed18aee3d4186574861634ef
commit 804b7fd4fdc5
https://sourceware.org/bugzilla/show_bug.cgi?id=25550
--- Comment #7 from H.J. Lu ---
CRC32 is the part of SSE4.2. But it isn't a vector instruction.
We can add CpuCRC32 to enable CRC32 when SSE4.2 is disabled.
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https://sourceware.org/bugzilla/show_bug.cgi?id=25550
--- Comment #8 from H.J. Lu ---
We can say something like
In addition to the basic instruction set, the assembler can be told
to accept various extension mnemonics. 4 separate vector ISA
extension families can be enabled or di
