[Bug gas/32036] RISC-V zcmp: unrecognized opcode `cm.mva01s s0,s1'

https://sourceware.org/bugzilla/show_bug.cgi?id=32036 --- Comment #2 from Patrick O'Neill --- It looks like the patch is here with a LGTM: https://sourceware.org/pipermail/binutils/2024-February/132263.html Patch 1/2 wasn't approved for v6 and v7 dropped 2/2: https://sourceware.org/pipermail/bin

[Bug gas/32036] New: RISC-V zcmp: unrecognized opcode `cm.mva01s s0,s1'

y: P2 Component: gas Assignee: unassigned at sourceware dot org Reporter: patrick at rivosinc dot com Target Milestone: --- Binutils output: /tmp/cczUKUoq.s: Assembler messages: /tmp/cczUKUoq.s:33: Error: unrecognized opcode `cm.mva01s s0,s1' Compiler returned: 1 GC

[Bug gas/32036] RISC-V zcmp: unrecognized opcode `cm.mva01s s0,s1'

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[Bug gas/32037] RISC-V xventanacondops: Unrecognized opcode `vt.maskcn a0, a1, a0`

https://sourceware.org/bugzilla/show_bug.cgi?id=32037 Patrick O'Neill changed: What|Removed |Added Resolution|--- |INVALID Status|UNCONFIR

[Bug gas/32037] RISC-V xventanacondops: Unrecognized opcode `vt.maskcn a0, a1, a0`

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[Bug gas/32037] New: RISC-V xventanacondops: Unrecognized opcode `vt.maskcn a0, a1, a0`

Severity: normal Priority: P2 Component: gas Assignee: unassigned at sourceware dot org Reporter: patrick at rivosinc dot com Target Milestone: --- Binutils output: /scratch/tmp/red-0f5881.s: Assembler messages: /scratch/tmp/red-0f5881.s:25: Error: unrecognized

[Bug ld/32014] RISC-V: -flto causes .riscv.attributes section to ignore specified extensions

https://sourceware.org/bugzilla/show_bug.cgi?id=32014 Patrick O'Neill changed: What|Removed |Added Target||riscv*-*-* CC|

[Bug ld/32014] New: RISC-V: -flto causes .riscv.attributes section to ignore specified extensions

Severity: normal Priority: P2 Component: ld Assignee: unassigned at sourceware dot org Reporter: patrick at rivosinc dot com Target Milestone: --- Created attachment 15640 --> https://sourceware.org/bugzilla/attachment.cgi?id=15640&action=ed

[Bug ld/29077] RISCV: .align directive interferes with relaxations

https://sourceware.org/bugzilla/show_bug.cgi?id=29077 Patrick O'Neill changed: What|Removed |Added CC||nelson.chu at sifive dot com,

[Bug ld/29077] RISCV: .align directive disables secondary relaxations

https://sourceware.org/bugzilla/show_bug.cgi?id=29077 --- Comment #1 from Patrick O'Neill --- Upon investigating further, I think this just indicates an issue with .align and relaxations in general, not just secondary relaxations. For example, the call is not relaxed: .text foo:

[Bug ld/29077] RISCV: .align directive disables secondary relaxations

https://sourceware.org/bugzilla/show_bug.cgi?id=29077 Patrick O'Neill changed: What|Removed |Added CC||patrick at rivosinc do

[Bug ld/29077] New: RISCV: .align directive disables secondary relaxations

Component: ld Assignee: unassigned at sourceware dot org Reporter: patrick at rivosinc dot com Target Milestone: --- Adding a .align directive to an assembly file disables relaxations that are enabled by other relaxations: .text foo: jr ra

[Bug gas/28733] RISC-V: Bad errors on fence.i and CSR ISA checking

https://sourceware.org/bugzilla/show_bug.cgi?id=28733 Patrick O'Neill changed: What|Removed |Added CC||patrick at rivosinc do