--- Additional Comments From dwarak dot rajagopal at amd dot com
2006-08-21 19:47 ---
Created an attachment (id=1237)
--> (http://sourceware.org/bugzilla/attachment.cgi?id=1237&action=view)
ChangeLog
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http://sourceware.org/bugzilla/show_bug.cgi?id=3100
--- You are receiving
--- Additional Comments From dwarak dot rajagopal at amd dot com
2006-08-21 19:46 ---
Created an attachment (id=1236)
--> (http://sourceware.org/bugzilla/attachment.cgi?id=1236&action=view)
Fix maskmovdqu operands.
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http://sourceware.org/bugzilla/show_bug.cgi?id=3100
--- You
The mnemonic for maskmovdqu is "maskmovdqu %xmm1,%xmm2".
Though there is a implied memory destination for this instruction, the explicit
arguments for this instructions are always %xmm registers.
But opcodes/i386-dis.c allows both register and memory for the 2nd operand.
This bug might not be ex
