#x27;m not sure… latency might still kill you.
You can bridge the phi to the outside world (ie. give it an IP on your lan) and
do anything you can do with a diskless cluster node.
--
Dr Stuart Midgley
sdm...@sdm900.com
On 28/02/2013, at 11:45 PM, "Hearns, John" wrote:
> At least w
.com/Intel-Xeon-Coprocessor-Performance-Programming/dp/0124104142
The future? It won't be that long before you get a Phi as the main cpu in a
system. I suspect the biggest issue is getting enough fast memory (16 channel
GDDR5 is expensive… and its hard to get lots of that near the cpu)
Give your local SGI sales person a ring.
We are about to receive our second lot of Phi's (will take us to 260 in total).
--
Dr Stuart Midgley
sdm...@sdm900.com
On 26/02/2013, at 11:42 PM, Mark Hahn wrote:
>
> How the hell do you get Phi cards?
> We've been beating the
The Kepler K10 is faster at single precision floating point, which is our code.
The biggest issue we have at the moment is the amount of memory the systems
have.
--
Dr Stuart Midgley
sdm...@sdm900.com
On 23/02/2013, at 1:13 AM, Richard Walsh wrote:
>
> Hey Stuart,
&g
We have a code written on both the Phi and K10's and they give about the same
performance (both highly optimised finite difference codes).
--
Dr Stuart Midgley
sdm...@sdm900.com
On 15/02/2013, at 4:53 AM, Richard Walsh wrote:
>
> Hey Stuart,
>
> Thanks much for the
t of impetus to port your codes
quickly :)
--
Dr Stuart Midgley
sdm...@sdm900.com
On 13/02/2013, at 12:38 AM, Richard Walsh wrote:
>
> Hey Stuart,
>
> Thanks for your answer ...
>
> That sounds compelling. May I ask a few more questions?
>
> So should I assume that
27;t bother with any of the compiler directives etc… just treated them like
a 240core (hyper threaded) computer… and saw great scaling.
--
Dr Stuart Midgley
sdm...@sdm900.com
On 12/02/2013, at 11:12 PM, Richard Walsh wrote:
>
> Hey Stuart,
>
> I am interested in what sold
rocessors and should have the next 160 or so in a
few weeks.
--
Dr Stuart Midgley
sdm...@sdm900.com
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t the data off fast enough between us creating/using/deleting
it.
Of course, the fact that we basically run at 95% full all the time is
as good as scrubbing :)
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Dr Stuart Midgley
sdm...@gmail.com
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I thought I would share an unpleasant experience - surviving a double
disk failure with raid 5.
We have >1000 core cluster, 130TB lustre setup and obviously a lot of
spindles. Our lustre is a "cheap" scalable setup, 30 oss's with
software raid 5.
So what happens when you get a double disk
its not a law, it was an observation. Like with most observations, it
isn't meant to be definitive or extrapolated too far.
I hate the term "moores law" and the expectation that it holds and one
day might be broken.
--
Dr Stuart Midgley
sdm...@gmail.com
On 09/04/2009,
I did mention the point that the shared-memory machines aren't
selling. If you're missing them, you're in a rather elite and small
group ;-)
In 2019 when Intel releases their 1024core chip, still at 2.5GHz with
256GB dimm memory, a lot of people will be surprised that linux works
and has d
So, to get back to the original discussion, SGI disappearing from the
landscape means one less option to choose from.
You think SGI designed the hardware for their non-shared-memory
clusters? I don't thnk so.
-- greg
No, SGI use supermicro. But that isn't really the point. They did
de
hoice of either 'piggybacking' on the first on-board NIC,
or of using a separate mini-USB style cable and a separate port which
clips into the rear of the server.
We tend to use the 'piggyback' variety.
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Dr Stuart Midgley
[EMAIL PROTECTED]
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will be running hard over the next 4-6 weeks... And I
just thought the procurement costs were hard. Add to
that infrastructure to support and AC, security, etc.
You have spent a couple of fortunes.
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Dr Stuart Midgley
[EMAIL PROTECTED]
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x27;m wondering if it's
worthwhile to setup a commercial cluster. Intel are planning for new
processors - two CPUs each with quad cores. Two such machines will
have power like one 50 GHz CPU:-)
Any ideas and comments are welcome!
Angel
--
Dr Stuart Midg
s.
Thanks!
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more than not
overlapping.
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ffers from AMD. Would
be interesting. So far I haven't been impressed with code that I
thought I should be really impressed with on this machine. Oddly the
performance was about what we got out of the Core Duo on this
platform.
--
Dr Stuart Midgley
Industry Uptake Program Leader
iVEC,
post that information. Sometimes the perspective of public
humillation makes wonders :)
But, be warned! its just an idea, Im not expert in treating users (or
anything else, for the matter).
Hope it helps,
-- Diego.
--
Dr Stuart Midgley
[EMAIL PROT
ould be grateful.
Some specifics that I am interested in would be a good comparison
of different interconnects on overall performance, as this will
have a significant impact on the design of their cluster.
Thanks,
-bill
--
Dr Stuart Midgley
[EMAIL PROTECTED]
_
n, and it
works pretty nicely. Somewhat hard to visualize the output, so I
had it write stuff out in ".xyz" format, and used VMD to generate a
movie. You can see it (about 100 atoms, tiny interaction radius,
and a few thousand steps) here at http://
www.scalableinformatics.com/
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