Re: [PATCH 2/4] drm/amdgpu: Clarify that BO size is in bytes in comments

On 01.09.25 12:00, Timur Kristóf wrote: > To avoid confusion with dwords. > > Signed-off-by: Timur Kristóf > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c > b/drivers/gpu/

Re: [PATCH v5 1/2] drm/buddy: Optimize free block management with RB tree

On 9/2/2025 1:11 AM, Peter Zijlstra wrote: On Tue, Sep 02, 2025 at 12:26:04AM +0530, Arunpravin Paneer Selvam wrote: Replace the freelist (O(n)) used for free block management with a red-black tree, providing more efficient O(log n) search, insert, and delete operations. This improves scalabil

[PATCH 07/11] drm/amd/display: Refine error message for vblank init failure

From: Roman Li [Why] The error message "failed to initialize sw for display support" is used for both DRM device and vblank initialization failures, making it difficult to identify the specific failure during troubleshooting. [How] Update the vblank initialization error message to "failed to ini

[PATCH v6 5/8] drm/amdgpu: Implement TTM handling for MMIO_REMAP placement

Implement TTM-level behavior for AMDGPU_PL_MMIO_REMAP so it behaves as a CPU-visible IO page: * amdgpu_evict_flags(): mark as unmovable * amdgpu_res_cpu_visible(): consider CPU-visible * amdgpu_bo_move(): use null move when src/dst is MMIO_REMAP * amdgpu_ttm_io_mem_reserve(): program base/is_iomem

[PATCH v6 8/8] drm/amdgpu/gem: Return Handle to MMIO_REMAP Singleton in GEM_CREATE

Enable userspace to obtain a handle to the kernel-owned MMIO_REMAP singleton when AMDGPU_GEM_DOMAIN_MMIO_REMAP is requested via amdgpu_gem_create_ioctl(). Validate the fixed 4K constraint: if PAGE_SIZE > AMDGPU_GPU_PAGE_SIZE return -EINVAL; when provided, size and alignment must equal AMDGPU_GPU_P

[PATCH v6 6/8] drm/amdgpu/ttm: Initialize AMDGPU_PL_MMIO_REMAP Heap

Add a one-page TTM range manager for AMDGPU_PL_MMIO_REMAP via amdgpu_ttm_init_on_chip(). This only registers the placement with TTM; no BO is allocated in this patch. The singleton 4K remap BO is created and freed in the following patch. This split follows to separate heap bring-up from BO alloca

[PATCH v6 3/8] drm/amdgpu/ttm: Add New AMDGPU_PL_MMIO_REMAP Placement

Introduce a kernel-internal TTM placement type AMDGPU_PL_MMIO_REMAP for the HDP flush MMIO remap page Plumbing added: - amdgpu_res_cursor.{first,next}: treat MMIO_REMAP like DOORBELL - amdgpu_ttm_io_mem_reserve(): return BAR bus address + offset for MMIO_REMAP, mark as uncached I/O - amdgpu_ttm_

[PATCH 11/11] drm/amd/display: Promote DC to 3.2.349

From: Taimur Hassan This version brings along following updates: - Disable stutter when programming watermarks on dcn32 - Fix pbn_div Calculation Error - Correct sequences and delays for DCN35 PG & RCG - Define interfaces for hubbub perfmance monitoring support - Extend to read eDP general capab

[PATCH 10/11] drm/amd/display: Disable stutter when programming watermarks on dcn32

From: Dillon Varone [WHY&HOW] Reprogramming watermarks with stutter allowed can cause instability on some ASICs. Disable it prior to raising watermarks (prepare bandwidth), then re-enable after lowering (optimize bandwidth). Reviewed-by: Alvin Lee Signed-off-by: Dillon Varone Signed-off-by: Wa

[PATCH 09/11] drm/amd/display: Fix pbn_div Calculation Error

From: Fangzhi Zuo [Why] dm_mst_get_pbn_divider() returns value integer coming from the cast from fixed point, but the casted integer will then be used in dfixed_const to be multiplied by 4096. The cast from fixed point to integer causes the calculation error becomes bigger when multiplied by 4096

[PATCH 08/11] drm/amd/display: Correct sequences and delays for DCN35 PG & RCG

From: Ovidiu Bunea [why] The current PG & RCG programming in driver has some gaps and incorrect sequences. [how] Added delays after ungating clocks to allow ramp up, increased polling to allow more time for power up, and removed the incorrect sequences. Cc: Mario Limonciello Cc: Alex Deucher

[PATCH 04/11] drm/amd/display: Indicate when custom brightness curves are in use

From: Mario Limonciello [Why] There is a `scale` sysfs attribute that can be used to indicate when non-linear brightness scaling is in use. As Custom brightness curves work by linear interpolation of points the scale is no longer linear. [How] Indicate non-linear scaling when custom brightness

[PATCH 02/11] drm/amd/display: Add link index in AUX and dpms

From: Cruise Hung [Why & How] Add the link index in DP AUX transfer and DPMS functions. Reviewed-by: Wenjing Liu Signed-off-by: Cruise Hung Signed-off-by: Wayne Lin --- drivers/gpu/drm/amd/display/dc/dce/dce_aux.c| 17 + .../drm/amd/display/dc/link/link_detection.c|

[PATCH 03/11] drm/amd/display: dont wait for pipe update during medupdate/highirq

From: Ausef Yousof [why&how] control flag for the wait during pipe update wait for vupdate should be set if update type is not fast or med to prevent an invalid sleep operation Reviewed-by: Alvin Lee Signed-off-by: Ausef Yousof Signed-off-by: Wayne Lin --- drivers/gpu/drm/amd/display/dc/core

[PATCH 01/11] drm/amd/display: Add HDCP policy control

From: Oleh Kuzhylnyi [Why] DM should be able to control HDCP retry limit via configurable parameter. [How] Expose a retry_limit parameter for controlling the maximum number of retries and lift the hardcode out to DM. Reviewed-by: Nicholas Kazlauskas Reviewed-by: Aric Cyr Signed-off-by: Oleh K

[PATCH] drm/amd/display: remove output_tf_change flag

Remove this flag as the driver stopped managing it individually since commit a4056c2a6344 ("drm/amd/display: use HW hdr mult for brightness boost"). After some back and forth it was reintroduced as a condition to `set_output_transfer_func()` in [1]. Without direct management, this flag only changes

Re: [PATCH 0/2] drm/amd/display: don't overwrite regamma LUT with empty data

On 22/08/2025 18:14, Melissa Wen wrote: Hey, KDE/Plasma users reported some flickering when applying the regamma CRTC LUT to an AMD display hardware set using an external or integrated screen. There is some instability in how the driver stores and updates color blocks based on color manageme

[PATCH v2 2/2] drm/amd/display: change dc stream color settings only in atomic commit

Don't update DC stream color components during atomic check. The driver will continue validating the new CRTC color state but will not change DC stream color components. The DC stream color state will only be programmed at commit time in the `atomic_setup_commit` stage. It fixes gamma LUT loss rep

[PATCH v2 0/2] drm/amd/display: don't overwrite regamma LUT with empty data

Hi, Xaver first reported flickering when changing GAMMA_LUT often in KDE with an HDR-enabled display: https://gitlab.freedesktop.org/drm/amd/-/issues/ This issue is reproducible on Fedora 42 from [1], with integrated and/or external monitors. I was able to reproduce it on DCN3.01, but other

[PATCH v2 1/2] drm/amd/display: update color on atomic commit time

Use `atomic_commit_setup` to change the DC stream state. It's a preparation to remove from `atomic_check` changes in CRTC color components of DC stream state and prevent DC to commit TEST_ONLY changes. Link: https://gitlab.freedesktop.org/drm/amd/-/issues/ Signed-off-by: Melissa Wen --- .../

Re: [PATCH v2 0/2] Add "pixel_encoding" to switch between RGB & YUV color modes

On Wed Aug 27, 2025 at 1:08 PM CEST, Sebastian Wick wrote: > On Wed Aug 27, 2025 at 12:39 PM CEST, Daniel Stone wrote: >> Hey, >> >> On Wed, 27 Aug 2025 at 10:41, Maxime Ripard wrote: >>> On Wed, Aug 27, 2025 at 12:26:56AM +0800, Shengyu Qu wrote: >>> > 1.Can you send patch with only i915/amdgpu f

Re: [PATCH 1/2] drm/amdgpu: Introduce VF critical region check for RAS poison injection

[AMD Official Use Only - AMD Internal Distribution Only] + @Gande, Shravan kumar Hi Shravan, Could you please help review the code at your convenience? Regards, Liu, Xiang From: Liu, Xiang(Dean) Sent: Tuesday, August 19, 20

RE: [PATCH Review 1/1] drm/amdgpu: wait pmfw polling mca bank info done

[AMD Official Use Only - AMD Internal Distribution Only] > -Original Message- > From: Zhou1, Tao > Sent: Monday, September 1, 2025 10:23 AM > To: Yang, Stanley ; amd-gfx@lists.freedesktop.org > Cc: Yang, Stanley > Subject: RE: [PATCH Review 1/1] drm/amdgpu: wait pmfw polling mca bank > i

Re: [PATCH v5 3/9] drm/amdgpu/ttm: Add New AMDGPU_PL_MMIO_REMAP Placement

On 29.08.25 15:55, Srinivasan Shanmugam wrote: > Introduce a kernel-internal TTM placement type AMDGPU_PL_MMIO_REMAP > for the HDP flush MMIO remap page > > Plumbing added: > - amdgpu_res_cursor.{first,next}: treat MMIO_REMAP like DOORBELL > - amdgpu_ttm_io_mem_reserve(): return BAR bus address +

[PATCH 4/4] drm/amdgpu: Set SDMA v3 copy_max_bytes to 0x3fff00

SDMA v3-v5 can copy almost 4 MiB in a single copy operation. Use the same value as PAL and Mesa for copy_max_bytes. For reference, see oss2DmaCmdBuffer.cpp in PAL: "Due to HW limitation, the maximum count may not be 2^n-1, can only be 2^n - 1 - start_addr[4:2]" See also sid.h in Mesa: "There is a

Re: [PATCH 3/4] drm/amdgpu: Fill extra dwords with NOPs

Hi, On 01/09/2025 11:00, Timur Kristóf wrote: Technically not necessary, but clear the extra dwords too, so that the command processors don't read uninitialized memory. Fixes: c8c1a1d2ef04 ("drm/amdgpu: define and add extra dword for jpeg ring") Signed-off-by: Timur Kristóf --- drivers/gpu

Re: [PATCH v5 9/9] drm/amdgpu/gem: Return Handle to MMIO_REMAP Singleton in GEM_CREATE

On 29.08.25 15:55, Srinivasan Shanmugam wrote: > Enable userspace to obtain a handle to the kernel-owned MMIO_REMAP > singleton when AMDGPU_GEM_DOMAIN_MMIO_REMAP is requested via > amdgpu_gem_create_ioctl(). > > Validate the fixed 4K constraint: if PAGE_SIZE > AMDGPU_GPU_PAGE_SIZE > return -EINVAL

[PATCH 2/4] drm/amdgpu: Clarify that BO size is in bytes in comments

To avoid confusion with dwords. Signed-off-by: Timur Kristóf --- drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c index 122a88294883..9ffadc0

Re: evergreen_packet3_check:... radeon 0000:1d:00.0: vbo resource seems too big for the bo

On 30.08.25 19:48, Borislav Petkov wrote: > > diff --git a/drivers/gpu/drm/radeon/evergreen_cs.c > b/drivers/gpu/drm/radeon/evergreen_cs.c > index a46613283393..6285ff1b1bff 100644 > --- a/drivers/gpu/drm/radeon/evergreen_cs.c > +++ b/drivers/gpu/drm/radeon/evergreen_cs.c > @@ -2418,7 +2418,7 @@

Re: [PATCH v5 6/9] drm/amdgpu: Implement TTM handling for MMIO_REMAP placement

On 29.08.25 15:55, Srinivasan Shanmugam wrote: > Implement TTM-level behavior for AMDGPU_PL_MMIO_REMAP so it behaves as a > CPU-visible IO page: > > * amdgpu_evict_flags(): mark as unmovable > * amdgpu_res_cpu_visible(): consider CPU-visible > * amdgpu_bo_move(): use null move when src/dst is MMIO

Re: [PATCH v5 8/9] drm/amdgpu/ttm: Allocate/Free 4K MMIO_REMAP Singleton

On 29.08.25 15:55, Srinivasan Shanmugam wrote: > Add amdgpu_ttm_mmio_remap_bo_init()/fini() to manage the kernel-owned > one-page(4K) MMIO_REMAP BO. The allocator runs during TTM init when the > hardware exposes a remap base (adev->rmmio_base) and the host PAGE_SIZE > is <= AMDGPU_GPU_PAGE_SIZE (4K

Re: [PATCH v5 7/9] drm/amdgpu/ttm: Initialize AMDGPU_PL_MMIO_REMAP Heap

On 29.08.25 15:55, Srinivasan Shanmugam wrote: > Add a one-page TTM range manager for AMDGPU_PL_MMIO_REMAP via > amdgpu_ttm_init_on_chip(). This only registers the placement with TTM; > no BO is allocated in this patch. > > The singleton 4K remap BO is created and freed in the following patch.

RE: [PATCH v9 08/14] drm/amdgpu: add userq object va track helpers

[Public] Regards, Prike > -Original Message- > From: Alex Deucher > Sent: Thursday, August 28, 2025 6:13 AM > To: Liang, Prike ; Koenig, Christian > > Cc: amd-gfx@lists.freedesktop.org; Deucher, Alexander > > Subject: Re: [PATCH v9 08/14] drm/amdgpu: add userq object va track he

Re: [PATCH v1 1/2] drm/amdgpu: increment share sched score on entity selection

On 22/08/2025 14:43, Pierre-Eric Pelloux-Prayer wrote: For hw engines that can't load balance jobs, entities are "statically" load balanced: on their first submit, they select the best scheduler based on its score. The score is made up of 2 parts: * the job queue depth (how much jobs are execut

Re: [PATCH v5 5/9] drm/amdgpu: Add mmio_remap bookkeeping to amdgpu_device

On 29.08.25 15:55, Srinivasan Shanmugam wrote: > Add bookkeeping for the remap page to struct amdgpu_device: > > * bo: kernel-owned singleton BO > > v2: > - Use existing amdgpu_mmio_remap container; remove per-field members > (Alex). > - Use AMD_GPU_PAGE_SIZE (always 4K) per Christian/Alex. >

Re: evergreen_packet3_check:... radeon 0000:1d:00.0: vbo resource seems too big for the bo

On Sun, Aug 31, 2025 at 11:42:19PM +0200, Timur Kristóf wrote: > Which Mesa version do you use exactly? > Are you sure that version number is correct? > > Mesa 9.0.2 was released on January 22nd, 2013, more than 12 years ago. How's that? $ glxinfo | grep Mesa client glx vendor string: Mesa Proje