when trying to enable p2p the amdgpu_device_is_peer_accessible()
checks the condition where address_mask overlaps the aper_base
and hence returns 0, due to which the p2p disables for this platform
IOMMU should remap the BAR addresses so the device can access
them. Hence check if iommu_remap and re
[AMD Official Use Only - AMD Internal Distribution Only]
AFAIK, for low level libraries, e.g. LLVM, ROCr, Hip/OpenCL runtimes, all GPUs
are supported. But for the mathlibs and frameworks, only limited GPUs are
supported. E.g. :
https://github.com/ROCm/rocBLAS/blob/28877e5e134a157b7ea56b88a1a12b
> On Aug 13, 2024, at 6:52 PM, Felix Kuehling wrote:
>
> Hang on a second. If there are production GPUs that only work with
> HSA_OVERRIDE_GFX_VERSION right now, then we should make those GPUs properly
> supported. I thought this was only used internally for bring-up or maybe
> externally
Hang on a second. If there are production GPUs that only work with
HSA_OVERRIDE_GFX_VERSION right now, then we should make those GPUs properly
supported. I thought this was only used internally for bring-up or maybe
externally as a short-term solution before we upstream proper support for new
G
[AMD Official Use Only - AMD Internal Distribution Only]
Series is
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: amd-gfx On Behalf Of Victor
Skvortsov
Sent: Tuesday, August 6, 2024 20:43
To: Chander, Vignesh ; Lazar, Lijo
; Li, Yunxiang (Teddy) ; Koenig,
Christ
On Tue, Aug 13, 2024 at 9:39 AM Rahul Jain wrote:
>
> when trying to enable p2p the amdgpu_device_is_peer_accessible()
> checks the condition where address_mask overlaps the aper_base
> and hence returns 0, due to which the p2p disables for this platform
>
> IOMMU should remap the BAR addresses so
On Tue, Aug 13, 2024 at 1:07 PM Sunil Khatri wrote:
>
> Remove ME0 registers from MI300 gfx_9_4_3 ipdump
> MI300 does not have gfx ME and hence those register
> are just empty one and could be dropped.
>
> Signed-off-by: Sunil Khatri
Reviewed-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/amdg
Based on the recommendation of MEC FW, update BadOpcode interrupt
handling by unmapping all queues, removing the queue that got the
interrupt from scheduling and remapping rest of the queues back when
using MES scheduler. This is done to prevent the case where unmapping
of the bad queue can fail th
MEC FW expects MES to unmap all queues when a VM fault is observed
on a queue and then resumed once the affected process is terminated.
Use the MES Suspend and Resume APIs to achieve this.
Signed-off-by: Mukul Joshi
---
.../drm/amd/amdkfd/kfd_device_queue_manager.c | 75 ++-
1 fi
Add implementation for MES Suspend and Resume APIs to unmap/map
all queues for GFX11. Support or GFX12 will be added when the
corresponding firmware support is in place.
Signed-off-by: Mukul Joshi
---
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c | 32 --
1 file changed, 30 inse
On Tue, Aug 13, 2024 at 6:57 AM Tvrtko Ursulin wrote:
>
> From: Tvrtko Ursulin
>
> Currently it is not well defined what is drm-memory- compared to other
> categories.
>
> In practice the only driver which emits these keys is amdgpu and in them
> exposes the current resident buffer object memory
Remove ME0 registers from MI300 gfx_9_4_3 ipdump
MI300 does not have gfx ME and hence those register
are just empty one and could be dropped.
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c | 37 -
1 file changed, 37 deletions(-)
diff --git a/dri
[AMD Official Use Only - AMD Internal Distribution Only]
-Original Message-
From: amd-gfx On Behalf Of Alex Deucher
Sent: Tuesday, August 13, 2024 9:40 PM
To: Khatri, Sunil
Cc: Deucher, Alexander ; Koenig, Christian
; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH v2 1/4] drm/amdgpu:
On Fri, Aug 9, 2024 at 8:54 AM Sunil Khatri wrote:
>
> Add general registers of gfx9_4_3 in ipdump for
> devcoredump support.
>
> Signed-off-by: Sunil Khatri
> ---
> drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c | 133 +++-
> 1 file changed, 132 insertions(+), 1 deletion(-)
>
> dif
I was waiting for some replies elsewhere on this thread. Anwyay.. for
the below, because I don't understand how come an important fix like
this is not garnering more attention:
On 04/06/2024 17:05, Christian König wrote:
From: Tvrtko Ursulin
Since you pretty much changed my logic you cou
From: Tvrtko Ursulin
When CONFIG_INIT_STACK_ALL_ZERO is set and so -ftrivial-auto-var-init=zero
compiler option active, compiler fails to notice that later in
amdgpu_vm_pt_clear() there is a second memset to clear the same on stack
struct amdgpu_vm_update_params.
If we replace this memset with
From: Tvrtko Ursulin
When CONFIG_INIT_STACK_ALL_ZERO is set and so -ftrivial-auto-var-init=zero
compiler option active, compiler fails to notice that inside
amdgpu_cs_parser_init() there is a second memset to clear the same on
stack struct amdgpu_cs_parser.
If we pull this memset one level out,
From: Tvrtko Ursulin
Re-sending these two since they garnered little attention last time round.
First patch clarifies what drm-memory- is, and that it is legacy, and second
patch updates amdgpu to start emitting new keys together with the legacy (by
using the common DRM helper).
With that gputo
From: Tvrtko Ursulin
Convert fdinfo memory stats to use the common drm_print_memory_stats
helper.
This achieves alignment with the common keys as documented in
drm-usage-stats.rst, adding specifically drm-total- key the driver was
missing until now.
Additionally I made the code stop skipping to
From: Tvrtko Ursulin
Currently it is not well defined what is drm-memory- compared to other
categories.
In practice the only driver which emits these keys is amdgpu and in them
exposes the current resident buffer object memory (including shared).
To prevent any confusion, document that drm-memo
when trying to enable p2p the amdgpu_device_is_peer_accessible()
checks the condition where address_mask overlaps the aper_base
and hence returns 0, due to which the p2p disables for this platform
IOMMU should remap the BAR addresses so the device can access
them. Hence check if iommu_remap and re
On Tue, Aug 13, 2024 at 2:04 AM Yang Wang wrote:
>
> Skip rlc firmware validation to ignore firmware header size mismatch issues.
> Refs: 49e133c973ce ("drm/amdgpu: Fix the null pointer when load rlc firmware")
>
> Fixes: e1c6c2c1099f ("drm/amdgpu: refine gfx10 firmware loading")
Closes: https://
Add support of vcn ip dump in the devcoredump
for vcn_v5_0.
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c | 76 -
1 file changed, 75 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c
b/drivers/gpu/drm/amd/amdgpu/
Add support of vcn ip dump in the devcoredump
for vcn_v1_0.
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 78 ++-
1 file changed, 77 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
b/drivers/gpu/drm/amd/amdgpu/vc
Add support for logging the registers in devcoredump
buffer for vcn_v2_5.
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 34 ++-
1 file changed, 33 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
b/drivers/gpu/drm
Add support of vcn ip dump in the devcoredump
for vcn_v4_0_5.
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c | 79 -
1 file changed, 78 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c
b/drivers/gpu/drm/amd/amdgp
Add support for logging the registers in devcoredump
buffer for vcn_v2_0.
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 34 ++-
1 file changed, 33 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
b/drivers/gpu/drm
Add support for logging the registers in devcoredump
buffer for vcn_v1_0.
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 34 ++-
1 file changed, 33 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
b/drivers/gpu/drm
Add support for logging the registers in devcoredump
buffer for vcn_v2_6.
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
b/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
i
Add support for logging the registers in devcoredump
buffer for vcn_v4_0.
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c | 34 ++-
1 file changed, 33 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
b/drivers/gpu/drm
Add pointer to the vcn ip dump in the vcn global structure
to be accessible for all vcn version via global adev.
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
b/drivers/gpu/d
Add support of vcn ip dump in the devcoredump
for vcn_v4_0_3.
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c | 81 -
1 file changed, 80 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
b/drivers/gpu/drm/amd/amdgp
Add support of vcn ip dump in the devcoredump
for vcn_v2_5.
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 80 ++-
1 file changed, 79 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
b/drivers/gpu/drm/amd/amdgpu/vc
Add support for logging the registers in devcoredump
buffer for vcn_v4_0_5.
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c | 34 -
1 file changed, 33 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_5.c
b/drivers/gpu
Add support of vcn ip dump in the devcoredump
for vcn_v2_0.
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 79 ++-
1 file changed, 78 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
b/drivers/gpu/drm/amd/amdgpu/vc
Add support for logging the registers in devcoredump
buffer for vcn_v4_0_3.
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c | 34 -
1 file changed, 33 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
b/drivers/gpu
*** BLURB HERE ***
Sunil Khatri (18):
drm/amdgpu: add vcn ip dump ptr in vcn global struct
drm/amdgpu: add vcn_v3_0 ip dump support
drm/amdgpu: add print support for vcn_v3_0 ip dump
drm/amdgpu: add vcn_v5_0 ip dump support
drm/amdgpu: add print support for vcn_v5_0 ip dump
drm/amdgpu:
Add support of vcn ip dump in the devcoredump
for vcn_v3_0.
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 78 ++-
1 file changed, 77 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
b/drivers/gpu/drm/amd/amdgpu/vc
Add support for logging the registers in devcoredump
buffer for vcn_v3_0.
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 35 ++-
1 file changed, 34 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
b/drivers/gpu/drm
Add support of vcn ip dump in the devcoredump
for vcn_v4_0.
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c | 80 ++-
1 file changed, 79 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
b/drivers/gpu/drm/amd/amdgpu/vc
Add support for logging the registers in devcoredump
buffer for vcn_v5_0.
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c | 34 -
1 file changed, 33 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c
b/drivers/gpu/d
If buddy manager have more than one roots and each root have sub-block
need to be free. When drm_buddy_fini called, the first loop of
force_merge will merge and free all of the sub block of first root,
which offset is 0x0 and size is biggest(more than have of the mm size).
In subsequent force_merge
On Mon, 12 Aug 2024, Thomas Weißschuh wrote:
> Panels using a PWM-controlled backlight source without an do not have a
> standard way to communicate their valid PWM ranges.
> On x86 the ranges are read from ACPI through driver-specific tables.
> The built-in ranges are not necessarily correct, or
Not all platforms provide correct PWM backlight capabilities through ATIF.
Use the generic drm panel minimum backlight quirk infrastructure to
override the capabilities where necessary.
Signed-off-by: Thomas Weißschuh
---
drivers/gpu/drm/amd/amdgpu/Kconfig| 1 +
drivers/gpu/drm/
Panels using a PWM-controlled backlight source without an do not have a
standard way to communicate their valid PWM ranges.
On x86 the ranges are read from ACPI through driver-specific tables.
The built-in ranges are not necessarily correct, or may grow stale if an
older device can be retrofitted w
Hi all,
As some of you have noticed, there's a TON of failure messages being
sent out for AMD gpu driver commits that are tagged for stable
backports. In short, you all are doing something really wrong with how
you are tagging these.
Please fix it up to NOT have duplicates in multiple branches t
The value of "min_input_signal" returned from ATIF on a Framework AMD 13
is "12". This leads to a fairly bright minimum display backlight.
Introduce a quirk to override "min_input_signal" to "0" which leads to a
much lower minimum brightness, which is still readable even in daylight.
Tested on a
The value of "min_input_signal" returned from ATIF on a Framework AMD 13
is "12". This leads to a fairly bright minimum display backlight.
Add a quirk to override that the minimum backlight PWM to "0" which
leads to a much lower minimum brightness, which is still visible.
Tested on a Framework AM
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