[llvm-branch-commits] [llvm] 57a3d9e - [Debugify] Support checking Machine IR debug info

2020-12-14 Thread Xiang1 Zhang via llvm-branch-commits

Author: Xiang1 Zhang
Date: 2020-12-14T17:38:01-08:00
New Revision: 57a3d9ec4a8c1422f07264bed9f12a4ea416707e

URL: 
https://github.com/llvm/llvm-project/commit/57a3d9ec4a8c1422f07264bed9f12a4ea416707e
DIFF: 
https://github.com/llvm/llvm-project/commit/57a3d9ec4a8c1422f07264bed9f12a4ea416707e.diff

LOG: [Debugify] Support checking Machine IR debug info
Add mir-check-debug pass to check MIR-level debug info.

For IR-level, currently, LLVM have debugify + check-debugify to generate
and check debug IR. Much like the IR-level pass debugify, mir-debugify
inserts sequentially increasing line locations to each MachineInstr in a
Module, But there is no equivalent MIR-level check-debugify pass, So now
we support it at "mir-check-debug".

Reviewed By: djtodoro

Differential Revision: https://reviews.llvm.org/D95195

Added: 
llvm/lib/CodeGen/MachineCheckDebugify.cpp
llvm/test/CodeGen/Generic/MIRDebugify/check-line-and-variables-x.mir
llvm/test/CodeGen/Generic/MIRDebugify/check-line-and-variables.ll
llvm/test/CodeGen/Generic/MIRDebugify/check-line-and-variables.mir

Modified: 
llvm/docs/HowToUpdateDebugInfo.rst
llvm/include/llvm/CodeGen/Passes.h
llvm/include/llvm/CodeGen/TargetPassConfig.h
llvm/include/llvm/InitializePasses.h
llvm/lib/CodeGen/CMakeLists.txt
llvm/lib/CodeGen/CodeGen.cpp
llvm/lib/CodeGen/MachineDebugify.cpp
llvm/lib/CodeGen/TargetPassConfig.cpp
llvm/test/CodeGen/Generic/MIRDebugify/locations-and-values.mir
llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn

Removed: 




diff  --git a/llvm/docs/HowToUpdateDebugInfo.rst 
b/llvm/docs/HowToUpdateDebugInfo.rst
index 7df2a8a25827..fff0cdbe59c8 100644
--- a/llvm/docs/HowToUpdateDebugInfo.rst
+++ b/llvm/docs/HowToUpdateDebugInfo.rst
@@ -342,8 +342,8 @@ A variant of the ``debugify`` utility described in
 :ref:`Mutation testing for IR-level transformations` can be used
 for MIR-level transformations as well: much like the IR-level pass,
 ``mir-debugify`` inserts sequentially increasing line locations to each
-``MachineInstr`` in a ``Module`` (although there is no equivalent MIR-level
-``check-debugify`` pass).
+``MachineInstr`` in a ``Module``. And the MIR-level ``mir-check-debugify`` is
+similar to IR-level ``check-debugify`` pass.
 
 For example, here is a snippet before:
 
@@ -403,16 +403,32 @@ and ``-start-after``. For example:
   $ llc -debugify-and-strip-all-safe -run-pass=... 
   $ llc -debugify-and-strip-all-safe -O1 
 
+If you want to check it after each pass in a pipeline, use
+``-debugify-check-and-strip-all-safe``. This can also be combined with
+``-start-before`` and ``-start-after``. For example:
+
+.. code-block:: bash
+
+  $ llc -debugify-check-and-strip-all-safe -run-pass=... 
+  $ llc -debugify-check-and-strip-all-safe -O1 
+
+To check all debug info from a test, use ``mir-check-debugify``, like:
+
+.. code-block:: bash
+
+  $ llc -run-pass=mir-debugify,other-pass,mir-check-debugify
+
 To strip out all debug info from a test, use ``mir-strip-debug``, like:
 
 .. code-block:: bash
 
   $ llc -run-pass=mir-debugify,other-pass,mir-strip-debug
 
-It can be useful to combine ``mir-debugify`` and ``mir-strip-debug`` to
-identify backend transformations which break in the presence of debug info.
-For example, to run the AArch64 backend tests with all normal passes
-"sandwiched" in between MIRDebugify and MIRStripDebugify mutation passes, run:
+It can be useful to combine ``mir-debugify``, ``mir-check-debugify`` and/or
+``mir-strip-debug`` to identify backend transformations which break in
+the presence of debug info. For example, to run the AArch64 backend tests
+with all normal passes "sandwiched" in between MIRDebugify and
+MIRStripDebugify mutation passes, run:
 
 .. code-block:: bash
 

diff  --git a/llvm/include/llvm/CodeGen/Passes.h 
b/llvm/include/llvm/CodeGen/Passes.h
index 47037bac6270..676ed2c65eb1 100644
--- a/llvm/include/llvm/CodeGen/Passes.h
+++ b/llvm/include/llvm/CodeGen/Passes.h
@@ -482,6 +482,9 @@ namespace llvm {
   /// info was generated by another source such as clang.
   ModulePass *createStripDebugMachineModulePass(bool OnlyDebugified);
 
+  /// Creates MIR Check Debug pass. \see MachineCheckDebugify.cpp
+  ModulePass *createCheckDebugMachineModulePass();
+
   /// The pass fixups statepoint machine instruction to replace usage of
   /// caller saved registers with stack slots.
   extern char &FixupStatepointCallerSavedID;

diff  --git a/llvm/include/llvm/CodeGen/TargetPassConfig.h 
b/llvm/include/llvm/CodeGen/TargetPassConfig.h
index fc5245216941..9b42b0756d41 100644
--- a/llvm/include/llvm/CodeGen/TargetPassConfig.h
+++ b/llvm/include/llvm/CodeGen/TargetPassConfig.h
@@ -313,6 +313,9 @@ class TargetPassConfig : public ImmutablePass {
   /// Add a pass to remove debug info from the MIR.
   void addStripDebugPass();
 
+  /// Add a pass to check synthesized debug info for MIR.
+  void addCheckDeb

[llvm-branch-commits] [llvm] fc0f401 - Revert "[Debugify] Support checking Machine IR debug info"

2020-12-14 Thread Xiang1 Zhang via llvm-branch-commits

Author: Xiang1 Zhang
Date: 2020-12-14T17:48:49-08:00
New Revision: fc0f4010bb4c4fb843218c6e3aa0112ffc67c299

URL: 
https://github.com/llvm/llvm-project/commit/fc0f4010bb4c4fb843218c6e3aa0112ffc67c299
DIFF: 
https://github.com/llvm/llvm-project/commit/fc0f4010bb4c4fb843218c6e3aa0112ffc67c299.diff

LOG: Revert "[Debugify] Support checking Machine IR debug info"

This reverts commit 57a3d9ec4a8c1422f07264bed9f12a4ea416707e.

Added: 


Modified: 
llvm/docs/HowToUpdateDebugInfo.rst
llvm/include/llvm/CodeGen/Passes.h
llvm/include/llvm/CodeGen/TargetPassConfig.h
llvm/include/llvm/InitializePasses.h
llvm/lib/CodeGen/CMakeLists.txt
llvm/lib/CodeGen/CodeGen.cpp
llvm/lib/CodeGen/MachineDebugify.cpp
llvm/lib/CodeGen/TargetPassConfig.cpp
llvm/test/CodeGen/Generic/MIRDebugify/locations-and-values.mir
llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn

Removed: 
llvm/lib/CodeGen/MachineCheckDebugify.cpp
llvm/test/CodeGen/Generic/MIRDebugify/check-line-and-variables-x.mir
llvm/test/CodeGen/Generic/MIRDebugify/check-line-and-variables.ll
llvm/test/CodeGen/Generic/MIRDebugify/check-line-and-variables.mir



diff  --git a/llvm/docs/HowToUpdateDebugInfo.rst 
b/llvm/docs/HowToUpdateDebugInfo.rst
index fff0cdbe59c8..7df2a8a25827 100644
--- a/llvm/docs/HowToUpdateDebugInfo.rst
+++ b/llvm/docs/HowToUpdateDebugInfo.rst
@@ -342,8 +342,8 @@ A variant of the ``debugify`` utility described in
 :ref:`Mutation testing for IR-level transformations` can be used
 for MIR-level transformations as well: much like the IR-level pass,
 ``mir-debugify`` inserts sequentially increasing line locations to each
-``MachineInstr`` in a ``Module``. And the MIR-level ``mir-check-debugify`` is
-similar to IR-level ``check-debugify`` pass.
+``MachineInstr`` in a ``Module`` (although there is no equivalent MIR-level
+``check-debugify`` pass).
 
 For example, here is a snippet before:
 
@@ -403,32 +403,16 @@ and ``-start-after``. For example:
   $ llc -debugify-and-strip-all-safe -run-pass=... 
   $ llc -debugify-and-strip-all-safe -O1 
 
-If you want to check it after each pass in a pipeline, use
-``-debugify-check-and-strip-all-safe``. This can also be combined with
-``-start-before`` and ``-start-after``. For example:
-
-.. code-block:: bash
-
-  $ llc -debugify-check-and-strip-all-safe -run-pass=... 
-  $ llc -debugify-check-and-strip-all-safe -O1 
-
-To check all debug info from a test, use ``mir-check-debugify``, like:
-
-.. code-block:: bash
-
-  $ llc -run-pass=mir-debugify,other-pass,mir-check-debugify
-
 To strip out all debug info from a test, use ``mir-strip-debug``, like:
 
 .. code-block:: bash
 
   $ llc -run-pass=mir-debugify,other-pass,mir-strip-debug
 
-It can be useful to combine ``mir-debugify``, ``mir-check-debugify`` and/or
-``mir-strip-debug`` to identify backend transformations which break in
-the presence of debug info. For example, to run the AArch64 backend tests
-with all normal passes "sandwiched" in between MIRDebugify and
-MIRStripDebugify mutation passes, run:
+It can be useful to combine ``mir-debugify`` and ``mir-strip-debug`` to
+identify backend transformations which break in the presence of debug info.
+For example, to run the AArch64 backend tests with all normal passes
+"sandwiched" in between MIRDebugify and MIRStripDebugify mutation passes, run:
 
 .. code-block:: bash
 

diff  --git a/llvm/include/llvm/CodeGen/Passes.h 
b/llvm/include/llvm/CodeGen/Passes.h
index 676ed2c65eb1..47037bac6270 100644
--- a/llvm/include/llvm/CodeGen/Passes.h
+++ b/llvm/include/llvm/CodeGen/Passes.h
@@ -482,9 +482,6 @@ namespace llvm {
   /// info was generated by another source such as clang.
   ModulePass *createStripDebugMachineModulePass(bool OnlyDebugified);
 
-  /// Creates MIR Check Debug pass. \see MachineCheckDebugify.cpp
-  ModulePass *createCheckDebugMachineModulePass();
-
   /// The pass fixups statepoint machine instruction to replace usage of
   /// caller saved registers with stack slots.
   extern char &FixupStatepointCallerSavedID;

diff  --git a/llvm/include/llvm/CodeGen/TargetPassConfig.h 
b/llvm/include/llvm/CodeGen/TargetPassConfig.h
index 9b42b0756d41..fc5245216941 100644
--- a/llvm/include/llvm/CodeGen/TargetPassConfig.h
+++ b/llvm/include/llvm/CodeGen/TargetPassConfig.h
@@ -313,9 +313,6 @@ class TargetPassConfig : public ImmutablePass {
   /// Add a pass to remove debug info from the MIR.
   void addStripDebugPass();
 
-  /// Add a pass to check synthesized debug info for MIR.
-  void addCheckDebugPass();
-
   /// Add standard passes before a pass that's about to be added. For example,
   /// the DebugifyMachineModulePass if it is enabled.
   void addMachinePrePasses(bool AllowDebugify = true);

diff  --git a/llvm/include/llvm/InitializePasses.h 
b/llvm/include/llvm/InitializePasses.h
index e1b3a8dd3f3a..b8420ade06a7 100644
--- a/llvm/include/llvm/InitializePasses.h
+++ b/llvm/i

[llvm-branch-commits] [llvm] c4d2d43 - [Debugify] Support checking Machine IR debug info

2020-12-14 Thread Xiang1 Zhang via llvm-branch-commits

Author: Xiang1 Zhang
Date: 2020-12-14T17:53:46-08:00
New Revision: c4d2d4337d50bed3cafd564daece1a197005b22b

URL: 
https://github.com/llvm/llvm-project/commit/c4d2d4337d50bed3cafd564daece1a197005b22b
DIFF: 
https://github.com/llvm/llvm-project/commit/c4d2d4337d50bed3cafd564daece1a197005b22b.diff

LOG: [Debugify] Support checking Machine IR debug info
Add mir-check-debug pass to check MIR-level debug info.

For IR-level, currently, LLVM have debugify + check-debugify to generate
and check debug IR. Much like the IR-level pass debugify, mir-debugify
inserts sequentially increasing line locations to each MachineInstr in a
Module, But there is no equivalent MIR-level check-debugify pass, So now
we support it at "mir-check-debug".

Reviewed By: djtodoro

Differential Revision: https://reviews.llvm.org/D91595

Added: 
llvm/lib/CodeGen/MachineCheckDebugify.cpp
llvm/test/CodeGen/Generic/MIRDebugify/check-line-and-variables-x.mir
llvm/test/CodeGen/Generic/MIRDebugify/check-line-and-variables.ll
llvm/test/CodeGen/Generic/MIRDebugify/check-line-and-variables.mir

Modified: 
llvm/docs/HowToUpdateDebugInfo.rst
llvm/include/llvm/CodeGen/Passes.h
llvm/include/llvm/CodeGen/TargetPassConfig.h
llvm/include/llvm/InitializePasses.h
llvm/lib/CodeGen/CMakeLists.txt
llvm/lib/CodeGen/CodeGen.cpp
llvm/lib/CodeGen/MachineDebugify.cpp
llvm/lib/CodeGen/TargetPassConfig.cpp
llvm/test/CodeGen/Generic/MIRDebugify/locations-and-values.mir
llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn

Removed: 




diff  --git a/llvm/docs/HowToUpdateDebugInfo.rst 
b/llvm/docs/HowToUpdateDebugInfo.rst
index 7df2a8a25827..fff0cdbe59c8 100644
--- a/llvm/docs/HowToUpdateDebugInfo.rst
+++ b/llvm/docs/HowToUpdateDebugInfo.rst
@@ -342,8 +342,8 @@ A variant of the ``debugify`` utility described in
 :ref:`Mutation testing for IR-level transformations` can be used
 for MIR-level transformations as well: much like the IR-level pass,
 ``mir-debugify`` inserts sequentially increasing line locations to each
-``MachineInstr`` in a ``Module`` (although there is no equivalent MIR-level
-``check-debugify`` pass).
+``MachineInstr`` in a ``Module``. And the MIR-level ``mir-check-debugify`` is
+similar to IR-level ``check-debugify`` pass.
 
 For example, here is a snippet before:
 
@@ -403,16 +403,32 @@ and ``-start-after``. For example:
   $ llc -debugify-and-strip-all-safe -run-pass=... 
   $ llc -debugify-and-strip-all-safe -O1 
 
+If you want to check it after each pass in a pipeline, use
+``-debugify-check-and-strip-all-safe``. This can also be combined with
+``-start-before`` and ``-start-after``. For example:
+
+.. code-block:: bash
+
+  $ llc -debugify-check-and-strip-all-safe -run-pass=... 
+  $ llc -debugify-check-and-strip-all-safe -O1 
+
+To check all debug info from a test, use ``mir-check-debugify``, like:
+
+.. code-block:: bash
+
+  $ llc -run-pass=mir-debugify,other-pass,mir-check-debugify
+
 To strip out all debug info from a test, use ``mir-strip-debug``, like:
 
 .. code-block:: bash
 
   $ llc -run-pass=mir-debugify,other-pass,mir-strip-debug
 
-It can be useful to combine ``mir-debugify`` and ``mir-strip-debug`` to
-identify backend transformations which break in the presence of debug info.
-For example, to run the AArch64 backend tests with all normal passes
-"sandwiched" in between MIRDebugify and MIRStripDebugify mutation passes, run:
+It can be useful to combine ``mir-debugify``, ``mir-check-debugify`` and/or
+``mir-strip-debug`` to identify backend transformations which break in
+the presence of debug info. For example, to run the AArch64 backend tests
+with all normal passes "sandwiched" in between MIRDebugify and
+MIRStripDebugify mutation passes, run:
 
 .. code-block:: bash
 

diff  --git a/llvm/include/llvm/CodeGen/Passes.h 
b/llvm/include/llvm/CodeGen/Passes.h
index 47037bac6270..676ed2c65eb1 100644
--- a/llvm/include/llvm/CodeGen/Passes.h
+++ b/llvm/include/llvm/CodeGen/Passes.h
@@ -482,6 +482,9 @@ namespace llvm {
   /// info was generated by another source such as clang.
   ModulePass *createStripDebugMachineModulePass(bool OnlyDebugified);
 
+  /// Creates MIR Check Debug pass. \see MachineCheckDebugify.cpp
+  ModulePass *createCheckDebugMachineModulePass();
+
   /// The pass fixups statepoint machine instruction to replace usage of
   /// caller saved registers with stack slots.
   extern char &FixupStatepointCallerSavedID;

diff  --git a/llvm/include/llvm/CodeGen/TargetPassConfig.h 
b/llvm/include/llvm/CodeGen/TargetPassConfig.h
index fc5245216941..9b42b0756d41 100644
--- a/llvm/include/llvm/CodeGen/TargetPassConfig.h
+++ b/llvm/include/llvm/CodeGen/TargetPassConfig.h
@@ -313,6 +313,9 @@ class TargetPassConfig : public ImmutablePass {
   /// Add a pass to remove debug info from the MIR.
   void addStripDebugPass();
 
+  /// Add a pass to check synthesized debug info for MIR.
+  void addCheckDeb

[llvm-branch-commits] [llvm] 50aaa8c - [Debugify] Support checking Machine IR debug info

2020-12-16 Thread Xiang1 Zhang via llvm-branch-commits

Author: Xiang1 Zhang
Date: 2020-12-16T18:04:05-08:00
New Revision: 50aaa8c274910d78d7bf6c929a34fe58b1f45579

URL: 
https://github.com/llvm/llvm-project/commit/50aaa8c274910d78d7bf6c929a34fe58b1f45579
DIFF: 
https://github.com/llvm/llvm-project/commit/50aaa8c274910d78d7bf6c929a34fe58b1f45579.diff

LOG: [Debugify] Support checking Machine IR debug info
Add mir-check-debug pass to check MIR-level debug info.

For IR-level, currently, LLVM have debugify + check-debugify to generate
and check debug IR. Much like the IR-level pass debugify, mir-debugify
inserts sequentially increasing line locations to each MachineInstr in a
Module, But there is no equivalent MIR-level check-debugify pass, So now
we support it at "mir-check-debug".

Reviewed By: djtodoro

Differential Revision: https://reviews.llvm.org/D91595

Added: 
llvm/lib/CodeGen/MachineCheckDebugify.cpp
llvm/test/CodeGen/Generic/MIRDebugify/check-line-and-variables-x.mir
llvm/test/CodeGen/Generic/MIRDebugify/check-line-and-variables.ll
llvm/test/CodeGen/Generic/MIRDebugify/check-line-and-variables.mir

Modified: 
llvm/docs/HowToUpdateDebugInfo.rst
llvm/include/llvm/CodeGen/Passes.h
llvm/include/llvm/CodeGen/TargetPassConfig.h
llvm/include/llvm/InitializePasses.h
llvm/lib/CodeGen/CMakeLists.txt
llvm/lib/CodeGen/CodeGen.cpp
llvm/lib/CodeGen/MachineDebugify.cpp
llvm/lib/CodeGen/TargetPassConfig.cpp
llvm/test/CodeGen/AArch64/GlobalISel/constant-mir-debugify.mir
llvm/test/CodeGen/AArch64/GlobalISel/phi-mir-debugify.mir
llvm/test/CodeGen/Generic/MIRDebugify/locations-and-values.mir
llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn

Removed: 




diff  --git a/llvm/docs/HowToUpdateDebugInfo.rst 
b/llvm/docs/HowToUpdateDebugInfo.rst
index 7df2a8a25827..fff0cdbe59c8 100644
--- a/llvm/docs/HowToUpdateDebugInfo.rst
+++ b/llvm/docs/HowToUpdateDebugInfo.rst
@@ -342,8 +342,8 @@ A variant of the ``debugify`` utility described in
 :ref:`Mutation testing for IR-level transformations` can be used
 for MIR-level transformations as well: much like the IR-level pass,
 ``mir-debugify`` inserts sequentially increasing line locations to each
-``MachineInstr`` in a ``Module`` (although there is no equivalent MIR-level
-``check-debugify`` pass).
+``MachineInstr`` in a ``Module``. And the MIR-level ``mir-check-debugify`` is
+similar to IR-level ``check-debugify`` pass.
 
 For example, here is a snippet before:
 
@@ -403,16 +403,32 @@ and ``-start-after``. For example:
   $ llc -debugify-and-strip-all-safe -run-pass=... 
   $ llc -debugify-and-strip-all-safe -O1 
 
+If you want to check it after each pass in a pipeline, use
+``-debugify-check-and-strip-all-safe``. This can also be combined with
+``-start-before`` and ``-start-after``. For example:
+
+.. code-block:: bash
+
+  $ llc -debugify-check-and-strip-all-safe -run-pass=... 
+  $ llc -debugify-check-and-strip-all-safe -O1 
+
+To check all debug info from a test, use ``mir-check-debugify``, like:
+
+.. code-block:: bash
+
+  $ llc -run-pass=mir-debugify,other-pass,mir-check-debugify
+
 To strip out all debug info from a test, use ``mir-strip-debug``, like:
 
 .. code-block:: bash
 
   $ llc -run-pass=mir-debugify,other-pass,mir-strip-debug
 
-It can be useful to combine ``mir-debugify`` and ``mir-strip-debug`` to
-identify backend transformations which break in the presence of debug info.
-For example, to run the AArch64 backend tests with all normal passes
-"sandwiched" in between MIRDebugify and MIRStripDebugify mutation passes, run:
+It can be useful to combine ``mir-debugify``, ``mir-check-debugify`` and/or
+``mir-strip-debug`` to identify backend transformations which break in
+the presence of debug info. For example, to run the AArch64 backend tests
+with all normal passes "sandwiched" in between MIRDebugify and
+MIRStripDebugify mutation passes, run:
 
 .. code-block:: bash
 

diff  --git a/llvm/include/llvm/CodeGen/Passes.h 
b/llvm/include/llvm/CodeGen/Passes.h
index 47037bac6270..676ed2c65eb1 100644
--- a/llvm/include/llvm/CodeGen/Passes.h
+++ b/llvm/include/llvm/CodeGen/Passes.h
@@ -482,6 +482,9 @@ namespace llvm {
   /// info was generated by another source such as clang.
   ModulePass *createStripDebugMachineModulePass(bool OnlyDebugified);
 
+  /// Creates MIR Check Debug pass. \see MachineCheckDebugify.cpp
+  ModulePass *createCheckDebugMachineModulePass();
+
   /// The pass fixups statepoint machine instruction to replace usage of
   /// caller saved registers with stack slots.
   extern char &FixupStatepointCallerSavedID;

diff  --git a/llvm/include/llvm/CodeGen/TargetPassConfig.h 
b/llvm/include/llvm/CodeGen/TargetPassConfig.h
index fc5245216941..9b42b0756d41 100644
--- a/llvm/include/llvm/CodeGen/TargetPassConfig.h
+++ b/llvm/include/llvm/CodeGen/TargetPassConfig.h
@@ -313,6 +313,9 @@ class TargetPassConfig : public ImmutablePass {
   /// Add a pass to remove debug

[llvm-branch-commits] [llvm] 1e42ad9 - Revert "[Debugify] Support checking Machine IR debug info"

2020-12-16 Thread Xiang1 Zhang via llvm-branch-commits

Author: Xiang1 Zhang
Date: 2020-12-16T20:12:33-08:00
New Revision: 1e42ad9d629157a9bba53d3c216e3182bcb1408f

URL: 
https://github.com/llvm/llvm-project/commit/1e42ad9d629157a9bba53d3c216e3182bcb1408f
DIFF: 
https://github.com/llvm/llvm-project/commit/1e42ad9d629157a9bba53d3c216e3182bcb1408f.diff

LOG: Revert "[Debugify] Support checking Machine IR debug info"

This reverts commit 50aaa8c274910d78d7bf6c929a34fe58b1f45579.

Added: 


Modified: 
llvm/docs/HowToUpdateDebugInfo.rst
llvm/include/llvm/CodeGen/Passes.h
llvm/include/llvm/CodeGen/TargetPassConfig.h
llvm/include/llvm/InitializePasses.h
llvm/lib/CodeGen/CMakeLists.txt
llvm/lib/CodeGen/CodeGen.cpp
llvm/lib/CodeGen/MachineDebugify.cpp
llvm/lib/CodeGen/TargetPassConfig.cpp
llvm/test/CodeGen/AArch64/GlobalISel/constant-mir-debugify.mir
llvm/test/CodeGen/AArch64/GlobalISel/phi-mir-debugify.mir
llvm/test/CodeGen/Generic/MIRDebugify/locations-and-values.mir
llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn

Removed: 
llvm/lib/CodeGen/MachineCheckDebugify.cpp
llvm/test/CodeGen/Generic/MIRDebugify/check-line-and-variables-x.mir
llvm/test/CodeGen/Generic/MIRDebugify/check-line-and-variables.ll
llvm/test/CodeGen/Generic/MIRDebugify/check-line-and-variables.mir



diff  --git a/llvm/docs/HowToUpdateDebugInfo.rst 
b/llvm/docs/HowToUpdateDebugInfo.rst
index fff0cdbe59c8..7df2a8a25827 100644
--- a/llvm/docs/HowToUpdateDebugInfo.rst
+++ b/llvm/docs/HowToUpdateDebugInfo.rst
@@ -342,8 +342,8 @@ A variant of the ``debugify`` utility described in
 :ref:`Mutation testing for IR-level transformations` can be used
 for MIR-level transformations as well: much like the IR-level pass,
 ``mir-debugify`` inserts sequentially increasing line locations to each
-``MachineInstr`` in a ``Module``. And the MIR-level ``mir-check-debugify`` is
-similar to IR-level ``check-debugify`` pass.
+``MachineInstr`` in a ``Module`` (although there is no equivalent MIR-level
+``check-debugify`` pass).
 
 For example, here is a snippet before:
 
@@ -403,32 +403,16 @@ and ``-start-after``. For example:
   $ llc -debugify-and-strip-all-safe -run-pass=... 
   $ llc -debugify-and-strip-all-safe -O1 
 
-If you want to check it after each pass in a pipeline, use
-``-debugify-check-and-strip-all-safe``. This can also be combined with
-``-start-before`` and ``-start-after``. For example:
-
-.. code-block:: bash
-
-  $ llc -debugify-check-and-strip-all-safe -run-pass=... 
-  $ llc -debugify-check-and-strip-all-safe -O1 
-
-To check all debug info from a test, use ``mir-check-debugify``, like:
-
-.. code-block:: bash
-
-  $ llc -run-pass=mir-debugify,other-pass,mir-check-debugify
-
 To strip out all debug info from a test, use ``mir-strip-debug``, like:
 
 .. code-block:: bash
 
   $ llc -run-pass=mir-debugify,other-pass,mir-strip-debug
 
-It can be useful to combine ``mir-debugify``, ``mir-check-debugify`` and/or
-``mir-strip-debug`` to identify backend transformations which break in
-the presence of debug info. For example, to run the AArch64 backend tests
-with all normal passes "sandwiched" in between MIRDebugify and
-MIRStripDebugify mutation passes, run:
+It can be useful to combine ``mir-debugify`` and ``mir-strip-debug`` to
+identify backend transformations which break in the presence of debug info.
+For example, to run the AArch64 backend tests with all normal passes
+"sandwiched" in between MIRDebugify and MIRStripDebugify mutation passes, run:
 
 .. code-block:: bash
 

diff  --git a/llvm/include/llvm/CodeGen/Passes.h 
b/llvm/include/llvm/CodeGen/Passes.h
index 676ed2c65eb1..47037bac6270 100644
--- a/llvm/include/llvm/CodeGen/Passes.h
+++ b/llvm/include/llvm/CodeGen/Passes.h
@@ -482,9 +482,6 @@ namespace llvm {
   /// info was generated by another source such as clang.
   ModulePass *createStripDebugMachineModulePass(bool OnlyDebugified);
 
-  /// Creates MIR Check Debug pass. \see MachineCheckDebugify.cpp
-  ModulePass *createCheckDebugMachineModulePass();
-
   /// The pass fixups statepoint machine instruction to replace usage of
   /// caller saved registers with stack slots.
   extern char &FixupStatepointCallerSavedID;

diff  --git a/llvm/include/llvm/CodeGen/TargetPassConfig.h 
b/llvm/include/llvm/CodeGen/TargetPassConfig.h
index 9b42b0756d41..fc5245216941 100644
--- a/llvm/include/llvm/CodeGen/TargetPassConfig.h
+++ b/llvm/include/llvm/CodeGen/TargetPassConfig.h
@@ -313,9 +313,6 @@ class TargetPassConfig : public ImmutablePass {
   /// Add a pass to remove debug info from the MIR.
   void addStripDebugPass();
 
-  /// Add a pass to check synthesized debug info for MIR.
-  void addCheckDebugPass();
-
   /// Add standard passes before a pass that's about to be added. For example,
   /// the DebugifyMachineModulePass if it is enabled.
   void addMachinePrePasses(bool AllowDebugify = true);

diff  --git a/llvm/include/llvm/InitializePasses.h 
b/llv

[llvm-branch-commits] [llvm] 39584ae - [Debugify] Support checking Machine IR debug info

2020-12-16 Thread Xiang1 Zhang via llvm-branch-commits

Author: Xiang1 Zhang
Date: 2020-12-16T22:17:25-08:00
New Revision: 39584ae5b5cbc817d19499b003d4eaba259c31b5

URL: 
https://github.com/llvm/llvm-project/commit/39584ae5b5cbc817d19499b003d4eaba259c31b5
DIFF: 
https://github.com/llvm/llvm-project/commit/39584ae5b5cbc817d19499b003d4eaba259c31b5.diff

LOG: [Debugify] Support checking Machine IR debug info
Add mir-check-debug pass to check MIR-level debug info.

For IR-level, currently, LLVM have debugify + check-debugify to generate
and check debug IR. Much like the IR-level pass debugify, mir-debugify
inserts sequentially increasing line locations to each MachineInstr in a
Module, But there is no equivalent MIR-level check-debugify pass, So now
we support it at "mir-check-debug".

Reviewed By: djtodoro

Differential Revision: https://reviews.llvm.org/D91595

Added: 
llvm/lib/CodeGen/MachineCheckDebugify.cpp
llvm/test/CodeGen/Generic/MIRDebugify/check-line-and-variables-x.mir
llvm/test/CodeGen/Generic/MIRDebugify/check-line-and-variables.ll
llvm/test/CodeGen/Generic/MIRDebugify/check-line-and-variables.mir

Modified: 
llvm/docs/HowToUpdateDebugInfo.rst
llvm/include/llvm/CodeGen/Passes.h
llvm/include/llvm/CodeGen/TargetPassConfig.h
llvm/include/llvm/InitializePasses.h
llvm/lib/CodeGen/CMakeLists.txt
llvm/lib/CodeGen/CodeGen.cpp
llvm/lib/CodeGen/MachineDebugify.cpp
llvm/lib/CodeGen/TargetPassConfig.cpp
llvm/test/CodeGen/AArch64/GlobalISel/constant-mir-debugify.mir
llvm/test/CodeGen/AArch64/GlobalISel/phi-mir-debugify.mir
llvm/test/CodeGen/Generic/MIRDebugify/locations-and-values.mir
llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn

Removed: 




diff  --git a/llvm/docs/HowToUpdateDebugInfo.rst 
b/llvm/docs/HowToUpdateDebugInfo.rst
index 7df2a8a25827..fff0cdbe59c8 100644
--- a/llvm/docs/HowToUpdateDebugInfo.rst
+++ b/llvm/docs/HowToUpdateDebugInfo.rst
@@ -342,8 +342,8 @@ A variant of the ``debugify`` utility described in
 :ref:`Mutation testing for IR-level transformations` can be used
 for MIR-level transformations as well: much like the IR-level pass,
 ``mir-debugify`` inserts sequentially increasing line locations to each
-``MachineInstr`` in a ``Module`` (although there is no equivalent MIR-level
-``check-debugify`` pass).
+``MachineInstr`` in a ``Module``. And the MIR-level ``mir-check-debugify`` is
+similar to IR-level ``check-debugify`` pass.
 
 For example, here is a snippet before:
 
@@ -403,16 +403,32 @@ and ``-start-after``. For example:
   $ llc -debugify-and-strip-all-safe -run-pass=... 
   $ llc -debugify-and-strip-all-safe -O1 
 
+If you want to check it after each pass in a pipeline, use
+``-debugify-check-and-strip-all-safe``. This can also be combined with
+``-start-before`` and ``-start-after``. For example:
+
+.. code-block:: bash
+
+  $ llc -debugify-check-and-strip-all-safe -run-pass=... 
+  $ llc -debugify-check-and-strip-all-safe -O1 
+
+To check all debug info from a test, use ``mir-check-debugify``, like:
+
+.. code-block:: bash
+
+  $ llc -run-pass=mir-debugify,other-pass,mir-check-debugify
+
 To strip out all debug info from a test, use ``mir-strip-debug``, like:
 
 .. code-block:: bash
 
   $ llc -run-pass=mir-debugify,other-pass,mir-strip-debug
 
-It can be useful to combine ``mir-debugify`` and ``mir-strip-debug`` to
-identify backend transformations which break in the presence of debug info.
-For example, to run the AArch64 backend tests with all normal passes
-"sandwiched" in between MIRDebugify and MIRStripDebugify mutation passes, run:
+It can be useful to combine ``mir-debugify``, ``mir-check-debugify`` and/or
+``mir-strip-debug`` to identify backend transformations which break in
+the presence of debug info. For example, to run the AArch64 backend tests
+with all normal passes "sandwiched" in between MIRDebugify and
+MIRStripDebugify mutation passes, run:
 
 .. code-block:: bash
 

diff  --git a/llvm/include/llvm/CodeGen/Passes.h 
b/llvm/include/llvm/CodeGen/Passes.h
index 47037bac6270..676ed2c65eb1 100644
--- a/llvm/include/llvm/CodeGen/Passes.h
+++ b/llvm/include/llvm/CodeGen/Passes.h
@@ -482,6 +482,9 @@ namespace llvm {
   /// info was generated by another source such as clang.
   ModulePass *createStripDebugMachineModulePass(bool OnlyDebugified);
 
+  /// Creates MIR Check Debug pass. \see MachineCheckDebugify.cpp
+  ModulePass *createCheckDebugMachineModulePass();
+
   /// The pass fixups statepoint machine instruction to replace usage of
   /// caller saved registers with stack slots.
   extern char &FixupStatepointCallerSavedID;

diff  --git a/llvm/include/llvm/CodeGen/TargetPassConfig.h 
b/llvm/include/llvm/CodeGen/TargetPassConfig.h
index fc5245216941..9b42b0756d41 100644
--- a/llvm/include/llvm/CodeGen/TargetPassConfig.h
+++ b/llvm/include/llvm/CodeGen/TargetPassConfig.h
@@ -313,6 +313,9 @@ class TargetPassConfig : public ImmutablePass {
   /// Add a pass to remove debug

[llvm-branch-commits] [llvm] f2e2924 - [X86] Unbind the ebx with GOT address in regcall calling convention

2020-12-03 Thread Xiang1 Zhang via llvm-branch-commits

Author: Xiang1 Zhang
Date: 2020-12-04T10:00:13+08:00
New Revision: f2e292446334de01403cddb9132ae06cc4475175

URL: 
https://github.com/llvm/llvm-project/commit/f2e292446334de01403cddb9132ae06cc4475175
DIFF: 
https://github.com/llvm/llvm-project/commit/f2e292446334de01403cddb9132ae06cc4475175.diff

LOG: [X86] Unbind the ebx with GOT address in regcall calling convention

No register can be allocated for indirect call when it use regcall calling
convention and passed 5/5+ args.
For example:
call vreg (ag1, ag2, ag3, ag4, ag5, ...) --> 5 regs (EAX, ECX, EDX, ESI, EDI)
used for pass args, 1 reg (EBX )used for hold GOT point, so no regs can be
allocated to vreg.

The Intel386 architecture provides 8 general purpose 32-bit registers. RA
mostly use 6 of them (EAX, EBX, ECX, EDX, ESI, EDI). 5 of this regs can be
used to pass function arguments (EAX, ECX, EDX, ESI, EDI).
EBX used to hold the GOT pointer when making function calls via the PLT.
ESP and EBP usually be "reserved" in register allocation.

Reviewed By: LuoYuanke

Differential Revision: https://reviews.llvm.org/D91020

Added: 
llvm/test/CodeGen/X86/tailregccpic.ll
llvm/test/CodeGen/X86/x86-regcall-got.ll

Modified: 
llvm/lib/Target/X86/X86ISelLowering.cpp

Removed: 




diff  --git a/llvm/lib/Target/X86/X86ISelLowering.cpp 
b/llvm/lib/Target/X86/X86ISelLowering.cpp
index caf9e690f5b8..0b6b5614db6f 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -4127,9 +4127,13 @@ 
X86TargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
 
   if (Subtarget.isPICStyleGOT()) {
 // ELF / PIC requires GOT in the EBX register before function calls via PLT
-// GOT pointer.
+// GOT pointer (except regcall).
 if (!isTailCall) {
-  RegsToPass.push_back(std::make_pair(
+  // Indirect call with RegCall calling convertion may use up all the
+  // general registers, so it is not suitable to bind EBX reister for
+  // GOT address, just let register allocator handle it.
+  if (CallConv != CallingConv::X86_RegCall)
+RegsToPass.push_back(std::make_pair(
   Register(X86::EBX), DAG.getNode(X86ISD::GlobalBaseReg, SDLoc(),
   getPointerTy(DAG.getDataLayout();
 } else {

diff  --git a/llvm/test/CodeGen/X86/tailregccpic.ll 
b/llvm/test/CodeGen/X86/tailregccpic.ll
new file mode 100644
index ..5f960c17da15
--- /dev/null
+++ b/llvm/test/CodeGen/X86/tailregccpic.ll
@@ -0,0 +1,26 @@
+; RUN: llc < %s  -mtriple=i386-pc-unknown-linux-gnu -relocation-model=pic | 
FileCheck %s
+
+@a0 = global i32 0, align 4
+
+define x86_regcallcc void @tail_call_regcall(i32 %a) nounwind {
+  tail call x86_regcallcc void @__regcall3__func(i32 %a) nounwind
+  ret void
+}
+
+define internal x86_regcallcc void @__regcall3__func(i32 %i1) {
+entry:
+  store i32 %i1, i32* @a0, align 4
+  ret void
+}
+
+;CHECK-LABLE: tail_call_regcall:
+;CHECK:   # %bb.0:
+;CHECK-NEXT:  jmp __regcall3__func# TAILCALL
+;CHECK-NEXT:  .Lfunc_end0:
+
+;CHECK-LABLE: __regcall3__func:
+;CHECK:   addl$_GLOBAL_OFFSET_TABLE_+({{.*}}), %ecx
+;CHECK-NEXT:  movla0@GOT(%ecx), %ecx
+;CHECK-NEXT:  movl%eax, (%ecx)
+;CHECK-NEXT:  retl
+;CHECK-NEXT:  .Lfunc_end1:

diff  --git a/llvm/test/CodeGen/X86/x86-regcall-got.ll 
b/llvm/test/CodeGen/X86/x86-regcall-got.ll
new file mode 100644
index ..320b21d6359b
--- /dev/null
+++ b/llvm/test/CodeGen/X86/x86-regcall-got.ll
@@ -0,0 +1,37 @@
+; RUN: llc -O0 -mtriple=i386-unknown-linux-gnu -relocation-model=pic < %s | 
FileCheck %s
+
+; Unbind the ebx with GOT address in regcall calling convention, or the 
following
+; case will failed in register allocation by no register can be used.
+
+;#define REGCALL __attribute__((regcall))
+;int REGCALL func (int i1, int i2, int i3, int i4, int i5);
+;int (REGCALL *fptr) (int, int, int, int, int) = func;
+;int test() {
+;return fptr(1,2,3,4,5);
+;}
+
+@fptr = global i32 (i32, i32, i32, i32, i32)* @__regcall3__func, align 4
+
+declare x86_regcallcc i32 @__regcall3__func(i32 inreg, i32 inreg, i32 inreg, 
i32 inreg, i32 inreg)
+
+; Function Attrs: noinline nounwind optnone
+define i32 @test() {
+; CHECK-LABEL: test:
+; CHECK:   .L0$pb:
+; CHECK-NEXT:popl %eax
+; CHECK:   .Ltmp0:
+; CHECK-NEXT:addl$_GLOBAL_OFFSET_TABLE_+(.Ltmp0-.L0$pb), %eax
+; CHECK-NEXT:movlfptr@GOT(%eax), %eax
+; CHECK-NEXT:movl(%eax), %ebx
+; CHECK-NEXT:movl$1, %eax
+; CHECK-NEXT:movl$2, %ecx
+; CHECK-NEXT:movl$3, %edx
+; CHECK-NEXT:movl$4, %edi
+; CHECK-NEXT:movl$5, %esi
+; CHECK-NEXT:calll   *%ebx
+
+entry:
+  %0 = load i32 (i32, i32, i32, i32, i32)*, i32 (i32, i32, i32, i32, i32)** 
@fptr, align 4
+  %call = call x86_regcallcc i32 %0(i32 inreg 1, i32 inreg 2, i32 inreg 3, i32 
inreg 4, i32 inreg 5)
+  ret i32 %cal