[llvm-branch-commits] [llvm] [NVPTX] add support for encoding PTX registers for DWARF (PR #109495)
@@ -141,3 +142,47 @@ NVPTXRegisterInfo::getFrameLocalRegister(const MachineFunction &MF) const { static_cast(MF.getTarget()); return TM.is64Bit() ? NVPTX::VRFrameLocal64 : NVPTX::VRFrameLocal32; } + +void NVPTXRegisterInfo::clearDebugRegisterMap() const { + debugRegisterMap.clear(); +} + +static uint64_t encodeRegisterForDwarf(std::string registerName) { + if (registerName.length() > 8) { +// The name is more than 8 characters long, and so won't fit into 64 bits. +return 0; + } willghatch wrote: Actually, no, `%envreg` is long enough that it would only allow 1 digit. https://github.com/llvm/llvm-project/pull/109495 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [NVPTX] add support for encoding PTX registers for DWARF (PR #109495)
@@ -141,3 +142,47 @@ NVPTXRegisterInfo::getFrameLocalRegister(const MachineFunction &MF) const { static_cast(MF.getTarget()); return TM.is64Bit() ? NVPTX::VRFrameLocal64 : NVPTX::VRFrameLocal32; } + +void NVPTXRegisterInfo::clearDebugRegisterMap() const { + debugRegisterMap.clear(); +} + +static uint64_t encodeRegisterForDwarf(std::string registerName) { + if (registerName.length() > 8) { +// The name is more than 8 characters long, and so won't fit into 64 bits. +return 0; + } + + // Encode the name string into a DWARF register number using cuda-gdb's + // encoding. See cuda_check_dwarf2_reg_ptx_virtual_register in cuda-tdep.c, + // https://github.com/NVIDIA/cuda-gdb/blob/e5cf3bddae520ffb326f95b4d98ce5c7474b828b/gdb/cuda/cuda-tdep.c#L353 + // IE the bytes of the string are concatenated in reverse into a single + // number, which is stored in ULEB128, but in practice must be no more than 8 + // bytes (excluding null terminator, which is not included). + uint64_t result = 0; + for (int i = 0; i < registerName.length(); ++i) { +result = result << 8; +char c = registerName[i]; willghatch wrote: Oops, yes, I forgot about char signedness. In practice this only handles ASCII characters, so the high bit will always be zero. But it should be unsigned. https://github.com/llvm/llvm-project/pull/109495 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [NVPTX] add support for encoding PTX registers for DWARF (PR #109495)
@@ -141,3 +142,47 @@ NVPTXRegisterInfo::getFrameLocalRegister(const MachineFunction &MF) const { static_cast(MF.getTarget()); return TM.is64Bit() ? NVPTX::VRFrameLocal64 : NVPTX::VRFrameLocal32; } + +void NVPTXRegisterInfo::clearDebugRegisterMap() const { + debugRegisterMap.clear(); +} + +static uint64_t encodeRegisterForDwarf(std::string registerName) { + if (registerName.length() > 8) { +// The name is more than 8 characters long, and so won't fit into 64 bits. +return 0; + } willghatch wrote: I believe that the longest register name prefix in use is 4 characters, leaving 4 more characters for the decimal number, meaning 10k registers. So it could just be an error, and probably should. 10k registers ought to be enough for anyone. https://github.com/llvm/llvm-project/pull/109495 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [NVPTX] add support for encoding PTX registers for DWARF (PR #109495)
https://github.com/willghatch edited https://github.com/llvm/llvm-project/pull/109495 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits