[llvm-branch-commits] [llvm] 30fbba9 - [𝘀𝗽𝗿] initial version

2023-11-08 Thread Scott Linder via llvm-branch-commits 

Author: Scott Linder
Date: 2023-11-08T21:05:35Z
New Revision: 30fbba91ce82b68395b0b527ff0f34d349e6a010

URL: 
https://github.com/llvm/llvm-project/commit/30fbba91ce82b68395b0b527ff0f34d349e6a010
DIFF: 
https://github.com/llvm/llvm-project/commit/30fbba91ce82b68395b0b527ff0f34d349e6a010.diff

LOG: [𝘀𝗽𝗿] initial version

Created using spr 1.3.6-beta.1

Added: 


Modified: 
llvm/lib/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp

Removed: 




diff  --git a/llvm/lib/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp 
b/llvm/lib/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp
index 55a0afcf7a33f16..dab27d209d18fd6 100644
--- a/llvm/lib/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp
@@ -466,9 +466,6 @@ void llvm::calculateDbgEntityHistory(const MachineFunction 
*MF,
 for (const auto &MI : MBB) {
   if (MI.isDebugValue()) {
 assert(MI.getNumOperands() > 1 && "Invalid DBG_VALUE instruction!");
-// Use the base variable (without any DW_OP_piece expressions)
-// as index into History. The full variables including the
-// piece expressions are attached to the MI.
 const DILocalVariable *RawVar = MI.getDebugVariable();
 assert(RawVar->isValidLocationForIntrinsic(MI.getDebugLoc()) &&
"Expected inlined-at fields to agree");
@@ -492,8 +489,7 @@ void llvm::calculateDbgEntityHistory(const MachineFunction 
*MF,
   if (MI.isMetaInstruction())
 continue;
 
-  // Not a DBG_VALUE instruction. It may clobber registers which describe
-  // some variables.
+  // Other instruction may clobber registers which describe some variables.
   for (const MachineOperand &MO : MI.operands()) {
 if (MO.isReg() && MO.isDef() && MO.getReg()) {
   // Ignore call instructions that claim to clobber SP. The AArch64



___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] 28e8baf - [𝘀𝗽𝗿] initial version

2023-11-08 Thread Scott Linder via llvm-branch-commits 

Author: Scott Linder
Date: 2023-11-08T21:05:40Z
New Revision: 28e8baf03efd7ba43a2af4afb3831caa511880ca

URL: 
https://github.com/llvm/llvm-project/commit/28e8baf03efd7ba43a2af4afb3831caa511880ca
DIFF: 
https://github.com/llvm/llvm-project/commit/28e8baf03efd7ba43a2af4afb3831caa511880ca.diff

LOG: [𝘀𝗽𝗿] initial version

Created using spr 1.3.6-beta.1

Added: 


Modified: 
llvm/lib/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp

Removed: 




diff  --git a/llvm/lib/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp 
b/llvm/lib/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp
index 55a0afcf7a33f16..8b67580b9ba50b0 100644
--- a/llvm/lib/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp
@@ -373,6 +373,18 @@ static void handleNewDebugValue(InlinedEntity Var, const 
MachineInstr &DV,
 DbgValueHistoryMap &HistMap) {
   EntryIndex NewIndex;
   if (HistMap.startDbgValue(Var, DV, NewIndex)) {
+// As we already need to iterate all LiveEntries when handling a DbgValue,
+// we use this map to avoid a more expensive check against RegVars. There
+// is an assert that we handle this correclty in addRegDescribedVar.
+//
+// In other terms, the presense in this map indicates the presense of a
+// corresponding entry in RegVars.
+//
+// The bool value then tracks whether an entry is to be retained (true) or
+// removed (false); as we end previous entries we speculatively assume they
+// can be dropped from RegVars, but we then also visit the new entry whose
+// set of debug register operands may overlap and "save" a reg from being
+// dropped.
 SmallDenseMap TrackedRegs;
 
 // If we have created a new debug value entry, close all preceding
@@ -466,9 +478,6 @@ void llvm::calculateDbgEntityHistory(const MachineFunction 
*MF,
 for (const auto &MI : MBB) {
   if (MI.isDebugValue()) {
 assert(MI.getNumOperands() > 1 && "Invalid DBG_VALUE instruction!");
-// Use the base variable (without any DW_OP_piece expressions)
-// as index into History. The full variables including the
-// piece expressions are attached to the MI.
 const DILocalVariable *RawVar = MI.getDebugVariable();
 assert(RawVar->isValidLocationForIntrinsic(MI.getDebugLoc()) &&
"Expected inlined-at fields to agree");
@@ -492,8 +501,7 @@ void llvm::calculateDbgEntityHistory(const MachineFunction 
*MF,
   if (MI.isMetaInstruction())
 continue;
 
-  // Not a DBG_VALUE instruction. It may clobber registers which describe
-  // some variables.
+  // Other instruction may clobber registers which describe some variables.
   for (const MachineOperand &MO : MI.operands()) {
 if (MO.isReg() && MO.isDef() && MO.getReg()) {
   // Ignore call instructions that claim to clobber SP. The AArch64



___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [NFC][AsmPrinter] Clarify handleNewDebugValue cache of TrackedRegs (PR #71737)

2023-11-08 Thread Scott Linder via llvm-branch-commits 

https://github.com/slinder1 created 
https://github.com/llvm/llvm-project/pull/71737

None


___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [YAMLParser] Fix handling escaped line breaks in double-quoted scalars (PR #71775)

2023-11-09 Thread Scott Linder via llvm-branch-commits 

https://github.com/slinder1 approved this pull request.

I am not certain I'm reviewing the spec-compliance particularly rigorously, in 
that I am not certain I have followed every path and confirmed there are tests 
for every possibility. But clearly what we have now is not compliant in these 
tests and your change improves the story, so LGTM!

https://github.com/llvm/llvm-project/pull/71775
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [YAMLParser] Unfold multi-line scalar values (PR #70898)

2023-11-09 Thread Scott Linder via llvm-branch-commits 

https://github.com/slinder1 approved this pull request.

Thank you for breaking out the NFC test changes, and for adding even more 
unittests!

I am again not being meticulous and exhaustive in looking for spec compliance, 
but in every case I did examine you were fixing a clear issue. I also ran a few 
cases through http://ben-kiki.org/ypaste/ and it agreed.

Thank you for the cleanup, and again thank you for taking all of my review 
comments on even when it required cleaning up an existing mess in the tests!

https://github.com/llvm/llvm-project/pull/70898
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] c15b0e2 - [Clang][Docs] Fix ambiguity in clang-offload-bundler docs

2021-01-11 Thread Scott Linder via llvm-branch-commits 

Author: Scott Linder
Date: 2021-01-11T17:23:24Z
New Revision: c15b0e2229ea04d1c36fafaa1f717f433a995e9a

URL: 
https://github.com/llvm/llvm-project/commit/c15b0e2229ea04d1c36fafaa1f717f433a995e9a
DIFF: 
https://github.com/llvm/llvm-project/commit/c15b0e2229ea04d1c36fafaa1f717f433a995e9a.diff

LOG: [Clang][Docs] Fix ambiguity in clang-offload-bundler docs

Differential Revision: https://reviews.llvm.org/D94338

Added: 


Modified: 
clang/docs/ClangOffloadBundler.rst

Removed: 




diff  --git a/clang/docs/ClangOffloadBundler.rst 
b/clang/docs/ClangOffloadBundler.rst
index 050925be993b..68c5116b235f 100644
--- a/clang/docs/ClangOffloadBundler.rst
+++ b/clang/docs/ClangOffloadBundler.rst
@@ -44,7 +44,7 @@ The layout of a bundled code object is defined by the 
following table:
 Field   TypeSize in BytesDescription
 === ===  
===
 Magic Stringstring  24   
``__CLANG_OFFLOAD_BUNDLE__``
-Number Of Code Objects  integer 8Number od 
bundled code objects.
+Number Of Bundle Entriesinteger 8Number of 
bundle entries.
 1st Bundle Entry Code Object Offset integer 8Byte offset 
from beginning of
  bundled code 
object to 1st code
  object.
@@ -208,4 +208,4 @@ Target specific information is available for the following:
   features `_
   supported.
 
-Most other targets do not support target IDs.
\ No newline at end of file
+Most other targets do not support target IDs.



___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] ffba47d - Revert "[AMDGPU][HIP] Switch default DWARF version to 5"

2020-12-21 Thread Scott Linder via llvm-branch-commits 

Author: Scott Linder
Date: 2020-12-21T21:43:51Z
New Revision: ffba47df76460905965df4b54cf6ba945d2eb1ce

URL: 
https://github.com/llvm/llvm-project/commit/ffba47df76460905965df4b54cf6ba945d2eb1ce
DIFF: 
https://github.com/llvm/llvm-project/commit/ffba47df76460905965df4b54cf6ba945d2eb1ce.diff

LOG: Revert "[AMDGPU][HIP] Switch default DWARF version to 5"

This reverts commit c4d10e7e9bb47b77fad43d8ddcfa328298f36c88.

Differential Revision: https://reviews.llvm.org/D93648

Added: 


Modified: 
clang/lib/Driver/ToolChains/AMDGPU.h
clang/lib/Driver/ToolChains/HIP.h
clang/test/Driver/amdgpu-toolchain.c
clang/test/Driver/hip-toolchain-dwarf.hip

Removed: 




diff  --git a/clang/lib/Driver/ToolChains/AMDGPU.h 
b/clang/lib/Driver/ToolChains/AMDGPU.h
index f5448b76aee5..55ef6e01967e 100644
--- a/clang/lib/Driver/ToolChains/AMDGPU.h
+++ b/clang/lib/Driver/ToolChains/AMDGPU.h
@@ -60,7 +60,7 @@ class LLVM_LIBRARY_VISIBILITY AMDGPUToolChain : public 
Generic_ELF {
 public:
   AMDGPUToolChain(const Driver &D, const llvm::Triple &Triple,
   const llvm::opt::ArgList &Args);
-  unsigned GetDefaultDwarfVersion() const override { return 5; }
+  unsigned GetDefaultDwarfVersion() const override { return 4; }
   bool IsIntegratedAssemblerDefault() const override { return true; }
   bool IsMathErrnoDefault() const override { return false; }
 

diff  --git a/clang/lib/Driver/ToolChains/HIP.h 
b/clang/lib/Driver/ToolChains/HIP.h
index ff58c5451b0b..5e2be7138579 100644
--- a/clang/lib/Driver/ToolChains/HIP.h
+++ b/clang/lib/Driver/ToolChains/HIP.h
@@ -99,7 +99,7 @@ class LLVM_LIBRARY_VISIBILITY HIPToolChain final : public 
ROCMToolChain {
   computeMSVCVersion(const Driver *D,
  const llvm::opt::ArgList &Args) const override;
 
-  unsigned GetDefaultDwarfVersion() const override { return 5; }
+  unsigned GetDefaultDwarfVersion() const override { return 4; }
 
   const ToolChain &HostTC;
 

diff  --git a/clang/test/Driver/amdgpu-toolchain.c 
b/clang/test/Driver/amdgpu-toolchain.c
index cb92744eee6a..ac558e0e26eb 100644
--- a/clang/test/Driver/amdgpu-toolchain.c
+++ b/clang/test/Driver/amdgpu-toolchain.c
@@ -8,7 +8,7 @@
 // AS_LINK: clang{{.*}} "-cc1as"
 // AS_LINK: ld.lld{{.*}} "-shared"
 
-// DWARF_VER: "-dwarf-version=5"
+// DWARF_VER: "-dwarf-version=4"
 
 // RUN: %clang -### -target amdgcn-amd-amdhsa -mcpu=gfx906 -nogpulib \
 // RUN:   -flto %s 2>&1 | FileCheck -check-prefix=LTO %s

diff  --git a/clang/test/Driver/hip-toolchain-dwarf.hip 
b/clang/test/Driver/hip-toolchain-dwarf.hip
index c853d5cf07cf..44d66fe52e04 100644
--- a/clang/test/Driver/hip-toolchain-dwarf.hip
+++ b/clang/test/Driver/hip-toolchain-dwarf.hip
@@ -6,4 +6,4 @@
 // RUN:   -x hip --cuda-gpu-arch=gfx803 %s \
 // RUN:   -Xarch_gfx803 -g 2>&1 | FileCheck %s -check-prefix=DWARF_VER
 
-// DWARF_VER: "-dwarf-version=5"
+// DWARF_VER: "-dwarf-version=4"



___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] d55d680 - [MC] Consume EndOfStatement in .cfi_{sections, endproc}

2020-12-04 Thread Scott Linder via llvm-branch-commits 

Author: Scott Linder
Date: 2020-12-04T22:30:29Z
New Revision: d55d6806ad728f76c8721d3fee294545f5833fac

URL: 
https://github.com/llvm/llvm-project/commit/d55d6806ad728f76c8721d3fee294545f5833fac
DIFF: 
https://github.com/llvm/llvm-project/commit/d55d6806ad728f76c8721d3fee294545f5833fac.diff

LOG: [MC] Consume EndOfStatement in .cfi_{sections,endproc}

Previously these directives were always interpreted as having an extra
blank line after them.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D92612

Added: 
llvm/test/MC/AsmParser/round-trip.s

Modified: 
llvm/lib/MC/MCParser/AsmParser.cpp
llvm/test/MC/ELF/cfi.s

Removed: 




diff  --git a/llvm/lib/MC/MCParser/AsmParser.cpp 
b/llvm/lib/MC/MCParser/AsmParser.cpp
index 936d2b004225..6a7ae3b73ecd 100644
--- a/llvm/lib/MC/MCParser/AsmParser.cpp
+++ b/llvm/lib/MC/MCParser/AsmParser.cpp
@@ -4077,6 +4077,9 @@ bool AsmParser::parseDirectiveCFISections() {
   Debug = true;
   }
 
+  if (parseToken(AsmToken::EndOfStatement))
+return addErrorSuffix(" in '.cfi_sections' directive");
+
   getStreamer().emitCFISections(EH, Debug);
   return false;
 }
@@ -4104,6 +4107,8 @@ bool AsmParser::parseDirectiveCFIStartProc() {
 /// parseDirectiveCFIEndProc
 /// ::= .cfi_endproc
 bool AsmParser::parseDirectiveCFIEndProc() {
+  if (parseToken(AsmToken::EndOfStatement))
+return addErrorSuffix(" in '.cfi_endproc' directive");
   getStreamer().emitCFIEndProc();
   return false;
 }

diff  --git a/llvm/test/MC/AsmParser/round-trip.s 
b/llvm/test/MC/AsmParser/round-trip.s
new file mode 100644
index ..4e5fb3961746
--- /dev/null
+++ b/llvm/test/MC/AsmParser/round-trip.s
@@ -0,0 +1,15 @@
+# RUN: llvm-mc -preserve-comments -triple i386-unknown-unknown %s >%t-1.s
+# RUN: llvm-mc -preserve-comments -triple i386-unknown-unknown %t-1.s >%t-2.s
+# RUN: 
diff  %t-1.s %t-2.s
+
+# Test that various assembly round-trips when run through MC; the first
+# transition from hand-written to "canonical" output may introduce some small
+# 
diff erences, so we don't include the initial input in the comparison.
+
+.text
+
+# Some of these CFI instructions didn't consume the end of statement
+# consistently, which led to extra empty lines in the output.
+.cfi_sections .debug_frame
+.cfi_startproc
+.cfi_endproc

diff  --git a/llvm/test/MC/ELF/cfi.s b/llvm/test/MC/ELF/cfi.s
index 8f26eaddbbfb..d1d9029bf493 100644
--- a/llvm/test/MC/ELF/cfi.s
+++ b/llvm/test/MC/ELF/cfi.s
@@ -1,4 +1,5 @@
 // RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | 
llvm-readobj -S --sr --sd - | FileCheck %s
+// RUN: not llvm-mc -triple=x86_64 -o - -defsym=ERR=1 %s 2>&1 | FileCheck %s 
--check-prefix=ERR
 
 f1:
 .cfi_startproc
@@ -435,3 +436,20 @@ f37:
 // CHECK-NEXT:   0x6E4 R_X86_64_PC32 .text 0x21
 // CHECK-NEXT: ]
 // CHECK:}
+
+.ifdef ERR
+// ERR: [[#@LINE+1]]:15: error: Expected an identifier
+.cfi_sections $
+// ERR: [[#@LINE+1]]:28: error: unexpected token in '.cfi_sections' directive
+.cfi_sections .debug_frame $
+// ERR: [[#@LINE+1]]:39: error: unexpected token in '.cfi_sections' directive
+.cfi_sections .debug_frame, .eh_frame $
+
+// ERR: [[#@LINE+1]]:16: error: unexpected token in '.cfi_startproc' directive
+.cfi_startproc $
+// ERR: [[#@LINE+1]]:23: error: unexpected token in '.cfi_startproc' directive
+.cfi_startproc simple $
+
+// ERR: [[#@LINE+1]]:14: error: unexpected token in '.cfi_endproc' directive
+.cfi_endproc $
+.endif



___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] f5f4b8b - [AMDGPU][MC] Restore old error position for "too few operands"

2020-12-09 Thread Scott Linder via llvm-branch-commits 

Author: Scott Linder
Date: 2020-12-09T21:09:47Z
New Revision: f5f4b8b60fc0931440c4f2549fbff0965c868d2c

URL: 
https://github.com/llvm/llvm-project/commit/f5f4b8b60fc0931440c4f2549fbff0965c868d2c
DIFF: 
https://github.com/llvm/llvm-project/commit/f5f4b8b60fc0931440c4f2549fbff0965c868d2c.diff

LOG: [AMDGPU][MC] Restore old error position for "too few operands"

Revert part of https://reviews.llvm.org/D92084 to make it simpler to
start consuming the EndOfStatement token within AMDGPU's
ParseInstruction in a future patch. This also brings us back to what
every other target currently does.

A future change to move the position back to the end of the statement
would likely need to audit all of the AMDGPUOperand SMLoc ranges, and
determine the SMLoc for the last character of the last operand.

Reviewed By: dp

Differential Revision: https://reviews.llvm.org/D92960

Added: 


Modified: 
llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
llvm/test/MC/AMDGPU/exp-err.s
llvm/test/MC/AMDGPU/gfx10_err_pos.s

Removed: 




diff  --git a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp 
b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
index 56d97588df6e..8bf6566d40dd 100644
--- a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+++ b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
@@ -4040,7 +4040,7 @@ bool AMDGPUAsmParser::MatchAndEmitInstruction(SMLoc 
IDLoc, unsigned &Opcode,
 SMLoc ErrorLoc = IDLoc;
 if (ErrorInfo != ~0ULL) {
   if (ErrorInfo >= Operands.size()) {
-return Error(getLoc(), "too few operands for instruction");
+return Error(IDLoc, "too few operands for instruction");
   }
   ErrorLoc = ((AMDGPUOperand &)*Operands[ErrorInfo]).getStartLoc();
   if (ErrorLoc == SMLoc())

diff  --git a/llvm/test/MC/AMDGPU/exp-err.s b/llvm/test/MC/AMDGPU/exp-err.s
index b650a78627db..ee83bef0c50b 100644
--- a/llvm/test/MC/AMDGPU/exp-err.s
+++ b/llvm/test/MC/AMDGPU/exp-err.s
@@ -53,7 +53,7 @@ exp , v3, v2, v1, v0
 // GCN: :5: error: unknown token in expression
 
 exp
-// GCN: :4: error: too few operands for instruction
+// GCN: :1: error: too few operands for instruction
 
 exp mrt0 s0, v0, v0, v0
 // GCN: 10: error: invalid operand for instruction

diff  --git a/llvm/test/MC/AMDGPU/gfx10_err_pos.s 
b/llvm/test/MC/AMDGPU/gfx10_err_pos.s
index 8d0c3694b285..1d4e52d6c64a 100644
--- a/llvm/test/MC/AMDGPU/gfx10_err_pos.s
+++ b/llvm/test/MC/AMDGPU/gfx10_err_pos.s
@@ -992,12 +992,12 @@ s_getreg_b32 s2, hwreg(HW_REG_SHADER_CYCLES)
 tbuffer_store_format_xyzw v[1:4], off, ttmp[4:7]
 // CHECK: error: too few operands for instruction
 // CHECK-NEXT:{{^}}tbuffer_store_format_xyzw v[1:4], off, ttmp[4:7]
-// CHECK-NEXT:{{^}}^
+// CHECK-NEXT:{{^}}^
 
 v_add_f32_e64 v0, v1
 // CHECK: error: too few operands for instruction
 // CHECK-NEXT:{{^}}v_add_f32_e64 v0, v1
-// CHECK-NEXT:{{^}}^
+// CHECK-NEXT:{{^}}^
 
 
//==
 // too large value for expcnt



___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] 9260a99 - [MC][AMDGPU] Consume EndOfStatement in asm parser

2020-12-09 Thread Scott Linder via llvm-branch-commits 

Author: Scott Linder
Date: 2020-12-09T21:45:55Z
New Revision: 9260a90cd8ee877e1cb9b517166579eca4f3

URL: 
https://github.com/llvm/llvm-project/commit/9260a90cd8ee877e1cb9b517166579eca4f3
DIFF: 
https://github.com/llvm/llvm-project/commit/9260a90cd8ee877e1cb9b517166579eca4f3.diff

LOG: [MC][AMDGPU] Consume EndOfStatement in asm parser

Avoids spurious newlines showing up in the output when emitting assembly
via MC.

Reviewed By: MaskRay, arsenm

Differential Revision: https://reviews.llvm.org/D92690

Added: 
llvm/test/MC/AMDGPU/round-trip.s

Modified: 
llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp

Removed: 




diff  --git a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp 
b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
index 8bf6566d40dd..22c32400ecbf 100644
--- a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+++ b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
@@ -5020,9 +5020,11 @@ bool 
AMDGPUAsmParser::ParseInstruction(ParseInstructionInfo &Info,
   while (!getLexer().is(AsmToken::EndOfStatement)) {
 Parser.Lex();
   }
+  Parser.Lex();
   return true;
 }
   }
+  Parser.Lex();
 
   return false;
 }

diff  --git a/llvm/test/MC/AMDGPU/round-trip.s 
b/llvm/test/MC/AMDGPU/round-trip.s
new file mode 100644
index ..eb355ea544e0
--- /dev/null
+++ b/llvm/test/MC/AMDGPU/round-trip.s
@@ -0,0 +1,13 @@
+# RUN: llvm-mc -preserve-comments -triple amdgcn-amd-amdhsa %s >%t-1.s
+# RUN: llvm-mc -preserve-comments -triple amdgcn-amd-amdhsa %t-1.s >%t-2.s
+# RUN: 
diff  %t-1.s %t-2.s
+
+# Test that AMDGPU assembly round-trips when run through MC; the first
+# transition from hand-written to "canonical" output may introduce some small
+# 
diff erences, so we don't include the initial input in the comparison.
+
+.text
+
+# The AMDGPU asm parser didn't consume the end of statement
+# consistently, which led to extra empty lines in the output.
+s_nop 0



___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] 19c56e1 - [MC] Fix ICE with non-newline terminated input

2020-12-09 Thread Scott Linder via llvm-branch-commits 

Author: Scott Linder
Date: 2020-12-09T23:39:32Z
New Revision: 19c56e11fa489cfc461b9ea10faa68e5a1f3eca1

URL: 
https://github.com/llvm/llvm-project/commit/19c56e11fa489cfc461b9ea10faa68e5a1f3eca1
DIFF: 
https://github.com/llvm/llvm-project/commit/19c56e11fa489cfc461b9ea10faa68e5a1f3eca1.diff

LOG: [MC] Fix ICE with non-newline terminated input

There is an explicit option for the lexer to support this, but we crash
when `-preserve-comments` is enabled because it checks for
`getTok().getString().empty()` to detect the case. This doesn't
work currently because the lexer reports this case as a string of length
1, containing a null byte.

Change the lexer to instead report this case via an empty string, as the
null terminator isn't logically a part of the textual input, and the
check for `.empty()` seems natural and obvious in the calling code.

Reviewed By: niravd

Differential Revision: https://reviews.llvm.org/D92681

Added: 
llvm/test/MC/AsmParser/Inputs/no-newline-at-end-of-file.s

Modified: 
llvm/lib/MC/MCParser/AsmLexer.cpp
llvm/test/MC/AsmParser/preserve-comments.s

Removed: 




diff  --git a/llvm/lib/MC/MCParser/AsmLexer.cpp 
b/llvm/lib/MC/MCParser/AsmLexer.cpp
index 5c9d1264aaa0..1fa22ab000f0 100644
--- a/llvm/lib/MC/MCParser/AsmLexer.cpp
+++ b/llvm/lib/MC/MCParser/AsmLexer.cpp
@@ -715,7 +715,7 @@ AsmToken AsmLexer::LexToken() {
   if (CurChar == EOF && !IsAtStartOfStatement && EndStatementAtEOF) {
 IsAtStartOfLine = true;
 IsAtStartOfStatement = true;
-return AsmToken(AsmToken::EndOfStatement, StringRef(TokStart, 1));
+return AsmToken(AsmToken::EndOfStatement, StringRef(TokStart, 0));
   }
   IsAtStartOfLine = false;
   bool OldIsAtStartOfStatement = IsAtStartOfStatement;

diff  --git a/llvm/test/MC/AsmParser/Inputs/no-newline-at-end-of-file.s 
b/llvm/test/MC/AsmParser/Inputs/no-newline-at-end-of-file.s
new file mode 100644
index ..a746462708c4
--- /dev/null
+++ b/llvm/test/MC/AsmParser/Inputs/no-newline-at-end-of-file.s
@@ -0,0 +1 @@
+.text
\ No newline at end of file

diff  --git a/llvm/test/MC/AsmParser/preserve-comments.s 
b/llvm/test/MC/AsmParser/preserve-comments.s
index 27c5b2e07071..9cace041fb41 100644
--- a/llvm/test/MC/AsmParser/preserve-comments.s
+++ b/llvm/test/MC/AsmParser/preserve-comments.s
@@ -1,5 +1,6 @@
#RUN: llvm-mc -preserve-comments -n -triple i386-linux-gnu < %s > %t
#RUN: 
diff  -b %s %t
+   #RUN: llvm-mc -preserve-comments -n -triple i386-linux-gnu < 
%p/Inputs/no-newline-at-end-of-file.s | FileCheck %s
.text
 
 foo:   #Comment here
@@ -11,3 +12,6 @@ foo:  #Comment here
#endif
.ident  "clang version 3.9.0"
.section".note.GNU-stack","",@progbits
+
+   #Confirm we don't crash on inputs without a terminating newline.
+   #CHECK: .text



___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] 10b5eae - [SmallVector] Copy new docs into Doxygen comment

2020-12-10 Thread Scott Linder via llvm-branch-commits 

Author: Scott Linder
Date: 2020-12-10T22:20:37Z
New Revision: 10b5eaed917d6f91aa2d416c08c93697bd1d446f

URL: 
https://github.com/llvm/llvm-project/commit/10b5eaed917d6f91aa2d416c08c93697bd1d446f
DIFF: 
https://github.com/llvm/llvm-project/commit/10b5eaed917d6f91aa2d416c08c93697bd1d446f.diff

LOG: [SmallVector] Copy new docs into Doxygen comment

Copy the `ProgrammersManual.rst` changes from D92522 to the Doxygen
comment for `SmallVector`, to hopefully encourage new uses migrating to
the no-explicit-`N` form.

Differential Revision: https://reviews.llvm.org/D93069

Added: 


Modified: 
llvm/include/llvm/ADT/SmallVector.h

Removed: 




diff  --git a/llvm/include/llvm/ADT/SmallVector.h 
b/llvm/include/llvm/ADT/SmallVector.h
index 1b2787b88932..10b9d4e9c0f1 100644
--- a/llvm/include/llvm/ADT/SmallVector.h
+++ b/llvm/include/llvm/ADT/SmallVector.h
@@ -1012,7 +1012,14 @@ template  struct 
CalculateSmallVectorDefaultInlinedElements {
 /// elements is below that threshold.  This allows normal "small" cases to be
 /// fast without losing generality for large inputs.
 ///
-/// Note that this does not attempt to be exception safe.
+/// \note
+/// In the absence of a well-motivated choice for the number of inlined
+/// elements \p N, it is recommended to use \c SmallVector (that is,
+/// omitting the \p N). This will choose a default number of inlined elements
+/// reasonable for allocation on the stack (for example, trying to keep \c
+/// sizeof(SmallVector) around 64 bytes).
+///
+/// \warning This does not attempt to be exception safe.
 ///
 template ::value>



___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] 32910f7 - [SmallVector][NFC] Link to ProgrammersManual from SmallVector docs

2020-12-11 Thread Scott Linder via llvm-branch-commits 

Author: Scott Linder
Date: 2020-12-11T19:34:10Z
New Revision: 32910f780df4f5add290f176459648f2326674f5

URL: 
https://github.com/llvm/llvm-project/commit/32910f780df4f5add290f176459648f2326674f5
DIFF: 
https://github.com/llvm/llvm-project/commit/32910f780df4f5add290f176459648f2326674f5.diff

LOG: [SmallVector][NFC] Link to ProgrammersManual from SmallVector docs

Add a "see also" link from the condensed doxygen description of
`SmallVector` to the more complete description in the ProgrammersManual.

Added: 


Modified: 
llvm/include/llvm/ADT/SmallVector.h

Removed: 




diff  --git a/llvm/include/llvm/ADT/SmallVector.h 
b/llvm/include/llvm/ADT/SmallVector.h
index 10b9d4e9c0f1..0a0f09c68060 100644
--- a/llvm/include/llvm/ADT/SmallVector.h
+++ b/llvm/include/llvm/ADT/SmallVector.h
@@ -1021,6 +1021,7 @@ template  struct 
CalculateSmallVectorDefaultInlinedElements {
 ///
 /// \warning This does not attempt to be exception safe.
 ///
+/// \see https://llvm.org/docs/ProgrammersManual.html#llvm-adt-smallvector-h
 template ::value>
 class LLVM_GSL_OWNER SmallVector : public SmallVectorImpl,



___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU] Remove dead function metadata after amdgpu-lower-kernel-arguments (PR #126147)

2025-02-07 Thread Scott Linder via llvm-branch-commits 


@@ -1,7 +1,7 @@
-; RUN: not --crash opt -mtriple=amdgcn-amd-amdhsa -mcpu=gfx940 
-passes='amdgpu-attributor,function(amdgpu-lower-kernel-arguments)' 
-amdgpu-kernarg-preload-count=16 -S < %s 2>&1 | FileCheck %s
+; RUN: opt -mtriple=amdgcn-amd-amdhsa -mcpu=gfx940 
-passes='amdgpu-attributor,function(amdgpu-lower-kernel-arguments)' 
-amdgpu-kernarg-preload-count=16 -S < %s 2>&1 | FileCheck %s
 
-; CHECK: function declaration may only have a unique !dbg attachment
-; CHECK-NEXT: ptr @0
+; CHECK: define amdgpu_kernel void @preload_block_count_x{{.*}} !dbg ![[#]]
+; CHECK-NOT: declare void @0{{.*}} !dbg ![[#]]

slinder1 wrote:

Scratch this, I will likely just abandon this in favor of 
https://github.com/llvm/llvm-project/pull/123547 which removes the declare 
altogether

https://github.com/llvm/llvm-project/pull/126147
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU] Remove dead function metadata after amdgpu-lower-kernel-arguments (PR #126147)

2025-02-07 Thread Scott Linder via llvm-branch-commits 


@@ -1,7 +1,7 @@
-; RUN: not --crash opt -mtriple=amdgcn-amd-amdhsa -mcpu=gfx940 
-passes='amdgpu-attributor,function(amdgpu-lower-kernel-arguments)' 
-amdgpu-kernarg-preload-count=16 -S < %s 2>&1 | FileCheck %s
+; RUN: opt -mtriple=amdgcn-amd-amdhsa -mcpu=gfx940 
-passes='amdgpu-attributor,function(amdgpu-lower-kernel-arguments)' 
-amdgpu-kernarg-preload-count=16 -S < %s 2>&1 | FileCheck %s
 
-; CHECK: function declaration may only have a unique !dbg attachment
-; CHECK-NEXT: ptr @0
+; CHECK: define amdgpu_kernel void @preload_block_count_x{{.*}} !dbg ![[#]]
+; CHECK-NOT: declare void @0{{.*}} !dbg ![[#]]

slinder1 wrote:

Do you happen to know of how to get generated checks to include an unreferenced 
declare? I suppose in general some extra declares are benign, but in this case 
it is the primary thing being tested.

I've tried `update_test_checks.py --check-globals all 
--include-generated-funcs` but no luck

https://github.com/llvm/llvm-project/pull/126147
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU] Push amdgpu-preload-kern-arg-prolog after livedebugvalues (PR #126148)

2025-02-06 Thread Scott Linder via llvm-branch-commits 

https://github.com/slinder1 updated 
https://github.com/llvm/llvm-project/pull/126148

>From 87d26ba446362f1f50dea05339f5a46c08312f7a Mon Sep 17 00:00:00 2001
From: Scott Linder 
Date: Thu, 6 Feb 2025 00:01:07 +
Subject: [PATCH] [AMDGPU] Push amdgpu-preload-kern-arg-prolog after
 livedebugvalues

This is effectively a workaround for a bug in livedebugvalues, but seems
to potentially be a general improvement, as BB sections seems like it
could ruin the special 256-byte prelude scheme that
amdgpu-preload-kern-arg-prolog requires anyway. Moving it even later
doesn't seem to have any material impact, and just adds livedebugvalues
to the list of things which no longer have to deal with pseudo
multiple-entry functions.

AMDGPU debug-info isn't supported upstream yet, so the bug being avoided
isn't testable here. I am posting the patch upstream to avoid an
unnecessary diff with AMD's fork.
---
 llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp |  6 ++
 llvm/test/CodeGen/AMDGPU/llc-pipeline.ll   | 10 +-
 2 files changed, 11 insertions(+), 5 deletions(-)

diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp 
b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
index fffd30b26dc1d50..67b155e4e740011 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
@@ -1147,6 +1147,7 @@ class GCNPassConfig final : public AMDGPUPassConfig {
   void addPostRegAlloc() override;
   void addPreSched2() override;
   void addPreEmitPass() override;
+  void addPostBBSections() override;
 };
 
 } // end anonymous namespace
@@ -1686,6 +1687,11 @@ void GCNPassConfig::addPreEmitPass() {
 addPass(&AMDGPUInsertDelayAluID);
 
   addPass(&BranchRelaxationPassID);
+}
+
+void GCNPassConfig::addPostBBSections() {
+  // We run this later to avoid passes like livedebugvalues and BBSections
+  // having to deal with the apparent multi-entry functions we may generate.
   addPass(createAMDGPUPreloadKernArgPrologLegacyPass());
 }
 
diff --git a/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll 
b/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
index 893b9fa6fb40d07..d7f54f3b8e9e26d 100644
--- a/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
+++ b/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
@@ -145,11 +145,11 @@
 ; GCN-O0-NEXT:Post RA hazard recognizer
 ; GCN-O0-NEXT:AMDGPU Insert waits for SGPR read hazards
 ; GCN-O0-NEXT:Branch relaxation pass
-; GCN-O0-NEXT:AMDGPU Preload Kernel Arguments Prolog
 ; GCN-O0-NEXT:Register Usage Information Collector Pass
 ; GCN-O0-NEXT:Remove Loads Into Fake Uses
 ; GCN-O0-NEXT:Live DEBUG_VALUE analysis
 ; GCN-O0-NEXT:Machine Sanitizer Binary Metadata
+; GCN-O0-NEXT:AMDGPU Preload Kernel Arguments Prolog
 ; GCN-O0-NEXT:Lazy Machine Block Frequency Analysis
 ; GCN-O0-NEXT:Machine Optimization Remark Emitter
 ; GCN-O0-NEXT:Stack Frame Layout Analysis
@@ -430,11 +430,11 @@
 ; GCN-O1-NEXT:AMDGPU Insert waits for SGPR read hazards
 ; GCN-O1-NEXT:AMDGPU Insert Delay ALU
 ; GCN-O1-NEXT:Branch relaxation pass
-; GCN-O1-NEXT:AMDGPU Preload Kernel Arguments Prolog
 ; GCN-O1-NEXT:Register Usage Information Collector Pass
 ; GCN-O1-NEXT:Remove Loads Into Fake Uses
 ; GCN-O1-NEXT:Live DEBUG_VALUE analysis
 ; GCN-O1-NEXT:Machine Sanitizer Binary Metadata
+; GCN-O1-NEXT:AMDGPU Preload Kernel Arguments Prolog
 ; GCN-O1-NEXT:Lazy Machine Block Frequency Analysis
 ; GCN-O1-NEXT:Machine Optimization Remark Emitter
 ; GCN-O1-NEXT:Stack Frame Layout Analysis
@@ -743,11 +743,11 @@
 ; GCN-O1-OPTS-NEXT:AMDGPU Insert waits for SGPR read hazards
 ; GCN-O1-OPTS-NEXT:AMDGPU Insert Delay ALU
 ; GCN-O1-OPTS-NEXT:Branch relaxation pass
-; GCN-O1-OPTS-NEXT:AMDGPU Preload Kernel Arguments Prolog
 ; GCN-O1-OPTS-NEXT:Register Usage Information Collector Pass
 ; GCN-O1-OPTS-NEXT:Remove Loads Into Fake Uses
 ; GCN-O1-OPTS-NEXT:Live DEBUG_VALUE analysis
 ; GCN-O1-OPTS-NEXT:Machine Sanitizer Binary Metadata
+; GCN-O1-OPTS-NEXT:AMDGPU Preload Kernel Arguments Prolog
 ; GCN-O1-OPTS-NEXT:Lazy Machine Block Frequency Analysis
 ; GCN-O1-OPTS-NEXT:Machine Optimization Remark Emitter
 ; GCN-O1-OPTS-NEXT:Stack Frame Layout Analysis
@@ -1062,11 +1062,11 @@
 ; GCN-O2-NEXT:AMDGPU Insert waits for SGPR read hazards
 ; GCN-O2-NEXT:AMDGPU Insert Delay ALU
 ; GCN-O2-NEXT:Branch relaxation pass
-; GCN-O2-NEXT:AMDGPU Preload Kernel Arguments Prolog
 ; GCN-O2-NEXT:Register Usage Information Collector Pass
 ; GCN-O2-NEXT:Remove Loads Into Fake Uses
 ; GCN-O2-NEXT:Live DEBUG_VALUE analysis
 ; GCN-O2-NEXT:Machine Sanitizer Binary Metadata
+; GCN-O2-NEXT:AMDGPU Preload Kernel Arguments Prolog
 ; GCN-O2-NEXT:Lazy Machine Block Frequency Analysis
 ; GCN-O2-NEXT:

[llvm-branch-commits] [llvm] [AMDGPU] Push amdgpu-preload-kern-arg-prolog after livedebugvalues (PR #126148)

2025-02-06 Thread Scott Linder via llvm-branch-commits 

https://github.com/slinder1 ready_for_review 
https://github.com/llvm/llvm-project/pull/126148
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU] Remove dead function metadata after amdgpu-lower-kernel-arguments (PR #126147)

2025-02-06 Thread Scott Linder via llvm-branch-commits 

https://github.com/slinder1 ready_for_review 
https://github.com/llvm/llvm-project/pull/126147
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU] Push amdgpu-preload-kern-arg-prolog after livedebugvalues (PR #126148)

2025-02-06 Thread Scott Linder via llvm-branch-commits 

https://github.com/slinder1 created 
https://github.com/llvm/llvm-project/pull/126148

This is effectively a workaround for a bug in livedebugvalues, but seems
to potentially be a general improvement, as BB sections seems like it
could ruin the special 256-byte prelude scheme that
amdgpu-preload-kern-arg-prolog requires anyway. Moving it even later
doesn't seem to have any material impact, and just adds livedebugvalues
to the list of things which no longer have to deal with pseudo
multiple-entry functions.

AMDGPU debug-info isn't supported upstream yet, so the bug being avoided
isn't testable here. I am posting the patch upstream to avoid an
unnecessary diff with AMD's fork.

>From bcb8f4adb9af074b91bc85a726883a2e114d33d4 Mon Sep 17 00:00:00 2001
From: Scott Linder 
Date: Thu, 6 Feb 2025 00:01:07 +
Subject: [PATCH] [AMDGPU] Push amdgpu-preload-kern-arg-prolog after
 livedebugvalues

This is effectively a workaround for a bug in livedebugvalues, but seems
to potentially be a general improvement, as BB sections seems like it
could ruin the special 256-byte prelude scheme that
amdgpu-preload-kern-arg-prolog requires anyway. Moving it even later
doesn't seem to have any material impact, and just adds livedebugvalues
to the list of things which no longer have to deal with pseudo
multiple-entry functions.

AMDGPU debug-info isn't supported upstream yet, so the bug being avoided
isn't testable here. I am posting the patch upstream to avoid an
unnecessary diff with AMD's fork.
---
 llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp 
b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
index fffd30b26dc1d50..67b155e4e740011 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
@@ -1147,6 +1147,7 @@ class GCNPassConfig final : public AMDGPUPassConfig {
   void addPostRegAlloc() override;
   void addPreSched2() override;
   void addPreEmitPass() override;
+  void addPostBBSections() override;
 };
 
 } // end anonymous namespace
@@ -1686,6 +1687,11 @@ void GCNPassConfig::addPreEmitPass() {
 addPass(&AMDGPUInsertDelayAluID);
 
   addPass(&BranchRelaxationPassID);
+}
+
+void GCNPassConfig::addPostBBSections() {
+  // We run this later to avoid passes like livedebugvalues and BBSections
+  // having to deal with the apparent multi-entry functions we may generate.
   addPass(createAMDGPUPreloadKernArgPrologLegacyPass());
 }
 

___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU] Remove dead function metadata after amdgpu-lower-kernel-arguments (PR #126147)

2025-02-06 Thread Scott Linder via llvm-branch-commits 

slinder1 wrote:

> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is 
> open. Once all requirements are satisfied, merge this PR as a stack  href="https://app.graphite.dev/github/pr/llvm/llvm-project/126147?utm_source=stack-comment-downstack-mergeability-warning";
>  >on Graphite.
> https://graphite.dev/docs/merge-pull-requests";>Learn more

* **#126148** https://app.graphite.dev/github/pr/llvm/llvm-project/126148?utm_source=stack-comment-icon";
 target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" 
width="10px" height="10px"/>
* **#126147** https://app.graphite.dev/github/pr/llvm/llvm-project/126147?utm_source=stack-comment-icon";
 target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" 
width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/126147?utm_source=stack-comment-view-in-graphite";
 target="_blank">(View in Graphite)
* **#126146** https://app.graphite.dev/github/pr/llvm/llvm-project/126146?utm_source=stack-comment-icon";
 target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" 
width="10px" height="10px"/>
* `main`




This stack of pull requests is managed by https://graphite.dev?utm-source=stack-comment";>Graphite. Learn 
more about https://stacking.dev/?utm_source=stack-comment";>stacking.


https://github.com/llvm/llvm-project/pull/126147
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU] Push amdgpu-preload-kern-arg-prolog after livedebugvalues (PR #126148)

2025-02-06 Thread Scott Linder via llvm-branch-commits 

slinder1 wrote:

> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is 
> open. Once all requirements are satisfied, merge this PR as a stack  href="https://app.graphite.dev/github/pr/llvm/llvm-project/126148?utm_source=stack-comment-downstack-mergeability-warning";
>  >on Graphite.
> https://graphite.dev/docs/merge-pull-requests";>Learn more

* **#126148** https://app.graphite.dev/github/pr/llvm/llvm-project/126148?utm_source=stack-comment-icon";
 target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" 
width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/126148?utm_source=stack-comment-view-in-graphite";
 target="_blank">(View in Graphite)
* **#126147** https://app.graphite.dev/github/pr/llvm/llvm-project/126147?utm_source=stack-comment-icon";
 target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" 
width="10px" height="10px"/>
* **#126146** https://app.graphite.dev/github/pr/llvm/llvm-project/126146?utm_source=stack-comment-icon";
 target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" 
width="10px" height="10px"/>
* `main`




This stack of pull requests is managed by https://graphite.dev?utm-source=stack-comment";>Graphite. Learn 
more about https://stacking.dev/?utm_source=stack-comment";>stacking.


https://github.com/llvm/llvm-project/pull/126148
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU] Remove dead function metadata after amdgpu-lower-kernel-arguments (PR #126147)

2025-02-06 Thread Scott Linder via llvm-branch-commits 

https://github.com/slinder1 created 
https://github.com/llvm/llvm-project/pull/126147

The verifier ensures function !dbg metadata is unique across the module,
so ensure the old nameless function we leave behind doesn't violate
this invariant.

Removing the function via e.g. eraseFromParent seems like a better
option, but doesn't seem to be legal from a FunctionPass.

>From bc50ff180b53b9b65cc14f2f873edffd733845e0 Mon Sep 17 00:00:00 2001
From: Scott Linder 
Date: Wed, 5 Feb 2025 22:56:55 +
Subject: [PATCH] [AMDGPU] Remove dead function metadata after
 amdgpu-lower-kernel-arguments

The verifier ensures function !dbg metadata is unique across the module,
so ensure the old nameless function we leave behind doesn't violate
this invariant.

Removing the function via e.g. eraseFromParent seems like a better
option, but doesn't seem to be legal from a FunctionPass.
---
 llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp   | 1 +
 .../CodeGen/AMDGPU/preload-implicit-kernargs-debug-info.ll  | 6 +++---
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp 
b/llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp
index e9d009baa20af29..09412d1b0f1cc96 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp
@@ -132,6 +132,7 @@ class PreloadKernelArgInfo {
 NF->setAttributes(AL);
 F.replaceAllUsesWith(NF);
 F.setCallingConv(CallingConv::C);
+F.clearMetadata();
 
 return NF;
   }
diff --git a/llvm/test/CodeGen/AMDGPU/preload-implicit-kernargs-debug-info.ll 
b/llvm/test/CodeGen/AMDGPU/preload-implicit-kernargs-debug-info.ll
index fe110cbcafc465d..4b47a218f1be45b 100644
--- a/llvm/test/CodeGen/AMDGPU/preload-implicit-kernargs-debug-info.ll
+++ b/llvm/test/CodeGen/AMDGPU/preload-implicit-kernargs-debug-info.ll
@@ -1,7 +1,7 @@
-; RUN: not --crash opt -mtriple=amdgcn-amd-amdhsa -mcpu=gfx940 
-passes='amdgpu-attributor,function(amdgpu-lower-kernel-arguments)' 
-amdgpu-kernarg-preload-count=16 -S < %s 2>&1 | FileCheck %s
+; RUN: opt -mtriple=amdgcn-amd-amdhsa -mcpu=gfx940 
-passes='amdgpu-attributor,function(amdgpu-lower-kernel-arguments)' 
-amdgpu-kernarg-preload-count=16 -S < %s 2>&1 | FileCheck %s
 
-; CHECK: function declaration may only have a unique !dbg attachment
-; CHECK-NEXT: ptr @0
+; CHECK: define amdgpu_kernel void @preload_block_count_x{{.*}} !dbg ![[#]]
+; CHECK-NOT: declare void @0{{.*}} !dbg ![[#]]
 
 define amdgpu_kernel void @preload_block_count_x(ptr addrspace(1) %out) !dbg 
!4 {
   %imp_arg_ptr = call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()

___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU] Remove dead function metadata after amdgpu-lower-kernel-arguments (PR #126147)

2025-02-07 Thread Scott Linder via llvm-branch-commits 


@@ -132,6 +132,7 @@ class PreloadKernelArgInfo {
 NF->setAttributes(AL);
 F.replaceAllUsesWith(NF);
 F.setCallingConv(CallingConv::C);
+F.clearMetadata();

slinder1 wrote:

I'm a bit lost, isn't any useful metadata already poached by the new function? 
Is the original function declaration still meaningful in any way? 

https://github.com/llvm/llvm-project/pull/126147
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU] Push amdgpu-preload-kern-arg-prolog after livedebugvalues (PR #126148)

2025-02-10 Thread Scott Linder via llvm-branch-commits 

https://github.com/slinder1 updated 
https://github.com/llvm/llvm-project/pull/126148

>From 5862e3249531359f66ae911fa42c7a69514a82ac Mon Sep 17 00:00:00 2001
From: Scott Linder 
Date: Thu, 6 Feb 2025 00:01:07 +
Subject: [PATCH] [AMDGPU] Push amdgpu-preload-kern-arg-prolog after
 livedebugvalues

This is effectively a workaround for a bug in livedebugvalues, but seems
to potentially be a general improvement, as BB sections seems like it
could ruin the special 256-byte prelude scheme that
amdgpu-preload-kern-arg-prolog requires anyway. Moving it even later
doesn't seem to have any material impact, and just adds livedebugvalues
to the list of things which no longer have to deal with pseudo
multiple-entry functions.

AMDGPU debug-info isn't supported upstream yet, so the bug being avoided
isn't testable here. I am posting the patch upstream to avoid an
unnecessary diff with AMD's fork.
---
 llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp |  6 ++
 llvm/test/CodeGen/AMDGPU/llc-pipeline.ll   | 10 +-
 2 files changed, 11 insertions(+), 5 deletions(-)

diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp 
b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
index fffd30b26dc1d50..67b155e4e740011 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
@@ -1147,6 +1147,7 @@ class GCNPassConfig final : public AMDGPUPassConfig {
   void addPostRegAlloc() override;
   void addPreSched2() override;
   void addPreEmitPass() override;
+  void addPostBBSections() override;
 };
 
 } // end anonymous namespace
@@ -1686,6 +1687,11 @@ void GCNPassConfig::addPreEmitPass() {
 addPass(&AMDGPUInsertDelayAluID);
 
   addPass(&BranchRelaxationPassID);
+}
+
+void GCNPassConfig::addPostBBSections() {
+  // We run this later to avoid passes like livedebugvalues and BBSections
+  // having to deal with the apparent multi-entry functions we may generate.
   addPass(createAMDGPUPreloadKernArgPrologLegacyPass());
 }
 
diff --git a/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll 
b/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
index 893b9fa6fb40d07..d7f54f3b8e9e26d 100644
--- a/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
+++ b/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
@@ -145,11 +145,11 @@
 ; GCN-O0-NEXT:Post RA hazard recognizer
 ; GCN-O0-NEXT:AMDGPU Insert waits for SGPR read hazards
 ; GCN-O0-NEXT:Branch relaxation pass
-; GCN-O0-NEXT:AMDGPU Preload Kernel Arguments Prolog
 ; GCN-O0-NEXT:Register Usage Information Collector Pass
 ; GCN-O0-NEXT:Remove Loads Into Fake Uses
 ; GCN-O0-NEXT:Live DEBUG_VALUE analysis
 ; GCN-O0-NEXT:Machine Sanitizer Binary Metadata
+; GCN-O0-NEXT:AMDGPU Preload Kernel Arguments Prolog
 ; GCN-O0-NEXT:Lazy Machine Block Frequency Analysis
 ; GCN-O0-NEXT:Machine Optimization Remark Emitter
 ; GCN-O0-NEXT:Stack Frame Layout Analysis
@@ -430,11 +430,11 @@
 ; GCN-O1-NEXT:AMDGPU Insert waits for SGPR read hazards
 ; GCN-O1-NEXT:AMDGPU Insert Delay ALU
 ; GCN-O1-NEXT:Branch relaxation pass
-; GCN-O1-NEXT:AMDGPU Preload Kernel Arguments Prolog
 ; GCN-O1-NEXT:Register Usage Information Collector Pass
 ; GCN-O1-NEXT:Remove Loads Into Fake Uses
 ; GCN-O1-NEXT:Live DEBUG_VALUE analysis
 ; GCN-O1-NEXT:Machine Sanitizer Binary Metadata
+; GCN-O1-NEXT:AMDGPU Preload Kernel Arguments Prolog
 ; GCN-O1-NEXT:Lazy Machine Block Frequency Analysis
 ; GCN-O1-NEXT:Machine Optimization Remark Emitter
 ; GCN-O1-NEXT:Stack Frame Layout Analysis
@@ -743,11 +743,11 @@
 ; GCN-O1-OPTS-NEXT:AMDGPU Insert waits for SGPR read hazards
 ; GCN-O1-OPTS-NEXT:AMDGPU Insert Delay ALU
 ; GCN-O1-OPTS-NEXT:Branch relaxation pass
-; GCN-O1-OPTS-NEXT:AMDGPU Preload Kernel Arguments Prolog
 ; GCN-O1-OPTS-NEXT:Register Usage Information Collector Pass
 ; GCN-O1-OPTS-NEXT:Remove Loads Into Fake Uses
 ; GCN-O1-OPTS-NEXT:Live DEBUG_VALUE analysis
 ; GCN-O1-OPTS-NEXT:Machine Sanitizer Binary Metadata
+; GCN-O1-OPTS-NEXT:AMDGPU Preload Kernel Arguments Prolog
 ; GCN-O1-OPTS-NEXT:Lazy Machine Block Frequency Analysis
 ; GCN-O1-OPTS-NEXT:Machine Optimization Remark Emitter
 ; GCN-O1-OPTS-NEXT:Stack Frame Layout Analysis
@@ -1062,11 +1062,11 @@
 ; GCN-O2-NEXT:AMDGPU Insert waits for SGPR read hazards
 ; GCN-O2-NEXT:AMDGPU Insert Delay ALU
 ; GCN-O2-NEXT:Branch relaxation pass
-; GCN-O2-NEXT:AMDGPU Preload Kernel Arguments Prolog
 ; GCN-O2-NEXT:Register Usage Information Collector Pass
 ; GCN-O2-NEXT:Remove Loads Into Fake Uses
 ; GCN-O2-NEXT:Live DEBUG_VALUE analysis
 ; GCN-O2-NEXT:Machine Sanitizer Binary Metadata
+; GCN-O2-NEXT:AMDGPU Preload Kernel Arguments Prolog
 ; GCN-O2-NEXT:Lazy Machine Block Frequency Analysis
 ; GCN-O2-NEXT:

[llvm-branch-commits] [llvm] [AMDGPU] Remove dead function metadata after amdgpu-lower-kernel-arguments (PR #126147)

2025-02-10 Thread Scott Linder via llvm-branch-commits 

https://github.com/slinder1 updated 
https://github.com/llvm/llvm-project/pull/126147

>From de86a2987ca66eafe5767e149ebc561c0c70158d Mon Sep 17 00:00:00 2001
From: Scott Linder 
Date: Wed, 5 Feb 2025 22:56:55 +
Subject: [PATCH 1/2] [AMDGPU] Remove dead function metadata after
 amdgpu-lower-kernel-arguments

The verifier ensures function !dbg metadata is unique across the module,
so ensure the old nameless function we leave behind doesn't violate
this invariant.

Removing the function via e.g. eraseFromParent seems like a better
option, but doesn't seem to be legal from a FunctionPass.
---
 llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp   | 1 +
 .../CodeGen/AMDGPU/preload-implicit-kernargs-debug-info.ll  | 6 +++---
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp 
b/llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp
index e9d009baa20af29..09412d1b0f1cc96 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp
@@ -132,6 +132,7 @@ class PreloadKernelArgInfo {
 NF->setAttributes(AL);
 F.replaceAllUsesWith(NF);
 F.setCallingConv(CallingConv::C);
+F.clearMetadata();
 
 return NF;
   }
diff --git a/llvm/test/CodeGen/AMDGPU/preload-implicit-kernargs-debug-info.ll 
b/llvm/test/CodeGen/AMDGPU/preload-implicit-kernargs-debug-info.ll
index a6a0b88dce125eb..8b75c383ae76496 100644
--- a/llvm/test/CodeGen/AMDGPU/preload-implicit-kernargs-debug-info.ll
+++ b/llvm/test/CodeGen/AMDGPU/preload-implicit-kernargs-debug-info.ll
@@ -1,7 +1,7 @@
-; RUN: not --crash opt -mtriple=amdgcn-amd-amdhsa -mcpu=gfx940 
-passes='amdgpu-attributor,function(amdgpu-lower-kernel-arguments)' 
-amdgpu-kernarg-preload-count=16 -S < %s 2>&1 | FileCheck %s
+; RUN: opt -mtriple=amdgcn-amd-amdhsa -mcpu=gfx940 
-passes='amdgpu-attributor,function(amdgpu-lower-kernel-arguments)' 
-amdgpu-kernarg-preload-count=16 -S < %s 2>&1 | FileCheck %s
 
-; CHECK: function declaration may only have a unique !dbg attachment
-; CHECK-NEXT: ptr @0
+; CHECK: define amdgpu_kernel void @preload_block_count_x{{.*}} !dbg ![[#]]
+; CHECK-NOT: declare void @0{{.*}} !dbg ![[#]]
 
 define amdgpu_kernel void @preload_block_count_x(ptr addrspace(1) %out) !dbg 
!4 !max_work_group_size !7 {
   %imp_arg_ptr = call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()

>From 2fe5d5c4e140d989b4643610e3846d122098fdb9 Mon Sep 17 00:00:00 2001
From: Scott Linder 
Date: Mon, 10 Feb 2025 22:47:15 +
Subject: [PATCH 2/2] Replace fragile CHECK-NOT with -implicit-check-not

---
 .../CodeGen/AMDGPU/preload-implicit-kernargs-debug-info.ll | 7 +--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/llvm/test/CodeGen/AMDGPU/preload-implicit-kernargs-debug-info.ll 
b/llvm/test/CodeGen/AMDGPU/preload-implicit-kernargs-debug-info.ll
index 8b75c383ae76496..5727e2eaefa3896 100644
--- a/llvm/test/CodeGen/AMDGPU/preload-implicit-kernargs-debug-info.ll
+++ b/llvm/test/CodeGen/AMDGPU/preload-implicit-kernargs-debug-info.ll
@@ -1,7 +1,10 @@
-; RUN: opt -mtriple=amdgcn-amd-amdhsa -mcpu=gfx940 
-passes='amdgpu-attributor,function(amdgpu-lower-kernel-arguments)' 
-amdgpu-kernarg-preload-count=16 -S < %s 2>&1 | FileCheck %s
+; RUN: opt -mtriple=amdgcn-amd-amdhsa -mcpu=gfx940 
-passes='amdgpu-attributor,function(amdgpu-lower-kernel-arguments)' 
-amdgpu-kernarg-preload-count=16 -S < %s 2>&1 \
+; RUN: | FileCheck -implicit-check-not='declare {{.*}} !dbg' %s
+
+; The real test is via the -implicit-check-not, which confirms we do not
+; leave behind a declaration which references the same DISubprogram metadata.
 
 ; CHECK: define amdgpu_kernel void @preload_block_count_x{{.*}} !dbg ![[#]]
-; CHECK-NOT: declare void @0{{.*}} !dbg ![[#]]
 
 define amdgpu_kernel void @preload_block_count_x(ptr addrspace(1) %out) !dbg 
!4 !max_work_group_size !7 {
   %imp_arg_ptr = call ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()

___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU] Push amdgpu-preload-kern-arg-prolog after livedebugvalues (PR #126148)

2025-02-17 Thread Scott Linder via llvm-branch-commits 

https://github.com/slinder1 updated 
https://github.com/llvm/llvm-project/pull/126148

>From 075a702713d78b66b495a0903d069af0cd1bf97e Mon Sep 17 00:00:00 2001
From: Scott Linder 
Date: Thu, 6 Feb 2025 00:01:07 +
Subject: [PATCH] [AMDGPU] Push amdgpu-preload-kern-arg-prolog after
 livedebugvalues

This is effectively a workaround for a bug in livedebugvalues, but seems
to potentially be a general improvement, as BB sections seems like it
could ruin the special 256-byte prelude scheme that
amdgpu-preload-kern-arg-prolog requires anyway. Moving it even later
doesn't seem to have any material impact, and just adds livedebugvalues
to the list of things which no longer have to deal with pseudo
multiple-entry functions.

AMDGPU debug-info isn't supported upstream yet, so the bug being avoided
isn't testable here. I am posting the patch upstream to avoid an
unnecessary diff with AMD's fork.
---
 llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp |  6 ++
 llvm/test/CodeGen/AMDGPU/llc-pipeline.ll   | 10 +-
 2 files changed, 11 insertions(+), 5 deletions(-)

diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp 
b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
index eb488843b53e0..92ab106dd4a98 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
@@ -1151,6 +1151,7 @@ class GCNPassConfig final : public AMDGPUPassConfig {
   void addPostRegAlloc() override;
   void addPreSched2() override;
   void addPreEmitPass() override;
+  void addPostBBSections() override;
 };
 
 } // end anonymous namespace
@@ -1690,6 +1691,11 @@ void GCNPassConfig::addPreEmitPass() {
 addPass(&AMDGPUInsertDelayAluID);
 
   addPass(&BranchRelaxationPassID);
+}
+
+void GCNPassConfig::addPostBBSections() {
+  // We run this later to avoid passes like livedebugvalues and BBSections
+  // having to deal with the apparent multi-entry functions we may generate.
   addPass(createAMDGPUPreloadKernArgPrologLegacyPass());
 }
 
diff --git a/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll 
b/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
index 893b9fa6fb40d..d7f54f3b8e9e2 100644
--- a/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
+++ b/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
@@ -145,11 +145,11 @@
 ; GCN-O0-NEXT:Post RA hazard recognizer
 ; GCN-O0-NEXT:AMDGPU Insert waits for SGPR read hazards
 ; GCN-O0-NEXT:Branch relaxation pass
-; GCN-O0-NEXT:AMDGPU Preload Kernel Arguments Prolog
 ; GCN-O0-NEXT:Register Usage Information Collector Pass
 ; GCN-O0-NEXT:Remove Loads Into Fake Uses
 ; GCN-O0-NEXT:Live DEBUG_VALUE analysis
 ; GCN-O0-NEXT:Machine Sanitizer Binary Metadata
+; GCN-O0-NEXT:AMDGPU Preload Kernel Arguments Prolog
 ; GCN-O0-NEXT:Lazy Machine Block Frequency Analysis
 ; GCN-O0-NEXT:Machine Optimization Remark Emitter
 ; GCN-O0-NEXT:Stack Frame Layout Analysis
@@ -430,11 +430,11 @@
 ; GCN-O1-NEXT:AMDGPU Insert waits for SGPR read hazards
 ; GCN-O1-NEXT:AMDGPU Insert Delay ALU
 ; GCN-O1-NEXT:Branch relaxation pass
-; GCN-O1-NEXT:AMDGPU Preload Kernel Arguments Prolog
 ; GCN-O1-NEXT:Register Usage Information Collector Pass
 ; GCN-O1-NEXT:Remove Loads Into Fake Uses
 ; GCN-O1-NEXT:Live DEBUG_VALUE analysis
 ; GCN-O1-NEXT:Machine Sanitizer Binary Metadata
+; GCN-O1-NEXT:AMDGPU Preload Kernel Arguments Prolog
 ; GCN-O1-NEXT:Lazy Machine Block Frequency Analysis
 ; GCN-O1-NEXT:Machine Optimization Remark Emitter
 ; GCN-O1-NEXT:Stack Frame Layout Analysis
@@ -743,11 +743,11 @@
 ; GCN-O1-OPTS-NEXT:AMDGPU Insert waits for SGPR read hazards
 ; GCN-O1-OPTS-NEXT:AMDGPU Insert Delay ALU
 ; GCN-O1-OPTS-NEXT:Branch relaxation pass
-; GCN-O1-OPTS-NEXT:AMDGPU Preload Kernel Arguments Prolog
 ; GCN-O1-OPTS-NEXT:Register Usage Information Collector Pass
 ; GCN-O1-OPTS-NEXT:Remove Loads Into Fake Uses
 ; GCN-O1-OPTS-NEXT:Live DEBUG_VALUE analysis
 ; GCN-O1-OPTS-NEXT:Machine Sanitizer Binary Metadata
+; GCN-O1-OPTS-NEXT:AMDGPU Preload Kernel Arguments Prolog
 ; GCN-O1-OPTS-NEXT:Lazy Machine Block Frequency Analysis
 ; GCN-O1-OPTS-NEXT:Machine Optimization Remark Emitter
 ; GCN-O1-OPTS-NEXT:Stack Frame Layout Analysis
@@ -1062,11 +1062,11 @@
 ; GCN-O2-NEXT:AMDGPU Insert waits for SGPR read hazards
 ; GCN-O2-NEXT:AMDGPU Insert Delay ALU
 ; GCN-O2-NEXT:Branch relaxation pass
-; GCN-O2-NEXT:AMDGPU Preload Kernel Arguments Prolog
 ; GCN-O2-NEXT:Register Usage Information Collector Pass
 ; GCN-O2-NEXT:Remove Loads Into Fake Uses
 ; GCN-O2-NEXT:Live DEBUG_VALUE analysis
 ; GCN-O2-NEXT:Machine Sanitizer Binary Metadata
+; GCN-O2-NEXT:AMDGPU Preload Kernel Arguments Prolog
 ; GCN-O2-NEXT:Lazy Machine Block Frequency Analysis
 ; GCN-O2-NEXT:Ma

[llvm-branch-commits] [llvm] [AMDGPU] Push amdgpu-preload-kern-arg-prolog after livedebugvalues (PR #126148)

2025-02-17 Thread Scott Linder via llvm-branch-commits 

https://github.com/slinder1 updated 
https://github.com/llvm/llvm-project/pull/126148

>From 075a702713d78b66b495a0903d069af0cd1bf97e Mon Sep 17 00:00:00 2001
From: Scott Linder 
Date: Thu, 6 Feb 2025 00:01:07 +
Subject: [PATCH] [AMDGPU] Push amdgpu-preload-kern-arg-prolog after
 livedebugvalues

This is effectively a workaround for a bug in livedebugvalues, but seems
to potentially be a general improvement, as BB sections seems like it
could ruin the special 256-byte prelude scheme that
amdgpu-preload-kern-arg-prolog requires anyway. Moving it even later
doesn't seem to have any material impact, and just adds livedebugvalues
to the list of things which no longer have to deal with pseudo
multiple-entry functions.

AMDGPU debug-info isn't supported upstream yet, so the bug being avoided
isn't testable here. I am posting the patch upstream to avoid an
unnecessary diff with AMD's fork.
---
 llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp |  6 ++
 llvm/test/CodeGen/AMDGPU/llc-pipeline.ll   | 10 +-
 2 files changed, 11 insertions(+), 5 deletions(-)

diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp 
b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
index eb488843b53e0..92ab106dd4a98 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
@@ -1151,6 +1151,7 @@ class GCNPassConfig final : public AMDGPUPassConfig {
   void addPostRegAlloc() override;
   void addPreSched2() override;
   void addPreEmitPass() override;
+  void addPostBBSections() override;
 };
 
 } // end anonymous namespace
@@ -1690,6 +1691,11 @@ void GCNPassConfig::addPreEmitPass() {
 addPass(&AMDGPUInsertDelayAluID);
 
   addPass(&BranchRelaxationPassID);
+}
+
+void GCNPassConfig::addPostBBSections() {
+  // We run this later to avoid passes like livedebugvalues and BBSections
+  // having to deal with the apparent multi-entry functions we may generate.
   addPass(createAMDGPUPreloadKernArgPrologLegacyPass());
 }
 
diff --git a/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll 
b/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
index 893b9fa6fb40d..d7f54f3b8e9e2 100644
--- a/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
+++ b/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
@@ -145,11 +145,11 @@
 ; GCN-O0-NEXT:Post RA hazard recognizer
 ; GCN-O0-NEXT:AMDGPU Insert waits for SGPR read hazards
 ; GCN-O0-NEXT:Branch relaxation pass
-; GCN-O0-NEXT:AMDGPU Preload Kernel Arguments Prolog
 ; GCN-O0-NEXT:Register Usage Information Collector Pass
 ; GCN-O0-NEXT:Remove Loads Into Fake Uses
 ; GCN-O0-NEXT:Live DEBUG_VALUE analysis
 ; GCN-O0-NEXT:Machine Sanitizer Binary Metadata
+; GCN-O0-NEXT:AMDGPU Preload Kernel Arguments Prolog
 ; GCN-O0-NEXT:Lazy Machine Block Frequency Analysis
 ; GCN-O0-NEXT:Machine Optimization Remark Emitter
 ; GCN-O0-NEXT:Stack Frame Layout Analysis
@@ -430,11 +430,11 @@
 ; GCN-O1-NEXT:AMDGPU Insert waits for SGPR read hazards
 ; GCN-O1-NEXT:AMDGPU Insert Delay ALU
 ; GCN-O1-NEXT:Branch relaxation pass
-; GCN-O1-NEXT:AMDGPU Preload Kernel Arguments Prolog
 ; GCN-O1-NEXT:Register Usage Information Collector Pass
 ; GCN-O1-NEXT:Remove Loads Into Fake Uses
 ; GCN-O1-NEXT:Live DEBUG_VALUE analysis
 ; GCN-O1-NEXT:Machine Sanitizer Binary Metadata
+; GCN-O1-NEXT:AMDGPU Preload Kernel Arguments Prolog
 ; GCN-O1-NEXT:Lazy Machine Block Frequency Analysis
 ; GCN-O1-NEXT:Machine Optimization Remark Emitter
 ; GCN-O1-NEXT:Stack Frame Layout Analysis
@@ -743,11 +743,11 @@
 ; GCN-O1-OPTS-NEXT:AMDGPU Insert waits for SGPR read hazards
 ; GCN-O1-OPTS-NEXT:AMDGPU Insert Delay ALU
 ; GCN-O1-OPTS-NEXT:Branch relaxation pass
-; GCN-O1-OPTS-NEXT:AMDGPU Preload Kernel Arguments Prolog
 ; GCN-O1-OPTS-NEXT:Register Usage Information Collector Pass
 ; GCN-O1-OPTS-NEXT:Remove Loads Into Fake Uses
 ; GCN-O1-OPTS-NEXT:Live DEBUG_VALUE analysis
 ; GCN-O1-OPTS-NEXT:Machine Sanitizer Binary Metadata
+; GCN-O1-OPTS-NEXT:AMDGPU Preload Kernel Arguments Prolog
 ; GCN-O1-OPTS-NEXT:Lazy Machine Block Frequency Analysis
 ; GCN-O1-OPTS-NEXT:Machine Optimization Remark Emitter
 ; GCN-O1-OPTS-NEXT:Stack Frame Layout Analysis
@@ -1062,11 +1062,11 @@
 ; GCN-O2-NEXT:AMDGPU Insert waits for SGPR read hazards
 ; GCN-O2-NEXT:AMDGPU Insert Delay ALU
 ; GCN-O2-NEXT:Branch relaxation pass
-; GCN-O2-NEXT:AMDGPU Preload Kernel Arguments Prolog
 ; GCN-O2-NEXT:Register Usage Information Collector Pass
 ; GCN-O2-NEXT:Remove Loads Into Fake Uses
 ; GCN-O2-NEXT:Live DEBUG_VALUE analysis
 ; GCN-O2-NEXT:Machine Sanitizer Binary Metadata
+; GCN-O2-NEXT:AMDGPU Preload Kernel Arguments Prolog
 ; GCN-O2-NEXT:Lazy Machine Block Frequency Analysis
 ; GCN-O2-NEXT:Ma

[llvm-branch-commits] [llvm] [AMDGPU] Push amdgpu-preload-kern-arg-prolog after livedebugvalues (PR #126148)

2025-02-17 Thread Scott Linder via llvm-branch-commits 

slinder1 wrote:

### Merge activity

* **Feb 17, 1:26 PM EST**: A user started a stack merge that includes this pull 
request via 
[Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/126148).


https://github.com/llvm/llvm-project/pull/126148
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU] Push amdgpu-preload-kern-arg-prolog after livedebugvalues (PR #126148)

2025-02-13 Thread Scott Linder via llvm-branch-commits 

slinder1 wrote:

I do have an llvm-reduce'd test case for downstream, just waiting on things to 
flow down first. I can't actually add the test at all without a fix for the 
duplicated metadata so didn't seem worth posting the review yet

https://github.com/llvm/llvm-project/pull/126148
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits