[llvm-branch-commits] [NFC][asan] Switch to IntrusiveList in asan_globals (PR #101577)

2024-08-01 Thread Kirill Stoimenov via llvm-branch-commits 

https://github.com/kstoimenov approved this pull request.


https://github.com/llvm/llvm-project/pull/101577
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[llvm-branch-commits] [NFC][asan] Switch from list to DynInitGlobalsByModule (PR #101596)

2024-08-02 Thread Kirill Stoimenov via llvm-branch-commits 

https://github.com/kstoimenov approved this pull request.


https://github.com/llvm/llvm-project/pull/101596
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[llvm-branch-commits] [IR] Introduce `llvm.experimental.hot()` (PR #84850)

2024-03-11 Thread Kirill Stoimenov via llvm-branch-commits 

https://github.com/kstoimenov approved this pull request.


https://github.com/llvm/llvm-project/pull/84850
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[llvm-branch-commits] Rename `remove-traps` to `lower-builtin-hot` (PR #84853)

2024-03-11 Thread Kirill Stoimenov via llvm-branch-commits 

https://github.com/kstoimenov approved this pull request.


https://github.com/llvm/llvm-project/pull/84853
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[llvm-branch-commits] [clang][ubsan] Switch UBSAN optimization to `llvm.experimental.hot` (PR #84858)

2024-03-11 Thread Kirill Stoimenov via llvm-branch-commits 

https://github.com/kstoimenov approved this pull request.


https://github.com/llvm/llvm-project/pull/84858
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[llvm-branch-commits] [clang] [llvm] [InstCombiner] Remove unused `llvm.experimental.hot()` (PR #84851)

2024-04-29 Thread Kirill Stoimenov via llvm-branch-commits 

https://github.com/kstoimenov approved this pull request.


https://github.com/llvm/llvm-project/pull/84851
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[llvm-branch-commits] [llvm] [NFC][msan] Remove unused parameter from getOriginPtrForVAArgument (PR #72687)

2023-11-17 Thread Kirill Stoimenov via llvm-branch-commits 

https://github.com/kstoimenov approved this pull request.


https://github.com/llvm/llvm-project/pull/72687
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[llvm-branch-commits] [llvm] [clang] Revert HWASAN failure (PR #74163)

2023-12-01 Thread Kirill Stoimenov via llvm-branch-commits 

https://github.com/kstoimenov created 
https://github.com/llvm/llvm-project/pull/74163

This is the failure: 
https://lab.llvm.org/buildbot/#/builders/236/builds/7728/steps/10/logs/stdio

This started with eef8e1d206dc01c081a0ca29b7f9e0c39d33446e, but because there 
were a couple of patches that came after that I had to revert all 3 of them 
because of merge conflicts. 

>From 8b8496a64ef0fe1a4235e3694d898f08ab0f6e10 Mon Sep 17 00:00:00 2001
From: Kirill Stoimenov 
Date: Sat, 2 Dec 2023 01:50:19 +
Subject: [PATCH 1/3] Revert "[AArch64][MC] Fix run line in Armv9.5-A's
 FEAT_CPA test"

This reverts commit 8eb705321ed20232aa13e85e07f22b44f19e82b4.
---
 llvm/test/MC/AArch64/armv9.5a-cpa.s | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/llvm/test/MC/AArch64/armv9.5a-cpa.s 
b/llvm/test/MC/AArch64/armv9.5a-cpa.s
index 1c338eccf6cacd6..86932feeff8e41a 100644
--- a/llvm/test/MC/AArch64/armv9.5a-cpa.s
+++ b/llvm/test/MC/AArch64/armv9.5a-cpa.s
@@ -1,5 +1,5 @@
 // RUN: llvm-mc -triple aarch64 -show-encoding -mattr=+cpa < %s | FileCheck %s
-// RUN: not llvm-mc -triple aarch64 < %s 2>&1 | FileCheck 
--check-prefix=ERROR-NO-CPA %s
+// NORUN: not llvm-mc -triple aarch64 < %s 2>&1 | FileCheck 
--check-prefix=ERROR-NO-CPA %s
 
 addpt x0, x1, x2
 // CHECK: addpt x0, x1, x2   // encoding: [0x20,0x20,0x02,0x9a]

>From 0d1b35584ab99dc199b5cf2f20637a009b4f0da2 Mon Sep 17 00:00:00 2001
From: Kirill Stoimenov 
Date: Sat, 2 Dec 2023 01:50:38 +
Subject: [PATCH 2/3] Revert "[AArch64] Fix predicates for FEAT_CPA's
 SVE-specific instructions (#73923)"

This reverts commit 78237b70c873eb58877d91782a7f8eeb3fdf4901.
---
 .../lib/Target/AArch64/AArch64SVEInstrInfo.td |  2 +-
 llvm/test/MC/AArch64/SVE/armv9.5a-cpa.s   | 32 +--
 2 files changed, 17 insertions(+), 17 deletions(-)

diff --git a/llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td 
b/llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
index 25ef8e1acfa4f29..7587a07958a30c0 100644
--- a/llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
+++ b/llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
@@ -4167,7 +4167,7 @@ let Predicates = [HasSVE2orSME2, HasLUT] in {
 
//===--===//
 // Checked Pointer Arithmetic (FEAT_CPA)
 
//===--===//
-let Predicates = [HasSVE, HasCPA] in {
+let Predicates = [HasSVEorSME, HasCPA] in {
   // Add/subtract (vectors, unpredicated)
   def ADD_ZZZ_CPA : sve_int_bin_cons_arit_0<0b11, 0b010, "addpt", ZPR64>;
   def SUB_ZZZ_CPA : sve_int_bin_cons_arit_0<0b11, 0b011, "subpt", ZPR64>;
diff --git a/llvm/test/MC/AArch64/SVE/armv9.5a-cpa.s 
b/llvm/test/MC/AArch64/SVE/armv9.5a-cpa.s
index 2d6708bd1829ae2..339f6a70ee07a2d 100644
--- a/llvm/test/MC/AArch64/SVE/armv9.5a-cpa.s
+++ b/llvm/test/MC/AArch64/SVE/armv9.5a-cpa.s
@@ -1,15 +1,15 @@
 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve -mattr=+cpa < %s \
 // RUN:| FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
-// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme -mattr=+cpa < 
%s 2>&1 \
-// RUN:| FileCheck %s --check-prefixes=CHECK-ERROR-NO-SVE
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme -mattr=+cpa < %s \
+// RUN:| FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
 // RUN:| FileCheck %s --check-prefix=CHECK-ERROR
 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+cpa < %s 2>&1 \
-// RUN:| FileCheck %s --check-prefix=CHECK-ERROR-NO-SVE
+// RUN:| FileCheck %s --check-prefix=CHECK-ERROR-NO-SVESME
 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s 2>&1 \
 // RUN:| FileCheck %s --check-prefix=CHECK-ERROR-NO-CPA
 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s 2>&1 \
-// RUN:| FileCheck %s --check-prefix=CHECK-ERROR
+// RUN:| FileCheck %s --check-prefix=CHECK-ERROR-NO-CPA
 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve -mattr=+cpa < %s \
 // RUN:| llvm-objdump -d --mattr=+sve --mattr=+cpa - \
 // RUN:| FileCheck %s --check-prefix=CHECK-INST
@@ -23,47 +23,47 @@
 addpt z23.d, z13.d, z8.d
 // CHECK-INST: addpt z23.d, z13.d, z8.d
 // CHECK-ENCODING: [0xb7,0x09,0xe8,0x04]
-// CHECK-ERROR: instruction requires: cpa sve
-// CHECK-ERROR-NO-SVE: instruction requires: sve
+// CHECK-ERROR: instruction requires: cpa sve or sme
+// CHECK-ERROR-NO-SVESME: instruction requires: sve or sme
 // CHECK-ERROR-NO-CPA: instruction requires: cpa
 // CHECK-UNKNOWN: 04e809b7 
 
 addpt z23.d, p3/m, z23.d, z13.d
 // CHECK-INST: addpt z23.d, p3/m, z23.d, z13.d
 // CHECK-ENCODING: [0xb7,0x0d,0xc4,0x04]
-// CHECK-ERROR: instruction requires: cpa sve
-// CHECK-ERROR-NO-SVE: instruction requires: sve
+// CHECK-ERROR: instruction requires: cpa sve or sme
+// CHECK-ERROR-NO-SVESME: instruction requires: sve or sme
 // CHEC

[llvm-branch-commits] [clang] b6d0ee0 - Revert HWASAN failure (#74163)

2023-12-04 Thread Kirill Stoimenov via llvm-branch-commits 

Author: Kirill Stoimenov
Date: 2023-12-02T04:39:14Z
New Revision: b6d0ee056d247e1ecfd4ecd3f97fb2d31740d79b

URL: 
https://github.com/llvm/llvm-project/commit/b6d0ee056d247e1ecfd4ecd3f97fb2d31740d79b
DIFF: 
https://github.com/llvm/llvm-project/commit/b6d0ee056d247e1ecfd4ecd3f97fb2d31740d79b.diff

LOG: Revert HWASAN failure (#74163)

This is the failure:
https://lab.llvm.org/buildbot/#/builders/236/builds/7728/steps/10/logs/stdio

This started with eef8e1d206dc01c081a0ca29b7f9e0c39d33446e, but because
there were a couple of patches that came after that I had to revert all
3 of them because of merge conflicts.

Added: 


Modified: 
clang/test/Driver/aarch64-v95a.c
llvm/include/llvm/TargetParser/AArch64TargetParser.h
llvm/lib/Target/AArch64/AArch64.td
llvm/lib/Target/AArch64/AArch64InstrFormats.td
llvm/lib/Target/AArch64/AArch64InstrInfo.td
llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
llvm/lib/Target/AArch64/AArch64SchedA64FX.td
llvm/lib/Target/AArch64/AArch64SchedNeoverseN2.td
llvm/lib/Target/AArch64/AArch64SchedNeoverseV1.td
llvm/lib/Target/AArch64/AArch64SchedNeoverseV2.td
llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
llvm/lib/Target/AArch64/SVEInstrFormats.td
llvm/test/MC/AArch64/basic-a64-diagnostics.s
llvm/test/MC/AArch64/basic-a64-instructions.s
llvm/test/MC/Disassembler/AArch64/basic-a64-instructions.txt
llvm/unittests/TargetParser/TargetParserTest.cpp

Removed: 
llvm/test/MC/AArch64/SVE/armv9.5a-cpa.s
llvm/test/MC/AArch64/armv9.5a-cpa.s
llvm/test/MC/Disassembler/AArch64/armv9.5a-cpa.txt



diff  --git a/clang/test/Driver/aarch64-v95a.c 
b/clang/test/Driver/aarch64-v95a.c
index 366cade86a9fb..6044a4f155db0 100644
--- a/clang/test/Driver/aarch64-v95a.c
+++ b/clang/test/Driver/aarch64-v95a.c
@@ -13,8 +13,3 @@
 // RUN: %clang -target aarch64_be -mbig-endian -march=armv9.5-a -### -c %s 
2>&1 | FileCheck -check-prefix=GENERICV95A-BE %s
 // GENERICV95A-BE: "-cc1"{{.*}} "-triple" "aarch64_be{{.*}}" "-target-cpu" 
"generic" "-target-feature" "+neon" "-target-feature" "+v9.5a"
 
-// = Features supported on aarch64 =
-
-// RUN: %clang -target aarch64 -march=armv9.5a+cpa -### -c %s 2>&1 | FileCheck 
-check-prefix=V95A-CPA %s
-// RUN: %clang -target aarch64 -march=armv9.5-a+cpa -### -c %s 2>&1 | 
FileCheck -check-prefix=V95A-CPA %s
-// V95A-CPA: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" 
"-target-feature" "+neon" "-target-feature" "+v9.5a" "-target-feature" "+cpa"

diff  --git a/llvm/include/llvm/TargetParser/AArch64TargetParser.h 
b/llvm/include/llvm/TargetParser/AArch64TargetParser.h
index 0711f013a3779..17cafd146b0e7 100644
--- a/llvm/include/llvm/TargetParser/AArch64TargetParser.h
+++ b/llvm/include/llvm/TargetParser/AArch64TargetParser.h
@@ -173,7 +173,6 @@ enum ArchExtKind : unsigned {
   AEK_SMEF8F16 =  69, // FEAT_SME_F8F16
   AEK_SMEF8F32 =  70, // FEAT_SME_F8F32
   AEK_SMEFA64 =   71, // FEAT_SME_FA64
-  AEK_CPA =   72, // FEAT_CPA
   AEK_NUM_EXTENSIONS
 };
 using ExtensionBitset = Bitset;
@@ -296,7 +295,6 @@ inline constexpr ExtensionInfo Extensions[] = {
 {"sme-f8f16", AArch64::AEK_SMEF8F16, "+sme-f8f16", "-sme-f8f16", 
FEAT_INIT, "+sme2,+fp8", 0},
 {"sme-f8f32", AArch64::AEK_SMEF8F32, "+sme-f8f32", "-sme-f8f32", 
FEAT_INIT, "+sme2,+fp8", 0},
 {"sme-fa64",  AArch64::AEK_SMEFA64,  "+sme-fa64", "-sme-fa64",  FEAT_INIT, 
"", 0},
-{"cpa", AArch64::AEK_CPA, "+cpa", "-cpa", FEAT_INIT, "", 0},
 // Special cases
 {"none", AArch64::AEK_NONE, {}, {}, FEAT_INIT, "", 
ExtensionInfo::MaxFMVPriority},
 };
@@ -380,8 +378,7 @@ inline constexpr ArchInfo ARMV9_3A  = { VersionTuple{9, 3}, 
AProfile, "armv9.3-a
 
AArch64::ExtensionBitset({AArch64::AEK_MOPS, AArch64::AEK_HBC}))};
 inline constexpr ArchInfo ARMV9_4A  = { VersionTuple{9, 4}, AProfile, 
"armv9.4-a", "+v9.4a", (ARMV9_3A.DefaultExts |
 
AArch64::ExtensionBitset({AArch64::AEK_SPECRES2, AArch64::AEK_CSSC, 
AArch64::AEK_RASv2}))};
-inline constexpr ArchInfo ARMV9_5A  = { VersionTuple{9, 5}, AProfile, 
"armv9.5-a", "+v9.5a", (ARMV9_4A.DefaultExts |
-
AArch64::ExtensionBitset({AArch64::AEK_CPA}))};
+inline constexpr ArchInfo ARMV9_5A  = { VersionTuple{9, 5}, AProfile, 
"armv9.5-a", "+v9.5a", (ARMV9_4A.DefaultExts)};
 // For v8-R, we do not enable crypto and align with GCC that enables a more 
minimal set of optional architecture extensions.
 inline constexpr ArchInfo ARMV8R= { VersionTuple{8, 0}, RProfile, 
"armv8-r", "+v8r", (ARMV8_5A.DefaultExts |
 
AArch64::ExtensionBitset({AArch64::AEK_SSBS,

diff  --git a/llvm/lib/Target/AArch64/AArch64.td 
b/llvm/lib/Target/AArch64/AArch64.td
index d1dbced2466ea..ff256c9a8ccdf 100644
--- a/llvm/lib/Target/AArch64/AArch64.td
+

[llvm-branch-commits] [llvm] b6d0ee0 - Revert HWASAN failure (#74163)

2023-12-04 Thread Kirill Stoimenov via llvm-branch-commits 

Author: Kirill Stoimenov
Date: 2023-12-02T04:39:14Z
New Revision: b6d0ee056d247e1ecfd4ecd3f97fb2d31740d79b

URL: 
https://github.com/llvm/llvm-project/commit/b6d0ee056d247e1ecfd4ecd3f97fb2d31740d79b
DIFF: 
https://github.com/llvm/llvm-project/commit/b6d0ee056d247e1ecfd4ecd3f97fb2d31740d79b.diff

LOG: Revert HWASAN failure (#74163)

This is the failure:
https://lab.llvm.org/buildbot/#/builders/236/builds/7728/steps/10/logs/stdio

This started with eef8e1d206dc01c081a0ca29b7f9e0c39d33446e, but because
there were a couple of patches that came after that I had to revert all
3 of them because of merge conflicts.

Added: 


Modified: 
clang/test/Driver/aarch64-v95a.c
llvm/include/llvm/TargetParser/AArch64TargetParser.h
llvm/lib/Target/AArch64/AArch64.td
llvm/lib/Target/AArch64/AArch64InstrFormats.td
llvm/lib/Target/AArch64/AArch64InstrInfo.td
llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
llvm/lib/Target/AArch64/AArch64SchedA64FX.td
llvm/lib/Target/AArch64/AArch64SchedNeoverseN2.td
llvm/lib/Target/AArch64/AArch64SchedNeoverseV1.td
llvm/lib/Target/AArch64/AArch64SchedNeoverseV2.td
llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
llvm/lib/Target/AArch64/SVEInstrFormats.td
llvm/test/MC/AArch64/basic-a64-diagnostics.s
llvm/test/MC/AArch64/basic-a64-instructions.s
llvm/test/MC/Disassembler/AArch64/basic-a64-instructions.txt
llvm/unittests/TargetParser/TargetParserTest.cpp

Removed: 
llvm/test/MC/AArch64/SVE/armv9.5a-cpa.s
llvm/test/MC/AArch64/armv9.5a-cpa.s
llvm/test/MC/Disassembler/AArch64/armv9.5a-cpa.txt



diff  --git a/clang/test/Driver/aarch64-v95a.c 
b/clang/test/Driver/aarch64-v95a.c
index 366cade86a9fb..6044a4f155db0 100644
--- a/clang/test/Driver/aarch64-v95a.c
+++ b/clang/test/Driver/aarch64-v95a.c
@@ -13,8 +13,3 @@
 // RUN: %clang -target aarch64_be -mbig-endian -march=armv9.5-a -### -c %s 
2>&1 | FileCheck -check-prefix=GENERICV95A-BE %s
 // GENERICV95A-BE: "-cc1"{{.*}} "-triple" "aarch64_be{{.*}}" "-target-cpu" 
"generic" "-target-feature" "+neon" "-target-feature" "+v9.5a"
 
-// = Features supported on aarch64 =
-
-// RUN: %clang -target aarch64 -march=armv9.5a+cpa -### -c %s 2>&1 | FileCheck 
-check-prefix=V95A-CPA %s
-// RUN: %clang -target aarch64 -march=armv9.5-a+cpa -### -c %s 2>&1 | 
FileCheck -check-prefix=V95A-CPA %s
-// V95A-CPA: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" 
"-target-feature" "+neon" "-target-feature" "+v9.5a" "-target-feature" "+cpa"

diff  --git a/llvm/include/llvm/TargetParser/AArch64TargetParser.h 
b/llvm/include/llvm/TargetParser/AArch64TargetParser.h
index 0711f013a3779..17cafd146b0e7 100644
--- a/llvm/include/llvm/TargetParser/AArch64TargetParser.h
+++ b/llvm/include/llvm/TargetParser/AArch64TargetParser.h
@@ -173,7 +173,6 @@ enum ArchExtKind : unsigned {
   AEK_SMEF8F16 =  69, // FEAT_SME_F8F16
   AEK_SMEF8F32 =  70, // FEAT_SME_F8F32
   AEK_SMEFA64 =   71, // FEAT_SME_FA64
-  AEK_CPA =   72, // FEAT_CPA
   AEK_NUM_EXTENSIONS
 };
 using ExtensionBitset = Bitset;
@@ -296,7 +295,6 @@ inline constexpr ExtensionInfo Extensions[] = {
 {"sme-f8f16", AArch64::AEK_SMEF8F16, "+sme-f8f16", "-sme-f8f16", 
FEAT_INIT, "+sme2,+fp8", 0},
 {"sme-f8f32", AArch64::AEK_SMEF8F32, "+sme-f8f32", "-sme-f8f32", 
FEAT_INIT, "+sme2,+fp8", 0},
 {"sme-fa64",  AArch64::AEK_SMEFA64,  "+sme-fa64", "-sme-fa64",  FEAT_INIT, 
"", 0},
-{"cpa", AArch64::AEK_CPA, "+cpa", "-cpa", FEAT_INIT, "", 0},
 // Special cases
 {"none", AArch64::AEK_NONE, {}, {}, FEAT_INIT, "", 
ExtensionInfo::MaxFMVPriority},
 };
@@ -380,8 +378,7 @@ inline constexpr ArchInfo ARMV9_3A  = { VersionTuple{9, 3}, 
AProfile, "armv9.3-a
 
AArch64::ExtensionBitset({AArch64::AEK_MOPS, AArch64::AEK_HBC}))};
 inline constexpr ArchInfo ARMV9_4A  = { VersionTuple{9, 4}, AProfile, 
"armv9.4-a", "+v9.4a", (ARMV9_3A.DefaultExts |
 
AArch64::ExtensionBitset({AArch64::AEK_SPECRES2, AArch64::AEK_CSSC, 
AArch64::AEK_RASv2}))};
-inline constexpr ArchInfo ARMV9_5A  = { VersionTuple{9, 5}, AProfile, 
"armv9.5-a", "+v9.5a", (ARMV9_4A.DefaultExts |
-
AArch64::ExtensionBitset({AArch64::AEK_CPA}))};
+inline constexpr ArchInfo ARMV9_5A  = { VersionTuple{9, 5}, AProfile, 
"armv9.5-a", "+v9.5a", (ARMV9_4A.DefaultExts)};
 // For v8-R, we do not enable crypto and align with GCC that enables a more 
minimal set of optional architecture extensions.
 inline constexpr ArchInfo ARMV8R= { VersionTuple{8, 0}, RProfile, 
"armv8-r", "+v8r", (ARMV8_5A.DefaultExts |
 
AArch64::ExtensionBitset({AArch64::AEK_SSBS,

diff  --git a/llvm/lib/Target/AArch64/AArch64.td 
b/llvm/lib/Target/AArch64/AArch64.td
index d1dbced2466ea..ff256c9a8ccdf 100644
--- a/llvm/lib/Target/AArch64/AArch64.td
+

[llvm-branch-commits] [llvm] b6d0ee0 - Revert HWASAN failure (#74163)

2023-12-04 Thread Kirill Stoimenov via llvm-branch-commits 

Author: Kirill Stoimenov
Date: 2023-12-02T04:39:14Z
New Revision: b6d0ee056d247e1ecfd4ecd3f97fb2d31740d79b

URL: 
https://github.com/llvm/llvm-project/commit/b6d0ee056d247e1ecfd4ecd3f97fb2d31740d79b
DIFF: 
https://github.com/llvm/llvm-project/commit/b6d0ee056d247e1ecfd4ecd3f97fb2d31740d79b.diff

LOG: Revert HWASAN failure (#74163)

This is the failure:
https://lab.llvm.org/buildbot/#/builders/236/builds/7728/steps/10/logs/stdio

This started with eef8e1d206dc01c081a0ca29b7f9e0c39d33446e, but because
there were a couple of patches that came after that I had to revert all
3 of them because of merge conflicts.

Added: 


Modified: 
clang/test/Driver/aarch64-v95a.c
llvm/include/llvm/TargetParser/AArch64TargetParser.h
llvm/lib/Target/AArch64/AArch64.td
llvm/lib/Target/AArch64/AArch64InstrFormats.td
llvm/lib/Target/AArch64/AArch64InstrInfo.td
llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
llvm/lib/Target/AArch64/AArch64SchedA64FX.td
llvm/lib/Target/AArch64/AArch64SchedNeoverseN2.td
llvm/lib/Target/AArch64/AArch64SchedNeoverseV1.td
llvm/lib/Target/AArch64/AArch64SchedNeoverseV2.td
llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
llvm/lib/Target/AArch64/SVEInstrFormats.td
llvm/test/MC/AArch64/basic-a64-diagnostics.s
llvm/test/MC/AArch64/basic-a64-instructions.s
llvm/test/MC/Disassembler/AArch64/basic-a64-instructions.txt
llvm/unittests/TargetParser/TargetParserTest.cpp

Removed: 
llvm/test/MC/AArch64/SVE/armv9.5a-cpa.s
llvm/test/MC/AArch64/armv9.5a-cpa.s
llvm/test/MC/Disassembler/AArch64/armv9.5a-cpa.txt



diff  --git a/clang/test/Driver/aarch64-v95a.c 
b/clang/test/Driver/aarch64-v95a.c
index 366cade86a9fb..6044a4f155db0 100644
--- a/clang/test/Driver/aarch64-v95a.c
+++ b/clang/test/Driver/aarch64-v95a.c
@@ -13,8 +13,3 @@
 // RUN: %clang -target aarch64_be -mbig-endian -march=armv9.5-a -### -c %s 
2>&1 | FileCheck -check-prefix=GENERICV95A-BE %s
 // GENERICV95A-BE: "-cc1"{{.*}} "-triple" "aarch64_be{{.*}}" "-target-cpu" 
"generic" "-target-feature" "+neon" "-target-feature" "+v9.5a"
 
-// = Features supported on aarch64 =
-
-// RUN: %clang -target aarch64 -march=armv9.5a+cpa -### -c %s 2>&1 | FileCheck 
-check-prefix=V95A-CPA %s
-// RUN: %clang -target aarch64 -march=armv9.5-a+cpa -### -c %s 2>&1 | 
FileCheck -check-prefix=V95A-CPA %s
-// V95A-CPA: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" 
"-target-feature" "+neon" "-target-feature" "+v9.5a" "-target-feature" "+cpa"

diff  --git a/llvm/include/llvm/TargetParser/AArch64TargetParser.h 
b/llvm/include/llvm/TargetParser/AArch64TargetParser.h
index 0711f013a3779..17cafd146b0e7 100644
--- a/llvm/include/llvm/TargetParser/AArch64TargetParser.h
+++ b/llvm/include/llvm/TargetParser/AArch64TargetParser.h
@@ -173,7 +173,6 @@ enum ArchExtKind : unsigned {
   AEK_SMEF8F16 =  69, // FEAT_SME_F8F16
   AEK_SMEF8F32 =  70, // FEAT_SME_F8F32
   AEK_SMEFA64 =   71, // FEAT_SME_FA64
-  AEK_CPA =   72, // FEAT_CPA
   AEK_NUM_EXTENSIONS
 };
 using ExtensionBitset = Bitset;
@@ -296,7 +295,6 @@ inline constexpr ExtensionInfo Extensions[] = {
 {"sme-f8f16", AArch64::AEK_SMEF8F16, "+sme-f8f16", "-sme-f8f16", 
FEAT_INIT, "+sme2,+fp8", 0},
 {"sme-f8f32", AArch64::AEK_SMEF8F32, "+sme-f8f32", "-sme-f8f32", 
FEAT_INIT, "+sme2,+fp8", 0},
 {"sme-fa64",  AArch64::AEK_SMEFA64,  "+sme-fa64", "-sme-fa64",  FEAT_INIT, 
"", 0},
-{"cpa", AArch64::AEK_CPA, "+cpa", "-cpa", FEAT_INIT, "", 0},
 // Special cases
 {"none", AArch64::AEK_NONE, {}, {}, FEAT_INIT, "", 
ExtensionInfo::MaxFMVPriority},
 };
@@ -380,8 +378,7 @@ inline constexpr ArchInfo ARMV9_3A  = { VersionTuple{9, 3}, 
AProfile, "armv9.3-a
 
AArch64::ExtensionBitset({AArch64::AEK_MOPS, AArch64::AEK_HBC}))};
 inline constexpr ArchInfo ARMV9_4A  = { VersionTuple{9, 4}, AProfile, 
"armv9.4-a", "+v9.4a", (ARMV9_3A.DefaultExts |
 
AArch64::ExtensionBitset({AArch64::AEK_SPECRES2, AArch64::AEK_CSSC, 
AArch64::AEK_RASv2}))};
-inline constexpr ArchInfo ARMV9_5A  = { VersionTuple{9, 5}, AProfile, 
"armv9.5-a", "+v9.5a", (ARMV9_4A.DefaultExts |
-
AArch64::ExtensionBitset({AArch64::AEK_CPA}))};
+inline constexpr ArchInfo ARMV9_5A  = { VersionTuple{9, 5}, AProfile, 
"armv9.5-a", "+v9.5a", (ARMV9_4A.DefaultExts)};
 // For v8-R, we do not enable crypto and align with GCC that enables a more 
minimal set of optional architecture extensions.
 inline constexpr ArchInfo ARMV8R= { VersionTuple{8, 0}, RProfile, 
"armv8-r", "+v8r", (ARMV8_5A.DefaultExts |
 
AArch64::ExtensionBitset({AArch64::AEK_SSBS,

diff  --git a/llvm/lib/Target/AArch64/AArch64.td 
b/llvm/lib/Target/AArch64/AArch64.td
index d1dbced2466ea..ff256c9a8ccdf 100644
--- a/llvm/lib/Target/AArch64/AArch64.td
+

[llvm-branch-commits] [llvm] b6d0ee0 - Revert HWASAN failure (#74163)

2023-12-04 Thread Kirill Stoimenov via llvm-branch-commits 

Author: Kirill Stoimenov
Date: 2023-12-02T04:39:14Z
New Revision: b6d0ee056d247e1ecfd4ecd3f97fb2d31740d79b

URL: 
https://github.com/llvm/llvm-project/commit/b6d0ee056d247e1ecfd4ecd3f97fb2d31740d79b
DIFF: 
https://github.com/llvm/llvm-project/commit/b6d0ee056d247e1ecfd4ecd3f97fb2d31740d79b.diff

LOG: Revert HWASAN failure (#74163)

This is the failure:
https://lab.llvm.org/buildbot/#/builders/236/builds/7728/steps/10/logs/stdio

This started with eef8e1d206dc01c081a0ca29b7f9e0c39d33446e, but because
there were a couple of patches that came after that I had to revert all
3 of them because of merge conflicts.

Added: 


Modified: 
clang/test/Driver/aarch64-v95a.c
llvm/include/llvm/TargetParser/AArch64TargetParser.h
llvm/lib/Target/AArch64/AArch64.td
llvm/lib/Target/AArch64/AArch64InstrFormats.td
llvm/lib/Target/AArch64/AArch64InstrInfo.td
llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
llvm/lib/Target/AArch64/AArch64SchedA64FX.td
llvm/lib/Target/AArch64/AArch64SchedNeoverseN2.td
llvm/lib/Target/AArch64/AArch64SchedNeoverseV1.td
llvm/lib/Target/AArch64/AArch64SchedNeoverseV2.td
llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
llvm/lib/Target/AArch64/SVEInstrFormats.td
llvm/test/MC/AArch64/basic-a64-diagnostics.s
llvm/test/MC/AArch64/basic-a64-instructions.s
llvm/test/MC/Disassembler/AArch64/basic-a64-instructions.txt
llvm/unittests/TargetParser/TargetParserTest.cpp

Removed: 
llvm/test/MC/AArch64/SVE/armv9.5a-cpa.s
llvm/test/MC/AArch64/armv9.5a-cpa.s
llvm/test/MC/Disassembler/AArch64/armv9.5a-cpa.txt



diff  --git a/clang/test/Driver/aarch64-v95a.c 
b/clang/test/Driver/aarch64-v95a.c
index 366cade86a9fb..6044a4f155db0 100644
--- a/clang/test/Driver/aarch64-v95a.c
+++ b/clang/test/Driver/aarch64-v95a.c
@@ -13,8 +13,3 @@
 // RUN: %clang -target aarch64_be -mbig-endian -march=armv9.5-a -### -c %s 
2>&1 | FileCheck -check-prefix=GENERICV95A-BE %s
 // GENERICV95A-BE: "-cc1"{{.*}} "-triple" "aarch64_be{{.*}}" "-target-cpu" 
"generic" "-target-feature" "+neon" "-target-feature" "+v9.5a"
 
-// = Features supported on aarch64 =
-
-// RUN: %clang -target aarch64 -march=armv9.5a+cpa -### -c %s 2>&1 | FileCheck 
-check-prefix=V95A-CPA %s
-// RUN: %clang -target aarch64 -march=armv9.5-a+cpa -### -c %s 2>&1 | 
FileCheck -check-prefix=V95A-CPA %s
-// V95A-CPA: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" 
"-target-feature" "+neon" "-target-feature" "+v9.5a" "-target-feature" "+cpa"

diff  --git a/llvm/include/llvm/TargetParser/AArch64TargetParser.h 
b/llvm/include/llvm/TargetParser/AArch64TargetParser.h
index 0711f013a3779..17cafd146b0e7 100644
--- a/llvm/include/llvm/TargetParser/AArch64TargetParser.h
+++ b/llvm/include/llvm/TargetParser/AArch64TargetParser.h
@@ -173,7 +173,6 @@ enum ArchExtKind : unsigned {
   AEK_SMEF8F16 =  69, // FEAT_SME_F8F16
   AEK_SMEF8F32 =  70, // FEAT_SME_F8F32
   AEK_SMEFA64 =   71, // FEAT_SME_FA64
-  AEK_CPA =   72, // FEAT_CPA
   AEK_NUM_EXTENSIONS
 };
 using ExtensionBitset = Bitset;
@@ -296,7 +295,6 @@ inline constexpr ExtensionInfo Extensions[] = {
 {"sme-f8f16", AArch64::AEK_SMEF8F16, "+sme-f8f16", "-sme-f8f16", 
FEAT_INIT, "+sme2,+fp8", 0},
 {"sme-f8f32", AArch64::AEK_SMEF8F32, "+sme-f8f32", "-sme-f8f32", 
FEAT_INIT, "+sme2,+fp8", 0},
 {"sme-fa64",  AArch64::AEK_SMEFA64,  "+sme-fa64", "-sme-fa64",  FEAT_INIT, 
"", 0},
-{"cpa", AArch64::AEK_CPA, "+cpa", "-cpa", FEAT_INIT, "", 0},
 // Special cases
 {"none", AArch64::AEK_NONE, {}, {}, FEAT_INIT, "", 
ExtensionInfo::MaxFMVPriority},
 };
@@ -380,8 +378,7 @@ inline constexpr ArchInfo ARMV9_3A  = { VersionTuple{9, 3}, 
AProfile, "armv9.3-a
 
AArch64::ExtensionBitset({AArch64::AEK_MOPS, AArch64::AEK_HBC}))};
 inline constexpr ArchInfo ARMV9_4A  = { VersionTuple{9, 4}, AProfile, 
"armv9.4-a", "+v9.4a", (ARMV9_3A.DefaultExts |
 
AArch64::ExtensionBitset({AArch64::AEK_SPECRES2, AArch64::AEK_CSSC, 
AArch64::AEK_RASv2}))};
-inline constexpr ArchInfo ARMV9_5A  = { VersionTuple{9, 5}, AProfile, 
"armv9.5-a", "+v9.5a", (ARMV9_4A.DefaultExts |
-
AArch64::ExtensionBitset({AArch64::AEK_CPA}))};
+inline constexpr ArchInfo ARMV9_5A  = { VersionTuple{9, 5}, AProfile, 
"armv9.5-a", "+v9.5a", (ARMV9_4A.DefaultExts)};
 // For v8-R, we do not enable crypto and align with GCC that enables a more 
minimal set of optional architecture extensions.
 inline constexpr ArchInfo ARMV8R= { VersionTuple{8, 0}, RProfile, 
"armv8-r", "+v8r", (ARMV8_5A.DefaultExts |
 
AArch64::ExtensionBitset({AArch64::AEK_SSBS,

diff  --git a/llvm/lib/Target/AArch64/AArch64.td 
b/llvm/lib/Target/AArch64/AArch64.td
index d1dbced2466ea..ff256c9a8ccdf 100644
--- a/llvm/lib/Target/AArch64/AArch64.td
+

[llvm-branch-commits] [clang] [libc] [libcxx] [compiler-rt] [libunwind] [llvm] [NFC][tsan] Move SkipInternalFrames into sanitizer_common (PR #77146)

2024-01-05 Thread Kirill Stoimenov via llvm-branch-commits 

https://github.com/kstoimenov approved this pull request.


https://github.com/llvm/llvm-project/pull/77146
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[llvm-branch-commits] [mlir] [llvm] [compiler-rt] [clang-tools-extra] [libcxx] [clang] [NFC][sanitizer] Add consts to SkipInternalFrames (PR #77162)

2024-01-05 Thread Kirill Stoimenov via llvm-branch-commits 

https://github.com/kstoimenov approved this pull request.


https://github.com/llvm/llvm-project/pull/77162
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[llvm-branch-commits] [compiler-rt] [test][hwasan] Test function name in summaries (PR #77391)

2024-01-08 Thread Kirill Stoimenov via llvm-branch-commits 

https://github.com/kstoimenov approved this pull request.


https://github.com/llvm/llvm-project/pull/77391
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[llvm-branch-commits] [llvm] [InstCombine][asan] Don't speculate loads before `select ptr` (PR #100773)

2024-12-27 Thread Kirill Stoimenov via llvm-branch-commits 

https://github.com/kstoimenov approved this pull request.


https://github.com/llvm/llvm-project/pull/100773
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[llvm-branch-commits] [compiler-rt] [ubsan] Runtime and driver support for local-bounds (PR #120515)

2024-12-27 Thread Kirill Stoimenov via llvm-branch-commits 

https://github.com/kstoimenov approved this pull request.


https://github.com/llvm/llvm-project/pull/120515
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[llvm-branch-commits] [NFC][BoundsChecking] Add TrapBB local variable (PR #119983)

2024-12-17 Thread Kirill Stoimenov via llvm-branch-commits 

https://github.com/kstoimenov approved this pull request.


https://github.com/llvm/llvm-project/pull/119983
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[llvm-branch-commits] [ubsan] Improve lowering of @llvm.allow.ubsan.check (PR #119013)

2024-12-06 Thread Kirill Stoimenov via llvm-branch-commits 

https://github.com/kstoimenov approved this pull request.


https://github.com/llvm/llvm-project/pull/119013
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