[llvm-branch-commits] [mlir] cc4244d - [MLIR][Standard] Add log1p operation to std
Author: Frederik Gossen
Date: 2021-01-20T18:56:20+01:00
New Revision: cc4244d55f98b03603cf54eb4abac7e128e3c99a
URL:
https://github.com/llvm/llvm-project/commit/cc4244d55f98b03603cf54eb4abac7e128e3c99a
DIFF:
https://github.com/llvm/llvm-project/commit/cc4244d55f98b03603cf54eb4abac7e128e3c99a.diff
LOG: [MLIR][Standard] Add log1p operation to std
Differential Revision: https://reviews.llvm.org/D95041
Added:
Modified:
mlir/include/mlir/Dialect/StandardOps/IR/Ops.td
mlir/test/IR/core-ops.mlir
Removed:
diff --git a/mlir/include/mlir/Dialect/StandardOps/IR/Ops.td
b/mlir/include/mlir/Dialect/StandardOps/IR/Ops.td
index 8db6129dbb88..770e68f6da83 100644
--- a/mlir/include/mlir/Dialect/StandardOps/IR/Ops.td
+++ b/mlir/include/mlir/Dialect/StandardOps/IR/Ops.td
@@ -1942,10 +1942,39 @@ def LogOp : FloatUnaryOp<"log"> {
let summary = "base-e logarithm of the specified value";
}
+//===--===//
+// Log10Op
+//===--===//
+
def Log10Op : FloatUnaryOp<"log10"> {
let summary = "base-10 logarithm of the specified value";
}
+//===--===//
+// Log1pOp
+//===--===//
+
+def Log1pOp : FloatUnaryOp<"log1p"> {
+ let summary = "Computes the natural logarithm of one plus the given value";
+
+ let description = [{
+Computes the base-e logarithm of one plus the given value. It takes one
+operand and returns one result of the same type.
+
+log1p(x) := log(1 + x)
+
+Example:
+
+```mlir
+%y = log1p %x : f64
+```
+ }];
+}
+
+//===--===//
+// Log2Op
+//===--===//
+
def Log2Op : FloatUnaryOp<"log2"> {
let summary = "base-2 logarithm of the specified value";
}
diff --git a/mlir/test/IR/core-ops.mlir b/mlir/test/IR/core-ops.mlir
index 0e86050870ff..b5266fb2e580 100644
--- a/mlir/test/IR/core-ops.mlir
+++ b/mlir/test/IR/core-ops.mlir
@@ -596,6 +596,9 @@ func @standard_instrs(tensor<4x4x?xf32>, f32, i32, index,
i64, f16) {
// CHECK: %{{[0-9]+}} = ceildivi_signed %cst_4, %cst_4 : tensor<42xi32>
%174 = ceildivi_signed %tci32, %tci32 : tensor<42 x i32>
+ // CHECK: %{{[0-9]+}} = log1p %arg1 : f32
+ %175 = log1p %f : f32
+
return
}
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[llvm-branch-commits] [mlir] 294e254 - Add log1p lowering from standard to NVVM intrinsics
Author: Frederik Gossen
Date: 2021-01-21T14:00:38+01:00
New Revision: 294e2544c992de82c180c080f6359db8f02005d0
URL:
https://github.com/llvm/llvm-project/commit/294e2544c992de82c180c080f6359db8f02005d0
DIFF:
https://github.com/llvm/llvm-project/commit/294e2544c992de82c180c080f6359db8f02005d0.diff
LOG: Add log1p lowering from standard to NVVM intrinsics
Differential Revision: https://reviews.llvm.org/D95130
Added:
Modified:
mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
Removed:
diff --git a/mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
b/mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
index a968f9289dac..f99b7cace502 100644
--- a/mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
+++ b/mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
@@ -187,6 +187,8 @@ void mlir::populateGpuToNVVMConversionPatterns(
"__nv_floor");
patterns.insert>(converter, "__nv_logf",
"__nv_log");
+ patterns.insert>(converter, "__nv_log1pf",
+ "__nv_log1p");
patterns.insert>(converter, "__nv_log10f",
"__nv_log10");
patterns.insert>(converter, "__nv_log2f",
diff --git a/mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
b/mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
index e740aabaee99..f48ee0e3f5e4 100644
--- a/mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
+++ b/mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
@@ -246,6 +246,21 @@ gpu.module @test_module {
// -
+gpu.module @test_module {
+ // CHECK: llvm.func @__nv_log1pf(f32) -> f32
+ // CHECK: llvm.func @__nv_log1p(f64) -> f64
+ // CHECK-LABEL: func @gpu_log1p
+ func @gpu_log1p(%arg_f32 : f32, %arg_f64 : f64) -> (f32, f64) {
+%result32 = std.log1p %arg_f32 : f32
+// CHECK: llvm.call @__nv_log1pf(%{{.*}}) : (f32) -> f32
+%result64 = std.log1p %arg_f64 : f64
+// CHECK: llvm.call @__nv_log1p(%{{.*}}) : (f64) -> f64
+std.return %result32, %result64 : f32, f64
+ }
+}
+
+// -
+
gpu.module @test_module {
// CHECK: llvm.func @__nv_log2f(f32) -> f32
// CHECK: llvm.func @__nv_log2(f64) -> f64
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[llvm-branch-commits] [mlir] 4ef38f9 - Add log1p lowering from standard to ROCDL intrinsics
Author: Frederik Gossen
Date: 2021-01-21T14:02:48+01:00
New Revision: 4ef38f9c1255dcaa3f834cf376e55f8a7bdc5810
URL:
https://github.com/llvm/llvm-project/commit/4ef38f9c1255dcaa3f834cf376e55f8a7bdc5810
DIFF:
https://github.com/llvm/llvm-project/commit/4ef38f9c1255dcaa3f834cf376e55f8a7bdc5810.diff
LOG: Add log1p lowering from standard to ROCDL intrinsics
Differential Revision: https://reviews.llvm.org/D95129
Added:
Modified:
mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir
Removed:
diff --git a/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
b/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
index e87ca62c9b81..7aa8e6021650 100644
--- a/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
+++ b/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
@@ -121,6 +121,8 @@ void mlir::populateGpuToROCDLConversionPatterns(
"__ocml_log_f64");
patterns.insert>(converter, "__ocml_log10_f32",
"__ocml_log10_f64");
+ patterns.insert>(converter, "__ocml_log1p_f32",
+ "__ocml_log1p_f64");
patterns.insert>(converter, "__ocml_log2_f32",
"__ocml_log2_f64");
patterns.insert>(converter, "__ocml_pow_f32",
diff --git a/mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir
b/mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir
index b3613503531d..38d75883f2f9 100644
--- a/mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir
+++ b/mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir
@@ -198,6 +198,21 @@ gpu.module @test_module {
// -
+gpu.module @test_module {
+ // CHECK: llvm.func @__ocml_log1p_f32(f32) -> f32
+ // CHECK: llvm.func @__ocml_log1p_f64(f64) -> f64
+ // CHECK-LABEL: func @gpu_log1p
+ func @gpu_log1p(%arg_f32 : f32, %arg_f64 : f64) -> (f32, f64) {
+%result32 = std.log1p %arg_f32 : f32
+// CHECK: llvm.call @__ocml_log1p_f32(%{{.*}}) : (f32) -> f32
+%result64 = std.log1p %arg_f64 : f64
+// CHECK: llvm.call @__ocml_log1p_f64(%{{.*}}) : (f64) -> f64
+std.return %result32, %result64 : f32, f64
+ }
+}
+
+// -
+
gpu.module @test_module {
// CHECK: llvm.func @__ocml_log10_f32(f32) -> f32
// CHECK: llvm.func @__ocml_log10_f64(f64) -> f64
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[llvm-branch-commits] [mlir] 6484567 - [MLIR][SCF] Find all innermost loops for parallel loop tiling
Author: Frederik Gossen
Date: 2020-11-27T10:08:56+01:00
New Revision: 6484567f14881003a7c46d1587dbb0cf8082282a
URL:
https://github.com/llvm/llvm-project/commit/6484567f14881003a7c46d1587dbb0cf8082282a
DIFF:
https://github.com/llvm/llvm-project/commit/6484567f14881003a7c46d1587dbb0cf8082282a.diff
LOG: [MLIR][SCF] Find all innermost loops for parallel loop tiling
Overcome the assumption that parallel loops are only nested in other parallel
loops.
Differential Revision: https://reviews.llvm.org/D92188
Added:
Modified:
mlir/lib/Dialect/SCF/Transforms/ParallelLoopTiling.cpp
mlir/test/Dialect/SCF/parallel-loop-tiling.mlir
Removed:
diff --git a/mlir/lib/Dialect/SCF/Transforms/ParallelLoopTiling.cpp
b/mlir/lib/Dialect/SCF/Transforms/ParallelLoopTiling.cpp
index 7bcc989a5b28..7bd589214f4c 100644
--- a/mlir/lib/Dialect/SCF/Transforms/ParallelLoopTiling.cpp
+++ b/mlir/lib/Dialect/SCF/Transforms/ParallelLoopTiling.cpp
@@ -22,15 +22,15 @@ using namespace mlir::scf;
/// Tile a parallel loop of the form
/// scf.parallel (%i0, %i1) = (%arg0, %arg1) to (%arg2, %arg3)
-/// step (%arg4, %arg5)
+///step (%arg4, %arg5)
///
/// into
/// scf.parallel (%i0, %i1) = (%arg0, %arg1) to (%arg2, %arg3)
-/// step (%arg4*tileSize[0],
-/// %arg5*tileSize[1])
+///step (%arg4*tileSize[0],
+/// %arg5*tileSize[1])
/// scf.parallel (%j0, %j1) = (0, 0) to (min(%arg4*tileSize[0], %arg2-%i0)
-/// min(%arg5*tileSize[1],
%arg3-%i1))
-///step (%arg4, %arg5)
+/// min(%arg5*tileSize[1], %arg3-%i1))
+/// step (%arg4, %arg5)
///
/// where the uses of %i0 and %i1 in the loop body are replaced by
/// %i0 + j0 and %i1 + %j1.
@@ -126,17 +126,27 @@ void mlir::scf::tileParallelLoop(ParallelOp op,
ArrayRef tileSizes) {
op.erase();
}
-/// Get a list of most nested parallel loops. Assumes that ParallelOps are
-/// only directly nested.
-static bool getInnermostNestedLoops(Block *block,
-SmallVectorImpl &loops) {
- bool hasInnerLoop = false;
- for (auto parallelOp : block->getOps()) {
-hasInnerLoop = true;
-if (!getInnermostNestedLoops(parallelOp.getBody(), loops))
- loops.push_back(parallelOp);
+/// Get a list of most nested parallel loops.
+static bool getInnermostPloops(Operation *rootOp,
+ SmallVectorImpl &result) {
+ assert(rootOp != nullptr && "Root operation must not be a nullptr.");
+ bool rootEnclosesPloops = false;
+ for (Region ®ion : rootOp->getRegions()) {
+for (Block &block : region.getBlocks()) {
+ for (Operation &op : block) {
+bool enclosesPloops = getInnermostPloops(&op, result);
+rootEnclosesPloops |= enclosesPloops;
+if (auto ploop = dyn_cast(op)) {
+ rootEnclosesPloops = true;
+
+ // Collect ploop if it is an innermost one.
+ if (!enclosesPloops)
+result.push_back(ploop);
+}
+ }
+}
}
- return hasInnerLoop;
+ return rootEnclosesPloops;
}
namespace {
@@ -148,14 +158,12 @@ struct ParallelLoopTiling
}
void runOnFunction() override {
-SmallVector mostNestedParallelOps;
-for (Block &block : getFunction()) {
- getInnermostNestedLoops(&block, mostNestedParallelOps);
-}
-for (ParallelOp pLoop : mostNestedParallelOps) {
+SmallVector innermostPloops;
+getInnermostPloops(getFunction().getOperation(), innermostPloops);
+for (ParallelOp ploop : innermostPloops) {
// FIXME: Add reduction support.
- if (pLoop.getNumReductions() == 0)
-tileParallelLoop(pLoop, tileSizes);
+ if (ploop.getNumReductions() == 0)
+tileParallelLoop(ploop, tileSizes);
}
}
};
diff --git a/mlir/test/Dialect/SCF/parallel-loop-tiling.mlir
b/mlir/test/Dialect/SCF/parallel-loop-tiling.mlir
index e0dc8344f14d..5d3a676f58ab 100644
--- a/mlir/test/Dialect/SCF/parallel-loop-tiling.mlir
+++ b/mlir/test/Dialect/SCF/parallel-loop-tiling.mlir
@@ -112,3 +112,29 @@ func @tile_nested_innermost() {
// CHECK: }
// CHECK: return
// CHECK: }
+
+// -
+
+func @tile_nested_in_non_ploop() {
+ %c0 = constant 0 : index
+ %c1 = constant 1 : index
+ %c2 = constant 2 : index
+ scf.for %i = %c0 to %c2 step %c1 {
+scf.for %j = %c0 to %c2 step %c1 {
+ scf.parallel (%k, %l) = (%c0, %c0) to (%c2, %c2) step (%c1, %c1) {
+ }
+}
+ }
+ return
+}
+
+// CHECK-LABEL: func @tile_nested_in_non_ploop
+// CHECK: scf.for
+// CHECK:
[llvm-branch-commits] [mlir] bb7d43e - Add rsqrt lowering from standard to NVVM
Author: Frederik Gossen
Date: 2020-12-08T14:33:58+01:00
New Revision: bb7d43e7d5f683fc3e7109072610dc8d176a3bf8
URL:
https://github.com/llvm/llvm-project/commit/bb7d43e7d5f683fc3e7109072610dc8d176a3bf8
DIFF:
https://github.com/llvm/llvm-project/commit/bb7d43e7d5f683fc3e7109072610dc8d176a3bf8.diff
LOG: Add rsqrt lowering from standard to NVVM
Differential Revision: https://reviews.llvm.org/D92838
Added:
Modified:
mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
Removed:
diff --git a/mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
b/mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
index 61f97d44e125..4b7bb6e193a4 100644
--- a/mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
+++ b/mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
@@ -183,6 +183,8 @@ void mlir::populateGpuToNVVMConversionPatterns(
"__nv_log10");
patterns.insert>(converter, "__nv_log2f",
"__nv_log2");
+ patterns.insert>(converter, "__nv_rsqrtf",
+ "__nv_rsqrt");
patterns.insert>(converter, "__nv_sinf",
"__nv_sin");
patterns.insert>(converter, "__nv_tanhf",
diff --git a/mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
b/mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
index 8e4e4515c638..347cc48daa20 100644
--- a/mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
+++ b/mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
@@ -295,6 +295,26 @@ gpu.module @test_module {
// -
+gpu.module @test_module {
+ // CHECK: llvm.func @__nv_rsqrtf(!llvm.float) -> !llvm.float
+ // CHECK: llvm.func @__nv_rsqrt(!llvm.double) -> !llvm.double
+ // CHECK-LABEL: func @gpu_rsqrt
+ func @gpu_rsqrt(%arg_f16 : f16, %arg_f32 : f32, %arg_f64 : f64)
+ -> (f16, f32, f64) {
+%result16 = std.rsqrt %arg_f16 : f16
+// CHECK: llvm.fpext %{{.*}} : !llvm.half to !llvm.float
+// CHECK-NEXT: llvm.call @__nv_rsqrtf(%{{.*}}) : (!llvm.float) ->
!llvm.float
+// CHECK-NEXT: llvm.fptrunc %{{.*}} : !llvm.float to !llvm.half
+%result32 = std.rsqrt %arg_f32 : f32
+// CHECK: llvm.call @__nv_rsqrtf(%{{.*}}) : (!llvm.float) -> !llvm.float
+%result64 = std.rsqrt %arg_f64 : f64
+// CHECK: llvm.call @__nv_rsqrt(%{{.*}}) : (!llvm.double) -> !llvm.double
+std.return %result16, %result32, %result64 : f16, f32, f64
+ }
+}
+
+// -
+
// Test that we handled properly operation with SymbolTable other than module
op
gpu.module @test_module {
"test.symbol_scope"() ({
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[llvm-branch-commits] [mlir] b4750f5 - Add sqrt lowering from standard to NVVM
Author: Frederik Gossen
Date: 2020-12-08T17:08:27+01:00
New Revision: b4750f58d89f2fbc74489b5e56d30daadec47198
URL:
https://github.com/llvm/llvm-project/commit/b4750f58d89f2fbc74489b5e56d30daadec47198
DIFF:
https://github.com/llvm/llvm-project/commit/b4750f58d89f2fbc74489b5e56d30daadec47198.diff
LOG: Add sqrt lowering from standard to NVVM
Differential Revision: https://reviews.llvm.org/D92850
Added:
Modified:
mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
Removed:
diff --git a/mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
b/mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
index 4b7bb6e193a4..467c622f8bde 100644
--- a/mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
+++ b/mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
@@ -138,7 +138,7 @@ struct LowerGpuOpsToNVVMOpsPass
target.addIllegalDialect();
target.addIllegalOp();
+LLVM::Log2Op, LLVM::SinOp, LLVM::SqrtOp>();
target.addIllegalOp();
target.addLegalDialect();
// TODO: Remove once we support replacing non-root ops.
@@ -187,6 +187,8 @@ void mlir::populateGpuToNVVMConversionPatterns(
"__nv_rsqrt");
patterns.insert>(converter, "__nv_sinf",
"__nv_sin");
+ patterns.insert>(converter, "__nv_sqrtf",
+"__nv_sqrt");
patterns.insert>(converter, "__nv_tanhf",
"__nv_tanh");
}
diff --git a/mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
b/mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
index 347cc48daa20..1c0257de0d55 100644
--- a/mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
+++ b/mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
@@ -315,6 +315,26 @@ gpu.module @test_module {
// -
+gpu.module @test_module {
+ // CHECK: llvm.func @__nv_sqrtf(!llvm.float) -> !llvm.float
+ // CHECK: llvm.func @__nv_sqrt(!llvm.double) -> !llvm.double
+ // CHECK-LABEL: func @gpu_sqrt
+ func @gpu_sqrt(%arg_f16 : f16, %arg_f32 : f32, %arg_f64 : f64)
+ -> (f16, f32, f64) {
+%result16 = std.sqrt %arg_f16 : f16
+// CHECK: llvm.fpext %{{.*}} : !llvm.half to !llvm.float
+// CHECK-NEXT: llvm.call @__nv_sqrtf(%{{.*}}) : (!llvm.float) ->
!llvm.float
+// CHECK-NEXT: llvm.fptrunc %{{.*}} : !llvm.float to !llvm.half
+%result32 = std.sqrt %arg_f32 : f32
+// CHECK: llvm.call @__nv_sqrtf(%{{.*}}) : (!llvm.float) -> !llvm.float
+%result64 = std.sqrt %arg_f64 : f64
+// CHECK: llvm.call @__nv_sqrt(%{{.*}}) : (!llvm.double) -> !llvm.double
+std.return %result16, %result32, %result64 : f16, f32, f64
+ }
+}
+
+// -
+
// Test that we handled properly operation with SymbolTable other than module
op
gpu.module @test_module {
"test.symbol_scope"() ({
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[llvm-branch-commits] [mlir] d536569 - [MLIR] Expose target configuration for lowering to NVVM
Author: Frederik Gossen
Date: 2020-12-09T10:29:38+01:00
New Revision: d53656900921de5bb26b849b5910efd05a233107
URL:
https://github.com/llvm/llvm-project/commit/d53656900921de5bb26b849b5910efd05a233107
DIFF:
https://github.com/llvm/llvm-project/commit/d53656900921de5bb26b849b5910efd05a233107.diff
LOG: [MLIR] Expose target configuration for lowering to NVVM
Differential Revision: https://reviews.llvm.org/D92871
Added:
Modified:
mlir/include/mlir/Conversion/GPUToNVVM/GPUToNVVMPass.h
mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
Removed:
diff --git a/mlir/include/mlir/Conversion/GPUToNVVM/GPUToNVVMPass.h
b/mlir/include/mlir/Conversion/GPUToNVVM/GPUToNVVMPass.h
index 1af13057f2ea..8be0a7cad017 100644
--- a/mlir/include/mlir/Conversion/GPUToNVVM/GPUToNVVMPass.h
+++ b/mlir/include/mlir/Conversion/GPUToNVVM/GPUToNVVMPass.h
@@ -14,6 +14,7 @@
namespace mlir {
class LLVMTypeConverter;
class OwningRewritePatternList;
+class ConversionTarget;
template class OperationPass;
@@ -21,6 +22,9 @@ namespace gpu {
class GPUModuleOp;
}
+/// Configure target to convert from to convert from the GPU dialect to NVVM.
+void configureGpuToNVVMConversionLegality(ConversionTarget &target);
+
/// Collect a set of patterns to convert from the GPU dialect to NVVM.
void populateGpuToNVVMConversionPatterns(LLVMTypeConverter &converter,
OwningRewritePatternList &patterns);
diff --git a/mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
b/mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
index 467c622f8bde..a0fe48175636 100644
--- a/mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
+++ b/mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
@@ -135,14 +135,7 @@ struct LowerGpuOpsToNVVMOpsPass
populateStdToLLVMConversionPatterns(converter, llvmPatterns);
populateGpuToNVVMConversionPatterns(converter, llvmPatterns);
LLVMConversionTarget target(getContext());
-target.addIllegalDialect();
-target.addIllegalOp();
-target.addIllegalOp();
-target.addLegalDialect();
-// TODO: Remove once we support replacing non-root ops.
-target.addLegalOp();
+configureGpuToNVVMConversionLegality(target);
if (failed(applyPartialConversion(m, target, std::move(llvmPatterns
signalPassFailure();
}
@@ -150,6 +143,19 @@ struct LowerGpuOpsToNVVMOpsPass
} // anonymous namespace
+void mlir::configureGpuToNVVMConversionLegality(ConversionTarget &target) {
+ target.addIllegalOp();
+ target.addLegalDialect<::mlir::LLVM::LLVMDialect>();
+ target.addLegalDialect<::mlir::NVVM::NVVMDialect>();
+ target.addIllegalDialect();
+ target.addIllegalOp();
+
+ // TODO: Remove once we support replacing non-root ops.
+ target.addLegalOp();
+}
+
void mlir::populateGpuToNVVMConversionPatterns(
LLVMTypeConverter &converter, OwningRewritePatternList &patterns) {
populateWithGenerated(converter.getDialect()->getContext(), patterns);
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[llvm-branch-commits] [mlir] 1c6bc2c - [MLIR] Add lowerings for atan and atan2 to ROCDL intrinsics
Author: Frederik Gossen
Date: 2020-12-14T10:43:19+01:00
New Revision: 1c6bc2c0b5afca9b4e7fdb33ea0ad95336df330c
URL:
https://github.com/llvm/llvm-project/commit/1c6bc2c0b5afca9b4e7fdb33ea0ad95336df330c
DIFF:
https://github.com/llvm/llvm-project/commit/1c6bc2c0b5afca9b4e7fdb33ea0ad95336df330c.diff
LOG: [MLIR] Add lowerings for atan and atan2 to ROCDL intrinsics
Differential Revision: https://reviews.llvm.org/D93123
Added:
Modified:
mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir
Removed:
diff --git a/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
b/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
index 4ed1f0761c92..b6f4238a4a5e 100644
--- a/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
+++ b/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
@@ -105,6 +105,10 @@ void mlir::populateGpuToROCDLConversionPatterns(
GPUFuncOpLowering<5>, GPUReturnOpLowering>(converter);
patterns.insert>(converter, "__ocml_fabs_f32",
"__ocml_fabs_f64");
+ patterns.insert>(converter, "__ocml_atan_f32",
+"__ocml_atan_f64");
+ patterns.insert>(converter, "__ocml_atan2_f32",
+ "__ocml_atan2_f64");
patterns.insert>(converter, "__ocml_ceil_f32",
"__ocml_ceil_f64");
patterns.insert>(converter, "__ocml_cos_f32",
diff --git a/mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir
b/mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir
index acc3826cacce..c57f98571df6 100644
--- a/mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir
+++ b/mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir
@@ -280,3 +280,33 @@ gpu.module @test_module {
std.return %result32, %result64 : f32, f64
}
}
+
+// -
+
+gpu.module @test_module {
+ // CHECK: llvm.func @__ocml_atan_f32(!llvm.float) -> !llvm.float
+ // CHECK: llvm.func @__ocml_atan_f64(!llvm.double) -> !llvm.double
+ // CHECK-LABEL: func @gpu_atan
+ func @gpu_atan(%arg_f32 : f32, %arg_f64 : f64) -> (f32, f64) {
+%result32 = std.atan %arg_f32 : f32
+// CHECK: llvm.call @__ocml_atan_f32(%{{.*}}) : (!llvm.float) ->
!llvm.float
+%result64 = std.atan %arg_f64 : f64
+// CHECK: llvm.call @__ocml_atan_f64(%{{.*}}) : (!llvm.double) ->
!llvm.double
+std.return %result32, %result64 : f32, f64
+ }
+}
+
+// -
+
+gpu.module @test_module {
+ // CHECK: llvm.func @__ocml_atan2_f32(!llvm.float, !llvm.float) ->
!llvm.float
+ // CHECK: llvm.func @__ocml_atan2_f64(!llvm.double, !llvm.double) ->
!llvm.double
+ // CHECK-LABEL: func @gpu_atan2
+ func @gpu_atan2(%arg_f32 : f32, %arg_f64 : f64) -> (f32, f64) {
+%result32 = std.atan2 %arg_f32, %arg_f32 : f32
+// CHECK: llvm.call @__ocml_atan2_f32(%{{.*}}) : (!llvm.float,
!llvm.float) -> !llvm.float
+%result64 = std.atan2 %arg_f64, %arg_f64 : f64
+// CHECK: llvm.call @__ocml_atan2_f64(%{{.*}}) : (!llvm.double,
!llvm.double) -> !llvm.double
+std.return %result32, %result64 : f32, f64
+ }
+}
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[llvm-branch-commits] [mlir] 75d9a46 - [MLIR] Add atan and atan2 lowerings to CUDA intrinsics
Author: Frederik Gossen
Date: 2020-12-14T10:45:28+01:00
New Revision: 75d9a46090249ed8abfafea090e686b4fecf182f
URL:
https://github.com/llvm/llvm-project/commit/75d9a46090249ed8abfafea090e686b4fecf182f
DIFF:
https://github.com/llvm/llvm-project/commit/75d9a46090249ed8abfafea090e686b4fecf182f.diff
LOG: [MLIR] Add atan and atan2 lowerings to CUDA intrinsics
Differential Revision: https://reviews.llvm.org/D93124
Added:
Modified:
mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
Removed:
diff --git a/mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
b/mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
index 3e90894e2fe9..a8b4d074a08e 100644
--- a/mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
+++ b/mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
@@ -173,6 +173,10 @@ void mlir::populateGpuToNVVMConversionPatterns(
GPUFuncOpLowering<0>>(converter);
patterns.insert>(converter, "__nv_fabsf",
"__nv_fabs");
+ patterns.insert>(converter, "__nv_atanf",
+"__nv_atan");
+ patterns.insert>(converter, "__nv_atan2f",
+ "__nv_atan2");
patterns.insert>(converter, "__nv_ceilf",
"__nv_ceil");
patterns.insert>(converter, "__nv_cosf",
diff --git a/mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
b/mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
index 1c0257de0d55..d8c4d7e064e5 100644
--- a/mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
+++ b/mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
@@ -335,6 +335,47 @@ gpu.module @test_module {
// -
+gpu.module @test_module {
+ // CHECK: llvm.func @__nv_atanf(!llvm.float) -> !llvm.float
+ // CHECK: llvm.func @__nv_atan(!llvm.double) -> !llvm.double
+ // CHECK-LABEL: func @gpu_atan
+ func @gpu_atan(%arg_f16 : f16, %arg_f32 : f32, %arg_f64 : f64)
+ -> (f16, f32, f64) {
+%result16 = std.atan %arg_f16 : f16
+// CHECK: llvm.fpext %{{.*}} : !llvm.half to !llvm.float
+// CHECK-NEXT: llvm.call @__nv_atanf(%{{.*}}) : (!llvm.float) ->
!llvm.float
+// CHECK-NEXT: llvm.fptrunc %{{.*}} : !llvm.float to !llvm.half
+%result32 = std.atan %arg_f32 : f32
+// CHECK: llvm.call @__nv_atanf(%{{.*}}) : (!llvm.float) -> !llvm.float
+%result64 = std.atan %arg_f64 : f64
+// CHECK: llvm.call @__nv_atan(%{{.*}}) : (!llvm.double) -> !llvm.double
+std.return %result16, %result32, %result64 : f16, f32, f64
+ }
+}
+
+// -
+
+gpu.module @test_module {
+ // CHECK: llvm.func @__nv_atan2f(!llvm.float, !llvm.float) -> !llvm.float
+ // CHECK: llvm.func @__nv_atan2(!llvm.double, !llvm.double) -> !llvm.double
+ // CHECK-LABEL: func @gpu_atan2
+ func @gpu_atan2(%arg_f16 : f16, %arg_f32 : f32, %arg_f64 : f64)
+ -> (f16, f32, f64) {
+%result16 = std.atan2 %arg_f16, %arg_f16 : f16
+// CHECK: llvm.fpext %{{.*}} : !llvm.half to !llvm.float
+// CHECK: llvm.fpext %{{.*}} : !llvm.half to !llvm.float
+// CHECK-NEXT: llvm.call @__nv_atan2f(%{{.*}}) : (!llvm.float,
!llvm.float) -> !llvm.float
+// CHECK-NEXT: llvm.fptrunc %{{.*}} : !llvm.float to !llvm.half
+%result32 = std.atan2 %arg_f32, %arg_f32 : f32
+// CHECK: llvm.call @__nv_atan2f(%{{.*}}) : (!llvm.float, !llvm.float) ->
!llvm.float
+%result64 = std.atan2 %arg_f64, %arg_f64 : f64
+// CHECK: llvm.call @__nv_atan2(%{{.*}}) : (!llvm.double, !llvm.double) ->
!llvm.double
+std.return %result16, %result32, %result64 : f16, f32, f64
+ }
+}
+
+// -
+
// Test that we handled properly operation with SymbolTable other than module
op
gpu.module @test_module {
"test.symbol_scope"() ({
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