[llvm-branch-commits] [mlir] af339f8 - Remove redundant casts.
Author: Adrian Kuegel Date: 2021-01-11T08:51:47+01:00 New Revision: af339f89a142622b6fc56c5f79d19e568af5287a URL: https://github.com/llvm/llvm-project/commit/af339f89a142622b6fc56c5f79d19e568af5287a DIFF: https://github.com/llvm/llvm-project/commit/af339f89a142622b6fc56c5f79d19e568af5287a.diff LOG: Remove redundant casts. Differential Revision: https://reviews.llvm.org/D94305 Added: Modified: mlir/lib/Conversion/StandardToLLVM/StandardToLLVM.cpp Removed: diff --git a/mlir/lib/Conversion/StandardToLLVM/StandardToLLVM.cpp b/mlir/lib/Conversion/StandardToLLVM/StandardToLLVM.cpp index 8023a8009758..53ebd6721863 100644 --- a/mlir/lib/Conversion/StandardToLLVM/StandardToLLVM.cpp +++ b/mlir/lib/Conversion/StandardToLLVM/StandardToLLVM.cpp @@ -1735,19 +1735,18 @@ struct CreateComplexOpLowering using ConvertOpToLLVMPattern::ConvertOpToLLVMPattern; LogicalResult - matchAndRewrite(CreateComplexOp op, ArrayRef operands, + matchAndRewrite(CreateComplexOp complexOp, ArrayRef operands, ConversionPatternRewriter &rewriter) const override { -auto complexOp = cast(op); CreateComplexOp::Adaptor transformed(operands); // Pack real and imaginary part in a complex number struct. -auto loc = op.getLoc(); +auto loc = complexOp.getLoc(); auto structType = typeConverter->convertType(complexOp.getType()); auto complexStruct = ComplexStructBuilder::undef(rewriter, loc, structType); complexStruct.setReal(rewriter, loc, transformed.real()); complexStruct.setImaginary(rewriter, loc, transformed.imaginary()); -rewriter.replaceOp(op, {complexStruct}); +rewriter.replaceOp(complexOp, {complexStruct}); return success(); } }; @@ -1794,8 +1793,7 @@ template BinaryComplexOperands unpackBinaryComplexOperands(OpTy op, ArrayRef operands, ConversionPatternRewriter &rewriter) { - auto bop = cast(op); - auto loc = bop.getLoc(); + auto loc = op.getLoc(); typename OpTy::Adaptor transformed(operands); // Extract real and imaginary values from operands. ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [mlir] bd941c8 - [mlir][Tensor] Fix wrong comment (NFC)
Author: Adrian Kuegel Date: 2022-04-13T14:30:55+02:00 New Revision: bd941c83f51af4b6ee18d6a228dc1cf20bcf1443 URL: https://github.com/llvm/llvm-project/commit/bd941c83f51af4b6ee18d6a228dc1cf20bcf1443 DIFF: https://github.com/llvm/llvm-project/commit/bd941c83f51af4b6ee18d6a228dc1cf20bcf1443.diff LOG: [mlir][Tensor] Fix wrong comment (NFC) Added: Modified: mlir/include/mlir/Dialect/Tensor/IR/TensorOps.td Removed: diff --git a/mlir/include/mlir/Dialect/Tensor/IR/TensorOps.td b/mlir/include/mlir/Dialect/Tensor/IR/TensorOps.td index 660c80865abda..edb1f20b3cd8a 100644 --- a/mlir/include/mlir/Dialect/Tensor/IR/TensorOps.td +++ b/mlir/include/mlir/Dialect/Tensor/IR/TensorOps.td @@ -516,7 +516,7 @@ def Tensor_InsertSliceOp : Tensor_OpWithOffsetSizesAndStrides<"insert_slice", [ Example: ``` -// Rank-reducing extract_slice. +// Rank-altering insert_slice. %1 = tensor.insert_slice %t into %0[0, 0, 0][1, 16, 4][1, 1, 1] : tensor<16x4xf32> into tensor<8x16x4xf32> %3 = tensor.insert_slice %tt into %2[%o0, 4, %o2][1, %sz1, 1][1, %st1, 1] : ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] 25a02c3 - Revert "PR24076, PR33655, C++ CWG 1558: Consider the instantiation-dependence of"
Author: Adrian Kuegel Date: 2020-12-23T12:31:52+01:00 New Revision: 25a02c3d1a688d3cd18faef96c75fa553efbbac7 URL: https://github.com/llvm/llvm-project/commit/25a02c3d1a688d3cd18faef96c75fa553efbbac7 DIFF: https://github.com/llvm/llvm-project/commit/25a02c3d1a688d3cd18faef96c75fa553efbbac7.diff LOG: Revert "PR24076, PR33655, C++ CWG 1558: Consider the instantiation-dependence of" This reverts commit d3bf0bb18952d830fe6df6f791a64552b271000b. This causes compilation in certain cases to fail. Reproducer TBD. Added: Modified: clang/include/clang/AST/Type.h clang/lib/AST/ItaniumMangle.cpp clang/test/CXX/drs/dr15xx.cpp clang/test/CodeGenCXX/mangle-template.cpp clang/test/SemaTemplate/partial-spec-instantiate.cpp clang/www/cxx_dr_status.html Removed: clang/test/SemaTemplate/instantiation-dependence.cpp diff --git a/clang/include/clang/AST/Type.h b/clang/include/clang/AST/Type.h index 21c8bf79152e..684005c4876d 100644 --- a/clang/include/clang/AST/Type.h +++ b/clang/include/clang/AST/Type.h @@ -5411,9 +5411,7 @@ class ElaboratedType final ElaboratedType(ElaboratedTypeKeyword Keyword, NestedNameSpecifier *NNS, QualType NamedType, QualType CanonType, TagDecl *OwnedTagDecl) : TypeWithKeyword(Keyword, Elaborated, CanonType, -NamedType->getDependence() | -(NNS ? toTypeDependence(NNS->getDependence()) - : TypeDependence::None)), +NamedType->getDependence()), NNS(NNS), NamedType(NamedType) { ElaboratedTypeBits.HasOwnedTagDecl = false; if (OwnedTagDecl) { diff --git a/clang/lib/AST/ItaniumMangle.cpp b/clang/lib/AST/ItaniumMangle.cpp index 6c8d5687c64a..73c8f17a5d36 100644 --- a/clang/lib/AST/ItaniumMangle.cpp +++ b/clang/lib/AST/ItaniumMangle.cpp @@ -2578,10 +2578,6 @@ void CXXNameMangler::mangleType(QualType T) { if (!TST->isTypeAlias()) break; - // FIXME: We presumably shouldn't strip off ElaboratedTypes with - // instantation-dependent qualifiers. See - // https://github.com/itanium-cxx-abi/cxx-abi/issues/114. - QualType Desugared = T.getSingleStepDesugaredType(Context.getASTContext()); if (Desugared == T) diff --git a/clang/test/CXX/drs/dr15xx.cpp b/clang/test/CXX/drs/dr15xx.cpp index 8bfa29a8b667..478a0d7d00dd 100644 --- a/clang/test/CXX/drs/dr15xx.cpp +++ b/clang/test/CXX/drs/dr15xx.cpp @@ -239,20 +239,6 @@ namespace dr1550 { // dr1550: yes } } -namespace dr1558 { // dr1558: 12 -#if __cplusplus >= 201103L - template using first_of = T; - template first_of f(int); // expected-note {{'int' cannot be used prior to '::'}} - template void f(...) = delete; // expected-note {{deleted}} - - struct X { typedef void type; }; - void test() { -f(0); -f(0); // expected-error {{deleted}} - } -#endif -} - namespace dr1560 { // dr1560: 3.5 void f(bool b, int n) { (b ? throw 0 : n) = (b ? n : throw 0) = 0; diff --git a/clang/test/CodeGenCXX/mangle-template.cpp b/clang/test/CodeGenCXX/mangle-template.cpp index 40688de7e12e..9b5220572c2e 100644 --- a/clang/test/CodeGenCXX/mangle-template.cpp +++ b/clang/test/CodeGenCXX/mangle-template.cpp @@ -342,23 +342,3 @@ namespace fixed_size_parameter_pack { template void f(A::B<0, Ns...>); void g() { f<1, 2>({}); } } - -namespace type_qualifier { - template using int_t = int; - template void f(decltype(int_t() + 1)) {} - // FIXME: This mangling doesn't work: we need to mangle the - // instantiation-dependent 'int_t' operand. - // CHECK: @_ZN14type_qualifier1fIPiEEvDTplcvi_ELi1EE - template void f(int); - - // Note that this template has diff erent constraints but would mangle the - // same: - //template void f(decltype(int_t() + 1)) {} - - struct impl { using type = void; }; - template using alias = impl; - template void g(decltype(alias::type(), 1)) {} - // FIXME: Similarly we need to mangle the `T*` in here. - // CHECK: @_ZN14type_qualifier1gIPiEEvDTcmcvv_ELi1EE - template void g(int); -} diff --git a/clang/test/SemaTemplate/instantiation-dependence.cpp b/clang/test/SemaTemplate/instantiation-dependence.cpp deleted file mode 100644 index 75eb510cb68d.. --- a/clang/test/SemaTemplate/instantiation-dependence.cpp +++ /dev/null @@ -1,74 +0,0 @@ -// RUN: %clang_cc1 -std=c++2b -verify %s - -// Ensure we substitute into instantiation-dependent but non-dependent -// constructs. The poster-child for this is... -template using void_t = void; - -namespace PR24076 { - template T declval(); - struct s {}; - - template() + 1)>> -void foo(T) {} // expected-note {{invalid operands to binary expression}} - - void f() { -foo(s{}); // expected-error {{no matching function}} - } - - template() + 1)>> // expected-error {{invalid operands to binary expression}} - struct bar {}; - - bar b
[llvm-branch-commits] [mlir] 09f717b - Add sqrt lowering from standard to ROCDL
Author: Adrian Kuegel Date: 2020-12-10T09:47:37+01:00 New Revision: 09f717b929ae040ae1bf9e9ec56f6dd4a5dba2f8 URL: https://github.com/llvm/llvm-project/commit/09f717b929ae040ae1bf9e9ec56f6dd4a5dba2f8 DIFF: https://github.com/llvm/llvm-project/commit/09f717b929ae040ae1bf9e9ec56f6dd4a5dba2f8.diff LOG: Add sqrt lowering from standard to ROCDL Add a lowering for sqrt from standard dialect to ROCDL. Differential Revision: https://reviews.llvm.org/D92921 Added: Modified: mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir Removed: diff --git a/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp b/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp index 7b2e2943ce1f..4d81e2cc1f78 100644 --- a/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp +++ b/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp @@ -72,7 +72,7 @@ struct LowerGpuOpsToROCDLOpsPass target.addIllegalDialect(); target.addIllegalOp(); +LLVM::Log2Op, LLVM::SinOp, LLVM::SqrtOp>(); target.addIllegalOp(); target.addLegalDialect(); // TODO: Remove once we support replacing non-root ops. @@ -115,6 +115,8 @@ void mlir::populateGpuToROCDLConversionPatterns( "__ocml_log2_f64"); patterns.insert>(converter, "__ocml_sin_f32", "__ocml_sin_f64"); + patterns.insert>(converter, "__ocml_sqrt_f32", +"__ocml_sqrt_f64"); patterns.insert>(converter, "__ocml_tanh_f32", "__ocml_tanh_f64"); } diff --git a/mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir b/mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir index b17d75fd7afb..759d2f2d2d70 100644 --- a/mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir +++ b/mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir @@ -228,6 +228,26 @@ gpu.module @test_module { // - +gpu.module @test_module { + // CHECK: llvm.func @__ocml_sqrt_f32(!llvm.float) -> !llvm.float + // CHECK: llvm.func @__ocml_sqrt_f64(!llvm.double) -> !llvm.double + // CHECK-LABEL: func @gpu_sqrt + func @gpu_sqrt(%arg_f16 : f16, %arg_f32 : f32, %arg_f64 : f64) + -> (f16, f32, f64) { +%result16 = std.sqrt %arg_f16 : f16 +// CHECK: llvm.fpext %{{.*}} : !llvm.half to !llvm.float +// CHECK-NEXT: llvm.call @__ocml_sqrt_f32(%{{.*}}) : (!llvm.float) -> !llvm.float +// CHECK-NEXT: llvm.fptrunc %{{.*}} : !llvm.float to !llvm.half +%result32 = std.sqrt %arg_f32 : f32 +// CHECK: llvm.call @__ocml_sqrt_f32(%{{.*}}) : (!llvm.float) -> !llvm.float +%result64 = std.sqrt %arg_f64 : f64 +// CHECK: llvm.call @__ocml_sqrt_f64(%{{.*}}) : (!llvm.double) -> !llvm.double +std.return %result16, %result32, %result64 : f16, f32, f64 + } +} + +// - + gpu.module @test_module { // CHECK: llvm.func @__ocml_tanh_f32(!llvm.float) -> !llvm.float // CHECK: llvm.func @__ocml_tanh_f64(!llvm.double) -> !llvm.double ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [mlir] ada4c7a - Add rsqrt lowering from standard to ROCDL.
Author: Adrian Kuegel Date: 2020-12-11T13:18:57+01:00 New Revision: ada4c7a351710f05a02c84f5643de925aa4dedfc URL: https://github.com/llvm/llvm-project/commit/ada4c7a351710f05a02c84f5643de925aa4dedfc DIFF: https://github.com/llvm/llvm-project/commit/ada4c7a351710f05a02c84f5643de925aa4dedfc.diff LOG: Add rsqrt lowering from standard to ROCDL. Add a lowering for rsqrt from standard dialect to ROCDL. Differential Revision: https://reviews.llvm.org/D93011 Added: Modified: mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir Removed: diff --git a/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp b/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp index 4d81e2cc1f78..e8c8a1fc3eb9 100644 --- a/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp +++ b/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp @@ -113,6 +113,8 @@ void mlir::populateGpuToROCDLConversionPatterns( "__ocml_log10_f64"); patterns.insert>(converter, "__ocml_log2_f32", "__ocml_log2_f64"); + patterns.insert>(converter, "__ocml_rsqrt_f32", + "__ocml_rsqrt_f64"); patterns.insert>(converter, "__ocml_sin_f32", "__ocml_sin_f64"); patterns.insert>(converter, "__ocml_sqrt_f32", diff --git a/mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir b/mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir index 759d2f2d2d70..acc3826cacce 100644 --- a/mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir +++ b/mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir @@ -228,6 +228,26 @@ gpu.module @test_module { // - +gpu.module @test_module { + // CHECK: llvm.func @__ocml_rsqrt_f32(!llvm.float) -> !llvm.float + // CHECK: llvm.func @__ocml_rsqrt_f64(!llvm.double) -> !llvm.double + // CHECK-LABEL: func @gpu_rsqrt + func @gpu_rsqrt(%arg_f16 : f16, %arg_f32 : f32, %arg_f64 : f64) + -> (f16, f32, f64) { +%result16 = std.rsqrt %arg_f16 : f16 +// CHECK: llvm.fpext %{{.*}} : !llvm.half to !llvm.float +// CHECK-NEXT: llvm.call @__ocml_rsqrt_f32(%{{.*}}) : (!llvm.float) -> !llvm.float +// CHECK-NEXT: llvm.fptrunc %{{.*}} : !llvm.float to !llvm.half +%result32 = std.rsqrt %arg_f32 : f32 +// CHECK: llvm.call @__ocml_rsqrt_f32(%{{.*}}) : (!llvm.float) -> !llvm.float +%result64 = std.rsqrt %arg_f64 : f64 +// CHECK: llvm.call @__ocml_rsqrt_f64(%{{.*}}) : (!llvm.double) -> !llvm.double +std.return %result16, %result32, %result64 : f16, f32, f64 + } +} + +// - + gpu.module @test_module { // CHECK: llvm.func @__ocml_sqrt_f32(!llvm.float) -> !llvm.float // CHECK: llvm.func @__ocml_sqrt_f64(!llvm.double) -> !llvm.double ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [mlir] 9122070 - [mlir] Expose target configuration for lowering to ROCDL.
Author: Adrian Kuegel Date: 2020-12-11T13:20:53+01:00 New Revision: 91220705632ed20dd06d1c0dc21b888302ee324e URL: https://github.com/llvm/llvm-project/commit/91220705632ed20dd06d1c0dc21b888302ee324e DIFF: https://github.com/llvm/llvm-project/commit/91220705632ed20dd06d1c0dc21b888302ee324e.diff LOG: [mlir] Expose target configuration for lowering to ROCDL. Differential Revision: https://reviews.llvm.org/D93028 Added: Modified: mlir/include/mlir/Conversion/GPUToNVVM/GPUToNVVMPass.h mlir/include/mlir/Conversion/GPUToROCDL/GPUToROCDLPass.h mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp Removed: diff --git a/mlir/include/mlir/Conversion/GPUToNVVM/GPUToNVVMPass.h b/mlir/include/mlir/Conversion/GPUToNVVM/GPUToNVVMPass.h index 8be0a7cad017..233b947bcfed 100644 --- a/mlir/include/mlir/Conversion/GPUToNVVM/GPUToNVVMPass.h +++ b/mlir/include/mlir/Conversion/GPUToNVVM/GPUToNVVMPass.h @@ -22,7 +22,7 @@ namespace gpu { class GPUModuleOp; } -/// Configure target to convert from to convert from the GPU dialect to NVVM. +/// Configure target to convert from the GPU dialect to NVVM. void configureGpuToNVVMConversionLegality(ConversionTarget &target); /// Collect a set of patterns to convert from the GPU dialect to NVVM. diff --git a/mlir/include/mlir/Conversion/GPUToROCDL/GPUToROCDLPass.h b/mlir/include/mlir/Conversion/GPUToROCDL/GPUToROCDLPass.h index 677782b2dc67..5fa798bf2834 100644 --- a/mlir/include/mlir/Conversion/GPUToROCDL/GPUToROCDLPass.h +++ b/mlir/include/mlir/Conversion/GPUToROCDL/GPUToROCDLPass.h @@ -14,6 +14,7 @@ namespace mlir { class LLVMTypeConverter; class OwningRewritePatternList; +class ConversionTarget; template class OperationPass; @@ -26,6 +27,9 @@ class GPUModuleOp; void populateGpuToROCDLConversionPatterns(LLVMTypeConverter &converter, OwningRewritePatternList &patterns); +/// Configure target to convert from the GPU dialect to ROCDL. +void configureGpuToROCDLConversionLegality(ConversionTarget &target); + /// Creates a pass that lowers GPU dialect operations to ROCDL counterparts. The /// index bitwidth used for the lowering of the device side index computations /// is configurable. diff --git a/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp b/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp index e8c8a1fc3eb9..4ed1f0761c92 100644 --- a/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp +++ b/mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp @@ -69,14 +69,7 @@ struct LowerGpuOpsToROCDLOpsPass populateStdToLLVMConversionPatterns(converter, llvmPatterns); populateGpuToROCDLConversionPatterns(converter, llvmPatterns); LLVMConversionTarget target(getContext()); -target.addIllegalDialect(); -target.addIllegalOp(); -target.addIllegalOp(); -target.addLegalDialect(); -// TODO: Remove once we support replacing non-root ops. -target.addLegalOp(); +configureGpuToROCDLConversionLegality(target); if (failed(applyPartialConversion(m, target, std::move(llvmPatterns signalPassFailure(); } @@ -84,6 +77,19 @@ struct LowerGpuOpsToROCDLOpsPass } // anonymous namespace +void mlir::configureGpuToROCDLConversionLegality(ConversionTarget &target) { + target.addIllegalOp(); + target.addLegalDialect<::mlir::LLVM::LLVMDialect>(); + target.addLegalDialect(); + target.addIllegalDialect(); + target.addIllegalOp(); + + // TODO: Remove once we support replacing non-root ops. + target.addLegalOp(); +} + void mlir::populateGpuToROCDLConversionPatterns( LLVMTypeConverter &converter, OwningRewritePatternList &patterns) { populateWithGenerated(converter.getDialect()->getContext(), patterns); ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] 4e4178d - [clang] Add an API to retrieve implicit constructor arguments.
Author: Martin Böhme Date: 2020-05-19T08:39:55+02:00 New Revision: 4e4178d2c64463eeb72bbd0375118012af7c0d64 URL: https://github.com/llvm/llvm-project/commit/4e4178d2c64463eeb72bbd0375118012af7c0d64 DIFF: https://github.com/llvm/llvm-project/commit/4e4178d2c64463eeb72bbd0375118012af7c0d64.diff LOG: [clang] Add an API to retrieve implicit constructor arguments. Summary: This is needed in Swift for C++ interop -- see here for the corresponding Swift change: https://github.com/apple/swift/pull/30630 As part of this change, I've had to make some changes to the interface of CGCXXABI to return the additional parameters separately rather than adding them directly to a `CallArgList`. Differential Revision: https://reviews.llvm.org/D79942 Added: Modified: clang/include/clang/CodeGen/CodeGenABITypes.h clang/lib/CodeGen/CGCXXABI.cpp clang/lib/CodeGen/CGCXXABI.h clang/lib/CodeGen/CGCall.cpp clang/lib/CodeGen/CGClass.cpp clang/lib/CodeGen/CodeGenABITypes.cpp clang/lib/CodeGen/ItaniumCXXABI.cpp clang/lib/CodeGen/MicrosoftCXXABI.cpp Removed: diff --git a/clang/include/clang/CodeGen/CodeGenABITypes.h b/clang/include/clang/CodeGen/CodeGenABITypes.h index 255e1603509e..0201f92074ec 100644 --- a/clang/include/clang/CodeGen/CodeGenABITypes.h +++ b/clang/include/clang/CodeGen/CodeGenABITypes.h @@ -39,6 +39,7 @@ class Type; namespace clang { class ASTContext; +class CXXConstructorDecl; class CXXRecordDecl; class CXXMethodDecl; class CodeGenOptions; @@ -53,6 +54,16 @@ namespace CodeGen { class CGFunctionInfo; class CodeGenModule; +/// Additional implicit arguments to add to a constructor argument list. +struct ImplicitCXXConstructorArgs { + /// Implicit arguments to add before the explicit arguments, but after the + /// `*this` argument (which always comes first). + SmallVector Prefix; + + /// Implicit arguments to add after the explicit arguments. + SmallVector Suffix; +}; + const CGFunctionInfo &arrangeObjCMessageSendSignature(CodeGenModule &CGM, const ObjCMethodDecl *MD, QualType receiverType); @@ -74,6 +85,11 @@ const CGFunctionInfo &arrangeFreeFunctionCall(CodeGenModule &CGM, FunctionType::ExtInfo info, RequiredArgs args); +/// Returns the implicit arguments to add to a complete, non-delegating C++ +/// constructor call. +ImplicitCXXConstructorArgs +getImplicitCXXConstructorArgs(CodeGenModule &CGM, const CXXConstructorDecl *D); + /// Returns null if the function type is incomplete and can't be lowered. llvm::FunctionType *convertFreeFunctionType(CodeGenModule &CGM, const FunctionDecl *FD); diff --git a/clang/lib/CodeGen/CGCXXABI.cpp b/clang/lib/CodeGen/CGCXXABI.cpp index 7ada4032b3ee..928fbaea8278 100644 --- a/clang/lib/CodeGen/CGCXXABI.cpp +++ b/clang/lib/CodeGen/CGCXXABI.cpp @@ -313,3 +313,20 @@ CatchTypeInfo CGCXXABI::getCatchAllTypeInfo() { std::vector CGCXXABI::getVBPtrOffsets(const CXXRecordDecl *RD) { return std::vector(); } + +CGCXXABI::AddedStructorArgCounts CGCXXABI::addImplicitConstructorArgs( +CodeGenFunction &CGF, const CXXConstructorDecl *D, CXXCtorType Type, +bool ForVirtualBase, bool Delegating, CallArgList &Args) { + AddedStructorArgs AddedArgs = + getImplicitConstructorArgs(CGF, D, Type, ForVirtualBase, Delegating); + for (size_t i = 0; i < AddedArgs.Prefix.size(); ++i) { +Args.insert(Args.begin() + 1 + i, +CallArg(RValue::get(AddedArgs.Prefix[i].Value), +AddedArgs.Prefix[i].Type)); + } + for (const auto &arg : AddedArgs.Suffix) { +Args.add(RValue::get(arg.Value), arg.Type); + } + return AddedStructorArgCounts(AddedArgs.Prefix.size(), +AddedArgs.Suffix.size()); +} diff --git a/clang/lib/CodeGen/CGCXXABI.h b/clang/lib/CodeGen/CGCXXABI.h index bff49be7a3c4..f5f378510950 100644 --- a/clang/lib/CodeGen/CGCXXABI.h +++ b/clang/lib/CodeGen/CGCXXABI.h @@ -16,6 +16,7 @@ #include "CodeGenFunction.h" #include "clang/Basic/LLVM.h" +#include "clang/CodeGen/CodeGenABITypes.h" namespace llvm { class Constant; @@ -287,24 +288,44 @@ class CGCXXABI { /// Emit constructor variants required by this ABI. virtual void EmitCXXConstructors(const CXXConstructorDecl *D) = 0; - /// Notes how many arguments were added to the beginning (Prefix) and ending - /// (Suffix) of an arg list. + /// Additional implicit arguments to add to the beginning (Prefix) and end + /// (Suffix) of a constructor / destructor arg list. /// - /// Note that Prefix actually refers to the number of args *after* the first - /// one: `this` arguments always come first. + /// Note that Prefix should actually be inserted *af