[llvm-branch-commits] [lld] e5320aa - Revert "[LLD][COFF] Display the size of all consumed inputs with `/summary` (…"
Author: Alexandre Ganea
Date: 2025-09-06T12:00:25-04:00
New Revision: e5320aafc3424576c7f140ddb9d3fcc028084633
URL:
https://github.com/llvm/llvm-project/commit/e5320aafc3424576c7f140ddb9d3fcc028084633
DIFF:
https://github.com/llvm/llvm-project/commit/e5320aafc3424576c7f140ddb9d3fcc028084633.diff
LOG: Revert "[LLD][COFF] Display the size of all consumed inputs with
`/summary` (…"
This reverts commit 7eb889a8c6d8d62eb18dcc8f4b7fb7caba901d99.
Added:
Modified:
lld/COFF/COFFLinkerContext.h
lld/COFF/Driver.cpp
lld/COFF/PDB.cpp
lld/test/COFF/pdb-type-server-simple.test
lld/test/COFF/precomp-link-samename.test
lld/test/COFF/precomp-link.test
lld/test/COFF/precomp-summary-fail.test
Removed:
diff --git a/lld/COFF/COFFLinkerContext.h b/lld/COFF/COFFLinkerContext.h
index b44263b5a3390..f45b754384ef9 100644
--- a/lld/COFF/COFFLinkerContext.h
+++ b/lld/COFF/COFFLinkerContext.h
@@ -61,7 +61,6 @@ class COFFLinkerContext : public CommonLinkerContext {
std::vector objFileInstances;
std::map pdbInputFileInstances;
std::vector importFileInstances;
- std::int64_t consumedInputsSize = 0;
MergeChunk *mergeChunkInstances[Log2MaxSectionAlignment + 1] = {};
diff --git a/lld/COFF/Driver.cpp b/lld/COFF/Driver.cpp
index acba156ce341d..29e7637435f87 100644
--- a/lld/COFF/Driver.cpp
+++ b/lld/COFF/Driver.cpp
@@ -205,7 +205,6 @@ void LinkerDriver::addFile(InputFile *file) {
else
cast(file)->parseLazy();
} else {
-ctx.consumedInputsSize += file->mb.getBufferSize();
file->parse();
if (auto *f = dyn_cast(file)) {
ctx.objFileInstances.push_back(f);
diff --git a/lld/COFF/PDB.cpp b/lld/COFF/PDB.cpp
index e5c62af28fdd2..94eeae2797971 100644
--- a/lld/COFF/PDB.cpp
+++ b/lld/COFF/PDB.cpp
@@ -44,7 +44,6 @@
#include "llvm/Object/CVDebugRecord.h"
#include "llvm/Support/CRC.h"
#include "llvm/Support/Endian.h"
-#include "llvm/Support/FormatAdapters.h"
#include "llvm/Support/FormatVariadic.h"
#include "llvm/Support/Path.h"
#include "llvm/Support/ScopedPrinter.h"
@@ -1248,19 +1247,15 @@ void PDBLinker::printStats() {
<< std::string(80, '-') << '\n';
auto print = [&](uint64_t v, StringRef s) {
-stream << formatv("{0}",
- fmt_align(formatv("{0:N}", v), AlignStyle::Right, 20))
- << " " << s << '\n';
+stream << format_decimal(v, 15) << " " << s << '\n';
};
print(ctx.objFileInstances.size(),
"Input OBJ files (expanded from all cmd-line inputs)");
- print(ctx.consumedInputsSize,
-"Size of all consumed OBJ files (non-lazy), in bytes");
print(ctx.typeServerSourceMappings.size(), "PDB type server dependencies");
print(ctx.precompSourceMappings.size(), "Precomp OBJ dependencies");
print(nbTypeRecords, "Input type records");
- print(nbTypeRecordsBytes, "Size of all input type records, in bytes");
+ print(nbTypeRecordsBytes, "Input type records bytes");
print(builder.getTpiBuilder().getRecordCount(), "Merged TPI records");
print(builder.getIpiBuilder().getRecordCount(), "Merged IPI records");
print(pdbStrTab.size(), "Output PDB strings");
diff --git a/lld/test/COFF/pdb-type-server-simple.test
b/lld/test/COFF/pdb-type-server-simple.test
index 5323a078ac432..93d66cde4f712 100644
--- a/lld/test/COFF/pdb-type-server-simple.test
+++ b/lld/test/COFF/pdb-type-server-simple.test
@@ -106,18 +106,17 @@ CHECK-LABEL: Mod 0002 | `* Linker *`:
SUMMARY: Summary
SUMMARY-NEXT:
-SUMMARY-NEXT:2 Input OBJ files (expanded from all cmd-line
inputs)
-SUMMARY-NEXT: Size of all consumed OBJ files (non-lazy), in bytes
-SUMMARY-NEXT:1 PDB type server dependencies
-SUMMARY-NEXT:0 Precomp OBJ dependencies
-SUMMARY-NEXT: 25 Input type records
-SUMMARY-NEXT: 868 Size of all input type records, in bytes
-SUMMARY-NEXT:9 Merged TPI records
-SUMMARY-NEXT: 16 Merged IPI records
-SUMMARY-NEXT:3 Output PDB strings
-SUMMARY-NEXT:4 Global symbol records
-SUMMARY-NEXT: 14 Module symbol records
-SUMMARY-NEXT:2 Public symbol records
+SUMMARY-NEXT: 2 Input OBJ files (expanded from all cmd-line
inputs)
+SUMMARY-NEXT: 1 PDB type server dependencies
+SUMMARY-NEXT: 0 Precomp OBJ dependencies
+SUMMARY-NEXT: 25 Input type records
+SUMMARY-NEXT: 868 Input type records bytes
+SUMMARY-NEXT: 9 Merged TPI records
+SUMMARY-NEXT: 16 Merged IPI records
+SUMMARY-NEXT: 3 Output PDB strings
+SUMMARY-NEXT: 4 Global symbol records
+SUMMARY-NEXT: 14 Module symbol record
[llvm-branch-commits] [lld] e5320aa - Revert "[LLD][COFF] Display the size of all consumed inputs with `/summary` (…"
Author: Alexandre Ganea
Date: 2025-09-06T12:00:25-04:00
New Revision: e5320aafc3424576c7f140ddb9d3fcc028084633
URL:
https://github.com/llvm/llvm-project/commit/e5320aafc3424576c7f140ddb9d3fcc028084633
DIFF:
https://github.com/llvm/llvm-project/commit/e5320aafc3424576c7f140ddb9d3fcc028084633.diff
LOG: Revert "[LLD][COFF] Display the size of all consumed inputs with
`/summary` (…"
This reverts commit 7eb889a8c6d8d62eb18dcc8f4b7fb7caba901d99.
Added:
Modified:
lld/COFF/COFFLinkerContext.h
lld/COFF/Driver.cpp
lld/COFF/PDB.cpp
lld/test/COFF/pdb-type-server-simple.test
lld/test/COFF/precomp-link-samename.test
lld/test/COFF/precomp-link.test
lld/test/COFF/precomp-summary-fail.test
Removed:
diff --git a/lld/COFF/COFFLinkerContext.h b/lld/COFF/COFFLinkerContext.h
index b44263b5a3390..f45b754384ef9 100644
--- a/lld/COFF/COFFLinkerContext.h
+++ b/lld/COFF/COFFLinkerContext.h
@@ -61,7 +61,6 @@ class COFFLinkerContext : public CommonLinkerContext {
std::vector objFileInstances;
std::map pdbInputFileInstances;
std::vector importFileInstances;
- std::int64_t consumedInputsSize = 0;
MergeChunk *mergeChunkInstances[Log2MaxSectionAlignment + 1] = {};
diff --git a/lld/COFF/Driver.cpp b/lld/COFF/Driver.cpp
index acba156ce341d..29e7637435f87 100644
--- a/lld/COFF/Driver.cpp
+++ b/lld/COFF/Driver.cpp
@@ -205,7 +205,6 @@ void LinkerDriver::addFile(InputFile *file) {
else
cast(file)->parseLazy();
} else {
-ctx.consumedInputsSize += file->mb.getBufferSize();
file->parse();
if (auto *f = dyn_cast(file)) {
ctx.objFileInstances.push_back(f);
diff --git a/lld/COFF/PDB.cpp b/lld/COFF/PDB.cpp
index e5c62af28fdd2..94eeae2797971 100644
--- a/lld/COFF/PDB.cpp
+++ b/lld/COFF/PDB.cpp
@@ -44,7 +44,6 @@
#include "llvm/Object/CVDebugRecord.h"
#include "llvm/Support/CRC.h"
#include "llvm/Support/Endian.h"
-#include "llvm/Support/FormatAdapters.h"
#include "llvm/Support/FormatVariadic.h"
#include "llvm/Support/Path.h"
#include "llvm/Support/ScopedPrinter.h"
@@ -1248,19 +1247,15 @@ void PDBLinker::printStats() {
<< std::string(80, '-') << '\n';
auto print = [&](uint64_t v, StringRef s) {
-stream << formatv("{0}",
- fmt_align(formatv("{0:N}", v), AlignStyle::Right, 20))
- << " " << s << '\n';
+stream << format_decimal(v, 15) << " " << s << '\n';
};
print(ctx.objFileInstances.size(),
"Input OBJ files (expanded from all cmd-line inputs)");
- print(ctx.consumedInputsSize,
-"Size of all consumed OBJ files (non-lazy), in bytes");
print(ctx.typeServerSourceMappings.size(), "PDB type server dependencies");
print(ctx.precompSourceMappings.size(), "Precomp OBJ dependencies");
print(nbTypeRecords, "Input type records");
- print(nbTypeRecordsBytes, "Size of all input type records, in bytes");
+ print(nbTypeRecordsBytes, "Input type records bytes");
print(builder.getTpiBuilder().getRecordCount(), "Merged TPI records");
print(builder.getIpiBuilder().getRecordCount(), "Merged IPI records");
print(pdbStrTab.size(), "Output PDB strings");
diff --git a/lld/test/COFF/pdb-type-server-simple.test
b/lld/test/COFF/pdb-type-server-simple.test
index 5323a078ac432..93d66cde4f712 100644
--- a/lld/test/COFF/pdb-type-server-simple.test
+++ b/lld/test/COFF/pdb-type-server-simple.test
@@ -106,18 +106,17 @@ CHECK-LABEL: Mod 0002 | `* Linker *`:
SUMMARY: Summary
SUMMARY-NEXT:
-SUMMARY-NEXT:2 Input OBJ files (expanded from all cmd-line
inputs)
-SUMMARY-NEXT: Size of all consumed OBJ files (non-lazy), in bytes
-SUMMARY-NEXT:1 PDB type server dependencies
-SUMMARY-NEXT:0 Precomp OBJ dependencies
-SUMMARY-NEXT: 25 Input type records
-SUMMARY-NEXT: 868 Size of all input type records, in bytes
-SUMMARY-NEXT:9 Merged TPI records
-SUMMARY-NEXT: 16 Merged IPI records
-SUMMARY-NEXT:3 Output PDB strings
-SUMMARY-NEXT:4 Global symbol records
-SUMMARY-NEXT: 14 Module symbol records
-SUMMARY-NEXT:2 Public symbol records
+SUMMARY-NEXT: 2 Input OBJ files (expanded from all cmd-line
inputs)
+SUMMARY-NEXT: 1 PDB type server dependencies
+SUMMARY-NEXT: 0 Precomp OBJ dependencies
+SUMMARY-NEXT: 25 Input type records
+SUMMARY-NEXT: 868 Input type records bytes
+SUMMARY-NEXT: 9 Merged TPI records
+SUMMARY-NEXT: 16 Merged IPI records
+SUMMARY-NEXT: 3 Output PDB strings
+SUMMARY-NEXT: 4 Global symbol records
+SUMMARY-NEXT: 14 Module symbol record
[llvm-branch-commits] [libc] Use UMAXV.4S to reduce bcmp result. (PR #99260)
overmighty wrote: FYI, ~2 weeks ago I tried to reproduce your benchmark results on Android and I managed to cross-compile the benchmark from `main` and run it, but couldn't get it to compile from this PR's branch. https://github.com/llvm/llvm-project/pull/99260 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] Use lit internal shell by default (PR #157237)
https://github.com/boomanaiden154 created https://github.com/llvm/llvm-project/pull/157237 This should result in a 10-15% test time improvement and also richer test failure outputn on Linux where it is not yet the default. We can do this now that all of the tests have been ported over to work with lit's internal shell. Fixes #102697. ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [not] Update disable-symbolization.test to work with internal shell (PR #157236)
https://github.com/MaskRay approved this pull request. https://github.com/llvm/llvm-project/pull/157236 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [not] Update disable-symbolization.test to work with internal shell (PR #157236)
https://github.com/boomanaiden154 created https://github.com/llvm/llvm-project/pull/157236 This test is a special case as it executes two commands that are special cased in the internal shell implementation. env runs entirely inside the internal shell whereas not is handled specially, but still executed externally. The internal shell does reorder execution of these though, putting env commands before not which means we do not pick up environment variables set by not. These complications make it easier to just ensure that we invoke the actual env binary (by calling it through bash) rather than using the internal shell implementation. Fixes #106627 by fixing the test, but without fixing the redirection issue given the complexity does not seem justified. ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [DA] Add option to run only SIV routines (PR #157084)
llvmbot wrote:
@llvm/pr-subscribers-llvm-analysis
Author: Ryotaro Kasuga (kasuga-fj)
Changes
This patch introduces a new option, `da-run-siv-routines-only`, which runs only
the SIV family routines in the DA. This is useful for testing (regression
tests, not dependence tests) as it helps detect behavioral changes in the SIV
routines. Actually, regarding the test cases added in #157085, fixing
the incorrect result requires changes across multiple functions (at a minimum,
`exactSIVtest`, `gcdMIVtest` and `symbolicRDIVtest`). It is difficult to
address all of them at once.
This patch also generates the CHECK directives using the new option for
`ExactSIV.ll` as it is necessary for subsequent patches. However, I believe it
will also be useful for other `xxSIV.ll` tests. Notably, the SIV family
routines tend to be affected by other routines, as they are typically invoked
at the beginning of the overall analysis.
---
Patch is 21.12 KiB, truncated to 20.00 KiB below, full version:
https://github.com/llvm/llvm-project/pull/157084.diff
2 Files Affected:
- (modified) llvm/lib/Analysis/DependenceAnalysis.cpp (+14)
- (modified) llvm/test/Analysis/DependenceAnalysis/ExactSIV.ll (+198)
``diff
diff --git a/llvm/lib/Analysis/DependenceAnalysis.cpp
b/llvm/lib/Analysis/DependenceAnalysis.cpp
index 43eefc3120f9e..0f77a1410e83b 100644
--- a/llvm/lib/Analysis/DependenceAnalysis.cpp
+++ b/llvm/lib/Analysis/DependenceAnalysis.cpp
@@ -121,6 +121,12 @@ static cl::opt MIVMaxLevelThreshold(
cl::desc("Maximum depth allowed for the recursive algorithm used to "
"explore MIV direction vectors."));
+static cl::opt RunSIVRoutinesOnly(
+"da-run-siv-routines-only", cl::init(false), cl::ReallyHidden,
+cl::desc("Run only SIV routines and disable others (ZIV, RDIV, and MIV). "
+ "The purpose is mainly to exclude the influence of those routines
"
+ "in regression tests for SIV routines."));
+
//===--===//
// basics
@@ -1980,6 +1986,8 @@ bool DependenceInfo::exactRDIVtest(const SCEV *SrcCoeff,
const SCEV *DstCoeff,
const SCEV *SrcConst, const SCEV *DstConst,
const Loop *SrcLoop, const Loop *DstLoop,
FullDependence &Result) const {
+ if (RunSIVRoutinesOnly)
+return false;
LLVM_DEBUG(dbgs() << "\tExact RDIV test\n");
LLVM_DEBUG(dbgs() << "\tSrcCoeff = " << *SrcCoeff << " = AM\n");
LLVM_DEBUG(dbgs() << "\tDstCoeff = " << *DstCoeff << " = BM\n");
@@ -2124,6 +2132,8 @@ bool DependenceInfo::symbolicRDIVtest(const SCEV *A1,
const SCEV *A2,
const SCEV *C1, const SCEV *C2,
const Loop *Loop1,
const Loop *Loop2) const {
+ if (RunSIVRoutinesOnly)
+return false;
++SymbolicRDIVapplications;
LLVM_DEBUG(dbgs() << "\ttry symbolic RDIV test\n");
LLVM_DEBUG(dbgs() << "\tA1 = " << *A1);
@@ -2433,6 +2443,8 @@ bool DependenceInfo::accumulateCoefficientsGCD(const SCEV
*Expr,
// to "a common divisor".
bool DependenceInfo::gcdMIVtest(const SCEV *Src, const SCEV *Dst,
FullDependence &Result) const {
+ if (RunSIVRoutinesOnly)
+return false;
LLVM_DEBUG(dbgs() << "starting gcd\n");
++GCDapplications;
unsigned BitWidth = SE->getTypeSizeInBits(Src->getType());
@@ -2599,6 +2611,8 @@ bool DependenceInfo::gcdMIVtest(const SCEV *Src, const
SCEV *Dst,
bool DependenceInfo::banerjeeMIVtest(const SCEV *Src, const SCEV *Dst,
const SmallBitVector &Loops,
FullDependence &Result) const {
+ if (RunSIVRoutinesOnly)
+return false;
LLVM_DEBUG(dbgs() << "starting Banerjee\n");
++BanerjeeApplications;
LLVM_DEBUG(dbgs() << "Src = " << *Src << '\n');
diff --git a/llvm/test/Analysis/DependenceAnalysis/ExactSIV.ll
b/llvm/test/Analysis/DependenceAnalysis/ExactSIV.ll
index b6b44ad4bfc53..0fe62991fede9 100644
--- a/llvm/test/Analysis/DependenceAnalysis/ExactSIV.ll
+++ b/llvm/test/Analysis/DependenceAnalysis/ExactSIV.ll
@@ -1,6 +1,8 @@
; NOTE: Assertions have been autogenerated by
utils/update_analyze_test_checks.py UTC_ARGS: --version 5
; RUN: opt < %s -disable-output "-passes=print" -aa-pipeline=basic-aa 2>&1
\
; RUN: | FileCheck %s
+; RUN: opt < %s -disable-output "-passes=print" -da-run-siv-routines-only
2>&1 \
+; RUN: | FileCheck %s --check-prefix=CHECK-SIV-ONLY
target datalayout =
"e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx10.6.0"
@@ -25,6 +27,20 @@ define void @exact0(ptr %A, ptr %B) nounwind uwtable ssp {
; CHECK-NEXT: Src: store i32 %0, ptr %B.addr.01, align 4 --> Dst: stor
[llvm-branch-commits] [AllocToken, Clang] Implement TypeHashPointerSplit mode (PR #156840)
https://github.com/melver updated https://github.com/llvm/llvm-project/pull/156840 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [AllocToken, Clang] Implement __builtin_alloc_token_infer() and llvm.alloc.token.id (PR #156842)
https://github.com/melver updated https://github.com/llvm/llvm-project/pull/156842 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [DA] Add test where ExactSIV misses dependency due to overflow (NFC) (PR #157085)
https://github.com/kasuga-fj ready_for_review https://github.com/llvm/llvm-project/pull/157085 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [DA] Add overflow check in ExactSIV (PR #157086)
https://github.com/kasuga-fj commented: For now, I've added the minimal necessary checks, but it’s unclear whether similar checks are also needed elsewhere in this function. Apparently, such checks aren't necessary for GCD computation ([ref](https://en.wikipedia.org/wiki/Extended_Euclidean_algorithm#Description)). However, I'm not sure whether they are needed in subsequent steps. It might be safer to include it for now, just in case, until we can prove it's unnecessary? https://github.com/llvm/llvm-project/pull/157086 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] AMDGPU: Add agpr versions of global return atomics (PR #156890)
arsenm wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/156890?utm_source=stack-comment-downstack-mergeability-warning"; > >on Graphite. > https://graphite.dev/docs/merge-pull-requests";>Learn more * **#156890** https://app.graphite.dev/github/pr/llvm/llvm-project/156890?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/156890?utm_source=stack-comment-view-in-graphite"; target="_blank">(View in Graphite) * **#156874** https://app.graphite.dev/github/pr/llvm/llvm-project/156874?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * **#156860** https://app.graphite.dev/github/pr/llvm/llvm-project/156860?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * `main` This stack of pull requests is managed by https://graphite.dev?utm-source=stack-comment";>Graphite. Learn more about https://stacking.dev/?utm_source=stack-comment";>stacking. https://github.com/llvm/llvm-project/pull/156890 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [AArch64] Remove post-decoding instruction mutations (PR #156364)
https://github.com/s-barannikov updated
https://github.com/llvm/llvm-project/pull/156364
>From 7148b34b69d83b64e825e551f7ca9e7c1f792ddf Mon Sep 17 00:00:00 2001
From: Sergei Barannikov
Date: Mon, 1 Sep 2025 20:30:01 +0300
Subject: [PATCH] [AArch64] Remove post-decoding instruction mutations
These instructions can now be fully decoded automatically.
---
.../lib/Target/AArch64/AArch64InstrFormats.td | 25 ++---
llvm/lib/Target/AArch64/CMakeLists.txt| 3 +-
.../Disassembler/AArch64Disassembler.cpp | 54 +-
llvm/lib/Target/AArch64/SMEInstrFormats.td| 56 ++-
llvm/lib/Target/AArch64/SVEInstrFormats.td| 8 ++-
5 files changed, 107 insertions(+), 39 deletions(-)
diff --git a/llvm/lib/Target/AArch64/AArch64InstrFormats.td
b/llvm/lib/Target/AArch64/AArch64InstrFormats.td
index 8958ad129269c..78d683a4b4256 100644
--- a/llvm/lib/Target/AArch64/AArch64InstrFormats.td
+++ b/llvm/lib/Target/AArch64/AArch64InstrFormats.td
@@ -1561,13 +1561,12 @@ def VectorIndexHOperand : AsmVectorIndex<0, 7>;
def VectorIndexSOperand : AsmVectorIndex<0, 3>;
def VectorIndexDOperand : AsmVectorIndex<0, 1>;
-let OperandNamespace = "AArch64" in {
- let OperandType = "OPERAND_IMPLICIT_IMM_0" in {
-defm VectorIndex0 : VectorIndex;
-defm VectorIndex032b : VectorIndex;
- }
+let OperandNamespace = "AArch64", OperandType = "OPERAND_IMPLICIT_IMM_0",
+DecoderMethod = "DecodeZeroImm" in {
+ defm VectorIndex0 : VectorIndex;
+ defm VectorIndex032b : VectorIndex;
}
defm VectorIndex1 : VectorIndex;
@@ -1620,6 +1619,7 @@ def sme_elm_idx0_0 : Operand, TImmLeaf, TImmLeaf, ImmLeaf, ImmLeaf, ImmLeaf, ImmLeaf {
+ bits<0> idx;
let Inst{20-16} = 0b1;
}
def vi8to64_idx0 : SIMDSMov<1, ".b", GPR64, VectorIndex0> {
+ bits<0> idx;
let Inst{20-16} = 0b1;
}
def vi16to32_idx0 : SIMDSMov<0, ".h", GPR32, VectorIndex0> {
+ bits<0> idx;
let Inst{20-16} = 0b00010;
}
def vi16to64_idx0 : SIMDSMov<1, ".h", GPR64, VectorIndex0> {
+ bits<0> idx;
let Inst{20-16} = 0b00010;
}
def vi32to64_idx0 : SIMDSMov<1, ".s", GPR64, VectorIndex0> {
+ bits<0> idx;
let Inst{20-16} = 0b00100;
}
}
@@ -8267,15 +8274,19 @@ multiclass UMov {
// streaming mode.
let Predicates = [HasNEONandIsStreamingSafe] in {
def vi8_idx0 : SIMDUMov<0, ".b", v16i8, GPR32, VectorIndex0> {
+ bits<0> idx;
let Inst{20-16} = 0b1;
}
def vi16_idx0 : SIMDUMov<0, ".h", v8i16, GPR32, VectorIndex0> {
+ bits<0> idx;
let Inst{20-16} = 0b00010;
}
def vi32_idx0 : SIMDUMov<0, ".s", v4i32, GPR32, VectorIndex0> {
+ bits<0> idx;
let Inst{20-16} = 0b00100;
}
def vi64_idx0 : SIMDUMov<1, ".d", v2i64, GPR64, VectorIndex0> {
+ bits<0> idx;
let Inst{20-16} = 0b01000;
}
def : SIMDMovAlias<"mov", ".s",
diff --git a/llvm/lib/Target/AArch64/CMakeLists.txt
b/llvm/lib/Target/AArch64/CMakeLists.txt
index 79b56ea9cf850..803943fd57c4d 100644
--- a/llvm/lib/Target/AArch64/CMakeLists.txt
+++ b/llvm/lib/Target/AArch64/CMakeLists.txt
@@ -7,8 +7,7 @@ tablegen(LLVM AArch64GenAsmWriter.inc -gen-asm-writer)
tablegen(LLVM AArch64GenAsmWriter1.inc -gen-asm-writer -asmwriternum=1)
tablegen(LLVM AArch64GenCallingConv.inc -gen-callingconv)
tablegen(LLVM AArch64GenDAGISel.inc -gen-dag-isel)
-tablegen(LLVM AArch64GenDisassemblerTables.inc -gen-disassembler
- -ignore-non-decodable-operands)
+tablegen(LLVM AArch64GenDisassemblerTables.inc -gen-disassembler)
tablegen(LLVM AArch64GenFastISel.inc -gen-fast-isel)
tablegen(LLVM AArch64GenGlobalISel.inc -gen-global-isel)
tablegen(LLVM AArch64GenO0PreLegalizeGICombiner.inc -gen-global-isel-combiner
diff --git a/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
b/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
index 8c1e9f61693fb..647a6a3d76ef8 100644
--- a/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
+++ b/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
@@ -130,6 +130,18 @@ DecodeMatrixTileListRegisterClass(MCInst &Inst, unsigned
RegMask,
return Success;
}
+static DecodeStatus DecodeMPRRegisterClass(MCInst &Inst,
+ const MCDisassembler *Decoder) {
+ Inst.addOperand(MCOperand::createReg(AArch64::ZA));
+ return Success;
+}
+
+static DecodeStatus DecodeZTRRegisterClass(MCInst &Inst,
+ const MCDisassembler *Decoder) {
+ Inst.addOperand(MCOperand::createReg(AArch64::ZT0));
+ return Success;
+}
+
static const MCPhysReg MatrixZATileDecoderTable[5][16] = {
{AArch64::ZAB0},
{AArch64::ZAH0, AArch64::ZAH1},
@@ -141,10 +153,19 @@ static const MCPhysReg MatrixZATileDecoderTable[5][16] = {
AArch64::ZAQ10, AArch64::ZAQ11, AArch64::ZAQ12, AArch64::ZAQ13,
AArch64::ZAQ14, AArch64::ZAQ15}};
+template
+static DecodeStatus DecodeMatrixTile(MCInst &Inst,
[llvm-branch-commits] [llvm] release/21.x: [X86] Only fold AND/ANDNP back to VSELECT if we know the predicated mask select is legal (#156663) (PR #157047)
https://github.com/llvmbot created
https://github.com/llvm/llvm-project/pull/157047
Backport 86879d46f6476386dc07772ede83cd43b6ddd739
Requested by: @RKSimon
>From 5e1bfc84f4728ac87edcc3bc34cae050880a1b87 Mon Sep 17 00:00:00 2001
From: Simon Pilgrim
Date: Wed, 3 Sep 2025 15:01:12 +0100
Subject: [PATCH] [X86] Only fold AND/ANDNP back to VSELECT if we know the
predicated mask select is legal (#156663)
By only checking type legality we didn't account for 128/256-bit ops
being run on non-AVX512VL targets, or vXi8/i16 ops being run on
non-AVX512BW targets
This check is cropping up in several places now and I intend to hoist it
out into a common helper, but this initial fix needs to be as clean as
possible to be back ported to 21.X
Fixes #156256
(cherry picked from commit 86879d46f6476386dc07772ede83cd43b6ddd739)
---
llvm/lib/Target/X86/X86ISelLowering.cpp | 4
llvm/test/CodeGen/X86/pr156256.ll | 25 +
2 files changed, 29 insertions(+)
create mode 100644 llvm/test/CodeGen/X86/pr156256.ll
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp
b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 578519b1cc3c9..86877be48eca8 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -51775,6 +51775,8 @@ static SDValue combineAnd(SDNode *N, SelectionDAG &DAG,
SDValue X, Y;
EVT CondVT = VT.changeVectorElementType(MVT::i1);
if (TLI.isTypeLegal(VT) && TLI.isTypeLegal(CondVT) &&
+(VT.is512BitVector() || Subtarget.hasVLX()) &&
+(VT.getScalarSizeInBits() >= 32 || Subtarget.hasBWI()) &&
sd_match(N, m_And(m_Value(X),
m_OneUse(m_SExt(m_AllOf(
m_Value(Y), m_SpecificVT(CondVT),
@@ -55329,6 +55331,8 @@ static SDValue combineAndnp(SDNode *N, SelectionDAG
&DAG,
SDValue Src = N0.getOperand(0);
EVT SrcVT = Src.getValueType();
if (Src.getOpcode() == ISD::SETCC && SrcVT.getScalarType() == MVT::i1 &&
+(VT.is512BitVector() || Subtarget.hasVLX()) &&
+(VT.getScalarSizeInBits() >= 32 || Subtarget.hasBWI()) &&
TLI.isTypeLegal(SrcVT) && N0.hasOneUse() && Src.hasOneUse())
return DAG.getSelect(DL, VT, DAG.getNOT(DL, Src, SrcVT), N1,
getZeroVector(VT, Subtarget, DAG, DL));
diff --git a/llvm/test/CodeGen/X86/pr156256.ll
b/llvm/test/CodeGen/X86/pr156256.ll
new file mode 100644
index 0..13caa6fee5878
--- /dev/null
+++ b/llvm/test/CodeGen/X86/pr156256.ll
@@ -0,0 +1,25 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
UTC_ARGS: --version 5
+; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512f,+avx512dq | FileCheck %s
--check-prefix=AVX512
+; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512f,+avx512dq,+avx512vl |
FileCheck %s --check-prefix=AVX512VL
+
+define <16 x i16> @PR156256(<16 x i32> %a, <16 x i32> %b) {
+; AVX512-LABEL: PR156256:
+; AVX512: # %bb.0:
+; AVX512-NEXT:vpcmpnleud %zmm1, %zmm0, %k0
+; AVX512-NEXT:vpmovm2d %k0, %zmm0
+; AVX512-NEXT:vpmovdw %zmm0, %ymm0
+; AVX512-NEXT:vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0
+; AVX512-NEXT:retq
+;
+; AVX512VL-LABEL: PR156256:
+; AVX512VL: # %bb.0:
+; AVX512VL-NEXT:vpcmpnleud %zmm1, %zmm0, %k0
+; AVX512VL-NEXT:vpmovm2d %k0, %zmm0
+; AVX512VL-NEXT:vpmovdw %zmm0, %ymm0
+; AVX512VL-NEXT:vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm0, %ymm0
+; AVX512VL-NEXT:retq
+ %icmp = icmp ugt <16 x i32> %a, %b
+ %sext = sext <16 x i1> %icmp to <16 x i16>
+ %and = and <16 x i16> %sext, splat (i16 16256)
+ ret <16 x i16> %and
+}
___
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[llvm-branch-commits] [libcxx] release/21.x: [libc++] Fix broken precondition of __bit_log2 (#155476) (PR #155932)
ldionne wrote: > I'd really like to know what the "fallout" here is before we merge something > into a release branch that has perfectly defined behaviour. The fallout is that some people are running with `-fsanitize=unsigned-integer-overflow` and that started breaking. In our case, some folks were even running with that sanitizer in production and that caused runtime issues. I disagree that this has perfectly well defined behavior. That's a pedantic way to view things. We all agree that `log(0)` is undefined, and in fact our call to `log(0)` returned something that made no sense. The code only happened to work because we were then ignoring that invalid result due to other conditions (`first == last` inside `__introsort`). https://github.com/llvm/llvm-project/pull/155932 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [DA] Add option to run only SIV routines (PR #157084)
https://github.com/kasuga-fj ready_for_review https://github.com/llvm/llvm-project/pull/157084 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] Support predicates (PR #156952)
https://github.com/svkeerthy created
https://github.com/llvm/llvm-project/pull/156952
None
>From 6185e40a9a6731955e190131067cc3c5bc90595e Mon Sep 17 00:00:00 2001
From: svkeerthy
Date: Wed, 3 Sep 2025 22:56:08 +
Subject: [PATCH] Support predicates
---
llvm/include/llvm/Analysis/IR2Vec.h| 43 +---
llvm/lib/Analysis/IR2Vec.cpp | 70 ++
llvm/tools/llvm-ir2vec/llvm-ir2vec.cpp | 2 +-
3 files changed, 98 insertions(+), 17 deletions(-)
diff --git a/llvm/include/llvm/Analysis/IR2Vec.h
b/llvm/include/llvm/Analysis/IR2Vec.h
index b7b881999241e..d49854e2d06a8 100644
--- a/llvm/include/llvm/Analysis/IR2Vec.h
+++ b/llvm/include/llvm/Analysis/IR2Vec.h
@@ -36,6 +36,7 @@
#define LLVM_ANALYSIS_IR2VEC_H
#include "llvm/ADT/DenseMap.h"
+#include "llvm/IR/Instructions.h"
#include "llvm/IR/PassManager.h"
#include "llvm/IR/Type.h"
#include "llvm/Support/CommandLine.h"
@@ -162,16 +163,25 @@ using BBEmbeddingsMap = DenseMap;
/// embeddings.
class Vocabulary {
friend class llvm::IR2VecVocabAnalysis;
+ // Slot layout:
+ // [0 .. MaxOpcodes-1] => Instruction
+ // opcodes [MaxOpcodes .. MaxOpcodes+MaxCanonicalTypeIDs-1] =>
+ // Canonicalized types [MaxOpcodes+MaxCanonicalTypeIDs .. end of operands) =>
+ // Operands
+ // Within Operands: first OperandKind entries, followed by compare
+ // predicates
using VocabVector = std::vector;
VocabVector Vocab;
+
bool Valid = false;
+ static constexpr unsigned NumICmpPredicates =
+ static_cast(CmpInst::LAST_ICMP_PREDICATE) -
+ static_cast(CmpInst::FIRST_ICMP_PREDICATE) + 1;
+ static constexpr unsigned NumFCmpPredicates =
+ static_cast(CmpInst::LAST_FCMP_PREDICATE) -
+ static_cast(CmpInst::FIRST_FCMP_PREDICATE) + 1;
public:
- // Slot layout:
- // [0 .. MaxOpcodes-1] => Instruction opcodes
- // [MaxOpcodes .. MaxOpcodes+MaxCanonicalTypeIDs-1] => Canonicalized types
- // [MaxOpcodes+MaxCanonicalTypeIDs .. NumCanonicalEntries-1] => Operand kinds
-
/// Canonical type IDs supported by IR2Vec Vocabulary
enum class CanonicalTypeID : unsigned {
FloatTy,
@@ -208,13 +218,18 @@ class Vocabulary {
static_cast(CanonicalTypeID::MaxCanonicalType);
static constexpr unsigned MaxOperandKinds =
static_cast(OperandKind::MaxOperandKind);
+ // CmpInst::Predicate has gaps. We want the vocabulary to be dense without
+ // empty slots.
+ static constexpr unsigned MaxPredicateKinds =
+ NumICmpPredicates + NumFCmpPredicates;
Vocabulary() = default;
LLVM_ABI Vocabulary(VocabVector &&Vocab);
LLVM_ABI bool isValid() const;
LLVM_ABI unsigned getDimension() const;
- /// Total number of entries (opcodes + canonicalized types + operand kinds)
+ /// Total number of entries (opcodes + canonicalized types + operand kinds +
+ /// predicates)
static constexpr size_t getCanonicalSize() { return NumCanonicalEntries; }
/// Function to get vocabulary key for a given Opcode
@@ -229,16 +244,21 @@ class Vocabulary {
/// Function to classify an operand into OperandKind
LLVM_ABI static OperandKind getOperandKind(const Value *Op);
+ /// Function to get vocabulary key for a given predicate
+ LLVM_ABI static StringRef getVocabKeyForPredicate(CmpInst::Predicate P);
+
/// Functions to return the slot index or position of a given Opcode, TypeID,
/// or OperandKind in the vocabulary.
LLVM_ABI static unsigned getSlotIndex(unsigned Opcode);
LLVM_ABI static unsigned getSlotIndex(Type::TypeID TypeID);
LLVM_ABI static unsigned getSlotIndex(const Value &Op);
+ LLVM_ABI static unsigned getSlotIndex(CmpInst::Predicate P);
/// Accessors to get the embedding for a given entity.
LLVM_ABI const ir2vec::Embedding &operator[](unsigned Opcode) const;
LLVM_ABI const ir2vec::Embedding &operator[](Type::TypeID TypeId) const;
LLVM_ABI const ir2vec::Embedding &operator[](const Value &Arg) const;
+ LLVM_ABI const ir2vec::Embedding &operator[](CmpInst::Predicate P) const;
/// Const Iterator type aliases
using const_iterator = VocabVector::const_iterator;
@@ -275,7 +295,13 @@ class Vocabulary {
private:
constexpr static unsigned NumCanonicalEntries =
- MaxOpcodes + MaxCanonicalTypeIDs + MaxOperandKinds;
+ MaxOpcodes + MaxCanonicalTypeIDs + MaxOperandKinds + MaxPredicateKinds;
+
+ // Base offsets for slot layout to simplify index computation
+ constexpr static unsigned OperandBaseOffset =
+ MaxOpcodes + MaxCanonicalTypeIDs;
+ constexpr static unsigned PredicateBaseOffset =
+ OperandBaseOffset + MaxOperandKinds;
/// String mappings for CanonicalTypeID values
static constexpr StringLiteral CanonicalTypeNames[] = {
@@ -327,6 +353,9 @@ class Vocabulary {
/// Function to convert TypeID to CanonicalTypeID
LLVM_ABI static CanonicalTypeID getCanonicalTypeID(Type::TypeID TypeID);
+
+ /// Function to get the predicate enum value for a given index
+ LLVM_
[llvm-branch-commits] [llvm] [AArch64] Provide a custom decoder for LDR_ZA/STR_ZA (PR #156363)
https://github.com/s-barannikov updated
https://github.com/llvm/llvm-project/pull/156363
>From 97585523dab9c7159877bf33d92ffd4c327a26b0 Mon Sep 17 00:00:00 2001
From: Sergei Barannikov
Date: Mon, 1 Sep 2025 20:27:48 +0300
Subject: [PATCH] [AArch64] Provide a custom decoder for LDR_ZA/STR_ZA
These are the only instructions that encode two operands in the same
field. Instead of fixing them after they have been incorrectly decoded,
provide a custom decoder.
---
.../Disassembler/AArch64Disassembler.cpp | 29 ---
llvm/lib/Target/AArch64/SMEInstrFormats.td| 4 +++
2 files changed, 23 insertions(+), 10 deletions(-)
diff --git a/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
b/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
index 23e46b84f6278..8c1e9f61693fb 100644
--- a/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
+++ b/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
@@ -1563,6 +1563,25 @@ static DecodeStatus DecodePRFMRegInstruction(MCInst
&Inst, uint32_t insn,
return Success;
}
+static DecodeStatus
+DecodeSMESpillFillInstruction(MCInst &Inst, uint32_t Bits, uint64_t Addr,
+ const MCDisassembler *Decoder) {
+ unsigned RvBits = fieldFromInstruction(Bits, 13, 2);
+ unsigned RnBits = fieldFromInstruction(Bits, 5, 5);
+ unsigned Imm4Bits = fieldFromInstruction(Bits, 0, 4);
+
+ DecodeSimpleRegisterClass(
+ Inst, RvBits, Addr, Decoder);
+ Inst.addOperand(MCOperand::createImm(Imm4Bits));
+ DecodeSimpleRegisterClass(Inst, RnBits,
+ Addr, Decoder);
+ // Spill and fill instructions have a single immediate used for both
+ // the vector select offset and optional memory offset. Replicate
+ // the decoded immediate.
+ Inst.addOperand(MCOperand::createImm(Imm4Bits));
+ return Success;
+}
+
#include "AArch64GenDisassemblerTables.inc"
#include "AArch64GenInstrInfo.inc"
@@ -1621,16 +1640,6 @@ DecodeStatus AArch64Disassembler::getInstruction(MCInst
&MI, uint64_t &Size,
}
}
-if (MI.getOpcode() == AArch64::LDR_ZA ||
-MI.getOpcode() == AArch64::STR_ZA) {
- // Spill and fill instructions have a single immediate used for both
- // the vector select offset and optional memory offset. Replicate
- // the decoded immediate.
- const MCOperand &Imm4Op = MI.getOperand(2);
- assert(Imm4Op.isImm() && "Unexpected operand type!");
- MI.addOperand(Imm4Op);
-}
-
if (Result != MCDisassembler::Fail)
return Result;
}
diff --git a/llvm/lib/Target/AArch64/SMEInstrFormats.td
b/llvm/lib/Target/AArch64/SMEInstrFormats.td
index b3005d5120229..40ec371fe79d3 100644
--- a/llvm/lib/Target/AArch64/SMEInstrFormats.td
+++ b/llvm/lib/Target/AArch64/SMEInstrFormats.td
@@ -1108,6 +1108,10 @@ class sme_spill_fill_base
: I,
Sched<[]> {
+ // 'offset' operand is encoded in the same bits as 'imm4'. There is currently
+ // no way to tell TableGen about this.
+ let DecoderMethod = "DecodeSMESpillFillInstruction";
+ bits<0> ZAt;
bits<2> Rv;
bits<5> Rn;
bits<4> imm4;
___
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[llvm-branch-commits] [llvm] [DA] Add option to run only SIV routines (PR #157084)
https://github.com/kasuga-fj edited https://github.com/llvm/llvm-project/pull/157084 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [AllocToken, Clang] Implement TypeHashPointerSplit mode (PR #156840)
https://github.com/melver updated https://github.com/llvm/llvm-project/pull/156840 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [llvm] [HLSL][DirectX] Add support for `rootsig` as a target environment (PR #156373)
@@ -1296,6 +1296,9 @@ class InjectRootSignatureCallback : public PPCallbacks {
void HLSLFrontendAction::ExecuteAction() {
// Pre-requisites to invoke
+ if (getCurrentFileKind().getLanguage() != Language::HLSL)
+return WrapperFrontendAction::ExecuteAction();
inbelic wrote:
Good catch. TLDR: it is not required and I forgot to remove it from early
iterations.
It was originally added because I was hitting [this
assert](https://github.com/llvm/llvm-project/blob/6c6afdd8c262f49bb23cf455d98108f31b732c6c/clang/lib/Frontend/FrontendAction.cpp#L828)
when invoking with `-emit-obj ` and so I thought it was because it was
first creating a `.ll` file and then creating an object from that as two
separate jobs. Turns out it is because you need to specify the file as
`-emit-obj -o `.
https://github.com/llvm/llvm-project/pull/156373
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[llvm-branch-commits] [MC] Invoke run line in stdin.s using bash (PR #157232)
ilovepi wrote: I don't know if I understand what you're going for in this patch. How is this an improvement over just keeping `REQUIRES: shell`? The `REQUIRES: ` bit is what's going to stop the test from running in the wrong environment. That seems like the right tradeoff. https://github.com/llvm/llvm-project/pull/157232 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [CGData] Rewrite tests to not use subshells (PR #157234)
https://github.com/ilovepi approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/157234 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] Use lit internal shell by default (PR #157237)
https://github.com/ilovepi approved this pull request. https://github.com/llvm/llvm-project/pull/157237 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [compiler-rt] 7aec0da - Revert "[compiler-rt][sanitizer-common] adding C23 memset_explicit intercepti…"
Author: Thurston Dang
Date: 2025-09-06T14:46:37-07:00
New Revision: 7aec0dac3a3bf938c1412cf46f03a8a0fbce023c
URL:
https://github.com/llvm/llvm-project/commit/7aec0dac3a3bf938c1412cf46f03a8a0fbce023c
DIFF:
https://github.com/llvm/llvm-project/commit/7aec0dac3a3bf938c1412cf46f03a8a0fbce023c.diff
LOG: Revert "[compiler-rt][sanitizer-common] adding C23 memset_explicit
intercepti…"
This reverts commit 7e55a4c9937dfc2184636ad7f3c9f7eccfad6186.
Added:
Modified:
compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors_memintrinsics.inc
compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
Removed:
compiler-rt/test/sanitizer_common/TestCases/Linux/memset_explicit.c
diff --git
a/compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors_memintrinsics.inc
b/compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors_memintrinsics.inc
index 5334b0ded17e8..0b6731c89950b 100644
---
a/compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors_memintrinsics.inc
+++
b/compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors_memintrinsics.inc
@@ -233,16 +233,6 @@ INTERCEPTOR(void *, bzero, void *block, usize size) {
#define INIT_BZERO
#endif // SANITIZER_INTERCEPT_BZERO
-#if SANITIZER_INTERCEPT_MEMSET_EXPLICIT
-INTERCEPTOR(void *, memset_explicit, void *block, int c, usize size) {
- void *ctx;
- COMMON_INTERCEPTOR_MEMSET_IMPL(ctx, block, c, size);
-}
-#define INIT_MEMSET_EXPLICIT COMMON_INTERCEPT_FUNCTION(memset_explicit)
-#else
-#define INIT_MEMSET_EXPLICIT
-#endif
-
namespace __sanitizer {
// This does not need to be called if InitializeCommonInterceptors() is called.
void InitializeMemintrinsicInterceptors() {
@@ -252,6 +242,5 @@ void InitializeMemintrinsicInterceptors() {
INIT_AEABI_MEM;
INIT___BZERO;
INIT_BZERO;
- INIT_MEMSET_EXPLICIT;
}
} // namespace __sanitizer
diff --git
a/compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
b/compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
index eee7af2069694..29987decdff45 100644
--- a/compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
+++ b/compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
@@ -663,17 +663,15 @@ SANITIZER_WEAK_IMPORT void
*aligned_alloc(__sanitizer::usize __alignment,
#define SANITIZER_INTERCEPT_GETSERVBYNAME_R SI_GLIBC
#define SANITIZER_INTERCEPT_GETSERVBYPORT_R SI_GLIBC
-// Until free_sized, free_aligned_sized and memset_explicit are more generally
available,
+// Until free_sized and free_aligned_sized are more generally available,
// we can only unconditionally intercept on ELF-based platforms where it
// is okay to have undefined weak symbols.
#ifdef __ELF__
# define SANITIZER_INTERCEPT_FREE_SIZED 1
# define SANITIZER_INTERCEPT_FREE_ALIGNED_SIZED 1
-# define SANITIZER_INTERCEPT_MEMSET_EXPLICIT 1
#else
# define SANITIZER_INTERCEPT_FREE_SIZED 0
# define SANITIZER_INTERCEPT_FREE_ALIGNED_SIZED 0
-# define SANITIZER_INTERCEPT_MEMSET_EXPLICIT 0
#endif
// This macro gives a way for downstream users to override the above
diff --git
a/compiler-rt/test/sanitizer_common/TestCases/Linux/memset_explicit.c
b/compiler-rt/test/sanitizer_common/TestCases/Linux/memset_explicit.c
deleted file mode 100644
index 4714ea51f25de..0
--- a/compiler-rt/test/sanitizer_common/TestCases/Linux/memset_explicit.c
+++ /dev/null
@@ -1,13 +0,0 @@
-// RUN: %clang -std=c23 -O0 %s -o %t && %run %t
-// UNSUPPORTED: asan, lsan, hwasan, ubsan
-
-#include
-#include
-
-extern void *memset_explicit(void *p, int value, size_t size);
-
-int main() {
- char secbuffer[64];
- (void)memset_explicit(secbuffer, 0, sizeof(secbuffer));
- return 0;
-}
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[llvm-branch-commits] [not] Update disable-symbolization.test to work with internal shell (PR #157236)
ilovepi wrote: Should we update the lit implementation handling for `not`/`env` to avoid reordering those two commands when combined? https://github.com/llvm/llvm-project/pull/157236 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
