[llvm-branch-commits] [mlir] [mlir][OpenMP] Add translation of private_barrier attr to LLVMIR (PR #140090)
https://github.com/tblah created https://github.com/llvm/llvm-project/pull/140090 Part of a series to fix https://github.com/llvm/llvm-project/issues/136357 Rate limit · GitHub body { background-color: #f6f8fa; color: #24292e; font-family: -apple-system,BlinkMacSystemFont,Segoe UI,Helvetica,Arial,sans-serif,Apple Color Emoji,Segoe UI Emoji,Segoe UI Symbol; font-size: 14px; line-height: 1.5; margin: 0; } .container { margin: 50px auto; max-width: 600px; text-align: center; padding: 0 24px; } a { color: #0366d6; text-decoration: none; } a:hover { text-decoration: underline; } h1 { line-height: 60px; font-size: 48px; font-weight: 300; margin: 0px; text-shadow: 0 1px 0 #fff; } p { color: rgba(0, 0, 0, 0.5); margin: 20px 0 40px; } ul { list-style: none; margin: 25px 0; padding: 0; } li { display: table-cell; font-weight: bold; width: 1%; } .logo { display: inline-block; margin-top: 35px; } .logo-img-2x { display: none; } @media only screen and (-webkit-min-device-pixel-ratio: 2), only screen and ( min--moz-device-pixel-ratio: 2), only screen and ( -o-min-device-pixel-ratio: 2/1), only screen and (min-device-pixel-ratio: 2), only screen and (min-resolution: 192dpi), only screen and (min-resolution: 2dppx) { .logo-img-1x { display: none; } .logo-img-2x { display: inline-block; } } #suggestions { margin-top: 35px; color: #ccc; } #suggestions a { color: #66; font-weight: 200; font-size: 14px; margin: 0 10px; } Whoa there! You have exceeded a secondary rate limit. Please wait a few minutes before you try again; in some cases this may take up to an hour. https://support.github.com/contact";>Contact Support — https://githubstatus.com";>GitHub Status — https://twitter.com/githubstatus";>@githubstatus ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [mlir] [mlir][OpenMP] Add translation of private_barrier attr to LLVMIR (PR #140090)
llvmbot wrote: @llvm/pr-subscribers-mlir-llvm Author: Tom Eccles (tblah) Changes Part of a series to fix https://github.com/llvm/llvm-project/issues/136357 --- Full diff: https://github.com/llvm/llvm-project/pull/140090.diff 2 Files Affected: - (modified) mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp (+25-12) - (modified) mlir/test/Target/LLVMIR/openmp-wsloop-private.mlir (+3-1) ``diff diff --git a/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp b/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp index 9f7b5605556e6..65d496ad8b774 100644 --- a/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp +++ b/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp @@ -1512,10 +1512,11 @@ allocatePrivateVars(llvm::IRBuilderBase &builder, } static LogicalResult copyFirstPrivateVars( -llvm::IRBuilderBase &builder, LLVM::ModuleTranslation &moduleTranslation, +mlir::Operation *op, llvm::IRBuilderBase &builder, +LLVM::ModuleTranslation &moduleTranslation, SmallVectorImpl &mlirPrivateVars, ArrayRef llvmPrivateVars, -SmallVectorImpl &privateDecls, +SmallVectorImpl &privateDecls, bool insertBarrier, llvm::DenseMap *mappedPrivateVars = nullptr) { // Apply copy region for firstprivate. bool needsFirstprivate = @@ -1563,6 +1564,14 @@ static LogicalResult copyFirstPrivateVars( moduleTranslation.forgetMapping(copyRegion); } + if (insertBarrier) { +llvm::OpenMPIRBuilder *ompBuilder = moduleTranslation.getOpenMPBuilder(); +llvm::OpenMPIRBuilder::InsertPointOrErrorTy res = +ompBuilder->createBarrier(builder.saveIP(), llvm::omp::OMPD_barrier); +if (failed(handleError(res, *op))) + return failure(); + } + return success(); } @@ -2171,8 +2180,9 @@ convertOmpTaskOp(omp::TaskOp taskOp, llvm::IRBuilderBase &builder, // firstprivate copy region setInsertPointForPossiblyEmptyBlock(builder, copyBlock); if (failed(copyFirstPrivateVars( - builder, moduleTranslation, privateVarsInfo.mlirVars, - taskStructMgr.getLLVMPrivateVarGEPs(), privateVarsInfo.privatizers))) + taskOp, builder, moduleTranslation, privateVarsInfo.mlirVars, + taskStructMgr.getLLVMPrivateVarGEPs(), privateVarsInfo.privatizers, + taskOp.getPrivateNeedsBarrier( return llvm::failure(); // Set up for call to createTask() @@ -2392,8 +2402,9 @@ convertOmpWsloop(Operation &opInst, llvm::IRBuilderBase &builder, return failure(); if (failed(copyFirstPrivateVars( - builder, moduleTranslation, privateVarsInfo.mlirVars, - privateVarsInfo.llvmVars, privateVarsInfo.privatizers))) + wsloopOp, builder, moduleTranslation, privateVarsInfo.mlirVars, + privateVarsInfo.llvmVars, privateVarsInfo.privatizers, + wsloopOp.getPrivateNeedsBarrier( return failure(); assert(afterAllocas.get()->getSinglePredecessor()); @@ -2512,8 +2523,9 @@ convertOmpParallel(omp::ParallelOp opInst, llvm::IRBuilderBase &builder, return llvm::make_error(); if (failed(copyFirstPrivateVars( -builder, moduleTranslation, privateVarsInfo.mlirVars, -privateVarsInfo.llvmVars, privateVarsInfo.privatizers))) +opInst, builder, moduleTranslation, privateVarsInfo.mlirVars, +privateVarsInfo.llvmVars, privateVarsInfo.privatizers, +opInst.getPrivateNeedsBarrier( return llvm::make_error(); if (failed( @@ -4461,8 +4473,9 @@ convertOmpDistribute(Operation &opInst, llvm::IRBuilderBase &builder, return llvm::make_error(); if (failed(copyFirstPrivateVars( -builder, moduleTranslation, privVarsInfo.mlirVars, -privVarsInfo.llvmVars, privVarsInfo.privatizers))) +distributeOp, builder, moduleTranslation, privVarsInfo.mlirVars, +privVarsInfo.llvmVars, privVarsInfo.privatizers, +distributeOp.getPrivateNeedsBarrier( return llvm::make_error(); llvm::OpenMPIRBuilder *ompBuilder = moduleTranslation.getOpenMPBuilder(); @@ -5222,9 +5235,9 @@ convertOmpTarget(Operation &opInst, llvm::IRBuilderBase &builder, return llvm::make_error(); if (failed(copyFirstPrivateVars( -builder, moduleTranslation, privateVarsInfo.mlirVars, +targetOp, builder, moduleTranslation, privateVarsInfo.mlirVars, privateVarsInfo.llvmVars, privateVarsInfo.privatizers, -&mappedPrivateVars))) +targetOp.getPrivateNeedsBarrier(), &mappedPrivateVars))) return llvm::make_error(); SmallVector privateCleanupRegions; diff --git a/mlir/test/Target/LLVMIR/openmp-wsloop-private.mlir b/mlir/test/Target/LLVMIR/openmp-wsloop-private.mlir index 23a0ae5713aa2..0b1f45ad7ce1c 100644 --- a/mlir/test/Target/LLVMIR/openmp-wsloop-private.mlir +++ b/mlir/test/Target/LLVMIR/openmp-wsloop-private.mlir @@
[llvm-branch-commits] [mlir] [mlir][OpenMP] Add translation of private_barrier attr to LLVMIR (PR #140090)
llvmbot wrote: @llvm/pr-subscribers-mlir Author: Tom Eccles (tblah) Changes Part of a series to fix https://github.com/llvm/llvm-project/issues/136357 --- Full diff: https://github.com/llvm/llvm-project/pull/140090.diff 2 Files Affected: - (modified) mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp (+25-12) - (modified) mlir/test/Target/LLVMIR/openmp-wsloop-private.mlir (+3-1) ``diff diff --git a/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp b/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp index 9f7b5605556e6..65d496ad8b774 100644 --- a/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp +++ b/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp @@ -1512,10 +1512,11 @@ allocatePrivateVars(llvm::IRBuilderBase &builder, } static LogicalResult copyFirstPrivateVars( -llvm::IRBuilderBase &builder, LLVM::ModuleTranslation &moduleTranslation, +mlir::Operation *op, llvm::IRBuilderBase &builder, +LLVM::ModuleTranslation &moduleTranslation, SmallVectorImpl &mlirPrivateVars, ArrayRef llvmPrivateVars, -SmallVectorImpl &privateDecls, +SmallVectorImpl &privateDecls, bool insertBarrier, llvm::DenseMap *mappedPrivateVars = nullptr) { // Apply copy region for firstprivate. bool needsFirstprivate = @@ -1563,6 +1564,14 @@ static LogicalResult copyFirstPrivateVars( moduleTranslation.forgetMapping(copyRegion); } + if (insertBarrier) { +llvm::OpenMPIRBuilder *ompBuilder = moduleTranslation.getOpenMPBuilder(); +llvm::OpenMPIRBuilder::InsertPointOrErrorTy res = +ompBuilder->createBarrier(builder.saveIP(), llvm::omp::OMPD_barrier); +if (failed(handleError(res, *op))) + return failure(); + } + return success(); } @@ -2171,8 +2180,9 @@ convertOmpTaskOp(omp::TaskOp taskOp, llvm::IRBuilderBase &builder, // firstprivate copy region setInsertPointForPossiblyEmptyBlock(builder, copyBlock); if (failed(copyFirstPrivateVars( - builder, moduleTranslation, privateVarsInfo.mlirVars, - taskStructMgr.getLLVMPrivateVarGEPs(), privateVarsInfo.privatizers))) + taskOp, builder, moduleTranslation, privateVarsInfo.mlirVars, + taskStructMgr.getLLVMPrivateVarGEPs(), privateVarsInfo.privatizers, + taskOp.getPrivateNeedsBarrier( return llvm::failure(); // Set up for call to createTask() @@ -2392,8 +2402,9 @@ convertOmpWsloop(Operation &opInst, llvm::IRBuilderBase &builder, return failure(); if (failed(copyFirstPrivateVars( - builder, moduleTranslation, privateVarsInfo.mlirVars, - privateVarsInfo.llvmVars, privateVarsInfo.privatizers))) + wsloopOp, builder, moduleTranslation, privateVarsInfo.mlirVars, + privateVarsInfo.llvmVars, privateVarsInfo.privatizers, + wsloopOp.getPrivateNeedsBarrier( return failure(); assert(afterAllocas.get()->getSinglePredecessor()); @@ -2512,8 +2523,9 @@ convertOmpParallel(omp::ParallelOp opInst, llvm::IRBuilderBase &builder, return llvm::make_error(); if (failed(copyFirstPrivateVars( -builder, moduleTranslation, privateVarsInfo.mlirVars, -privateVarsInfo.llvmVars, privateVarsInfo.privatizers))) +opInst, builder, moduleTranslation, privateVarsInfo.mlirVars, +privateVarsInfo.llvmVars, privateVarsInfo.privatizers, +opInst.getPrivateNeedsBarrier( return llvm::make_error(); if (failed( @@ -4461,8 +4473,9 @@ convertOmpDistribute(Operation &opInst, llvm::IRBuilderBase &builder, return llvm::make_error(); if (failed(copyFirstPrivateVars( -builder, moduleTranslation, privVarsInfo.mlirVars, -privVarsInfo.llvmVars, privVarsInfo.privatizers))) +distributeOp, builder, moduleTranslation, privVarsInfo.mlirVars, +privVarsInfo.llvmVars, privVarsInfo.privatizers, +distributeOp.getPrivateNeedsBarrier( return llvm::make_error(); llvm::OpenMPIRBuilder *ompBuilder = moduleTranslation.getOpenMPBuilder(); @@ -5222,9 +5235,9 @@ convertOmpTarget(Operation &opInst, llvm::IRBuilderBase &builder, return llvm::make_error(); if (failed(copyFirstPrivateVars( -builder, moduleTranslation, privateVarsInfo.mlirVars, +targetOp, builder, moduleTranslation, privateVarsInfo.mlirVars, privateVarsInfo.llvmVars, privateVarsInfo.privatizers, -&mappedPrivateVars))) +targetOp.getPrivateNeedsBarrier(), &mappedPrivateVars))) return llvm::make_error(); SmallVector privateCleanupRegions; diff --git a/mlir/test/Target/LLVMIR/openmp-wsloop-private.mlir b/mlir/test/Target/LLVMIR/openmp-wsloop-private.mlir index 23a0ae5713aa2..0b1f45ad7ce1c 100644 --- a/mlir/test/Target/LLVMIR/openmp-wsloop-private.mlir +++ b/mlir/test/Target/LLVMIR/openmp-wsloop-private.mlir @@ -37,7
[llvm-branch-commits] [mlir] [mlir][OpenMP] Add translation of private_barrier attr to LLVMIR (PR #140090)
llvmbot wrote: @llvm/pr-subscribers-flang-openmp Author: Tom Eccles (tblah) Changes Part of a series to fix https://github.com/llvm/llvm-project/issues/136357 --- Full diff: https://github.com/llvm/llvm-project/pull/140090.diff 2 Files Affected: - (modified) mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp (+25-12) - (modified) mlir/test/Target/LLVMIR/openmp-wsloop-private.mlir (+3-1) ``diff diff --git a/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp b/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp index 9f7b5605556e6..65d496ad8b774 100644 --- a/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp +++ b/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp @@ -1512,10 +1512,11 @@ allocatePrivateVars(llvm::IRBuilderBase &builder, } static LogicalResult copyFirstPrivateVars( -llvm::IRBuilderBase &builder, LLVM::ModuleTranslation &moduleTranslation, +mlir::Operation *op, llvm::IRBuilderBase &builder, +LLVM::ModuleTranslation &moduleTranslation, SmallVectorImpl &mlirPrivateVars, ArrayRef llvmPrivateVars, -SmallVectorImpl &privateDecls, +SmallVectorImpl &privateDecls, bool insertBarrier, llvm::DenseMap *mappedPrivateVars = nullptr) { // Apply copy region for firstprivate. bool needsFirstprivate = @@ -1563,6 +1564,14 @@ static LogicalResult copyFirstPrivateVars( moduleTranslation.forgetMapping(copyRegion); } + if (insertBarrier) { +llvm::OpenMPIRBuilder *ompBuilder = moduleTranslation.getOpenMPBuilder(); +llvm::OpenMPIRBuilder::InsertPointOrErrorTy res = +ompBuilder->createBarrier(builder.saveIP(), llvm::omp::OMPD_barrier); +if (failed(handleError(res, *op))) + return failure(); + } + return success(); } @@ -2171,8 +2180,9 @@ convertOmpTaskOp(omp::TaskOp taskOp, llvm::IRBuilderBase &builder, // firstprivate copy region setInsertPointForPossiblyEmptyBlock(builder, copyBlock); if (failed(copyFirstPrivateVars( - builder, moduleTranslation, privateVarsInfo.mlirVars, - taskStructMgr.getLLVMPrivateVarGEPs(), privateVarsInfo.privatizers))) + taskOp, builder, moduleTranslation, privateVarsInfo.mlirVars, + taskStructMgr.getLLVMPrivateVarGEPs(), privateVarsInfo.privatizers, + taskOp.getPrivateNeedsBarrier( return llvm::failure(); // Set up for call to createTask() @@ -2392,8 +2402,9 @@ convertOmpWsloop(Operation &opInst, llvm::IRBuilderBase &builder, return failure(); if (failed(copyFirstPrivateVars( - builder, moduleTranslation, privateVarsInfo.mlirVars, - privateVarsInfo.llvmVars, privateVarsInfo.privatizers))) + wsloopOp, builder, moduleTranslation, privateVarsInfo.mlirVars, + privateVarsInfo.llvmVars, privateVarsInfo.privatizers, + wsloopOp.getPrivateNeedsBarrier( return failure(); assert(afterAllocas.get()->getSinglePredecessor()); @@ -2512,8 +2523,9 @@ convertOmpParallel(omp::ParallelOp opInst, llvm::IRBuilderBase &builder, return llvm::make_error(); if (failed(copyFirstPrivateVars( -builder, moduleTranslation, privateVarsInfo.mlirVars, -privateVarsInfo.llvmVars, privateVarsInfo.privatizers))) +opInst, builder, moduleTranslation, privateVarsInfo.mlirVars, +privateVarsInfo.llvmVars, privateVarsInfo.privatizers, +opInst.getPrivateNeedsBarrier( return llvm::make_error(); if (failed( @@ -4461,8 +4473,9 @@ convertOmpDistribute(Operation &opInst, llvm::IRBuilderBase &builder, return llvm::make_error(); if (failed(copyFirstPrivateVars( -builder, moduleTranslation, privVarsInfo.mlirVars, -privVarsInfo.llvmVars, privVarsInfo.privatizers))) +distributeOp, builder, moduleTranslation, privVarsInfo.mlirVars, +privVarsInfo.llvmVars, privVarsInfo.privatizers, +distributeOp.getPrivateNeedsBarrier( return llvm::make_error(); llvm::OpenMPIRBuilder *ompBuilder = moduleTranslation.getOpenMPBuilder(); @@ -5222,9 +5235,9 @@ convertOmpTarget(Operation &opInst, llvm::IRBuilderBase &builder, return llvm::make_error(); if (failed(copyFirstPrivateVars( -builder, moduleTranslation, privateVarsInfo.mlirVars, +targetOp, builder, moduleTranslation, privateVarsInfo.mlirVars, privateVarsInfo.llvmVars, privateVarsInfo.privatizers, -&mappedPrivateVars))) +targetOp.getPrivateNeedsBarrier(), &mappedPrivateVars))) return llvm::make_error(); SmallVector privateCleanupRegions; diff --git a/mlir/test/Target/LLVMIR/openmp-wsloop-private.mlir b/mlir/test/Target/LLVMIR/openmp-wsloop-private.mlir index 23a0ae5713aa2..0b1f45ad7ce1c 100644 --- a/mlir/test/Target/LLVMIR/openmp-wsloop-private.mlir +++ b/mlir/test/Target/LLVMIR/openmp-wsloop-private.mlir
[llvm-branch-commits] [mlir] [mlir][OpenMP] Add translation of private_barrier attr to LLVMIR (PR #140090)
llvmbot wrote: @llvm/pr-subscribers-mlir-openmp Author: Tom Eccles (tblah) Changes Part of a series to fix https://github.com/llvm/llvm-project/issues/136357 --- Full diff: https://github.com/llvm/llvm-project/pull/140090.diff 2 Files Affected: - (modified) mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp (+25-12) - (modified) mlir/test/Target/LLVMIR/openmp-wsloop-private.mlir (+3-1) ``diff diff --git a/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp b/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp index 9f7b5605556e6..65d496ad8b774 100644 --- a/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp +++ b/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp @@ -1512,10 +1512,11 @@ allocatePrivateVars(llvm::IRBuilderBase &builder, } static LogicalResult copyFirstPrivateVars( -llvm::IRBuilderBase &builder, LLVM::ModuleTranslation &moduleTranslation, +mlir::Operation *op, llvm::IRBuilderBase &builder, +LLVM::ModuleTranslation &moduleTranslation, SmallVectorImpl &mlirPrivateVars, ArrayRef llvmPrivateVars, -SmallVectorImpl &privateDecls, +SmallVectorImpl &privateDecls, bool insertBarrier, llvm::DenseMap *mappedPrivateVars = nullptr) { // Apply copy region for firstprivate. bool needsFirstprivate = @@ -1563,6 +1564,14 @@ static LogicalResult copyFirstPrivateVars( moduleTranslation.forgetMapping(copyRegion); } + if (insertBarrier) { +llvm::OpenMPIRBuilder *ompBuilder = moduleTranslation.getOpenMPBuilder(); +llvm::OpenMPIRBuilder::InsertPointOrErrorTy res = +ompBuilder->createBarrier(builder.saveIP(), llvm::omp::OMPD_barrier); +if (failed(handleError(res, *op))) + return failure(); + } + return success(); } @@ -2171,8 +2180,9 @@ convertOmpTaskOp(omp::TaskOp taskOp, llvm::IRBuilderBase &builder, // firstprivate copy region setInsertPointForPossiblyEmptyBlock(builder, copyBlock); if (failed(copyFirstPrivateVars( - builder, moduleTranslation, privateVarsInfo.mlirVars, - taskStructMgr.getLLVMPrivateVarGEPs(), privateVarsInfo.privatizers))) + taskOp, builder, moduleTranslation, privateVarsInfo.mlirVars, + taskStructMgr.getLLVMPrivateVarGEPs(), privateVarsInfo.privatizers, + taskOp.getPrivateNeedsBarrier( return llvm::failure(); // Set up for call to createTask() @@ -2392,8 +2402,9 @@ convertOmpWsloop(Operation &opInst, llvm::IRBuilderBase &builder, return failure(); if (failed(copyFirstPrivateVars( - builder, moduleTranslation, privateVarsInfo.mlirVars, - privateVarsInfo.llvmVars, privateVarsInfo.privatizers))) + wsloopOp, builder, moduleTranslation, privateVarsInfo.mlirVars, + privateVarsInfo.llvmVars, privateVarsInfo.privatizers, + wsloopOp.getPrivateNeedsBarrier( return failure(); assert(afterAllocas.get()->getSinglePredecessor()); @@ -2512,8 +2523,9 @@ convertOmpParallel(omp::ParallelOp opInst, llvm::IRBuilderBase &builder, return llvm::make_error(); if (failed(copyFirstPrivateVars( -builder, moduleTranslation, privateVarsInfo.mlirVars, -privateVarsInfo.llvmVars, privateVarsInfo.privatizers))) +opInst, builder, moduleTranslation, privateVarsInfo.mlirVars, +privateVarsInfo.llvmVars, privateVarsInfo.privatizers, +opInst.getPrivateNeedsBarrier( return llvm::make_error(); if (failed( @@ -4461,8 +4473,9 @@ convertOmpDistribute(Operation &opInst, llvm::IRBuilderBase &builder, return llvm::make_error(); if (failed(copyFirstPrivateVars( -builder, moduleTranslation, privVarsInfo.mlirVars, -privVarsInfo.llvmVars, privVarsInfo.privatizers))) +distributeOp, builder, moduleTranslation, privVarsInfo.mlirVars, +privVarsInfo.llvmVars, privVarsInfo.privatizers, +distributeOp.getPrivateNeedsBarrier( return llvm::make_error(); llvm::OpenMPIRBuilder *ompBuilder = moduleTranslation.getOpenMPBuilder(); @@ -5222,9 +5235,9 @@ convertOmpTarget(Operation &opInst, llvm::IRBuilderBase &builder, return llvm::make_error(); if (failed(copyFirstPrivateVars( -builder, moduleTranslation, privateVarsInfo.mlirVars, +targetOp, builder, moduleTranslation, privateVarsInfo.mlirVars, privateVarsInfo.llvmVars, privateVarsInfo.privatizers, -&mappedPrivateVars))) +targetOp.getPrivateNeedsBarrier(), &mappedPrivateVars))) return llvm::make_error(); SmallVector privateCleanupRegions; diff --git a/mlir/test/Target/LLVMIR/openmp-wsloop-private.mlir b/mlir/test/Target/LLVMIR/openmp-wsloop-private.mlir index 23a0ae5713aa2..0b1f45ad7ce1c 100644 --- a/mlir/test/Target/LLVMIR/openmp-wsloop-private.mlir +++ b/mlir/test/Target/LLVMIR/openmp-wsloop-private.mlir @
[llvm-branch-commits] [flang] [flang][OpenMP] use attribute for delayed privatization barrier (PR #140092)
https://github.com/tblah created https://github.com/llvm/llvm-project/pull/140092 Fixes #136357 The barrier needs to go between the copying into firstprivate variables and the initialization call for the OpenMP construct (e.g. wsloop). There is no way of expressing this in MLIR because for delayed privatization that is all implicit (added in MLIR->LLVMIR conversion). The previous approach put the barrier immediately before the wsloop (or similar). For delayed privatization, the firstprivate copy code would then be inserted after that, opening the possibility for the race observed in the bug report. This patch solves the issue by instead setting an attribute on the mlir operation, which will instruct openmp dialect to llvm ir conversion to insert a barrier in the correct place. Rate limit · GitHub body { background-color: #f6f8fa; color: #24292e; font-family: -apple-system,BlinkMacSystemFont,Segoe UI,Helvetica,Arial,sans-serif,Apple Color Emoji,Segoe UI Emoji,Segoe UI Symbol; font-size: 14px; line-height: 1.5; margin: 0; } .container { margin: 50px auto; max-width: 600px; text-align: center; padding: 0 24px; } a { color: #0366d6; text-decoration: none; } a:hover { text-decoration: underline; } h1 { line-height: 60px; font-size: 48px; font-weight: 300; margin: 0px; text-shadow: 0 1px 0 #fff; } p { color: rgba(0, 0, 0, 0.5); margin: 20px 0 40px; } ul { list-style: none; margin: 25px 0; padding: 0; } li { display: table-cell; font-weight: bold; width: 1%; } .logo { display: inline-block; margin-top: 35px; } .logo-img-2x { display: none; } @media only screen and (-webkit-min-device-pixel-ratio: 2), only screen and ( min--moz-device-pixel-ratio: 2), only screen and ( -o-min-device-pixel-ratio: 2/1), only screen and (min-device-pixel-ratio: 2), only screen and (min-resolution: 192dpi), only screen and (min-resolution: 2dppx) { .logo-img-1x { display: none; } .logo-img-2x { display: inline-block; } } #suggestions { margin-top: 35px; color: #ccc; } #suggestions a { color: #66; font-weight: 200; font-size: 14px; margin: 0 10px; } Whoa there! You have exceeded a secondary rate limit. Please wait a few minutes before you try again; in some cases this may take up to an hour. https://support.github.com/contact";>Contact Support — https://githubstatus.com";>GitHub Status — https://twitter.com/githubstatus";>@githubstatus ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [llvm][EmbedBitcodePass] Prevent modifying the module with ThinLTO (PR #139999)
ilovepi wrote: Well, with my patch the program in initial bug report from #70703 is passing w/ this patch, and the rest of the test suite seems OK ... maybe its fine to clone now? https://github.com/llvm/llvm-project/pull/13 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [StaticDataLayout][PGO]Implement reader and writer change for data access profiles (PR #139997)
https://github.com/mingmingl-llvm updated https://github.com/llvm/llvm-project/pull/139997 >From d15ae3e73589b50edeb2ab823976734eaa3806e5 Mon Sep 17 00:00:00 2001 From: mingmingl Date: Thu, 15 May 2025 09:56:52 -0700 Subject: [PATCH] Support reading and writing data access profiles in memprof v4. --- .../include/llvm/ProfileData/DataAccessProf.h | 12 +++- .../llvm/ProfileData/IndexedMemProfData.h | 12 +++- .../llvm/ProfileData/InstrProfReader.h| 6 +- .../llvm/ProfileData/InstrProfWriter.h| 6 ++ llvm/include/llvm/ProfileData/MemProfReader.h | 15 + llvm/include/llvm/ProfileData/MemProfYAML.h | 65 +++ llvm/lib/ProfileData/DataAccessProf.cpp | 6 +- llvm/lib/ProfileData/IndexedMemProfData.cpp | 61 + llvm/lib/ProfileData/InstrProfReader.cpp | 14 llvm/lib/ProfileData/InstrProfWriter.cpp | 20 -- llvm/lib/ProfileData/MemProfReader.cpp| 30 + .../tools/llvm-profdata/memprof-yaml.test | 11 llvm/tools/llvm-profdata/llvm-profdata.cpp| 4 ++ .../ProfileData/DataAccessProfTest.cpp| 11 ++-- 14 files changed, 242 insertions(+), 31 deletions(-) diff --git a/llvm/include/llvm/ProfileData/DataAccessProf.h b/llvm/include/llvm/ProfileData/DataAccessProf.h index e8504102238d1..f5f6abf0a2817 100644 --- a/llvm/include/llvm/ProfileData/DataAccessProf.h +++ b/llvm/include/llvm/ProfileData/DataAccessProf.h @@ -41,6 +41,8 @@ namespace data_access_prof { struct SourceLocation { SourceLocation(StringRef FileNameRef, uint32_t Line) : FileName(FileNameRef.str()), Line(Line) {} + + SourceLocation() {} /// The filename where the data is located. std::string FileName; /// The line number in the source code. @@ -53,6 +55,8 @@ namespace internal { // which strings are owned by `DataAccessProfData`. Used by `DataAccessProfData` // to represent data locations internally. struct SourceLocationRef { + SourceLocationRef(StringRef FileNameRef, uint32_t Line) + : FileName(FileNameRef), Line(Line) {} // The filename where the data is located. StringRef FileName; // The line number in the source code. @@ -100,8 +104,9 @@ using SymbolHandle = std::variant; /// The data access profiles for a symbol. struct DataAccessProfRecord { public: - DataAccessProfRecord(SymbolHandleRef SymHandleRef, - ArrayRef LocRefs) { + DataAccessProfRecord(SymbolHandleRef SymHandleRef, uint64_t AccessCount, + ArrayRef LocRefs) + : AccessCount(AccessCount) { if (std::holds_alternative(SymHandleRef)) { SymHandle = std::get(SymHandleRef).str(); } else @@ -110,8 +115,9 @@ struct DataAccessProfRecord { for (auto Loc : LocRefs) Locations.push_back(SourceLocation(Loc.FileName, Loc.Line)); } + DataAccessProfRecord() {} SymbolHandle SymHandle; - + uint64_t AccessCount; // The locations of data in the source code. Optional. SmallVector Locations; }; diff --git a/llvm/include/llvm/ProfileData/IndexedMemProfData.h b/llvm/include/llvm/ProfileData/IndexedMemProfData.h index 3c6c329d1c49d..66fa38472059b 100644 --- a/llvm/include/llvm/ProfileData/IndexedMemProfData.h +++ b/llvm/include/llvm/ProfileData/IndexedMemProfData.h @@ -10,14 +10,20 @@ // //===--===// +#include "llvm/ProfileData/DataAccessProf.h" #include "llvm/ProfileData/InstrProf.h" #include "llvm/ProfileData/MemProf.h" +#include +#include + namespace llvm { // Write the MemProf data to OS. -Error writeMemProf(ProfOStream &OS, memprof::IndexedMemProfData &MemProfData, - memprof::IndexedVersion MemProfVersionRequested, - bool MemProfFullSchema); +Error writeMemProf( +ProfOStream &OS, memprof::IndexedMemProfData &MemProfData, +memprof::IndexedVersion MemProfVersionRequested, bool MemProfFullSchema, +std::optional> +DataAccessProfileData); } // namespace llvm diff --git a/llvm/include/llvm/ProfileData/InstrProfReader.h b/llvm/include/llvm/ProfileData/InstrProfReader.h index c250a9ede39bc..210df6be46f04 100644 --- a/llvm/include/llvm/ProfileData/InstrProfReader.h +++ b/llvm/include/llvm/ProfileData/InstrProfReader.h @@ -18,6 +18,7 @@ #include "llvm/ADT/StringRef.h" #include "llvm/IR/ProfileSummary.h" #include "llvm/Object/BuildID.h" +#include "llvm/ProfileData/DataAccessProf.h" #include "llvm/ProfileData/InstrProf.h" #include "llvm/ProfileData/InstrProfCorrelator.h" #include "llvm/ProfileData/MemProf.h" @@ -704,9 +705,12 @@ class IndexedMemProfReader { // The number of elements in the radix tree array. unsigned RadixTreeSize = 0; + std::unique_ptr DataAccessProfileData; + Error deserializeV2(const unsigned char *Start, const unsigned char *Ptr); Error deserializeRadixTreeBased(const unsigned char *Start, - const unsigned char *Ptr); +
[llvm-branch-commits] [llvm] [StaticDataLayout][PGO]Implement reader and writer change for data access profiles (PR #139997)
https://github.com/mingmingl-llvm updated https://github.com/llvm/llvm-project/pull/139997 >From 4045c943966609cc9a92693752af0e29a19e1ef9 Mon Sep 17 00:00:00 2001 From: mingmingl Date: Thu, 15 May 2025 09:56:52 -0700 Subject: [PATCH] Support reading and writing data access profiles in memprof v4. --- .../include/llvm/ProfileData/DataAccessProf.h | 12 +++- .../llvm/ProfileData/IndexedMemProfData.h | 12 +++- .../llvm/ProfileData/InstrProfReader.h| 6 +- .../llvm/ProfileData/InstrProfWriter.h| 6 ++ llvm/include/llvm/ProfileData/MemProfReader.h | 15 + llvm/include/llvm/ProfileData/MemProfYAML.h | 58 ++ llvm/lib/ProfileData/DataAccessProf.cpp | 6 +- llvm/lib/ProfileData/IndexedMemProfData.cpp | 61 +++ llvm/lib/ProfileData/InstrProfReader.cpp | 14 + llvm/lib/ProfileData/InstrProfWriter.cpp | 20 -- llvm/lib/ProfileData/MemProfReader.cpp| 30 + .../tools/llvm-profdata/memprof-yaml.test | 11 llvm/tools/llvm-profdata/llvm-profdata.cpp| 4 ++ .../ProfileData/DataAccessProfTest.cpp| 11 ++-- 14 files changed, 235 insertions(+), 31 deletions(-) diff --git a/llvm/include/llvm/ProfileData/DataAccessProf.h b/llvm/include/llvm/ProfileData/DataAccessProf.h index e8504102238d1..f5f6abf0a2817 100644 --- a/llvm/include/llvm/ProfileData/DataAccessProf.h +++ b/llvm/include/llvm/ProfileData/DataAccessProf.h @@ -41,6 +41,8 @@ namespace data_access_prof { struct SourceLocation { SourceLocation(StringRef FileNameRef, uint32_t Line) : FileName(FileNameRef.str()), Line(Line) {} + + SourceLocation() {} /// The filename where the data is located. std::string FileName; /// The line number in the source code. @@ -53,6 +55,8 @@ namespace internal { // which strings are owned by `DataAccessProfData`. Used by `DataAccessProfData` // to represent data locations internally. struct SourceLocationRef { + SourceLocationRef(StringRef FileNameRef, uint32_t Line) + : FileName(FileNameRef), Line(Line) {} // The filename where the data is located. StringRef FileName; // The line number in the source code. @@ -100,8 +104,9 @@ using SymbolHandle = std::variant; /// The data access profiles for a symbol. struct DataAccessProfRecord { public: - DataAccessProfRecord(SymbolHandleRef SymHandleRef, - ArrayRef LocRefs) { + DataAccessProfRecord(SymbolHandleRef SymHandleRef, uint64_t AccessCount, + ArrayRef LocRefs) + : AccessCount(AccessCount) { if (std::holds_alternative(SymHandleRef)) { SymHandle = std::get(SymHandleRef).str(); } else @@ -110,8 +115,9 @@ struct DataAccessProfRecord { for (auto Loc : LocRefs) Locations.push_back(SourceLocation(Loc.FileName, Loc.Line)); } + DataAccessProfRecord() {} SymbolHandle SymHandle; - + uint64_t AccessCount; // The locations of data in the source code. Optional. SmallVector Locations; }; diff --git a/llvm/include/llvm/ProfileData/IndexedMemProfData.h b/llvm/include/llvm/ProfileData/IndexedMemProfData.h index 3c6c329d1c49d..66fa38472059b 100644 --- a/llvm/include/llvm/ProfileData/IndexedMemProfData.h +++ b/llvm/include/llvm/ProfileData/IndexedMemProfData.h @@ -10,14 +10,20 @@ // //===--===// +#include "llvm/ProfileData/DataAccessProf.h" #include "llvm/ProfileData/InstrProf.h" #include "llvm/ProfileData/MemProf.h" +#include +#include + namespace llvm { // Write the MemProf data to OS. -Error writeMemProf(ProfOStream &OS, memprof::IndexedMemProfData &MemProfData, - memprof::IndexedVersion MemProfVersionRequested, - bool MemProfFullSchema); +Error writeMemProf( +ProfOStream &OS, memprof::IndexedMemProfData &MemProfData, +memprof::IndexedVersion MemProfVersionRequested, bool MemProfFullSchema, +std::optional> +DataAccessProfileData); } // namespace llvm diff --git a/llvm/include/llvm/ProfileData/InstrProfReader.h b/llvm/include/llvm/ProfileData/InstrProfReader.h index c250a9ede39bc..a3436e1dfe711 100644 --- a/llvm/include/llvm/ProfileData/InstrProfReader.h +++ b/llvm/include/llvm/ProfileData/InstrProfReader.h @@ -18,6 +18,7 @@ #include "llvm/ADT/StringRef.h" #include "llvm/IR/ProfileSummary.h" #include "llvm/Object/BuildID.h" +#include "llvm/ProfileData/DataAccessProf.h" #include "llvm/ProfileData/InstrProf.h" #include "llvm/ProfileData/InstrProfCorrelator.h" #include "llvm/ProfileData/MemProf.h" @@ -703,10 +704,13 @@ class IndexedMemProfReader { const unsigned char *CallStackBase = nullptr; // The number of elements in the radix tree array. unsigned RadixTreeSize = 0; + /// The data access profiles, deserialized from binary data. + std::unique_ptr DataAccessProfileData; Error deserializeV2(const unsigned char *Start, const unsigned char *Ptr); Error deserializeRadixTreeBased(const u
[llvm-branch-commits] Add pointer field protection feature. (PR #133538)
@@ -362,6 +362,17 @@ class LangOptionsBase { BKey }; + enum class PointerFieldProtectionKind { pcc wrote: I think that allowing this level of customization should be implemented as part of the separate opt-in solution (e.g. it may be a property of the qualifier). It is generally a reasonable assumption that operator new is the same for all types. In the unlikely case that it isn't, we aren't really doing anything wrong by using the malloc-derived decision here. It just means that we lose some entropy from the type or the pointer tag. https://github.com/llvm/llvm-project/pull/133538 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] Add pointer field protection feature. (PR #133538)
ojhunt wrote: > Hi Oliver, thanks for your comments! I'll address them below. > > > Thoughts: > > This should be opt-in on a field or struct granularity, not just a global > > behavior. > > This would certainly be easier if it were an opt-in behavior, as it would > allow avoiding a substantial amount of complexity that you point out below. > The problem is that would not make the solution very effective as a UAF > mitigation, as it would only help with code that was opted in, which is > likely a tiny fraction of an entire codebase. That fraction is unlikely to be > the fraction with UAF bugs, not only because of the size of the fraction but > also because if developers aren't thinking about memory safety issues, they > certainly won't be manually opting into this. With PFP, the problem that I > set out to solve was to find a way to automatically protect as many pointers > stored in memory as possible in standards-conforming code. > There are a significant number of standard layout types that contain meaningfully powerful data if they are compromised, which leads to saying the standard layout types should also be covered. That said, there's a significant cost to applying pointer protection universally though. The cost of existing mitigations rely on them not being global properties as they can saturate the required compute resources. I would be interested in a performance comparison of enumerating struct fields as you increase the number of fields being accessed just to see if there's a point that perf starts to collapse - I suspect there would be, but if the number of concurrent (from the cpu pov, not threading) fields accesses to get to that point is high enough it may not matter. Similar tests for increasing levels of dependent loads are also probably worth while. The intent is to make this behavior at least partially universal (all pointers in objects that are not standard layout), which means that extrapolating from individual loads, or loads from the same addresses, are not necessarily representative. In the RFC you talk about the time and/or cycles required to perform operations, but that's the best case, where the required units are not saturated. This gate on performance isn't unique to pointer protections: every operation consumes some amount of cpu resources, once those resources are saturated the pipeline stalls, so it's necessary to compare performance when many of these operations are happening in succession. Now there's some caching (saying the tag remains constant, etc) you might be able to do, but that's dependent on being willing to say "this is a software mitigation, so we're ok if we don't catch everything" - these are things that a cpu can mitigate in hardware via direct knowledge of what is happening on a given core, and peeking on the memory bus. (There are also performance costs when you're accessing the same memory on different cores, but that goes so bad so quickly even in normal cases I'm not concerned about that yet). > > In the RFC I think you mentioned not applying PFP to C types, but I'm > > unsure how you're deciding what is a C type? > > This is based on whether the type has standard layout. C does not permit > declaring a type that is non-standard layout. The issue here is that there are many cases where standard layout structs contain important data, which is why I'm not 100% sold on excluding C types from this. > > There are a lot of special cases being added in places that should not need > > to be aware of PFP - the core type queries should be returning correct > > values for types containing PFP fields. > > Agreed on type queries. The current adjustment to how trivially-relocatable > is defined is a workaround that will be removed once P2786 is fully > implemented in libc++, and at that point we shouldn't need > `__has_non_relocatable_fields` either. The intent is that turning on PFP > should be invisible to the developer (in other words, the modification to the > storage format of pointer fields in certain structs is permitted by the as-if > rule). As a result, most of the implementation is in CodeGen and below. My point was that this should not have a separate attempt to make trivial relocation work, it should make sure the type queries report the correct information, and the implementation of trivially_relocate agrees with that definition. Also trivial relocation isn't meaningfully supported or used anywhere yet - it's a new feature - so I don't think you should be prioritizing supporting that yet: just make sure that the (internal) trait queries return correct/consistent results for what can be handled, and worry about optimizing that later. > > > A lot of the "this read/write/copy/init special work" exactly aligns with > > the constraints of pointer auth, and I think the overall implementation > > could be made better by introducing the concept of a > > `HardenedPointerQualifier` or similar,
[llvm-branch-commits] [clang] [llvm] [KeyInstr][Clang] Add ApplyAtomGroup (PR #134632)
OCHyams wrote: > This all seems fine -- I guess the plumbing here has to get in without a > test, before then later real changes come in and can be tested. > > The "Override" vs new-source-atom distinction seems a little clunky, although > I haven't read how it's used to get the full context. IMO it's worth putting > thought into a better name: can we pick an abstract name describing the > purpose ("New key operation"?) where the override thing is just an > implementation feature? Hmm you're right it's not very clear. The "override" situation is needed because of how returns are handled in Clang (ret atoms review - #134652), which is that multiple returns are emitted as branches to a single return-block. Those branches get the source location info for the return, and the actual ret is associated with the closing brace. However, if there's only one pred to the return block it's folded into it, and the return takes the source location of the branch. I can't remember exactly why the atom application had to be structured in this slightly convoluted way (should've written better comments!). I'll see if it can be simplified a bit, and if not I'll rename the functions and add better comments. https://github.com/llvm/llvm-project/pull/134632 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [KeyInstr][Clang] Add ApplyAtomGroup (PR #134632)
https://github.com/OCHyams updated https://github.com/llvm/llvm-project/pull/134632 >From 0544aed12dd76bd64c42ce186c586702d3e01589 Mon Sep 17 00:00:00 2001 From: Orlando Cazalet-Hyams Date: Tue, 1 Apr 2025 11:59:24 +0100 Subject: [PATCH] [KeyInstr][Clang] Add ApplyAtomGroup This is a scoped helper similar to ApplyDebugLocation that creates a new source atom group which instructions can be added to. A source atom is a source construct that is "interesting" for debug stepping purposes. We use an atom group number to track the instruction(s) that implement the functionality for the atom, plus backup instructions/source locations. --- This patch is part of a stack that teaches Clang to generate Key Instructions metadata for C and C++. The Key Instructions project is introduced, including a "quick summary" section at the top which adds context for this PR, here: https://discourse.llvm.org/t/rfc-improving-is-stmt-placement-for-better-interactive-debugging/82668 The feature is only functional in LLVM if LLVM is built with CMake flag LLVM_EXPERIMENTAL_KEY_INSTRUCTIONs. Eventually that flag will be removed. The Clang-side work is demoed here: https://github.com/llvm/llvm-project/pull/130943 --- clang/lib/CodeGen/CGDebugInfo.cpp | 119 +++- clang/lib/CodeGen/CGDebugInfo.h | 50 clang/lib/CodeGen/CodeGenFunction.h | 14 3 files changed, 182 insertions(+), 1 deletion(-) diff --git a/clang/lib/CodeGen/CGDebugInfo.cpp b/clang/lib/CodeGen/CGDebugInfo.cpp index 2a11eebf1b682..f4c5c57a38b3e 100644 --- a/clang/lib/CodeGen/CGDebugInfo.cpp +++ b/clang/lib/CodeGen/CGDebugInfo.cpp @@ -43,6 +43,7 @@ #include "llvm/IR/Constants.h" #include "llvm/IR/DataLayout.h" #include "llvm/IR/DerivedTypes.h" +#include "llvm/IR/Instruction.h" #include "llvm/IR/Instructions.h" #include "llvm/IR/Intrinsics.h" #include "llvm/IR/Metadata.h" @@ -52,6 +53,7 @@ #include "llvm/Support/SHA1.h" #include "llvm/Support/SHA256.h" #include "llvm/Support/TimeProfiler.h" +#include #include using namespace clang; using namespace clang::CodeGen; @@ -119,6 +121,114 @@ CGDebugInfo::~CGDebugInfo() { "Region stack mismatch, stack not empty!"); } +void CGDebugInfo::addInstSourceAtomMetadata(llvm::Instruction *I, +uint64_t Group, uint8_t Rank) { + if (!I->getDebugLoc() || Group == 0 || !I->getDebugLoc()->getLine()) +return; + + // Saturate the 3-bit rank. + Rank = std::min(Rank, 7); + + const llvm::DebugLoc &DL = I->getDebugLoc(); + + // Each instruction can only be attributed to one source atom (a limitation of + // the implementation). If this instruction is already part of a source atom, + // pick the group in which it has highest precedence (lowest rank). + if (DL.get()->getAtomGroup() && DL.get()->getAtomRank() && + DL.get()->getAtomRank() < Rank) { +Group = DL.get()->getAtomGroup(); +Rank = DL.get()->getAtomRank(); + } + + // Update the function-local watermark so we don't reuse this number for + // another atom. + KeyInstructionsInfo.HighestEmittedAtom = + std::max(Group, KeyInstructionsInfo.HighestEmittedAtom); + + // Apply the new DILocation to the instruction. + llvm::DILocation *NewDL = llvm::DILocation::get( + I->getContext(), DL.getLine(), DL.getCol(), DL.getScope(), + DL.getInlinedAt(), DL.isImplicitCode(), Group, Rank); + I->setDebugLoc(NewDL); +}; + +void CGDebugInfo::addInstToCurrentSourceAtom(llvm::Instruction *KeyInstruction, + llvm::Value *Backup) { + if (!CGM.getCodeGenOpts().DebugKeyInstructions) +return; + + uint64_t Group = KeyInstructionsInfo.CurrentAtom; + if (!Group) +return; + + addInstSourceAtomMetadata(KeyInstruction, Group, /*Rank=*/1); + + llvm::Instruction *BackupI = + llvm::dyn_cast_or_null(Backup); + if (!BackupI) +return; + + // Add the backup instruction to the group. + addInstSourceAtomMetadata(BackupI, Group, /*Rank=*/2); + + // Look through chains of casts too, as they're probably going to evaporate. + // FIXME: And other nops like zero length geps? + // FIXME: Should use Cast->isNoopCast()? + uint8_t Rank = 3; + while (auto *Cast = dyn_cast(BackupI)) { +BackupI = dyn_cast(Cast->getOperand(0)); +if (!BackupI) + break; +addInstSourceAtomMetadata(BackupI, Group, Rank++); + } +} + +void CGDebugInfo::addRetToOverrideOrNewSourceAtom(llvm::ReturnInst *Ret, + llvm::Value *Backup) { + if (KeyInstructionsInfo.RetAtomOverride) { +uint64_t CurrentAtom = KeyInstructionsInfo.CurrentAtom; +KeyInstructionsInfo.CurrentAtom = KeyInstructionsInfo.RetAtomOverride; +addInstToCurrentSourceAtom(Ret, Backup); +KeyInstructionsInfo.CurrentAtom = CurrentAtom; +KeyInstructionsInfo.RetAtomOverride = 0; + } else { +auto Grp = ApplyAtomGroup(this); +addInstToCurrentSourceAtom(Ret, Backup); + } +} + +void CGDe
[llvm-branch-commits] [mlir] [MLIR][OpenMP] Assert on map translation functions, NFC (PR #137199)
https://github.com/skatrak updated https://github.com/llvm/llvm-project/pull/137199 >From c6954b3120a87eef7d9cf86f18d4ef342b2e7b25 Mon Sep 17 00:00:00 2001 From: Sergio Afonso Date: Fri, 11 Apr 2025 13:40:14 +0100 Subject: [PATCH] [MLIR][OpenMP] Assert on map translation functions, NFC This patch adds assertions to map-related MLIR to LLVM IR translation functions and utils to explicitly document whether they are intended for host or device compilation only. Over time, map-related handling has increased in complexity. This is compounded by the fact that some handling is device-specific and some is host-specific. By explicitly asserting on these functions on the expected compilation pass, the flow should become slighlty easier to follow. --- .../OpenMP/OpenMPToLLVMIRTranslation.cpp | 24 +-- 1 file changed, 22 insertions(+), 2 deletions(-) diff --git a/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp b/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp index 9f7b5605556e6..010c46358f7df 100644 --- a/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp +++ b/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp @@ -3720,6 +3720,9 @@ static llvm::omp::OpenMPOffloadMappingFlags mapParentWithMembers( LLVM::ModuleTranslation &moduleTranslation, llvm::IRBuilderBase &builder, llvm::OpenMPIRBuilder &ompBuilder, DataLayout &dl, MapInfosTy &combinedInfo, MapInfoData &mapData, uint64_t mapDataIndex, bool isTargetParams) { + assert(!ompBuilder.Config.isTargetDevice() && + "function only supported for host device codegen"); + // Map the first segment of our structure combinedInfo.Types.emplace_back( isTargetParams @@ -3828,6 +3831,8 @@ static void processMapMembersWithParent( llvm::OpenMPIRBuilder &ompBuilder, DataLayout &dl, MapInfosTy &combinedInfo, MapInfoData &mapData, uint64_t mapDataIndex, llvm::omp::OpenMPOffloadMappingFlags memberOfFlag) { + assert(!ompBuilder.Config.isTargetDevice() && + "function only supported for host device codegen"); auto parentClause = llvm::cast(mapData.MapClause[mapDataIndex]); @@ -3941,6 +3946,9 @@ static void processMapWithMembersOf(LLVM::ModuleTranslation &moduleTranslation, DataLayout &dl, MapInfosTy &combinedInfo, MapInfoData &mapData, uint64_t mapDataIndex, bool isTargetParams) { + assert(!ompBuilder.Config.isTargetDevice() && + "function only supported for host device codegen"); + auto parentClause = llvm::cast(mapData.MapClause[mapDataIndex]); @@ -3982,6 +3990,8 @@ static void createAlteredByCaptureMap(MapInfoData &mapData, LLVM::ModuleTranslation &moduleTranslation, llvm::IRBuilderBase &builder) { + assert(!moduleTranslation.getOpenMPBuilder()->Config.isTargetDevice() && + "function only supported for host device codegen"); for (size_t i = 0; i < mapData.MapClause.size(); ++i) { // if it's declare target, skip it, it's handled separately. if (!mapData.IsDeclareTarget[i]) { @@ -4046,6 +4056,9 @@ static void genMapInfos(llvm::IRBuilderBase &builder, LLVM::ModuleTranslation &moduleTranslation, DataLayout &dl, MapInfosTy &combinedInfo, MapInfoData &mapData, bool isTargetParams = false) { + assert(!moduleTranslation.getOpenMPBuilder()->Config.isTargetDevice() && + "function only supported for host device codegen"); + // We wish to modify some of the methods in which arguments are // passed based on their capture type by the target region, this can // involve generating new loads and stores, which changes the @@ -4057,8 +4070,7 @@ static void genMapInfos(llvm::IRBuilderBase &builder, // kernel arg structure. It primarily becomes relevant in cases like // bycopy, or byref range'd arrays. In the default case, we simply // pass thee pointer byref as both basePointer and pointer. - if (!moduleTranslation.getOpenMPBuilder()->Config.isTargetDevice()) -createAlteredByCaptureMap(mapData, moduleTranslation, builder); + createAlteredByCaptureMap(mapData, moduleTranslation, builder); llvm::OpenMPIRBuilder *ompBuilder = moduleTranslation.getOpenMPBuilder(); @@ -4092,6 +4104,8 @@ emitUserDefinedMapper(Operation *declMapperOp, llvm::IRBuilderBase &builder, static llvm::Expected getOrCreateUserDefinedMapperFunc(Operation *op, llvm::IRBuilderBase &builder, LLVM::ModuleTranslation &moduleTranslation) { + assert(!moduleTranslation.getOpenMPBuilder()->Config.isTargetDevice() && + "function only supported for host device codegen"); auto declMapperOp = cast(op); std::string mapperFuncName = moduleTranslation.getOpenMPBuilder()->createPlatformSpecificName( @@
[llvm-branch-commits] [llvm] [ConstraintElim] Simplify `usub_with_overflow` when A uge B (PR #135785)
https://github.com/el-ev updated https://github.com/llvm/llvm-project/pull/135785 >From b5cac9305a6af33bc0bc30d01965c5e7e333 Mon Sep 17 00:00:00 2001 From: Iris Shi <0...@owo.li> Date: Tue, 15 Apr 2025 20:20:45 +0800 Subject: [PATCH] [ConstraintElim] Simplify `usub_with_overflow` when A uge B --- .../Scalar/ConstraintElimination.cpp | 11 .../usub-with-overflow.ll | 54 +++ 2 files changed, 44 insertions(+), 21 deletions(-) diff --git a/llvm/lib/Transforms/Scalar/ConstraintElimination.cpp b/llvm/lib/Transforms/Scalar/ConstraintElimination.cpp index 15aba43721e57..71afd7a2203ef 100644 --- a/llvm/lib/Transforms/Scalar/ConstraintElimination.cpp +++ b/llvm/lib/Transforms/Scalar/ConstraintElimination.cpp @@ -1124,6 +1124,7 @@ void State::addInfoFor(BasicBlock &BB) { // Enqueue overflow intrinsics for simplification. case Intrinsic::sadd_with_overflow: case Intrinsic::ssub_with_overflow: +case Intrinsic::usub_with_overflow: case Intrinsic::ucmp: case Intrinsic::scmp: WorkList.push_back( @@ -1765,6 +1766,16 @@ tryToSimplifyOverflowMath(IntrinsicInst *II, ConstraintInfo &Info, Changed = true; break; } + case Intrinsic::usub_with_overflow: { +// usub overflows iff A < B +// TODO: If the operation is guaranteed to overflow, we could +// also apply some simplifications. +if (DoesConditionHold(CmpInst::ICMP_UGE, A, B, Info)) { + replaceAddOrSubOverflowUses(II, A, B, ToRemove); + Changed = true; +} +break; + } } return Changed; diff --git a/llvm/test/Transforms/ConstraintElimination/usub-with-overflow.ll b/llvm/test/Transforms/ConstraintElimination/usub-with-overflow.ll index 06bfd8269d97d..722116cc6ebd0 100644 --- a/llvm/test/Transforms/ConstraintElimination/usub-with-overflow.ll +++ b/llvm/test/Transforms/ConstraintElimination/usub-with-overflow.ll @@ -9,12 +9,14 @@ define i8 @usub_no_overflow_due_to_cmp_condition(i8 %a, i8 %b) { ; CHECK-NEXT:[[C_1:%.*]] = icmp uge i8 [[B:%.*]], [[A:%.*]] ; CHECK-NEXT:br i1 [[C_1]], label [[MATH:%.*]], label [[EXIT_FAIL:%.*]] ; CHECK: math: -; CHECK-NEXT:[[OP:%.*]] = tail call { i8, i1 } @llvm.usub.with.overflow.i8(i8 [[B]], i8 [[A]]) -; CHECK-NEXT:[[STATUS:%.*]] = extractvalue { i8, i1 } [[OP]], 1 +; CHECK-NEXT:[[RES:%.*]] = sub i8 [[B]], [[A]] +; CHECK-NEXT:[[TMP1:%.*]] = insertvalue { i8, i1 } poison, i8 [[RES]], 0 +; CHECK-NEXT:[[TMP2:%.*]] = insertvalue { i8, i1 } [[TMP1]], i1 false, 1 +; CHECK-NEXT:[[STATUS:%.*]] = extractvalue { i8, i1 } [[TMP2]], 1 ; CHECK-NEXT:br i1 [[STATUS]], label [[EXIT_FAIL]], label [[EXIT_OK:%.*]] ; CHECK: exit.ok: -; CHECK-NEXT:[[RES:%.*]] = extractvalue { i8, i1 } [[OP]], 0 -; CHECK-NEXT:ret i8 [[RES]] +; CHECK-NEXT:[[RES1:%.*]] = extractvalue { i8, i1 } [[TMP2]], 0 +; CHECK-NEXT:ret i8 [[RES1]] ; CHECK: exit.fail: ; CHECK-NEXT:ret i8 0 ; @@ -41,12 +43,14 @@ define i8 @usub_no_overflow_due_to_cmp_condition2(i8 %a, i8 %b) { ; CHECK-NEXT:[[C_1:%.*]] = icmp ule i8 [[B:%.*]], [[A:%.*]] ; CHECK-NEXT:br i1 [[C_1]], label [[EXIT_FAIL:%.*]], label [[MATH:%.*]] ; CHECK: math: -; CHECK-NEXT:[[OP:%.*]] = tail call { i8, i1 } @llvm.usub.with.overflow.i8(i8 [[B]], i8 [[A]]) -; CHECK-NEXT:[[STATUS:%.*]] = extractvalue { i8, i1 } [[OP]], 1 +; CHECK-NEXT:[[RES:%.*]] = sub i8 [[B]], [[A]] +; CHECK-NEXT:[[TMP1:%.*]] = insertvalue { i8, i1 } poison, i8 [[RES]], 0 +; CHECK-NEXT:[[TMP2:%.*]] = insertvalue { i8, i1 } [[TMP1]], i1 false, 1 +; CHECK-NEXT:[[STATUS:%.*]] = extractvalue { i8, i1 } [[TMP2]], 1 ; CHECK-NEXT:br i1 [[STATUS]], label [[EXIT_FAIL]], label [[EXIT_OK:%.*]] ; CHECK: exit.ok: -; CHECK-NEXT:[[RES:%.*]] = extractvalue { i8, i1 } [[OP]], 0 -; CHECK-NEXT:ret i8 [[RES]] +; CHECK-NEXT:[[RES1:%.*]] = extractvalue { i8, i1 } [[TMP2]], 0 +; CHECK-NEXT:ret i8 [[RES1]] ; CHECK: exit.fail: ; CHECK-NEXT:ret i8 0 ; @@ -75,13 +79,15 @@ define i8 @sub_no_overflow_due_to_cmp_condition_result_used(i8 %a, i8 %b) { ; CHECK-NEXT:[[C_1:%.*]] = icmp ule i8 [[B:%.*]], [[A:%.*]] ; CHECK-NEXT:br i1 [[C_1]], label [[EXIT_FAIL:%.*]], label [[MATH:%.*]] ; CHECK: math: -; CHECK-NEXT:[[OP:%.*]] = tail call { i8, i1 } @llvm.usub.with.overflow.i8(i8 [[B]], i8 [[A]]) +; CHECK-NEXT:[[RES:%.*]] = sub i8 [[B]], [[A]] +; CHECK-NEXT:[[TMP1:%.*]] = insertvalue { i8, i1 } poison, i8 [[RES]], 0 +; CHECK-NEXT:[[OP:%.*]] = insertvalue { i8, i1 } [[TMP1]], i1 false, 1 ; CHECK-NEXT:call void @use_res({ i8, i1 } [[OP]]) ; CHECK-NEXT:[[STATUS:%.*]] = extractvalue { i8, i1 } [[OP]], 1 ; CHECK-NEXT:br i1 [[STATUS]], label [[EXIT_FAIL]], label [[EXIT_OK:%.*]] ; CHECK: exit.ok: -; CHECK-NEXT:[[RES:%.*]] = extractvalue { i8, i1 } [[OP]], 0 -; CHECK-NEXT:ret i8 [[RES]] +; CHECK-NEXT:[[RES1:%.*]] = extractvalue { i8, i1 }
[llvm-branch-commits] [llvm] [ConstraintElim] Simplify `usub_with_overflow` when A uge B (PR #135785)
https://github.com/el-ev updated https://github.com/llvm/llvm-project/pull/135785 >From b5cac9305a6af33bc0bc30d01965c5e7e333 Mon Sep 17 00:00:00 2001 From: Iris Shi <0...@owo.li> Date: Tue, 15 Apr 2025 20:20:45 +0800 Subject: [PATCH] [ConstraintElim] Simplify `usub_with_overflow` when A uge B --- .../Scalar/ConstraintElimination.cpp | 11 .../usub-with-overflow.ll | 54 +++ 2 files changed, 44 insertions(+), 21 deletions(-) diff --git a/llvm/lib/Transforms/Scalar/ConstraintElimination.cpp b/llvm/lib/Transforms/Scalar/ConstraintElimination.cpp index 15aba43721e57..71afd7a2203ef 100644 --- a/llvm/lib/Transforms/Scalar/ConstraintElimination.cpp +++ b/llvm/lib/Transforms/Scalar/ConstraintElimination.cpp @@ -1124,6 +1124,7 @@ void State::addInfoFor(BasicBlock &BB) { // Enqueue overflow intrinsics for simplification. case Intrinsic::sadd_with_overflow: case Intrinsic::ssub_with_overflow: +case Intrinsic::usub_with_overflow: case Intrinsic::ucmp: case Intrinsic::scmp: WorkList.push_back( @@ -1765,6 +1766,16 @@ tryToSimplifyOverflowMath(IntrinsicInst *II, ConstraintInfo &Info, Changed = true; break; } + case Intrinsic::usub_with_overflow: { +// usub overflows iff A < B +// TODO: If the operation is guaranteed to overflow, we could +// also apply some simplifications. +if (DoesConditionHold(CmpInst::ICMP_UGE, A, B, Info)) { + replaceAddOrSubOverflowUses(II, A, B, ToRemove); + Changed = true; +} +break; + } } return Changed; diff --git a/llvm/test/Transforms/ConstraintElimination/usub-with-overflow.ll b/llvm/test/Transforms/ConstraintElimination/usub-with-overflow.ll index 06bfd8269d97d..722116cc6ebd0 100644 --- a/llvm/test/Transforms/ConstraintElimination/usub-with-overflow.ll +++ b/llvm/test/Transforms/ConstraintElimination/usub-with-overflow.ll @@ -9,12 +9,14 @@ define i8 @usub_no_overflow_due_to_cmp_condition(i8 %a, i8 %b) { ; CHECK-NEXT:[[C_1:%.*]] = icmp uge i8 [[B:%.*]], [[A:%.*]] ; CHECK-NEXT:br i1 [[C_1]], label [[MATH:%.*]], label [[EXIT_FAIL:%.*]] ; CHECK: math: -; CHECK-NEXT:[[OP:%.*]] = tail call { i8, i1 } @llvm.usub.with.overflow.i8(i8 [[B]], i8 [[A]]) -; CHECK-NEXT:[[STATUS:%.*]] = extractvalue { i8, i1 } [[OP]], 1 +; CHECK-NEXT:[[RES:%.*]] = sub i8 [[B]], [[A]] +; CHECK-NEXT:[[TMP1:%.*]] = insertvalue { i8, i1 } poison, i8 [[RES]], 0 +; CHECK-NEXT:[[TMP2:%.*]] = insertvalue { i8, i1 } [[TMP1]], i1 false, 1 +; CHECK-NEXT:[[STATUS:%.*]] = extractvalue { i8, i1 } [[TMP2]], 1 ; CHECK-NEXT:br i1 [[STATUS]], label [[EXIT_FAIL]], label [[EXIT_OK:%.*]] ; CHECK: exit.ok: -; CHECK-NEXT:[[RES:%.*]] = extractvalue { i8, i1 } [[OP]], 0 -; CHECK-NEXT:ret i8 [[RES]] +; CHECK-NEXT:[[RES1:%.*]] = extractvalue { i8, i1 } [[TMP2]], 0 +; CHECK-NEXT:ret i8 [[RES1]] ; CHECK: exit.fail: ; CHECK-NEXT:ret i8 0 ; @@ -41,12 +43,14 @@ define i8 @usub_no_overflow_due_to_cmp_condition2(i8 %a, i8 %b) { ; CHECK-NEXT:[[C_1:%.*]] = icmp ule i8 [[B:%.*]], [[A:%.*]] ; CHECK-NEXT:br i1 [[C_1]], label [[EXIT_FAIL:%.*]], label [[MATH:%.*]] ; CHECK: math: -; CHECK-NEXT:[[OP:%.*]] = tail call { i8, i1 } @llvm.usub.with.overflow.i8(i8 [[B]], i8 [[A]]) -; CHECK-NEXT:[[STATUS:%.*]] = extractvalue { i8, i1 } [[OP]], 1 +; CHECK-NEXT:[[RES:%.*]] = sub i8 [[B]], [[A]] +; CHECK-NEXT:[[TMP1:%.*]] = insertvalue { i8, i1 } poison, i8 [[RES]], 0 +; CHECK-NEXT:[[TMP2:%.*]] = insertvalue { i8, i1 } [[TMP1]], i1 false, 1 +; CHECK-NEXT:[[STATUS:%.*]] = extractvalue { i8, i1 } [[TMP2]], 1 ; CHECK-NEXT:br i1 [[STATUS]], label [[EXIT_FAIL]], label [[EXIT_OK:%.*]] ; CHECK: exit.ok: -; CHECK-NEXT:[[RES:%.*]] = extractvalue { i8, i1 } [[OP]], 0 -; CHECK-NEXT:ret i8 [[RES]] +; CHECK-NEXT:[[RES1:%.*]] = extractvalue { i8, i1 } [[TMP2]], 0 +; CHECK-NEXT:ret i8 [[RES1]] ; CHECK: exit.fail: ; CHECK-NEXT:ret i8 0 ; @@ -75,13 +79,15 @@ define i8 @sub_no_overflow_due_to_cmp_condition_result_used(i8 %a, i8 %b) { ; CHECK-NEXT:[[C_1:%.*]] = icmp ule i8 [[B:%.*]], [[A:%.*]] ; CHECK-NEXT:br i1 [[C_1]], label [[EXIT_FAIL:%.*]], label [[MATH:%.*]] ; CHECK: math: -; CHECK-NEXT:[[OP:%.*]] = tail call { i8, i1 } @llvm.usub.with.overflow.i8(i8 [[B]], i8 [[A]]) +; CHECK-NEXT:[[RES:%.*]] = sub i8 [[B]], [[A]] +; CHECK-NEXT:[[TMP1:%.*]] = insertvalue { i8, i1 } poison, i8 [[RES]], 0 +; CHECK-NEXT:[[OP:%.*]] = insertvalue { i8, i1 } [[TMP1]], i1 false, 1 ; CHECK-NEXT:call void @use_res({ i8, i1 } [[OP]]) ; CHECK-NEXT:[[STATUS:%.*]] = extractvalue { i8, i1 } [[OP]], 1 ; CHECK-NEXT:br i1 [[STATUS]], label [[EXIT_FAIL]], label [[EXIT_OK:%.*]] ; CHECK: exit.ok: -; CHECK-NEXT:[[RES:%.*]] = extractvalue { i8, i1 } [[OP]], 0 -; CHECK-NEXT:ret i8 [[RES]] +; CHECK-NEXT:[[RES1:%.*]] = extractvalue { i8, i1 }
[llvm-branch-commits] [llvm] [llvm][EmbedBitcodePass] Prevent modifying the module with ThinLTO (PR #139999)
https://github.com/nikic commented: Didn't we switch away from cloning because it breaks blockaddress somehow? https://github.com/llvm/llvm-project/pull/13 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [ConstraintElim] Simplify `usub_with_overflow` when A uge B (PR #135785)
https://github.com/fhahn commented: Could you add an Alive2 proof showing this transform is valid given the precondition for completeness? https://github.com/llvm/llvm-project/pull/135785 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [clang][OpenMP] Improve handling of non-C/C++ directives (PR #139961)
https://github.com/AaronBallman approved this pull request. LGTM, thank you for the general fix! https://github.com/llvm/llvm-project/pull/139961 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [ConstraintElim] Simplify `usub_with_overflow` when A uge B (PR #135785)
el-ev wrote: https://alive2.llvm.org/ce/z/ZRmQES https://github.com/llvm/llvm-project/pull/135785 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [ConstraintElim] Simplify `usub_with_overflow` when A uge B (PR #135785)
https://github.com/el-ev edited https://github.com/llvm/llvm-project/pull/135785 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [flang] [mlir] [MLIR][OpenMP] Simplify OpenMP device codegen (PR #137201)
https://github.com/skatrak updated https://github.com/llvm/llvm-project/pull/137201 Rate limit · GitHub body { background-color: #f6f8fa; color: #24292e; font-family: -apple-system,BlinkMacSystemFont,Segoe UI,Helvetica,Arial,sans-serif,Apple Color Emoji,Segoe UI Emoji,Segoe UI Symbol; font-size: 14px; line-height: 1.5; margin: 0; } .container { margin: 50px auto; max-width: 600px; text-align: center; padding: 0 24px; } a { color: #0366d6; text-decoration: none; } a:hover { text-decoration: underline; } h1 { line-height: 60px; font-size: 48px; font-weight: 300; margin: 0px; text-shadow: 0 1px 0 #fff; } p { color: rgba(0, 0, 0, 0.5); margin: 20px 0 40px; } ul { list-style: none; margin: 25px 0; padding: 0; } li { display: table-cell; font-weight: bold; width: 1%; } .logo { display: inline-block; margin-top: 35px; } .logo-img-2x { display: none; } @media only screen and (-webkit-min-device-pixel-ratio: 2), only screen and ( min--moz-device-pixel-ratio: 2), only screen and ( -o-min-device-pixel-ratio: 2/1), only screen and (min-device-pixel-ratio: 2), only screen and (min-resolution: 192dpi), only screen and (min-resolution: 2dppx) { .logo-img-1x { display: none; } .logo-img-2x { display: inline-block; } } #suggestions { margin-top: 35px; color: #ccc; } #suggestions a { color: #66; font-weight: 200; font-size: 14px; margin: 0 10px; } Whoa there! You have exceeded a secondary rate limit. Please wait a few minutes before you try again; in some cases this may take up to an hour. https://support.github.com/contact";>Contact Support — https://githubstatus.com";>GitHub Status — https://twitter.com/githubstatus";>@githubstatus ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] release/20.x: [Driver] Fix _XOPEN_SOURCE definition on Solaris (#137141) (PR #140044)
https://github.com/llvmbot created https://github.com/llvm/llvm-project/pull/140044 Backport e71c8ea3cc73c8f7b0382468f355a254166d3a72 Requested by: @rorth >From 0b9ca6aebb3ca5c0c4925403172731753bac1c6a Mon Sep 17 00:00:00 2001 From: Rainer Orth Date: Sat, 26 Apr 2025 17:06:04 +0200 Subject: [PATCH] [Driver] Fix _XOPEN_SOURCE definition on Solaris (#137141) Since commit 613a077b05b8352a48695be295037306f5fca151, `flang` doesn't build any longer on Solaris/amd64: ``` flang/lib/Evaluate/intrinsics-library.cpp:225:26: error: address of overloaded function 'acos' does not match required type '__float128 (__float128)' 225 | FolderFactory::Create("acos"), | ^ ``` That patch led to the version of `quadmath.h` deep inside `/usr/gcc/` to be found, thus `HAS_QUADMATHLIB` is defined. However, the `struct HostRuntimeLibrary<__float128, LibraryVersion::Libm>` template is guarded by `_POSIX_C_SOURCE >= 200112L || _XOPEN_SOURCE >= 600`, while `clang` only predefines `_XOPEN_SOURCE=500`. This code dates back to commit 0c1941cb055fcf008e17faa6605969673211bea3 back in 2012. Currently, this is long obsolete and `gcc` prefefines `_XOPEN_SOURCE=600` instead since GCC 4.6 back in 2011. This patch follows that. Tested on `amd64-pc-solaris2.11` and `sparcv9-sun-solaris2.11`. (cherry picked from commit e71c8ea3cc73c8f7b0382468f355a254166d3a72) --- clang/lib/Basic/Targets/OSTargets.h | 9 + 1 file changed, 1 insertion(+), 8 deletions(-) diff --git a/clang/lib/Basic/Targets/OSTargets.h b/clang/lib/Basic/Targets/OSTargets.h index 991efd2bde01f..4cf4230273d38 100644 --- a/clang/lib/Basic/Targets/OSTargets.h +++ b/clang/lib/Basic/Targets/OSTargets.h @@ -618,14 +618,7 @@ class LLVM_LIBRARY_VISIBILITY SolarisTargetInfo : public OSTargetInfo { DefineStd(Builder, "unix", Opts); Builder.defineMacro("__svr4__"); Builder.defineMacro("__SVR4"); -// Solaris headers require _XOPEN_SOURCE to be set to 600 for C99 and -// newer, but to 500 for everything else. feature_test.h has a check to -// ensure that you are not using C99 with an old version of X/Open or C89 -// with a new version. -if (Opts.C99) - Builder.defineMacro("_XOPEN_SOURCE", "600"); -else - Builder.defineMacro("_XOPEN_SOURCE", "500"); +Builder.defineMacro("_XOPEN_SOURCE", "600"); if (Opts.CPlusPlus) { Builder.defineMacro("__C99FEATURES__"); Builder.defineMacro("_FILE_OFFSET_BITS", "64"); ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] release/20.x: [Driver] Fix _XOPEN_SOURCE definition on Solaris (#137141) (PR #140044)
https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/140044 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] release/20.x: [Driver] Fix _XOPEN_SOURCE definition on Solaris (#137141) (PR #140044)
llvmbot wrote: @MaskRay What do you think about merging this PR to the release branch? https://github.com/llvm/llvm-project/pull/140044 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] release/20.x: [Driver] Fix _XOPEN_SOURCE definition on Solaris (#137141) (PR #140044)
llvmbot wrote: @llvm/pr-subscribers-clang Author: None (llvmbot) Changes Backport e71c8ea3cc73c8f7b0382468f355a254166d3a72 Requested by: @rorth --- Full diff: https://github.com/llvm/llvm-project/pull/140044.diff 1 Files Affected: - (modified) clang/lib/Basic/Targets/OSTargets.h (+1-8) ``diff diff --git a/clang/lib/Basic/Targets/OSTargets.h b/clang/lib/Basic/Targets/OSTargets.h index 991efd2bde01f..4cf4230273d38 100644 --- a/clang/lib/Basic/Targets/OSTargets.h +++ b/clang/lib/Basic/Targets/OSTargets.h @@ -618,14 +618,7 @@ class LLVM_LIBRARY_VISIBILITY SolarisTargetInfo : public OSTargetInfo { DefineStd(Builder, "unix", Opts); Builder.defineMacro("__svr4__"); Builder.defineMacro("__SVR4"); -// Solaris headers require _XOPEN_SOURCE to be set to 600 for C99 and -// newer, but to 500 for everything else. feature_test.h has a check to -// ensure that you are not using C99 with an old version of X/Open or C89 -// with a new version. -if (Opts.C99) - Builder.defineMacro("_XOPEN_SOURCE", "600"); -else - Builder.defineMacro("_XOPEN_SOURCE", "500"); +Builder.defineMacro("_XOPEN_SOURCE", "600"); if (Opts.CPlusPlus) { Builder.defineMacro("__C99FEATURES__"); Builder.defineMacro("_FILE_OFFSET_BITS", "64"); `` https://github.com/llvm/llvm-project/pull/140044 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [mlir] [MLIR][ArmSVE] Add an ArmSVE dialect operation which maps to svusmmla (PR #135634)
https://github.com/momchil-velikov updated https://github.com/llvm/llvm-project/pull/135634 >From e60ca5aadf1043a0cb59d50da5f3dbf68bd50c51 Mon Sep 17 00:00:00 2001 From: Momchil Velikov Date: Thu, 10 Apr 2025 14:38:27 + Subject: [PATCH] [MLIR][ArmSVE] Add an ArmSVE dialect operation which maps to `svusmmla` --- mlir/include/mlir/Dialect/ArmSVE/IR/ArmSVE.td | 95 +++ .../Transforms/LegalizeForLLVMExport.cpp | 4 + .../Dialect/ArmSVE/legalize-for-llvm.mlir | 12 +++ mlir/test/Dialect/ArmSVE/roundtrip.mlir | 11 +++ mlir/test/Target/LLVMIR/arm-sve.mlir | 12 +++ 5 files changed, 96 insertions(+), 38 deletions(-) diff --git a/mlir/include/mlir/Dialect/ArmSVE/IR/ArmSVE.td b/mlir/include/mlir/Dialect/ArmSVE/IR/ArmSVE.td index 3a990f8464ef8..7385bb73b449a 100644 --- a/mlir/include/mlir/Dialect/ArmSVE/IR/ArmSVE.td +++ b/mlir/include/mlir/Dialect/ArmSVE/IR/ArmSVE.td @@ -147,11 +147,9 @@ class ScalableMaskedIOp, - AllTypesMatch<["acc", "dst"]>, - ]> { +def SdotOp : ArmSVE_Op<"sdot", [Pure, +AllTypesMatch<["src1", "src2"]>, +AllTypesMatch<["acc", "dst"]>]> { let summary = "Vector-vector dot product and accumulate op"; let description = [{ SDOT: Signed integer addition of dot product. @@ -178,11 +176,9 @@ def SdotOp : ArmSVE_Op<"sdot", "$acc `,` $src1 `,` $src2 attr-dict `:` type($src1) `to` type($dst)"; } -def SmmlaOp : ArmSVE_Op<"smmla", -[Pure, -AllTypesMatch<["src1", "src2"]>, -AllTypesMatch<["acc", "dst"]>, - ]> { +def SmmlaOp : ArmSVE_Op<"smmla", [Pure, + AllTypesMatch<["src1", "src2"]>, + AllTypesMatch<["acc", "dst"]>]> { let summary = "Matrix-matrix multiply and accumulate op"; let description = [{ SMMLA: Signed integer matrix multiply-accumulate. @@ -210,11 +206,9 @@ def SmmlaOp : ArmSVE_Op<"smmla", "$acc `,` $src1 `,` $src2 attr-dict `:` type($src1) `to` type($dst)"; } -def UdotOp : ArmSVE_Op<"udot", - [Pure, - AllTypesMatch<["src1", "src2"]>, - AllTypesMatch<["acc", "dst"]>, - ]> { +def UdotOp : ArmSVE_Op<"udot", [Pure, +AllTypesMatch<["src1", "src2"]>, +AllTypesMatch<["acc", "dst"]>]> { let summary = "Vector-vector dot product and accumulate op"; let description = [{ UDOT: Unsigned integer addition of dot product. @@ -241,11 +235,9 @@ def UdotOp : ArmSVE_Op<"udot", "$acc `,` $src1 `,` $src2 attr-dict `:` type($src1) `to` type($dst)"; } -def UmmlaOp : ArmSVE_Op<"ummla", -[Pure, -AllTypesMatch<["src1", "src2"]>, -AllTypesMatch<["acc", "dst"]>, - ]> { +def UmmlaOp : ArmSVE_Op<"ummla", [Pure, + AllTypesMatch<["src1", "src2"]>, + AllTypesMatch<["acc", "dst"]>]> { let summary = "Matrix-matrix multiply and accumulate op"; let description = [{ UMMLA: Unsigned integer matrix multiply-accumulate. @@ -273,14 +265,42 @@ def UmmlaOp : ArmSVE_Op<"ummla", "$acc `,` $src1 `,` $src2 attr-dict `:` type($src1) `to` type($dst)"; } +def UsmmlaOp : ArmSVE_Op<"usmmla", [Pure, +AllTypesMatch<["src1", "src2"]>, +AllTypesMatch<["acc", "dst"]>]> { + let summary = "Matrix-matrix multiply and accumulate op"; + let description = [{ +USMMLA: Unsigned by signed integer matrix multiply-accumulate. + +The unsigned by signed integer matrix multiply-accumulate operation +multiplies the 2×8 matrix of unsigned 8-bit integer values held +the first source vector by the 8×2 matrix of signed 8-bit integer +values in the second source vector. The resulting 2×2 widened 32-bit +integer matrix product is then added to the 32-bit integer matrix +accumulator. + +Source: +https://developer.arm.com/documentation/100987/ + }]; + // Supports (vector<16xi8>, vector<16xi8>) -> (vector<4xi32>) + let arguments = (ins + ScalableVectorOfLengthAndType<[4], [I32]>:$acc, + ScalableVectorOfLengthAndType<[16], [I8]>:$src1, + ScalableVectorOfLengthAndType<[16], [I8]>:$src2 + ); + let results = (outs ScalableVectorOfLengthAndType<[4], [I32]>:$dst); + let assemblyFormat = +"$acc `,` $src1 `,` $src2 attr-dict `:` type($src1) `to` type($dst)"; +} + class SvboolTypeConstraint : TypesMatchWith< "expected corresponding svbool type widened to [16]xi1", lhsArg, rhsArg, "VectorType(VectorType::Builder(::llvm::cast($_self)).setDim(::llvm::cast($_self).getRank() - 1, 16))">; def ConvertFromSvboolOp : ArmSVE_Op<"convert_from_svbool", -[Pure, SvboolTypeConstraint<"result", "source">]> -{ +
[llvm-branch-commits] [mlir] [MLIR][ArmSVE] Add initial lowering of vector.contract to SVE `*MMLA` instructions (PR #135636)
https://github.com/momchil-velikov updated https://github.com/llvm/llvm-project/pull/135636 >From aa8a667f206874af3b26811ec04d58be12ad43de Mon Sep 17 00:00:00 2001 From: Momchil Velikov Date: Tue, 8 Apr 2025 14:43:54 + Subject: [PATCH 1/3] [MLIR][ArmSVE] Add initial lowering of `vector.contract` to SVE `*MMLA` instructions --- mlir/include/mlir/Conversion/Passes.td| 4 + .../Dialect/ArmSVE/Transforms/Transforms.h| 3 + .../Conversion/VectorToLLVM/CMakeLists.txt| 1 + .../VectorToLLVM/ConvertVectorToLLVMPass.cpp | 7 + .../LowerContractionToSMMLAPattern.cpp| 5 +- .../Dialect/ArmSVE/Transforms/CMakeLists.txt | 1 + .../LowerContractionToSVEI8MMPattern.cpp | 304 ++ .../Vector/CPU/ArmSVE/vector-smmla.mlir | 94 ++ .../Vector/CPU/ArmSVE/vector-summla.mlir | 85 + .../Vector/CPU/ArmSVE/vector-ummla.mlir | 94 ++ .../Vector/CPU/ArmSVE/vector-usmmla.mlir | 95 ++ .../CPU/ArmSVE/contraction-smmla-4x8x4.mlir | 117 +++ .../ArmSVE/contraction-smmla-8x8x8-vs2.mlir | 159 + .../CPU/ArmSVE/contraction-summla-4x8x4.mlir | 118 +++ .../CPU/ArmSVE/contraction-ummla-4x8x4.mlir | 119 +++ .../CPU/ArmSVE/contraction-usmmla-4x8x4.mlir | 117 +++ 16 files changed, 1322 insertions(+), 1 deletion(-) create mode 100644 mlir/lib/Dialect/ArmSVE/Transforms/LowerContractionToSVEI8MMPattern.cpp create mode 100644 mlir/test/Dialect/Vector/CPU/ArmSVE/vector-smmla.mlir create mode 100644 mlir/test/Dialect/Vector/CPU/ArmSVE/vector-summla.mlir create mode 100644 mlir/test/Dialect/Vector/CPU/ArmSVE/vector-ummla.mlir create mode 100644 mlir/test/Dialect/Vector/CPU/ArmSVE/vector-usmmla.mlir create mode 100644 mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/contraction-smmla-4x8x4.mlir create mode 100644 mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/contraction-smmla-8x8x8-vs2.mlir create mode 100644 mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/contraction-summla-4x8x4.mlir create mode 100644 mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/contraction-ummla-4x8x4.mlir create mode 100644 mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/contraction-usmmla-4x8x4.mlir diff --git a/mlir/include/mlir/Conversion/Passes.td b/mlir/include/mlir/Conversion/Passes.td index 10557658d5d7d..b496ee0114910 100644 --- a/mlir/include/mlir/Conversion/Passes.td +++ b/mlir/include/mlir/Conversion/Passes.td @@ -1431,6 +1431,10 @@ def ConvertVectorToLLVMPass : Pass<"convert-vector-to-llvm"> { "bool", /*default=*/"false", "Enables the use of ArmSVE dialect while lowering the vector " "dialect.">, +Option<"armI8MM", "enable-arm-i8mm", + "bool", /*default=*/"false", + "Enables the use of Arm FEAT_I8MM instructions while lowering " + "the vector dialect.">, Option<"x86Vector", "enable-x86vector", "bool", /*default=*/"false", "Enables the use of X86Vector dialect while lowering the vector " diff --git a/mlir/include/mlir/Dialect/ArmSVE/Transforms/Transforms.h b/mlir/include/mlir/Dialect/ArmSVE/Transforms/Transforms.h index 8665c8224cc45..232e2be29e574 100644 --- a/mlir/include/mlir/Dialect/ArmSVE/Transforms/Transforms.h +++ b/mlir/include/mlir/Dialect/ArmSVE/Transforms/Transforms.h @@ -20,6 +20,9 @@ class RewritePatternSet; void populateArmSVELegalizeForLLVMExportPatterns( const LLVMTypeConverter &converter, RewritePatternSet &patterns); +void populateLowerContractionToSVEI8MMPatternPatterns( +RewritePatternSet &patterns); + /// Configure the target to support lowering ArmSVE ops to ops that map to LLVM /// intrinsics. void configureArmSVELegalizeForExportTarget(LLVMConversionTarget &target); diff --git a/mlir/lib/Conversion/VectorToLLVM/CMakeLists.txt b/mlir/lib/Conversion/VectorToLLVM/CMakeLists.txt index 330474a718e30..8e2620029c354 100644 --- a/mlir/lib/Conversion/VectorToLLVM/CMakeLists.txt +++ b/mlir/lib/Conversion/VectorToLLVM/CMakeLists.txt @@ -35,6 +35,7 @@ add_mlir_conversion_library(MLIRVectorToLLVMPass MLIRVectorToLLVM MLIRArmNeonDialect + MLIRArmNeonTransforms MLIRArmSVEDialect MLIRArmSVETransforms MLIRAMXDialect diff --git a/mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.cpp b/mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.cpp index 0ee6dce9ee94b..293e01a5bf4d4 100644 --- a/mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.cpp +++ b/mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.cpp @@ -14,6 +14,7 @@ #include "mlir/Dialect/AMX/Transforms.h" #include "mlir/Dialect/Arith/IR/Arith.h" #include "mlir/Dialect/ArmNeon/ArmNeonDialect.h" +#include "mlir/Dialect/ArmNeon/Transforms.h" #include "mlir/Dialect/ArmSVE/IR/ArmSVEDialect.h" #include "mlir/Dialect/ArmSVE/Transforms/Transforms.h" #include "mlir/Dialect/Func/IR/FuncOps.h" @@ -82,6 +83,12 @@ void ConvertVectorToLLVMPass::runOnOperation() { populateVectorStepLoweringPattern
[llvm-branch-commits] [mlir] [MLIR][ArmSVE] Add an ArmSVE dialect operation which maps to svusmmla (PR #135634)
https://github.com/momchil-velikov updated https://github.com/llvm/llvm-project/pull/135634 >From e60ca5aadf1043a0cb59d50da5f3dbf68bd50c51 Mon Sep 17 00:00:00 2001 From: Momchil Velikov Date: Thu, 10 Apr 2025 14:38:27 + Subject: [PATCH] [MLIR][ArmSVE] Add an ArmSVE dialect operation which maps to `svusmmla` --- mlir/include/mlir/Dialect/ArmSVE/IR/ArmSVE.td | 95 +++ .../Transforms/LegalizeForLLVMExport.cpp | 4 + .../Dialect/ArmSVE/legalize-for-llvm.mlir | 12 +++ mlir/test/Dialect/ArmSVE/roundtrip.mlir | 11 +++ mlir/test/Target/LLVMIR/arm-sve.mlir | 12 +++ 5 files changed, 96 insertions(+), 38 deletions(-) diff --git a/mlir/include/mlir/Dialect/ArmSVE/IR/ArmSVE.td b/mlir/include/mlir/Dialect/ArmSVE/IR/ArmSVE.td index 3a990f8464ef8..7385bb73b449a 100644 --- a/mlir/include/mlir/Dialect/ArmSVE/IR/ArmSVE.td +++ b/mlir/include/mlir/Dialect/ArmSVE/IR/ArmSVE.td @@ -147,11 +147,9 @@ class ScalableMaskedIOp, - AllTypesMatch<["acc", "dst"]>, - ]> { +def SdotOp : ArmSVE_Op<"sdot", [Pure, +AllTypesMatch<["src1", "src2"]>, +AllTypesMatch<["acc", "dst"]>]> { let summary = "Vector-vector dot product and accumulate op"; let description = [{ SDOT: Signed integer addition of dot product. @@ -178,11 +176,9 @@ def SdotOp : ArmSVE_Op<"sdot", "$acc `,` $src1 `,` $src2 attr-dict `:` type($src1) `to` type($dst)"; } -def SmmlaOp : ArmSVE_Op<"smmla", -[Pure, -AllTypesMatch<["src1", "src2"]>, -AllTypesMatch<["acc", "dst"]>, - ]> { +def SmmlaOp : ArmSVE_Op<"smmla", [Pure, + AllTypesMatch<["src1", "src2"]>, + AllTypesMatch<["acc", "dst"]>]> { let summary = "Matrix-matrix multiply and accumulate op"; let description = [{ SMMLA: Signed integer matrix multiply-accumulate. @@ -210,11 +206,9 @@ def SmmlaOp : ArmSVE_Op<"smmla", "$acc `,` $src1 `,` $src2 attr-dict `:` type($src1) `to` type($dst)"; } -def UdotOp : ArmSVE_Op<"udot", - [Pure, - AllTypesMatch<["src1", "src2"]>, - AllTypesMatch<["acc", "dst"]>, - ]> { +def UdotOp : ArmSVE_Op<"udot", [Pure, +AllTypesMatch<["src1", "src2"]>, +AllTypesMatch<["acc", "dst"]>]> { let summary = "Vector-vector dot product and accumulate op"; let description = [{ UDOT: Unsigned integer addition of dot product. @@ -241,11 +235,9 @@ def UdotOp : ArmSVE_Op<"udot", "$acc `,` $src1 `,` $src2 attr-dict `:` type($src1) `to` type($dst)"; } -def UmmlaOp : ArmSVE_Op<"ummla", -[Pure, -AllTypesMatch<["src1", "src2"]>, -AllTypesMatch<["acc", "dst"]>, - ]> { +def UmmlaOp : ArmSVE_Op<"ummla", [Pure, + AllTypesMatch<["src1", "src2"]>, + AllTypesMatch<["acc", "dst"]>]> { let summary = "Matrix-matrix multiply and accumulate op"; let description = [{ UMMLA: Unsigned integer matrix multiply-accumulate. @@ -273,14 +265,42 @@ def UmmlaOp : ArmSVE_Op<"ummla", "$acc `,` $src1 `,` $src2 attr-dict `:` type($src1) `to` type($dst)"; } +def UsmmlaOp : ArmSVE_Op<"usmmla", [Pure, +AllTypesMatch<["src1", "src2"]>, +AllTypesMatch<["acc", "dst"]>]> { + let summary = "Matrix-matrix multiply and accumulate op"; + let description = [{ +USMMLA: Unsigned by signed integer matrix multiply-accumulate. + +The unsigned by signed integer matrix multiply-accumulate operation +multiplies the 2×8 matrix of unsigned 8-bit integer values held +the first source vector by the 8×2 matrix of signed 8-bit integer +values in the second source vector. The resulting 2×2 widened 32-bit +integer matrix product is then added to the 32-bit integer matrix +accumulator. + +Source: +https://developer.arm.com/documentation/100987/ + }]; + // Supports (vector<16xi8>, vector<16xi8>) -> (vector<4xi32>) + let arguments = (ins + ScalableVectorOfLengthAndType<[4], [I32]>:$acc, + ScalableVectorOfLengthAndType<[16], [I8]>:$src1, + ScalableVectorOfLengthAndType<[16], [I8]>:$src2 + ); + let results = (outs ScalableVectorOfLengthAndType<[4], [I32]>:$dst); + let assemblyFormat = +"$acc `,` $src1 `,` $src2 attr-dict `:` type($src1) `to` type($dst)"; +} + class SvboolTypeConstraint : TypesMatchWith< "expected corresponding svbool type widened to [16]xi1", lhsArg, rhsArg, "VectorType(VectorType::Builder(::llvm::cast($_self)).setDim(::llvm::cast($_self).getRank() - 1, 16))">; def ConvertFromSvboolOp : ArmSVE_Op<"convert_from_svbool", -[Pure, SvboolTypeConstraint<"result", "source">]> -{ +
[llvm-branch-commits] [mlir] [MLIR][ArmSVE] Add initial lowering of vector.contract to SVE `*MMLA` instructions (PR #135636)
https://github.com/momchil-velikov updated https://github.com/llvm/llvm-project/pull/135636 >From aa8a667f206874af3b26811ec04d58be12ad43de Mon Sep 17 00:00:00 2001 From: Momchil Velikov Date: Tue, 8 Apr 2025 14:43:54 + Subject: [PATCH 1/3] [MLIR][ArmSVE] Add initial lowering of `vector.contract` to SVE `*MMLA` instructions --- mlir/include/mlir/Conversion/Passes.td| 4 + .../Dialect/ArmSVE/Transforms/Transforms.h| 3 + .../Conversion/VectorToLLVM/CMakeLists.txt| 1 + .../VectorToLLVM/ConvertVectorToLLVMPass.cpp | 7 + .../LowerContractionToSMMLAPattern.cpp| 5 +- .../Dialect/ArmSVE/Transforms/CMakeLists.txt | 1 + .../LowerContractionToSVEI8MMPattern.cpp | 304 ++ .../Vector/CPU/ArmSVE/vector-smmla.mlir | 94 ++ .../Vector/CPU/ArmSVE/vector-summla.mlir | 85 + .../Vector/CPU/ArmSVE/vector-ummla.mlir | 94 ++ .../Vector/CPU/ArmSVE/vector-usmmla.mlir | 95 ++ .../CPU/ArmSVE/contraction-smmla-4x8x4.mlir | 117 +++ .../ArmSVE/contraction-smmla-8x8x8-vs2.mlir | 159 + .../CPU/ArmSVE/contraction-summla-4x8x4.mlir | 118 +++ .../CPU/ArmSVE/contraction-ummla-4x8x4.mlir | 119 +++ .../CPU/ArmSVE/contraction-usmmla-4x8x4.mlir | 117 +++ 16 files changed, 1322 insertions(+), 1 deletion(-) create mode 100644 mlir/lib/Dialect/ArmSVE/Transforms/LowerContractionToSVEI8MMPattern.cpp create mode 100644 mlir/test/Dialect/Vector/CPU/ArmSVE/vector-smmla.mlir create mode 100644 mlir/test/Dialect/Vector/CPU/ArmSVE/vector-summla.mlir create mode 100644 mlir/test/Dialect/Vector/CPU/ArmSVE/vector-ummla.mlir create mode 100644 mlir/test/Dialect/Vector/CPU/ArmSVE/vector-usmmla.mlir create mode 100644 mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/contraction-smmla-4x8x4.mlir create mode 100644 mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/contraction-smmla-8x8x8-vs2.mlir create mode 100644 mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/contraction-summla-4x8x4.mlir create mode 100644 mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/contraction-ummla-4x8x4.mlir create mode 100644 mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/contraction-usmmla-4x8x4.mlir diff --git a/mlir/include/mlir/Conversion/Passes.td b/mlir/include/mlir/Conversion/Passes.td index 10557658d5d7d..b496ee0114910 100644 --- a/mlir/include/mlir/Conversion/Passes.td +++ b/mlir/include/mlir/Conversion/Passes.td @@ -1431,6 +1431,10 @@ def ConvertVectorToLLVMPass : Pass<"convert-vector-to-llvm"> { "bool", /*default=*/"false", "Enables the use of ArmSVE dialect while lowering the vector " "dialect.">, +Option<"armI8MM", "enable-arm-i8mm", + "bool", /*default=*/"false", + "Enables the use of Arm FEAT_I8MM instructions while lowering " + "the vector dialect.">, Option<"x86Vector", "enable-x86vector", "bool", /*default=*/"false", "Enables the use of X86Vector dialect while lowering the vector " diff --git a/mlir/include/mlir/Dialect/ArmSVE/Transforms/Transforms.h b/mlir/include/mlir/Dialect/ArmSVE/Transforms/Transforms.h index 8665c8224cc45..232e2be29e574 100644 --- a/mlir/include/mlir/Dialect/ArmSVE/Transforms/Transforms.h +++ b/mlir/include/mlir/Dialect/ArmSVE/Transforms/Transforms.h @@ -20,6 +20,9 @@ class RewritePatternSet; void populateArmSVELegalizeForLLVMExportPatterns( const LLVMTypeConverter &converter, RewritePatternSet &patterns); +void populateLowerContractionToSVEI8MMPatternPatterns( +RewritePatternSet &patterns); + /// Configure the target to support lowering ArmSVE ops to ops that map to LLVM /// intrinsics. void configureArmSVELegalizeForExportTarget(LLVMConversionTarget &target); diff --git a/mlir/lib/Conversion/VectorToLLVM/CMakeLists.txt b/mlir/lib/Conversion/VectorToLLVM/CMakeLists.txt index 330474a718e30..8e2620029c354 100644 --- a/mlir/lib/Conversion/VectorToLLVM/CMakeLists.txt +++ b/mlir/lib/Conversion/VectorToLLVM/CMakeLists.txt @@ -35,6 +35,7 @@ add_mlir_conversion_library(MLIRVectorToLLVMPass MLIRVectorToLLVM MLIRArmNeonDialect + MLIRArmNeonTransforms MLIRArmSVEDialect MLIRArmSVETransforms MLIRAMXDialect diff --git a/mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.cpp b/mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.cpp index 0ee6dce9ee94b..293e01a5bf4d4 100644 --- a/mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.cpp +++ b/mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.cpp @@ -14,6 +14,7 @@ #include "mlir/Dialect/AMX/Transforms.h" #include "mlir/Dialect/Arith/IR/Arith.h" #include "mlir/Dialect/ArmNeon/ArmNeonDialect.h" +#include "mlir/Dialect/ArmNeon/Transforms.h" #include "mlir/Dialect/ArmSVE/IR/ArmSVEDialect.h" #include "mlir/Dialect/ArmSVE/Transforms/Transforms.h" #include "mlir/Dialect/Func/IR/FuncOps.h" @@ -82,6 +83,12 @@ void ConvertVectorToLLVMPass::runOnOperation() { populateVectorStepLoweringPattern
[llvm-branch-commits] [lld] release/20.x: [LLD][COFF] Allow -arm64xsameaddress in ARM64EC directives (#139631) (PR #140051)
https://github.com/llvmbot created https://github.com/llvm/llvm-project/pull/140051 Backport d5da557782dd47395fb41e03d7663df6319d7ea6 Requested by: @cjacek >From 7ebd643db843168d1e6b11f4339a0bbeb61e7d89 Mon Sep 17 00:00:00 2001 From: Jacek Caban Date: Thu, 15 May 2025 03:28:18 -0700 Subject: [PATCH] [LLD][COFF] Allow -arm64xsameaddress in ARM64EC directives (#139631) Make it a no-op for now, which is sufficient for non-hybrid images. Fixes #131712. (cherry picked from commit d5da557782dd47395fb41e03d7663df6319d7ea6) --- lld/COFF/Driver.cpp | 6 +++ lld/COFF/Options.td | 1 + lld/test/COFF/arm64x-sameaddress.test | 56 +++ 3 files changed, 63 insertions(+) create mode 100644 lld/test/COFF/arm64x-sameaddress.test diff --git a/lld/COFF/Driver.cpp b/lld/COFF/Driver.cpp index f50ca529df4d7..a669b7e9296f6 100644 --- a/lld/COFF/Driver.cpp +++ b/lld/COFF/Driver.cpp @@ -492,6 +492,12 @@ void LinkerDriver::parseDirectives(InputFile *file) { case OPT_alternatename: parseAlternateName(arg->getValue()); break; +case OPT_arm64xsameaddress: + if (!file->symtab.isEC()) +Warn(ctx) << arg->getSpelling() + << " is not allowed in non-ARM64EC files (" << toString(file) + << ")"; + break; case OPT_defaultlib: if (std::optional path = findLibIfNew(arg->getValue())) enqueuePath(*path, false, false); diff --git a/lld/COFF/Options.td b/lld/COFF/Options.td index b6fd3d0daaef9..ea2e7ded38043 100644 --- a/lld/COFF/Options.td +++ b/lld/COFF/Options.td @@ -355,3 +355,4 @@ def tlbid : P_priv<"tlbid">; def tlbout : P_priv<"tlbout">; def verbose_all : P_priv<"verbose">; def guardsym : P_priv<"guardsym">; +def arm64xsameaddress : P_priv<"arm64xsameaddress">; diff --git a/lld/test/COFF/arm64x-sameaddress.test b/lld/test/COFF/arm64x-sameaddress.test new file mode 100644 index 0..c69be9d268c3b --- /dev/null +++ b/lld/test/COFF/arm64x-sameaddress.test @@ -0,0 +1,56 @@ +REQUIRES: aarch64 +RUN: split-file %s %t.dir && cd %t.dir + +RUN: llvm-mc -filetype=obj -triple=arm64ec-windows func-arm64ec.s -o func-arm64ec.obj +RUN: llvm-mc -filetype=obj -triple=aarch64-windows func-arm64.s -o func-arm64.obj +RUN: llvm-mc -filetype=obj -triple=arm64ec-windows drectve.s -o drectve.obj +RUN: llvm-mc -filetype=obj -triple=aarch64-windows drectve.s -o drectve-arm64.obj +RUN: llvm-mc -filetype=obj -triple=arm64ec-windows %S/Inputs/loadconfig-arm64ec.s -o loadconfig-arm64ec.obj +RUN: llvm-mc -filetype=obj -triple=aarch64-windows %S/Inputs/loadconfig-arm64.s -o loadconfig-arm64.obj + +RUN: lld-link -machine:arm64x -dll -noentry -out:out.dll loadconfig-arm64.obj loadconfig-arm64ec.obj \ +RUN: func-arm64.obj func-arm64ec.obj drectve.obj + +RUN: lld-link -machine:arm64x -dll -noentry -out:out-cmd.dll loadconfig-arm64.obj loadconfig-arm64ec.obj \ +RUN: func-arm64.obj func-arm64ec.obj -arm64xsameaddress:func + +RUN: lld-link -machine:arm64ec -dll -noentry -out:out-ec.dll loadconfig-arm64ec.obj func-arm64ec.obj drectve.obj + +RUN: lld-link -machine:arm64x -dll -noentry -out:out-warn.dll loadconfig-arm64.obj loadconfig-arm64ec.obj \ +RUN: func-arm64.obj func-arm64ec.obj drectve-arm64.obj 2>&1 | FileCheck --check-prefix=WARN %s +WARN: lld-link: warning: -arm64xsameaddress: is not allowed in non-ARM64EC files (drectve-arm64.obj) + +#--- func-arm64.s +.section .text,"xr",discard,func +.globl func +func: +mov x0, #1 +ret + +#--- func-arm64ec.s +.section .text,"xr",discard,"#func" +.globl "#func" +"#func": +mov x0, #2 +ret + +.weak_anti_dep func +.set func,"#func" + +.section .wowthk,"xr",discard,entry_thunk +.globl entry_thunk +entry_thunk: +mov x0, #3 +ret + +.section .test,"dr" +.rva func + + .section .hybmp$x,"yi" + .symidx "#func" + .symidx entry_thunk + .word 1 + +#--- drectve.s +.section .drectve, "yn" +.ascii " -arm64xsameaddress:func" ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lld] release/20.x: [LLD][COFF] Allow -arm64xsameaddress in ARM64EC directives (#139631) (PR #140051)
https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/140051 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lld] release/20.x: [LLD][COFF] Allow -arm64xsameaddress in ARM64EC directives (#139631) (PR #140051)
llvmbot wrote: @mstorsjo What do you think about merging this PR to the release branch? https://github.com/llvm/llvm-project/pull/140051 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lld] release/20.x: [LLD][COFF] Allow -arm64xsameaddress in ARM64EC directives (#139631) (PR #140051)
llvmbot wrote: @llvm/pr-subscribers-lld Author: None (llvmbot) Changes Backport d5da557782dd47395fb41e03d7663df6319d7ea6 Requested by: @cjacek --- Full diff: https://github.com/llvm/llvm-project/pull/140051.diff 3 Files Affected: - (modified) lld/COFF/Driver.cpp (+6) - (modified) lld/COFF/Options.td (+1) - (added) lld/test/COFF/arm64x-sameaddress.test (+56) ``diff diff --git a/lld/COFF/Driver.cpp b/lld/COFF/Driver.cpp index f50ca529df4d7..a669b7e9296f6 100644 --- a/lld/COFF/Driver.cpp +++ b/lld/COFF/Driver.cpp @@ -492,6 +492,12 @@ void LinkerDriver::parseDirectives(InputFile *file) { case OPT_alternatename: parseAlternateName(arg->getValue()); break; +case OPT_arm64xsameaddress: + if (!file->symtab.isEC()) +Warn(ctx) << arg->getSpelling() + << " is not allowed in non-ARM64EC files (" << toString(file) + << ")"; + break; case OPT_defaultlib: if (std::optional path = findLibIfNew(arg->getValue())) enqueuePath(*path, false, false); diff --git a/lld/COFF/Options.td b/lld/COFF/Options.td index b6fd3d0daaef9..ea2e7ded38043 100644 --- a/lld/COFF/Options.td +++ b/lld/COFF/Options.td @@ -355,3 +355,4 @@ def tlbid : P_priv<"tlbid">; def tlbout : P_priv<"tlbout">; def verbose_all : P_priv<"verbose">; def guardsym : P_priv<"guardsym">; +def arm64xsameaddress : P_priv<"arm64xsameaddress">; diff --git a/lld/test/COFF/arm64x-sameaddress.test b/lld/test/COFF/arm64x-sameaddress.test new file mode 100644 index 0..c69be9d268c3b --- /dev/null +++ b/lld/test/COFF/arm64x-sameaddress.test @@ -0,0 +1,56 @@ +REQUIRES: aarch64 +RUN: split-file %s %t.dir && cd %t.dir + +RUN: llvm-mc -filetype=obj -triple=arm64ec-windows func-arm64ec.s -o func-arm64ec.obj +RUN: llvm-mc -filetype=obj -triple=aarch64-windows func-arm64.s -o func-arm64.obj +RUN: llvm-mc -filetype=obj -triple=arm64ec-windows drectve.s -o drectve.obj +RUN: llvm-mc -filetype=obj -triple=aarch64-windows drectve.s -o drectve-arm64.obj +RUN: llvm-mc -filetype=obj -triple=arm64ec-windows %S/Inputs/loadconfig-arm64ec.s -o loadconfig-arm64ec.obj +RUN: llvm-mc -filetype=obj -triple=aarch64-windows %S/Inputs/loadconfig-arm64.s -o loadconfig-arm64.obj + +RUN: lld-link -machine:arm64x -dll -noentry -out:out.dll loadconfig-arm64.obj loadconfig-arm64ec.obj \ +RUN: func-arm64.obj func-arm64ec.obj drectve.obj + +RUN: lld-link -machine:arm64x -dll -noentry -out:out-cmd.dll loadconfig-arm64.obj loadconfig-arm64ec.obj \ +RUN: func-arm64.obj func-arm64ec.obj -arm64xsameaddress:func + +RUN: lld-link -machine:arm64ec -dll -noentry -out:out-ec.dll loadconfig-arm64ec.obj func-arm64ec.obj drectve.obj + +RUN: lld-link -machine:arm64x -dll -noentry -out:out-warn.dll loadconfig-arm64.obj loadconfig-arm64ec.obj \ +RUN: func-arm64.obj func-arm64ec.obj drectve-arm64.obj 2>&1 | FileCheck --check-prefix=WARN %s +WARN: lld-link: warning: -arm64xsameaddress: is not allowed in non-ARM64EC files (drectve-arm64.obj) + +#--- func-arm64.s +.section .text,"xr",discard,func +.globl func +func: +mov x0, #1 +ret + +#--- func-arm64ec.s +.section .text,"xr",discard,"#func" +.globl "#func" +"#func": +mov x0, #2 +ret + +.weak_anti_dep func +.set func,"#func" + +.section .wowthk,"xr",discard,entry_thunk +.globl entry_thunk +entry_thunk: +mov x0, #3 +ret + +.section .test,"dr" +.rva func + + .section .hybmp$x,"yi" + .symidx "#func" + .symidx entry_thunk + .word 1 + +#--- drectve.s +.section .drectve, "yn" +.ascii " -arm64xsameaddress:func" `` https://github.com/llvm/llvm-project/pull/140051 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lld] release/20.x: [LLD][COFF] Allow -arm64xsameaddress in ARM64EC directives (#139631) (PR #140051)
llvmbot wrote: @llvm/pr-subscribers-platform-windows @llvm/pr-subscribers-lld-coff Author: None (llvmbot) Changes Backport d5da557782dd47395fb41e03d7663df6319d7ea6 Requested by: @cjacek --- Full diff: https://github.com/llvm/llvm-project/pull/140051.diff 3 Files Affected: - (modified) lld/COFF/Driver.cpp (+6) - (modified) lld/COFF/Options.td (+1) - (added) lld/test/COFF/arm64x-sameaddress.test (+56) ``diff diff --git a/lld/COFF/Driver.cpp b/lld/COFF/Driver.cpp index f50ca529df4d7..a669b7e9296f6 100644 --- a/lld/COFF/Driver.cpp +++ b/lld/COFF/Driver.cpp @@ -492,6 +492,12 @@ void LinkerDriver::parseDirectives(InputFile *file) { case OPT_alternatename: parseAlternateName(arg->getValue()); break; +case OPT_arm64xsameaddress: + if (!file->symtab.isEC()) +Warn(ctx) << arg->getSpelling() + << " is not allowed in non-ARM64EC files (" << toString(file) + << ")"; + break; case OPT_defaultlib: if (std::optional path = findLibIfNew(arg->getValue())) enqueuePath(*path, false, false); diff --git a/lld/COFF/Options.td b/lld/COFF/Options.td index b6fd3d0daaef9..ea2e7ded38043 100644 --- a/lld/COFF/Options.td +++ b/lld/COFF/Options.td @@ -355,3 +355,4 @@ def tlbid : P_priv<"tlbid">; def tlbout : P_priv<"tlbout">; def verbose_all : P_priv<"verbose">; def guardsym : P_priv<"guardsym">; +def arm64xsameaddress : P_priv<"arm64xsameaddress">; diff --git a/lld/test/COFF/arm64x-sameaddress.test b/lld/test/COFF/arm64x-sameaddress.test new file mode 100644 index 0..c69be9d268c3b --- /dev/null +++ b/lld/test/COFF/arm64x-sameaddress.test @@ -0,0 +1,56 @@ +REQUIRES: aarch64 +RUN: split-file %s %t.dir && cd %t.dir + +RUN: llvm-mc -filetype=obj -triple=arm64ec-windows func-arm64ec.s -o func-arm64ec.obj +RUN: llvm-mc -filetype=obj -triple=aarch64-windows func-arm64.s -o func-arm64.obj +RUN: llvm-mc -filetype=obj -triple=arm64ec-windows drectve.s -o drectve.obj +RUN: llvm-mc -filetype=obj -triple=aarch64-windows drectve.s -o drectve-arm64.obj +RUN: llvm-mc -filetype=obj -triple=arm64ec-windows %S/Inputs/loadconfig-arm64ec.s -o loadconfig-arm64ec.obj +RUN: llvm-mc -filetype=obj -triple=aarch64-windows %S/Inputs/loadconfig-arm64.s -o loadconfig-arm64.obj + +RUN: lld-link -machine:arm64x -dll -noentry -out:out.dll loadconfig-arm64.obj loadconfig-arm64ec.obj \ +RUN: func-arm64.obj func-arm64ec.obj drectve.obj + +RUN: lld-link -machine:arm64x -dll -noentry -out:out-cmd.dll loadconfig-arm64.obj loadconfig-arm64ec.obj \ +RUN: func-arm64.obj func-arm64ec.obj -arm64xsameaddress:func + +RUN: lld-link -machine:arm64ec -dll -noentry -out:out-ec.dll loadconfig-arm64ec.obj func-arm64ec.obj drectve.obj + +RUN: lld-link -machine:arm64x -dll -noentry -out:out-warn.dll loadconfig-arm64.obj loadconfig-arm64ec.obj \ +RUN: func-arm64.obj func-arm64ec.obj drectve-arm64.obj 2>&1 | FileCheck --check-prefix=WARN %s +WARN: lld-link: warning: -arm64xsameaddress: is not allowed in non-ARM64EC files (drectve-arm64.obj) + +#--- func-arm64.s +.section .text,"xr",discard,func +.globl func +func: +mov x0, #1 +ret + +#--- func-arm64ec.s +.section .text,"xr",discard,"#func" +.globl "#func" +"#func": +mov x0, #2 +ret + +.weak_anti_dep func +.set func,"#func" + +.section .wowthk,"xr",discard,entry_thunk +.globl entry_thunk +entry_thunk: +mov x0, #3 +ret + +.section .test,"dr" +.rva func + + .section .hybmp$x,"yi" + .symidx "#func" + .symidx entry_thunk + .word 1 + +#--- drectve.s +.section .drectve, "yn" +.ascii " -arm64xsameaddress:func" `` https://github.com/llvm/llvm-project/pull/140051 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lld] release/20.x: [LLD][COFF] Allow -arm64xsameaddress in ARM64EC directives (#139631) (PR #140051)
https://github.com/mstorsjo approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/140051 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [release/20.x] Update release notes for SystemZ changes (PR #140060)
https://github.com/uweigand created https://github.com/llvm/llvm-project/pull/140060 None >From c97e80756a221267af0faebafaa956674f49d732 Mon Sep 17 00:00:00 2001 From: Ulrich Weigand Date: Thu, 15 May 2025 16:00:30 +0200 Subject: [PATCH] Update release notes for SystemZ changes --- llvm/docs/ReleaseNotes.md | 9 + 1 file changed, 9 insertions(+) diff --git a/llvm/docs/ReleaseNotes.md b/llvm/docs/ReleaseNotes.md index f34003eaf0fe2..ef4ec9b56f364 100644 --- a/llvm/docs/ReleaseNotes.md +++ b/llvm/docs/ReleaseNotes.md @@ -349,6 +349,15 @@ Changes to the RISC-V Backend extension. * Added ``Sdext`` and ``Sdtrig`` extensions. +Changes to the SystemZ Backend +-- + +* Added support for the IBM z17 processor and the arch15 cpu architecture. +* Added support for `__builtin_setjump` and `__builtin_longjmp`. +* Improve inlining heuristics to fix compile time explosion in certain cases. +* Improve various cost functions. +* Improve compatibility of the assembler parser with the GNU assembler. + Changes to the WebAssembly Backend -- ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [AArch64] Correct position of CFI Instruction for Pointer Authentication (PR #137800)
DanielKristofKiss wrote: ping for review. Counterpart landed in main already. https://github.com/llvm/llvm-project/pull/137800 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [AArch64] Correct position of CFI Instruction for Pointer Authentication (PR #137800)
https://github.com/Stylie777 approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/137800 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [llvm][EmbedBitcodePass] Prevent modifying the module with ThinLTO (PR #139999)
ilovepi wrote: I thought we switched away from cloning to avoid redundancy. I'll take a look through previous patches though. https://github.com/llvm/llvm-project/pull/13 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [llvm][EmbedBitcodePass] Prevent modifying the module with ThinLTO (PR #139999)
ilovepi wrote: nuts, I forgot about https://github.com/llvm/llvm-project/pull/72180, I guess I'll need to think about this some more. https://github.com/llvm/llvm-project/pull/13 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [llvm][EmbedBitcodePass] Prevent modifying the module with ThinLTO (PR #139999)
ilovepi wrote: oh https://github.com/llvm/llvm-project/pull/139223 may avoid the issue w/ BlockAddress https://github.com/llvm/llvm-project/pull/13 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [llvm] [HLSL][RootSignature] Add parsing of flags to RootParam (PR #140152)
llvmbot wrote: @llvm/pr-subscribers-clang Author: Finn Plummer (inbelic) Changes - defines RootDescriptorFlags in-memory representation - defines parseRootDescriptorFlags to be DXC compatible. This is why we support multiple `|` flags even validation will assert that only one flag is set... - add unit tests to demonstrate functionality Final part of and resolves https://github.com/llvm/llvm-project/issues/126577 --- Full diff: https://github.com/llvm/llvm-project/pull/140152.diff 4 Files Affected: - (modified) clang/include/clang/Parse/ParseHLSLRootSignature.h (+3) - (modified) clang/lib/Parse/ParseHLSLRootSignature.cpp (+60) - (modified) clang/unittests/Parse/ParseHLSLRootSignatureTest.cpp (+17-3) - (modified) llvm/include/llvm/Frontend/HLSL/HLSLRootSignature.h (+25) ``diff diff --git a/clang/include/clang/Parse/ParseHLSLRootSignature.h b/clang/include/clang/Parse/ParseHLSLRootSignature.h index 436d217cec5b1..7b9168290d62a 100644 --- a/clang/include/clang/Parse/ParseHLSLRootSignature.h +++ b/clang/include/clang/Parse/ParseHLSLRootSignature.h @@ -93,6 +93,7 @@ class RootSignatureParser { std::optional Reg; std::optional Space; std::optional Visibility; +std::optional Flags; }; std::optional parseRootParamParams(RootSignatureToken::Kind RegType); @@ -113,6 +114,8 @@ class RootSignatureParser { /// Parsing methods of various enums std::optional parseShaderVisibility(); + std::optional + parseRootDescriptorFlags(); std::optional parseDescriptorRangeFlags(); diff --git a/clang/lib/Parse/ParseHLSLRootSignature.cpp b/clang/lib/Parse/ParseHLSLRootSignature.cpp index edb61f29f10d7..faf261cc9b7fe 100644 --- a/clang/lib/Parse/ParseHLSLRootSignature.cpp +++ b/clang/lib/Parse/ParseHLSLRootSignature.cpp @@ -193,6 +193,7 @@ std::optional RootSignatureParser::parseRootParam() { ExpectedReg = TokenKind::uReg; break; } + Param.setDefaultFlags(); auto Params = parseRootParamParams(ExpectedReg); if (!Params.has_value()) @@ -214,6 +215,9 @@ std::optional RootSignatureParser::parseRootParam() { if (Params->Visibility.has_value()) Param.Visibility = Params->Visibility.value(); + if (Params->Flags.has_value()) +Param.Flags = Params->Flags.value(); + if (consumeExpectedToken(TokenKind::pu_r_paren, diag::err_hlsl_unexpected_end_of_params, /*param of=*/TokenKind::kw_RootConstants)) @@ -475,6 +479,23 @@ RootSignatureParser::parseRootParamParams(TokenKind RegType) { return std::nullopt; Params.Visibility = Visibility; } + +// `flags` `=` ROOT_DESCRIPTOR_FLAGS +if (tryConsumeExpectedToken(TokenKind::kw_flags)) { + if (Params.Flags.has_value()) { +getDiags().Report(CurToken.TokLoc, diag::err_hlsl_rootsig_repeat_param) +<< CurToken.TokKind; +return std::nullopt; + } + + if (consumeExpectedToken(TokenKind::pu_equal)) +return std::nullopt; + + auto Flags = parseRootDescriptorFlags(); + if (!Flags.has_value()) +return std::nullopt; + Params.Flags = Flags; +} } while (tryConsumeExpectedToken(TokenKind::pu_comma)); return Params; @@ -654,6 +675,45 @@ RootSignatureParser::parseShaderVisibility() { return std::nullopt; } +std::optional +RootSignatureParser::parseRootDescriptorFlags() { + assert(CurToken.TokKind == TokenKind::pu_equal && + "Expects to only be invoked starting at given keyword"); + + // Handle the edge-case of '0' to specify no flags set + if (tryConsumeExpectedToken(TokenKind::int_literal)) { +if (!verifyZeroFlag()) { + getDiags().Report(CurToken.TokLoc, diag::err_hlsl_rootsig_non_zero_flag); + return std::nullopt; +} +return RootDescriptorFlags::None; + } + + TokenKind Expected[] = { +#define ROOT_DESCRIPTOR_FLAG_ENUM(NAME, LIT) TokenKind::en_##NAME, +#include "clang/Lex/HLSLRootSignatureTokenKinds.def" + }; + + std::optional Flags; + + do { +if (tryConsumeExpectedToken(Expected)) { + switch (CurToken.TokKind) { +#define ROOT_DESCRIPTOR_FLAG_ENUM(NAME, LIT) \ + case TokenKind::en_##NAME: \ +Flags = \ +maybeOrFlag(Flags, RootDescriptorFlags::NAME); \ +break; +#include "clang/Lex/HLSLRootSignatureTokenKinds.def" + default: +llvm_unreachable("Switch for consumed enum token was not provided"); + } +} + } while (tryConsumeExpectedToken(TokenKind::pu_or)); + + return Flags; +} + std::optional RootSignatureParser::parseDescriptorRangeFlags() { assert(CurToken.TokKind == TokenKind::pu_equal && diff --git a/clang/unittests/Parse/ParseHLSLRootSignatureTest.cpp b/clang/unittests/Parse/ParseHLSLRootSignatureTest.cpp index 02bf38dcb110f..7ed286589f8fa 100644 --- a/clang/unittests/Parse/ParseHLSLRootSi
[llvm-branch-commits] [llvm] [AMDGPU] Automate creation of byte_sel dags. NFCI. (PR #140155)
https://github.com/rampitec created https://github.com/llvm/llvm-project/pull/140155 None >From 071898b2e2b1f23e67ad5471df2088a0db167555 Mon Sep 17 00:00:00 2001 From: Stanislav Mekhanoshin Date: Thu, 15 May 2025 15:41:55 -0700 Subject: [PATCH] [AMDGPU] Automate creation of byte_sel dags. NFCI. --- llvm/lib/Target/AMDGPU/SIInstrInfo.td | 21 +++-- llvm/lib/Target/AMDGPU/VOP1Instructions.td | 11 --- llvm/lib/Target/AMDGPU/VOP3Instructions.td | 11 +-- 3 files changed, 16 insertions(+), 27 deletions(-) diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.td b/llvm/lib/Target/AMDGPU/SIInstrInfo.td index 47ee0a7f60ee3..a5814dd7cf9f4 100644 --- a/llvm/lib/Target/AMDGPU/SIInstrInfo.td +++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.td @@ -1293,6 +1293,7 @@ def WaitVMVSrc : NamedIntOperand<"wait_vm_vsrc"> { def ByteSel : NamedIntOperand<"byte_sel"> { let Validator = "isUInt<2>"; } +def ByteSel0 : DefaultOperand; let PrintMethod = "printBitOp3" in def BitOp3 : NamedIntOperand<"bitop3">; @@ -1971,7 +1972,8 @@ class getIns32 class getIns64 { +Operand Src0Mod, Operand Src1Mod, Operand Src2Mod, +bit HasFP8ByteSel = 0, bit HasFP8DstByteSel = 0> { dag src0 = !if(!ge(NumSrcArgs, 1), !if (HasModifiers, (ins Src0Mod:$src0_modifiers, Src0RC:$src0), @@ -1989,18 +1991,23 @@ class getIns64 { +Operand Src0Mod, Operand Src1Mod, Operand Src2Mod, bit HasOpSel, +bit HasFP8ByteSel = 0, bit HasFP8DstByteSel = 0> { // getInst64 handles clamp and omod. implicit mutex between vop3p and omod dag base = getIns64 .ret; +Src0Mod, Src1Mod, Src2Mod, HasFP8ByteSel, HasFP8DstByteSel>.ret; dag opsel = (ins op_sel0:$op_sel); dag ret = !con(base, !if(HasOpSel, opsel, (ins))); } @@ -2612,7 +2619,8 @@ class VOPProfile _ArgVT, bit _EnableClamp = 0> { field dag Ins32 = getIns32.ret; field dag Ins64 = getIns64.ret; + HasOMod, Src0Mod, Src1Mod, Src2Mod, + HasFP8ByteSel, HasFP8DstByteSel>.ret; field dag InsVOP3P = getInsVOP3P.ret; @@ -2630,7 +2638,8 @@ class VOPProfile _ArgVT, bit _EnableClamp = 0> { Src0ModDPP, Src1ModDPP, Src2ModDPP>.ret; defvar InsVOP3DPPBase = getInsVOP3Base.ret; + Src0ModVOP3DPP, Src1ModVOP3DPP, Src2ModVOP3DPP, HasOpSel, + HasFP8ByteSel, HasFP8DstByteSel>.ret; defvar InsVOP3PDPPBase = getInsVOP3P.ret; diff --git a/llvm/lib/Target/AMDGPU/VOP1Instructions.td b/llvm/lib/Target/AMDGPU/VOP1Instructions.td index f885de3c13b12..7fdd951ecbd3c 100644 --- a/llvm/lib/Target/AMDGPU/VOP1Instructions.td +++ b/llvm/lib/Target/AMDGPU/VOP1Instructions.td @@ -674,17 +674,6 @@ class VOPProfile_Base_CVT_F_F8_ByteSel : VOPProfile<[DstVT, i32 let HasClamp = 0; let HasOMod = 0; let HasModifiers = 0; - - defvar bytesel = (ins ByteSel:$byte_sel); - let Ins64 = !con(getIns64.ret, - bytesel); - let InsVOP3Base = !con(getInsVOP3Base.ret, - bytesel); } let SubtargetPredicate = isGFX12Plus, OtherPredicates = [HasFP8ConversionInsts], diff --git a/llvm/lib/Target/AMDGPU/VOP3Instructions.td b/llvm/lib/Target/AMDGPU/VOP3Instructions.td index a7b90b9e319da..0252c4f1b0929 100644 --- a/llvm/lib/Target/AMDGPU/VOP3Instructions.td +++ b/llvm/lib/Target/AMDGPU/VOP3Instructions.td @@ -593,6 +593,7 @@ def VOP3_CVT_SR_F8_F32_Profile : VOP3_Profile, let HasExtVOP3DPP = 1; let HasOpSel = 1; let HasFP8DstByteSel = 1; + let HasFP8ByteSel = 0; // It works as a dst-bytesel, but does not have byte_sel operand. let AsmVOP3OpSel = !subst(", $src2_modifiers", "", getAsmVOP3OpSel<3, HasClamp, HasOMod, HasSrc0FloatMods, HasSrc1FloatMods, @@ -607,16 +608,6 @@ class VOP3_CVT_SR_F8_ByteSel_Profile : VOP3_Profile> { let HasFP8DstByteSel = 1; let HasClamp = 0; - defvar bytesel = (ins VGPR_32:$vdst_in, ByteSel:$byte_sel); - let Ins64 = !con(getIns64.ret, - bytesel); - let InsVOP3Base = !con( -getInsVOP3Base.ret, -bytesel); } def IsPow2Plus1: PatLeaf<(i32 imm), [{ ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [BOLT] Support pre-aggregated basic sample profile (PR #140196)
llvmbot wrote: @llvm/pr-subscribers-bolt Author: Amir Ayupov (aaupov) Changes Define a pre-aggregated basic sample format: ``` S``` Test Plan: update pre-aggregated-perf.test --- Full diff: https://github.com/llvm/llvm-project/pull/140196.diff 5 Files Affected: - (modified) bolt/include/bolt/Profile/DataAggregator.h (+20-14) - (modified) bolt/lib/Profile/DataAggregator.cpp (+49-39) - (added) bolt/test/X86/Inputs/pre-aggregated-basic.txt (+18) - (modified) bolt/test/X86/pre-aggregated-perf.test (+8) - (modified) bolt/test/link_fdata.py (+3-3) ``diff diff --git a/bolt/include/bolt/Profile/DataAggregator.h b/bolt/include/bolt/Profile/DataAggregator.h index 6d918134137d5..7d60b4689fb04 100644 --- a/bolt/include/bolt/Profile/DataAggregator.h +++ b/bolt/include/bolt/Profile/DataAggregator.h @@ -370,26 +370,25 @@ class DataAggregator : public DataReader { /// memory. /// /// File format syntax: - /// {B|F|f|T} [:] [:] [] - ///[] + /// {S|B|F|f|T} [] [] [] /// - /// B - indicates an aggregated branch - /// F - an aggregated fall-through + /// where , , have the format [:] + /// + /// S - indicates an aggregated basic sample at + /// B - indicates an aggregated branch from to + /// F - an aggregated fall-through from to /// f - an aggregated fall-through with external origin - used to disambiguate /// between a return hitting a basic block head and a regular internal /// jump to the block - /// T - an aggregated trace: branch with a fall-through (from, to, ft_end) - /// - /// - build id of the object containing the start address. We can - /// skip it for the main binary and use "X" for an unknown object. This will - /// save some space and facilitate human parsing. - /// - /// - hex offset from the object base load address (0 for the - /// main executable unless it's PIE) to the start address. + /// T - an aggregated trace: branch from to with a fall-through + /// to /// - /// , - same for the end address. + /// - build id of the object containing the address. We can skip it for + /// the main binary and use "X" for an unknown object. This will save some + /// space and facilitate human parsing. /// - /// - same for the fallthrough_end address. + /// - hex offset from the object base load address (0 for the + /// main executable unless it's PIE) to the address. /// /// - total aggregated count of the branch or a fall-through. /// @@ -397,10 +396,17 @@ class DataAggregator : public DataReader { /// Omitted for fall-throughs. /// /// Example: + /// Basic samples profile: + /// S 41be50 3 + /// + /// Soft-deprecated branch profile with separate branches and fall-throughs: /// F 41be50 41be50 3 /// F 41be90 41be90 4 /// B 4b1942 39b57f0 3 0 /// B 4b196f 4b19e0 2 0 + /// + /// Recommended branch profile with pre-aggregated traces: + /// T 4b196f 4b19e0 4b19ef 2 void parsePreAggregated(); /// Parse the full output of pre-aggregated LBR samples generated by diff --git a/bolt/lib/Profile/DataAggregator.cpp b/bolt/lib/Profile/DataAggregator.cpp index aa681e633c0d8..6e889908003da 100644 --- a/bolt/lib/Profile/DataAggregator.cpp +++ b/bolt/lib/Profile/DataAggregator.cpp @@ -1216,54 +1216,54 @@ std::error_code DataAggregator::parseAggregatedLBREntry() { ErrorOr TypeOrErr = parseString(FieldSeparator); if (std::error_code EC = TypeOrErr.getError()) return EC; - enum AggregatedLBREntry { TRACE, BRANCH, FT, FT_EXTERNAL_ORIGIN, INVALID }; + enum AggregatedLBREntry { +TRACE, +SAMPLE, +BRANCH, +FT, +FT_EXTERNAL_ORIGIN, +INVALID + }; auto Type = StringSwitch(TypeOrErr.get()) .Case("T", TRACE) + .Case("S", SAMPLE) .Case("B", BRANCH) .Case("F", FT) .Case("f", FT_EXTERNAL_ORIGIN) .Default(INVALID); if (Type == INVALID) { -reportError("expected T, B, F or f"); +reportError("expected T, S, B, F or f"); return make_error_code(llvm::errc::io_error); } - while (checkAndConsumeFS()) { - } - ErrorOr From = parseLocationOrOffset(); - if (std::error_code EC = From.getError()) -return EC; + std::optional Addrs[3]; + int AddrNum = 2; + if (Type == TRACE) +AddrNum = 3; + else if (Type == SAMPLE) +AddrNum = 1; - while (checkAndConsumeFS()) { - } - ErrorOr To = parseLocationOrOffset(); - if (std::error_code EC = To.getError()) -return EC; + int64_t Counters[2]; + int CounterNum = 1; + if (Type == BRANCH) +CounterNum = 2; - ErrorOr TraceFtEnd = std::error_code(); - if (Type == AggregatedLBREntry::TRACE) { + for (int I = 0; I < AddrNum; ++I) { while (checkAndConsumeFS()) { } -TraceFtEnd = parseLocationOrOffset(); -if (std::error_code EC = TraceFtEnd.getError()) - return EC; - } - - while (checkAndConsumeFS()) { +if (Er
[llvm-branch-commits] [BOLT] Support pre-aggregated basic sample profile (PR #140196)
https://github.com/aaupov created https://github.com/llvm/llvm-project/pull/140196 Define a pre-aggregated basic sample format: ``` S ``` Test Plan: update pre-aggregated-perf.test Rate limit · GitHub body { background-color: #f6f8fa; color: #24292e; font-family: -apple-system,BlinkMacSystemFont,Segoe UI,Helvetica,Arial,sans-serif,Apple Color Emoji,Segoe UI Emoji,Segoe UI Symbol; font-size: 14px; line-height: 1.5; margin: 0; } .container { margin: 50px auto; max-width: 600px; text-align: center; padding: 0 24px; } a { color: #0366d6; text-decoration: none; } a:hover { text-decoration: underline; } h1 { line-height: 60px; font-size: 48px; font-weight: 300; margin: 0px; text-shadow: 0 1px 0 #fff; } p { color: rgba(0, 0, 0, 0.5); margin: 20px 0 40px; } ul { list-style: none; margin: 25px 0; padding: 0; } li { display: table-cell; font-weight: bold; width: 1%; } .logo { display: inline-block; margin-top: 35px; } .logo-img-2x { display: none; } @media only screen and (-webkit-min-device-pixel-ratio: 2), only screen and ( min--moz-device-pixel-ratio: 2), only screen and ( -o-min-device-pixel-ratio: 2/1), only screen and (min-device-pixel-ratio: 2), only screen and (min-resolution: 192dpi), only screen and (min-resolution: 2dppx) { .logo-img-1x { display: none; } .logo-img-2x { display: inline-block; } } #suggestions { margin-top: 35px; color: #ccc; } #suggestions a { color: #66; font-weight: 200; font-size: 14px; margin: 0 10px; } Whoa there! You have exceeded a secondary rate limit. Please wait a few minutes before you try again; in some cases this may take up to an hour. https://support.github.com/contact";>Contact Support — https://githubstatus.com";>GitHub Status — https://twitter.com/githubstatus";>@githubstatus ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [BOLT] Support pre-aggregated basic sample profile (PR #140196)
github-actions[bot] wrote: :warning: C/C++ code formatter, clang-format found issues in your code. :warning: You can test this locally with the following command: ``bash git-clang-format --diff HEAD~1 HEAD --extensions cpp,h -- bolt/include/bolt/Profile/DataAggregator.h bolt/lib/Profile/DataAggregator.cpp `` View the diff from clang-format here. ``diff diff --git a/bolt/lib/Profile/DataAggregator.cpp b/bolt/lib/Profile/DataAggregator.cpp index 6e8899080..02ae9e0b8 100644 --- a/bolt/lib/Profile/DataAggregator.cpp +++ b/bolt/lib/Profile/DataAggregator.cpp @@ -1260,7 +1260,8 @@ std::error_code DataAggregator::parseAggregatedLBREntry() { for (int I = 0; I < CounterNum; ++I) { while (checkAndConsumeFS()) { } -if (ErrorOr Count = parseNumberField(FieldSeparator, I + 1 == CounterNum)) +if (ErrorOr Count = +parseNumberField(FieldSeparator, I + 1 == CounterNum)) Counters[I] = Count.get(); else return Count.getError(); `` https://github.com/llvm/llvm-project/pull/140196 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [flang] cdc4b7c - Revert "[Flang] Turn on alias analysis for locally allocated objects (#139682)"
Author: Dominik Adamski Date: 2025-05-16T08:51:36+02:00 New Revision: cdc4b7c6467188d3a69a55cadd2fd318bf6d4f66 URL: https://github.com/llvm/llvm-project/commit/cdc4b7c6467188d3a69a55cadd2fd318bf6d4f66 DIFF: https://github.com/llvm/llvm-project/commit/cdc4b7c6467188d3a69a55cadd2fd318bf6d4f66.diff LOG: Revert "[Flang] Turn on alias analysis for locally allocated objects (#139682)" This reverts commit cf16c97bfa1416672d8990862369e86f360aa11e. Added: Modified: flang/lib/Optimizer/Transforms/AddAliasTags.cpp flang/test/Fir/tbaa-codegen2.fir flang/test/Transforms/tbaa-with-dummy-scope2.fir flang/test/Transforms/tbaa2.fir flang/test/Transforms/tbaa3.fir Removed: diff --git a/flang/lib/Optimizer/Transforms/AddAliasTags.cpp b/flang/lib/Optimizer/Transforms/AddAliasTags.cpp index 5cfbdc33285f9..66b4b84998801 100644 --- a/flang/lib/Optimizer/Transforms/AddAliasTags.cpp +++ b/flang/lib/Optimizer/Transforms/AddAliasTags.cpp @@ -43,10 +43,13 @@ static llvm::cl::opt static llvm::cl::opt enableDirect("direct-tbaa", llvm::cl::init(true), llvm::cl::Hidden, llvm::cl::desc("Add TBAA tags to direct variables")); -static llvm::cl::opt -enableLocalAllocs("local-alloc-tbaa", llvm::cl::init(true), - llvm::cl::Hidden, - llvm::cl::desc("Add TBAA tags to local allocations.")); +// This is **known unsafe** (misscompare in spec2017/wrf_r). It should +// not be enabled by default. +// The code is kept so that these may be tried with new benchmarks to see if +// this is worth fixing in the future. +static llvm::cl::opt enableLocalAllocs( +"local-alloc-tbaa", llvm::cl::init(false), llvm::cl::Hidden, +llvm::cl::desc("Add TBAA tags to local allocations. UNSAFE.")); namespace { diff --git a/flang/test/Fir/tbaa-codegen2.fir b/flang/test/Fir/tbaa-codegen2.fir index e4bfa9087ec75..8f8b6a29129e7 100644 --- a/flang/test/Fir/tbaa-codegen2.fir +++ b/flang/test/Fir/tbaa-codegen2.fir @@ -100,7 +100,7 @@ module attributes {fir.defaultkind = "a1c4d8i4l4r4", fir.kindmap = "", llvm.targ // [...] // CHECK: %[[VAL50:.*]] = getelementptr i32, ptr %{{.*}}, i64 %{{.*}} // store to the temporary: -// CHECK: store i32 %{{.*}}, ptr %[[VAL50]], align 4, !tbaa ![[TMP_DATA_ACCESS_TAG:.*]] +// CHECK: store i32 %{{.*}}, ptr %[[VAL50]], align 4, !tbaa ![[DATA_ACCESS_TAG:.*]] // [...] // CHECK: [[BOX_ACCESS_TAG]] = !{![[BOX_ACCESS_TYPE:.*]], ![[BOX_ACCESS_TYPE]], i64 0} @@ -111,7 +111,4 @@ module attributes {fir.defaultkind = "a1c4d8i4l4r4", fir.kindmap = "", llvm.targ // CHECK: ![[A_ACCESS_TYPE]] = !{!"dummy arg data/_QFfuncEa", ![[ARG_ACCESS_TYPE:.*]], i64 0} // CHECK: ![[ARG_ACCESS_TYPE]] = !{!"dummy arg data", ![[DATA_ACCESS_TYPE:.*]], i64 0} // CHECK: ![[DATA_ACCESS_TYPE]] = !{!"any data access", ![[ANY_ACCESS_TYPE]], i64 0} -// CHECK: ![[TMP_DATA_ACCESS_TAG]] = !{![[TMP_DATA_ACCESS_TYPE:.*]], ![[TMP_DATA_ACCESS_TYPE]], i64 0} -// CHECK: ![[TMP_DATA_ACCESS_TYPE]] = !{!"allocated data/", ![[TMP_ACCESS_TYPE:.*]], i64 0} -// CHECK: ![[TMP_ACCESS_TYPE]] = !{!"allocated data", ![[TARGET_ACCESS_TAG:.*]], i64 0} -// CHECK: ![[TARGET_ACCESS_TAG]] = !{!"target data", ![[DATA_ACCESS_TYPE]], i64 0} +// CHECK: ![[DATA_ACCESS_TAG]] = !{![[DATA_ACCESS_TYPE]], ![[DATA_ACCESS_TYPE]], i64 0} diff --git a/flang/test/Transforms/tbaa-with-dummy-scope2.fir b/flang/test/Transforms/tbaa-with-dummy-scope2.fir index 249471de458d3..c8f419fbee652 100644 --- a/flang/test/Transforms/tbaa-with-dummy-scope2.fir +++ b/flang/test/Transforms/tbaa-with-dummy-scope2.fir @@ -43,15 +43,12 @@ func.func @_QPtest1() attributes {noinline} { // CHECK: #[[$ATTR_0:.+]] = #llvm.tbaa_root // CHECK: #[[$ATTR_1:.+]] = #llvm.tbaa_type_desc}> // CHECK: #[[$ATTR_2:.+]] = #llvm.tbaa_type_desc}> -// CHECK: #[[$TARGETDATA:.+]] = #llvm.tbaa_type_desc}> // CHECK: #[[$ATTR_3:.+]] = #llvm.tbaa_type_desc}> -// CHECK: #[[$LOCAL_ATTR_0:.+]] = #llvm.tbaa_type_desc}> +// CHECK: #[[TARGETDATA:.+]] = #llvm.tbaa_type_desc}> // CHECK: #[[$ATTR_5:.+]] = #llvm.tbaa_type_desc}> -// CHECK: #[[$ATTR_4:.+]] = #llvm.tbaa_type_desc}> +// CHECK: #[[$ATTR_4:.+]] = #llvm.tbaa_type_desc}> // CHECK: #[[$ATTR_7:.+]] = #llvm.tbaa_tag -// CHECK: #[[$LOCAL_ATTR_1:.+]] = #llvm.tbaa_type_desc}> // CHECK: #[[$ATTR_6:.+]] = #llvm.tbaa_type_desc}> -// CHECK: #[[$LOCAL_ATTR_2:.+]] = #llvm.tbaa_tag // CHECK: #[[$ATTR_8:.+]] = #llvm.tbaa_tag // CHECK-LABEL: func.func @_QPtest1() attributes {noinline} { // CHECK: %[[VAL_2:.*]] = fir.alloca i32 {bindc_name = "y", uniq_name = "_QFtest1FinnerEy"} @@ -60,8 +57,8 @@ func.func @_QPtest1() attributes {noinline} { // CHECK: %[[VAL_5:.*]] = fir.dummy_scope : !fir.dscope // CHECK: %[[VAL_6:.*]] = fir.declare %[[VAL_4]] dummy_scope %[[VAL_5]] {uniq_name = "_QFtest1FinnerEx"} : (!fir.ref, !fir.dscope) -> !fir.ref // CHECK:
[llvm-branch-commits] [llvm] [DirectX] adding support to read/write descriptor table data using obj2yaml/yaml2obj (PR #138315)
https://github.com/joaosaffran converted_to_draft https://github.com/llvm/llvm-project/pull/138315 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] Fix the unit test errors. (PR #140184)
https://github.com/qinkunbao created https://github.com/llvm/llvm-project/pull/140184 None ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] Fix the unit test errors. (PR #140184)
llvmbot wrote: @llvm/pr-subscribers-llvm-support Author: Qinkun Bao (qinkunbao) Changes --- Full diff: https://github.com/llvm/llvm-project/pull/140184.diff 2 Files Affected: - (modified) llvm/include/llvm/Support/SpecialCaseList.h (+2-3) - (modified) llvm/lib/Support/SpecialCaseList.cpp (+2-1) ``diff diff --git a/llvm/include/llvm/Support/SpecialCaseList.h b/llvm/include/llvm/Support/SpecialCaseList.h index 4f4c097c7162a..fc6dc93651f38 100644 --- a/llvm/include/llvm/Support/SpecialCaseList.h +++ b/llvm/include/llvm/Support/SpecialCaseList.h @@ -132,9 +132,8 @@ class SpecialCaseList { using SectionEntries = StringMap>; struct Section { -Section(std::unique_ptr M, StringRef str) -: SectionMatcher(std::move(M)), SectionStr(SectionStr) {}; -Section(StringRef str) : Section(std::make_unique(), str) {}; +Section(std::unique_ptr M) : SectionMatcher(std::move(M)) {}; +Section() : Section(std::make_unique()) {}; std::unique_ptr SectionMatcher; SectionEntries Entries; diff --git a/llvm/lib/Support/SpecialCaseList.cpp b/llvm/lib/Support/SpecialCaseList.cpp index 76c705c097aaa..9f044ced3a17c 100644 --- a/llvm/lib/Support/SpecialCaseList.cpp +++ b/llvm/lib/Support/SpecialCaseList.cpp @@ -132,8 +132,9 @@ bool SpecialCaseList::createInternal(const MemoryBuffer *MB, Expected SpecialCaseList::addSection(StringRef SectionStr, unsigned LineNo, bool UseGlobs) { - Sections.emplace_back(SectionStr); + Sections.emplace_back(); auto &Section = Sections.back(); + Section.SectionStr = SectionStr; if (auto Err = Section.SectionMatcher->insert(SectionStr, LineNo, UseGlobs)) { return createStringError(errc::invalid_argument, `` https://github.com/llvm/llvm-project/pull/140184 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] Fix the unit test errors. (PR #140184)
https://github.com/qinkunbao closed https://github.com/llvm/llvm-project/pull/140184 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [SPARC][IAS] Add definitions for OSA 2011 instructions (PR #138403)
brad0 wrote: cc @s-barannikov https://github.com/llvm/llvm-project/pull/138403 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [flang] [flang][OpenMP] use attribute for delayed privatization barrier (PR #140092)
llvmbot wrote: @llvm/pr-subscribers-flang-fir-hlfir @llvm/pr-subscribers-flang-openmp Author: Tom Eccles (tblah) Changes Fixes #136357 The barrier needs to go between the copying into firstprivate variables and the initialization call for the OpenMP construct (e.g. wsloop). There is no way of expressing this in MLIR because for delayed privatization that is all implicit (added in MLIR->LLVMIR conversion). The previous approach put the barrier immediately before the wsloop (or similar). For delayed privatization, the firstprivate copy code would then be inserted after that, opening the possibility for the race observed in the bug report. This patch solves the issue by instead setting an attribute on the mlir operation, which will instruct openmp dialect to llvm ir conversion to insert a barrier in the correct place. --- Full diff: https://github.com/llvm/llvm-project/pull/140092.diff 5 Files Affected: - (modified) flang/lib/Lower/OpenMP/DataSharingProcessor.cpp (+10-3) - (modified) flang/lib/Lower/OpenMP/DataSharingProcessor.h (+1-1) - (modified) flang/test/Lower/OpenMP/lastprivate-allocatable.f90 (+1-1) - (modified) flang/test/Lower/OpenMP/parallel-lastprivate-clause-scalar.f90 (+1-2) - (modified) flang/test/Lower/OpenMP/same_var_first_lastprivate.f90 (+1-2) ``diff diff --git a/flang/lib/Lower/OpenMP/DataSharingProcessor.cpp b/flang/lib/Lower/OpenMP/DataSharingProcessor.cpp index 7eec598645eac..0949fe84f209f 100644 --- a/flang/lib/Lower/OpenMP/DataSharingProcessor.cpp +++ b/flang/lib/Lower/OpenMP/DataSharingProcessor.cpp @@ -62,7 +62,7 @@ void DataSharingProcessor::processStep1( privatize(clauseOps); - insertBarrier(); + insertBarrier(clauseOps); } void DataSharingProcessor::processStep2(mlir::Operation *op, bool isLoop) { @@ -230,8 +230,15 @@ bool DataSharingProcessor::needBarrier() { return false; } -void DataSharingProcessor::insertBarrier() { - if (needBarrier()) +void DataSharingProcessor::insertBarrier( +mlir::omp::PrivateClauseOps *clauseOps) { + if (!needBarrier()) +return; + + if (useDelayedPrivatization) +clauseOps->privateNeedsBarrier = +mlir::UnitAttr::get(&converter.getMLIRContext()); + else firOpBuilder.create(converter.getCurrentLocation()); } diff --git a/flang/lib/Lower/OpenMP/DataSharingProcessor.h b/flang/lib/Lower/OpenMP/DataSharingProcessor.h index 54a42fd199831..7787e4ffb03c2 100644 --- a/flang/lib/Lower/OpenMP/DataSharingProcessor.h +++ b/flang/lib/Lower/OpenMP/DataSharingProcessor.h @@ -100,7 +100,7 @@ class DataSharingProcessor { const omp::ObjectList &objects, llvm::SetVector &symbolSet); void collectSymbolsForPrivatization(); - void insertBarrier(); + void insertBarrier(mlir::omp::PrivateClauseOps *clauseOps); void collectDefaultSymbols(); void collectImplicitSymbols(); void collectPreDeterminedSymbols(); diff --git a/flang/test/Lower/OpenMP/lastprivate-allocatable.f90 b/flang/test/Lower/OpenMP/lastprivate-allocatable.f90 index 1d31edd16efea..c2626e14b51c7 100644 --- a/flang/test/Lower/OpenMP/lastprivate-allocatable.f90 +++ b/flang/test/Lower/OpenMP/lastprivate-allocatable.f90 @@ -8,7 +8,7 @@ ! CHECK: fir.store %[[VAL_2]] to %[[VAL_0]] : !fir.ref>> ! CHECK: %[[VAL_3:.*]]:2 = hlfir.declare %[[VAL_0]] {fortran_attrs = {{.*}}, uniq_name = "_QFEa"} : (!fir.ref>>) -> (!fir.ref>>, !fir.ref>>) ! CHECK: omp.parallel { -! CHECK: omp.wsloop private(@{{.*}} %{{.*}} -> %{{.*}}, @{{.*}} %{{.*}} -> %[[VAL_17:.*]] : !fir.ref>>, !fir.ref) { +! CHECK: omp.wsloop private(@{{.*}} %{{.*}} -> %{{.*}}, @{{.*}} %{{.*}} -> %[[VAL_17:.*]] : !fir.ref>>, !fir.ref) private_barrier { ! CHECK: omp.loop_nest ! CHECK: %[[VAL_16:.*]]:2 = hlfir.declare %{{.*}} {fortran_attrs = {{.*}}, uniq_name = "_QFEa"} : (!fir.ref>>) -> (!fir.ref>>, !fir.ref>>) ! CHECK: %[[VAL_18:.*]]:2 = hlfir.declare %[[VAL_17]] {uniq_name = "_QFEi"} : (!fir.ref) -> (!fir.ref, !fir.ref) diff --git a/flang/test/Lower/OpenMP/parallel-lastprivate-clause-scalar.f90 b/flang/test/Lower/OpenMP/parallel-lastprivate-clause-scalar.f90 index 60de8fa6f46a2..5d37010f4095b 100644 --- a/flang/test/Lower/OpenMP/parallel-lastprivate-clause-scalar.f90 +++ b/flang/test/Lower/OpenMP/parallel-lastprivate-clause-scalar.f90 @@ -226,8 +226,7 @@ subroutine firstpriv_lastpriv_int(arg1, arg2) ! Firstprivate update -!CHECK-NEXT: omp.barrier -!CHECK: omp.wsloop private(@{{.*}} %{{.*}}#0 -> %[[CLONE1:.*]], @{{.*}} %{{.*}}#0 -> %[[IV:.*]] : !fir.ref, !fir.ref) { +!CHECK: omp.wsloop private(@{{.*}} %{{.*}}#0 -> %[[CLONE1:.*]], @{{.*}} %{{.*}}#0 -> %[[IV:.*]] : !fir.ref, !fir.ref) private_barrier { !CHECK-NEXT: omp.loop_nest (%[[INDX_WS:.*]]) : {{.*}} { !CHECK: %[[CLONE1_DECL:.*]]:2 = hlfir.declare %[[CLONE1]] {uniq_name = "_QFfirstpriv_lastpriv_int2Earg1"} : (!fir.ref) -> (!fir.ref, !fir.ref) diff --git a/flang/test/Lowe
[llvm-branch-commits] [flang] [flang][OpenMP] use attribute for delayed privatization barrier (PR #140092)
tblah wrote: PR stack: 1. https://github.com/llvm/llvm-project/pull/140089 2. https://github.com/llvm/llvm-project/pull/140090 3. https://github.com/llvm/llvm-project/pull/140092 https://github.com/llvm/llvm-project/pull/140092 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [mlir] [mlir][OpenMP] Add translation of private_barrier attr to LLVMIR (PR #140090)
tblah wrote: PR stack: 1. https://github.com/llvm/llvm-project/pull/140089 2. https://github.com/llvm/llvm-project/pull/140090 3. https://github.com/llvm/llvm-project/pull/140092 https://github.com/llvm/llvm-project/pull/140090 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [StaticDataLayout][PGO]Implement reader and writer change for data access profiles (PR #139997)
https://github.com/mingmingl-llvm edited https://github.com/llvm/llvm-project/pull/139997 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [StaticDataLayout][PGO]Implement reader and writer change for data access profiles (PR #139997)
https://github.com/mingmingl-llvm ready_for_review https://github.com/llvm/llvm-project/pull/139997 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [StaticDataLayout][PGO]Implement reader and writer change for data access profiles (PR #139997)
llvmbot wrote: @llvm/pr-subscribers-pgo Author: Mingming Liu (mingmingl-llvm) Changes https://github.com/llvm/llvm-project/pull/138170 introduces classes to operate on data access profiles. This change supports the read and write of `DataAccessProfData` in indexed format of MemProf (v4) as well as its the text (yaml) format. For indexed format: * InstrProfWriter owns (by `std::unique_ptr`) the data access profiles, and gives a non-owned copy when it calls `writeMemProf`. * MemProf v4 header has a new `uint64_t` to record the byte offset of data access profiles. This `uint64_t` field is zero if data access profile is not set (nullptr). * MemProfReader reads the offset from v4 header and de-serializes in-memory bytes into class `DataAccessProfData`. * MemProfYAML.h adds the mapping for DAP class, and make DAP optional for both read and write. --- Patch is 26.46 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/139997.diff 14 Files Affected: - (modified) llvm/include/llvm/ProfileData/DataAccessProf.h (+9-3) - (modified) llvm/include/llvm/ProfileData/IndexedMemProfData.h (+9-3) - (modified) llvm/include/llvm/ProfileData/InstrProfReader.h (+5-1) - (modified) llvm/include/llvm/ProfileData/InstrProfWriter.h (+6) - (modified) llvm/include/llvm/ProfileData/MemProfReader.h (+15) - (modified) llvm/include/llvm/ProfileData/MemProfYAML.h (+58) - (modified) llvm/lib/ProfileData/DataAccessProf.cpp (+4-2) - (modified) llvm/lib/ProfileData/IndexedMemProfData.cpp (+48-13) - (modified) llvm/lib/ProfileData/InstrProfReader.cpp (+14) - (modified) llvm/lib/ProfileData/InstrProfWriter.cpp (+16-4) - (modified) llvm/lib/ProfileData/MemProfReader.cpp (+30) - (modified) llvm/test/tools/llvm-profdata/memprof-yaml.test (+11) - (modified) llvm/tools/llvm-profdata/llvm-profdata.cpp (+4) - (modified) llvm/unittests/ProfileData/DataAccessProfTest.cpp (+6-5) ``diff diff --git a/llvm/include/llvm/ProfileData/DataAccessProf.h b/llvm/include/llvm/ProfileData/DataAccessProf.h index e8504102238d1..f5f6abf0a2817 100644 --- a/llvm/include/llvm/ProfileData/DataAccessProf.h +++ b/llvm/include/llvm/ProfileData/DataAccessProf.h @@ -41,6 +41,8 @@ namespace data_access_prof { struct SourceLocation { SourceLocation(StringRef FileNameRef, uint32_t Line) : FileName(FileNameRef.str()), Line(Line) {} + + SourceLocation() {} /// The filename where the data is located. std::string FileName; /// The line number in the source code. @@ -53,6 +55,8 @@ namespace internal { // which strings are owned by `DataAccessProfData`. Used by `DataAccessProfData` // to represent data locations internally. struct SourceLocationRef { + SourceLocationRef(StringRef FileNameRef, uint32_t Line) + : FileName(FileNameRef), Line(Line) {} // The filename where the data is located. StringRef FileName; // The line number in the source code. @@ -100,8 +104,9 @@ using SymbolHandle = std::variant; /// The data access profiles for a symbol. struct DataAccessProfRecord { public: - DataAccessProfRecord(SymbolHandleRef SymHandleRef, - ArrayRef LocRefs) { + DataAccessProfRecord(SymbolHandleRef SymHandleRef, uint64_t AccessCount, + ArrayRef LocRefs) + : AccessCount(AccessCount) { if (std::holds_alternative(SymHandleRef)) { SymHandle = std::get(SymHandleRef).str(); } else @@ -110,8 +115,9 @@ struct DataAccessProfRecord { for (auto Loc : LocRefs) Locations.push_back(SourceLocation(Loc.FileName, Loc.Line)); } + DataAccessProfRecord() {} SymbolHandle SymHandle; - + uint64_t AccessCount; // The locations of data in the source code. Optional. SmallVector Locations; }; diff --git a/llvm/include/llvm/ProfileData/IndexedMemProfData.h b/llvm/include/llvm/ProfileData/IndexedMemProfData.h index 3c6c329d1c49d..66fa38472059b 100644 --- a/llvm/include/llvm/ProfileData/IndexedMemProfData.h +++ b/llvm/include/llvm/ProfileData/IndexedMemProfData.h @@ -10,14 +10,20 @@ // //===--===// +#include "llvm/ProfileData/DataAccessProf.h" #include "llvm/ProfileData/InstrProf.h" #include "llvm/ProfileData/MemProf.h" +#include +#include + namespace llvm { // Write the MemProf data to OS. -Error writeMemProf(ProfOStream &OS, memprof::IndexedMemProfData &MemProfData, - memprof::IndexedVersion MemProfVersionRequested, - bool MemProfFullSchema); +Error writeMemProf( +ProfOStream &OS, memprof::IndexedMemProfData &MemProfData, +memprof::IndexedVersion MemProfVersionRequested, bool MemProfFullSchema, +std::optional> +DataAccessProfileData); } // namespace llvm diff --git a/llvm/include/llvm/ProfileData/InstrProfReader.h b/llvm/include/llvm/ProfileData/InstrProfReader.h index c250a9ede39bc..a3436e1dfe711 100644 --- a/llvm/include/llvm/ProfileDat
[llvm-branch-commits] [llvm] [AMDGPU] Automate creation of byte_sel dags. NFCI. (PR #140155)
https://github.com/rampitec ready_for_review https://github.com/llvm/llvm-project/pull/140155 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [AMDGPU] Automate creation of byte_sel dags. NFCI. (PR #140155)
rampitec wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/140155?utm_source=stack-comment-downstack-mergeability-warning"; > >on Graphite. > https://graphite.dev/docs/merge-pull-requests";>Learn more * **#140155** https://app.graphite.dev/github/pr/llvm/llvm-project/140155?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/140155?utm_source=stack-comment-view-in-graphite"; target="_blank">(View in Graphite) * **#140131** https://app.graphite.dev/github/pr/llvm/llvm-project/140131?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * `main` This stack of pull requests is managed by https://graphite.dev?utm-source=stack-comment";>Graphite. Learn more about https://stacking.dev/?utm_source=stack-comment";>stacking. https://github.com/llvm/llvm-project/pull/140155 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [AMDGPU] Automate creation of byte_sel dags. NFCI. (PR #140155)
llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Stanislav Mekhanoshin (rampitec) Changes --- Full diff: https://github.com/llvm/llvm-project/pull/140155.diff 3 Files Affected: - (modified) llvm/lib/Target/AMDGPU/SIInstrInfo.td (+15-6) - (modified) llvm/lib/Target/AMDGPU/VOP1Instructions.td (-11) - (modified) llvm/lib/Target/AMDGPU/VOP3Instructions.td (+1-10) ``diff diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.td b/llvm/lib/Target/AMDGPU/SIInstrInfo.td index 47ee0a7f60ee3..a5814dd7cf9f4 100644 --- a/llvm/lib/Target/AMDGPU/SIInstrInfo.td +++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.td @@ -1293,6 +1293,7 @@ def WaitVMVSrc : NamedIntOperand<"wait_vm_vsrc"> { def ByteSel : NamedIntOperand<"byte_sel"> { let Validator = "isUInt<2>"; } +def ByteSel0 : DefaultOperand; let PrintMethod = "printBitOp3" in def BitOp3 : NamedIntOperand<"bitop3">; @@ -1971,7 +1972,8 @@ class getIns32 class getIns64 { +Operand Src0Mod, Operand Src1Mod, Operand Src2Mod, +bit HasFP8ByteSel = 0, bit HasFP8DstByteSel = 0> { dag src0 = !if(!ge(NumSrcArgs, 1), !if (HasModifiers, (ins Src0Mod:$src0_modifiers, Src0RC:$src0), @@ -1989,18 +1991,23 @@ class getIns64 { +Operand Src0Mod, Operand Src1Mod, Operand Src2Mod, bit HasOpSel, +bit HasFP8ByteSel = 0, bit HasFP8DstByteSel = 0> { // getInst64 handles clamp and omod. implicit mutex between vop3p and omod dag base = getIns64 .ret; +Src0Mod, Src1Mod, Src2Mod, HasFP8ByteSel, HasFP8DstByteSel>.ret; dag opsel = (ins op_sel0:$op_sel); dag ret = !con(base, !if(HasOpSel, opsel, (ins))); } @@ -2612,7 +2619,8 @@ class VOPProfile _ArgVT, bit _EnableClamp = 0> { field dag Ins32 = getIns32.ret; field dag Ins64 = getIns64.ret; + HasOMod, Src0Mod, Src1Mod, Src2Mod, + HasFP8ByteSel, HasFP8DstByteSel>.ret; field dag InsVOP3P = getInsVOP3P.ret; @@ -2630,7 +2638,8 @@ class VOPProfile _ArgVT, bit _EnableClamp = 0> { Src0ModDPP, Src1ModDPP, Src2ModDPP>.ret; defvar InsVOP3DPPBase = getInsVOP3Base.ret; + Src0ModVOP3DPP, Src1ModVOP3DPP, Src2ModVOP3DPP, HasOpSel, + HasFP8ByteSel, HasFP8DstByteSel>.ret; defvar InsVOP3PDPPBase = getInsVOP3P.ret; diff --git a/llvm/lib/Target/AMDGPU/VOP1Instructions.td b/llvm/lib/Target/AMDGPU/VOP1Instructions.td index f885de3c13b12..7fdd951ecbd3c 100644 --- a/llvm/lib/Target/AMDGPU/VOP1Instructions.td +++ b/llvm/lib/Target/AMDGPU/VOP1Instructions.td @@ -674,17 +674,6 @@ class VOPProfile_Base_CVT_F_F8_ByteSel : VOPProfile<[DstVT, i32 let HasClamp = 0; let HasOMod = 0; let HasModifiers = 0; - - defvar bytesel = (ins ByteSel:$byte_sel); - let Ins64 = !con(getIns64.ret, - bytesel); - let InsVOP3Base = !con(getInsVOP3Base.ret, - bytesel); } let SubtargetPredicate = isGFX12Plus, OtherPredicates = [HasFP8ConversionInsts], diff --git a/llvm/lib/Target/AMDGPU/VOP3Instructions.td b/llvm/lib/Target/AMDGPU/VOP3Instructions.td index a7b90b9e319da..0252c4f1b0929 100644 --- a/llvm/lib/Target/AMDGPU/VOP3Instructions.td +++ b/llvm/lib/Target/AMDGPU/VOP3Instructions.td @@ -593,6 +593,7 @@ def VOP3_CVT_SR_F8_F32_Profile : VOP3_Profile, let HasExtVOP3DPP = 1; let HasOpSel = 1; let HasFP8DstByteSel = 1; + let HasFP8ByteSel = 0; // It works as a dst-bytesel, but does not have byte_sel operand. let AsmVOP3OpSel = !subst(", $src2_modifiers", "", getAsmVOP3OpSel<3, HasClamp, HasOMod, HasSrc0FloatMods, HasSrc1FloatMods, @@ -607,16 +608,6 @@ class VOP3_CVT_SR_F8_ByteSel_Profile : VOP3_Profile> { let HasFP8DstByteSel = 1; let HasClamp = 0; - defvar bytesel = (ins VGPR_32:$vdst_in, ByteSel:$byte_sel); - let Ins64 = !con(getIns64.ret, - bytesel); - let InsVOP3Base = !con( -getInsVOP3Base.ret, -bytesel); } def IsPow2Plus1: PatLeaf<(i32 imm), [{ `` https://github.com/llvm/llvm-project/pull/140155 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [llvm][EmbedBitcodePass] Prevent modifying the module with ThinLTO (PR #139999)
nikic wrote: @ilovepi Does it also work on the release branch? I'd mainly see the clone module approach as something easily backportable for the release branch, but I assume for main we'll want a different solution? https://github.com/llvm/llvm-project/pull/13 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [NFCI] [ValueTracking] Add pass to print ConstantRanges (PR #140144)
https://github.com/fmayer created https://github.com/llvm/llvm-project/pull/140144 None ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [NFCI] [ValueTracking] Add pass to print ConstantRanges (PR #140144)
llvmbot wrote: @llvm/pr-subscribers-testing-tools Author: Florian Mayer (fmayer) Changes --- Full diff: https://github.com/llvm/llvm-project/pull/140144.diff 6 Files Affected: - (modified) llvm/include/llvm/Analysis/ValueTracking.h (+15-1) - (modified) llvm/lib/Analysis/ValueTracking.cpp (+17) - (modified) llvm/lib/Passes/PassBuilder.cpp (+1) - (modified) llvm/lib/Passes/PassRegistry.def (+1) - (added) llvm/test/Analysis/ValueTracking/print-constant-range.ll (+234) - (modified) llvm/utils/UpdateTestChecks/common.py (+1) ``diff diff --git a/llvm/include/llvm/Analysis/ValueTracking.h b/llvm/include/llvm/Analysis/ValueTracking.h index 61dbb07e7128e..341c20931761a 100644 --- a/llvm/include/llvm/Analysis/ValueTracking.h +++ b/llvm/include/llvm/Analysis/ValueTracking.h @@ -19,9 +19,10 @@ #include "llvm/IR/Constants.h" #include "llvm/IR/DataLayout.h" #include "llvm/IR/FMF.h" -#include "llvm/IR/Instructions.h" #include "llvm/IR/InstrTypes.h" +#include "llvm/IR/Instructions.h" #include "llvm/IR/Intrinsics.h" +#include "llvm/IR/PassManager.h" #include #include @@ -1001,6 +1002,19 @@ std::optional isImpliedByDomCondition(CmpPredicate Pred, const Value *LHS, void findValuesAffectedByCondition(Value *Cond, bool IsAssume, function_ref InsertAffected); +/// Printer pass for \p computeConstantRange results. +class ConstantRangePrinterPass +: public PassInfoMixin { + raw_ostream &OS; + +public: + explicit ConstantRangePrinterPass(raw_ostream &OS) : OS(OS) {} + + PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM); + + static bool isRequired() { return true; } +}; + } // end namespace llvm #endif // LLVM_ANALYSIS_VALUETRACKING_H diff --git a/llvm/lib/Analysis/ValueTracking.cpp b/llvm/lib/Analysis/ValueTracking.cpp index 3d403531cea2f..3ebbf887b3e6c 100644 --- a/llvm/lib/Analysis/ValueTracking.cpp +++ b/llvm/lib/Analysis/ValueTracking.cpp @@ -49,6 +49,7 @@ #include "llvm/IR/GlobalAlias.h" #include "llvm/IR/GlobalValue.h" #include "llvm/IR/GlobalVariable.h" +#include "llvm/IR/InstIterator.h" #include "llvm/IR/InstrTypes.h" #include "llvm/IR/Instruction.h" #include "llvm/IR/Instructions.h" @@ -10451,3 +10452,19 @@ void llvm::findValuesAffectedByCondition( } } } + +PreservedAnalyses ConstantRangePrinterPass::run(Function &F, +FunctionAnalysisManager &AM) { + // For compatibility with opt's -analyze feature under legacy pass manager + // which was not ported to NPM. This keeps tests using + // update_analyze_test_checks.py working. + OS << "Printing analysis 'ConstantRange' for function '" << F.getName() + << "':\n"; + for (const Instruction &I : instructions(F)) { +if (!I.getType()->isIntOrIntVectorTy()) + continue; +auto CR = computeConstantRange(&I, false); +OS << I << ": " << CR << "\n"; + } + return PreservedAnalyses::all(); +} diff --git a/llvm/lib/Passes/PassBuilder.cpp b/llvm/lib/Passes/PassBuilder.cpp index 7740f622ede7c..060c1b535befd 100644 --- a/llvm/lib/Passes/PassBuilder.cpp +++ b/llvm/lib/Passes/PassBuilder.cpp @@ -78,6 +78,7 @@ #include "llvm/Analysis/TargetTransformInfo.h" #include "llvm/Analysis/TypeBasedAliasAnalysis.h" #include "llvm/Analysis/UniformityAnalysis.h" +#include "llvm/Analysis/ValueTracking.h" #include "llvm/CodeGen/AssignmentTrackingAnalysis.h" #include "llvm/CodeGen/AtomicExpand.h" #include "llvm/CodeGen/BasicBlockSectionsProfileReader.h" diff --git a/llvm/lib/Passes/PassRegistry.def b/llvm/lib/Passes/PassRegistry.def index ea792280ed975..8cbc6a1156c51 100644 --- a/llvm/lib/Passes/PassRegistry.def +++ b/llvm/lib/Passes/PassRegistry.def @@ -462,6 +462,7 @@ FUNCTION_PASS("print", PhiValuesPrinterPass(errs())) FUNCTION_PASS("print", PostDominatorTreePrinterPass(errs())) FUNCTION_PASS("print", RegionInfoPrinterPass(errs())) FUNCTION_PASS("print", ScalarEvolutionPrinterPass(errs())) +FUNCTION_PASS("print", ConstantRangePrinterPass(errs())) FUNCTION_PASS("print", StackSafetyPrinterPass(errs())) FUNCTION_PASS("print", UniformityInfoPrinterPass(errs())) FUNCTION_PASS("reassociate", ReassociatePass()) diff --git a/llvm/test/Analysis/ValueTracking/print-constant-range.ll b/llvm/test/Analysis/ValueTracking/print-constant-range.ll new file mode 100644 index 0..ad444551e9adc --- /dev/null +++ b/llvm/test/Analysis/ValueTracking/print-constant-range.ll @@ -0,0 +1,234 @@ +; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py UTC_ARGS: --version 5 +; RUN: opt -disable-output '-passes=print' < %s -S 2>&1 | FileCheck %s + +define i1 @shl_C_X_ugt(i8 %x) { +; CHECK-LABEL: 'shl_C_X_ugt' +; CHECK-NEXT:%shl = shl i8 7, %x: [1,-31) +; CHECK-NEXT:%r = icmp ugt i8 %shl, -32: full-set +; + %shl = shl i8 7, %x + %r = icmp ugt i8 %shl, 224 + ret i1 %r +} + +define i1 @shl_C_X_ugt2(i8 %x) { +; CHECK-LABEL: 'shl_C_X_ugt2' +; CHECK-NEXT:%shl = shl i8 5, %x: [1,-63
[llvm-branch-commits] [NFCI] [ValueTracking] Add pass to print ConstantRanges (PR #140144)
llvmbot wrote: @llvm/pr-subscribers-llvm-analysis Author: Florian Mayer (fmayer) Changes --- Full diff: https://github.com/llvm/llvm-project/pull/140144.diff 6 Files Affected: - (modified) llvm/include/llvm/Analysis/ValueTracking.h (+15-1) - (modified) llvm/lib/Analysis/ValueTracking.cpp (+17) - (modified) llvm/lib/Passes/PassBuilder.cpp (+1) - (modified) llvm/lib/Passes/PassRegistry.def (+1) - (added) llvm/test/Analysis/ValueTracking/print-constant-range.ll (+234) - (modified) llvm/utils/UpdateTestChecks/common.py (+1) ``diff diff --git a/llvm/include/llvm/Analysis/ValueTracking.h b/llvm/include/llvm/Analysis/ValueTracking.h index 61dbb07e7128e..341c20931761a 100644 --- a/llvm/include/llvm/Analysis/ValueTracking.h +++ b/llvm/include/llvm/Analysis/ValueTracking.h @@ -19,9 +19,10 @@ #include "llvm/IR/Constants.h" #include "llvm/IR/DataLayout.h" #include "llvm/IR/FMF.h" -#include "llvm/IR/Instructions.h" #include "llvm/IR/InstrTypes.h" +#include "llvm/IR/Instructions.h" #include "llvm/IR/Intrinsics.h" +#include "llvm/IR/PassManager.h" #include #include @@ -1001,6 +1002,19 @@ std::optional isImpliedByDomCondition(CmpPredicate Pred, const Value *LHS, void findValuesAffectedByCondition(Value *Cond, bool IsAssume, function_ref InsertAffected); +/// Printer pass for \p computeConstantRange results. +class ConstantRangePrinterPass +: public PassInfoMixin { + raw_ostream &OS; + +public: + explicit ConstantRangePrinterPass(raw_ostream &OS) : OS(OS) {} + + PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM); + + static bool isRequired() { return true; } +}; + } // end namespace llvm #endif // LLVM_ANALYSIS_VALUETRACKING_H diff --git a/llvm/lib/Analysis/ValueTracking.cpp b/llvm/lib/Analysis/ValueTracking.cpp index 3d403531cea2f..3ebbf887b3e6c 100644 --- a/llvm/lib/Analysis/ValueTracking.cpp +++ b/llvm/lib/Analysis/ValueTracking.cpp @@ -49,6 +49,7 @@ #include "llvm/IR/GlobalAlias.h" #include "llvm/IR/GlobalValue.h" #include "llvm/IR/GlobalVariable.h" +#include "llvm/IR/InstIterator.h" #include "llvm/IR/InstrTypes.h" #include "llvm/IR/Instruction.h" #include "llvm/IR/Instructions.h" @@ -10451,3 +10452,19 @@ void llvm::findValuesAffectedByCondition( } } } + +PreservedAnalyses ConstantRangePrinterPass::run(Function &F, +FunctionAnalysisManager &AM) { + // For compatibility with opt's -analyze feature under legacy pass manager + // which was not ported to NPM. This keeps tests using + // update_analyze_test_checks.py working. + OS << "Printing analysis 'ConstantRange' for function '" << F.getName() + << "':\n"; + for (const Instruction &I : instructions(F)) { +if (!I.getType()->isIntOrIntVectorTy()) + continue; +auto CR = computeConstantRange(&I, false); +OS << I << ": " << CR << "\n"; + } + return PreservedAnalyses::all(); +} diff --git a/llvm/lib/Passes/PassBuilder.cpp b/llvm/lib/Passes/PassBuilder.cpp index 7740f622ede7c..060c1b535befd 100644 --- a/llvm/lib/Passes/PassBuilder.cpp +++ b/llvm/lib/Passes/PassBuilder.cpp @@ -78,6 +78,7 @@ #include "llvm/Analysis/TargetTransformInfo.h" #include "llvm/Analysis/TypeBasedAliasAnalysis.h" #include "llvm/Analysis/UniformityAnalysis.h" +#include "llvm/Analysis/ValueTracking.h" #include "llvm/CodeGen/AssignmentTrackingAnalysis.h" #include "llvm/CodeGen/AtomicExpand.h" #include "llvm/CodeGen/BasicBlockSectionsProfileReader.h" diff --git a/llvm/lib/Passes/PassRegistry.def b/llvm/lib/Passes/PassRegistry.def index ea792280ed975..8cbc6a1156c51 100644 --- a/llvm/lib/Passes/PassRegistry.def +++ b/llvm/lib/Passes/PassRegistry.def @@ -462,6 +462,7 @@ FUNCTION_PASS("print", PhiValuesPrinterPass(errs())) FUNCTION_PASS("print", PostDominatorTreePrinterPass(errs())) FUNCTION_PASS("print", RegionInfoPrinterPass(errs())) FUNCTION_PASS("print", ScalarEvolutionPrinterPass(errs())) +FUNCTION_PASS("print", ConstantRangePrinterPass(errs())) FUNCTION_PASS("print", StackSafetyPrinterPass(errs())) FUNCTION_PASS("print", UniformityInfoPrinterPass(errs())) FUNCTION_PASS("reassociate", ReassociatePass()) diff --git a/llvm/test/Analysis/ValueTracking/print-constant-range.ll b/llvm/test/Analysis/ValueTracking/print-constant-range.ll new file mode 100644 index 0..ad444551e9adc --- /dev/null +++ b/llvm/test/Analysis/ValueTracking/print-constant-range.ll @@ -0,0 +1,234 @@ +; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py UTC_ARGS: --version 5 +; RUN: opt -disable-output '-passes=print' < %s -S 2>&1 | FileCheck %s + +define i1 @shl_C_X_ugt(i8 %x) { +; CHECK-LABEL: 'shl_C_X_ugt' +; CHECK-NEXT:%shl = shl i8 7, %x: [1,-31) +; CHECK-NEXT:%r = icmp ugt i8 %shl, -32: full-set +; + %shl = shl i8 7, %x + %r = icmp ugt i8 %shl, 224 + ret i1 %r +} + +define i1 @shl_C_X_ugt2(i8 %x) { +; CHECK-LABEL: 'shl_C_X_ugt2' +; CHECK-NEXT:%shl = shl i8 5, %x: [1,-63
[llvm-branch-commits] [NFCI] [ValueTracking] Add pass to print ConstantRanges (PR #140144)
https://github.com/fmayer updated https://github.com/llvm/llvm-project/pull/140144 Rate limit · GitHub body { background-color: #f6f8fa; color: #24292e; font-family: -apple-system,BlinkMacSystemFont,Segoe UI,Helvetica,Arial,sans-serif,Apple Color Emoji,Segoe UI Emoji,Segoe UI Symbol; font-size: 14px; line-height: 1.5; margin: 0; } .container { margin: 50px auto; max-width: 600px; text-align: center; padding: 0 24px; } a { color: #0366d6; text-decoration: none; } a:hover { text-decoration: underline; } h1 { line-height: 60px; font-size: 48px; font-weight: 300; margin: 0px; text-shadow: 0 1px 0 #fff; } p { color: rgba(0, 0, 0, 0.5); margin: 20px 0 40px; } ul { list-style: none; margin: 25px 0; padding: 0; } li { display: table-cell; font-weight: bold; width: 1%; } .logo { display: inline-block; margin-top: 35px; } .logo-img-2x { display: none; } @media only screen and (-webkit-min-device-pixel-ratio: 2), only screen and ( min--moz-device-pixel-ratio: 2), only screen and ( -o-min-device-pixel-ratio: 2/1), only screen and (min-device-pixel-ratio: 2), only screen and (min-resolution: 192dpi), only screen and (min-resolution: 2dppx) { .logo-img-1x { display: none; } .logo-img-2x { display: inline-block; } } #suggestions { margin-top: 35px; color: #ccc; } #suggestions a { color: #66; font-weight: 200; font-size: 14px; margin: 0 10px; } Whoa there! You have exceeded a secondary rate limit. Please wait a few minutes before you try again; in some cases this may take up to an hour. https://support.github.com/contact";>Contact Support — https://githubstatus.com";>GitHub Status — https://twitter.com/githubstatus";>@githubstatus ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [NFCI] [ValueTracking] Add pass to print ConstantRanges (PR #140144)
https://github.com/fmayer updated https://github.com/llvm/llvm-project/pull/140144 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [llvm] [HLSL][RootSignature] Add parsing of Register in params for RootParams (PR #140148)
llvmbot wrote: @llvm/pr-subscribers-hlsl Author: Finn Plummer (inbelic) Changes - defines the `parseRootParamParams` infastructure for parsing the params of a RootParam - defines the register type to illustrate use - add tests to demonstrate functionality Part 2 of https://github.com/llvm/llvm-project/issues/126577 --- Full diff: https://github.com/llvm/llvm-project/pull/140148.diff 4 Files Affected: - (modified) clang/include/clang/Parse/ParseHLSLRootSignature.h (+6) - (modified) clang/lib/Parse/ParseHLSLRootSignature.cpp (+42) - (modified) clang/unittests/Parse/ParseHLSLRootSignatureTest.cpp (+9-4) - (modified) llvm/include/llvm/Frontend/HLSL/HLSLRootSignature.h (+1) ``diff diff --git a/clang/include/clang/Parse/ParseHLSLRootSignature.h b/clang/include/clang/Parse/ParseHLSLRootSignature.h index b96416ab6c6c4..92b8e7389426a 100644 --- a/clang/include/clang/Parse/ParseHLSLRootSignature.h +++ b/clang/include/clang/Parse/ParseHLSLRootSignature.h @@ -89,6 +89,12 @@ class RootSignatureParser { }; std::optional parseRootConstantParams(); + struct ParsedRootParamParams { +std::optional Reg; + }; + std::optional + parseRootParamParams(RootSignatureToken::Kind RegType); + struct ParsedClauseParams { std::optional Reg; std::optional NumDescriptors; diff --git a/clang/lib/Parse/ParseHLSLRootSignature.cpp b/clang/lib/Parse/ParseHLSLRootSignature.cpp index 3ed60442eaa14..de7c2452b3fd4 100644 --- a/clang/lib/Parse/ParseHLSLRootSignature.cpp +++ b/clang/lib/Parse/ParseHLSLRootSignature.cpp @@ -176,20 +176,37 @@ std::optional RootSignatureParser::parseRootParam() { return std::nullopt; RootParam Param; + TokenKind ExpectedReg; switch (ParamKind) { default: llvm_unreachable("Switch for consumed token was not provided"); case TokenKind::kw_CBV: Param.Type = ParamType::CBuffer; +ExpectedReg = TokenKind::bReg; break; case TokenKind::kw_SRV: Param.Type = ParamType::SRV; +ExpectedReg = TokenKind::tReg; break; case TokenKind::kw_UAV: Param.Type = ParamType::UAV; +ExpectedReg = TokenKind::uReg; break; } + auto Params = parseRootParamParams(ExpectedReg); + if (!Params.has_value()) +return std::nullopt; + + // Check mandatory parameters were provided + if (!Params->Reg.has_value()) { +getDiags().Report(CurToken.TokLoc, diag::err_hlsl_rootsig_missing_param) +<< ExpectedReg; +return std::nullopt; + } + + Param.Reg = Params->Reg.value(); + if (consumeExpectedToken(TokenKind::pu_r_paren, diag::err_hlsl_unexpected_end_of_params, /*param of=*/TokenKind::kw_RootConstants)) @@ -398,6 +415,31 @@ RootSignatureParser::parseRootConstantParams() { return Params; } +std::optional +RootSignatureParser::parseRootParamParams(TokenKind RegType) { + assert(CurToken.TokKind == TokenKind::pu_l_paren && + "Expects to only be invoked starting at given token"); + + ParsedRootParamParams Params; + do { +// ( `b` | `t` | `u`) POS_INT +if (tryConsumeExpectedToken(RegType)) { + if (Params.Reg.has_value()) { +getDiags().Report(CurToken.TokLoc, diag::err_hlsl_rootsig_repeat_param) +<< CurToken.TokKind; +return std::nullopt; + } + auto Reg = parseRegister(); + if (!Reg.has_value()) +return std::nullopt; + Params.Reg = Reg; +} + + } while (tryConsumeExpectedToken(TokenKind::pu_comma)); + + return Params; +} + std::optional RootSignatureParser::parseDescriptorTableClauseParams(TokenKind RegType) { assert(CurToken.TokKind == TokenKind::pu_l_paren && diff --git a/clang/unittests/Parse/ParseHLSLRootSignatureTest.cpp b/clang/unittests/Parse/ParseHLSLRootSignatureTest.cpp index 876dcd17f0389..0f32523493a53 100644 --- a/clang/unittests/Parse/ParseHLSLRootSignatureTest.cpp +++ b/clang/unittests/Parse/ParseHLSLRootSignatureTest.cpp @@ -346,9 +346,9 @@ TEST_F(ParseHLSLRootSignatureTest, ValidParseRootFlagsTest) { TEST_F(ParseHLSLRootSignatureTest, ValidParseRootParamsTest) { const llvm::StringLiteral Source = R"cc( -CBV(), -SRV(), -UAV() +CBV(b0), +SRV(t42), +UAV(u34893247) )cc"; TrivialModuleLoader ModLoader; @@ -368,15 +368,20 @@ TEST_F(ParseHLSLRootSignatureTest, ValidParseRootParamsTest) { RootElement Elem = Elements[0]; ASSERT_TRUE(std::holds_alternative(Elem)); - ASSERT_EQ(std::get(Elem).Type, ParamType::CBuffer); + ASSERT_EQ(std::get(Elem).Reg.ViewType, RegisterType::BReg); + ASSERT_EQ(std::get(Elem).Reg.Number, 0u); Elem = Elements[1]; ASSERT_TRUE(std::holds_alternative(Elem)); ASSERT_EQ(std::get(Elem).Type, ParamType::SRV); + ASSERT_EQ(std::get(Elem).Reg.ViewType, RegisterType::TReg); + ASSERT_EQ(std::get(Elem).Reg.Number, 42u); Elem = Elements[2]; ASSERT_TRUE(std::holds_alternative(Elem)); ASSERT_EQ(std::get(Elem).Type, ParamType::UAV); + ASSERT_EQ(std::get(Elem).Reg.View
[llvm-branch-commits] [clang] [llvm] [HLSL][RootSignature] Add parsing of Register in params for RootParams (PR #140148)
llvmbot wrote: @llvm/pr-subscribers-clang Author: Finn Plummer (inbelic) Changes - defines the `parseRootParamParams` infastructure for parsing the params of a RootParam - defines the register type to illustrate use - add tests to demonstrate functionality Part 2 of https://github.com/llvm/llvm-project/issues/126577 --- Full diff: https://github.com/llvm/llvm-project/pull/140148.diff 4 Files Affected: - (modified) clang/include/clang/Parse/ParseHLSLRootSignature.h (+6) - (modified) clang/lib/Parse/ParseHLSLRootSignature.cpp (+42) - (modified) clang/unittests/Parse/ParseHLSLRootSignatureTest.cpp (+9-4) - (modified) llvm/include/llvm/Frontend/HLSL/HLSLRootSignature.h (+1) ``diff diff --git a/clang/include/clang/Parse/ParseHLSLRootSignature.h b/clang/include/clang/Parse/ParseHLSLRootSignature.h index b96416ab6c6c4..92b8e7389426a 100644 --- a/clang/include/clang/Parse/ParseHLSLRootSignature.h +++ b/clang/include/clang/Parse/ParseHLSLRootSignature.h @@ -89,6 +89,12 @@ class RootSignatureParser { }; std::optional parseRootConstantParams(); + struct ParsedRootParamParams { +std::optional Reg; + }; + std::optional + parseRootParamParams(RootSignatureToken::Kind RegType); + struct ParsedClauseParams { std::optional Reg; std::optional NumDescriptors; diff --git a/clang/lib/Parse/ParseHLSLRootSignature.cpp b/clang/lib/Parse/ParseHLSLRootSignature.cpp index 3ed60442eaa14..de7c2452b3fd4 100644 --- a/clang/lib/Parse/ParseHLSLRootSignature.cpp +++ b/clang/lib/Parse/ParseHLSLRootSignature.cpp @@ -176,20 +176,37 @@ std::optional RootSignatureParser::parseRootParam() { return std::nullopt; RootParam Param; + TokenKind ExpectedReg; switch (ParamKind) { default: llvm_unreachable("Switch for consumed token was not provided"); case TokenKind::kw_CBV: Param.Type = ParamType::CBuffer; +ExpectedReg = TokenKind::bReg; break; case TokenKind::kw_SRV: Param.Type = ParamType::SRV; +ExpectedReg = TokenKind::tReg; break; case TokenKind::kw_UAV: Param.Type = ParamType::UAV; +ExpectedReg = TokenKind::uReg; break; } + auto Params = parseRootParamParams(ExpectedReg); + if (!Params.has_value()) +return std::nullopt; + + // Check mandatory parameters were provided + if (!Params->Reg.has_value()) { +getDiags().Report(CurToken.TokLoc, diag::err_hlsl_rootsig_missing_param) +<< ExpectedReg; +return std::nullopt; + } + + Param.Reg = Params->Reg.value(); + if (consumeExpectedToken(TokenKind::pu_r_paren, diag::err_hlsl_unexpected_end_of_params, /*param of=*/TokenKind::kw_RootConstants)) @@ -398,6 +415,31 @@ RootSignatureParser::parseRootConstantParams() { return Params; } +std::optional +RootSignatureParser::parseRootParamParams(TokenKind RegType) { + assert(CurToken.TokKind == TokenKind::pu_l_paren && + "Expects to only be invoked starting at given token"); + + ParsedRootParamParams Params; + do { +// ( `b` | `t` | `u`) POS_INT +if (tryConsumeExpectedToken(RegType)) { + if (Params.Reg.has_value()) { +getDiags().Report(CurToken.TokLoc, diag::err_hlsl_rootsig_repeat_param) +<< CurToken.TokKind; +return std::nullopt; + } + auto Reg = parseRegister(); + if (!Reg.has_value()) +return std::nullopt; + Params.Reg = Reg; +} + + } while (tryConsumeExpectedToken(TokenKind::pu_comma)); + + return Params; +} + std::optional RootSignatureParser::parseDescriptorTableClauseParams(TokenKind RegType) { assert(CurToken.TokKind == TokenKind::pu_l_paren && diff --git a/clang/unittests/Parse/ParseHLSLRootSignatureTest.cpp b/clang/unittests/Parse/ParseHLSLRootSignatureTest.cpp index 876dcd17f0389..0f32523493a53 100644 --- a/clang/unittests/Parse/ParseHLSLRootSignatureTest.cpp +++ b/clang/unittests/Parse/ParseHLSLRootSignatureTest.cpp @@ -346,9 +346,9 @@ TEST_F(ParseHLSLRootSignatureTest, ValidParseRootFlagsTest) { TEST_F(ParseHLSLRootSignatureTest, ValidParseRootParamsTest) { const llvm::StringLiteral Source = R"cc( -CBV(), -SRV(), -UAV() +CBV(b0), +SRV(t42), +UAV(u34893247) )cc"; TrivialModuleLoader ModLoader; @@ -368,15 +368,20 @@ TEST_F(ParseHLSLRootSignatureTest, ValidParseRootParamsTest) { RootElement Elem = Elements[0]; ASSERT_TRUE(std::holds_alternative(Elem)); - ASSERT_EQ(std::get(Elem).Type, ParamType::CBuffer); + ASSERT_EQ(std::get(Elem).Reg.ViewType, RegisterType::BReg); + ASSERT_EQ(std::get(Elem).Reg.Number, 0u); Elem = Elements[1]; ASSERT_TRUE(std::holds_alternative(Elem)); ASSERT_EQ(std::get(Elem).Type, ParamType::SRV); + ASSERT_EQ(std::get(Elem).Reg.ViewType, RegisterType::TReg); + ASSERT_EQ(std::get(Elem).Reg.Number, 42u); Elem = Elements[2]; ASSERT_TRUE(std::holds_alternative(Elem)); ASSERT_EQ(std::get(Elem).Type, ParamType::UAV); + ASSERT_EQ(std::get(Elem).Reg.Vie
[llvm-branch-commits] [clang] [llvm] [HLSL][RootSignature] Add parsing of Register in params for RootParams (PR #140148)
https://github.com/inbelic created https://github.com/llvm/llvm-project/pull/140148 - defines the `parseRootParamParams` infastructure for parsing the params of a RootParam - defines the register type to illustrate use - add tests to demonstrate functionality Part 2 of https://github.com/llvm/llvm-project/issues/126577 Rate limit · GitHub body { background-color: #f6f8fa; color: #24292e; font-family: -apple-system,BlinkMacSystemFont,Segoe UI,Helvetica,Arial,sans-serif,Apple Color Emoji,Segoe UI Emoji,Segoe UI Symbol; font-size: 14px; line-height: 1.5; margin: 0; } .container { margin: 50px auto; max-width: 600px; text-align: center; padding: 0 24px; } a { color: #0366d6; text-decoration: none; } a:hover { text-decoration: underline; } h1 { line-height: 60px; font-size: 48px; font-weight: 300; margin: 0px; text-shadow: 0 1px 0 #fff; } p { color: rgba(0, 0, 0, 0.5); margin: 20px 0 40px; } ul { list-style: none; margin: 25px 0; padding: 0; } li { display: table-cell; font-weight: bold; width: 1%; } .logo { display: inline-block; margin-top: 35px; } .logo-img-2x { display: none; } @media only screen and (-webkit-min-device-pixel-ratio: 2), only screen and ( min--moz-device-pixel-ratio: 2), only screen and ( -o-min-device-pixel-ratio: 2/1), only screen and (min-device-pixel-ratio: 2), only screen and (min-resolution: 192dpi), only screen and (min-resolution: 2dppx) { .logo-img-1x { display: none; } .logo-img-2x { display: inline-block; } } #suggestions { margin-top: 35px; color: #ccc; } #suggestions a { color: #66; font-weight: 200; font-size: 14px; margin: 0 10px; } Whoa there! You have exceeded a secondary rate limit. Please wait a few minutes before you try again; in some cases this may take up to an hour. https://support.github.com/contact";>Contact Support — https://githubstatus.com";>GitHub Status — https://twitter.com/githubstatus";>@githubstatus ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [llvm] [HLSL][RootSignature] Add parsing of optional parameters for RootParam (PR #140151)
https://github.com/inbelic created https://github.com/llvm/llvm-project/pull/140151 - define in-memory representation of optional non-flag parameters to RootParam - fill in data to parse these params in `parseRootParamParams` - add unit tests Part 3 of https://github.com/llvm/llvm-project/issues/126577 Rate limit · GitHub body { background-color: #f6f8fa; color: #24292e; font-family: -apple-system,BlinkMacSystemFont,Segoe UI,Helvetica,Arial,sans-serif,Apple Color Emoji,Segoe UI Emoji,Segoe UI Symbol; font-size: 14px; line-height: 1.5; margin: 0; } .container { margin: 50px auto; max-width: 600px; text-align: center; padding: 0 24px; } a { color: #0366d6; text-decoration: none; } a:hover { text-decoration: underline; } h1 { line-height: 60px; font-size: 48px; font-weight: 300; margin: 0px; text-shadow: 0 1px 0 #fff; } p { color: rgba(0, 0, 0, 0.5); margin: 20px 0 40px; } ul { list-style: none; margin: 25px 0; padding: 0; } li { display: table-cell; font-weight: bold; width: 1%; } .logo { display: inline-block; margin-top: 35px; } .logo-img-2x { display: none; } @media only screen and (-webkit-min-device-pixel-ratio: 2), only screen and ( min--moz-device-pixel-ratio: 2), only screen and ( -o-min-device-pixel-ratio: 2/1), only screen and (min-device-pixel-ratio: 2), only screen and (min-resolution: 192dpi), only screen and (min-resolution: 2dppx) { .logo-img-1x { display: none; } .logo-img-2x { display: inline-block; } } #suggestions { margin-top: 35px; color: #ccc; } #suggestions a { color: #66; font-weight: 200; font-size: 14px; margin: 0 10px; } Whoa there! You have exceeded a secondary rate limit. Please wait a few minutes before you try again; in some cases this may take up to an hour. https://support.github.com/contact";>Contact Support — https://githubstatus.com";>GitHub Status — https://twitter.com/githubstatus";>@githubstatus ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [llvm] [HLSL][RootSignature] Add parsing of optional parameters for RootParam (PR #140151)
llvmbot wrote: @llvm/pr-subscribers-clang Author: Finn Plummer (inbelic) Changes - define in-memory representation of optional non-flag parameters to RootParam - fill in data to parse these params in `parseRootParamParams` - add unit tests Part 3 of https://github.com/llvm/llvm-project/issues/126577 --- Full diff: https://github.com/llvm/llvm-project/pull/140151.diff 4 Files Affected: - (modified) clang/include/clang/Parse/ParseHLSLRootSignature.h (+2) - (modified) clang/lib/Parse/ParseHLSLRootSignature.cpp (+40) - (modified) clang/unittests/Parse/ParseHLSLRootSignatureTest.cpp (+8-2) - (modified) llvm/include/llvm/Frontend/HLSL/HLSLRootSignature.h (+2) ``diff diff --git a/clang/include/clang/Parse/ParseHLSLRootSignature.h b/clang/include/clang/Parse/ParseHLSLRootSignature.h index 92b8e7389426a..436d217cec5b1 100644 --- a/clang/include/clang/Parse/ParseHLSLRootSignature.h +++ b/clang/include/clang/Parse/ParseHLSLRootSignature.h @@ -91,6 +91,8 @@ class RootSignatureParser { struct ParsedRootParamParams { std::optional Reg; +std::optional Space; +std::optional Visibility; }; std::optional parseRootParamParams(RootSignatureToken::Kind RegType); diff --git a/clang/lib/Parse/ParseHLSLRootSignature.cpp b/clang/lib/Parse/ParseHLSLRootSignature.cpp index de7c2452b3fd4..edb61f29f10d7 100644 --- a/clang/lib/Parse/ParseHLSLRootSignature.cpp +++ b/clang/lib/Parse/ParseHLSLRootSignature.cpp @@ -207,6 +207,13 @@ std::optional RootSignatureParser::parseRootParam() { Param.Reg = Params->Reg.value(); + // Fill in optional values + if (Params->Space.has_value()) +Param.Space = Params->Space.value(); + + if (Params->Visibility.has_value()) +Param.Visibility = Params->Visibility.value(); + if (consumeExpectedToken(TokenKind::pu_r_paren, diag::err_hlsl_unexpected_end_of_params, /*param of=*/TokenKind::kw_RootConstants)) @@ -435,6 +442,39 @@ RootSignatureParser::parseRootParamParams(TokenKind RegType) { Params.Reg = Reg; } +// `space` `=` POS_INT +if (tryConsumeExpectedToken(TokenKind::kw_space)) { + if (Params.Space.has_value()) { +getDiags().Report(CurToken.TokLoc, diag::err_hlsl_rootsig_repeat_param) +<< CurToken.TokKind; +return std::nullopt; + } + + if (consumeExpectedToken(TokenKind::pu_equal)) +return std::nullopt; + + auto Space = parseUIntParam(); + if (!Space.has_value()) +return std::nullopt; + Params.Space = Space; +} + +// `visibility` `=` SHADER_VISIBILITY +if (tryConsumeExpectedToken(TokenKind::kw_visibility)) { + if (Params.Visibility.has_value()) { +getDiags().Report(CurToken.TokLoc, diag::err_hlsl_rootsig_repeat_param) +<< CurToken.TokKind; +return std::nullopt; + } + + if (consumeExpectedToken(TokenKind::pu_equal)) +return std::nullopt; + + auto Visibility = parseShaderVisibility(); + if (!Visibility.has_value()) +return std::nullopt; + Params.Visibility = Visibility; +} } while (tryConsumeExpectedToken(TokenKind::pu_comma)); return Params; diff --git a/clang/unittests/Parse/ParseHLSLRootSignatureTest.cpp b/clang/unittests/Parse/ParseHLSLRootSignatureTest.cpp index 0f32523493a53..02bf38dcb110f 100644 --- a/clang/unittests/Parse/ParseHLSLRootSignatureTest.cpp +++ b/clang/unittests/Parse/ParseHLSLRootSignatureTest.cpp @@ -347,8 +347,8 @@ TEST_F(ParseHLSLRootSignatureTest, ValidParseRootFlagsTest) { TEST_F(ParseHLSLRootSignatureTest, ValidParseRootParamsTest) { const llvm::StringLiteral Source = R"cc( CBV(b0), -SRV(t42), -UAV(u34893247) +SRV(space = 4, t42, visibility = SHADER_VISIBILITY_GEOMETRY), +UAV(visibility = SHADER_VISIBILITY_HULL, u34893247) )cc"; TrivialModuleLoader ModLoader; @@ -370,18 +370,24 @@ TEST_F(ParseHLSLRootSignatureTest, ValidParseRootParamsTest) { ASSERT_TRUE(std::holds_alternative(Elem)); ASSERT_EQ(std::get(Elem).Reg.ViewType, RegisterType::BReg); ASSERT_EQ(std::get(Elem).Reg.Number, 0u); + ASSERT_EQ(std::get(Elem).Space, 0u); + ASSERT_EQ(std::get(Elem).Visibility, ShaderVisibility::All); Elem = Elements[1]; ASSERT_TRUE(std::holds_alternative(Elem)); ASSERT_EQ(std::get(Elem).Type, ParamType::SRV); ASSERT_EQ(std::get(Elem).Reg.ViewType, RegisterType::TReg); ASSERT_EQ(std::get(Elem).Reg.Number, 42u); + ASSERT_EQ(std::get(Elem).Space, 4u); + ASSERT_EQ(std::get(Elem).Visibility, ShaderVisibility::Geometry); Elem = Elements[2]; ASSERT_TRUE(std::holds_alternative(Elem)); ASSERT_EQ(std::get(Elem).Type, ParamType::UAV); ASSERT_EQ(std::get(Elem).Reg.ViewType, RegisterType::UReg); ASSERT_EQ(std::get(Elem).Reg.Number, 34893247u); + ASSERT_EQ(std::get(Elem).Space, 0u); + ASSERT_EQ(std::get(Elem).Visibility, ShaderVisibility::Hull); ASSERT_TRUE(Consumer->isSatisfied()); } diff --git a/llv
[llvm-branch-commits] [clang] [llvm] [HLSL][RootSignature] Add parsing of flags to RootParam (PR #140152)
https://github.com/inbelic created https://github.com/llvm/llvm-project/pull/140152 - defines RootDescriptorFlags in-memory representation - defines parseRootDescriptorFlags to be DXC compatible. This is why we support multiple `|` flags even validation will assert that only one flag is set... - add unit tests to demonstrate functionality Final part of and resolves https://github.com/llvm/llvm-project/issues/126577 >From ab3904222ef1d21a6040a27e753598d8525c068a Mon Sep 17 00:00:00 2001 From: Finn Plummer Date: Thu, 15 May 2025 20:31:30 + Subject: [PATCH] [HLSL][RootSignature] Add parsing of flags to RootParam - defines RootDescriptorFlags in-memory representation - defines parseRootDescriptorFlags to be DXC compatible. This is why we support multiple `|` flags even validation will assert that only one flag is set... - add unit tests to demonstrate functionality --- .../clang/Parse/ParseHLSLRootSignature.h | 3 + clang/lib/Parse/ParseHLSLRootSignature.cpp| 60 +++ .../Parse/ParseHLSLRootSignatureTest.cpp | 20 ++- .../llvm/Frontend/HLSL/HLSLRootSignature.h| 25 4 files changed, 105 insertions(+), 3 deletions(-) diff --git a/clang/include/clang/Parse/ParseHLSLRootSignature.h b/clang/include/clang/Parse/ParseHLSLRootSignature.h index 436d217cec5b1..7b9168290d62a 100644 --- a/clang/include/clang/Parse/ParseHLSLRootSignature.h +++ b/clang/include/clang/Parse/ParseHLSLRootSignature.h @@ -93,6 +93,7 @@ class RootSignatureParser { std::optional Reg; std::optional Space; std::optional Visibility; +std::optional Flags; }; std::optional parseRootParamParams(RootSignatureToken::Kind RegType); @@ -113,6 +114,8 @@ class RootSignatureParser { /// Parsing methods of various enums std::optional parseShaderVisibility(); + std::optional + parseRootDescriptorFlags(); std::optional parseDescriptorRangeFlags(); diff --git a/clang/lib/Parse/ParseHLSLRootSignature.cpp b/clang/lib/Parse/ParseHLSLRootSignature.cpp index edb61f29f10d7..faf261cc9b7fe 100644 --- a/clang/lib/Parse/ParseHLSLRootSignature.cpp +++ b/clang/lib/Parse/ParseHLSLRootSignature.cpp @@ -193,6 +193,7 @@ std::optional RootSignatureParser::parseRootParam() { ExpectedReg = TokenKind::uReg; break; } + Param.setDefaultFlags(); auto Params = parseRootParamParams(ExpectedReg); if (!Params.has_value()) @@ -214,6 +215,9 @@ std::optional RootSignatureParser::parseRootParam() { if (Params->Visibility.has_value()) Param.Visibility = Params->Visibility.value(); + if (Params->Flags.has_value()) +Param.Flags = Params->Flags.value(); + if (consumeExpectedToken(TokenKind::pu_r_paren, diag::err_hlsl_unexpected_end_of_params, /*param of=*/TokenKind::kw_RootConstants)) @@ -475,6 +479,23 @@ RootSignatureParser::parseRootParamParams(TokenKind RegType) { return std::nullopt; Params.Visibility = Visibility; } + +// `flags` `=` ROOT_DESCRIPTOR_FLAGS +if (tryConsumeExpectedToken(TokenKind::kw_flags)) { + if (Params.Flags.has_value()) { +getDiags().Report(CurToken.TokLoc, diag::err_hlsl_rootsig_repeat_param) +<< CurToken.TokKind; +return std::nullopt; + } + + if (consumeExpectedToken(TokenKind::pu_equal)) +return std::nullopt; + + auto Flags = parseRootDescriptorFlags(); + if (!Flags.has_value()) +return std::nullopt; + Params.Flags = Flags; +} } while (tryConsumeExpectedToken(TokenKind::pu_comma)); return Params; @@ -654,6 +675,45 @@ RootSignatureParser::parseShaderVisibility() { return std::nullopt; } +std::optional +RootSignatureParser::parseRootDescriptorFlags() { + assert(CurToken.TokKind == TokenKind::pu_equal && + "Expects to only be invoked starting at given keyword"); + + // Handle the edge-case of '0' to specify no flags set + if (tryConsumeExpectedToken(TokenKind::int_literal)) { +if (!verifyZeroFlag()) { + getDiags().Report(CurToken.TokLoc, diag::err_hlsl_rootsig_non_zero_flag); + return std::nullopt; +} +return RootDescriptorFlags::None; + } + + TokenKind Expected[] = { +#define ROOT_DESCRIPTOR_FLAG_ENUM(NAME, LIT) TokenKind::en_##NAME, +#include "clang/Lex/HLSLRootSignatureTokenKinds.def" + }; + + std::optional Flags; + + do { +if (tryConsumeExpectedToken(Expected)) { + switch (CurToken.TokKind) { +#define ROOT_DESCRIPTOR_FLAG_ENUM(NAME, LIT) \ + case TokenKind::en_##NAME: \ +Flags = \ +maybeOrFlag(Flags, RootDescriptorFlags::NAME); \ +break; +#include "clang/Lex/HLSLRootSignatureTokenKinds.def" + default: +llvm_unreachable("Switch for consumed enum token was not provided"); + } +} + } while (tryConsumeExpectedTo