[llvm-branch-commits] [llvm] Bundle operands to specify denormal modes (PR #136501)
https://github.com/arsenm edited https://github.com/llvm/llvm-project/pull/136501 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] Bundle operands to specify denormal modes (PR #136501)
@@ -678,6 +682,71 @@ fp::ExceptionBehavior CallBase::getExceptionBehavior()
const {
return fp::ebIgnore;
}
+DenormalMode::DenormalModeKind CallBase::getInputDenormMode() const {
+ if (auto InDenormBundle = getOperandBundle(LLVMContext::OB_fp_control)) {
+auto DenormOperand =
+getBundleOperandByPrefix(*InDenormBundle, "denorm.in=");
+if (DenormOperand) {
+ if (auto Mode = parseDenormalKindFromOperandBundle(*DenormOperand))
+return *Mode;
+} else {
+ return DenormalMode::IEEE;
+}
+ }
+
+ if (!getParent())
+return DenormalMode::IEEE;
+ const Function *F = getFunction();
+ if (!F)
+return DenormalMode::IEEE;
+
+ Type *Ty = nullptr;
+ for (auto &A : args())
+if (auto *T = A.get()->getType(); T->isFPOrFPVectorTy()) {
+ Ty = T;
+ break;
+}
+ assert(Ty && "Some input argument must be of floating-point type");
arsenm wrote:
This probably can't be an assert
What happens if there are multiple input floating point type arguments, and
each one has a differently controllable denormal mode?
For example, AMDGPU has some instructions with mixed half and float inputs, but
those read from different FP mode controls (I haven't actually checked the
right input mode bits are respected in these cases).
I'd probably just stop trying to report the mode if there are multiple input
types
https://github.com/llvm/llvm-project/pull/136501
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[llvm-branch-commits] [llvm] Bundle operands to specify denormal modes (PR #136501)
https://github.com/arsenm commented: Ho https://github.com/llvm/llvm-project/pull/136501 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] Bundle operands to specify denormal modes (PR #136501)
@@ -678,6 +682,71 @@ fp::ExceptionBehavior CallBase::getExceptionBehavior()
const {
return fp::ebIgnore;
}
+DenormalMode::DenormalModeKind CallBase::getInputDenormMode() const {
+ if (auto InDenormBundle = getOperandBundle(LLVMContext::OB_fp_control)) {
+auto DenormOperand =
+getBundleOperandByPrefix(*InDenormBundle, "denorm.in=");
+if (DenormOperand) {
+ if (auto Mode = parseDenormalKindFromOperandBundle(*DenormOperand))
+return *Mode;
+} else {
+ return DenormalMode::IEEE;
+}
+ }
+
+ if (!getParent())
+return DenormalMode::IEEE;
+ const Function *F = getFunction();
+ if (!F)
+return DenormalMode::IEEE;
arsenm wrote:
I don't think this low level query should try to get creative and inspect the
calling context function. It should stick to just parsing the bundle
https://github.com/llvm/llvm-project/pull/136501
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[llvm-branch-commits] [llvm] [AMDGPU][NPM] Add isRequired to passes missing it (PR #134033)
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/134033
>From 1b93c63ac6160a9d98b8329184dd1bedc2f0c758 Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Wed, 2 Apr 2025 06:22:30 +
Subject: [PATCH] [AMDGPU][NPM] Add isRequired to passes missing it
---
llvm/lib/Target/AMDGPU/AMDGPU.h| 3 +++
llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h| 1 +
llvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.h | 1 +
llvm/lib/Target/AMDGPU/GCNNSAReassign.h| 1 +
llvm/lib/Target/AMDGPU/GCNPreRALongBranchReg.h | 1 +
llvm/lib/Target/AMDGPU/GCNRewritePartialRegUses.h | 1 +
llvm/lib/Target/AMDGPU/SIFixSGPRCopies.h | 1 +
llvm/lib/Target/AMDGPU/SIFixVGPRCopies.h | 1 +
llvm/lib/Target/AMDGPU/SILowerControlFlow.h| 1 +
llvm/lib/Target/AMDGPU/SILowerSGPRSpills.h | 1 +
llvm/lib/Target/AMDGPU/SILowerWWMCopies.h | 1 +
llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.h | 1 +
llvm/lib/Target/AMDGPU/SIWholeQuadMode.h | 1 +
13 files changed, 15 insertions(+)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPU.h b/llvm/lib/Target/AMDGPU/AMDGPU.h
index 4ff761ec19b3c..286f2074ef9ec 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPU.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPU.h
@@ -89,6 +89,7 @@ class SILowerI1CopiesPass : public
PassInfoMixin {
SILowerI1CopiesPass() = default;
PreservedAnalyses run(MachineFunction &MF,
MachineFunctionAnalysisManager &MFAM);
+ static bool isRequired() { return true; }
};
void initializeAMDGPUDAGToDAGISelLegacyPass(PassRegistry &);
@@ -353,6 +354,7 @@ class SIModeRegisterPass : public
PassInfoMixin {
public:
SIModeRegisterPass() {}
PreservedAnalyses run(MachineFunction &F, MachineFunctionAnalysisManager
&AM);
+ static bool isRequired() { return true; }
};
class SIMemoryLegalizerPass : public PassInfoMixin {
@@ -469,6 +471,7 @@ class SIAnnotateControlFlowPass
public:
SIAnnotateControlFlowPass(const AMDGPUTargetMachine &TM) : TM(TM) {}
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
+ static bool isRequired() { return true; }
};
void initializeSIAnnotateControlFlowLegacyPass(PassRegistry &);
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
index f3b9364fdb92b..db5a1c0ac71aa 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
@@ -287,6 +287,7 @@ class AMDGPUISelDAGToDAGPass : public SelectionDAGISelPass {
PreservedAnalyses run(MachineFunction &MF,
MachineFunctionAnalysisManager &MFAM);
+ static bool isRequired() { return true; }
};
class AMDGPUDAGToDAGISelLegacy : public SelectionDAGISelLegacy {
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.h
b/llvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.h
index 2fd98a2ee1a93..d6fb0e53e1169 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.h
@@ -29,6 +29,7 @@ class AMDGPUUnifyDivergentExitNodesPass
: public PassInfoMixin {
public:
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
+ static bool isRequired() { return true; }
};
} // end namespace llvm
diff --git a/llvm/lib/Target/AMDGPU/GCNNSAReassign.h
b/llvm/lib/Target/AMDGPU/GCNNSAReassign.h
index 97a72e7ddbb24..4f2abe0dd0086 100644
--- a/llvm/lib/Target/AMDGPU/GCNNSAReassign.h
+++ b/llvm/lib/Target/AMDGPU/GCNNSAReassign.h
@@ -16,6 +16,7 @@ class GCNNSAReassignPass : public
PassInfoMixin {
public:
PreservedAnalyses run(MachineFunction &MF,
MachineFunctionAnalysisManager &MFAM);
+ static bool isRequired() { return true; }
};
} // namespace llvm
diff --git a/llvm/lib/Target/AMDGPU/GCNPreRALongBranchReg.h
b/llvm/lib/Target/AMDGPU/GCNPreRALongBranchReg.h
index 4cd7dea83a061..4c4ac344cb206 100644
--- a/llvm/lib/Target/AMDGPU/GCNPreRALongBranchReg.h
+++ b/llvm/lib/Target/AMDGPU/GCNPreRALongBranchReg.h
@@ -17,6 +17,7 @@ class GCNPreRALongBranchRegPass
public:
PreservedAnalyses run(MachineFunction &MF,
MachineFunctionAnalysisManager &MFAM);
+ static bool isRequired() { return true; }
};
} // namespace llvm
diff --git a/llvm/lib/Target/AMDGPU/GCNRewritePartialRegUses.h
b/llvm/lib/Target/AMDGPU/GCNRewritePartialRegUses.h
index b2c3190b5c6ba..4e97128bdc2d5 100644
--- a/llvm/lib/Target/AMDGPU/GCNRewritePartialRegUses.h
+++ b/llvm/lib/Target/AMDGPU/GCNRewritePartialRegUses.h
@@ -17,6 +17,7 @@ class GCNRewritePartialRegUsesPass
public:
PreservedAnalyses run(MachineFunction &MF,
MachineFunctionAnalysisManager &MFAM);
+ static bool isRequired() { return true; }
};
} // namespace llvm
diff --git a/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.h
b/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.h
index d7551a45887b9..12b87d756e664 10064
[llvm-branch-commits] [llvm] [AMDGPU][NPM] Add isRequired to passes missing it (PR #134033)
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/134033
>From 1b93c63ac6160a9d98b8329184dd1bedc2f0c758 Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Wed, 2 Apr 2025 06:22:30 +
Subject: [PATCH] [AMDGPU][NPM] Add isRequired to passes missing it
---
llvm/lib/Target/AMDGPU/AMDGPU.h| 3 +++
llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h| 1 +
llvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.h | 1 +
llvm/lib/Target/AMDGPU/GCNNSAReassign.h| 1 +
llvm/lib/Target/AMDGPU/GCNPreRALongBranchReg.h | 1 +
llvm/lib/Target/AMDGPU/GCNRewritePartialRegUses.h | 1 +
llvm/lib/Target/AMDGPU/SIFixSGPRCopies.h | 1 +
llvm/lib/Target/AMDGPU/SIFixVGPRCopies.h | 1 +
llvm/lib/Target/AMDGPU/SILowerControlFlow.h| 1 +
llvm/lib/Target/AMDGPU/SILowerSGPRSpills.h | 1 +
llvm/lib/Target/AMDGPU/SILowerWWMCopies.h | 1 +
llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.h | 1 +
llvm/lib/Target/AMDGPU/SIWholeQuadMode.h | 1 +
13 files changed, 15 insertions(+)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPU.h b/llvm/lib/Target/AMDGPU/AMDGPU.h
index 4ff761ec19b3c..286f2074ef9ec 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPU.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPU.h
@@ -89,6 +89,7 @@ class SILowerI1CopiesPass : public
PassInfoMixin {
SILowerI1CopiesPass() = default;
PreservedAnalyses run(MachineFunction &MF,
MachineFunctionAnalysisManager &MFAM);
+ static bool isRequired() { return true; }
};
void initializeAMDGPUDAGToDAGISelLegacyPass(PassRegistry &);
@@ -353,6 +354,7 @@ class SIModeRegisterPass : public
PassInfoMixin {
public:
SIModeRegisterPass() {}
PreservedAnalyses run(MachineFunction &F, MachineFunctionAnalysisManager
&AM);
+ static bool isRequired() { return true; }
};
class SIMemoryLegalizerPass : public PassInfoMixin {
@@ -469,6 +471,7 @@ class SIAnnotateControlFlowPass
public:
SIAnnotateControlFlowPass(const AMDGPUTargetMachine &TM) : TM(TM) {}
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
+ static bool isRequired() { return true; }
};
void initializeSIAnnotateControlFlowLegacyPass(PassRegistry &);
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
index f3b9364fdb92b..db5a1c0ac71aa 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
@@ -287,6 +287,7 @@ class AMDGPUISelDAGToDAGPass : public SelectionDAGISelPass {
PreservedAnalyses run(MachineFunction &MF,
MachineFunctionAnalysisManager &MFAM);
+ static bool isRequired() { return true; }
};
class AMDGPUDAGToDAGISelLegacy : public SelectionDAGISelLegacy {
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.h
b/llvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.h
index 2fd98a2ee1a93..d6fb0e53e1169 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.h
@@ -29,6 +29,7 @@ class AMDGPUUnifyDivergentExitNodesPass
: public PassInfoMixin {
public:
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
+ static bool isRequired() { return true; }
};
} // end namespace llvm
diff --git a/llvm/lib/Target/AMDGPU/GCNNSAReassign.h
b/llvm/lib/Target/AMDGPU/GCNNSAReassign.h
index 97a72e7ddbb24..4f2abe0dd0086 100644
--- a/llvm/lib/Target/AMDGPU/GCNNSAReassign.h
+++ b/llvm/lib/Target/AMDGPU/GCNNSAReassign.h
@@ -16,6 +16,7 @@ class GCNNSAReassignPass : public
PassInfoMixin {
public:
PreservedAnalyses run(MachineFunction &MF,
MachineFunctionAnalysisManager &MFAM);
+ static bool isRequired() { return true; }
};
} // namespace llvm
diff --git a/llvm/lib/Target/AMDGPU/GCNPreRALongBranchReg.h
b/llvm/lib/Target/AMDGPU/GCNPreRALongBranchReg.h
index 4cd7dea83a061..4c4ac344cb206 100644
--- a/llvm/lib/Target/AMDGPU/GCNPreRALongBranchReg.h
+++ b/llvm/lib/Target/AMDGPU/GCNPreRALongBranchReg.h
@@ -17,6 +17,7 @@ class GCNPreRALongBranchRegPass
public:
PreservedAnalyses run(MachineFunction &MF,
MachineFunctionAnalysisManager &MFAM);
+ static bool isRequired() { return true; }
};
} // namespace llvm
diff --git a/llvm/lib/Target/AMDGPU/GCNRewritePartialRegUses.h
b/llvm/lib/Target/AMDGPU/GCNRewritePartialRegUses.h
index b2c3190b5c6ba..4e97128bdc2d5 100644
--- a/llvm/lib/Target/AMDGPU/GCNRewritePartialRegUses.h
+++ b/llvm/lib/Target/AMDGPU/GCNRewritePartialRegUses.h
@@ -17,6 +17,7 @@ class GCNRewritePartialRegUsesPass
public:
PreservedAnalyses run(MachineFunction &MF,
MachineFunctionAnalysisManager &MFAM);
+ static bool isRequired() { return true; }
};
} // namespace llvm
diff --git a/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.h
b/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.h
index d7551a45887b9..12b87d756e664 10064
[llvm-branch-commits] [flang] f84b83e - Revert "[flang][cuda] Update stream type for cuf kernel op (#136627)"
Author: Valentin Clement (バレンタイン クレメン)
Date: 2025-04-21T19:37:09-07:00
New Revision: f84b83e552e411409870ed67d264f7bef6aebfb1
URL:
https://github.com/llvm/llvm-project/commit/f84b83e552e411409870ed67d264f7bef6aebfb1
DIFF:
https://github.com/llvm/llvm-project/commit/f84b83e552e411409870ed67d264f7bef6aebfb1.diff
LOG: Revert "[flang][cuda] Update stream type for cuf kernel op (#136627)"
This reverts commit 46e734746db7176f6e32b3c98beacf1e94fced37.
Added:
Modified:
flang/include/flang/Optimizer/Dialect/CUF/CUFOps.td
flang/lib/Lower/Bridge.cpp
flang/lib/Optimizer/Dialect/CUF/CUFOps.cpp
flang/test/Lower/CUDA/cuda-kernel-loop-directive.cuf
Removed:
diff --git a/flang/include/flang/Optimizer/Dialect/CUF/CUFOps.td
b/flang/include/flang/Optimizer/Dialect/CUF/CUFOps.td
index 46cc59cda1612..926983d364ed1 100644
--- a/flang/include/flang/Optimizer/Dialect/CUF/CUFOps.td
+++ b/flang/include/flang/Optimizer/Dialect/CUF/CUFOps.td
@@ -254,19 +254,24 @@ def cuf_KernelOp : cuf_Op<"kernel",
[AttrSizedOperandSegments,
represented by a 0 constant value.
}];
- let arguments = (ins Variadic:$grid, // empty means `*`
- Variadic:$block, // empty means `*`
- Optional:$stream, Variadic:$lowerbound,
- Variadic:$upperbound, Variadic:$step,
- OptionalAttr:$n, Variadic:$reduceOperands,
- OptionalAttr:$reduceAttrs);
+ let arguments = (ins
+Variadic:$grid, // empty means `*`
+Variadic:$block, // empty means `*`
+Optional:$stream,
+Variadic:$lowerbound,
+Variadic:$upperbound,
+Variadic:$step,
+OptionalAttr:$n,
+Variadic:$reduceOperands,
+OptionalAttr:$reduceAttrs
+ );
let regions = (region AnyRegion:$region);
let assemblyFormat = [{
`<` `<` `<` custom($grid, type($grid)) `,`
custom($block, type($block))
-( `,` `stream` `=` $stream^ `:` qualified(type($stream)))? `>` `>` `>`
+( `,` `stream` `=` $stream^ )? `>` `>` `>`
( `reduce` `(` $reduceOperands^ `:` type($reduceOperands) `:`
$reduceAttrs `)` )?
custom($region, $lowerbound, type($lowerbound),
$upperbound, type($upperbound), $step, type($step))
diff --git a/flang/lib/Lower/Bridge.cpp b/flang/lib/Lower/Bridge.cpp
index 7b76845b5af05..1652a86ed7e63 100644
--- a/flang/lib/Lower/Bridge.cpp
+++ b/flang/lib/Lower/Bridge.cpp
@@ -3097,7 +3097,7 @@ class FirConverter : public
Fortran::lower::AbstractConverter {
llvm::SmallVector gridValues;
llvm::SmallVector blockValues;
-mlir::Value streamAddr;
+mlir::Value streamValue;
if (launchConfig) {
const std::list &grid
=
@@ -3130,8 +3130,10 @@ class FirConverter : public
Fortran::lower::AbstractConverter {
}
if (stream)
-streamAddr = fir::getBase(
-genExprAddr(*Fortran::semantics::GetExpr(*stream), stmtCtx));
+streamValue = builder->createConvert(
+loc, builder->getI32Type(),
+fir::getBase(
+genExprValue(*Fortran::semantics::GetExpr(*stream), stmtCtx)));
}
const auto &outerDoConstruct =
@@ -3265,7 +3267,7 @@ class FirConverter : public
Fortran::lower::AbstractConverter {
}
auto op = builder->create(
-loc, gridValues, blockValues, streamAddr, lbs, ubs, steps, n,
+loc, gridValues, blockValues, streamValue, lbs, ubs, steps, n,
mlir::ValueRange(reduceOperands), builder->getArrayAttr(reduceAttrs));
builder->createBlock(&op.getRegion(), op.getRegion().end(), ivTypes,
ivLocs);
diff --git a/flang/lib/Optimizer/Dialect/CUF/CUFOps.cpp
b/flang/lib/Optimizer/Dialect/CUF/CUFOps.cpp
index 24033bc15b8eb..a86f12c2c4a55 100644
--- a/flang/lib/Optimizer/Dialect/CUF/CUFOps.cpp
+++ b/flang/lib/Optimizer/Dialect/CUF/CUFOps.cpp
@@ -271,7 +271,7 @@ llvm::LogicalResult cuf::KernelOp::verify() {
return emitOpError("expect reduce attributes to be ReduceAttr");
}
}
- return checkStreamType(*this);
+ return mlir::success();
}
//===--===//
diff --git a/flang/test/Lower/CUDA/cuda-kernel-loop-directive.cuf
b/flang/test/Lower/CUDA/cuda-kernel-loop-directive.cuf
index 10f0b9e3d1215..0fceb292f10d2 100644
--- a/flang/test/Lower/CUDA/cuda-kernel-loop-directive.cuf
+++ b/flang/test/Lower/CUDA/cuda-kernel-loop-directive.cuf
@@ -75,7 +75,9 @@ subroutine sub1()
end do
end
-! CHECK: cuf.kernel<<<*, *, stream = %[[STREAM]]#0 : !fir.ref>>>
+! CHECK: %[[STREAM_LOAD:.*]] = fir.load %[[STREAM]]#0 : !fir.ref
+! CHECK: %[[STREAM_I32:.*]] = fir.convert %[[STREAM_LOAD]] : (i64) -> i32
+! CHECK: cuf.kernel<<<*, *, stream = %[[STREAM_I32]]>>>
! Test lowering with unstructured construct inside.
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[llvm-branch-commits] [clang] [llvm] [clang] Redefine `noconvergent` and generate convergence control tokens (PR #136282)
https://github.com/ssahasra edited https://github.com/llvm/llvm-project/pull/136282 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [CIR] Let ConstantOp builder infer its type automatically (PR #136606)
xlauko wrote: ### Merge activity * **Apr 22, 2:26 AM EDT**: A user started a stack merge that includes this pull request via [Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/136606). https://github.com/llvm/llvm-project/pull/136606 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [CIR] Make UndefAttr use AttrBuilderWithInferredContext (PR #136605)
xlauko wrote: ### Merge activity * **Apr 22, 2:26 AM EDT**: A user started a stack merge that includes this pull request via [Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/136605). https://github.com/llvm/llvm-project/pull/136605 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [CIR] Make UndefAttr use AttrBuilderWithInferredContext (PR #136605)
https://github.com/xlauko updated
https://github.com/llvm/llvm-project/pull/136605
>From acad78ff14ab0cd18f8e65a279b0ad5fd13d0c89 Mon Sep 17 00:00:00 2001
From: xlauko
Date: Mon, 21 Apr 2025 22:03:35 +0200
Subject: [PATCH] [CIR] Make UndefAttr use AttrBuilderWithInferredContext
---
clang/include/clang/CIR/Dialect/IR/CIRAttrs.td | 7 +++
clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp | 4 ++--
2 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
b/clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
index 214db1b1caeeb..dfe15a10fa54e 100644
--- a/clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
+++ b/clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
@@ -93,6 +93,13 @@ def UndefAttr : CIR_Attr<"Undef", "undef",
[TypedAttrInterface]> {
}];
let parameters = (ins AttributeSelfTypeParameter<"">:$type);
+
+ let builders = [
+AttrBuilderWithInferredContext<(ins "mlir::Type":$type), [{
+ return $_get(type.getContext(), type);
+}]>
+ ];
+
let assemblyFormat = [{}];
}
diff --git a/clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
b/clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
index 9cd5c54e6c19e..fe8a5e7428a81 100644
--- a/clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
+++ b/clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
@@ -34,8 +34,8 @@ llvm::SmallVector
cir::AllocaOp::getPromotableSlots() {
Value cir::AllocaOp::getDefaultValue(const MemorySlot &slot,
OpBuilder &builder) {
- return builder.create(
- getLoc(), slot.elemType, builder.getAttr(slot.elemType));
+ return builder.create(getLoc(), slot.elemType,
+ cir::UndefAttr::get(slot.elemType));
}
void cir::AllocaOp::handleBlockArgument(const MemorySlot &slot,
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[llvm-branch-commits] [clang] [CIR] Let ConstantOp builder infer its type automatically (PR #136606)
https://github.com/xlauko updated
https://github.com/llvm/llvm-project/pull/136606
>From 045977803f6459a62ac15a873416730e9e962e77 Mon Sep 17 00:00:00 2001
From: xlauko
Date: Mon, 21 Apr 2025 22:23:40 +0200
Subject: [PATCH] [CIR] Let ConstantOp builder infer its type automatically
---
clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h | 4 ++--
clang/include/clang/CIR/Dialect/IR/CIROps.td | 9 -
clang/lib/CIR/CodeGen/CIRGenBuilder.h| 2 +-
clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp | 4 ++--
clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp | 2 +-
5 files changed, 6 insertions(+), 15 deletions(-)
diff --git a/clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
b/clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
index b303aa07838ee..0385b4f476c3b 100644
--- a/clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
+++ b/clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
@@ -61,11 +61,11 @@ class CIRBaseBuilderTy : public mlir::OpBuilder {
mlir::Value getConstAPInt(mlir::Location loc, mlir::Type typ,
const llvm::APInt &val) {
-return create(loc, typ, getAttr(typ, val));
+return create(loc, getAttr(typ, val));
}
cir::ConstantOp getConstant(mlir::Location loc, mlir::TypedAttr attr) {
-return create(loc, attr.getType(), attr);
+return create(loc, attr);
}
cir::ConstantOp getConstantInt(mlir::Location loc, mlir::Type ty,
diff --git a/clang/include/clang/CIR/Dialect/IR/CIROps.td
b/clang/include/clang/CIR/Dialect/IR/CIROps.td
index b526d077a910c..577cb8db41f57 100644
--- a/clang/include/clang/CIR/Dialect/IR/CIROps.td
+++ b/clang/include/clang/CIR/Dialect/IR/CIROps.td
@@ -288,18 +288,9 @@ def ConstantOp : CIR_Op<"const",
```
}];
- // The constant operation takes an attribute as the only input.
let arguments = (ins TypedAttrInterface:$value);
-
- // The constant operation returns a single value of CIR_AnyType.
let results = (outs CIR_AnyType:$res);
- let builders = [
-OpBuilder<(ins "cir::BoolAttr":$value), [{
- build($_builder, $_state, value.getType(), value);
-}]>
- ];
-
let assemblyFormat = "attr-dict $value";
let hasVerifier = 1;
diff --git a/clang/lib/CIR/CodeGen/CIRGenBuilder.h
b/clang/lib/CIR/CodeGen/CIRGenBuilder.h
index 4f7ff5128d914..7d9988cc52c5a 100644
--- a/clang/lib/CIR/CodeGen/CIRGenBuilder.h
+++ b/clang/lib/CIR/CodeGen/CIRGenBuilder.h
@@ -185,7 +185,7 @@ class CIRGenBuilderTy : public cir::CIRBaseBuilderTy {
// Creates constant nullptr for pointer type ty.
cir::ConstantOp getNullPtr(mlir::Type ty, mlir::Location loc) {
assert(!cir::MissingFeatures::targetCodeGenInfoGetNullPointer());
-return create(loc, ty, getConstPtrAttr(ty, 0));
+return create(loc, getConstPtrAttr(ty, 0));
}
mlir::Value createNeg(mlir::Value value) {
diff --git a/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
b/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
index f1561d1b26fc0..1e69ecae831e9 100644
--- a/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
+++ b/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
@@ -138,7 +138,7 @@ class ScalarExprEmitter : public
StmtVisitor {
mlir::Value VisitIntegerLiteral(const IntegerLiteral *e) {
mlir::Type type = cgf.convertType(e->getType());
return builder.create(
-cgf.getLoc(e->getExprLoc()), type,
+cgf.getLoc(e->getExprLoc()),
builder.getAttr(type, e->getValue()));
}
@@ -147,7 +147,7 @@ class ScalarExprEmitter : public
StmtVisitor {
assert(mlir::isa(type) &&
"expect floating-point type");
return builder.create(
-cgf.getLoc(e->getExprLoc()), type,
+cgf.getLoc(e->getExprLoc()),
builder.getAttr(type, e->getValue()));
}
diff --git a/clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
b/clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
index fe8a5e7428a81..20b086ffdd850 100644
--- a/clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
+++ b/clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
@@ -34,7 +34,7 @@ llvm::SmallVector
cir::AllocaOp::getPromotableSlots() {
Value cir::AllocaOp::getDefaultValue(const MemorySlot &slot,
OpBuilder &builder) {
- return builder.create(getLoc(), slot.elemType,
+ return builder.create(getLoc(),
cir::UndefAttr::get(slot.elemType));
}
___
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[llvm-branch-commits] [clang] [CIR] Let ConstantOp builder infer its type automatically (PR #136606)
https://github.com/xlauko updated
https://github.com/llvm/llvm-project/pull/136606
>From 045977803f6459a62ac15a873416730e9e962e77 Mon Sep 17 00:00:00 2001
From: xlauko
Date: Mon, 21 Apr 2025 22:23:40 +0200
Subject: [PATCH] [CIR] Let ConstantOp builder infer its type automatically
---
clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h | 4 ++--
clang/include/clang/CIR/Dialect/IR/CIROps.td | 9 -
clang/lib/CIR/CodeGen/CIRGenBuilder.h| 2 +-
clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp | 4 ++--
clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp | 2 +-
5 files changed, 6 insertions(+), 15 deletions(-)
diff --git a/clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
b/clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
index b303aa07838ee..0385b4f476c3b 100644
--- a/clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
+++ b/clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
@@ -61,11 +61,11 @@ class CIRBaseBuilderTy : public mlir::OpBuilder {
mlir::Value getConstAPInt(mlir::Location loc, mlir::Type typ,
const llvm::APInt &val) {
-return create(loc, typ, getAttr(typ, val));
+return create(loc, getAttr(typ, val));
}
cir::ConstantOp getConstant(mlir::Location loc, mlir::TypedAttr attr) {
-return create(loc, attr.getType(), attr);
+return create(loc, attr);
}
cir::ConstantOp getConstantInt(mlir::Location loc, mlir::Type ty,
diff --git a/clang/include/clang/CIR/Dialect/IR/CIROps.td
b/clang/include/clang/CIR/Dialect/IR/CIROps.td
index b526d077a910c..577cb8db41f57 100644
--- a/clang/include/clang/CIR/Dialect/IR/CIROps.td
+++ b/clang/include/clang/CIR/Dialect/IR/CIROps.td
@@ -288,18 +288,9 @@ def ConstantOp : CIR_Op<"const",
```
}];
- // The constant operation takes an attribute as the only input.
let arguments = (ins TypedAttrInterface:$value);
-
- // The constant operation returns a single value of CIR_AnyType.
let results = (outs CIR_AnyType:$res);
- let builders = [
-OpBuilder<(ins "cir::BoolAttr":$value), [{
- build($_builder, $_state, value.getType(), value);
-}]>
- ];
-
let assemblyFormat = "attr-dict $value";
let hasVerifier = 1;
diff --git a/clang/lib/CIR/CodeGen/CIRGenBuilder.h
b/clang/lib/CIR/CodeGen/CIRGenBuilder.h
index 4f7ff5128d914..7d9988cc52c5a 100644
--- a/clang/lib/CIR/CodeGen/CIRGenBuilder.h
+++ b/clang/lib/CIR/CodeGen/CIRGenBuilder.h
@@ -185,7 +185,7 @@ class CIRGenBuilderTy : public cir::CIRBaseBuilderTy {
// Creates constant nullptr for pointer type ty.
cir::ConstantOp getNullPtr(mlir::Type ty, mlir::Location loc) {
assert(!cir::MissingFeatures::targetCodeGenInfoGetNullPointer());
-return create(loc, ty, getConstPtrAttr(ty, 0));
+return create(loc, getConstPtrAttr(ty, 0));
}
mlir::Value createNeg(mlir::Value value) {
diff --git a/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
b/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
index f1561d1b26fc0..1e69ecae831e9 100644
--- a/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
+++ b/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
@@ -138,7 +138,7 @@ class ScalarExprEmitter : public
StmtVisitor {
mlir::Value VisitIntegerLiteral(const IntegerLiteral *e) {
mlir::Type type = cgf.convertType(e->getType());
return builder.create(
-cgf.getLoc(e->getExprLoc()), type,
+cgf.getLoc(e->getExprLoc()),
builder.getAttr(type, e->getValue()));
}
@@ -147,7 +147,7 @@ class ScalarExprEmitter : public
StmtVisitor {
assert(mlir::isa(type) &&
"expect floating-point type");
return builder.create(
-cgf.getLoc(e->getExprLoc()), type,
+cgf.getLoc(e->getExprLoc()),
builder.getAttr(type, e->getValue()));
}
diff --git a/clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
b/clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
index fe8a5e7428a81..20b086ffdd850 100644
--- a/clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
+++ b/clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
@@ -34,7 +34,7 @@ llvm::SmallVector
cir::AllocaOp::getPromotableSlots() {
Value cir::AllocaOp::getDefaultValue(const MemorySlot &slot,
OpBuilder &builder) {
- return builder.create(getLoc(), slot.elemType,
+ return builder.create(getLoc(),
cir::UndefAttr::get(slot.elemType));
}
___
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[llvm-branch-commits] [clang] [CIR] Make UndefAttr use AttrBuilderWithInferredContext (PR #136605)
https://github.com/xlauko updated
https://github.com/llvm/llvm-project/pull/136605
>From acad78ff14ab0cd18f8e65a279b0ad5fd13d0c89 Mon Sep 17 00:00:00 2001
From: xlauko
Date: Mon, 21 Apr 2025 22:03:35 +0200
Subject: [PATCH] [CIR] Make UndefAttr use AttrBuilderWithInferredContext
---
clang/include/clang/CIR/Dialect/IR/CIRAttrs.td | 7 +++
clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp | 4 ++--
2 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
b/clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
index 214db1b1caeeb..dfe15a10fa54e 100644
--- a/clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
+++ b/clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
@@ -93,6 +93,13 @@ def UndefAttr : CIR_Attr<"Undef", "undef",
[TypedAttrInterface]> {
}];
let parameters = (ins AttributeSelfTypeParameter<"">:$type);
+
+ let builders = [
+AttrBuilderWithInferredContext<(ins "mlir::Type":$type), [{
+ return $_get(type.getContext(), type);
+}]>
+ ];
+
let assemblyFormat = [{}];
}
diff --git a/clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
b/clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
index 9cd5c54e6c19e..fe8a5e7428a81 100644
--- a/clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
+++ b/clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
@@ -34,8 +34,8 @@ llvm::SmallVector
cir::AllocaOp::getPromotableSlots() {
Value cir::AllocaOp::getDefaultValue(const MemorySlot &slot,
OpBuilder &builder) {
- return builder.create(
- getLoc(), slot.elemType, builder.getAttr(slot.elemType));
+ return builder.create(getLoc(), slot.elemType,
+ cir::UndefAttr::get(slot.elemType));
}
void cir::AllocaOp::handleBlockArgument(const MemorySlot &slot,
___
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[llvm-branch-commits] [clang] [llvm] [clang] Redefine `noconvergent` and generate convergence control tokens (PR #136282)
https://github.com/ssahasra edited https://github.com/llvm/llvm-project/pull/136282 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [AMDGPU][NPM] Add isRequired to passes missing it (PR #134033)
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/134033
>From 50a8ebc18a464a5004f00331d44781fde2cb3296 Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Wed, 2 Apr 2025 06:22:30 +
Subject: [PATCH] [AMDGPU][NPM] Add isRequired to passes missing it
---
llvm/lib/Target/AMDGPU/AMDGPU.h| 3 +++
llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h| 1 +
llvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.h | 1 +
llvm/lib/Target/AMDGPU/GCNNSAReassign.h| 1 +
llvm/lib/Target/AMDGPU/GCNPreRALongBranchReg.h | 1 +
llvm/lib/Target/AMDGPU/GCNRewritePartialRegUses.h | 1 +
llvm/lib/Target/AMDGPU/SIFixSGPRCopies.h | 1 +
llvm/lib/Target/AMDGPU/SIFixVGPRCopies.h | 1 +
llvm/lib/Target/AMDGPU/SILowerControlFlow.h| 1 +
llvm/lib/Target/AMDGPU/SILowerSGPRSpills.h | 1 +
llvm/lib/Target/AMDGPU/SILowerWWMCopies.h | 1 +
llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.h | 1 +
llvm/lib/Target/AMDGPU/SIWholeQuadMode.h | 1 +
13 files changed, 15 insertions(+)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPU.h b/llvm/lib/Target/AMDGPU/AMDGPU.h
index 4ff761ec19b3c..286f2074ef9ec 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPU.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPU.h
@@ -89,6 +89,7 @@ class SILowerI1CopiesPass : public
PassInfoMixin {
SILowerI1CopiesPass() = default;
PreservedAnalyses run(MachineFunction &MF,
MachineFunctionAnalysisManager &MFAM);
+ static bool isRequired() { return true; }
};
void initializeAMDGPUDAGToDAGISelLegacyPass(PassRegistry &);
@@ -353,6 +354,7 @@ class SIModeRegisterPass : public
PassInfoMixin {
public:
SIModeRegisterPass() {}
PreservedAnalyses run(MachineFunction &F, MachineFunctionAnalysisManager
&AM);
+ static bool isRequired() { return true; }
};
class SIMemoryLegalizerPass : public PassInfoMixin {
@@ -469,6 +471,7 @@ class SIAnnotateControlFlowPass
public:
SIAnnotateControlFlowPass(const AMDGPUTargetMachine &TM) : TM(TM) {}
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
+ static bool isRequired() { return true; }
};
void initializeSIAnnotateControlFlowLegacyPass(PassRegistry &);
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
index f3b9364fdb92b..db5a1c0ac71aa 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
@@ -287,6 +287,7 @@ class AMDGPUISelDAGToDAGPass : public SelectionDAGISelPass {
PreservedAnalyses run(MachineFunction &MF,
MachineFunctionAnalysisManager &MFAM);
+ static bool isRequired() { return true; }
};
class AMDGPUDAGToDAGISelLegacy : public SelectionDAGISelLegacy {
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.h
b/llvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.h
index 2fd98a2ee1a93..d6fb0e53e1169 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.h
@@ -29,6 +29,7 @@ class AMDGPUUnifyDivergentExitNodesPass
: public PassInfoMixin {
public:
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
+ static bool isRequired() { return true; }
};
} // end namespace llvm
diff --git a/llvm/lib/Target/AMDGPU/GCNNSAReassign.h
b/llvm/lib/Target/AMDGPU/GCNNSAReassign.h
index 97a72e7ddbb24..4f2abe0dd0086 100644
--- a/llvm/lib/Target/AMDGPU/GCNNSAReassign.h
+++ b/llvm/lib/Target/AMDGPU/GCNNSAReassign.h
@@ -16,6 +16,7 @@ class GCNNSAReassignPass : public
PassInfoMixin {
public:
PreservedAnalyses run(MachineFunction &MF,
MachineFunctionAnalysisManager &MFAM);
+ static bool isRequired() { return true; }
};
} // namespace llvm
diff --git a/llvm/lib/Target/AMDGPU/GCNPreRALongBranchReg.h
b/llvm/lib/Target/AMDGPU/GCNPreRALongBranchReg.h
index 4cd7dea83a061..4c4ac344cb206 100644
--- a/llvm/lib/Target/AMDGPU/GCNPreRALongBranchReg.h
+++ b/llvm/lib/Target/AMDGPU/GCNPreRALongBranchReg.h
@@ -17,6 +17,7 @@ class GCNPreRALongBranchRegPass
public:
PreservedAnalyses run(MachineFunction &MF,
MachineFunctionAnalysisManager &MFAM);
+ static bool isRequired() { return true; }
};
} // namespace llvm
diff --git a/llvm/lib/Target/AMDGPU/GCNRewritePartialRegUses.h
b/llvm/lib/Target/AMDGPU/GCNRewritePartialRegUses.h
index b2c3190b5c6ba..4e97128bdc2d5 100644
--- a/llvm/lib/Target/AMDGPU/GCNRewritePartialRegUses.h
+++ b/llvm/lib/Target/AMDGPU/GCNRewritePartialRegUses.h
@@ -17,6 +17,7 @@ class GCNRewritePartialRegUsesPass
public:
PreservedAnalyses run(MachineFunction &MF,
MachineFunctionAnalysisManager &MFAM);
+ static bool isRequired() { return true; }
};
} // namespace llvm
diff --git a/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.h
b/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.h
index d7551a45887b9..12b87d756e664 10064
[llvm-branch-commits] [llvm] [AMDGPU][NPM] Add isRequired to passes missing it (PR #134033)
https://github.com/optimisan updated
https://github.com/llvm/llvm-project/pull/134033
>From 50a8ebc18a464a5004f00331d44781fde2cb3296 Mon Sep 17 00:00:00 2001
From: Akshat Oke
Date: Wed, 2 Apr 2025 06:22:30 +
Subject: [PATCH] [AMDGPU][NPM] Add isRequired to passes missing it
---
llvm/lib/Target/AMDGPU/AMDGPU.h| 3 +++
llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h| 1 +
llvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.h | 1 +
llvm/lib/Target/AMDGPU/GCNNSAReassign.h| 1 +
llvm/lib/Target/AMDGPU/GCNPreRALongBranchReg.h | 1 +
llvm/lib/Target/AMDGPU/GCNRewritePartialRegUses.h | 1 +
llvm/lib/Target/AMDGPU/SIFixSGPRCopies.h | 1 +
llvm/lib/Target/AMDGPU/SIFixVGPRCopies.h | 1 +
llvm/lib/Target/AMDGPU/SILowerControlFlow.h| 1 +
llvm/lib/Target/AMDGPU/SILowerSGPRSpills.h | 1 +
llvm/lib/Target/AMDGPU/SILowerWWMCopies.h | 1 +
llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.h | 1 +
llvm/lib/Target/AMDGPU/SIWholeQuadMode.h | 1 +
13 files changed, 15 insertions(+)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPU.h b/llvm/lib/Target/AMDGPU/AMDGPU.h
index 4ff761ec19b3c..286f2074ef9ec 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPU.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPU.h
@@ -89,6 +89,7 @@ class SILowerI1CopiesPass : public
PassInfoMixin {
SILowerI1CopiesPass() = default;
PreservedAnalyses run(MachineFunction &MF,
MachineFunctionAnalysisManager &MFAM);
+ static bool isRequired() { return true; }
};
void initializeAMDGPUDAGToDAGISelLegacyPass(PassRegistry &);
@@ -353,6 +354,7 @@ class SIModeRegisterPass : public
PassInfoMixin {
public:
SIModeRegisterPass() {}
PreservedAnalyses run(MachineFunction &F, MachineFunctionAnalysisManager
&AM);
+ static bool isRequired() { return true; }
};
class SIMemoryLegalizerPass : public PassInfoMixin {
@@ -469,6 +471,7 @@ class SIAnnotateControlFlowPass
public:
SIAnnotateControlFlowPass(const AMDGPUTargetMachine &TM) : TM(TM) {}
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
+ static bool isRequired() { return true; }
};
void initializeSIAnnotateControlFlowLegacyPass(PassRegistry &);
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
index f3b9364fdb92b..db5a1c0ac71aa 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
@@ -287,6 +287,7 @@ class AMDGPUISelDAGToDAGPass : public SelectionDAGISelPass {
PreservedAnalyses run(MachineFunction &MF,
MachineFunctionAnalysisManager &MFAM);
+ static bool isRequired() { return true; }
};
class AMDGPUDAGToDAGISelLegacy : public SelectionDAGISelLegacy {
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.h
b/llvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.h
index 2fd98a2ee1a93..d6fb0e53e1169 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.h
@@ -29,6 +29,7 @@ class AMDGPUUnifyDivergentExitNodesPass
: public PassInfoMixin {
public:
PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
+ static bool isRequired() { return true; }
};
} // end namespace llvm
diff --git a/llvm/lib/Target/AMDGPU/GCNNSAReassign.h
b/llvm/lib/Target/AMDGPU/GCNNSAReassign.h
index 97a72e7ddbb24..4f2abe0dd0086 100644
--- a/llvm/lib/Target/AMDGPU/GCNNSAReassign.h
+++ b/llvm/lib/Target/AMDGPU/GCNNSAReassign.h
@@ -16,6 +16,7 @@ class GCNNSAReassignPass : public
PassInfoMixin {
public:
PreservedAnalyses run(MachineFunction &MF,
MachineFunctionAnalysisManager &MFAM);
+ static bool isRequired() { return true; }
};
} // namespace llvm
diff --git a/llvm/lib/Target/AMDGPU/GCNPreRALongBranchReg.h
b/llvm/lib/Target/AMDGPU/GCNPreRALongBranchReg.h
index 4cd7dea83a061..4c4ac344cb206 100644
--- a/llvm/lib/Target/AMDGPU/GCNPreRALongBranchReg.h
+++ b/llvm/lib/Target/AMDGPU/GCNPreRALongBranchReg.h
@@ -17,6 +17,7 @@ class GCNPreRALongBranchRegPass
public:
PreservedAnalyses run(MachineFunction &MF,
MachineFunctionAnalysisManager &MFAM);
+ static bool isRequired() { return true; }
};
} // namespace llvm
diff --git a/llvm/lib/Target/AMDGPU/GCNRewritePartialRegUses.h
b/llvm/lib/Target/AMDGPU/GCNRewritePartialRegUses.h
index b2c3190b5c6ba..4e97128bdc2d5 100644
--- a/llvm/lib/Target/AMDGPU/GCNRewritePartialRegUses.h
+++ b/llvm/lib/Target/AMDGPU/GCNRewritePartialRegUses.h
@@ -17,6 +17,7 @@ class GCNRewritePartialRegUsesPass
public:
PreservedAnalyses run(MachineFunction &MF,
MachineFunctionAnalysisManager &MFAM);
+ static bool isRequired() { return true; }
};
} // namespace llvm
diff --git a/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.h
b/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.h
index d7551a45887b9..12b87d756e664 10064
[llvm-branch-commits] [mlir] [mlir][Transforms] Dialect conversion: Add flag to disable rollback (PR #136490)
https://github.com/zero9178 approved this pull request. LGTM! https://github.com/llvm/llvm-project/pull/136490 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [mlir] [mlir][Transforms] Dialect conversion: Add flag to disable rollback (PR #136490)
https://github.com/zero9178 edited https://github.com/llvm/llvm-project/pull/136490 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [mlir] [mlir][Transforms] Dialect conversion: Add flag to disable rollback (PR #136490)
@@ -1216,10 +1220,19 @@ void
ConversionPatternRewriterImpl::resetState(RewriterState state) {
replacedOps.pop_back();
}
-void ConversionPatternRewriterImpl::undoRewrites(unsigned numRewritesToKeep) {
+void ConversionPatternRewriterImpl::undoRewrites(unsigned numRewritesToKeep,
+ StringRef patternName) {
for (auto &rewrite :
- llvm::reverse(llvm::drop_begin(rewrites, numRewritesToKeep)))
+ llvm::reverse(llvm::drop_begin(rewrites, numRewritesToKeep))) {
+if (!config.allowPatternRollback &&
+!isa(rewrite)) {
+ // Unresolved materializations can always be rolled back (erased).
+ std::string errorMessage = "pattern '" + std::string(patternName) +
+ "' rollback of IR modifications requested";
+ llvm_unreachable(errorMessage.c_str());
zero9178 wrote:
```suggestion
llvm::report_fatal_error("pattern '" + patternName +
"' rollback of IR modifications requested");
```
`llvm_unreachable` might not expand to `report_fatal_error`. I think it'd be
better to call it directly.
https://github.com/llvm/llvm-project/pull/136490
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[llvm-branch-commits] [SPARC] Use op-then-halve instructions when we have VIS3 (PR #135718)
@@ -3588,8 +3588,13 @@ bool SparcTargetLowering::useLoadStackGuardNode(const
Module &M) const {
bool SparcTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT,
bool ForCodeSize) const {
- return Subtarget->isVIS() && (VT == MVT::f32 || VT == MVT::f64) &&
- Imm.isZero();
+ if (VT != MVT::f32 && VT != MVT::f64)
+return false;
+ if (Imm.isZero())
+return Subtarget->isVIS();
+ if (Imm.isExactlyValue(+0.5) || Imm.isExactlyValue(-0.5))
+return Subtarget->isVIS3();
+ return false;
arsenm wrote:
Can you do this separately? I'd also expect to do the target check before the
value check
https://github.com/llvm/llvm-project/pull/135718
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[llvm-branch-commits] [clang] callee_type metadata for indirect calls (PR #117036)
@@ -2860,9 +2861,25 @@ static void setLinkageForGV(llvm::GlobalValue *GV, const
NamedDecl *ND) {
GV->setLinkage(llvm::GlobalValue::ExternalWeakLinkage);
}
+static bool HasExistingGeneralizedTypeMD(llvm::Function *F) {
+ llvm::MDNode *MD = F->getMetadata(llvm::LLVMContext::MD_type);
+ if (!MD || !isa(MD->getOperand(1)))
+return false;
arsenm wrote:
The type of the metadata should be verifier enforced and not require checking
here. However, in the context of clang I'm not sure why you need to read this
here
https://github.com/llvm/llvm-project/pull/117036
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[llvm-branch-commits] [clang] callee_type metadata for indirect calls (PR #117036)
@@ -6195,6 +6195,7 @@ RValue CodeGenFunction::EmitCall(QualType CalleeType, } if (CallOrInvoke) *CallOrInvoke = LocalCallOrInvoke; + arsenm wrote: Drop whitespace only change https://github.com/llvm/llvm-project/pull/117036 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] Backport to 20.x "[clang][analyzer] Fix error path of builtin overflow (#136345)" (PR #136589)
https://github.com/pskrgag created
https://github.com/llvm/llvm-project/pull/136589
According to
https://clang.llvm.org/docs/LanguageExtensions.html#checked-arithmetic-builtins,
result of builtin_*_overflow functions will be initialized even in case of
overflow. Align analyzer logic to docs and always initialize 3rd argument of
such builtins.
Closes #136292
>From 0b457d93ca69598b6245c1ce2086ae117134dede Mon Sep 17 00:00:00 2001
From: Pavel Skripkin
Date: Sun, 20 Apr 2025 10:14:41 -0400
Subject: [PATCH] [clang][analyzer] Fix error path of builtin overflow
(#136345)
According to
https://clang.llvm.org/docs/LanguageExtensions.html#checked-arithmetic-builtins,
result of builtin_*_overflow functions will be initialized even in case
of overflow. Align analyzer logic to docs and always initialize 3rd
argument of such builtins.
Closes #136292
---
.../Checkers/BuiltinFunctionChecker.cpp | 86 +++
clang/test/Analysis/builtin_overflow.c| 6 +-
clang/test/Analysis/builtin_overflow_notes.c | 10 ++-
3 files changed, 58 insertions(+), 44 deletions(-)
diff --git a/clang/lib/StaticAnalyzer/Checkers/BuiltinFunctionChecker.cpp
b/clang/lib/StaticAnalyzer/Checkers/BuiltinFunctionChecker.cpp
index cfdd3c9faa360..bcc4ca77f5887 100644
--- a/clang/lib/StaticAnalyzer/Checkers/BuiltinFunctionChecker.cpp
+++ b/clang/lib/StaticAnalyzer/Checkers/BuiltinFunctionChecker.cpp
@@ -97,10 +97,14 @@ class BuiltinFunctionChecker : public Checker {
void handleOverflowBuiltin(const CallEvent &Call, CheckerContext &C,
BinaryOperator::Opcode Op,
QualType ResultType) const;
- const NoteTag *createBuiltinNoOverflowNoteTag(CheckerContext &C,
-bool BothFeasible, SVal Arg1,
-SVal Arg2, SVal Result) const;
- const NoteTag *createBuiltinOverflowNoteTag(CheckerContext &C) const;
+ const NoteTag *createBuiltinOverflowNoteTag(CheckerContext &C,
+ bool BothFeasible, SVal Arg1,
+ SVal Arg2, SVal Result) const;
+ ProgramStateRef initStateAftetBuiltinOverflow(CheckerContext &C,
+ProgramStateRef State,
+const CallEvent &Call,
+SVal RetCal,
+bool IsOverflow) const;
std::pair checkOverflow(CheckerContext &C, SVal RetVal,
QualType Res) const;
@@ -122,30 +126,24 @@ class BuiltinFunctionChecker : public Checker
{
} // namespace
-const NoteTag *BuiltinFunctionChecker::createBuiltinNoOverflowNoteTag(
-CheckerContext &C, bool BothFeasible, SVal Arg1, SVal Arg2,
-SVal Result) const {
- return C.getNoteTag([Result, Arg1, Arg2, BothFeasible](
- PathSensitiveBugReport &BR, llvm::raw_ostream &OS) {
+const NoteTag *BuiltinFunctionChecker::createBuiltinOverflowNoteTag(
+CheckerContext &C, bool overflow, SVal Arg1, SVal Arg2, SVal Result) const
{
+ return C.getNoteTag([Result, Arg1, Arg2, overflow](PathSensitiveBugReport
&BR,
+ llvm::raw_ostream &OS) {
if (!BR.isInteresting(Result))
return;
-// Propagate interestingness to input argumets if result is interesting.
+// Propagate interestingness to input arguments if result is interesting.
BR.markInteresting(Arg1);
BR.markInteresting(Arg2);
-if (BothFeasible)
+if (overflow)
+ OS << "Assuming overflow";
+else
OS << "Assuming no overflow";
});
}
-const NoteTag *
-BuiltinFunctionChecker::createBuiltinOverflowNoteTag(CheckerContext &C) const {
- return C.getNoteTag([](PathSensitiveBugReport &BR,
- llvm::raw_ostream &OS) { OS << "Assuming overflow"; },
- /*isPrunable=*/true);
-}
-
std::pair
BuiltinFunctionChecker::checkOverflow(CheckerContext &C, SVal RetVal,
QualType Res) const {
@@ -175,6 +173,29 @@ BuiltinFunctionChecker::checkOverflow(CheckerContext &C,
SVal RetVal,
return {MayOverflow || MayUnderflow, MayNotOverflow && MayNotUnderflow};
}
+ProgramStateRef BuiltinFunctionChecker::initStateAftetBuiltinOverflow(
+CheckerContext &C, ProgramStateRef State, const CallEvent &Call,
+SVal RetVal, bool IsOverflow) const {
+ SValBuilder &SVB = C.getSValBuilder();
+ SVal Arg1 = Call.getArgSVal(0);
+ SVal Arg2 = Call.getArgSVal(1);
+ auto BoolTy = C.getASTContext().BoolTy;
+
+ ProgramStateRef NewState =
+ State->BindExpr(Call.getOriginExpr(), C.getLocationContext(),
+ SVB.makeTruthVal(IsOverflow, BoolTy));
+
+ if (auto L = Call.getArgSVal(2).getAs()) {
+NewState = NewState->bindLoc(*L, RetVal, C.getLocationContext());
+
+
[llvm-branch-commits] [clang] Backport to 20.x "[clang][analyzer] Fix error path of builtin overflow (#136345)" (PR #136589)
llvmbot wrote:
@llvm/pr-subscribers-clang-static-analyzer-1
Author: Pavel Skripkin (pskrgag)
Changes
According to
https://clang.llvm.org/docs/LanguageExtensions.html#checked-arithmetic-builtins,
result of builtin_*_overflow functions will be initialized even in case of
overflow. Align analyzer logic to docs and always initialize 3rd argument of
such builtins.
Closes #136292
---
Full diff: https://github.com/llvm/llvm-project/pull/136589.diff
3 Files Affected:
- (modified) clang/lib/StaticAnalyzer/Checkers/BuiltinFunctionChecker.cpp
(+48-38)
- (modified) clang/test/Analysis/builtin_overflow.c (+3-3)
- (modified) clang/test/Analysis/builtin_overflow_notes.c (+7-3)
``diff
diff --git a/clang/lib/StaticAnalyzer/Checkers/BuiltinFunctionChecker.cpp
b/clang/lib/StaticAnalyzer/Checkers/BuiltinFunctionChecker.cpp
index cfdd3c9faa360..bcc4ca77f5887 100644
--- a/clang/lib/StaticAnalyzer/Checkers/BuiltinFunctionChecker.cpp
+++ b/clang/lib/StaticAnalyzer/Checkers/BuiltinFunctionChecker.cpp
@@ -97,10 +97,14 @@ class BuiltinFunctionChecker : public Checker {
void handleOverflowBuiltin(const CallEvent &Call, CheckerContext &C,
BinaryOperator::Opcode Op,
QualType ResultType) const;
- const NoteTag *createBuiltinNoOverflowNoteTag(CheckerContext &C,
-bool BothFeasible, SVal Arg1,
-SVal Arg2, SVal Result) const;
- const NoteTag *createBuiltinOverflowNoteTag(CheckerContext &C) const;
+ const NoteTag *createBuiltinOverflowNoteTag(CheckerContext &C,
+ bool BothFeasible, SVal Arg1,
+ SVal Arg2, SVal Result) const;
+ ProgramStateRef initStateAftetBuiltinOverflow(CheckerContext &C,
+ProgramStateRef State,
+const CallEvent &Call,
+SVal RetCal,
+bool IsOverflow) const;
std::pair checkOverflow(CheckerContext &C, SVal RetVal,
QualType Res) const;
@@ -122,30 +126,24 @@ class BuiltinFunctionChecker : public Checker
{
} // namespace
-const NoteTag *BuiltinFunctionChecker::createBuiltinNoOverflowNoteTag(
-CheckerContext &C, bool BothFeasible, SVal Arg1, SVal Arg2,
-SVal Result) const {
- return C.getNoteTag([Result, Arg1, Arg2, BothFeasible](
- PathSensitiveBugReport &BR, llvm::raw_ostream &OS) {
+const NoteTag *BuiltinFunctionChecker::createBuiltinOverflowNoteTag(
+CheckerContext &C, bool overflow, SVal Arg1, SVal Arg2, SVal Result) const
{
+ return C.getNoteTag([Result, Arg1, Arg2, overflow](PathSensitiveBugReport
&BR,
+ llvm::raw_ostream &OS) {
if (!BR.isInteresting(Result))
return;
-// Propagate interestingness to input argumets if result is interesting.
+// Propagate interestingness to input arguments if result is interesting.
BR.markInteresting(Arg1);
BR.markInteresting(Arg2);
-if (BothFeasible)
+if (overflow)
+ OS << "Assuming overflow";
+else
OS << "Assuming no overflow";
});
}
-const NoteTag *
-BuiltinFunctionChecker::createBuiltinOverflowNoteTag(CheckerContext &C) const {
- return C.getNoteTag([](PathSensitiveBugReport &BR,
- llvm::raw_ostream &OS) { OS << "Assuming overflow"; },
- /*isPrunable=*/true);
-}
-
std::pair
BuiltinFunctionChecker::checkOverflow(CheckerContext &C, SVal RetVal,
QualType Res) const {
@@ -175,6 +173,29 @@ BuiltinFunctionChecker::checkOverflow(CheckerContext &C,
SVal RetVal,
return {MayOverflow || MayUnderflow, MayNotOverflow && MayNotUnderflow};
}
+ProgramStateRef BuiltinFunctionChecker::initStateAftetBuiltinOverflow(
+CheckerContext &C, ProgramStateRef State, const CallEvent &Call,
+SVal RetVal, bool IsOverflow) const {
+ SValBuilder &SVB = C.getSValBuilder();
+ SVal Arg1 = Call.getArgSVal(0);
+ SVal Arg2 = Call.getArgSVal(1);
+ auto BoolTy = C.getASTContext().BoolTy;
+
+ ProgramStateRef NewState =
+ State->BindExpr(Call.getOriginExpr(), C.getLocationContext(),
+ SVB.makeTruthVal(IsOverflow, BoolTy));
+
+ if (auto L = Call.getArgSVal(2).getAs()) {
+NewState = NewState->bindLoc(*L, RetVal, C.getLocationContext());
+
+// Propagate taint if any of the arguments were tainted
+if (isTainted(State, Arg1) || isTainted(State, Arg2))
+ NewState = addTaint(NewState, *L);
+ }
+
+ return NewState;
+}
+
void BuiltinFunctionChecker::handleOverflowBuiltin(const CallEvent &Call,
CheckerContext &C,
[llvm-branch-commits] [clang] Backport to 20.x "[clang][analyzer] Fix error path of builtin overflow (#136345)" (PR #136589)
pskrgag wrote: Hm, I guess I've done smth wrong, since merge button is not available? Sorry, I am doing llvm backports for the first time https://github.com/llvm/llvm-project/pull/136589 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [CIR] Let ConstantOp builder infer its type automatically (PR #136606)
https://github.com/xlauko edited https://github.com/llvm/llvm-project/pull/136606 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [CIR] Let ConstantOp builder infer its type automatically (PR #136606)
https://github.com/xlauko ready_for_review https://github.com/llvm/llvm-project/pull/136606 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [CIR] Make UndefAttr use AttrBuilderWithInferredContext (PR #136605)
https://github.com/xlauko edited https://github.com/llvm/llvm-project/pull/136605 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [CIR] Make UndefAttr use AttrBuilderWithInferredContext (PR #136605)
https://github.com/xlauko ready_for_review https://github.com/llvm/llvm-project/pull/136605 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [CIR] Make UndefAttr use AttrBuilderWithInferredContext (PR #136605)
llvmbot wrote:
@llvm/pr-subscribers-clangir
Author: Henrich Lauko (xlauko)
Changes
This mirrors incubator changes from https://github.com/llvm/clangir/pull/1577
---
Full diff: https://github.com/llvm/llvm-project/pull/136605.diff
2 Files Affected:
- (modified) clang/include/clang/CIR/Dialect/IR/CIRAttrs.td (+7)
- (modified) clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp (+2-2)
``diff
diff --git a/clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
b/clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
index 214db1b1caeeb..dfe15a10fa54e 100644
--- a/clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
+++ b/clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
@@ -93,6 +93,13 @@ def UndefAttr : CIR_Attr<"Undef", "undef",
[TypedAttrInterface]> {
}];
let parameters = (ins AttributeSelfTypeParameter<"">:$type);
+
+ let builders = [
+AttrBuilderWithInferredContext<(ins "mlir::Type":$type), [{
+ return $_get(type.getContext(), type);
+}]>
+ ];
+
let assemblyFormat = [{}];
}
diff --git a/clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
b/clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
index 9cd5c54e6c19e..fe8a5e7428a81 100644
--- a/clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
+++ b/clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
@@ -34,8 +34,8 @@ llvm::SmallVector
cir::AllocaOp::getPromotableSlots() {
Value cir::AllocaOp::getDefaultValue(const MemorySlot &slot,
OpBuilder &builder) {
- return builder.create(
- getLoc(), slot.elemType, builder.getAttr(slot.elemType));
+ return builder.create(getLoc(), slot.elemType,
+ cir::UndefAttr::get(slot.elemType));
}
void cir::AllocaOp::handleBlockArgument(const MemorySlot &slot,
``
https://github.com/llvm/llvm-project/pull/136605
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[llvm-branch-commits] [clang] [CIR] Make UndefAttr use AttrBuilderWithInferredContext (PR #136605)
llvmbot wrote:
@llvm/pr-subscribers-clang
Author: Henrich Lauko (xlauko)
Changes
This mirrors incubator changes from https://github.com/llvm/clangir/pull/1577
---
Full diff: https://github.com/llvm/llvm-project/pull/136605.diff
2 Files Affected:
- (modified) clang/include/clang/CIR/Dialect/IR/CIRAttrs.td (+7)
- (modified) clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp (+2-2)
``diff
diff --git a/clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
b/clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
index 214db1b1caeeb..dfe15a10fa54e 100644
--- a/clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
+++ b/clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
@@ -93,6 +93,13 @@ def UndefAttr : CIR_Attr<"Undef", "undef",
[TypedAttrInterface]> {
}];
let parameters = (ins AttributeSelfTypeParameter<"">:$type);
+
+ let builders = [
+AttrBuilderWithInferredContext<(ins "mlir::Type":$type), [{
+ return $_get(type.getContext(), type);
+}]>
+ ];
+
let assemblyFormat = [{}];
}
diff --git a/clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
b/clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
index 9cd5c54e6c19e..fe8a5e7428a81 100644
--- a/clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
+++ b/clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
@@ -34,8 +34,8 @@ llvm::SmallVector
cir::AllocaOp::getPromotableSlots() {
Value cir::AllocaOp::getDefaultValue(const MemorySlot &slot,
OpBuilder &builder) {
- return builder.create(
- getLoc(), slot.elemType, builder.getAttr(slot.elemType));
+ return builder.create(getLoc(), slot.elemType,
+ cir::UndefAttr::get(slot.elemType));
}
void cir::AllocaOp::handleBlockArgument(const MemorySlot &slot,
``
https://github.com/llvm/llvm-project/pull/136605
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[llvm-branch-commits] [clang] [CIR] Let ConstantOp builder infer its type automatically (PR #136606)
llvmbot wrote:
@llvm/pr-subscribers-clangir
Author: Henrich Lauko (xlauko)
Changes
This mirrors incubator changes from https://github.com/llvm/clangir/pull/1578
---
Full diff: https://github.com/llvm/llvm-project/pull/136606.diff
5 Files Affected:
- (modified) clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h (+2-2)
- (modified) clang/include/clang/CIR/Dialect/IR/CIROps.td (-9)
- (modified) clang/lib/CIR/CodeGen/CIRGenBuilder.h (+1-1)
- (modified) clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp (+2-2)
- (modified) clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp (+1-1)
``diff
diff --git a/clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
b/clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
index b303aa07838ee..0385b4f476c3b 100644
--- a/clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
+++ b/clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
@@ -61,11 +61,11 @@ class CIRBaseBuilderTy : public mlir::OpBuilder {
mlir::Value getConstAPInt(mlir::Location loc, mlir::Type typ,
const llvm::APInt &val) {
-return create(loc, typ, getAttr(typ, val));
+return create(loc, getAttr(typ, val));
}
cir::ConstantOp getConstant(mlir::Location loc, mlir::TypedAttr attr) {
-return create(loc, attr.getType(), attr);
+return create(loc, attr);
}
cir::ConstantOp getConstantInt(mlir::Location loc, mlir::Type ty,
diff --git a/clang/include/clang/CIR/Dialect/IR/CIROps.td
b/clang/include/clang/CIR/Dialect/IR/CIROps.td
index b526d077a910c..577cb8db41f57 100644
--- a/clang/include/clang/CIR/Dialect/IR/CIROps.td
+++ b/clang/include/clang/CIR/Dialect/IR/CIROps.td
@@ -288,18 +288,9 @@ def ConstantOp : CIR_Op<"const",
```
}];
- // The constant operation takes an attribute as the only input.
let arguments = (ins TypedAttrInterface:$value);
-
- // The constant operation returns a single value of CIR_AnyType.
let results = (outs CIR_AnyType:$res);
- let builders = [
-OpBuilder<(ins "cir::BoolAttr":$value), [{
- build($_builder, $_state, value.getType(), value);
-}]>
- ];
-
let assemblyFormat = "attr-dict $value";
let hasVerifier = 1;
diff --git a/clang/lib/CIR/CodeGen/CIRGenBuilder.h
b/clang/lib/CIR/CodeGen/CIRGenBuilder.h
index 4f7ff5128d914..7d9988cc52c5a 100644
--- a/clang/lib/CIR/CodeGen/CIRGenBuilder.h
+++ b/clang/lib/CIR/CodeGen/CIRGenBuilder.h
@@ -185,7 +185,7 @@ class CIRGenBuilderTy : public cir::CIRBaseBuilderTy {
// Creates constant nullptr for pointer type ty.
cir::ConstantOp getNullPtr(mlir::Type ty, mlir::Location loc) {
assert(!cir::MissingFeatures::targetCodeGenInfoGetNullPointer());
-return create(loc, ty, getConstPtrAttr(ty, 0));
+return create(loc, getConstPtrAttr(ty, 0));
}
mlir::Value createNeg(mlir::Value value) {
diff --git a/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
b/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
index f1561d1b26fc0..1e69ecae831e9 100644
--- a/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
+++ b/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
@@ -138,7 +138,7 @@ class ScalarExprEmitter : public
StmtVisitor {
mlir::Value VisitIntegerLiteral(const IntegerLiteral *e) {
mlir::Type type = cgf.convertType(e->getType());
return builder.create(
-cgf.getLoc(e->getExprLoc()), type,
+cgf.getLoc(e->getExprLoc()),
builder.getAttr(type, e->getValue()));
}
@@ -147,7 +147,7 @@ class ScalarExprEmitter : public
StmtVisitor {
assert(mlir::isa(type) &&
"expect floating-point type");
return builder.create(
-cgf.getLoc(e->getExprLoc()), type,
+cgf.getLoc(e->getExprLoc()),
builder.getAttr(type, e->getValue()));
}
diff --git a/clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
b/clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
index fe8a5e7428a81..20b086ffdd850 100644
--- a/clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
+++ b/clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
@@ -34,7 +34,7 @@ llvm::SmallVector
cir::AllocaOp::getPromotableSlots() {
Value cir::AllocaOp::getDefaultValue(const MemorySlot &slot,
OpBuilder &builder) {
- return builder.create(getLoc(), slot.elemType,
+ return builder.create(getLoc(),
cir::UndefAttr::get(slot.elemType));
}
``
https://github.com/llvm/llvm-project/pull/136606
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[llvm-branch-commits] [clang] [CIR] Make UndefAttr use AttrBuilderWithInferredContext (PR #136605)
https://github.com/xlauko created
https://github.com/llvm/llvm-project/pull/136605
None
>From 40e72ddd5b2afc2fd83070822bb6aa1294e873fe Mon Sep 17 00:00:00 2001
From: xlauko
Date: Mon, 21 Apr 2025 22:03:35 +0200
Subject: [PATCH] [CIR] Make UndefAttr use AttrBuilderWithInferredContext
---
clang/include/clang/CIR/Dialect/IR/CIRAttrs.td | 7 +++
clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp | 4 ++--
2 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
b/clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
index 214db1b1caeeb..dfe15a10fa54e 100644
--- a/clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
+++ b/clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
@@ -93,6 +93,13 @@ def UndefAttr : CIR_Attr<"Undef", "undef",
[TypedAttrInterface]> {
}];
let parameters = (ins AttributeSelfTypeParameter<"">:$type);
+
+ let builders = [
+AttrBuilderWithInferredContext<(ins "mlir::Type":$type), [{
+ return $_get(type.getContext(), type);
+}]>
+ ];
+
let assemblyFormat = [{}];
}
diff --git a/clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
b/clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
index 9cd5c54e6c19e..fe8a5e7428a81 100644
--- a/clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
+++ b/clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
@@ -34,8 +34,8 @@ llvm::SmallVector
cir::AllocaOp::getPromotableSlots() {
Value cir::AllocaOp::getDefaultValue(const MemorySlot &slot,
OpBuilder &builder) {
- return builder.create(
- getLoc(), slot.elemType, builder.getAttr(slot.elemType));
+ return builder.create(getLoc(), slot.elemType,
+ cir::UndefAttr::get(slot.elemType));
}
void cir::AllocaOp::handleBlockArgument(const MemorySlot &slot,
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[llvm-branch-commits] [clang] [CIR] Let ConstantOp builder infer its type automatically (PR #136606)
https://github.com/xlauko created
https://github.com/llvm/llvm-project/pull/136606
None
>From 93d5397e3a90d05cb89c6c5fd622cfb01f425321 Mon Sep 17 00:00:00 2001
From: xlauko
Date: Mon, 21 Apr 2025 22:23:40 +0200
Subject: [PATCH] [CIR] Let ConstantOp builder infer its type automatically
---
clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h | 4 ++--
clang/include/clang/CIR/Dialect/IR/CIROps.td | 9 -
clang/lib/CIR/CodeGen/CIRGenBuilder.h| 2 +-
clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp | 4 ++--
clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp | 2 +-
5 files changed, 6 insertions(+), 15 deletions(-)
diff --git a/clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
b/clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
index b303aa07838ee..0385b4f476c3b 100644
--- a/clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
+++ b/clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
@@ -61,11 +61,11 @@ class CIRBaseBuilderTy : public mlir::OpBuilder {
mlir::Value getConstAPInt(mlir::Location loc, mlir::Type typ,
const llvm::APInt &val) {
-return create(loc, typ, getAttr(typ, val));
+return create(loc, getAttr(typ, val));
}
cir::ConstantOp getConstant(mlir::Location loc, mlir::TypedAttr attr) {
-return create(loc, attr.getType(), attr);
+return create(loc, attr);
}
cir::ConstantOp getConstantInt(mlir::Location loc, mlir::Type ty,
diff --git a/clang/include/clang/CIR/Dialect/IR/CIROps.td
b/clang/include/clang/CIR/Dialect/IR/CIROps.td
index b526d077a910c..577cb8db41f57 100644
--- a/clang/include/clang/CIR/Dialect/IR/CIROps.td
+++ b/clang/include/clang/CIR/Dialect/IR/CIROps.td
@@ -288,18 +288,9 @@ def ConstantOp : CIR_Op<"const",
```
}];
- // The constant operation takes an attribute as the only input.
let arguments = (ins TypedAttrInterface:$value);
-
- // The constant operation returns a single value of CIR_AnyType.
let results = (outs CIR_AnyType:$res);
- let builders = [
-OpBuilder<(ins "cir::BoolAttr":$value), [{
- build($_builder, $_state, value.getType(), value);
-}]>
- ];
-
let assemblyFormat = "attr-dict $value";
let hasVerifier = 1;
diff --git a/clang/lib/CIR/CodeGen/CIRGenBuilder.h
b/clang/lib/CIR/CodeGen/CIRGenBuilder.h
index 4f7ff5128d914..7d9988cc52c5a 100644
--- a/clang/lib/CIR/CodeGen/CIRGenBuilder.h
+++ b/clang/lib/CIR/CodeGen/CIRGenBuilder.h
@@ -185,7 +185,7 @@ class CIRGenBuilderTy : public cir::CIRBaseBuilderTy {
// Creates constant nullptr for pointer type ty.
cir::ConstantOp getNullPtr(mlir::Type ty, mlir::Location loc) {
assert(!cir::MissingFeatures::targetCodeGenInfoGetNullPointer());
-return create(loc, ty, getConstPtrAttr(ty, 0));
+return create(loc, getConstPtrAttr(ty, 0));
}
mlir::Value createNeg(mlir::Value value) {
diff --git a/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
b/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
index f1561d1b26fc0..1e69ecae831e9 100644
--- a/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
+++ b/clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
@@ -138,7 +138,7 @@ class ScalarExprEmitter : public
StmtVisitor {
mlir::Value VisitIntegerLiteral(const IntegerLiteral *e) {
mlir::Type type = cgf.convertType(e->getType());
return builder.create(
-cgf.getLoc(e->getExprLoc()), type,
+cgf.getLoc(e->getExprLoc()),
builder.getAttr(type, e->getValue()));
}
@@ -147,7 +147,7 @@ class ScalarExprEmitter : public
StmtVisitor {
assert(mlir::isa(type) &&
"expect floating-point type");
return builder.create(
-cgf.getLoc(e->getExprLoc()), type,
+cgf.getLoc(e->getExprLoc()),
builder.getAttr(type, e->getValue()));
}
diff --git a/clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
b/clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
index fe8a5e7428a81..20b086ffdd850 100644
--- a/clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
+++ b/clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
@@ -34,7 +34,7 @@ llvm::SmallVector
cir::AllocaOp::getPromotableSlots() {
Value cir::AllocaOp::getDefaultValue(const MemorySlot &slot,
OpBuilder &builder) {
- return builder.create(getLoc(), slot.elemType,
+ return builder.create(getLoc(),
cir::UndefAttr::get(slot.elemType));
}
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[llvm-branch-commits] [clang] [CIR] Make UndefAttr use AttrBuilderWithInferredContext (PR #136605)
xlauko wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/136605?utm_source=stack-comment-downstack-mergeability-warning"; > >on Graphite. > https://graphite.dev/docs/merge-pull-requests";>Learn more * **#136606** https://app.graphite.dev/github/pr/llvm/llvm-project/136606?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * **#136605** https://app.graphite.dev/github/pr/llvm/llvm-project/136605?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/136605?utm_source=stack-comment-view-in-graphite"; target="_blank">(View in Graphite) * **#136604** https://app.graphite.dev/github/pr/llvm/llvm-project/136604?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * `main` This stack of pull requests is managed by https://graphite.dev?utm-source=stack-comment";>Graphite. Learn more about https://stacking.dev/?utm_source=stack-comment";>stacking. https://github.com/llvm/llvm-project/pull/136605 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [CIR] Let ConstantOp builder infer its type automatically (PR #136606)
xlauko wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/136606?utm_source=stack-comment-downstack-mergeability-warning"; > >on Graphite. > https://graphite.dev/docs/merge-pull-requests";>Learn more * **#136606** https://app.graphite.dev/github/pr/llvm/llvm-project/136606?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/136606?utm_source=stack-comment-view-in-graphite"; target="_blank">(View in Graphite) * **#136605** https://app.graphite.dev/github/pr/llvm/llvm-project/136605?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * **#136604** https://app.graphite.dev/github/pr/llvm/llvm-project/136604?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * `main` This stack of pull requests is managed by https://graphite.dev?utm-source=stack-comment";>Graphite. Learn more about https://stacking.dev/?utm_source=stack-comment";>stacking. https://github.com/llvm/llvm-project/pull/136606 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [CIR] Let ConstantOp builder infer its type automatically (PR #136606)
https://github.com/andykaylor approved this pull request. lgtm https://github.com/llvm/llvm-project/pull/136606 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [CIR] Make UndefAttr use AttrBuilderWithInferredContext (PR #136605)
https://github.com/andykaylor approved this pull request. lgtm https://github.com/llvm/llvm-project/pull/136605 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] Backport to 20.x "[clang][analyzer] Fix error path of builtin overflow (#136345)" (PR #136589)
steakhal wrote: Please checkout the release branch, reset hard to reset to that one. Then issue the "git cherry-pick -x HASH" command and force push to your branch. This should get us a nice cherry picked from comment in the message. I think only the release manager can accept merges, so its not your fault. Maintainers like me are expected to review and accept backports to take responsibility. https://github.com/llvm/llvm-project/pull/136589 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [SPARC] Use op-then-neg instructions when we have VIS3 (PR #135717)
@@ -316,4 +316,17 @@ def : Pat<(i64 (sext (i32 (bitconvert f32:$src, (MOVSTOSW $src)>; def : Pat<(f32 (bitconvert i32:$src)), (MOVWTOS $src)>; def : Pat<(i64 (bitconvert f64:$src)), (MOVDTOX $src)>; def : Pat<(f64 (bitconvert i64:$src)), (MOVXTOD $src)>; + +// OP-then-neg FP operations. +def : Pat<(f32 (fneg (fadd f32:$rs1, f32:$rs2))), (FNADDS $rs1, $rs2)>; +def : Pat<(f64 (fneg (fadd f64:$rs1, f64:$rs2))), (FNADDD $rs1, $rs2)>; +def : Pat<(f32 (fneg (fmul f32:$rs1, f32:$rs2))), (FNMULS $rs1, $rs2)>; +def : Pat<(f32 (fmul (fneg f32:$rs1), f32:$rs2)), (FNMULS $rs1, $rs2)>; +def : Pat<(f32 (fmul f32:$rs1, (fneg f32:$rs2))), (FNMULS $rs1, $rs2)>; +def : Pat<(f64 (fneg (fmul f64:$rs1, f64:$rs2))), (FNMULD $rs1, $rs2)>; +def : Pat<(f64 (fmul (fneg f64:$rs1), f64:$rs2)), (FNMULD $rs1, $rs2)>; +def : Pat<(f64 (fmul f64:$rs1, (fneg f64:$rs2))), (FNMULD $rs1, $rs2)>; +def : Pat<(f64 (fneg (fmul (fpextend f32:$rs1), (fpextend f32:$rs2, (FNSMULD $rs1, $rs2)>; +def : Pat<(f64 (fmul (fneg (fpextend f32:$rs1)), (fpextend f32:$rs2))), (FNSMULD $rs1, $rs2)>; +def : Pat<(f64 (fmul (fpextend f32:$rs1), (fneg (fpextend f32:$rs2, (FNSMULD $rs1, $rs2)>; arsenm wrote: You can write a pattern that checks the flags, but my broader point would be you should probably be implementing isFNegFree so all the default logic works https://github.com/llvm/llvm-project/pull/135717 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [SPARC] Use op-then-neg instructions when we have VIS3 (PR #135717)
@@ -0,0 +1,59 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
UTC_ARGS: --version 5
+; RUN: llc -mtriple=sparc64 -mattr=+vis3 < %s | FileCheck %s
+
+define float @fnadds(float %a, float %b) nounwind {
+; CHECK-LABEL: fnadds:
+; CHECK: ! %bb.0: ! %entry
+; CHECK-NEXT:retl
+; CHECK-NEXT:fnadds %f1, %f3, %f0
+entry:
+ %add = fadd float %a, %b
+ %fneg = fneg float %add
+ ret float %fneg
+}
+
+define double @fnaddd(double %a, double %b) nounwind {
+; CHECK-LABEL: fnaddd:
+; CHECK: ! %bb.0: ! %entry
+; CHECK-NEXT:retl
+; CHECK-NEXT:fnaddd %f0, %f2, %f0
+entry:
+ %add = fadd double %a, %b
+ %fneg = fneg double %add
+ ret double %fneg
+}
+
+define float @fnmuls(float %a, float %b) nounwind {
+; CHECK-LABEL: fnmuls:
+; CHECK: ! %bb.0: ! %entry
+; CHECK-NEXT:retl
+; CHECK-NEXT:fnmuls %f1, %f3, %f0
+entry:
+ %mul = fmul float %a, %b
+ %fneg = fneg float %mul
+ ret float %fneg
+}
+
+define double @fnmuld(double %a, double %b) nounwind {
+; CHECK-LABEL: fnmuld:
+; CHECK: ! %bb.0: ! %entry
+; CHECK-NEXT:retl
+; CHECK-NEXT:fnmuld %f0, %f2, %f0
+entry:
+ %mul = fmul double %a, %b
+ %fneg = fneg double %mul
+ ret double %fneg
+}
+
+define double @fnsmuld(float %a, float %b) nounwind {
+; CHECK-LABEL: fnsmuld:
+; CHECK: ! %bb.0: ! %entry
+; CHECK-NEXT:retl
+; CHECK-NEXT:fnsmuld %f1, %f3, %f0
+entry:
+ %conv.i = fpext float %a to double
+ %conv1.i = fpext float %b to double
+ %mul = fmul double %conv.i, %conv1.i
+ %fneg = fneg double %mul
+ ret double %fneg
+}
arsenm wrote:
It's hard to verify test coverage when so much is in one patch, I would have
done this one pattern per patch with precommitted tests so it's trivial to see
that it's tested
https://github.com/llvm/llvm-project/pull/135717
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[llvm-branch-commits] [clang] Backport to 20.x "[clang][analyzer] Fix error path of builtin overflow (#136345)" (PR #136589)
steakhal wrote: Make sure after the force push you sync zhe PR summary with the commit message. https://github.com/llvm/llvm-project/pull/136589 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] 61475ff - Revert "[Fuchsia] Disable PIC (#136376)"
Author: gulfemsavrun Date: 2025-04-21T14:33:31-07:00 New Revision: 61475ffa75fd202f8cd3d3ffdf547919b9f13f0d URL: https://github.com/llvm/llvm-project/commit/61475ffa75fd202f8cd3d3ffdf547919b9f13f0d DIFF: https://github.com/llvm/llvm-project/commit/61475ffa75fd202f8cd3d3ffdf547919b9f13f0d.diff LOG: Revert "[Fuchsia] Disable PIC (#136376)" This reverts commit 846986f35b5a7baa498db7c61ae15dd9b2dee797. Added: Modified: clang/cmake/caches/Fuchsia-stage2.cmake Removed: diff --git a/clang/cmake/caches/Fuchsia-stage2.cmake b/clang/cmake/caches/Fuchsia-stage2.cmake index 2b29b43f44936..99890b8246ad7 100644 --- a/clang/cmake/caches/Fuchsia-stage2.cmake +++ b/clang/cmake/caches/Fuchsia-stage2.cmake @@ -18,7 +18,6 @@ set(LLVM_ENABLE_LIBEDIT OFF CACHE BOOL "") set(LLVM_ENABLE_LLD ON CACHE BOOL "") set(LLVM_ENABLE_LTO ON CACHE BOOL "") set(LLVM_ENABLE_PER_TARGET_RUNTIME_DIR ON CACHE BOOL "") -set(LLVM_ENABLE_PIC OFF CACHE BOOL "") set(LLVM_ENABLE_PLUGINS OFF CACHE BOOL "") set(LLVM_ENABLE_UNWIND_TABLES OFF CACHE BOOL "") set(LLVM_ENABLE_Z3_SOLVER OFF CACHE BOOL "") ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [mlir] [mlir][Transforms] Dialect conversion: Add flag to disable rollback (PR #136490)
https://github.com/jpienaar edited https://github.com/llvm/llvm-project/pull/136490 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [mlir] [mlir][Transforms] Dialect conversion: Add flag to disable rollback (PR #136490)
@@ -861,8 +861,10 @@ struct ConversionPatternRewriterImpl : public
RewriterBase::Listener {
/// conversion process succeeds.
void applyRewrites();
- /// Reset the state of the rewriter to a previously saved point.
- void resetState(RewriterState state);
+ /// Reset the state of the rewriter to a previously saved point. Optionally,
+ /// the name of the pattern that triggered the rollback can specified for
+ /// debugging purposes.
+ void resetState(RewriterState state, StringRef patternName = "");
jpienaar wrote:
Are patternName params intended to stay post?
https://github.com/llvm/llvm-project/pull/136490
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[llvm-branch-commits] [mlir] [mlir][Transforms] Dialect conversion: Add flag to disable rollback (PR #136490)
https://github.com/jpienaar approved this pull request. So this would also allow folks to prefetch the future state? E.g., used to test for failures when rollback no longer supported? https://github.com/llvm/llvm-project/pull/136490 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [Coro] Use DebugInfoCache to speed up cloning in CoroSplitPass (PR #118630)
https://github.com/artempyanykh closed https://github.com/llvm/llvm-project/pull/118630 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [Coro] Use DebugInfoCache to speed up cloning in CoroSplitPass (PR #118630)
artempyanykh wrote: Dropping this in favor of https://github.com/llvm/llvm-project/pull/129148 https://github.com/llvm/llvm-project/pull/118630 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [mlir] [mlir][Transforms] Dialect conversion: Add flag to disable rollback (PR #136490)
@@ -861,8 +861,10 @@ struct ConversionPatternRewriterImpl : public
RewriterBase::Listener {
/// conversion process succeeds.
void applyRewrites();
- /// Reset the state of the rewriter to a previously saved point.
- void resetState(RewriterState state);
+ /// Reset the state of the rewriter to a previously saved point. Optionally,
+ /// the name of the pattern that triggered the rollback can specified for
+ /// debugging purposes.
+ void resetState(RewriterState state, StringRef patternName = "");
matthias-springer wrote:
This entire function will disappear when we delete the rollback mechanism.
https://github.com/llvm/llvm-project/pull/136490
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[llvm-branch-commits] [mlir] [mlir][Transforms] Dialect conversion: Add flag to disable rollback (PR #136490)
matthias-springer wrote: > So this would also allow folks to prefetch the future state? E.g., used to > test for failures when rollback no longer supported? Yes, that's correct. The simplest way to do that is to change the default value of the new `allowPatternRollback` flag to `false` in `DialectConversion.h`. Alternatively, the flag can also be set to `false` on a case-by-case basis in each pass. https://github.com/llvm/llvm-project/pull/136490 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] e35cf35 - Revert "[HLSL] Make it possible to assign an array from a cbuffer (#134174)"
Author: Sarah Spall
Date: 2025-04-21T09:27:45-07:00
New Revision: e35cf35feff443c6dd9fbc0b5ab00efa8e282fa0
URL:
https://github.com/llvm/llvm-project/commit/e35cf35feff443c6dd9fbc0b5ab00efa8e282fa0
DIFF:
https://github.com/llvm/llvm-project/commit/e35cf35feff443c6dd9fbc0b5ab00efa8e282fa0.diff
LOG: Revert "[HLSL] Make it possible to assign an array from a cbuffer
(#134174)"
This reverts commit 52a5332a710d4db22327c3777ebf6873ff20732f.
Added:
Modified:
clang/lib/Sema/SemaExprCXX.cpp
clang/lib/Sema/SemaOverload.cpp
clang/test/CodeGenHLSL/ArrayAssignable.hlsl
Removed:
diff --git a/clang/lib/Sema/SemaExprCXX.cpp b/clang/lib/Sema/SemaExprCXX.cpp
index f5a10e0db85ad..d46322d75721e 100644
--- a/clang/lib/Sema/SemaExprCXX.cpp
+++ b/clang/lib/Sema/SemaExprCXX.cpp
@@ -4745,13 +4745,19 @@ Sema::PerformImplicitConversion(Expr *From, QualType
ToType,
case ICK_HLSL_Array_RValue:
if (ToType->isArrayParameterType()) {
FromType = Context.getArrayParameterType(FromType);
-} else if (FromType->isArrayParameterType()) {
+ From = ImpCastExprToType(From, FromType, CK_HLSLArrayRValue, VK_PRValue,
+ /*BasePath=*/nullptr, CCK)
+ .get();
+} else { // FromType must be ArrayParameterType
+ assert(FromType->isArrayParameterType() &&
+ "FromType must be ArrayParameterType in ICK_HLSL_Array_RValue \
+ if it is not ToType");
const ArrayParameterType *APT = cast(FromType);
FromType = APT->getConstantArrayType(Context);
+ From = ImpCastExprToType(From, FromType, CK_HLSLArrayRValue, VK_PRValue,
+ /*BasePath=*/nullptr, CCK)
+ .get();
}
-From = ImpCastExprToType(From, FromType, CK_HLSLArrayRValue, VK_PRValue,
- /*BasePath=*/nullptr, CCK)
- .get();
break;
case ICK_Function_To_Pointer:
diff --git a/clang/lib/Sema/SemaOverload.cpp b/clang/lib/Sema/SemaOverload.cpp
index 5b224b6c08fef..e4ff8c5489df3 100644
--- a/clang/lib/Sema/SemaOverload.cpp
+++ b/clang/lib/Sema/SemaOverload.cpp
@@ -2275,16 +2275,17 @@ static bool IsStandardConversion(Sema &S, Expr* From,
QualType ToType,
// handling here.
if (ToType->isArrayParameterType()) {
FromType = S.Context.getArrayParameterType(FromType);
+ SCS.First = ICK_HLSL_Array_RValue;
} else if (FromType->isArrayParameterType()) {
const ArrayParameterType *APT = cast(FromType);
FromType = APT->getConstantArrayType(S.Context);
+ SCS.First = ICK_HLSL_Array_RValue;
+} else {
+ SCS.First = ICK_Identity;
}
-SCS.First = ICK_HLSL_Array_RValue;
-
-// Don't consider qualifiers, which include things like address spaces
-if (FromType.getCanonicalType().getUnqualifiedType() !=
-ToType.getCanonicalType().getUnqualifiedType())
+if (S.Context.getCanonicalType(FromType) !=
+S.Context.getCanonicalType(ToType))
return false;
SCS.setAllToTypes(ToType);
diff --git a/clang/test/CodeGenHLSL/ArrayAssignable.hlsl
b/clang/test/CodeGenHLSL/ArrayAssignable.hlsl
index 723d521596baf..e2ff2de68ed99 100644
--- a/clang/test/CodeGenHLSL/ArrayAssignable.hlsl
+++ b/clang/test/CodeGenHLSL/ArrayAssignable.hlsl
@@ -1,23 +1,4 @@
-// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.3-library
-finclude-default-header -emit-llvm -disable-llvm-passes -o - %s | FileCheck %s
-
-struct S {
- int x;
- float f;
-};
-
-// CHECK: [[CBLayout:%.*]] = type <{ [2 x float], [2 x <4 x i32>], [2 x [2 x
i32]], [1 x target("dx.Layout", %S, 8, 0, 4)] }>
-// CHECK: @CBArrays.cb = global target("dx.CBuffer", target("dx.Layout",
[[CBLayout]], 136, 0, 32, 64, 128))
-// CHECK: @c1 = external addrspace(2) global [2 x float], align 4
-// CHECK: @c2 = external addrspace(2) global [2 x <4 x i32>], align 16
-// CHECK: @c3 = external addrspace(2) global [2 x [2 x i32]], align 4
-// CHECK: @c4 = external addrspace(2) global [1 x target("dx.Layout", %S, 8,
0, 4)], align 4
-
-cbuffer CBArrays {
- float c1[2];
- int4 c2[2];
- int c3[2][2];
- S c4[1];
-}
+// RUN: %clang_cc1 -triple dxil-pc-shadermodel6.3-library -emit-llvm
-disable-llvm-passes -o - %s | FileCheck %s --enable-var-scope
// CHECK-LABEL: define void {{.*}}arr_assign1
// CHECK: [[Arr:%.*]] = alloca [2 x i32], align 4
@@ -135,45 +116,3 @@ void arr_assign7() {
int Arr2[2][2] = {{0, 0}, {1, 1}};
(Arr = Arr2)[0] = {6, 6};
}
-
-// Verify you can assign from a cbuffer array
-
-// CHECK-LABEL: define void {{.*}}arr_assign8
-// CHECK: [[C:%.*]] = alloca [2 x float], align 4
-// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[C]], ptr align 4
{{.*}}, i32 8, i1 false)
-// CHECK-NEXT: call void @llvm.memcpy.p0.p2.i32(ptr align 4 [[C]], ptr
addrspace(2) align 4 @c1, i32 8, i1 false)
-// CHECK-NEXT: ret void
-void arr_assign8() {
- float C[2] = {1.0, 2.0
[llvm-branch-commits] [llvm] Bundle operands to specify denormal modes (PR #136501)
@@ -678,6 +682,71 @@ fp::ExceptionBehavior CallBase::getExceptionBehavior()
const {
return fp::ebIgnore;
}
+DenormalMode::DenormalModeKind CallBase::getInputDenormMode() const {
+ if (auto InDenormBundle = getOperandBundle(LLVMContext::OB_fp_control)) {
+auto DenormOperand =
+getBundleOperandByPrefix(*InDenormBundle, "denorm.in=");
+if (DenormOperand) {
+ if (auto Mode = parseDenormalKindFromOperandBundle(*DenormOperand))
+return *Mode;
+} else {
+ return DenormalMode::IEEE;
+}
+ }
+
+ if (!getParent())
+return DenormalMode::IEEE;
+ const Function *F = getFunction();
+ if (!F)
+return DenormalMode::IEEE;
+
+ Type *Ty = nullptr;
+ for (auto &A : args())
+if (auto *T = A.get()->getType(); T->isFPOrFPVectorTy()) {
+ Ty = T;
+ break;
+}
+ assert(Ty && "Some input argument must be of floating-point type");
spavloff wrote:
It means that we have more than one denormal mode in a single instruction, so
they need to be distinguish them somehow, by type in your case.
Is it possible that an instruction has multiple output denormal modes?
What about rounding mode? It it possible that evaluation of an instruction
requires two different rounding modes?
https://github.com/llvm/llvm-project/pull/136501
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[llvm-branch-commits] [clang] Backport to 20.x "[clang][analyzer] Fix error path of builtin overflow (#136345)" (PR #136589)
https://github.com/nikic milestoned https://github.com/llvm/llvm-project/pull/136589 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [llvm] [HLSL] Allow resource annotations to specify only register space (PR #135287)
@@ -163,11 +163,16 @@ void Parser::ParseHLSLAnnotations(ParsedAttributes &Attrs,
SourceLocation SlotLoc = Tok.getLocation();
ArgExprs.push_back(ParseIdentifierLoc());
-// Add numeric_constant for fix-it.
-if (SlotStr.size() == 1 && Tok.is(tok::numeric_constant))
+if (SlotStr.size() == 1) {
+ if (!Tok.is(tok::numeric_constant)) {
+Diag(Tok.getLocation(), diag::err_expected) << tok::numeric_constant;
+SkipUntil(tok::r_paren, StopAtSemi); // skip through )
hekota wrote:
It is for error state recovery. The SkipUntil call tells the parser to move
forward until it finds a closing `)` or ';'. After the code returns the parser
will resume parsing tokens of the next statement.
https://github.com/llvm/llvm-project/pull/135287
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[llvm-branch-commits] [llvm] [GOFF] Add writing of section symbols (PR #133799)
@@ -0,0 +1,113 @@
+//===- MCGOFFAttributes.h - Attributes of GOFF symbols
===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+//
+// Defines the various attribute collections defining GOFF symbols.
+//
+//===--===//
+
+#ifndef LLVM_MC_MCGOFFATTRIBUTES_H
+#define LLVM_MC_MCGOFFATTRIBUTES_H
+
+#include "llvm/ADT/StringRef.h"
+#include "llvm/BinaryFormat/GOFF.h"
+
+namespace llvm {
+namespace GOFF {
+// An "External Symbol Definition" in the GOFF file has a type, and depending
on
+// the type a different subset of the fields is used.
+//
+// Unlike other formats, a 2 dimensional structure is used to define the
+// location of data. For example, the equivalent of the ELF .text section is
+// made up of a Section Definition (SD) and a class (Element Definition; ED).
+// The name of the SD symbol depends on the application, while the class has
the
+// predefined name C_CODE/C_CODE64 in AMODE31 and AMODE64 respectively.
+//
+// Data can be placed into this structure in 2 ways. First, the data (in a text
+// record) can be associated with an ED symbol. To refer to data, a Label
+// Definition (LD) is used to give an offset into the data a name. When
binding,
+// the whole data is pulled into the resulting executable, and the addresses
+// given by the LD symbols are resolved.
+//
+// The alternative is to use a Part Definition (PR). In this case, the data (in
+// a text record) is associated with the part. When binding, only the data of
+// referenced PRs is pulled into the resulting binary.
+//
+// Both approaches are used, which means that the equivalent of a section in
ELF
+// results in 3 GOFF symbols, either SD/ED/LD or SD/ED/PR. Moreover, certain
+// sections are fine with just defining SD/ED symbols. The SymbolMapper takes
+// care of all those details.
+
+// Attributes for SD symbols.
+struct SDAttr {
+ GOFF::ESDTaskingBehavior TaskingBehavior = GOFF::ESD_TA_Unspecified;
+ GOFF::ESDBindingScope BindingScope = GOFF::ESD_BSC_Unspecified;
+};
+
+// Attributes for ED symbols.
+struct EDAttr {
+ bool IsReadOnly = false;
+ GOFF::ESDExecutable Executable = GOFF::ESD_EXE_Unspecified;
redstar wrote:
Well, while my statement is true it also means there is no way to refer to such
data.
I checked, it's not required.
https://github.com/llvm/llvm-project/pull/133799
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