[llvm-branch-commits] [llvm] [BOLT][test] Fix callcont-fallthru.s after #129481 (PR #135867)
https://github.com/paschalis-mpeis commented: Hey Amir, Thanks for the PR. Unfortunately, it is still failing. The trick below doesn't seem to work on my buildbot machine: > Link against a DSO to ensure PLT entries. So doing: ```bash nm --synthetic callcont-fallthru.s.tmp ``` won't list a `puts@plt` symbol, which is what causes an `link_fdata.py` assertion: > AssertionError: ERROR: symbol puts@plt is not defined in binary On my dev AArch64 instance `--synthetic` does the trick. BTW run lines 4 and 6 appear identical when inspected (`-###`) https://github.com/llvm/llvm-project/pull/135867 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/20.x: [LoongArch] Don't crash on instruction prefetch intrinsics (#135760) (PR #135923)
https://github.com/llvmbot created
https://github.com/llvm/llvm-project/pull/135923
Backport dfb5b6e
Requested by: @leecheechen
>From 96e5a1d7b878dc608d5e4b20278d2c5ce8cf218c Mon Sep 17 00:00:00 2001
From: leecheechen
Date: Wed, 16 Apr 2025 14:12:00 +0800
Subject: [PATCH] [LoongArch] Don't crash on instruction prefetch intrinsics
(#135760)
Instead of failing to select during isel, drop the intrinsic in
lowering.
Similar as the X86's PR. Seeing: https://reviews.llvm.org/D151050.
Fixes #134624
(cherry picked from commit dfb5b6e27ca3f8b79ebd3346d11b3088c1600b81)
---
.../LoongArch/LoongArchISelLowering.cpp | 16 -
.../Target/LoongArch/LoongArchISelLowering.h | 1 +
llvm/test/CodeGen/LoongArch/prefetchi.ll | 33 +++
3 files changed, 49 insertions(+), 1 deletion(-)
create mode 100644 llvm/test/CodeGen/LoongArch/prefetchi.ll
diff --git a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
index 2282dc8955613..4ed3c3cf92e3e 100644
--- a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+++ b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
@@ -99,7 +99,7 @@ LoongArchTargetLowering::LoongArchTargetLowering(const
TargetMachine &TM,
setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::Other, Custom);
setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom);
- setOperationAction(ISD::PREFETCH, MVT::Other, Legal);
+ setOperationAction(ISD::PREFETCH, MVT::Other, Custom);
// Expand bitreverse.i16 with native-width bitrev and shift for now, before
// we get to know which of sll and revb.2h is faster.
@@ -459,10 +459,24 @@ SDValue LoongArchTargetLowering::LowerOperation(SDValue
Op,
return lowerBITREVERSE(Op, DAG);
case ISD::SCALAR_TO_VECTOR:
return lowerSCALAR_TO_VECTOR(Op, DAG);
+ case ISD::PREFETCH:
+return lowerPREFETCH(Op, DAG);
}
return SDValue();
}
+SDValue LoongArchTargetLowering::lowerPREFETCH(SDValue Op,
+ SelectionDAG &DAG) const {
+ unsigned IsData = Op.getConstantOperandVal(4);
+
+ // We don't support non-data prefetch.
+ // Just preserve the chain.
+ if (!IsData)
+return Op.getOperand(0);
+
+ return Op;
+}
+
SDValue
LoongArchTargetLowering::lowerSCALAR_TO_VECTOR(SDValue Op,
SelectionDAG &DAG) const {
diff --git a/llvm/lib/Target/LoongArch/LoongArchISelLowering.h
b/llvm/lib/Target/LoongArch/LoongArchISelLowering.h
index a215ab523874b..3f44a720eca73 100644
--- a/llvm/lib/Target/LoongArch/LoongArchISelLowering.h
+++ b/llvm/lib/Target/LoongArch/LoongArchISelLowering.h
@@ -337,6 +337,7 @@ class LoongArchTargetLowering : public TargetLowering {
SDValue lowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const;
SDValue lowerBITREVERSE(SDValue Op, SelectionDAG &DAG) const;
SDValue lowerSCALAR_TO_VECTOR(SDValue Op, SelectionDAG &DAG) const;
+ SDValue lowerPREFETCH(SDValue Op, SelectionDAG &DAG) const;
bool isFPImmLegal(const APFloat &Imm, EVT VT,
bool ForCodeSize) const override;
diff --git a/llvm/test/CodeGen/LoongArch/prefetchi.ll
b/llvm/test/CodeGen/LoongArch/prefetchi.ll
new file mode 100644
index 0..a00f6f8161862
--- /dev/null
+++ b/llvm/test/CodeGen/LoongArch/prefetchi.ll
@@ -0,0 +1,33 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
UTC_ARGS: --version 5
+; RUN: llc --mtriple=loongarch32 < %s | FileCheck %s --check-prefix=LA32
+; RUN: llc --mtriple=loongarch64 < %s | FileCheck %s --check-prefix=LA64
+
+declare void @llvm.prefetch(ptr, i32, i32, i32) nounwind
+
+define dso_local void @prefetch_no_offset(ptr %ptr) nounwind {
+; LA32-LABEL: prefetch_no_offset:
+; LA32: # %bb.0: # %entry
+; LA32-NEXT:ret
+;
+; LA64-LABEL: prefetch_no_offset:
+; LA64: # %bb.0: # %entry
+; LA64-NEXT:ret
+entry:
+ tail call void @llvm.prefetch(ptr %ptr, i32 0, i32 3, i32 0)
+ ret void
+}
+
+
+define dso_local void @prefetch_with_offset(ptr %ptr) nounwind {
+; LA32-LABEL: prefetch_with_offset:
+; LA32: # %bb.0: # %entry
+; LA32-NEXT:ret
+;
+; LA64-LABEL: prefetch_with_offset:
+; LA64: # %bb.0: # %entry
+; LA64-NEXT:ret
+entry:
+ %addr = getelementptr i8, ptr %ptr, i64 200
+ tail call void @llvm.prefetch(ptr %addr, i32 0, i32 3, i32 0)
+ ret void
+}
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[llvm-branch-commits] [llvm] release/20.x: [LoongArch] Don't crash on instruction prefetch intrinsics (#135760) (PR #135923)
https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/135923 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/20.x: [LoongArch] Don't crash on instruction prefetch intrinsics (#135760) (PR #135923)
llvmbot wrote: @heiher What do you think about merging this PR to the release branch? https://github.com/llvm/llvm-project/pull/135923 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/20.x: [LoongArch] Don't crash on instruction prefetch intrinsics (#135760) (PR #135923)
llvmbot wrote:
@llvm/pr-subscribers-backend-loongarch
Author: None (llvmbot)
Changes
Backport dfb5b6e
Requested by: @leecheechen
---
Full diff: https://github.com/llvm/llvm-project/pull/135923.diff
3 Files Affected:
- (modified) llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp (+15-1)
- (modified) llvm/lib/Target/LoongArch/LoongArchISelLowering.h (+1)
- (added) llvm/test/CodeGen/LoongArch/prefetchi.ll (+33)
``diff
diff --git a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
index 2282dc8955613..4ed3c3cf92e3e 100644
--- a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+++ b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
@@ -99,7 +99,7 @@ LoongArchTargetLowering::LoongArchTargetLowering(const
TargetMachine &TM,
setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::Other, Custom);
setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom);
- setOperationAction(ISD::PREFETCH, MVT::Other, Legal);
+ setOperationAction(ISD::PREFETCH, MVT::Other, Custom);
// Expand bitreverse.i16 with native-width bitrev and shift for now, before
// we get to know which of sll and revb.2h is faster.
@@ -459,10 +459,24 @@ SDValue LoongArchTargetLowering::LowerOperation(SDValue
Op,
return lowerBITREVERSE(Op, DAG);
case ISD::SCALAR_TO_VECTOR:
return lowerSCALAR_TO_VECTOR(Op, DAG);
+ case ISD::PREFETCH:
+return lowerPREFETCH(Op, DAG);
}
return SDValue();
}
+SDValue LoongArchTargetLowering::lowerPREFETCH(SDValue Op,
+ SelectionDAG &DAG) const {
+ unsigned IsData = Op.getConstantOperandVal(4);
+
+ // We don't support non-data prefetch.
+ // Just preserve the chain.
+ if (!IsData)
+return Op.getOperand(0);
+
+ return Op;
+}
+
SDValue
LoongArchTargetLowering::lowerSCALAR_TO_VECTOR(SDValue Op,
SelectionDAG &DAG) const {
diff --git a/llvm/lib/Target/LoongArch/LoongArchISelLowering.h
b/llvm/lib/Target/LoongArch/LoongArchISelLowering.h
index a215ab523874b..3f44a720eca73 100644
--- a/llvm/lib/Target/LoongArch/LoongArchISelLowering.h
+++ b/llvm/lib/Target/LoongArch/LoongArchISelLowering.h
@@ -337,6 +337,7 @@ class LoongArchTargetLowering : public TargetLowering {
SDValue lowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const;
SDValue lowerBITREVERSE(SDValue Op, SelectionDAG &DAG) const;
SDValue lowerSCALAR_TO_VECTOR(SDValue Op, SelectionDAG &DAG) const;
+ SDValue lowerPREFETCH(SDValue Op, SelectionDAG &DAG) const;
bool isFPImmLegal(const APFloat &Imm, EVT VT,
bool ForCodeSize) const override;
diff --git a/llvm/test/CodeGen/LoongArch/prefetchi.ll
b/llvm/test/CodeGen/LoongArch/prefetchi.ll
new file mode 100644
index 0..a00f6f8161862
--- /dev/null
+++ b/llvm/test/CodeGen/LoongArch/prefetchi.ll
@@ -0,0 +1,33 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
UTC_ARGS: --version 5
+; RUN: llc --mtriple=loongarch32 < %s | FileCheck %s --check-prefix=LA32
+; RUN: llc --mtriple=loongarch64 < %s | FileCheck %s --check-prefix=LA64
+
+declare void @llvm.prefetch(ptr, i32, i32, i32) nounwind
+
+define dso_local void @prefetch_no_offset(ptr %ptr) nounwind {
+; LA32-LABEL: prefetch_no_offset:
+; LA32: # %bb.0: # %entry
+; LA32-NEXT:ret
+;
+; LA64-LABEL: prefetch_no_offset:
+; LA64: # %bb.0: # %entry
+; LA64-NEXT:ret
+entry:
+ tail call void @llvm.prefetch(ptr %ptr, i32 0, i32 3, i32 0)
+ ret void
+}
+
+
+define dso_local void @prefetch_with_offset(ptr %ptr) nounwind {
+; LA32-LABEL: prefetch_with_offset:
+; LA32: # %bb.0: # %entry
+; LA32-NEXT:ret
+;
+; LA64-LABEL: prefetch_with_offset:
+; LA64: # %bb.0: # %entry
+; LA64-NEXT:ret
+entry:
+ %addr = getelementptr i8, ptr %ptr, i64 200
+ tail call void @llvm.prefetch(ptr %addr, i32 0, i32 3, i32 0)
+ ret void
+}
``
https://github.com/llvm/llvm-project/pull/135923
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[llvm-branch-commits] [llvm] release/20.x: [LoongArch] Don't crash on instruction prefetch intrinsics (#135760) (PR #135923)
https://github.com/heiher approved this pull request. https://github.com/llvm/llvm-project/pull/135923 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [MTE] do not tag zero sized globals (PR #136020)
https://github.com/pcc approved this pull request. https://github.com/llvm/llvm-project/pull/136020 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [SPARC] Use op-then-neg instructions when we have VIS3 (PR #135717)
@@ -316,4 +316,17 @@ def : Pat<(i64 (sext (i32 (bitconvert f32:$src, (MOVSTOSW $src)>; def : Pat<(f32 (bitconvert i32:$src)), (MOVWTOS $src)>; def : Pat<(i64 (bitconvert f64:$src)), (MOVDTOX $src)>; def : Pat<(f64 (bitconvert i64:$src)), (MOVXTOD $src)>; + +// OP-then-neg FP operations. +def : Pat<(f32 (fneg (fadd f32:$rs1, f32:$rs2))), (FNADDS $rs1, $rs2)>; +def : Pat<(f64 (fneg (fadd f64:$rs1, f64:$rs2))), (FNADDD $rs1, $rs2)>; +def : Pat<(f32 (fneg (fmul f32:$rs1, f32:$rs2))), (FNMULS $rs1, $rs2)>; +def : Pat<(f32 (fmul (fneg f32:$rs1), f32:$rs2)), (FNMULS $rs1, $rs2)>; +def : Pat<(f32 (fmul f32:$rs1, (fneg f32:$rs2))), (FNMULS $rs1, $rs2)>; +def : Pat<(f64 (fneg (fmul f64:$rs1, f64:$rs2))), (FNMULD $rs1, $rs2)>; +def : Pat<(f64 (fmul (fneg f64:$rs1), f64:$rs2)), (FNMULD $rs1, $rs2)>; +def : Pat<(f64 (fmul f64:$rs1, (fneg f64:$rs2))), (FNMULD $rs1, $rs2)>; +def : Pat<(f64 (fneg (fmul (fpextend f32:$rs1), (fpextend f32:$rs2, (FNSMULD $rs1, $rs2)>; +def : Pat<(f64 (fmul (fneg (fpextend f32:$rs1)), (fpextend f32:$rs2))), (FNSMULD $rs1, $rs2)>; +def : Pat<(f64 (fmul (fpextend f32:$rs1), (fneg (fpextend f32:$rs2, (FNSMULD $rs1, $rs2)>; s-barannikov wrote: I have little experience with floating point support in ISel yet. Maybe @arsenm can help here https://github.com/llvm/llvm-project/pull/135717 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [HLSL] Adding support for Root Constants in LLVM Metadata (PR #135085)
@@ -0,0 +1,18 @@
+; RUN: not opt -passes='print' %s -S -o - 2>&1 |
FileCheck %s
+
+target triple = "dxil-unknown-shadermodel6.0-compute"
+
+; CHECK: error: Invalid value for Num32BitValues
+; CHECK-NOT: Root Signature Definitions
+
+define void @main() #0 {
+entry:
+ ret void
+}
+attributes #0 = { "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" }
inbelic wrote:
nit: are these attributes needed?
https://github.com/llvm/llvm-project/pull/135085
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[llvm-branch-commits] [SPARC] Use lzcnt to implement CTLZ when we have VIS3 (PR #135715)
@@ -1815,7 +1817,8 @@ SparcTargetLowering::SparcTargetLowering(const TargetMachine &TM, setOperationAction(ISD::FREM , MVT::f32, Expand); setOperationAction(ISD::FMA , MVT::f32, Expand); setOperationAction(ISD::CTTZ , MVT::i32, Expand); - setOperationAction(ISD::CTLZ , MVT::i32, Expand); + setOperationAction(ISD::CTLZ, MVT::i32, + Subtarget->isVIS3() ? Promote : LibCall); koachan wrote: Looking at GCC output, it seem to produce `clzdi2` on 32-bit target too, so I think it's safe to use it. https://godbolt.org/z/xfnob5P1a https://github.com/llvm/llvm-project/pull/135715 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [SPARC] Use lzcnt to implement CTLZ when we have VIS3 (PR #135715)
@@ -1815,7 +1817,8 @@ SparcTargetLowering::SparcTargetLowering(const TargetMachine &TM, setOperationAction(ISD::FREM , MVT::f32, Expand); setOperationAction(ISD::FMA , MVT::f32, Expand); setOperationAction(ISD::CTTZ , MVT::i32, Expand); - setOperationAction(ISD::CTLZ , MVT::i32, Expand); + setOperationAction(ISD::CTLZ, MVT::i32, + Subtarget->isVIS3() ? Promote : LibCall); s-barannikov wrote: I mean, we can use libcall for i64 on both 32- and 64-bit system, but it appears we can't use i32 libcall on 64-bit system. At least this looks so from the godbolt link. https://github.com/llvm/llvm-project/pull/135715 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [HLSL] Adding support for Root Constants in LLVM Metadata (PR #135085)
https://github.com/joaosaffran updated
https://github.com/llvm/llvm-project/pull/135085
>From 9b59d0108f6b23c039e2c417247216862073cd4b Mon Sep 17 00:00:00 2001
From: joaosaffran
Date: Wed, 9 Apr 2025 21:05:58 +
Subject: [PATCH 01/12] adding support for root constants in metadata
generation
---
llvm/lib/Target/DirectX/DXILRootSignature.cpp | 120 +-
llvm/lib/Target/DirectX/DXILRootSignature.h | 6 +-
.../RootSignature-Flags-Validation-Error.ll | 7 +-
.../RootSignature-RootConstants.ll| 34 +
...ature-ShaderVisibility-Validation-Error.ll | 20 +++
5 files changed, 182 insertions(+), 5 deletions(-)
create mode 100644
llvm/test/CodeGen/DirectX/ContainerData/RootSignature-RootConstants.ll
create mode 100644
llvm/test/CodeGen/DirectX/ContainerData/RootSignature-ShaderVisibility-Validation-Error.ll
diff --git a/llvm/lib/Target/DirectX/DXILRootSignature.cpp
b/llvm/lib/Target/DirectX/DXILRootSignature.cpp
index 412ab7765a7ae..7686918b0fc75 100644
--- a/llvm/lib/Target/DirectX/DXILRootSignature.cpp
+++ b/llvm/lib/Target/DirectX/DXILRootSignature.cpp
@@ -40,6 +40,13 @@ static bool reportError(LLVMContext *Ctx, Twine Message,
return true;
}
+static bool reportValueError(LLVMContext *Ctx, Twine ParamName, uint32_t Value,
+ DiagnosticSeverity Severity = DS_Error) {
+ Ctx->diagnose(DiagnosticInfoGeneric(
+ "Invalid value for " + ParamName + ": " + Twine(Value), Severity));
+ return true;
+}
+
static bool parseRootFlags(LLVMContext *Ctx, mcdxbc::RootSignatureDesc &RSD,
MDNode *RootFlagNode) {
@@ -52,6 +59,45 @@ static bool parseRootFlags(LLVMContext *Ctx,
mcdxbc::RootSignatureDesc &RSD,
return false;
}
+static bool extractMdValue(uint32_t &Value, MDNode *Node, unsigned int OpId) {
+
+ auto *CI = mdconst::extract(Node->getOperand(OpId));
+ if (CI == nullptr)
+return true;
+
+ Value = CI->getZExtValue();
+ return false;
+}
+
+static bool parseRootConstants(LLVMContext *Ctx, mcdxbc::RootSignatureDesc
&RSD,
+ MDNode *RootFlagNode) {
+
+ if (RootFlagNode->getNumOperands() != 5)
+return reportError(Ctx, "Invalid format for RootConstants Element");
+
+ mcdxbc::RootParameter NewParameter;
+ NewParameter.Header.ParameterType = dxbc::RootParameterType::Constants32Bit;
+
+ uint32_t SV;
+ if (extractMdValue(SV, RootFlagNode, 1))
+return reportError(Ctx, "Invalid value for ShaderVisibility");
+
+ NewParameter.Header.ShaderVisibility = (dxbc::ShaderVisibility)SV;
+
+ if (extractMdValue(NewParameter.Constants.ShaderRegister, RootFlagNode, 2))
+return reportError(Ctx, "Invalid value for ShaderRegister");
+
+ if (extractMdValue(NewParameter.Constants.RegisterSpace, RootFlagNode, 3))
+return reportError(Ctx, "Invalid value for RegisterSpace");
+
+ if (extractMdValue(NewParameter.Constants.Num32BitValues, RootFlagNode, 4))
+return reportError(Ctx, "Invalid value for Num32BitValues");
+
+ RSD.Parameters.push_back(NewParameter);
+
+ return false;
+}
+
static bool parseRootSignatureElement(LLVMContext *Ctx,
mcdxbc::RootSignatureDesc &RSD,
MDNode *Element) {
@@ -62,12 +108,16 @@ static bool parseRootSignatureElement(LLVMContext *Ctx,
RootSignatureElementKind ElementKind =
StringSwitch(ElementText->getString())
.Case("RootFlags", RootSignatureElementKind::RootFlags)
+ .Case("RootConstants", RootSignatureElementKind::RootConstants)
.Default(RootSignatureElementKind::Error);
switch (ElementKind) {
case RootSignatureElementKind::RootFlags:
return parseRootFlags(Ctx, RSD, Element);
+ case RootSignatureElementKind::RootConstants:
+return parseRootConstants(Ctx, RSD, Element);
+break;
case RootSignatureElementKind::Error:
return reportError(Ctx, "Invalid Root Signature Element: " +
ElementText->getString());
@@ -94,10 +144,56 @@ static bool parse(LLVMContext *Ctx,
mcdxbc::RootSignatureDesc &RSD,
static bool verifyRootFlag(uint32_t Flags) { return (Flags & ~0xfff) == 0; }
+static bool verifyShaderVisibility(dxbc::ShaderVisibility Flags) {
+ switch (Flags) {
+
+ case dxbc::ShaderVisibility::All:
+ case dxbc::ShaderVisibility::Vertex:
+ case dxbc::ShaderVisibility::Hull:
+ case dxbc::ShaderVisibility::Domain:
+ case dxbc::ShaderVisibility::Geometry:
+ case dxbc::ShaderVisibility::Pixel:
+ case dxbc::ShaderVisibility::Amplification:
+ case dxbc::ShaderVisibility::Mesh:
+return true;
+ }
+
+ return false;
+}
+
+static bool verifyParameterType(dxbc::RootParameterType Flags) {
+ switch (Flags) {
+ case dxbc::RootParameterType::Constants32Bit:
+return true;
+ }
+
+ return false;
+}
+
+static bool verifyVersion(uint32_t Version) {
+ return (Version == 1 || Version == 2);
+}
+
static bool validate(LLVMContext *Ctx, const mcdxbc::RootSignatureDe
[llvm-branch-commits] [SPARC] Use lzcnt to implement CTLZ when we have VIS3 (PR #135715)
@@ -1815,7 +1817,8 @@ SparcTargetLowering::SparcTargetLowering(const TargetMachine &TM, setOperationAction(ISD::FREM , MVT::f32, Expand); setOperationAction(ISD::FMA , MVT::f32, Expand); setOperationAction(ISD::CTTZ , MVT::i32, Expand); - setOperationAction(ISD::CTLZ , MVT::i32, Expand); + setOperationAction(ISD::CTLZ, MVT::i32, + Subtarget->isVIS3() ? Promote : LibCall); s-barannikov wrote: But it doesn't produce `clzsi2` on a 64-bit system, and this may be an issue if there is no such function. https://github.com/llvm/llvm-project/pull/135715 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [SPARC] Use lzcnt to implement CTLZ when we have VIS3 (PR #135715)
@@ -1815,7 +1817,8 @@ SparcTargetLowering::SparcTargetLowering(const TargetMachine &TM, setOperationAction(ISD::FREM , MVT::f32, Expand); setOperationAction(ISD::FMA , MVT::f32, Expand); setOperationAction(ISD::CTTZ , MVT::i32, Expand); - setOperationAction(ISD::CTLZ , MVT::i32, Expand); + setOperationAction(ISD::CTLZ, MVT::i32, + Subtarget->isVIS3() ? Promote : LibCall); koachan wrote: Oof yeah, missed it. `clzsi2` seems to be unavailable on 64-bit environment, yes. https://github.com/llvm/llvm-project/pull/135715 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] release/20.x: [clang][AST] Handle implicit first argument in CallExpr::getBeginLoc() (PR #135927)
https://github.com/AaronBallman approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/135927 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [NFC][CFI] Add test to check for '-flto' and '-fvisibility=' flags (PR #135892)
https://github.com/vitalybuka updated https://github.com/llvm/llvm-project/pull/135892 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [NFC][CFI] Add test to check for '-flto' and '-fvisibility=' flags (PR #135892)
https://github.com/vitalybuka updated https://github.com/llvm/llvm-project/pull/135892 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [NFC][Driver][CFI] Rename to clarify purpose of CFI runtime (PR #135885)
https://github.com/vitalybuka updated https://github.com/llvm/llvm-project/pull/135885 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [NFC][Driver][CFI] Rename to clarify purpose of CFI runtime (PR #135885)
https://github.com/vitalybuka updated https://github.com/llvm/llvm-project/pull/135885 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [NFC][CFI] Don't mix CFI and non-CFI flags on the same line (PR #135890)
https://github.com/vitalybuka updated https://github.com/llvm/llvm-project/pull/135890 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [compiler-rt] [llvm] Reentry (PR #135656)
https://github.com/mtrofin updated
https://github.com/llvm/llvm-project/pull/135656
>From d2502c89927e7f013a1f71f0dc5a52f390dc8c8e Mon Sep 17 00:00:00 2001
From: Mircea Trofin
Date: Mon, 14 Apr 2025 07:19:58 -0700
Subject: [PATCH] Reentry
---
.../lib/ctx_profile/CtxInstrProfiling.cpp | 151 --
.../tests/CtxInstrProfilingTest.cpp | 115 -
.../llvm/ProfileData/CtxInstrContextNode.h| 6 +-
.../Instrumentation/PGOCtxProfLowering.cpp| 82 ++
.../PGOProfile/ctx-instrumentation.ll | 4 +-
5 files changed, 269 insertions(+), 89 deletions(-)
diff --git a/compiler-rt/lib/ctx_profile/CtxInstrProfiling.cpp
b/compiler-rt/lib/ctx_profile/CtxInstrProfiling.cpp
index 2d173f0fcb19a..2e26541c1acea 100644
--- a/compiler-rt/lib/ctx_profile/CtxInstrProfiling.cpp
+++ b/compiler-rt/lib/ctx_profile/CtxInstrProfiling.cpp
@@ -41,7 +41,44 @@ Arena *FlatCtxArena = nullptr;
// Set to true when we enter a root, and false when we exit - regardless if
this
// thread collects a contextual profile for that root.
-__thread bool IsUnderContext = false;
+__thread int UnderContextRefCount = 0;
+__thread void *volatile EnteredContextAddress = 0;
+
+void onFunctionEntered(void *Address) {
+ UnderContextRefCount += (Address == EnteredContextAddress);
+ assert(UnderContextRefCount > 0);
+}
+
+void onFunctionExited(void *Address) {
+ UnderContextRefCount -= (Address == EnteredContextAddress);
+ assert(UnderContextRefCount >= 0);
+}
+
+// Returns true if it was entered the first time
+bool rootEnterIsFirst(void* Address) {
+ bool Ret = true;
+ if (!EnteredContextAddress) {
+EnteredContextAddress = Address;
+assert(UnderContextRefCount == 0);
+Ret = true;
+ }
+ onFunctionEntered(Address);
+ return Ret;
+}
+
+// Return true if this also exits the root.
+bool exitsRoot(void* Address) {
+ onFunctionExited(Address);
+ if (UnderContextRefCount == 0) {
+EnteredContextAddress = nullptr;
+return true;
+ }
+ return false;
+
+}
+
+bool hasEnteredARoot() { return UnderContextRefCount > 0; }
+
__sanitizer::atomic_uint8_t ProfilingStarted = {};
__sanitizer::atomic_uintptr_t RootDetector = {};
@@ -287,62 +324,65 @@ ContextRoot *FunctionData::getOrAllocateContextRoot() {
return Root;
}
-ContextNode *tryStartContextGivenRoot(ContextRoot *Root, GUID Guid,
- uint32_t Counters, uint32_t Callsites)
-SANITIZER_NO_THREAD_SAFETY_ANALYSIS {
- IsUnderContext = true;
- __sanitizer::atomic_fetch_add(&Root->TotalEntries, 1,
-__sanitizer::memory_order_relaxed);
+ContextNode *tryStartContextGivenRoot(
+ContextRoot *Root, void *EntryAddress, GUID Guid, uint32_t Counters,
+uint32_t Callsites) SANITIZER_NO_THREAD_SAFETY_ANALYSIS {
+
+ if (rootEnterIsFirst(EntryAddress))
+__sanitizer::atomic_fetch_add(&Root->TotalEntries, 1,
+ __sanitizer::memory_order_relaxed);
if (!Root->FirstMemBlock) {
setupContext(Root, Guid, Counters, Callsites);
}
if (Root->Taken.TryLock()) {
+assert(__llvm_ctx_profile_current_context_root == nullptr);
__llvm_ctx_profile_current_context_root = Root;
onContextEnter(*Root->FirstNode);
return Root->FirstNode;
}
// If this thread couldn't take the lock, return scratch context.
- __llvm_ctx_profile_current_context_root = nullptr;
return TheScratchContext;
}
+ContextNode *getOrStartContextOutsideCollection(FunctionData &Data,
+ContextRoot *OwnCtxRoot,
+void *Callee, GUID Guid,
+uint32_t NumCounters,
+uint32_t NumCallsites) {
+ // This must only be called when __llvm_ctx_profile_current_context_root is
+ // null.
+ assert(__llvm_ctx_profile_current_context_root == nullptr);
+ // OwnCtxRoot is Data.CtxRoot. Since it's volatile, and is used by the
caller,
+ // pre-load it.
+ assert(Data.CtxRoot == OwnCtxRoot);
+ // If we have a root detector, try sampling.
+ // Otherwise - regardless if we started profiling or not, if Data.CtxRoot is
+ // allocated, try starting a context tree - basically, as-if
+ // __llvm_ctx_profile_start_context were called.
+ if (auto *RAD = getRootDetector())
+RAD->sample();
+ else if (reinterpret_cast(OwnCtxRoot) > 1)
+return tryStartContextGivenRoot(OwnCtxRoot, Data.EntryAddress, Guid,
+NumCounters, NumCallsites);
+
+ // If we didn't start profiling, or if we are under a context, just not
+ // collecting, return the scratch buffer.
+ if (hasEnteredARoot() ||
+ !__sanitizer::atomic_load_relaxed(&ProfilingStarted))
+return TheScratchContext;
+ return markAsScratch(
+ onContextEnter(*getFlatProfile(Data, Callee, Guid, NumCounters)));
+}
+
ContextNode *getUnhandledContext(FunctionData &Data, void
[llvm-branch-commits] [compiler-rt] [llvm] Reentry (PR #135656)
https://github.com/mtrofin updated
https://github.com/llvm/llvm-project/pull/135656
>From d2502c89927e7f013a1f71f0dc5a52f390dc8c8e Mon Sep 17 00:00:00 2001
From: Mircea Trofin
Date: Mon, 14 Apr 2025 07:19:58 -0700
Subject: [PATCH] Reentry
---
.../lib/ctx_profile/CtxInstrProfiling.cpp | 151 --
.../tests/CtxInstrProfilingTest.cpp | 115 -
.../llvm/ProfileData/CtxInstrContextNode.h| 6 +-
.../Instrumentation/PGOCtxProfLowering.cpp| 82 ++
.../PGOProfile/ctx-instrumentation.ll | 4 +-
5 files changed, 269 insertions(+), 89 deletions(-)
diff --git a/compiler-rt/lib/ctx_profile/CtxInstrProfiling.cpp
b/compiler-rt/lib/ctx_profile/CtxInstrProfiling.cpp
index 2d173f0fcb19a..2e26541c1acea 100644
--- a/compiler-rt/lib/ctx_profile/CtxInstrProfiling.cpp
+++ b/compiler-rt/lib/ctx_profile/CtxInstrProfiling.cpp
@@ -41,7 +41,44 @@ Arena *FlatCtxArena = nullptr;
// Set to true when we enter a root, and false when we exit - regardless if
this
// thread collects a contextual profile for that root.
-__thread bool IsUnderContext = false;
+__thread int UnderContextRefCount = 0;
+__thread void *volatile EnteredContextAddress = 0;
+
+void onFunctionEntered(void *Address) {
+ UnderContextRefCount += (Address == EnteredContextAddress);
+ assert(UnderContextRefCount > 0);
+}
+
+void onFunctionExited(void *Address) {
+ UnderContextRefCount -= (Address == EnteredContextAddress);
+ assert(UnderContextRefCount >= 0);
+}
+
+// Returns true if it was entered the first time
+bool rootEnterIsFirst(void* Address) {
+ bool Ret = true;
+ if (!EnteredContextAddress) {
+EnteredContextAddress = Address;
+assert(UnderContextRefCount == 0);
+Ret = true;
+ }
+ onFunctionEntered(Address);
+ return Ret;
+}
+
+// Return true if this also exits the root.
+bool exitsRoot(void* Address) {
+ onFunctionExited(Address);
+ if (UnderContextRefCount == 0) {
+EnteredContextAddress = nullptr;
+return true;
+ }
+ return false;
+
+}
+
+bool hasEnteredARoot() { return UnderContextRefCount > 0; }
+
__sanitizer::atomic_uint8_t ProfilingStarted = {};
__sanitizer::atomic_uintptr_t RootDetector = {};
@@ -287,62 +324,65 @@ ContextRoot *FunctionData::getOrAllocateContextRoot() {
return Root;
}
-ContextNode *tryStartContextGivenRoot(ContextRoot *Root, GUID Guid,
- uint32_t Counters, uint32_t Callsites)
-SANITIZER_NO_THREAD_SAFETY_ANALYSIS {
- IsUnderContext = true;
- __sanitizer::atomic_fetch_add(&Root->TotalEntries, 1,
-__sanitizer::memory_order_relaxed);
+ContextNode *tryStartContextGivenRoot(
+ContextRoot *Root, void *EntryAddress, GUID Guid, uint32_t Counters,
+uint32_t Callsites) SANITIZER_NO_THREAD_SAFETY_ANALYSIS {
+
+ if (rootEnterIsFirst(EntryAddress))
+__sanitizer::atomic_fetch_add(&Root->TotalEntries, 1,
+ __sanitizer::memory_order_relaxed);
if (!Root->FirstMemBlock) {
setupContext(Root, Guid, Counters, Callsites);
}
if (Root->Taken.TryLock()) {
+assert(__llvm_ctx_profile_current_context_root == nullptr);
__llvm_ctx_profile_current_context_root = Root;
onContextEnter(*Root->FirstNode);
return Root->FirstNode;
}
// If this thread couldn't take the lock, return scratch context.
- __llvm_ctx_profile_current_context_root = nullptr;
return TheScratchContext;
}
+ContextNode *getOrStartContextOutsideCollection(FunctionData &Data,
+ContextRoot *OwnCtxRoot,
+void *Callee, GUID Guid,
+uint32_t NumCounters,
+uint32_t NumCallsites) {
+ // This must only be called when __llvm_ctx_profile_current_context_root is
+ // null.
+ assert(__llvm_ctx_profile_current_context_root == nullptr);
+ // OwnCtxRoot is Data.CtxRoot. Since it's volatile, and is used by the
caller,
+ // pre-load it.
+ assert(Data.CtxRoot == OwnCtxRoot);
+ // If we have a root detector, try sampling.
+ // Otherwise - regardless if we started profiling or not, if Data.CtxRoot is
+ // allocated, try starting a context tree - basically, as-if
+ // __llvm_ctx_profile_start_context were called.
+ if (auto *RAD = getRootDetector())
+RAD->sample();
+ else if (reinterpret_cast(OwnCtxRoot) > 1)
+return tryStartContextGivenRoot(OwnCtxRoot, Data.EntryAddress, Guid,
+NumCounters, NumCallsites);
+
+ // If we didn't start profiling, or if we are under a context, just not
+ // collecting, return the scratch buffer.
+ if (hasEnteredARoot() ||
+ !__sanitizer::atomic_load_relaxed(&ProfilingStarted))
+return TheScratchContext;
+ return markAsScratch(
+ onContextEnter(*getFlatProfile(Data, Callee, Guid, NumCounters)));
+}
+
ContextNode *getUnhandledContext(FunctionData &Data, void
[llvm-branch-commits] [NFC][CFI] Add test to check for '-flto' and '-fvisibility=' flags (PR #135892)
https://github.com/vitalybuka updated https://github.com/llvm/llvm-project/pull/135892 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [NFC][CFI] Add test to check for '-flto' and '-fvisibility=' flags (PR #135892)
https://github.com/vitalybuka updated https://github.com/llvm/llvm-project/pull/135892 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [llvm][IR] Treat memcmp and bcmp as libcalls (PR #135706)
ilovepi wrote: First, thanks for the context. I don't see anything like this written down, so I plan to find some place in our docs to put those details. I'll be sure to CC you and other folks I think will have thoughts on the precise verbiage. The compiler's contract with libc is, from what I can tell, complicated, under specified, and mostly undocumented. Having spoke w/ some libc folks about libc semantics in the past, I don't think it will be easy to pin down all the details to the extent we want. I think writing down what you put above is just the first step. Maybe part of the issue is that I don't see a fundamental reason why libc is special beyond a few key things: - some apis will need a no-bultin-foo, to prevent their implementation from calling themselves. - some apis have well understood usage that the compiler can leverage (I'd put the memcmp->bcmp optimization in this list, but memcpy/memset are what I think of first) - malloc, because of aliasing I'm probably neglecting something obvious in that short list, but for most things, I don't think anything special needs to happen. What shouldn't happen though, is that the compiler deletes a function definition, and then reintroduces a call to that function ... maybe that's what you mean by "staying an abstraction past codegen"? I didn't initially read it that way, but I guess in that light I see where you're coming from. Put another way, I think its strictly a bug in our phase ordering to allow functions to be deleted if they may have calls introduced again. Since memcmp/bcmp are special this way(as are the existing libcalls), I guess maybe that's part of the problem. I was kind of under the impression that RuntimeLibcalls was our mechanism for handling that, though. As for making a libc cooperate w/ the compiler, perhaps there is a set of attributes we could use (or introduce?). We already have a few of these (attribute `malloc` comes to mind). Maybe for things marked as being part of libc, we only mark them as dead, but don't collect until the end. Any new calls emitted would make them alive again. I haven't thought this bit through much, yet. So, I guess let me try to explain my expectations for how we'd like the compiler to behave when LTOing a program along w/ libc. Mostly, we don't want the compiler to change its default behavior. So when it sees a call to `malloc`, the returned pointer is marked `noalias`, even if the call were inlined. For other memory routines, the compiler can either use it's own specialized implementations (like it normally does) or it can inline the call. That assumes the definitions were compiled w/ something like `-fno-builtin-memcpy` for the memcpy implementation (you know, so its functional). For anything that may have a call emitted via compiler transformation, it cannot be DCE'd until we're certain no new calls will be created. In the worst case that means we have to rely on linker GC, but maybe that's acceptable for something as limited as libc. Does that make sense? I have a feeling I'm oversimplifying something in my mental model, but I hope that's at least a reasonable set of goals as a first approximation. https://github.com/llvm/llvm-project/pull/135706 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [compiler-rt] [llvm] Reentry (PR #135656)
https://github.com/mtrofin updated
https://github.com/llvm/llvm-project/pull/135656
>From caa4002fa5ad9e1a04d20d980753d36b261fef2a Mon Sep 17 00:00:00 2001
From: Mircea Trofin
Date: Mon, 14 Apr 2025 07:19:58 -0700
Subject: [PATCH] Reentry
---
.../lib/ctx_profile/CtxInstrProfiling.cpp | 151 --
.../tests/CtxInstrProfilingTest.cpp | 115 -
.../llvm/ProfileData/CtxInstrContextNode.h| 6 +-
.../Instrumentation/PGOCtxProfLowering.cpp| 82 ++
.../PGOProfile/ctx-instrumentation.ll | 4 +-
5 files changed, 269 insertions(+), 89 deletions(-)
diff --git a/compiler-rt/lib/ctx_profile/CtxInstrProfiling.cpp
b/compiler-rt/lib/ctx_profile/CtxInstrProfiling.cpp
index 2d173f0fcb19a..2e26541c1acea 100644
--- a/compiler-rt/lib/ctx_profile/CtxInstrProfiling.cpp
+++ b/compiler-rt/lib/ctx_profile/CtxInstrProfiling.cpp
@@ -41,7 +41,44 @@ Arena *FlatCtxArena = nullptr;
// Set to true when we enter a root, and false when we exit - regardless if
this
// thread collects a contextual profile for that root.
-__thread bool IsUnderContext = false;
+__thread int UnderContextRefCount = 0;
+__thread void *volatile EnteredContextAddress = 0;
+
+void onFunctionEntered(void *Address) {
+ UnderContextRefCount += (Address == EnteredContextAddress);
+ assert(UnderContextRefCount > 0);
+}
+
+void onFunctionExited(void *Address) {
+ UnderContextRefCount -= (Address == EnteredContextAddress);
+ assert(UnderContextRefCount >= 0);
+}
+
+// Returns true if it was entered the first time
+bool rootEnterIsFirst(void* Address) {
+ bool Ret = true;
+ if (!EnteredContextAddress) {
+EnteredContextAddress = Address;
+assert(UnderContextRefCount == 0);
+Ret = true;
+ }
+ onFunctionEntered(Address);
+ return Ret;
+}
+
+// Return true if this also exits the root.
+bool exitsRoot(void* Address) {
+ onFunctionExited(Address);
+ if (UnderContextRefCount == 0) {
+EnteredContextAddress = nullptr;
+return true;
+ }
+ return false;
+
+}
+
+bool hasEnteredARoot() { return UnderContextRefCount > 0; }
+
__sanitizer::atomic_uint8_t ProfilingStarted = {};
__sanitizer::atomic_uintptr_t RootDetector = {};
@@ -287,62 +324,65 @@ ContextRoot *FunctionData::getOrAllocateContextRoot() {
return Root;
}
-ContextNode *tryStartContextGivenRoot(ContextRoot *Root, GUID Guid,
- uint32_t Counters, uint32_t Callsites)
-SANITIZER_NO_THREAD_SAFETY_ANALYSIS {
- IsUnderContext = true;
- __sanitizer::atomic_fetch_add(&Root->TotalEntries, 1,
-__sanitizer::memory_order_relaxed);
+ContextNode *tryStartContextGivenRoot(
+ContextRoot *Root, void *EntryAddress, GUID Guid, uint32_t Counters,
+uint32_t Callsites) SANITIZER_NO_THREAD_SAFETY_ANALYSIS {
+
+ if (rootEnterIsFirst(EntryAddress))
+__sanitizer::atomic_fetch_add(&Root->TotalEntries, 1,
+ __sanitizer::memory_order_relaxed);
if (!Root->FirstMemBlock) {
setupContext(Root, Guid, Counters, Callsites);
}
if (Root->Taken.TryLock()) {
+assert(__llvm_ctx_profile_current_context_root == nullptr);
__llvm_ctx_profile_current_context_root = Root;
onContextEnter(*Root->FirstNode);
return Root->FirstNode;
}
// If this thread couldn't take the lock, return scratch context.
- __llvm_ctx_profile_current_context_root = nullptr;
return TheScratchContext;
}
+ContextNode *getOrStartContextOutsideCollection(FunctionData &Data,
+ContextRoot *OwnCtxRoot,
+void *Callee, GUID Guid,
+uint32_t NumCounters,
+uint32_t NumCallsites) {
+ // This must only be called when __llvm_ctx_profile_current_context_root is
+ // null.
+ assert(__llvm_ctx_profile_current_context_root == nullptr);
+ // OwnCtxRoot is Data.CtxRoot. Since it's volatile, and is used by the
caller,
+ // pre-load it.
+ assert(Data.CtxRoot == OwnCtxRoot);
+ // If we have a root detector, try sampling.
+ // Otherwise - regardless if we started profiling or not, if Data.CtxRoot is
+ // allocated, try starting a context tree - basically, as-if
+ // __llvm_ctx_profile_start_context were called.
+ if (auto *RAD = getRootDetector())
+RAD->sample();
+ else if (reinterpret_cast(OwnCtxRoot) > 1)
+return tryStartContextGivenRoot(OwnCtxRoot, Data.EntryAddress, Guid,
+NumCounters, NumCallsites);
+
+ // If we didn't start profiling, or if we are under a context, just not
+ // collecting, return the scratch buffer.
+ if (hasEnteredARoot() ||
+ !__sanitizer::atomic_load_relaxed(&ProfilingStarted))
+return TheScratchContext;
+ return markAsScratch(
+ onContextEnter(*getFlatProfile(Data, Callee, Guid, NumCounters)));
+}
+
ContextNode *getUnhandledContext(FunctionData &Data, void
[llvm-branch-commits] [compiler-rt] [llvm] Reentry (PR #135656)
https://github.com/mtrofin updated
https://github.com/llvm/llvm-project/pull/135656
>From caa4002fa5ad9e1a04d20d980753d36b261fef2a Mon Sep 17 00:00:00 2001
From: Mircea Trofin
Date: Mon, 14 Apr 2025 07:19:58 -0700
Subject: [PATCH] Reentry
---
.../lib/ctx_profile/CtxInstrProfiling.cpp | 151 --
.../tests/CtxInstrProfilingTest.cpp | 115 -
.../llvm/ProfileData/CtxInstrContextNode.h| 6 +-
.../Instrumentation/PGOCtxProfLowering.cpp| 82 ++
.../PGOProfile/ctx-instrumentation.ll | 4 +-
5 files changed, 269 insertions(+), 89 deletions(-)
diff --git a/compiler-rt/lib/ctx_profile/CtxInstrProfiling.cpp
b/compiler-rt/lib/ctx_profile/CtxInstrProfiling.cpp
index 2d173f0fcb19a..2e26541c1acea 100644
--- a/compiler-rt/lib/ctx_profile/CtxInstrProfiling.cpp
+++ b/compiler-rt/lib/ctx_profile/CtxInstrProfiling.cpp
@@ -41,7 +41,44 @@ Arena *FlatCtxArena = nullptr;
// Set to true when we enter a root, and false when we exit - regardless if
this
// thread collects a contextual profile for that root.
-__thread bool IsUnderContext = false;
+__thread int UnderContextRefCount = 0;
+__thread void *volatile EnteredContextAddress = 0;
+
+void onFunctionEntered(void *Address) {
+ UnderContextRefCount += (Address == EnteredContextAddress);
+ assert(UnderContextRefCount > 0);
+}
+
+void onFunctionExited(void *Address) {
+ UnderContextRefCount -= (Address == EnteredContextAddress);
+ assert(UnderContextRefCount >= 0);
+}
+
+// Returns true if it was entered the first time
+bool rootEnterIsFirst(void* Address) {
+ bool Ret = true;
+ if (!EnteredContextAddress) {
+EnteredContextAddress = Address;
+assert(UnderContextRefCount == 0);
+Ret = true;
+ }
+ onFunctionEntered(Address);
+ return Ret;
+}
+
+// Return true if this also exits the root.
+bool exitsRoot(void* Address) {
+ onFunctionExited(Address);
+ if (UnderContextRefCount == 0) {
+EnteredContextAddress = nullptr;
+return true;
+ }
+ return false;
+
+}
+
+bool hasEnteredARoot() { return UnderContextRefCount > 0; }
+
__sanitizer::atomic_uint8_t ProfilingStarted = {};
__sanitizer::atomic_uintptr_t RootDetector = {};
@@ -287,62 +324,65 @@ ContextRoot *FunctionData::getOrAllocateContextRoot() {
return Root;
}
-ContextNode *tryStartContextGivenRoot(ContextRoot *Root, GUID Guid,
- uint32_t Counters, uint32_t Callsites)
-SANITIZER_NO_THREAD_SAFETY_ANALYSIS {
- IsUnderContext = true;
- __sanitizer::atomic_fetch_add(&Root->TotalEntries, 1,
-__sanitizer::memory_order_relaxed);
+ContextNode *tryStartContextGivenRoot(
+ContextRoot *Root, void *EntryAddress, GUID Guid, uint32_t Counters,
+uint32_t Callsites) SANITIZER_NO_THREAD_SAFETY_ANALYSIS {
+
+ if (rootEnterIsFirst(EntryAddress))
+__sanitizer::atomic_fetch_add(&Root->TotalEntries, 1,
+ __sanitizer::memory_order_relaxed);
if (!Root->FirstMemBlock) {
setupContext(Root, Guid, Counters, Callsites);
}
if (Root->Taken.TryLock()) {
+assert(__llvm_ctx_profile_current_context_root == nullptr);
__llvm_ctx_profile_current_context_root = Root;
onContextEnter(*Root->FirstNode);
return Root->FirstNode;
}
// If this thread couldn't take the lock, return scratch context.
- __llvm_ctx_profile_current_context_root = nullptr;
return TheScratchContext;
}
+ContextNode *getOrStartContextOutsideCollection(FunctionData &Data,
+ContextRoot *OwnCtxRoot,
+void *Callee, GUID Guid,
+uint32_t NumCounters,
+uint32_t NumCallsites) {
+ // This must only be called when __llvm_ctx_profile_current_context_root is
+ // null.
+ assert(__llvm_ctx_profile_current_context_root == nullptr);
+ // OwnCtxRoot is Data.CtxRoot. Since it's volatile, and is used by the
caller,
+ // pre-load it.
+ assert(Data.CtxRoot == OwnCtxRoot);
+ // If we have a root detector, try sampling.
+ // Otherwise - regardless if we started profiling or not, if Data.CtxRoot is
+ // allocated, try starting a context tree - basically, as-if
+ // __llvm_ctx_profile_start_context were called.
+ if (auto *RAD = getRootDetector())
+RAD->sample();
+ else if (reinterpret_cast(OwnCtxRoot) > 1)
+return tryStartContextGivenRoot(OwnCtxRoot, Data.EntryAddress, Guid,
+NumCounters, NumCallsites);
+
+ // If we didn't start profiling, or if we are under a context, just not
+ // collecting, return the scratch buffer.
+ if (hasEnteredARoot() ||
+ !__sanitizer::atomic_load_relaxed(&ProfilingStarted))
+return TheScratchContext;
+ return markAsScratch(
+ onContextEnter(*getFlatProfile(Data, Callee, Guid, NumCounters)));
+}
+
ContextNode *getUnhandledContext(FunctionData &Data, void
[llvm-branch-commits] [compiler-rt] [llvm] Reentry (PR #135656)
https://github.com/mtrofin updated
https://github.com/llvm/llvm-project/pull/135656
>From 82a52559695b52adfcf6dc4f5c4e5383b3616848 Mon Sep 17 00:00:00 2001
From: Mircea Trofin
Date: Mon, 14 Apr 2025 07:19:58 -0700
Subject: [PATCH] Reentry
---
.../lib/ctx_profile/CtxInstrProfiling.cpp | 151 --
.../tests/CtxInstrProfilingTest.cpp | 115 -
.../llvm/ProfileData/CtxInstrContextNode.h| 6 +-
.../Instrumentation/PGOCtxProfLowering.cpp| 82 ++
.../PGOProfile/ctx-instrumentation.ll | 4 +-
5 files changed, 269 insertions(+), 89 deletions(-)
diff --git a/compiler-rt/lib/ctx_profile/CtxInstrProfiling.cpp
b/compiler-rt/lib/ctx_profile/CtxInstrProfiling.cpp
index 2d173f0fcb19a..2e26541c1acea 100644
--- a/compiler-rt/lib/ctx_profile/CtxInstrProfiling.cpp
+++ b/compiler-rt/lib/ctx_profile/CtxInstrProfiling.cpp
@@ -41,7 +41,44 @@ Arena *FlatCtxArena = nullptr;
// Set to true when we enter a root, and false when we exit - regardless if
this
// thread collects a contextual profile for that root.
-__thread bool IsUnderContext = false;
+__thread int UnderContextRefCount = 0;
+__thread void *volatile EnteredContextAddress = 0;
+
+void onFunctionEntered(void *Address) {
+ UnderContextRefCount += (Address == EnteredContextAddress);
+ assert(UnderContextRefCount > 0);
+}
+
+void onFunctionExited(void *Address) {
+ UnderContextRefCount -= (Address == EnteredContextAddress);
+ assert(UnderContextRefCount >= 0);
+}
+
+// Returns true if it was entered the first time
+bool rootEnterIsFirst(void* Address) {
+ bool Ret = true;
+ if (!EnteredContextAddress) {
+EnteredContextAddress = Address;
+assert(UnderContextRefCount == 0);
+Ret = true;
+ }
+ onFunctionEntered(Address);
+ return Ret;
+}
+
+// Return true if this also exits the root.
+bool exitsRoot(void* Address) {
+ onFunctionExited(Address);
+ if (UnderContextRefCount == 0) {
+EnteredContextAddress = nullptr;
+return true;
+ }
+ return false;
+
+}
+
+bool hasEnteredARoot() { return UnderContextRefCount > 0; }
+
__sanitizer::atomic_uint8_t ProfilingStarted = {};
__sanitizer::atomic_uintptr_t RootDetector = {};
@@ -287,62 +324,65 @@ ContextRoot *FunctionData::getOrAllocateContextRoot() {
return Root;
}
-ContextNode *tryStartContextGivenRoot(ContextRoot *Root, GUID Guid,
- uint32_t Counters, uint32_t Callsites)
-SANITIZER_NO_THREAD_SAFETY_ANALYSIS {
- IsUnderContext = true;
- __sanitizer::atomic_fetch_add(&Root->TotalEntries, 1,
-__sanitizer::memory_order_relaxed);
+ContextNode *tryStartContextGivenRoot(
+ContextRoot *Root, void *EntryAddress, GUID Guid, uint32_t Counters,
+uint32_t Callsites) SANITIZER_NO_THREAD_SAFETY_ANALYSIS {
+
+ if (rootEnterIsFirst(EntryAddress))
+__sanitizer::atomic_fetch_add(&Root->TotalEntries, 1,
+ __sanitizer::memory_order_relaxed);
if (!Root->FirstMemBlock) {
setupContext(Root, Guid, Counters, Callsites);
}
if (Root->Taken.TryLock()) {
+assert(__llvm_ctx_profile_current_context_root == nullptr);
__llvm_ctx_profile_current_context_root = Root;
onContextEnter(*Root->FirstNode);
return Root->FirstNode;
}
// If this thread couldn't take the lock, return scratch context.
- __llvm_ctx_profile_current_context_root = nullptr;
return TheScratchContext;
}
+ContextNode *getOrStartContextOutsideCollection(FunctionData &Data,
+ContextRoot *OwnCtxRoot,
+void *Callee, GUID Guid,
+uint32_t NumCounters,
+uint32_t NumCallsites) {
+ // This must only be called when __llvm_ctx_profile_current_context_root is
+ // null.
+ assert(__llvm_ctx_profile_current_context_root == nullptr);
+ // OwnCtxRoot is Data.CtxRoot. Since it's volatile, and is used by the
caller,
+ // pre-load it.
+ assert(Data.CtxRoot == OwnCtxRoot);
+ // If we have a root detector, try sampling.
+ // Otherwise - regardless if we started profiling or not, if Data.CtxRoot is
+ // allocated, try starting a context tree - basically, as-if
+ // __llvm_ctx_profile_start_context were called.
+ if (auto *RAD = getRootDetector())
+RAD->sample();
+ else if (reinterpret_cast(OwnCtxRoot) > 1)
+return tryStartContextGivenRoot(OwnCtxRoot, Data.EntryAddress, Guid,
+NumCounters, NumCallsites);
+
+ // If we didn't start profiling, or if we are under a context, just not
+ // collecting, return the scratch buffer.
+ if (hasEnteredARoot() ||
+ !__sanitizer::atomic_load_relaxed(&ProfilingStarted))
+return TheScratchContext;
+ return markAsScratch(
+ onContextEnter(*getFlatProfile(Data, Callee, Guid, NumCounters)));
+}
+
ContextNode *getUnhandledContext(FunctionData &Data, void
[llvm-branch-commits] [compiler-rt] [llvm] Reentry (PR #135656)
https://github.com/mtrofin updated
https://github.com/llvm/llvm-project/pull/135656
>From 82a52559695b52adfcf6dc4f5c4e5383b3616848 Mon Sep 17 00:00:00 2001
From: Mircea Trofin
Date: Mon, 14 Apr 2025 07:19:58 -0700
Subject: [PATCH] Reentry
---
.../lib/ctx_profile/CtxInstrProfiling.cpp | 151 --
.../tests/CtxInstrProfilingTest.cpp | 115 -
.../llvm/ProfileData/CtxInstrContextNode.h| 6 +-
.../Instrumentation/PGOCtxProfLowering.cpp| 82 ++
.../PGOProfile/ctx-instrumentation.ll | 4 +-
5 files changed, 269 insertions(+), 89 deletions(-)
diff --git a/compiler-rt/lib/ctx_profile/CtxInstrProfiling.cpp
b/compiler-rt/lib/ctx_profile/CtxInstrProfiling.cpp
index 2d173f0fcb19a..2e26541c1acea 100644
--- a/compiler-rt/lib/ctx_profile/CtxInstrProfiling.cpp
+++ b/compiler-rt/lib/ctx_profile/CtxInstrProfiling.cpp
@@ -41,7 +41,44 @@ Arena *FlatCtxArena = nullptr;
// Set to true when we enter a root, and false when we exit - regardless if
this
// thread collects a contextual profile for that root.
-__thread bool IsUnderContext = false;
+__thread int UnderContextRefCount = 0;
+__thread void *volatile EnteredContextAddress = 0;
+
+void onFunctionEntered(void *Address) {
+ UnderContextRefCount += (Address == EnteredContextAddress);
+ assert(UnderContextRefCount > 0);
+}
+
+void onFunctionExited(void *Address) {
+ UnderContextRefCount -= (Address == EnteredContextAddress);
+ assert(UnderContextRefCount >= 0);
+}
+
+// Returns true if it was entered the first time
+bool rootEnterIsFirst(void* Address) {
+ bool Ret = true;
+ if (!EnteredContextAddress) {
+EnteredContextAddress = Address;
+assert(UnderContextRefCount == 0);
+Ret = true;
+ }
+ onFunctionEntered(Address);
+ return Ret;
+}
+
+// Return true if this also exits the root.
+bool exitsRoot(void* Address) {
+ onFunctionExited(Address);
+ if (UnderContextRefCount == 0) {
+EnteredContextAddress = nullptr;
+return true;
+ }
+ return false;
+
+}
+
+bool hasEnteredARoot() { return UnderContextRefCount > 0; }
+
__sanitizer::atomic_uint8_t ProfilingStarted = {};
__sanitizer::atomic_uintptr_t RootDetector = {};
@@ -287,62 +324,65 @@ ContextRoot *FunctionData::getOrAllocateContextRoot() {
return Root;
}
-ContextNode *tryStartContextGivenRoot(ContextRoot *Root, GUID Guid,
- uint32_t Counters, uint32_t Callsites)
-SANITIZER_NO_THREAD_SAFETY_ANALYSIS {
- IsUnderContext = true;
- __sanitizer::atomic_fetch_add(&Root->TotalEntries, 1,
-__sanitizer::memory_order_relaxed);
+ContextNode *tryStartContextGivenRoot(
+ContextRoot *Root, void *EntryAddress, GUID Guid, uint32_t Counters,
+uint32_t Callsites) SANITIZER_NO_THREAD_SAFETY_ANALYSIS {
+
+ if (rootEnterIsFirst(EntryAddress))
+__sanitizer::atomic_fetch_add(&Root->TotalEntries, 1,
+ __sanitizer::memory_order_relaxed);
if (!Root->FirstMemBlock) {
setupContext(Root, Guid, Counters, Callsites);
}
if (Root->Taken.TryLock()) {
+assert(__llvm_ctx_profile_current_context_root == nullptr);
__llvm_ctx_profile_current_context_root = Root;
onContextEnter(*Root->FirstNode);
return Root->FirstNode;
}
// If this thread couldn't take the lock, return scratch context.
- __llvm_ctx_profile_current_context_root = nullptr;
return TheScratchContext;
}
+ContextNode *getOrStartContextOutsideCollection(FunctionData &Data,
+ContextRoot *OwnCtxRoot,
+void *Callee, GUID Guid,
+uint32_t NumCounters,
+uint32_t NumCallsites) {
+ // This must only be called when __llvm_ctx_profile_current_context_root is
+ // null.
+ assert(__llvm_ctx_profile_current_context_root == nullptr);
+ // OwnCtxRoot is Data.CtxRoot. Since it's volatile, and is used by the
caller,
+ // pre-load it.
+ assert(Data.CtxRoot == OwnCtxRoot);
+ // If we have a root detector, try sampling.
+ // Otherwise - regardless if we started profiling or not, if Data.CtxRoot is
+ // allocated, try starting a context tree - basically, as-if
+ // __llvm_ctx_profile_start_context were called.
+ if (auto *RAD = getRootDetector())
+RAD->sample();
+ else if (reinterpret_cast(OwnCtxRoot) > 1)
+return tryStartContextGivenRoot(OwnCtxRoot, Data.EntryAddress, Guid,
+NumCounters, NumCallsites);
+
+ // If we didn't start profiling, or if we are under a context, just not
+ // collecting, return the scratch buffer.
+ if (hasEnteredARoot() ||
+ !__sanitizer::atomic_load_relaxed(&ProfilingStarted))
+return TheScratchContext;
+ return markAsScratch(
+ onContextEnter(*getFlatProfile(Data, Callee, Guid, NumCounters)));
+}
+
ContextNode *getUnhandledContext(FunctionData &Data, void
[llvm-branch-commits] [mlir] [mlir][memref][NFC] Simplify `constifyIndexValues` (PR #135940)
https://github.com/qcolombet approved this pull request. https://github.com/llvm/llvm-project/pull/135940 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [NFC][CFI] Avoid failing CFI tests (PR #135981)
llvmbot wrote:
@llvm/pr-subscribers-clang
Author: Vitaly Buka (vitalybuka)
Changes
In these tests we test correct linking flags set,
and it' confusing that command fails because of
other missing required flags.
---
Full diff: https://github.com/llvm/llvm-project/pull/135981.diff
1 Files Affected:
- (modified) clang/test/Driver/sanitizer-ld.c (+12-6)
``diff
diff --git a/clang/test/Driver/sanitizer-ld.c b/clang/test/Driver/sanitizer-ld.c
index 67ca33d676d20..a00ec029d3d46 100644
--- a/clang/test/Driver/sanitizer-ld.c
+++ b/clang/test/Driver/sanitizer-ld.c
@@ -840,7 +840,8 @@
// CHECK-CFI-PREREQ-LINUX: '-fsanitize=cfi' only allowed with '-fvisibility='
// CFI by itself does not link runtime libraries.
-// RUN: not %clang -fsanitize=cfi \
+// RUN: %clang -fsanitize=cfi \
+// RUN: -flto -fvisibility=hidden \
// RUN: --target=x86_64-unknown-linux -fuse-ld=ld -rtlib=platform \
// RUN: -resource-dir=%S/Inputs/resource_dir \
// RUN: --sysroot=%S/Inputs/basic_linux_tree \
@@ -849,7 +850,8 @@
// CHECK-CFI-LINUX: "{{.*}}ld{{(.exe)?}}"
// CFI with diagnostics links the UBSan runtime.
-// RUN: not %clang -fsanitize=cfi -fno-sanitize-trap=cfi
-fsanitize-recover=cfi \
+// RUN: %clang -fsanitize=cfi -fno-sanitize-trap=cfi -fsanitize-recover=cfi \
+// RUN: -flto -fvisibility=hidden \
// RUN: --target=x86_64-unknown-linux -fuse-ld=ld \
// RUN: -resource-dir=%S/Inputs/resource_dir \
// RUN: --sysroot=%S/Inputs/basic_linux_tree \
@@ -859,7 +861,8 @@
// CHECK-CFI-DIAG-LINUX: "--whole-archive"
"{{[^"]*}}libclang_rt.ubsan_standalone.a" "--no-whole-archive"
// Cross-DSO CFI links the CFI runtime.
-// RUN: not %clang -fsanitize=cfi -fsanitize-cfi-cross-dso \
+// RUN: %clang -fsanitize=cfi -fsanitize-cfi-cross-dso \
+// RUN: -flto -fvisibility=hidden \
// RUN: --target=x86_64-unknown-linux -fuse-ld=ld \
// RUN: -resource-dir=%S/Inputs/resource_dir \
// RUN: --sysroot=%S/Inputs/basic_linux_tree \
@@ -870,7 +873,8 @@
// CHECK-CFI-CROSS-DSO-LINUX: -export-dynamic
// Cross-DSO CFI with diagnostics links just the CFI runtime.
-// RUN: not %clang -fsanitize=cfi -fsanitize-cfi-cross-dso \
+// RUN: %clang -fsanitize=cfi -fsanitize-cfi-cross-dso \
+// RUN: -flto -fvisibility=hidden \
// RUN: -fno-sanitize-trap=cfi -fsanitize-recover=cfi \
// RUN: --target=x86_64-unknown-linux -fuse-ld=ld \
// RUN: -resource-dir=%S/Inputs/resource_dir \
@@ -882,7 +886,8 @@
// CHECK-CFI-CROSS-DSO-DIAG-LINUX: -export-dynamic
// Cross-DSO CFI on Android does not link runtime libraries.
-// RUN: not %clang -fsanitize=cfi -fsanitize-cfi-cross-dso \
+// RUN: %clang -fsanitize=cfi -fsanitize-cfi-cross-dso \
+// RUN: -flto -fvisibility=hidden \
// RUN: --target=aarch64-linux-android -fuse-ld=ld \
// RUN: -resource-dir=%S/Inputs/resource_dir \
// RUN: --sysroot=%S/Inputs/basic_android_tree \
@@ -891,7 +896,8 @@
// CHECK-CFI-CROSS-DSO-ANDROID: "{{.*}}ld{{(.exe)?}}"
// Cross-DSO CFI with diagnostics on Android links just the UBSAN runtime.
-// RUN: not %clang -fsanitize=cfi -fsanitize-cfi-cross-dso \
+// RUN: %clang -fsanitize=cfi -fsanitize-cfi-cross-dso \
+// RUN: -flto -fvisibility=hidden \
// RUN: -fno-sanitize-trap=cfi -fsanitize-recover=cfi \
// RUN: --target=aarch64-linux-android -fuse-ld=ld \
// RUN: -resource-dir=%S/Inputs/resource_dir \
``
https://github.com/llvm/llvm-project/pull/135981
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [NFC][CFI] Avoid failing CFI tests (PR #135981)
https://github.com/vitalybuka created https://github.com/llvm/llvm-project/pull/135981 In these tests we test correct linking flags set, and it' confusing that command fails because of other missing required flags. ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [NFC][CFI] Avoid failing CFI tests (PR #135981)
https://github.com/thurstond approved this pull request. https://github.com/llvm/llvm-project/pull/135981 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [Driver] Add support for crtbegin.o, crtend.o and libgloss lib to BareMetal toolchain object (PR #121830)
@@ -1,5 +1,12 @@ // UNSUPPORTED: system-windows +// Test interaction with -fuse-ld=lld MaskRay wrote: For `-fuse-ld=lld` , testing `ld.lld` is probably not a good use of an extra RUN line. Could just modify one of the tests below from `-fuse-ld=` to `-fuse-ld=lld`. https://github.com/llvm/llvm-project/pull/121830 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [Driver] Add support for crtbegin.o, crtend.o and libgloss lib to BareMetal toolchain object (PR #121830)
@@ -1,5 +1,12 @@ // UNSUPPORTED: system-windows +// Test interaction with -fuse-ld=lld MaskRay wrote: You need to ensure that there is an `ld.lld` file with `-B%S/Inputs/lld` https://github.com/llvm/llvm-project/pull/121830 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [SPARC] Use lzcnt to implement CTLZ when we have VIS3 (PR #135715)
@@ -0,0 +1,313 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=sparcv9 | FileCheck %s -check-prefix=V9
+; RUN: llc < %s -mtriple=sparcv9 -mattr=popc | FileCheck %s -check-prefix=POPC
+; RUN: llc < %s -mtriple=sparcv9 -mattr=vis3 | FileCheck %s -check-prefix=VIS3
+
+define i32 @i32_nopoison(i32 %x) nounwind {
+; V9-LABEL: i32_nopoison:
+; V9: ! %bb.0:
+; V9-NEXT:cmp %o0, 0
+; V9-NEXT:be %icc, .LBB0_2
+; V9-NEXT:nop
+; V9-NEXT: ! %bb.1: ! %cond.false
+; V9-NEXT:srl %o0, 1, %o1
+; V9-NEXT:or %o0, %o1, %o0
+; V9-NEXT:srl %o0, 2, %o1
+; V9-NEXT:or %o0, %o1, %o0
+; V9-NEXT:srl %o0, 4, %o1
+; V9-NEXT:or %o0, %o1, %o0
+; V9-NEXT:srl %o0, 8, %o1
+; V9-NEXT:or %o0, %o1, %o0
+; V9-NEXT:srl %o0, 16, %o1
+; V9-NEXT:or %o0, %o1, %o0
+; V9-NEXT:xor %o0, -1, %o0
+; V9-NEXT:srl %o0, 1, %o1
+; V9-NEXT:sethi 1398101, %o2
+; V9-NEXT:or %o2, 341, %o2
+; V9-NEXT:and %o1, %o2, %o1
+; V9-NEXT:sub %o0, %o1, %o0
+; V9-NEXT:sethi 838860, %o1
+; V9-NEXT:or %o1, 819, %o1
+; V9-NEXT:and %o0, %o1, %o2
+; V9-NEXT:srl %o0, 2, %o0
+; V9-NEXT:and %o0, %o1, %o0
+; V9-NEXT:add %o2, %o0, %o0
+; V9-NEXT:srl %o0, 4, %o1
+; V9-NEXT:add %o0, %o1, %o0
+; V9-NEXT:sethi 246723, %o1
+; V9-NEXT:or %o1, 783, %o1
+; V9-NEXT:and %o0, %o1, %o0
+; V9-NEXT:sll %o0, 8, %o1
+; V9-NEXT:add %o0, %o1, %o0
+; V9-NEXT:sll %o0, 16, %o1
+; V9-NEXT:add %o0, %o1, %o0
+; V9-NEXT:retl
+; V9-NEXT:srl %o0, 24, %o0
+; V9-NEXT: .LBB0_2:
+; V9-NEXT:retl
+; V9-NEXT:mov 32, %o0
+;
+; POPC-LABEL: i32_nopoison:
+; POPC: ! %bb.0:
+; POPC-NEXT:cmp %o0, 0
+; POPC-NEXT:be %icc, .LBB0_2
+; POPC-NEXT:nop
+; POPC-NEXT: ! %bb.1: ! %cond.false
+; POPC-NEXT:srl %o0, 1, %o1
+; POPC-NEXT:or %o0, %o1, %o0
+; POPC-NEXT:srl %o0, 2, %o1
+; POPC-NEXT:or %o0, %o1, %o0
+; POPC-NEXT:srl %o0, 4, %o1
+; POPC-NEXT:or %o0, %o1, %o0
+; POPC-NEXT:srl %o0, 8, %o1
+; POPC-NEXT:or %o0, %o1, %o0
+; POPC-NEXT:srl %o0, 16, %o1
+; POPC-NEXT:or %o0, %o1, %o0
+; POPC-NEXT:xor %o0, -1, %o0
+; POPC-NEXT:srl %o0, 0, %o0
+; POPC-NEXT:retl
+; POPC-NEXT:popc %o0, %o0
+; POPC-NEXT: .LBB0_2:
+; POPC-NEXT:retl
+; POPC-NEXT:mov 32, %o0
+;
+; VIS3-LABEL: i32_nopoison:
+; VIS3: ! %bb.0:
+; VIS3-NEXT:cmp %o0, 0
+; VIS3-NEXT:be %icc, .LBB0_2
+; VIS3-NEXT:nop
+; VIS3-NEXT: ! %bb.1: ! %cond.false
+; VIS3-NEXT:sllx %o0, 32, %o0
+; VIS3-NEXT:retl
+; VIS3-NEXT:lzcnt %o0, %o0
+; VIS3-NEXT: .LBB0_2:
+; VIS3-NEXT:retl
+; VIS3-NEXT:mov 32, %o0
+ %ret = call i32 @llvm.ctlz.i32(i32 %x, i1 false)
+ ret i32 %ret
+}
+
+define i32 @i32_poison(i32 %x) nounwind {
+; V9-LABEL: i32_poison:
+; V9: ! %bb.0:
+; V9-NEXT:srl %o0, 1, %o1
+; V9-NEXT:or %o0, %o1, %o0
+; V9-NEXT:srl %o0, 2, %o1
+; V9-NEXT:or %o0, %o1, %o0
+; V9-NEXT:srl %o0, 4, %o1
+; V9-NEXT:or %o0, %o1, %o0
+; V9-NEXT:srl %o0, 8, %o1
+; V9-NEXT:or %o0, %o1, %o0
+; V9-NEXT:srl %o0, 16, %o1
+; V9-NEXT:or %o0, %o1, %o0
+; V9-NEXT:xor %o0, -1, %o0
+; V9-NEXT:srl %o0, 1, %o1
+; V9-NEXT:sethi 1398101, %o2
+; V9-NEXT:or %o2, 341, %o2
+; V9-NEXT:and %o1, %o2, %o1
+; V9-NEXT:sub %o0, %o1, %o0
+; V9-NEXT:sethi 838860, %o1
+; V9-NEXT:or %o1, 819, %o1
+; V9-NEXT:and %o0, %o1, %o2
+; V9-NEXT:srl %o0, 2, %o0
+; V9-NEXT:and %o0, %o1, %o0
+; V9-NEXT:add %o2, %o0, %o0
+; V9-NEXT:srl %o0, 4, %o1
+; V9-NEXT:add %o0, %o1, %o0
+; V9-NEXT:sethi 246723, %o1
+; V9-NEXT:or %o1, 783, %o1
+; V9-NEXT:and %o0, %o1, %o0
+; V9-NEXT:sll %o0, 8, %o1
+; V9-NEXT:add %o0, %o1, %o0
+; V9-NEXT:sll %o0, 16, %o1
+; V9-NEXT:add %o0, %o1, %o0
+; V9-NEXT:retl
+; V9-NEXT:srl %o0, 24, %o0
+;
+; POPC-LABEL: i32_poison:
+; POPC: ! %bb.0:
+; POPC-NEXT:srl %o0, 1, %o1
+; POPC-NEXT:or %o0, %o1, %o0
+; POPC-NEXT:srl %o0, 2, %o1
+; POPC-NEXT:or %o0, %o1, %o0
+; POPC-NEXT:srl %o0, 4, %o1
+; POPC-NEXT:or %o0, %o1, %o0
+; POPC-NEXT:srl %o0, 8, %o1
+; POPC-NEXT:or %o0, %o1, %o0
+; POPC-NEXT:srl %o0, 16, %o1
+; POPC-NEXT:or %o0, %o1, %o0
+; POPC-NEXT:xor %o0, -1, %o0
+; POPC-NEXT:srl %o0, 0, %o0
+; POPC-NEXT:retl
+; POPC-NEXT:popc %o0, %o0
+;
+; VIS3-LABEL: i32_poison:
+; VIS3: ! %bb.0:
+; VIS3-NEXT:sllx %o0, 32, %o0
+; VIS3-NEXT:retl
+; VIS3-NEXT:lzcnt %o0, %o0
+ %ret = call i32 @llvm.ctlz.i32(i32 %x, i1 true)
+ ret i32 %ret
+}
+
+define i64 @i64_nopoison(i64 %x) nounwind {
+; V9-LABEL: i64_nopoison:
+; V9: ! %bb.0:
+; V9-NEXT:brz %o0, .LBB2_2
+; V9-NEXT:nop
+; V9-NEXT: ! %bb.1: ! %cond.false
+; V9-NEXT:srlx %o0, 1, %o1
+; V9-NEXT:or %o0, %o1, %o0
+; V9-NEXT:srlx %o0, 2, %o1
+; V9-NEXT:or %o0, %o1, %o0
+; V9-NEXT:srlx %o0, 4, %o1
+; V
[llvm-branch-commits] [SPARC] Promote i32 CTTZ when we have VIS3 (PR #135894)
@@ -1,70 +1,195 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=sparc -mcpu=v9 | FileCheck %s
+; RUN: llc < %s -mtriple=sparcv9 | FileCheck %s -check-prefix=V9
+; RUN: llc < %s -mtriple=sparcv9 -mattr=popc | FileCheck %s -check-prefix=POPC
+; RUN: llc < %s -mtriple=sparcv9 -mattr=vis3 | FileCheck %s -check-prefix=VIS3
-define i32 @f(i32 %x) {
-; CHECK-LABEL: f:
-; CHECK: .cfi_startproc
-; CHECK-NEXT: ! %bb.0: ! %entry
-; CHECK-NEXT:sub %g0, %o0, %o1
-; CHECK-NEXT:and %o0, %o1, %o1
-; CHECK-NEXT:sethi 122669, %o2
-; CHECK-NEXT:or %o2, 305, %o2
-; CHECK-NEXT:smul %o1, %o2, %o1
-; CHECK-NEXT:srl %o1, 27, %o1
-; CHECK-NEXT:sethi %hi(.LCPI0_0), %o2
-; CHECK-NEXT:add %o2, %lo(.LCPI0_0), %o2
-; CHECK-NEXT:ldub [%o2+%o1], %o1
-; CHECK-NEXT:cmp %o0, 0
-; CHECK-NEXT:move %icc, 0, %o1
-; CHECK-NEXT:retl
-; CHECK-NEXT:mov %o1, %o0
-entry:
- %0 = call i32 @llvm.cttz.i32(i32 %x, i1 true)
- %1 = icmp eq i32 %x, 0
- %2 = select i1 %1, i32 0, i32 %0
- %3 = trunc i32 %2 to i8
- %conv = zext i8 %3 to i32
- ret i32 %conv
+define i32 @i32_nopoison(i32 %x) nounwind {
+; V9-LABEL: i32_nopoison:
+; V9: ! %bb.0:
+; V9-NEXT:cmp %o0, 0
+; V9-NEXT:be %icc, .LBB0_2
+; V9-NEXT:nop
+; V9-NEXT: ! %bb.1: ! %cond.false
+; V9-NEXT:sub %g0, %o0, %o1
+; V9-NEXT:and %o0, %o1, %o0
+; V9-NEXT:sethi 122669, %o1
+; V9-NEXT:or %o1, 305, %o1
+; V9-NEXT:mulx %o0, %o1, %o0
+; V9-NEXT:srl %o0, 27, %o0
+; V9-NEXT:srl %o0, 0, %o0
+; V9-NEXT:sethi %h44(.LCPI0_0), %o1
+; V9-NEXT:add %o1, %m44(.LCPI0_0), %o1
+; V9-NEXT:sllx %o1, 12, %o1
+; V9-NEXT:add %o1, %l44(.LCPI0_0), %o1
+; V9-NEXT:retl
+; V9-NEXT:ldub [%o1+%o0], %o0
+; V9-NEXT: .LBB0_2:
+; V9-NEXT:retl
+; V9-NEXT:mov 32, %o0
koachan wrote:
So unfortunately setting CTTZ and/or CTTZ_ZERO_UNDEF to LibCall results in a
crash like those:
```
LLVM ERROR: Cannot select: t3: i32 = cttz_zero_undef t2
t2: i32,ch = CopyFromReg t0, Register:i32 %0
t1: i32 = Register %0
In function: i32_nopoison
```
I'll just FIXME them for the time being, I think.
https://github.com/llvm/llvm-project/pull/135894
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[llvm-branch-commits] [NFC][CFI] Avoid failing CFI tests (PR #135981)
https://github.com/vitalybuka edited https://github.com/llvm/llvm-project/pull/135981 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [mlir] [mlir][memref][NFC] Simplify `constifyIndexValues` (PR #135940)
@@ -88,101 +88,30 @@ SmallVector memref::getMixedSizes(OpBuilder
&builder,
// Utility functions for propagating static information
//===--===//
-/// Helper function that infers the constant values from a list of \p values,
-/// a \p memRefTy, and another helper function \p getAttributes.
-/// The inferred constant values replace the related `OpFoldResult` in
-/// \p values.
+/// Helper function that sets values[i] to constValues[i] if the latter is a
+/// static value, as indicated by ShapedType::kDynamic.
///
-/// \note This function shouldn't be used directly, instead, use the
-/// `getConstifiedMixedXXX` methods from the related operations.
-///
-/// \p getAttributes retuns a list of potentially constant values, as
determined
-/// by \p isDynamic, from the given \p memRefTy. The returned list must have as
-/// many elements as \p values or be empty.
-///
-/// E.g., consider the following example:
-/// ```
-/// memref.reinterpret_cast %base to <...> strides: [2, %dyn_stride] :
-/// memref to memref>
-/// ```
-/// `ReinterpretCastOp::getMixedStrides()` will return `[2, %dyn_stride]`.
-/// Now using this helper function with:
-/// - `values == [2, %dyn_stride]`,
-/// - `memRefTy == memref>`
-/// - `getAttributes == getConstantStrides` (i.e., a wrapper around
-/// `getStridesAndOffset`), and
-/// - `isDynamic == ShapedType::isDynamic`
-/// Will yield: `values == [2, 1]`
-static void constifyIndexValues(
-SmallVectorImpl &values, MemRefType memRefTy,
-MLIRContext *ctxt,
-llvm::function_ref(MemRefType)> getAttributes,
-llvm::function_ref isDynamic) {
- SmallVector constValues = getAttributes(memRefTy);
- Builder builder(ctxt);
- for (const auto &it : llvm::enumerate(constValues)) {
-int64_t constValue = it.value();
-if (!isDynamic(constValue))
- values[it.index()] = builder.getIndexAttr(constValue);
- }
- for (OpFoldResult &ofr : values) {
-if (auto attr = dyn_cast(ofr)) {
- // FIXME: We shouldn't need to do that, but right now, the static indices
- // are created with the wrong type: `i64` instead of `index`.
- // As a result, if we were to keep the attribute as is, we may fail to
see
- // that two attributes are equal because one would have the i64 type and
- // the other the index type.
- // The alternative would be to create constant indices with getI64Attr in
- // this and the previous loop, but it doesn't logically make sense (we
are
- // dealing with indices here) and would only strenghten the inconsistency
- // around how static indices are created (some places use getI64Attr,
- // others use getIndexAttr).
- // The workaround here is to stick to the IndexAttr type for all the
- // values, hence we recreate the attribute even when it is already static
- // to make sure the type is consistent.
- ofr = builder.getIndexAttr(llvm::cast(attr).getInt());
+/// If constValues[i] is dynamic, tries to extract a constant value from
+/// value[i] to allow for additional folding opportunities. Also convertes all
+/// existing attributes to index attributes. (They may be i64 attributes.)
+static void constifyIndexValues(SmallVectorImpl &values,
+ArrayRef constValues) {
+ assert(constValues.size() == values.size() &&
+ "incorrect number of const values");
+ for (int64_t i = 0, e = constValues.size(); i < e; ++i) {
qcolombet wrote:
Could we use `enumerate` here?
https://github.com/llvm/llvm-project/pull/135940
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[llvm-branch-commits] [clang] 2586e26 - Revert "[Clang][RFC] Bypass TAD during overload resolution if a perfect match…"
Author: cor3ntin
Date: 2025-04-16T19:39:15+02:00
New Revision: 2586e26ebaaf967c441651a736b740bc2113ecc1
URL:
https://github.com/llvm/llvm-project/commit/2586e26ebaaf967c441651a736b740bc2113ecc1
DIFF:
https://github.com/llvm/llvm-project/commit/2586e26ebaaf967c441651a736b740bc2113ecc1.diff
LOG: Revert "[Clang][RFC] Bypass TAD during overload resolution if a perfect
match…"
This reverts commit facc57fc25d0f05f5834fed421662dbad3ec5b50.
Added:
Modified:
clang/docs/ReleaseNotes.rst
clang/include/clang/Sema/Overload.h
clang/lib/Sema/SemaCodeComplete.cpp
clang/lib/Sema/SemaInit.cpp
clang/lib/Sema/SemaOverload.cpp
clang/lib/Sema/SemaTemplateDeduction.cpp
clang/test/CXX/temp/temp.constr/temp.constr.atomic/constrant-satisfaction-conversions.cpp
clang/test/SemaCUDA/function-overload.cu
clang/test/SemaCXX/implicit-member-functions.cpp
clang/test/SemaTemplate/instantiate-function-params.cpp
clang/test/Templight/templight-empty-entries-fix.cpp
Removed:
clang/test/SemaCXX/overload-resolution-deferred-templates.cpp
diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index acbc9c5a6fac9..0891fd058bb57 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -96,12 +96,6 @@ C++ Language Changes
asm((std::string_view("nop")) ::: (std::string_view("memory")));
}
-- Clang now implements the changes to overload resolution proposed by section
1 and 2 of
- `P3606 `_. If a non-template candidate exists in
an overload set that is
- a perfect match (all conversion sequences are identity conversions) template
candiates are not instantiated.
- Diagnostics that would have resulted from the instantiation of these
template candidates are no longer
- produced. This aligns Clang closer to the behavior of GCC, and fixes
(#GH62096), (#GH74581), and (#GH74581).
-
C++2c Feature Support
^
diff --git a/clang/include/clang/Sema/Overload.h
b/clang/include/clang/Sema/Overload.h
index 813811af06e89..6e08762dcc6d7 100644
--- a/clang/include/clang/Sema/Overload.h
+++ b/clang/include/clang/Sema/Overload.h
@@ -407,24 +407,6 @@ class Sema;
Third == ICK_Identity;
}
-/// A conversion sequence is perfect if it is an identity conversion and
-/// the type of the source is the same as the type of the target.
-bool isPerfect(const ASTContext &C) const {
- if (!isIdentityConversion())
-return false;
- // If we are not performing a reference binding, we can skip comparing
- // the types, which has a noticeable performance impact.
- if (!ReferenceBinding) {
-assert(First || C.hasSameUnqualifiedType(getFromType(), getToType(2)));
-return true;
- }
- if (!C.hasSameType(getFromType(), getToType(2)))
-return false;
- if (BindsToRvalue && IsLvalueReference)
-return false;
- return true;
-}
-
ImplicitConversionRank getRank() const;
NarrowingKind
getNarrowingKind(ASTContext &Context, const Expr *Converted,
@@ -761,12 +743,6 @@ class Sema;
Standard.setAllToTypes(T);
}
-/// A conversion sequence is perfect if it is an identity conversion and
-/// the type of the source is the same as the type of the target.
-bool isPerfect(const ASTContext &C) const {
- return isStandard() && Standard.isPerfect(C);
-}
-
// True iff this is a conversion sequence from an initializer list to an
// array or std::initializer.
bool hasInitializerListContainerType() const {
@@ -1003,20 +979,6 @@ class Sema;
return false;
}
-// An overload is a perfect match if the conversion
-// sequences for each argument are perfect.
-bool isPerfectMatch(const ASTContext &Ctx) const {
- if (!Viable)
-return false;
- for (const auto &C : Conversions) {
-if (!C.isInitialized() || !C.isPerfect(Ctx))
- return false;
- }
- if (isa_and_nonnull(Function))
-return FinalConversion.isPerfect(Ctx);
- return true;
-}
-
bool TryToFixBadConversion(unsigned Idx, Sema &S) {
bool CanFix = Fix.tryToFixConversion(
Conversions[Idx].Bad.FromExpr,
@@ -1053,65 +1015,6 @@ class Sema;
RewriteKind(CRK_None) {}
};
- struct DeferredTemplateOverloadCandidate {
-
-// intrusive linked list support for allocateDeferredCandidate
-DeferredTemplateOverloadCandidate *Next = nullptr;
-
-enum Kind { Function, Method, Conversion };
-
-LLVM_PREFERRED_TYPE(Kind)
-unsigned Kind : 2;
-LLVM_PREFERRED_TYPE(bool)
-unsigned AllowObjCConversionOnExplicit : 1;
-LLVM_PREFERRED_TYPE(bool)
-unsigned AllowResultConversion : 1;
-LLVM_PREFERRED_TYPE(bool)
-unsigned AllowExplicit : 1;
-LLVM_PREFERRED_TYPE(bool)
-unsigned SuppressUserCon
[llvm-branch-commits] [llvm] [HLSL] Adding support for Root Constants in LLVM Metadata (PR #135085)
@@ -94,10 +144,56 @@ static bool parse(LLVMContext *Ctx,
mcdxbc::RootSignatureDesc &RSD,
static bool verifyRootFlag(uint32_t Flags) { return (Flags & ~0xfff) == 0; }
+static bool verifyShaderVisibility(dxbc::ShaderVisibility Flags) {
+ switch (Flags) {
+
+ case dxbc::ShaderVisibility::All:
+ case dxbc::ShaderVisibility::Vertex:
+ case dxbc::ShaderVisibility::Hull:
+ case dxbc::ShaderVisibility::Domain:
+ case dxbc::ShaderVisibility::Geometry:
+ case dxbc::ShaderVisibility::Pixel:
+ case dxbc::ShaderVisibility::Amplification:
+ case dxbc::ShaderVisibility::Mesh:
+return true;
+ }
+
+ return false;
+}
+
+static bool verifyParameterType(dxbc::RootParameterType Flags) {
+ switch (Flags) {
+ case dxbc::RootParameterType::Constants32Bit:
inbelic wrote:
I see. What was the reason to change the input parameter to `uint32_t`? Do we
want the printed output to be the literal metadata values? It seemed more
explicit with the enums
https://github.com/llvm/llvm-project/pull/135085
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[llvm-branch-commits] [llvm] [BOLT][test] Fix callcont-fallthru.s after #129481 (PR #135867)
aaupov wrote: @MaskRay – can you please advise how to force a PLT entry if linking with a DSO hack doesn't work? https://github.com/llvm/llvm-project/pull/135867 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lldb] [lldb] Fix SBTarget::ReadInstruction with flavor (PR #136034)
https://github.com/da-viper created
https://github.com/llvm/llvm-project/pull/136034
Backported #134626 to 20.X
>From be595e63f7050a204e5c588e656c5b6e40fb024b Mon Sep 17 00:00:00 2001
From: Ebuka Ezike
Date: Fri, 11 Apr 2025 13:45:19 +0100
Subject: [PATCH 1/2] [lldb] Fix SBTarget::ReadInstruction with flavor
(#134626)
When you call the `SBTarget::ReadInstructions` with flavor from lldb
crashes. This is because the wrong order of the `DisassemblyBytes`
constructor this fixes that
-
Signed-off-by: Ebuka Ezike
---
lldb/source/API/SBTarget.cpp | 6 +--
.../target/read-instructions-flavor/Makefile | 3 ++
.../TestTargetReadInstructionsFlavor.py | 39 +++
.../target/read-instructions-flavor/main.c| 21 ++
4 files changed, 66 insertions(+), 3 deletions(-)
create mode 100644
lldb/test/API/python_api/target/read-instructions-flavor/Makefile
create mode 100644
lldb/test/API/python_api/target/read-instructions-flavor/TestTargetReadInstructionsFlavor.py
create mode 100644
lldb/test/API/python_api/target/read-instructions-flavor/main.c
diff --git a/lldb/source/API/SBTarget.cpp b/lldb/source/API/SBTarget.cpp
index 2a33161bc21ed..665b903aff79d 100644
--- a/lldb/source/API/SBTarget.cpp
+++ b/lldb/source/API/SBTarget.cpp
@@ -2020,9 +2020,9 @@ lldb::SBInstructionList
SBTarget::ReadInstructions(lldb::SBAddress base_addr,
error, force_live_memory, &load_addr);
const bool data_from_file = load_addr == LLDB_INVALID_ADDRESS;
sb_instructions.SetDisassembler(Disassembler::DisassembleBytes(
- target_sp->GetArchitecture(), nullptr,
target_sp->GetDisassemblyCPU(),
- target_sp->GetDisassemblyFeatures(), flavor_string, *addr_ptr,
- data.GetBytes(), bytes_read, count, data_from_file));
+ target_sp->GetArchitecture(), nullptr, flavor_string,
+ target_sp->GetDisassemblyCPU(), target_sp->GetDisassemblyFeatures(),
+ *addr_ptr, data.GetBytes(), bytes_read, count, data_from_file));
}
}
diff --git a/lldb/test/API/python_api/target/read-instructions-flavor/Makefile
b/lldb/test/API/python_api/target/read-instructions-flavor/Makefile
new file mode 100644
index 0..10495940055b6
--- /dev/null
+++ b/lldb/test/API/python_api/target/read-instructions-flavor/Makefile
@@ -0,0 +1,3 @@
+C_SOURCES := main.c
+
+include Makefile.rules
diff --git
a/lldb/test/API/python_api/target/read-instructions-flavor/TestTargetReadInstructionsFlavor.py
b/lldb/test/API/python_api/target/read-instructions-flavor/TestTargetReadInstructionsFlavor.py
new file mode 100644
index 0..40edc57df21ce
--- /dev/null
+++
b/lldb/test/API/python_api/target/read-instructions-flavor/TestTargetReadInstructionsFlavor.py
@@ -0,0 +1,39 @@
+"""
+Test SBTarget Read Instruction.
+"""
+
+from lldbsuite.test.decorators import *
+from lldbsuite.test.lldbtest import *
+
+
+class TargetReadInstructionsFlavor(TestBase):
+@skipIf(archs=no_match(["x86_64", "x86", "i386"]), oslist=["windows"])
+def test_read_instructions_with_flavor(self):
+self.build()
+executable = self.getBuildArtifact("a.out")
+
+# create a target
+target = self.dbg.CreateTarget(executable)
+self.assertTrue(target.IsValid(), "target is not valid")
+
+functions = target.FindFunctions("test_add")
+self.assertEqual(len(functions), 1)
+test_add = functions[0]
+
+test_add_symbols = test_add.GetSymbol()
+self.assertTrue(
+test_add_symbols.IsValid(), "test_add function symbols is not
valid"
+)
+
+expected_instructions = (("mov", "eax, edi"), ("add", "eax, esi"),
("ret", ""))
+test_add_insts = test_add_symbols.GetInstructions(target, "intel")
+# clang adds an extra nop instruction but gcc does not. It makes more
sense
+# to check if it is at least 3
+self.assertLessEqual(len(expected_instructions), len(test_add_insts))
+
+# compares only the expected instructions
+for expected_instr, instr in zip(expected_instructions,
test_add_insts):
+self.assertTrue(instr.IsValid(), "instruction is not valid")
+expected_mnemonic, expected_op_str = expected_instr
+self.assertEqual(instr.GetMnemonic(target), expected_mnemonic)
+self.assertEqual(instr.GetOperands(target), expected_op_str)
diff --git a/lldb/test/API/python_api/target/read-instructions-flavor/main.c
b/lldb/test/API/python_api/target/read-instructions-flavor/main.c
new file mode 100644
index 0..6022d63fb6ed7
--- /dev/null
+++ b/lldb/test/API/python_api/target/read-instructions-flavor/main.c
@@ -0,0 +1,21 @@
+
+// This simple program is to test the lldb Python API SBTarget ReadInstruction
+// function.
+//
+// When the target is create we get all the instructions using the intel
+// flavor and see if it is correct.
+
+int test_add(int a, int b);
+
+__a
[llvm-branch-commits] [lldb] [lldb] Fix SBTarget::ReadInstruction with flavor (PR #136034)
llvmbot wrote:
@llvm/pr-subscribers-lldb
Author: Ebuka Ezike (da-viper)
Changes
Backported #134626 to 20.X
---
Full diff: https://github.com/llvm/llvm-project/pull/136034.diff
4 Files Affected:
- (modified) lldb/source/API/SBTarget.cpp (+3-3)
- (added) lldb/test/API/python_api/target/read-instructions-flavor/Makefile
(+3)
- (added)
lldb/test/API/python_api/target/read-instructions-flavor/TestTargetReadInstructionsFlavor.py
(+40)
- (added) lldb/test/API/python_api/target/read-instructions-flavor/main.c (+21)
``diff
diff --git a/lldb/source/API/SBTarget.cpp b/lldb/source/API/SBTarget.cpp
index 2a33161bc21ed..665b903aff79d 100644
--- a/lldb/source/API/SBTarget.cpp
+++ b/lldb/source/API/SBTarget.cpp
@@ -2020,9 +2020,9 @@ lldb::SBInstructionList
SBTarget::ReadInstructions(lldb::SBAddress base_addr,
error, force_live_memory, &load_addr);
const bool data_from_file = load_addr == LLDB_INVALID_ADDRESS;
sb_instructions.SetDisassembler(Disassembler::DisassembleBytes(
- target_sp->GetArchitecture(), nullptr,
target_sp->GetDisassemblyCPU(),
- target_sp->GetDisassemblyFeatures(), flavor_string, *addr_ptr,
- data.GetBytes(), bytes_read, count, data_from_file));
+ target_sp->GetArchitecture(), nullptr, flavor_string,
+ target_sp->GetDisassemblyCPU(), target_sp->GetDisassemblyFeatures(),
+ *addr_ptr, data.GetBytes(), bytes_read, count, data_from_file));
}
}
diff --git a/lldb/test/API/python_api/target/read-instructions-flavor/Makefile
b/lldb/test/API/python_api/target/read-instructions-flavor/Makefile
new file mode 100644
index 0..10495940055b6
--- /dev/null
+++ b/lldb/test/API/python_api/target/read-instructions-flavor/Makefile
@@ -0,0 +1,3 @@
+C_SOURCES := main.c
+
+include Makefile.rules
diff --git
a/lldb/test/API/python_api/target/read-instructions-flavor/TestTargetReadInstructionsFlavor.py
b/lldb/test/API/python_api/target/read-instructions-flavor/TestTargetReadInstructionsFlavor.py
new file mode 100644
index 0..12805985798de
--- /dev/null
+++
b/lldb/test/API/python_api/target/read-instructions-flavor/TestTargetReadInstructionsFlavor.py
@@ -0,0 +1,40 @@
+"""
+Test SBTarget Read Instruction.
+"""
+
+from lldbsuite.test.decorators import *
+from lldbsuite.test.lldbtest import *
+
+
+class TargetReadInstructionsFlavor(TestBase):
+@skipIfWindows
+@skipIf(archs=no_match(["x86_64", "x86", "i386"]))
+def test_read_instructions_with_flavor(self):
+self.build()
+executable = self.getBuildArtifact("a.out")
+
+# create a target
+target = self.dbg.CreateTarget(executable)
+self.assertTrue(target.IsValid(), "target is not valid")
+
+functions = target.FindFunctions("test_add")
+self.assertEqual(len(functions), 1)
+test_add = functions[0]
+
+test_add_symbols = test_add.GetSymbol()
+self.assertTrue(
+test_add_symbols.IsValid(), "test_add function symbols is not
valid"
+)
+
+expected_instructions = (("mov", "eax, edi"), ("add", "eax, esi"),
("ret", ""))
+test_add_insts = test_add_symbols.GetInstructions(target, "intel")
+# clang adds an extra nop instruction but gcc does not. It makes more
sense
+# to check if it is at least 3
+self.assertLessEqual(len(expected_instructions), len(test_add_insts))
+
+# compares only the expected instructions
+for expected_instr, instr in zip(expected_instructions,
test_add_insts):
+self.assertTrue(instr.IsValid(), "instruction is not valid")
+expected_mnemonic, expected_op_str = expected_instr
+self.assertEqual(instr.GetMnemonic(target), expected_mnemonic)
+self.assertEqual(instr.GetOperands(target), expected_op_str)
diff --git a/lldb/test/API/python_api/target/read-instructions-flavor/main.c
b/lldb/test/API/python_api/target/read-instructions-flavor/main.c
new file mode 100644
index 0..6022d63fb6ed7
--- /dev/null
+++ b/lldb/test/API/python_api/target/read-instructions-flavor/main.c
@@ -0,0 +1,21 @@
+
+// This simple program is to test the lldb Python API SBTarget ReadInstruction
+// function.
+//
+// When the target is create we get all the instructions using the intel
+// flavor and see if it is correct.
+
+int test_add(int a, int b);
+
+__asm__("test_add:\n"
+"movl%edi, %eax\n"
+"addl%esi, %eax\n"
+"ret \n");
+
+int main(int argc, char **argv) {
+ int a = 10;
+ int b = 20;
+ int result = test_add(a, b);
+
+ return 0;
+}
\ No newline at end of file
``
https://github.com/llvm/llvm-project/pull/136034
___
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llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [SPARC] Use lzcnt to implement CTLZ when we have VIS3 (PR #135715)
@@ -303,4 +303,10 @@ def : Pat<(i64 (mulhs i64:$lhs, i64:$rhs)), (SUBrr (UMULXHI $lhs, $rhs), (ADDrr (ANDrr (SRAXri $lhs, 63), $rhs), (ANDrr (SRAXri $rhs, 63), $lhs)))>; + +def : Pat<(i64 (ctlz i64:$src)), (LZCNT $src)>; +// 32-bit LZCNT. +// The zero extension will leave us with 32 extra leading zeros, +// so we need to compensate for it. +def : Pat<(i32 (ctlz i32:$src)), (ADDri (LZCNT (SRLri $src, 0)), (i32 -32))>; s-barannikov wrote: IIRC not all registers can be safely used on V8+ by full width. Can this be an issue? Maybe just set it to libcall on V8+ to be on the safe side? This is what gcc appears to be doing. https://github.com/llvm/llvm-project/pull/135715 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] cecfa42 - Revert "Reapply "[LLVM][TableGen] Parameterize NumToSkip in DecoderEmitter" (…"
Author: Rahul Joshi
Date: 2025-04-16T18:23:08-07:00
New Revision: cecfa425a090acdc8ed8b3442cbb890ff0cd9b11
URL:
https://github.com/llvm/llvm-project/commit/cecfa425a090acdc8ed8b3442cbb890ff0cd9b11
DIFF:
https://github.com/llvm/llvm-project/commit/cecfa425a090acdc8ed8b3442cbb890ff0cd9b11.diff
LOG: Revert "Reapply "[LLVM][TableGen] Parameterize NumToSkip in
DecoderEmitter" (…"
This reverts commit 8ebdd9d8a19543992195f197de215c53d506fb72.
Added:
Modified:
llvm/lib/Target/AArch64/CMakeLists.txt
llvm/test/TableGen/VarLenDecoder.td
llvm/test/TableGen/trydecode-emission.td
llvm/test/TableGen/trydecode-emission2.td
llvm/test/TableGen/trydecode-emission3.td
llvm/test/TableGen/trydecode-emission4.td
llvm/utils/TableGen/DecoderEmitter.cpp
Removed:
diff --git a/llvm/lib/Target/AArch64/CMakeLists.txt
b/llvm/lib/Target/AArch64/CMakeLists.txt
index ba1d1605ec104..2300e479bc110 100644
--- a/llvm/lib/Target/AArch64/CMakeLists.txt
+++ b/llvm/lib/Target/AArch64/CMakeLists.txt
@@ -7,7 +7,7 @@ tablegen(LLVM AArch64GenAsmWriter.inc -gen-asm-writer)
tablegen(LLVM AArch64GenAsmWriter1.inc -gen-asm-writer -asmwriternum=1)
tablegen(LLVM AArch64GenCallingConv.inc -gen-callingconv)
tablegen(LLVM AArch64GenDAGISel.inc -gen-dag-isel)
-tablegen(LLVM AArch64GenDisassemblerTables.inc -gen-disassembler
--num-to-skip-size=3)
+tablegen(LLVM AArch64GenDisassemblerTables.inc -gen-disassembler)
tablegen(LLVM AArch64GenFastISel.inc -gen-fast-isel)
tablegen(LLVM AArch64GenGlobalISel.inc -gen-global-isel)
tablegen(LLVM AArch64GenO0PreLegalizeGICombiner.inc -gen-global-isel-combiner
diff --git a/llvm/test/TableGen/VarLenDecoder.td
b/llvm/test/TableGen/VarLenDecoder.td
index b77702ff7c5c1..5cf0bf8911859 100644
--- a/llvm/test/TableGen/VarLenDecoder.td
+++ b/llvm/test/TableGen/VarLenDecoder.td
@@ -47,9 +47,9 @@ def FOO32 : MyVarInst {
}
// CHECK: MCD::OPC_ExtractField, 3, 5, // Inst{7-3} ...
-// CHECK-NEXT: MCD::OPC_FilterValue, 8, 4, 0, // Skip to: 11
+// CHECK-NEXT: MCD::OPC_FilterValue, 8, 4, 0, 0, // Skip to: 12
// CHECK-NEXT: MCD::OPC_Decode, {{[0-9]+}}, {{[0-9]+}}, 0, // Opcode: FOO16
-// CHECK-NEXT: MCD::OPC_FilterValue, 9, 4, 0, // Skip to: 19
+// CHECK-NEXT: MCD::OPC_FilterValue, 9, 4, 0, 0, // Skip to: 21
// CHECK-NEXT: MCD::OPC_Decode, {{[0-9]+}}, {{[0-9]+}}, 1, // Opcode: FOO32
// CHECK-NEXT: MCD::OPC_Fail,
diff --git a/llvm/test/TableGen/trydecode-emission.td
b/llvm/test/TableGen/trydecode-emission.td
index 2b4239f4fbe65..20d2446eeac7f 100644
--- a/llvm/test/TableGen/trydecode-emission.td
+++ b/llvm/test/TableGen/trydecode-emission.td
@@ -34,10 +34,10 @@ def InstB : TestInstruction {
}
// CHECK: /* 0 */ MCD::OPC_ExtractField, 4, 4, // Inst{7-4} ...
-// CHECK-NEXT: /* 3 */ MCD::OPC_FilterValue, 0, 16, 0, // Skip to: 23
-// CHECK-NEXT: /* 7 */ MCD::OPC_CheckField, 2, 2, 0, 6, 0, // Skip to: 19
-// CHECK-NEXT: /* 13 */ MCD::OPC_TryDecode, {{[0-9]+}}, {{[0-9]+}}, 0, 0,
0, // Opcode: InstB, skip to: 19
-// CHECK-NEXT: /* 19 */ MCD::OPC_Decode, {{[0-9]+}}, {{[0-9]+}}, 1, //
Opcode: InstA
-// CHECK-NEXT: /* 23 */ MCD::OPC_Fail,
+// CHECK-NEXT: /* 3 */ MCD::OPC_FilterValue, 0, 18, 0, 0, // Skip to: 26
+// CHECK-NEXT: /* 8 */ MCD::OPC_CheckField, 2, 2, 0, 7, 0, 0, // Skip
to: 22
+// CHECK-NEXT: /* 15 */ MCD::OPC_TryDecode, {{[0-9]+}}, {{[0-9]+}}, 0, 0,
0, 0, // Opcode: InstB, skip to: 22
+// CHECK-NEXT: /* 22 */ MCD::OPC_Decode, {{[0-9]+}}, {{[0-9]+}}, 1, //
Opcode: InstA
+// CHECK-NEXT: /* 26 */ MCD::OPC_Fail,
// CHECK: if (!Check(S, DecodeInstB(MI, insn, Address, Decoder))) {
DecodeComplete = false; return MCDisassembler::Fail; }
diff --git a/llvm/test/TableGen/trydecode-emission2.td
b/llvm/test/TableGen/trydecode-emission2.td
index 7d30474058f73..0584034e41233 100644
--- a/llvm/test/TableGen/trydecode-emission2.td
+++ b/llvm/test/TableGen/trydecode-emission2.td
@@ -31,14 +31,14 @@ def InstB : TestInstruction {
}
// CHECK: /* 0 */ MCD::OPC_ExtractField, 2, 1, // Inst{2} ...
-// CHECK-NEXT: /* 3 */ MCD::OPC_FilterValue, 0, 31, 0, // Skip to: 38
-// CHECK-NEXT: /* 7 */ MCD::OPC_ExtractField, 5, 3, // Inst{7-5} ...
-// CHECK-NEXT: /* 10 */ MCD::OPC_FilterValue, 0, 24, 0, // Skip to: 38
-// CHECK-NEXT: /* 14 */ MCD::OPC_CheckField, 0, 2, 3, 6, 0, // Skip to: 26
-// CHECK-NEXT: /* 20 */ MCD::OPC_TryDecode, {{[0-9]+}}, {{[0-9]+}}, 0, 0,
0, // Opcode: InstB, skip to: 26
-// CHECK-NEXT: /* 26 */ MCD::OPC_CheckField, 3, 2, 0, 6, 0, // Skip to: 38
-// CHECK-NEXT: /* 32 */ MCD::OPC_TryDecode, {{[0-9]+}}, {{[0-9]+}}, 1, 0,
0, // Opcode: InstA, skip to: 38
-// CHECK-NEXT: /* 38 */ MCD::OPC_Fail,
+// CHECK-NEXT: /* 3 */ MCD::OPC_FilterValue, 0, 36, 0, 0, // Skip to: 44
+// CHECK-NEXT: /* 8 */ MCD::OPC_ExtractField, 5, 3, // Inst{7-5} ...
+// CH
[llvm-branch-commits] [SPARC] Promote i32 CTTZ when we have VIS3 (PR #135894)
https://github.com/koachan updated https://github.com/llvm/llvm-project/pull/135894 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lldb] e70b828 - Revert "[CI] monolithic-linux improvements (#135499)"
Author: Younan Zhang
Date: 2025-04-17T11:45:52+08:00
New Revision: e70b8283d7778568ff715f8cc400732ad92ac321
URL:
https://github.com/llvm/llvm-project/commit/e70b8283d7778568ff715f8cc400732ad92ac321
DIFF:
https://github.com/llvm/llvm-project/commit/e70b8283d7778568ff715f8cc400732ad92ac321.diff
LOG: Revert "[CI] monolithic-linux improvements (#135499)"
This reverts commit a399c6926a8701083c767cbb041e22ff92e9d717.
Added:
Modified:
.ci/compute_projects.py
.ci/compute_projects_test.py
.ci/monolithic-linux.sh
lldb/test/requirements.txt
Removed:
diff --git a/.ci/compute_projects.py b/.ci/compute_projects.py
index 17a2136a270d5..ff43547c9bbe5 100644
--- a/.ci/compute_projects.py
+++ b/.ci/compute_projects.py
@@ -52,9 +52,6 @@
"clang": {"clang-tools-extra", "compiler-rt", "cross-project-tests"},
"clang-tools-extra": {"libc"},
"mlir": {"flang"},
-# Test everything if ci scripts are changed.
-# FIXME: Figure out what is missing and add here.
-".ci": {"llvm", "clang", "lld", "lldb"},
}
DEPENDENT_RUNTIMES_TO_TEST = {"clang": {"libcxx", "libcxxabi", "libunwind"}}
@@ -133,11 +130,12 @@ def _add_dependencies(projects: Set[str]) -> Set[str]:
def _compute_projects_to_test(modified_projects: Set[str], platform: str) ->
Set[str]:
projects_to_test = set()
for modified_project in modified_projects:
+# Skip all projects where we cannot run tests.
+if modified_project not in PROJECT_CHECK_TARGETS:
+continue
if modified_project in RUNTIMES:
continue
-# Skip all projects where we cannot run tests.
-if modified_project in PROJECT_CHECK_TARGETS:
-projects_to_test.add(modified_project)
+projects_to_test.add(modified_project)
if modified_project not in DEPENDENTS_TO_TEST:
continue
for dependent_project in DEPENDENTS_TO_TEST[modified_project]:
diff --git a/.ci/compute_projects_test.py b/.ci/compute_projects_test.py
index 1ab1c82498932..e787fd8133c86 100644
--- a/.ci/compute_projects_test.py
+++ b/.ci/compute_projects_test.py
@@ -188,19 +188,6 @@ def test_exclude_gn(self):
self.assertEqual(env_variables["runtimes_to_build"], "")
self.assertEqual(env_variables["runtimes_check_targets"], "")
- def test_ci(self):
-env_variables = compute_projects.get_env_variables(
-[".ci/compute_projects.py"], "Linux"
-)
-self.assertEqual(env_variables["projects_to_build"],
- "clang;lld;llvm;lldb")
-self.assertEqual(env_variables["project_check_targets"], "check-clang
- check-lld check-llvm check-lldb")
-self.assertEqual(env_variables["runtimes_to_build"],
- "libcxx;libcxxabi;libunwind")
-self.assertEqual(env_variables["runtimes_check_targets"], "check-cxx
- check-cxxabi check-unwind")
-
if __name__ == "__main__":
unittest.main()
diff --git a/.ci/monolithic-linux.sh b/.ci/monolithic-linux.sh
index f81a14cca6cb3..6461c9d40ad59 100755
--- a/.ci/monolithic-linux.sh
+++ b/.ci/monolithic-linux.sh
@@ -18,6 +18,7 @@ set -o pipefail
MONOREPO_ROOT="${MONOREPO_ROOT:="$(git rev-parse --show-toplevel)"}"
BUILD_DIR="${BUILD_DIR:=${MONOREPO_ROOT}/build}"
+INSTALL_DIR="${BUILD_DIR}/install"
rm -rf "${BUILD_DIR}"
ccache --zero-stats
@@ -27,14 +28,10 @@ if [[ -n "${CLEAR_CACHE:-}" ]]; then
ccache --clear
fi
-mkdir -p artifacts/reproducers
-
-# Make sure any clang reproducers will end up as artifacts.
-export CLANG_CRASH_DIAGNOSTICS_DIR=`realpath artifacts/reproducers`
-
function at-exit {
retcode=$?
+ mkdir -p artifacts
ccache --print-stats > artifacts/ccache_stats.txt
cp "${BUILD_DIR}"/.ninja_log artifacts/.ninja_log
@@ -53,28 +50,17 @@ trap at-exit EXIT
projects="${1}"
targets="${2}"
-runtimes="${3}"
lit_args="-v --xunit-xml-output ${BUILD_DIR}/test-results.xml
--use-unique-output-file-name --timeout=1200 --time-tests"
echo "--- cmake"
-
export PIP_BREAK_SYSTEM_PACKAGES=1
pip install -q -r "${MONOREPO_ROOT}"/mlir/python/requirements.txt
pip install -q -r "${MONOREPO_ROOT}"/lldb/test/requirements.txt
pip install -q -r "${MONOREPO_ROOT}"/.ci/requirements.txt
-
-# Set the system llvm-symbolizer as preferred.
-export LLVM_SYMBOLIZER_PATH=`which llvm-symbolizer`
-[[ ! -f "${LLVM_SYMBOLIZER_PATH}" ]] && echo "llvm-symbolizer not found!"
-
-# Set up all runtimes either way. libcxx is a dependency of LLDB.
-# If it ends up being unused, not much harm.
cmake -S "${MONOREPO_ROOT}"/llvm -B "${BUILD_DIR}" \
-D LLVM_ENABLE_PROJECTS="${projects}" \
- -D LLVM_ENABLE_RUNTIMES="libcxx;libcxxabi;libunwind" \
-G Ninja \
- -D CMAKE_PREFIX_PATH="${HOME}/.local" \
-D CMAKE_BUILD_TYPE=Release \
-D LLVM_ENABLE_ASSERTIONS=ON \
-D LLVM_BUILD_E
[llvm-branch-commits] [llvm] [SPARC] Use lzcnt to implement CTLZ when we have VIS3 (PR #135715)
https://github.com/koachan updated
https://github.com/llvm/llvm-project/pull/135715
>From 6e865810ea2acaf636a4759fd4ffc67aa3dbb848 Mon Sep 17 00:00:00 2001
From: Koakuma
Date: Thu, 17 Apr 2025 08:24:54 +0700
Subject: [PATCH] Promote i32 CTLZ when we don't have VIS3 or POPC
Created using spr 1.3.5
---
llvm/lib/Target/Sparc/SparcISelLowering.cpp | 11 +-
llvm/test/CodeGen/SPARC/ctlz.ll | 182 +++-
2 files changed, 35 insertions(+), 158 deletions(-)
diff --git a/llvm/lib/Target/Sparc/SparcISelLowering.cpp
b/llvm/lib/Target/Sparc/SparcISelLowering.cpp
index fa544916aebb5..e455706b0528f 100644
--- a/llvm/lib/Target/Sparc/SparcISelLowering.cpp
+++ b/llvm/lib/Target/Sparc/SparcISelLowering.cpp
@@ -1755,7 +1755,7 @@ SparcTargetLowering::SparcTargetLowering(const
TargetMachine &TM,
Subtarget->usePopc() ? Legal : Expand);
setOperationAction(ISD::CTTZ , MVT::i64, Expand);
setOperationAction(ISD::CTLZ, MVT::i64,
- Subtarget->isVIS3() ? Legal : LibCall);
+ Subtarget->isVIS3() ? Legal : Expand);
setOperationAction(ISD::BSWAP, MVT::i64, Expand);
setOperationAction(ISD::ROTL , MVT::i64, Expand);
setOperationAction(ISD::ROTR , MVT::i64, Expand);
@@ -1818,7 +1818,7 @@ SparcTargetLowering::SparcTargetLowering(const
TargetMachine &TM,
setOperationAction(ISD::FMA , MVT::f32, Expand);
setOperationAction(ISD::CTTZ , MVT::i32, Expand);
setOperationAction(ISD::CTLZ, MVT::i32,
- Subtarget->isVIS3() ? Promote : LibCall);
+ Subtarget->isVIS3() ? Promote : Expand);
setOperationAction(ISD::ROTL , MVT::i32, Expand);
setOperationAction(ISD::ROTR , MVT::i32, Expand);
setOperationAction(ISD::BSWAP, MVT::i32, Expand);
@@ -1992,6 +1992,13 @@ SparcTargetLowering::SparcTargetLowering(const
TargetMachine &TM,
if (Subtarget->isVIS3()) {
setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i32, Promote);
setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i64, Legal);
+ } else if (Subtarget->usePopc()) {
+setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i32, Expand);
+setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i64, Expand);
+ } else {
+setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i32,
+ Subtarget->is64Bit() ? Promote : LibCall);
+setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i64, LibCall);
}
setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom);
diff --git a/llvm/test/CodeGen/SPARC/ctlz.ll b/llvm/test/CodeGen/SPARC/ctlz.ll
index d17b776ca0a72..3391af02e4bc0 100644
--- a/llvm/test/CodeGen/SPARC/ctlz.ll
+++ b/llvm/test/CodeGen/SPARC/ctlz.ll
@@ -6,46 +6,18 @@
define i32 @i32_nopoison(i32 %x) nounwind {
; V9-LABEL: i32_nopoison:
; V9: ! %bb.0:
-; V9-NEXT:cmp %o0, 0
+; V9-NEXT:save %sp, -176, %sp
+; V9-NEXT:cmp %i0, 0
; V9-NEXT:be %icc, .LBB0_2
; V9-NEXT:nop
; V9-NEXT: ! %bb.1: ! %cond.false
-; V9-NEXT:srl %o0, 1, %o1
-; V9-NEXT:or %o0, %o1, %o0
-; V9-NEXT:srl %o0, 2, %o1
-; V9-NEXT:or %o0, %o1, %o0
-; V9-NEXT:srl %o0, 4, %o1
-; V9-NEXT:or %o0, %o1, %o0
-; V9-NEXT:srl %o0, 8, %o1
-; V9-NEXT:or %o0, %o1, %o0
-; V9-NEXT:srl %o0, 16, %o1
-; V9-NEXT:or %o0, %o1, %o0
-; V9-NEXT:xor %o0, -1, %o0
-; V9-NEXT:srl %o0, 1, %o1
-; V9-NEXT:sethi 1398101, %o2
-; V9-NEXT:or %o2, 341, %o2
-; V9-NEXT:and %o1, %o2, %o1
-; V9-NEXT:sub %o0, %o1, %o0
-; V9-NEXT:sethi 838860, %o1
-; V9-NEXT:or %o1, 819, %o1
-; V9-NEXT:and %o0, %o1, %o2
-; V9-NEXT:srl %o0, 2, %o0
-; V9-NEXT:and %o0, %o1, %o0
-; V9-NEXT:add %o2, %o0, %o0
-; V9-NEXT:srl %o0, 4, %o1
-; V9-NEXT:add %o0, %o1, %o0
-; V9-NEXT:sethi 246723, %o1
-; V9-NEXT:or %o1, 783, %o1
-; V9-NEXT:and %o0, %o1, %o0
-; V9-NEXT:sll %o0, 8, %o1
-; V9-NEXT:add %o0, %o1, %o0
-; V9-NEXT:sll %o0, 16, %o1
-; V9-NEXT:add %o0, %o1, %o0
-; V9-NEXT:retl
-; V9-NEXT:srl %o0, 24, %o0
+; V9-NEXT:call __clzdi2
+; V9-NEXT:sllx %i0, 32, %o0
+; V9-NEXT:ret
+; V9-NEXT:restore %g0, %o0, %o0
; V9-NEXT: .LBB0_2:
-; V9-NEXT:retl
-; V9-NEXT:mov 32, %o0
+; V9-NEXT:ret
+; V9-NEXT:restore %g0, 32, %o0
;
; POPC-LABEL: i32_nopoison:
; POPC: ! %bb.0:
@@ -90,39 +62,11 @@ define i32 @i32_nopoison(i32 %x) nounwind {
define i32 @i32_poison(i32 %x) nounwind {
; V9-LABEL: i32_poison:
; V9: ! %bb.0:
-; V9-NEXT:srl %o0, 1, %o1
-; V9-NEXT:or %o0, %o1, %o0
-; V9-NEXT:srl %o0, 2, %o1
-; V9-NEXT:or %o0, %o1, %o0
-; V9-NEXT:srl %o0, 4, %o1
-; V9-NEXT:or %o0, %o1, %o0
-; V9-NEXT:srl %o0, 8, %o1
-; V9-NEXT:or %o0, %o1, %o0
-; V9-NEXT:srl %o0, 16, %o1
-; V9-NEXT:or %o0, %o1, %o0
-; V9-NEXT:xor %o0, -1, %o0
-; V9-NEXT:srl %o0, 1, %o1
-; V9-NEXT:sethi 1398101, %o2
-; V9-NEXT:or %o2, 341, %o2
-; V9-NEXT:and %o1, %o2, %o1
-; V9-NEXT:sub %o0, %o1, %o0
-; V9-NE
[llvm-branch-commits] [llvm] [SPARC] Use lzcnt to implement CTLZ when we have VIS3 (PR #135715)
@@ -303,4 +303,10 @@ def : Pat<(i64 (mulhs i64:$lhs, i64:$rhs)), (SUBrr (UMULXHI $lhs, $rhs), (ADDrr (ANDrr (SRAXri $lhs, 63), $rhs), (ANDrr (SRAXri $rhs, 63), $lhs)))>; + +def : Pat<(i64 (ctlz i64:$src)), (LZCNT $src)>; +// 32-bit LZCNT. +// The zero extension will leave us with 32 extra leading zeros, +// so we need to compensate for it. +def : Pat<(i32 (ctlz i32:$src)), (ADDri (LZCNT (SRLri $src, 0)), (i32 -32))>; s-barannikov wrote: > This is what gcc appears to be doing. I didn't pass `-mvis3` :man_facepalming: https://github.com/llvm/llvm-project/pull/135715 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [SPARC] Use lzcnt to implement CTLZ when we have VIS3 (PR #135715)
https://github.com/koachan updated
https://github.com/llvm/llvm-project/pull/135715
>From 6e865810ea2acaf636a4759fd4ffc67aa3dbb848 Mon Sep 17 00:00:00 2001
From: Koakuma
Date: Thu, 17 Apr 2025 08:24:54 +0700
Subject: [PATCH 1/2] Promote i32 CTLZ when we don't have VIS3 or POPC
Created using spr 1.3.5
---
llvm/lib/Target/Sparc/SparcISelLowering.cpp | 11 +-
llvm/test/CodeGen/SPARC/ctlz.ll | 182 +++-
2 files changed, 35 insertions(+), 158 deletions(-)
diff --git a/llvm/lib/Target/Sparc/SparcISelLowering.cpp
b/llvm/lib/Target/Sparc/SparcISelLowering.cpp
index fa544916aebb5..e455706b0528f 100644
--- a/llvm/lib/Target/Sparc/SparcISelLowering.cpp
+++ b/llvm/lib/Target/Sparc/SparcISelLowering.cpp
@@ -1755,7 +1755,7 @@ SparcTargetLowering::SparcTargetLowering(const
TargetMachine &TM,
Subtarget->usePopc() ? Legal : Expand);
setOperationAction(ISD::CTTZ , MVT::i64, Expand);
setOperationAction(ISD::CTLZ, MVT::i64,
- Subtarget->isVIS3() ? Legal : LibCall);
+ Subtarget->isVIS3() ? Legal : Expand);
setOperationAction(ISD::BSWAP, MVT::i64, Expand);
setOperationAction(ISD::ROTL , MVT::i64, Expand);
setOperationAction(ISD::ROTR , MVT::i64, Expand);
@@ -1818,7 +1818,7 @@ SparcTargetLowering::SparcTargetLowering(const
TargetMachine &TM,
setOperationAction(ISD::FMA , MVT::f32, Expand);
setOperationAction(ISD::CTTZ , MVT::i32, Expand);
setOperationAction(ISD::CTLZ, MVT::i32,
- Subtarget->isVIS3() ? Promote : LibCall);
+ Subtarget->isVIS3() ? Promote : Expand);
setOperationAction(ISD::ROTL , MVT::i32, Expand);
setOperationAction(ISD::ROTR , MVT::i32, Expand);
setOperationAction(ISD::BSWAP, MVT::i32, Expand);
@@ -1992,6 +1992,13 @@ SparcTargetLowering::SparcTargetLowering(const
TargetMachine &TM,
if (Subtarget->isVIS3()) {
setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i32, Promote);
setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i64, Legal);
+ } else if (Subtarget->usePopc()) {
+setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i32, Expand);
+setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i64, Expand);
+ } else {
+setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i32,
+ Subtarget->is64Bit() ? Promote : LibCall);
+setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i64, LibCall);
}
setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom);
diff --git a/llvm/test/CodeGen/SPARC/ctlz.ll b/llvm/test/CodeGen/SPARC/ctlz.ll
index d17b776ca0a72..3391af02e4bc0 100644
--- a/llvm/test/CodeGen/SPARC/ctlz.ll
+++ b/llvm/test/CodeGen/SPARC/ctlz.ll
@@ -6,46 +6,18 @@
define i32 @i32_nopoison(i32 %x) nounwind {
; V9-LABEL: i32_nopoison:
; V9: ! %bb.0:
-; V9-NEXT:cmp %o0, 0
+; V9-NEXT:save %sp, -176, %sp
+; V9-NEXT:cmp %i0, 0
; V9-NEXT:be %icc, .LBB0_2
; V9-NEXT:nop
; V9-NEXT: ! %bb.1: ! %cond.false
-; V9-NEXT:srl %o0, 1, %o1
-; V9-NEXT:or %o0, %o1, %o0
-; V9-NEXT:srl %o0, 2, %o1
-; V9-NEXT:or %o0, %o1, %o0
-; V9-NEXT:srl %o0, 4, %o1
-; V9-NEXT:or %o0, %o1, %o0
-; V9-NEXT:srl %o0, 8, %o1
-; V9-NEXT:or %o0, %o1, %o0
-; V9-NEXT:srl %o0, 16, %o1
-; V9-NEXT:or %o0, %o1, %o0
-; V9-NEXT:xor %o0, -1, %o0
-; V9-NEXT:srl %o0, 1, %o1
-; V9-NEXT:sethi 1398101, %o2
-; V9-NEXT:or %o2, 341, %o2
-; V9-NEXT:and %o1, %o2, %o1
-; V9-NEXT:sub %o0, %o1, %o0
-; V9-NEXT:sethi 838860, %o1
-; V9-NEXT:or %o1, 819, %o1
-; V9-NEXT:and %o0, %o1, %o2
-; V9-NEXT:srl %o0, 2, %o0
-; V9-NEXT:and %o0, %o1, %o0
-; V9-NEXT:add %o2, %o0, %o0
-; V9-NEXT:srl %o0, 4, %o1
-; V9-NEXT:add %o0, %o1, %o0
-; V9-NEXT:sethi 246723, %o1
-; V9-NEXT:or %o1, 783, %o1
-; V9-NEXT:and %o0, %o1, %o0
-; V9-NEXT:sll %o0, 8, %o1
-; V9-NEXT:add %o0, %o1, %o0
-; V9-NEXT:sll %o0, 16, %o1
-; V9-NEXT:add %o0, %o1, %o0
-; V9-NEXT:retl
-; V9-NEXT:srl %o0, 24, %o0
+; V9-NEXT:call __clzdi2
+; V9-NEXT:sllx %i0, 32, %o0
+; V9-NEXT:ret
+; V9-NEXT:restore %g0, %o0, %o0
; V9-NEXT: .LBB0_2:
-; V9-NEXT:retl
-; V9-NEXT:mov 32, %o0
+; V9-NEXT:ret
+; V9-NEXT:restore %g0, 32, %o0
;
; POPC-LABEL: i32_nopoison:
; POPC: ! %bb.0:
@@ -90,39 +62,11 @@ define i32 @i32_nopoison(i32 %x) nounwind {
define i32 @i32_poison(i32 %x) nounwind {
; V9-LABEL: i32_poison:
; V9: ! %bb.0:
-; V9-NEXT:srl %o0, 1, %o1
-; V9-NEXT:or %o0, %o1, %o0
-; V9-NEXT:srl %o0, 2, %o1
-; V9-NEXT:or %o0, %o1, %o0
-; V9-NEXT:srl %o0, 4, %o1
-; V9-NEXT:or %o0, %o1, %o0
-; V9-NEXT:srl %o0, 8, %o1
-; V9-NEXT:or %o0, %o1, %o0
-; V9-NEXT:srl %o0, 16, %o1
-; V9-NEXT:or %o0, %o1, %o0
-; V9-NEXT:xor %o0, -1, %o0
-; V9-NEXT:srl %o0, 1, %o1
-; V9-NEXT:sethi 1398101, %o2
-; V9-NEXT:or %o2, 341, %o2
-; V9-NEXT:and %o1, %o2, %o1
-; V9-NEXT:sub %o0, %o1, %o0
-; V
[llvm-branch-commits] [llvm] [BOLT][test] Fix callcont-fallthru.s after #129481 (PR #135867)
MaskRay wrote: > Hey Amir, > > Thanks for the PR. Unfortunately, it is still failing. The trick below > doesn't seem to work on my buildbot machine: > > > Link against a DSO to ensure PLT entries. > > So doing: > > ```shell > nm --synthetic callcont-fallthru.s.tmp > ``` > > won't list a `puts@plt` symbol, which is what causes an `link_fdata.py` > assertion: > > > AssertionError: ERROR: symbol puts@plt is not defined in binary > > On my dev AArch64 instance `--synthetic` does the trick. BTW run lines 4 and > 6 appear identical when inspected (`-###`) You need a `libc.so` that defines `puts`, and then creates an executable that references `puts` and links against `libc.so`. Then the executable will have a PLT entry, and you do not need the `--unresolved-symbols=ignore-all` hack. https://github.com/llvm/llvm-project/pull/135867 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [SPARC] Use op-then-neg instructions when we have VIS3 (PR #135717)
https://github.com/koachan updated https://github.com/llvm/llvm-project/pull/135717 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [mlir] [mlir][memref][NFC] Simplify `constifyIndexValues` (PR #135940)
llvmbot wrote:
@llvm/pr-subscribers-mlir-memref
Author: Matthias Springer (matthias-springer)
Changes
Depends on #135939.
---
Full diff: https://github.com/llvm/llvm-project/pull/135940.diff
1 Files Affected:
- (modified) mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp (+50-103)
``diff
diff --git a/mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
b/mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
index 63f5251398716..92f44c97ee5d7 100644
--- a/mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
+++ b/mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
@@ -88,101 +88,30 @@ SmallVector memref::getMixedSizes(OpBuilder
&builder,
// Utility functions for propagating static information
//===--===//
-/// Helper function that infers the constant values from a list of \p values,
-/// a \p memRefTy, and another helper function \p getAttributes.
-/// The inferred constant values replace the related `OpFoldResult` in
-/// \p values.
+/// Helper function that sets values[i] to constValues[i] if the latter is a
+/// static value, as indicated by ShapedType::kDynamic.
///
-/// \note This function shouldn't be used directly, instead, use the
-/// `getConstifiedMixedXXX` methods from the related operations.
-///
-/// \p getAttributes retuns a list of potentially constant values, as
determined
-/// by \p isDynamic, from the given \p memRefTy. The returned list must have as
-/// many elements as \p values or be empty.
-///
-/// E.g., consider the following example:
-/// ```
-/// memref.reinterpret_cast %base to <...> strides: [2, %dyn_stride] :
-/// memref to memref>
-/// ```
-/// `ReinterpretCastOp::getMixedStrides()` will return `[2, %dyn_stride]`.
-/// Now using this helper function with:
-/// - `values == [2, %dyn_stride]`,
-/// - `memRefTy == memref>`
-/// - `getAttributes == getConstantStrides` (i.e., a wrapper around
-/// `getStridesAndOffset`), and
-/// - `isDynamic == ShapedType::isDynamic`
-/// Will yield: `values == [2, 1]`
-static void constifyIndexValues(
-SmallVectorImpl &values, MemRefType memRefTy,
-MLIRContext *ctxt,
-llvm::function_ref(MemRefType)> getAttributes,
-llvm::function_ref isDynamic) {
- SmallVector constValues = getAttributes(memRefTy);
- Builder builder(ctxt);
- for (const auto &it : llvm::enumerate(constValues)) {
-int64_t constValue = it.value();
-if (!isDynamic(constValue))
- values[it.index()] = builder.getIndexAttr(constValue);
- }
- for (OpFoldResult &ofr : values) {
-if (auto attr = dyn_cast(ofr)) {
- // FIXME: We shouldn't need to do that, but right now, the static indices
- // are created with the wrong type: `i64` instead of `index`.
- // As a result, if we were to keep the attribute as is, we may fail to
see
- // that two attributes are equal because one would have the i64 type and
- // the other the index type.
- // The alternative would be to create constant indices with getI64Attr in
- // this and the previous loop, but it doesn't logically make sense (we
are
- // dealing with indices here) and would only strenghten the inconsistency
- // around how static indices are created (some places use getI64Attr,
- // others use getIndexAttr).
- // The workaround here is to stick to the IndexAttr type for all the
- // values, hence we recreate the attribute even when it is already static
- // to make sure the type is consistent.
- ofr = builder.getIndexAttr(llvm::cast(attr).getInt());
+/// If constValues[i] is dynamic, tries to extract a constant value from
+/// value[i] to allow for additional folding opportunities. Also convertes all
+/// existing attributes to index attributes. (They may be i64 attributes.)
+static void constifyIndexValues(SmallVectorImpl &values,
+ArrayRef constValues) {
+ assert(constValues.size() == values.size() &&
+ "incorrect number of const values");
+ for (int64_t i = 0, e = constValues.size(); i < e; ++i) {
+Builder builder(values[i].getContext());
+if (!ShapedType::isDynamic(constValues[i])) {
+ // Constant value is known, use it directly.
+ values[i] = builder.getIndexAttr(constValues[i]);
continue;
}
-std::optional maybeConstant =
-getConstantIntValue(cast(ofr));
-if (maybeConstant)
- ofr = builder.getIndexAttr(*maybeConstant);
+if (std::optional cst = getConstantIntValue(values[i])) {
+ // Try to extract a constant or convert an existing to index.
+ values[i] = builder.getIndexAttr(*cst);
+}
}
}
-/// Wrapper around `getShape` that conforms to the function signature
-/// expected for `getAttributes` in `constifyIndexValues`.
-static SmallVector getConstantSizes(MemRefType memRefTy) {
- ArrayRef sizes = memRefTy.getShape();
- return SmallVector(sizes);
-}
-
-/// Wrapper around `getStridesAndOffset` that returns only the offset and
-/// conforms to the function signature expec
[llvm-branch-commits] [mlir] [mlir][memref][NFC] Simplify `constifyIndexValues` (PR #135940)
https://github.com/matthias-springer created
https://github.com/llvm/llvm-project/pull/135940
Depends on #135939.
>From 0ca00d18d5ce5b118fbc4c777ae9eabd5ae410e5 Mon Sep 17 00:00:00 2001
From: Matthias Springer
Date: Wed, 16 Apr 2025 10:02:41 +0200
Subject: [PATCH] [mlir][memref][NFC] Simplify `constifyIndexValues`
---
mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp | 153 ---
1 file changed, 50 insertions(+), 103 deletions(-)
diff --git a/mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
b/mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
index 63f5251398716..92f44c97ee5d7 100644
--- a/mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
+++ b/mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
@@ -88,101 +88,30 @@ SmallVector memref::getMixedSizes(OpBuilder
&builder,
// Utility functions for propagating static information
//===--===//
-/// Helper function that infers the constant values from a list of \p values,
-/// a \p memRefTy, and another helper function \p getAttributes.
-/// The inferred constant values replace the related `OpFoldResult` in
-/// \p values.
+/// Helper function that sets values[i] to constValues[i] if the latter is a
+/// static value, as indicated by ShapedType::kDynamic.
///
-/// \note This function shouldn't be used directly, instead, use the
-/// `getConstifiedMixedXXX` methods from the related operations.
-///
-/// \p getAttributes retuns a list of potentially constant values, as
determined
-/// by \p isDynamic, from the given \p memRefTy. The returned list must have as
-/// many elements as \p values or be empty.
-///
-/// E.g., consider the following example:
-/// ```
-/// memref.reinterpret_cast %base to <...> strides: [2, %dyn_stride] :
-/// memref to memref>
-/// ```
-/// `ReinterpretCastOp::getMixedStrides()` will return `[2, %dyn_stride]`.
-/// Now using this helper function with:
-/// - `values == [2, %dyn_stride]`,
-/// - `memRefTy == memref>`
-/// - `getAttributes == getConstantStrides` (i.e., a wrapper around
-/// `getStridesAndOffset`), and
-/// - `isDynamic == ShapedType::isDynamic`
-/// Will yield: `values == [2, 1]`
-static void constifyIndexValues(
-SmallVectorImpl &values, MemRefType memRefTy,
-MLIRContext *ctxt,
-llvm::function_ref(MemRefType)> getAttributes,
-llvm::function_ref isDynamic) {
- SmallVector constValues = getAttributes(memRefTy);
- Builder builder(ctxt);
- for (const auto &it : llvm::enumerate(constValues)) {
-int64_t constValue = it.value();
-if (!isDynamic(constValue))
- values[it.index()] = builder.getIndexAttr(constValue);
- }
- for (OpFoldResult &ofr : values) {
-if (auto attr = dyn_cast(ofr)) {
- // FIXME: We shouldn't need to do that, but right now, the static indices
- // are created with the wrong type: `i64` instead of `index`.
- // As a result, if we were to keep the attribute as is, we may fail to
see
- // that two attributes are equal because one would have the i64 type and
- // the other the index type.
- // The alternative would be to create constant indices with getI64Attr in
- // this and the previous loop, but it doesn't logically make sense (we
are
- // dealing with indices here) and would only strenghten the inconsistency
- // around how static indices are created (some places use getI64Attr,
- // others use getIndexAttr).
- // The workaround here is to stick to the IndexAttr type for all the
- // values, hence we recreate the attribute even when it is already static
- // to make sure the type is consistent.
- ofr = builder.getIndexAttr(llvm::cast(attr).getInt());
+/// If constValues[i] is dynamic, tries to extract a constant value from
+/// value[i] to allow for additional folding opportunities. Also convertes all
+/// existing attributes to index attributes. (They may be i64 attributes.)
+static void constifyIndexValues(SmallVectorImpl &values,
+ArrayRef constValues) {
+ assert(constValues.size() == values.size() &&
+ "incorrect number of const values");
+ for (int64_t i = 0, e = constValues.size(); i < e; ++i) {
+Builder builder(values[i].getContext());
+if (!ShapedType::isDynamic(constValues[i])) {
+ // Constant value is known, use it directly.
+ values[i] = builder.getIndexAttr(constValues[i]);
continue;
}
-std::optional maybeConstant =
-getConstantIntValue(cast(ofr));
-if (maybeConstant)
- ofr = builder.getIndexAttr(*maybeConstant);
+if (std::optional cst = getConstantIntValue(values[i])) {
+ // Try to extract a constant or convert an existing to index.
+ values[i] = builder.getIndexAttr(*cst);
+}
}
}
-/// Wrapper around `getShape` that conforms to the function signature
-/// expected for `getAttributes` in `constifyIndexValues`.
-static SmallVector getConstantSizes(MemRefType memRefTy) {
- ArrayRef sizes = memRefTy.getShape();
- retur
[llvm-branch-commits] [mlir] [mlir][memref][NFC] Simplify `constifyIndexValues` (PR #135940)
https://github.com/matthias-springer edited https://github.com/llvm/llvm-project/pull/135940 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [mlir] [mlir][memref][NFC] Simplify `constifyIndexValues` (PR #135940)
github-actions[bot] wrote:
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
You can test this locally with the following command:
``bash
git-clang-format --diff HEAD~1 HEAD --extensions cpp --
mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
``
View the diff from clang-format here.
``diff
diff --git a/mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
b/mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
index 92f44c97e..e773236b3 100644
--- a/mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
+++ b/mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
@@ -1053,7 +1053,7 @@ struct DimOfMemRefReshape : public
OpRewritePattern {
}
} // else dim.getIndex is a block argument to reshape->getBlock and
// dominates reshape
-} // Check condition 2
+} // Check condition 2
else if (dim->getBlock() != reshape->getBlock() &&
!dim.getIndex().getParentRegion()->isProperAncestor(
reshape->getParentRegion())) {
``
https://github.com/llvm/llvm-project/pull/135940
___
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[llvm-branch-commits] [clang] release/20.x: [clang][AST] Handle implicit first argument in CallExpr::getBeginLoc() (PR #135927)
llvmbot wrote:
@llvm/pr-subscribers-clang
Author: Nathan Ridge (HighCommander4)
Changes
Backport
https://github.com/llvm/llvm-project/commit/289baf1f42c8b5773271b611cd235d4ab94bb4e8
Fixes https://github.com/llvm/llvm-project/issues/135922
---
Full diff: https://github.com/llvm/llvm-project/pull/135927.diff
2 Files Affected:
- (modified) clang/lib/AST/Expr.cpp (+5-2)
- (modified) clang/test/SemaCXX/cxx2b-deducing-this.cpp (+7)
``diff
diff --git a/clang/lib/AST/Expr.cpp b/clang/lib/AST/Expr.cpp
index 8571b617c70eb..a5b7ef8c4271b 100644
--- a/clang/lib/AST/Expr.cpp
+++ b/clang/lib/AST/Expr.cpp
@@ -1665,8 +1665,11 @@ SourceLocation CallExpr::getBeginLoc() const {
Method && Method->isExplicitObjectMemberFunction()) {
bool HasFirstArg = getNumArgs() > 0 && getArg(0);
assert(HasFirstArg);
- if (HasFirstArg)
-return getArg(0)->getBeginLoc();
+ if (HasFirstArg) {
+if (auto FirstArgLoc = getArg(0)->getBeginLoc();
FirstArgLoc.isValid()) {
+ return FirstArgLoc;
+}
+ }
}
}
diff --git a/clang/test/SemaCXX/cxx2b-deducing-this.cpp
b/clang/test/SemaCXX/cxx2b-deducing-this.cpp
index 6f17ce7275456..7e392213710a4 100644
--- a/clang/test/SemaCXX/cxx2b-deducing-this.cpp
+++ b/clang/test/SemaCXX/cxx2b-deducing-this.cpp
@@ -1134,3 +1134,10 @@ struct S {
static_assert((S{} << 11) == a);
// expected-error@-1 {{use of undeclared identifier 'a'}}
}
+
+namespace GH135522 {
+struct S {
+ auto f(this auto) -> S;
+ bool g() { return f(); } // expected-error {{no viable conversion from
returned value of type 'S' to function return type 'bool'}}
+};
+}
``
https://github.com/llvm/llvm-project/pull/135927
___
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[llvm-branch-commits] [clang] release/20.x: [clang][AST] Handle implicit first argument in CallExpr::getBeginLoc() (PR #135927)
https://github.com/HighCommander4 created
https://github.com/llvm/llvm-project/pull/135927
Backport
https://github.com/llvm/llvm-project/commit/289baf1f42c8b5773271b611cd235d4ab94bb4e8
Fixes https://github.com/llvm/llvm-project/issues/135922
>From a9ea5de20db3ff08d691856e7da5b185d438e228 Mon Sep 17 00:00:00 2001
From: Nathan Ridge
Date: Tue, 15 Apr 2025 03:40:37 -0400
Subject: [PATCH] [clang][AST] Handle implicit first argument in
CallExpr::getBeginLoc()
---
clang/lib/AST/Expr.cpp | 7 +--
clang/test/SemaCXX/cxx2b-deducing-this.cpp | 7 +++
2 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/clang/lib/AST/Expr.cpp b/clang/lib/AST/Expr.cpp
index 8571b617c70eb..a5b7ef8c4271b 100644
--- a/clang/lib/AST/Expr.cpp
+++ b/clang/lib/AST/Expr.cpp
@@ -1665,8 +1665,11 @@ SourceLocation CallExpr::getBeginLoc() const {
Method && Method->isExplicitObjectMemberFunction()) {
bool HasFirstArg = getNumArgs() > 0 && getArg(0);
assert(HasFirstArg);
- if (HasFirstArg)
-return getArg(0)->getBeginLoc();
+ if (HasFirstArg) {
+if (auto FirstArgLoc = getArg(0)->getBeginLoc();
FirstArgLoc.isValid()) {
+ return FirstArgLoc;
+}
+ }
}
}
diff --git a/clang/test/SemaCXX/cxx2b-deducing-this.cpp
b/clang/test/SemaCXX/cxx2b-deducing-this.cpp
index 6f17ce7275456..7e392213710a4 100644
--- a/clang/test/SemaCXX/cxx2b-deducing-this.cpp
+++ b/clang/test/SemaCXX/cxx2b-deducing-this.cpp
@@ -1134,3 +1134,10 @@ struct S {
static_assert((S{} << 11) == a);
// expected-error@-1 {{use of undeclared identifier 'a'}}
}
+
+namespace GH135522 {
+struct S {
+ auto f(this auto) -> S;
+ bool g() { return f(); } // expected-error {{no viable conversion from
returned value of type 'S' to function return type 'bool'}}
+};
+}
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[llvm-branch-commits] [clang] release/20.x: [clang][AST] Handle implicit first argument in CallExpr::getBeginLoc() (PR #135927)
https://github.com/HighCommander4 milestoned https://github.com/llvm/llvm-project/pull/135927 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] release/20.x: [clang][AST] Handle implicit first argument in CallExpr::getBeginLoc() (PR #135927)
https://github.com/zyn0217 approved this pull request. https://github.com/llvm/llvm-project/pull/135927 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [AMDGPU][InsertWaitCnts] Track global_wb/inv/wbinv (PR #135340)
Pierre-vh wrote: > Just a quick side question, do we have any write-up or documentation about > the memory model? AMDGPUUsage has a memory model section for each arch https://github.com/llvm/llvm-project/pull/135340 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [mlir] [mlir][memref][NFC] Simplify `constifyIndexValues` (PR #135940)
https://github.com/matthias-springer updated
https://github.com/llvm/llvm-project/pull/135940
>From ea19bcfab213967b0e86aa1346734432e4843e0f Mon Sep 17 00:00:00 2001
From: Matthias Springer
Date: Wed, 16 Apr 2025 10:02:41 +0200
Subject: [PATCH] [mlir][memref][NFC] Simplify `constifyIndexValues`
---
mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp | 153 ---
1 file changed, 50 insertions(+), 103 deletions(-)
diff --git a/mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
b/mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
index 63f5251398716..d174a05ffceb0 100644
--- a/mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
+++ b/mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
@@ -88,101 +88,30 @@ SmallVector memref::getMixedSizes(OpBuilder
&builder,
// Utility functions for propagating static information
//===--===//
-/// Helper function that infers the constant values from a list of \p values,
-/// a \p memRefTy, and another helper function \p getAttributes.
-/// The inferred constant values replace the related `OpFoldResult` in
-/// \p values.
+/// Helper function that sets values[i] to constValues[i] if the latter is a
+/// static value, as indicated by ShapedType::kDynamic.
///
-/// \note This function shouldn't be used directly, instead, use the
-/// `getConstifiedMixedXXX` methods from the related operations.
-///
-/// \p getAttributes retuns a list of potentially constant values, as
determined
-/// by \p isDynamic, from the given \p memRefTy. The returned list must have as
-/// many elements as \p values or be empty.
-///
-/// E.g., consider the following example:
-/// ```
-/// memref.reinterpret_cast %base to <...> strides: [2, %dyn_stride] :
-/// memref to memref>
-/// ```
-/// `ReinterpretCastOp::getMixedStrides()` will return `[2, %dyn_stride]`.
-/// Now using this helper function with:
-/// - `values == [2, %dyn_stride]`,
-/// - `memRefTy == memref>`
-/// - `getAttributes == getConstantStrides` (i.e., a wrapper around
-/// `getStridesAndOffset`), and
-/// - `isDynamic == ShapedType::isDynamic`
-/// Will yield: `values == [2, 1]`
-static void constifyIndexValues(
-SmallVectorImpl &values, MemRefType memRefTy,
-MLIRContext *ctxt,
-llvm::function_ref(MemRefType)> getAttributes,
-llvm::function_ref isDynamic) {
- SmallVector constValues = getAttributes(memRefTy);
- Builder builder(ctxt);
- for (const auto &it : llvm::enumerate(constValues)) {
-int64_t constValue = it.value();
-if (!isDynamic(constValue))
- values[it.index()] = builder.getIndexAttr(constValue);
- }
- for (OpFoldResult &ofr : values) {
-if (auto attr = dyn_cast(ofr)) {
- // FIXME: We shouldn't need to do that, but right now, the static indices
- // are created with the wrong type: `i64` instead of `index`.
- // As a result, if we were to keep the attribute as is, we may fail to
see
- // that two attributes are equal because one would have the i64 type and
- // the other the index type.
- // The alternative would be to create constant indices with getI64Attr in
- // this and the previous loop, but it doesn't logically make sense (we
are
- // dealing with indices here) and would only strenghten the inconsistency
- // around how static indices are created (some places use getI64Attr,
- // others use getIndexAttr).
- // The workaround here is to stick to the IndexAttr type for all the
- // values, hence we recreate the attribute even when it is already static
- // to make sure the type is consistent.
- ofr = builder.getIndexAttr(llvm::cast(attr).getInt());
+/// If constValues[i] is dynamic, tries to extract a constant value from
+/// value[i] to allow for additional folding opportunities. Also convertes all
+/// existing attributes to index attributes. (They may be i64 attributes.)
+static void constifyIndexValues(SmallVectorImpl &values,
+ArrayRef constValues) {
+ assert(constValues.size() == values.size() &&
+ "incorrect number of const values");
+ for (int64_t i = 0, e = constValues.size(); i < e; ++i) {
+Builder builder(values[i].getContext());
+if (!ShapedType::isDynamic(constValues[i])) {
+ // Constant value is known, use it directly.
+ values[i] = builder.getIndexAttr(constValues[i]);
continue;
}
-std::optional maybeConstant =
-getConstantIntValue(cast(ofr));
-if (maybeConstant)
- ofr = builder.getIndexAttr(*maybeConstant);
+if (std::optional cst = getConstantIntValue(values[i])) {
+ // Try to extract a constant or convert an existing to index.
+ values[i] = builder.getIndexAttr(*cst);
+}
}
}
-/// Wrapper around `getShape` that conforms to the function signature
-/// expected for `getAttributes` in `constifyIndexValues`.
-static SmallVector getConstantSizes(MemRefType memRefTy) {
- ArrayRef sizes = memRefTy.getShape();
- return SmallVector(sizes);
[llvm-branch-commits] [mlir] [mlir][memref][NFC] Simplify `constifyIndexValues` (PR #135940)
https://github.com/matthias-springer updated
https://github.com/llvm/llvm-project/pull/135940
>From d137ec06b1b846232a77b78472c522183b872152 Mon Sep 17 00:00:00 2001
From: Matthias Springer
Date: Wed, 16 Apr 2025 10:02:41 +0200
Subject: [PATCH] [mlir][memref][NFC] Simplify `constifyIndexValues`
---
mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp | 151 ---
1 file changed, 49 insertions(+), 102 deletions(-)
diff --git a/mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
b/mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
index 63f5251398716..e773236b30c68 100644
--- a/mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
+++ b/mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
@@ -88,101 +88,30 @@ SmallVector memref::getMixedSizes(OpBuilder
&builder,
// Utility functions for propagating static information
//===--===//
-/// Helper function that infers the constant values from a list of \p values,
-/// a \p memRefTy, and another helper function \p getAttributes.
-/// The inferred constant values replace the related `OpFoldResult` in
-/// \p values.
+/// Helper function that sets values[i] to constValues[i] if the latter is a
+/// static value, as indicated by ShapedType::kDynamic.
///
-/// \note This function shouldn't be used directly, instead, use the
-/// `getConstifiedMixedXXX` methods from the related operations.
-///
-/// \p getAttributes retuns a list of potentially constant values, as
determined
-/// by \p isDynamic, from the given \p memRefTy. The returned list must have as
-/// many elements as \p values or be empty.
-///
-/// E.g., consider the following example:
-/// ```
-/// memref.reinterpret_cast %base to <...> strides: [2, %dyn_stride] :
-/// memref to memref>
-/// ```
-/// `ReinterpretCastOp::getMixedStrides()` will return `[2, %dyn_stride]`.
-/// Now using this helper function with:
-/// - `values == [2, %dyn_stride]`,
-/// - `memRefTy == memref>`
-/// - `getAttributes == getConstantStrides` (i.e., a wrapper around
-/// `getStridesAndOffset`), and
-/// - `isDynamic == ShapedType::isDynamic`
-/// Will yield: `values == [2, 1]`
-static void constifyIndexValues(
-SmallVectorImpl &values, MemRefType memRefTy,
-MLIRContext *ctxt,
-llvm::function_ref(MemRefType)> getAttributes,
-llvm::function_ref isDynamic) {
- SmallVector constValues = getAttributes(memRefTy);
- Builder builder(ctxt);
- for (const auto &it : llvm::enumerate(constValues)) {
-int64_t constValue = it.value();
-if (!isDynamic(constValue))
- values[it.index()] = builder.getIndexAttr(constValue);
- }
- for (OpFoldResult &ofr : values) {
-if (auto attr = dyn_cast(ofr)) {
- // FIXME: We shouldn't need to do that, but right now, the static indices
- // are created with the wrong type: `i64` instead of `index`.
- // As a result, if we were to keep the attribute as is, we may fail to
see
- // that two attributes are equal because one would have the i64 type and
- // the other the index type.
- // The alternative would be to create constant indices with getI64Attr in
- // this and the previous loop, but it doesn't logically make sense (we
are
- // dealing with indices here) and would only strenghten the inconsistency
- // around how static indices are created (some places use getI64Attr,
- // others use getIndexAttr).
- // The workaround here is to stick to the IndexAttr type for all the
- // values, hence we recreate the attribute even when it is already static
- // to make sure the type is consistent.
- ofr = builder.getIndexAttr(llvm::cast(attr).getInt());
+/// If constValues[i] is dynamic, tries to extract a constant value from
+/// value[i] to allow for additional folding opportunities. Also convertes all
+/// existing attributes to index attributes. (They may be i64 attributes.)
+static void constifyIndexValues(SmallVectorImpl &values,
+ArrayRef constValues) {
+ assert(constValues.size() == values.size() &&
+ "incorrect number of const values");
+ for (int64_t i = 0, e = constValues.size(); i < e; ++i) {
+Builder builder(values[i].getContext());
+if (!ShapedType::isDynamic(constValues[i])) {
+ // Constant value is known, use it directly.
+ values[i] = builder.getIndexAttr(constValues[i]);
continue;
}
-std::optional maybeConstant =
-getConstantIntValue(cast(ofr));
-if (maybeConstant)
- ofr = builder.getIndexAttr(*maybeConstant);
+if (std::optional cst = getConstantIntValue(values[i])) {
+ // Try to extract a constant or convert an existing to index.
+ values[i] = builder.getIndexAttr(*cst);
+}
}
}
-/// Wrapper around `getShape` that conforms to the function signature
-/// expected for `getAttributes` in `constifyIndexValues`.
-static SmallVector getConstantSizes(MemRefType memRefTy) {
- ArrayRef sizes = memRefTy.getShape();
- return SmallVector(sizes);
[llvm-branch-commits] [mlir] [mlir][memref][NFC] Simplify `constifyIndexValues` (PR #135940)
https://github.com/matthias-springer updated
https://github.com/llvm/llvm-project/pull/135940
>From 05d2c7b8c4645dc686ea7ad20ed351c707430475 Mon Sep 17 00:00:00 2001
From: Matthias Springer
Date: Wed, 16 Apr 2025 10:02:41 +0200
Subject: [PATCH] [mlir][memref][NFC] Simplify `constifyIndexValues`
---
mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp | 149 ---
1 file changed, 48 insertions(+), 101 deletions(-)
diff --git a/mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
b/mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
index 63f5251398716..e9c0ad93357dc 100644
--- a/mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
+++ b/mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
@@ -88,101 +88,30 @@ SmallVector memref::getMixedSizes(OpBuilder
&builder,
// Utility functions for propagating static information
//===--===//
-/// Helper function that infers the constant values from a list of \p values,
-/// a \p memRefTy, and another helper function \p getAttributes.
-/// The inferred constant values replace the related `OpFoldResult` in
-/// \p values.
+/// Helper function that sets values[i] to constValues[i] if the latter is a
+/// static value, as indicated by ShapedType::kDynamic.
///
-/// \note This function shouldn't be used directly, instead, use the
-/// `getConstifiedMixedXXX` methods from the related operations.
-///
-/// \p getAttributes retuns a list of potentially constant values, as
determined
-/// by \p isDynamic, from the given \p memRefTy. The returned list must have as
-/// many elements as \p values or be empty.
-///
-/// E.g., consider the following example:
-/// ```
-/// memref.reinterpret_cast %base to <...> strides: [2, %dyn_stride] :
-/// memref to memref>
-/// ```
-/// `ReinterpretCastOp::getMixedStrides()` will return `[2, %dyn_stride]`.
-/// Now using this helper function with:
-/// - `values == [2, %dyn_stride]`,
-/// - `memRefTy == memref>`
-/// - `getAttributes == getConstantStrides` (i.e., a wrapper around
-/// `getStridesAndOffset`), and
-/// - `isDynamic == ShapedType::isDynamic`
-/// Will yield: `values == [2, 1]`
-static void constifyIndexValues(
-SmallVectorImpl &values, MemRefType memRefTy,
-MLIRContext *ctxt,
-llvm::function_ref(MemRefType)> getAttributes,
-llvm::function_ref isDynamic) {
- SmallVector constValues = getAttributes(memRefTy);
- Builder builder(ctxt);
- for (const auto &it : llvm::enumerate(constValues)) {
-int64_t constValue = it.value();
-if (!isDynamic(constValue))
- values[it.index()] = builder.getIndexAttr(constValue);
- }
- for (OpFoldResult &ofr : values) {
-if (auto attr = dyn_cast(ofr)) {
- // FIXME: We shouldn't need to do that, but right now, the static indices
- // are created with the wrong type: `i64` instead of `index`.
- // As a result, if we were to keep the attribute as is, we may fail to
see
- // that two attributes are equal because one would have the i64 type and
- // the other the index type.
- // The alternative would be to create constant indices with getI64Attr in
- // this and the previous loop, but it doesn't logically make sense (we
are
- // dealing with indices here) and would only strenghten the inconsistency
- // around how static indices are created (some places use getI64Attr,
- // others use getIndexAttr).
- // The workaround here is to stick to the IndexAttr type for all the
- // values, hence we recreate the attribute even when it is already static
- // to make sure the type is consistent.
- ofr = builder.getIndexAttr(llvm::cast(attr).getInt());
+/// If constValues[i] is dynamic, tries to extract a constant value from
+/// value[i] to allow for additional folding opportunities. Also convertes all
+/// existing attributes to index attributes. (They may be i64 attributes.)
+static void constifyIndexValues(SmallVectorImpl &values,
+ArrayRef constValues) {
+ assert(constValues.size() == values.size() &&
+ "incorrect number of const values");
+ for (int64_t i = 0, e = constValues.size(); i < e; ++i) {
+Builder builder(values[i].getContext());
+if (!ShapedType::isDynamic(constValues[i])) {
+ // Constant value is known, use it directly.
+ values[i] = builder.getIndexAttr(constValues[i]);
continue;
}
-std::optional maybeConstant =
-getConstantIntValue(cast(ofr));
-if (maybeConstant)
- ofr = builder.getIndexAttr(*maybeConstant);
+if (std::optional cst = getConstantIntValue(values[i])) {
+ // Try to extract a constant or convert an existing to index.
+ values[i] = builder.getIndexAttr(*cst);
+}
}
}
-/// Wrapper around `getShape` that conforms to the function signature
-/// expected for `getAttributes` in `constifyIndexValues`.
-static SmallVector getConstantSizes(MemRefType memRefTy) {
- ArrayRef sizes = memRefTy.getShape();
- return SmallVector(sizes);
[llvm-branch-commits] [MTE] do not tag zero sized globals (PR #136020)
https://github.com/fmayer created https://github.com/llvm/llvm-project/pull/136020 None ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [MTE] do not tag zero sized globals (PR #136020)
https://github.com/fmayer ready_for_review https://github.com/llvm/llvm-project/pull/136020 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [MTE] do not tag zero sized globals (PR #136020)
llvmbot wrote:
@llvm/pr-subscribers-clang
Author: Florian Mayer (fmayer)
Changes
---
Full diff: https://github.com/llvm/llvm-project/pull/136020.diff
2 Files Affected:
- (modified) clang/test/CodeGen/memtag-globals-asm.cpp (+6)
- (modified) llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp (+9-4)
``diff
diff --git a/clang/test/CodeGen/memtag-globals-asm.cpp
b/clang/test/CodeGen/memtag-globals-asm.cpp
index 57e3cedc083fd..fb3958dd8bcb6 100644
--- a/clang/test/CodeGen/memtag-globals-asm.cpp
+++ b/clang/test/CodeGen/memtag-globals-asm.cpp
@@ -21,6 +21,7 @@
// RUN: FileCheck %s --input-file=%t.out --check-prefix=CHECK-P
// RUN: FileCheck %s --input-file=%t.out --check-prefix=CHECK-Q
// RUN: FileCheck %s --input-file=%t.out --check-prefix=CHECK-R
+// RUN: FileCheck %s --input-file=%t.out --check-prefix=CHECK-S
// RUN: %clang_cc1 -O3 -S -x c++ -std=c++11 -triple aarch64-linux-android31 \
// RUN: -fsanitize=memtag-globals -o %t.out %s
@@ -43,6 +44,7 @@
// RUN: FileCheck %s --input-file=%t.out --check-prefix=CHECK-P
// RUN: FileCheck %s --input-file=%t.out --check-prefix=CHECK-Q
// RUN: FileCheck %s --input-file=%t.out --check-prefix=CHECK-R
+// RUN: FileCheck %s --input-file=%t.out --check-prefix=CHECK-S
/// Ensure that emulated TLS also doesn't get sanitized.
// RUN: %clang_cc1 -S -x c++ -std=c++11 -triple aarch64-linux-android31 \
@@ -99,6 +101,10 @@ static char* global_buffer_local_end = &global_buffer[16];
// CHECK-H: .size global_buffer_global_end, 16
char* global_buffer_global_end = &global_buffer[16];
+// CHECK-S-NOT: .memtag zero_sized
+struct empty {};
+char zero_sized[0];
+
class MyClass {
public:
virtual ~MyClass() {}
diff --git a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
index ad34465e2c606..b565ed66b6051 100644
--- a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
@@ -2398,6 +2398,12 @@ void
AsmPrinter::emitRemarksSection(remarks::RemarkStreamer &RS) {
OutStreamer->emitBinaryData(Buf);
}
+static uint64_t globalSize(const llvm::GlobalVariable &G) {
+ const Constant *Initializer = G.getInitializer();
+ return G.getParent()->getDataLayout().getTypeAllocSize(
+ Initializer->getType());
+}
+
static bool shouldTagGlobal(const llvm::GlobalVariable &G) {
// We used to do this in clang, but there are optimization passes that turn
// non-constant globals into constants. So now, clang only tells us whether
@@ -2430,19 +2436,18 @@ static bool shouldTagGlobal(const llvm::GlobalVariable
&G) {
if (G.hasSection())
return false;
- return true;
+ return globalSize(G) > 0;
}
static void tagGlobalDefinition(Module &M, GlobalVariable *G) {
- Constant *Initializer = G->getInitializer();
- uint64_t SizeInBytes =
- M.getDataLayout().getTypeAllocSize(Initializer->getType());
+ uint64_t SizeInBytes = globalSize(*G);
uint64_t NewSize = alignTo(SizeInBytes, 16);
if (SizeInBytes != NewSize) {
// Pad the initializer out to the next multiple of 16 bytes.
llvm::SmallVector Init(NewSize - SizeInBytes, 0);
Constant *Padding = ConstantDataArray::get(M.getContext(), Init);
+Constant *Initializer = G->getInitializer();
Initializer = ConstantStruct::getAnon({Initializer, Padding});
auto *NewGV = new GlobalVariable(
M, Initializer->getType(), G->isConstant(), G->getLinkage(),
``
https://github.com/llvm/llvm-project/pull/136020
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[llvm-branch-commits] [SPARC] Use native bitcast instructions when we have VIS3 (PR #135716)
https://github.com/koachan updated https://github.com/llvm/llvm-project/pull/135716 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [llvm][IR] Treat memcmp and bcmp as libcalls (PR #135706)
efriedma-quic wrote: We need to enter the "-fno-builtins" world to make interprocedural optimizations with libc safe. Most optimizations you care about can be preserved in other ways. For example, if malloc called some intrinsic "llvm.allocate_memory"/"llvm.free_memory" to create/destroy provenance, we can preserve most aliasing-related optimizations. If your libc does runtime CPU detection, we can come up with some way to accurately model aliasing on those globals. But we need a different IR representation to make this work; we can't just treat the implementations as opaque. If you want to run certain optimizations before we enter the "-fno-builtins" world, you need some pass that transitions IR from the "builtins" world to the "nobuiltins" world. It might be possible for us to invent a "partial-builtin" mode which treats functions which are called as builtins, but doesn't allow generating calls to functions which aren't already used. Which would allow LTO to accurately to more accurately compute which libc functions are used. But I'm not sure how useful this would actually be in practice; if you're not LTO'ing libc, the dependencies don't really need to be accurate. - There's a smaller set of functions which have more subtle ABI rules: those we call even with -fno-builtins. These are mostly listed in RuntimeLibcalls.def. But memcmp is not one of those functions. https://github.com/llvm/llvm-project/pull/135706 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [llvm][IR] Treat memcmp and bcmp as libcalls (PR #135706)
ilovepi wrote: hmm, that's an interesting direction. We were discussing this internally, and we were outlining some ideas along these lines, but I think you've articulated this quite a bit better than we have so far. I really like this idea of a "no-builtins" world, and transitioning the IR. I also find the idea of "partial-builtins" to be quite compelling, though I agree the usefulness maybe limited to scenarios where you're supplying a libc to LTO. Given that we're often dealing w/ kernel and embedded code, though, I think this is worth exporing more. I plan to discuss this a bit more w/ my team today, and hopefully write up something a bit more cogent than my earlier rambling. @mysterymath and @frobtech may have more to say as well. https://github.com/llvm/llvm-project/pull/135706 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] 24b0bd6 - Revert "[LLVM][TableGen] Parameterize NumToSkip in DecoderEmitter (#135882)"
Author: Rahul Joshi
Date: 2025-04-16T13:15:51-07:00
New Revision: 24b0bd6a97ed115c7530f0538eed9b9ef2b581f9
URL:
https://github.com/llvm/llvm-project/commit/24b0bd6a97ed115c7530f0538eed9b9ef2b581f9
DIFF:
https://github.com/llvm/llvm-project/commit/24b0bd6a97ed115c7530f0538eed9b9ef2b581f9.diff
LOG: Revert "[LLVM][TableGen] Parameterize NumToSkip in DecoderEmitter
(#135882)"
This reverts commit 598ec8ce2d1e5e20b45c56de8972f58a0caeb697.
Added:
Modified:
llvm/lib/Target/AArch64/CMakeLists.txt
llvm/test/TableGen/VarLenDecoder.td
llvm/test/TableGen/trydecode-emission.td
llvm/test/TableGen/trydecode-emission2.td
llvm/test/TableGen/trydecode-emission3.td
llvm/test/TableGen/trydecode-emission4.td
llvm/utils/TableGen/DecoderEmitter.cpp
Removed:
diff --git a/llvm/lib/Target/AArch64/CMakeLists.txt
b/llvm/lib/Target/AArch64/CMakeLists.txt
index ba1d1605ec104..2300e479bc110 100644
--- a/llvm/lib/Target/AArch64/CMakeLists.txt
+++ b/llvm/lib/Target/AArch64/CMakeLists.txt
@@ -7,7 +7,7 @@ tablegen(LLVM AArch64GenAsmWriter.inc -gen-asm-writer)
tablegen(LLVM AArch64GenAsmWriter1.inc -gen-asm-writer -asmwriternum=1)
tablegen(LLVM AArch64GenCallingConv.inc -gen-callingconv)
tablegen(LLVM AArch64GenDAGISel.inc -gen-dag-isel)
-tablegen(LLVM AArch64GenDisassemblerTables.inc -gen-disassembler
--num-to-skip-size=3)
+tablegen(LLVM AArch64GenDisassemblerTables.inc -gen-disassembler)
tablegen(LLVM AArch64GenFastISel.inc -gen-fast-isel)
tablegen(LLVM AArch64GenGlobalISel.inc -gen-global-isel)
tablegen(LLVM AArch64GenO0PreLegalizeGICombiner.inc -gen-global-isel-combiner
diff --git a/llvm/test/TableGen/VarLenDecoder.td
b/llvm/test/TableGen/VarLenDecoder.td
index b77702ff7c5c1..5cf0bf8911859 100644
--- a/llvm/test/TableGen/VarLenDecoder.td
+++ b/llvm/test/TableGen/VarLenDecoder.td
@@ -47,9 +47,9 @@ def FOO32 : MyVarInst {
}
// CHECK: MCD::OPC_ExtractField, 3, 5, // Inst{7-3} ...
-// CHECK-NEXT: MCD::OPC_FilterValue, 8, 4, 0, // Skip to: 11
+// CHECK-NEXT: MCD::OPC_FilterValue, 8, 4, 0, 0, // Skip to: 12
// CHECK-NEXT: MCD::OPC_Decode, {{[0-9]+}}, {{[0-9]+}}, 0, // Opcode: FOO16
-// CHECK-NEXT: MCD::OPC_FilterValue, 9, 4, 0, // Skip to: 19
+// CHECK-NEXT: MCD::OPC_FilterValue, 9, 4, 0, 0, // Skip to: 21
// CHECK-NEXT: MCD::OPC_Decode, {{[0-9]+}}, {{[0-9]+}}, 1, // Opcode: FOO32
// CHECK-NEXT: MCD::OPC_Fail,
diff --git a/llvm/test/TableGen/trydecode-emission.td
b/llvm/test/TableGen/trydecode-emission.td
index 2b4239f4fbe65..20d2446eeac7f 100644
--- a/llvm/test/TableGen/trydecode-emission.td
+++ b/llvm/test/TableGen/trydecode-emission.td
@@ -34,10 +34,10 @@ def InstB : TestInstruction {
}
// CHECK: /* 0 */ MCD::OPC_ExtractField, 4, 4, // Inst{7-4} ...
-// CHECK-NEXT: /* 3 */ MCD::OPC_FilterValue, 0, 16, 0, // Skip to: 23
-// CHECK-NEXT: /* 7 */ MCD::OPC_CheckField, 2, 2, 0, 6, 0, // Skip to: 19
-// CHECK-NEXT: /* 13 */ MCD::OPC_TryDecode, {{[0-9]+}}, {{[0-9]+}}, 0, 0,
0, // Opcode: InstB, skip to: 19
-// CHECK-NEXT: /* 19 */ MCD::OPC_Decode, {{[0-9]+}}, {{[0-9]+}}, 1, //
Opcode: InstA
-// CHECK-NEXT: /* 23 */ MCD::OPC_Fail,
+// CHECK-NEXT: /* 3 */ MCD::OPC_FilterValue, 0, 18, 0, 0, // Skip to: 26
+// CHECK-NEXT: /* 8 */ MCD::OPC_CheckField, 2, 2, 0, 7, 0, 0, // Skip
to: 22
+// CHECK-NEXT: /* 15 */ MCD::OPC_TryDecode, {{[0-9]+}}, {{[0-9]+}}, 0, 0,
0, 0, // Opcode: InstB, skip to: 22
+// CHECK-NEXT: /* 22 */ MCD::OPC_Decode, {{[0-9]+}}, {{[0-9]+}}, 1, //
Opcode: InstA
+// CHECK-NEXT: /* 26 */ MCD::OPC_Fail,
// CHECK: if (!Check(S, DecodeInstB(MI, insn, Address, Decoder))) {
DecodeComplete = false; return MCDisassembler::Fail; }
diff --git a/llvm/test/TableGen/trydecode-emission2.td
b/llvm/test/TableGen/trydecode-emission2.td
index 7d30474058f73..0584034e41233 100644
--- a/llvm/test/TableGen/trydecode-emission2.td
+++ b/llvm/test/TableGen/trydecode-emission2.td
@@ -31,14 +31,14 @@ def InstB : TestInstruction {
}
// CHECK: /* 0 */ MCD::OPC_ExtractField, 2, 1, // Inst{2} ...
-// CHECK-NEXT: /* 3 */ MCD::OPC_FilterValue, 0, 31, 0, // Skip to: 38
-// CHECK-NEXT: /* 7 */ MCD::OPC_ExtractField, 5, 3, // Inst{7-5} ...
-// CHECK-NEXT: /* 10 */ MCD::OPC_FilterValue, 0, 24, 0, // Skip to: 38
-// CHECK-NEXT: /* 14 */ MCD::OPC_CheckField, 0, 2, 3, 6, 0, // Skip to: 26
-// CHECK-NEXT: /* 20 */ MCD::OPC_TryDecode, {{[0-9]+}}, {{[0-9]+}}, 0, 0,
0, // Opcode: InstB, skip to: 26
-// CHECK-NEXT: /* 26 */ MCD::OPC_CheckField, 3, 2, 0, 6, 0, // Skip to: 38
-// CHECK-NEXT: /* 32 */ MCD::OPC_TryDecode, {{[0-9]+}}, {{[0-9]+}}, 1, 0,
0, // Opcode: InstA, skip to: 38
-// CHECK-NEXT: /* 38 */ MCD::OPC_Fail,
+// CHECK-NEXT: /* 3 */ MCD::OPC_FilterValue, 0, 36, 0, 0, // Skip to: 44
+// CHECK-NEXT: /* 8 */ MCD::OPC_ExtractField, 5, 3, // Inst{7-5} ...
+// CHECK
[llvm-branch-commits] [SPARC] Use lzcnt to implement CTLZ when we have VIS3 (PR #135715)
@@ -1815,7 +1817,8 @@ SparcTargetLowering::SparcTargetLowering(const TargetMachine &TM, setOperationAction(ISD::FREM , MVT::f32, Expand); setOperationAction(ISD::FMA , MVT::f32, Expand); setOperationAction(ISD::CTTZ , MVT::i32, Expand); - setOperationAction(ISD::CTLZ , MVT::i32, Expand); + setOperationAction(ISD::CTLZ, MVT::i32, + Subtarget->isVIS3() ? Promote : LibCall); s-barannikov wrote: The libcall corresponds to `_ZERO_UNDEF` version (it doesn't support zero input), hence no changes in tests. `CTLZ` should be left set to `Expand`, it should be expanded into a zero check + libcall + select. --- It may be worth double checking that `libgcc` provides `clzsi2`. It may so happen that it only provides 64-bit version (`clzdi2`) on 64-bit Sparc. `compiler-rt` should provide both, but if I'm not mistaken it is not the default compiler support library? https://github.com/llvm/llvm-project/pull/135715 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [SPARC] Use lzcnt to implement CTLZ when we have VIS3 (PR #135715)
https://github.com/s-barannikov edited https://github.com/llvm/llvm-project/pull/135715 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] 9d2bc67 - Revert "[NFC][CFI] Dump test output to debug llvm-clang-win-x-aarch64 failure…"
Author: Vitaly Buka Date: 2025-04-16T13:54:29-07:00 New Revision: 9d2bc671fe2c22f84d736820e3c63617139ef2e3 URL: https://github.com/llvm/llvm-project/commit/9d2bc671fe2c22f84d736820e3c63617139ef2e3 DIFF: https://github.com/llvm/llvm-project/commit/9d2bc671fe2c22f84d736820e3c63617139ef2e3.diff LOG: Revert "[NFC][CFI] Dump test output to debug llvm-clang-win-x-aarch64 failure…" This reverts commit e77ef7b291a0024ae34eaa76dafb62aef06d3c95. Added: Modified: clang/test/Driver/sanitizer-ld.c Removed: diff --git a/clang/test/Driver/sanitizer-ld.c b/clang/test/Driver/sanitizer-ld.c index c04831171bba9..a00ec029d3d46 100644 --- a/clang/test/Driver/sanitizer-ld.c +++ b/clang/test/Driver/sanitizer-ld.c @@ -839,14 +839,6 @@ // CHECK-CFI-PREREQ-LINUX: '-fsanitize=cfi' only allowed with '-flto' // CHECK-CFI-PREREQ-LINUX: '-fsanitize=cfi' only allowed with '-fvisibility=' -// CFI by itself does not link runtime libraries. -// RUN: %clang -fsanitize=cfi \ -// RUN: -flto -fvisibility=hidden \ -// RUN: --target=x86_64-unknown-linux -fuse-ld=ld -rtlib=platform \ -// RUN: -resource-dir=%S/Inputs/resource_dir \ -// RUN: --sysroot=%S/Inputs/basic_linux_tree \ -// RUN: -### %s - // CFI by itself does not link runtime libraries. // RUN: %clang -fsanitize=cfi \ // RUN: -flto -fvisibility=hidden \ ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] b315dee - Revert "[NFC][CFI] Avoid clang error in CFI tests (#135981)"
Author: Vitaly Buka
Date: 2025-04-16T13:55:22-07:00
New Revision: b315dee6cd4f67532a53a850cd8f6d461d95ad4d
URL:
https://github.com/llvm/llvm-project/commit/b315dee6cd4f67532a53a850cd8f6d461d95ad4d
DIFF:
https://github.com/llvm/llvm-project/commit/b315dee6cd4f67532a53a850cd8f6d461d95ad4d.diff
LOG: Revert "[NFC][CFI] Avoid clang error in CFI tests (#135981)"
This reverts commit 726a5c2c57c486e69df2dfc296482e1d8014ab62.
Added:
Modified:
clang/test/Driver/sanitizer-ld.c
Removed:
diff --git a/clang/test/Driver/sanitizer-ld.c
b/clang/test/Driver/sanitizer-ld.c
index a00ec029d3d46..67ca33d676d20 100644
--- a/clang/test/Driver/sanitizer-ld.c
+++ b/clang/test/Driver/sanitizer-ld.c
@@ -840,8 +840,7 @@
// CHECK-CFI-PREREQ-LINUX: '-fsanitize=cfi' only allowed with '-fvisibility='
// CFI by itself does not link runtime libraries.
-// RUN: %clang -fsanitize=cfi \
-// RUN: -flto -fvisibility=hidden \
+// RUN: not %clang -fsanitize=cfi \
// RUN: --target=x86_64-unknown-linux -fuse-ld=ld -rtlib=platform \
// RUN: -resource-dir=%S/Inputs/resource_dir \
// RUN: --sysroot=%S/Inputs/basic_linux_tree \
@@ -850,8 +849,7 @@
// CHECK-CFI-LINUX: "{{.*}}ld{{(.exe)?}}"
// CFI with diagnostics links the UBSan runtime.
-// RUN: %clang -fsanitize=cfi -fno-sanitize-trap=cfi -fsanitize-recover=cfi \
-// RUN: -flto -fvisibility=hidden \
+// RUN: not %clang -fsanitize=cfi -fno-sanitize-trap=cfi
-fsanitize-recover=cfi \
// RUN: --target=x86_64-unknown-linux -fuse-ld=ld \
// RUN: -resource-dir=%S/Inputs/resource_dir \
// RUN: --sysroot=%S/Inputs/basic_linux_tree \
@@ -861,8 +859,7 @@
// CHECK-CFI-DIAG-LINUX: "--whole-archive"
"{{[^"]*}}libclang_rt.ubsan_standalone.a" "--no-whole-archive"
// Cross-DSO CFI links the CFI runtime.
-// RUN: %clang -fsanitize=cfi -fsanitize-cfi-cross-dso \
-// RUN: -flto -fvisibility=hidden \
+// RUN: not %clang -fsanitize=cfi -fsanitize-cfi-cross-dso \
// RUN: --target=x86_64-unknown-linux -fuse-ld=ld \
// RUN: -resource-dir=%S/Inputs/resource_dir \
// RUN: --sysroot=%S/Inputs/basic_linux_tree \
@@ -873,8 +870,7 @@
// CHECK-CFI-CROSS-DSO-LINUX: -export-dynamic
// Cross-DSO CFI with diagnostics links just the CFI runtime.
-// RUN: %clang -fsanitize=cfi -fsanitize-cfi-cross-dso \
-// RUN: -flto -fvisibility=hidden \
+// RUN: not %clang -fsanitize=cfi -fsanitize-cfi-cross-dso \
// RUN: -fno-sanitize-trap=cfi -fsanitize-recover=cfi \
// RUN: --target=x86_64-unknown-linux -fuse-ld=ld \
// RUN: -resource-dir=%S/Inputs/resource_dir \
@@ -886,8 +882,7 @@
// CHECK-CFI-CROSS-DSO-DIAG-LINUX: -export-dynamic
// Cross-DSO CFI on Android does not link runtime libraries.
-// RUN: %clang -fsanitize=cfi -fsanitize-cfi-cross-dso \
-// RUN: -flto -fvisibility=hidden \
+// RUN: not %clang -fsanitize=cfi -fsanitize-cfi-cross-dso \
// RUN: --target=aarch64-linux-android -fuse-ld=ld \
// RUN: -resource-dir=%S/Inputs/resource_dir \
// RUN: --sysroot=%S/Inputs/basic_android_tree \
@@ -896,8 +891,7 @@
// CHECK-CFI-CROSS-DSO-ANDROID: "{{.*}}ld{{(.exe)?}}"
// Cross-DSO CFI with diagnostics on Android links just the UBSAN runtime.
-// RUN: %clang -fsanitize=cfi -fsanitize-cfi-cross-dso \
-// RUN: -flto -fvisibility=hidden \
+// RUN: not %clang -fsanitize=cfi -fsanitize-cfi-cross-dso \
// RUN: -fno-sanitize-trap=cfi -fsanitize-recover=cfi \
// RUN: --target=aarch64-linux-android -fuse-ld=ld \
// RUN: -resource-dir=%S/Inputs/resource_dir \
___
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[llvm-branch-commits] [SPARC] Use op-then-halve instructions when we have VIS3 (PR #135718)
https://github.com/koachan updated https://github.com/llvm/llvm-project/pull/135718 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [SPARC] Use op-then-neg instructions when we have VIS3 (PR #135717)
https://github.com/koachan updated https://github.com/llvm/llvm-project/pull/135717 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [SPARC] Use lzcnt to implement CTLZ when we have VIS3 (PR #135715)
https://github.com/koachan updated https://github.com/llvm/llvm-project/pull/135715 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [SPARC] Use op-then-halve instructions when we have VIS3 (PR #135718)
https://github.com/koachan updated https://github.com/llvm/llvm-project/pull/135718 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [HLSL] Adding support for Root Constants in LLVM Metadata (PR #135085)
@@ -94,10 +144,56 @@ static bool parse(LLVMContext *Ctx,
mcdxbc::RootSignatureDesc &RSD,
static bool verifyRootFlag(uint32_t Flags) { return (Flags & ~0xfff) == 0; }
+static bool verifyShaderVisibility(dxbc::ShaderVisibility Flags) {
+ switch (Flags) {
+
+ case dxbc::ShaderVisibility::All:
+ case dxbc::ShaderVisibility::Vertex:
+ case dxbc::ShaderVisibility::Hull:
+ case dxbc::ShaderVisibility::Domain:
+ case dxbc::ShaderVisibility::Geometry:
+ case dxbc::ShaderVisibility::Pixel:
+ case dxbc::ShaderVisibility::Amplification:
+ case dxbc::ShaderVisibility::Mesh:
+return true;
+ }
+
+ return false;
+}
+
+static bool verifyParameterType(dxbc::RootParameterType Flags) {
+ switch (Flags) {
+ case dxbc::RootParameterType::Constants32Bit:
joaosaffran wrote:
We are reusing the structures defined in `mcdxbc`, these structs are used to
serialize the Root Signature into the binary format. This is used in
`obj2yaml/yaml2obj` binary. Those require to be `uint32_t`, that is the value
that will be actually encoded in the binary and, most importantly,
`obj2yaml/yaml2obj` must be able to write invalid root signatures, and that is
not possible using an enum, due to a limitation of the yaml infrastructure.
https://github.com/llvm/llvm-project/pull/135085
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[llvm-branch-commits] [llvm] [SPARC] Use lzcnt to implement CTLZ when we have VIS3 (PR #135715)
@@ -303,4 +303,10 @@ def : Pat<(i64 (mulhs i64:$lhs, i64:$rhs)), (SUBrr (UMULXHI $lhs, $rhs), (ADDrr (ANDrr (SRAXri $lhs, 63), $rhs), (ANDrr (SRAXri $rhs, 63), $lhs)))>; + +def : Pat<(i64 (ctlz i64:$src)), (LZCNT $src)>; +// 32-bit LZCNT. +// The zero extension will leave us with 32 extra leading zeros, +// so we need to compensate for it. +def : Pat<(i32 (ctlz i32:$src)), (ADDri (LZCNT (SRLri $src, 0)), (i32 -32))>; koachan wrote: I'm sorry, I just noticed something. The instruction should still work on 32-bit V8+ target, and `Promote`-ing doesn't work there at the moment. Since the V8+ targets have 64-bit physical registers anyway, the subsequent subtraction would still be safe, so I think I'll keep the pattern for now, at least until the codegen supports using the full width of the registers. https://github.com/llvm/llvm-project/pull/135715 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [SPARC] Use lzcnt to implement CTLZ when we have VIS3 (PR #135715)
@@ -0,0 +1,183 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc < %s -mtriple=sparcv9 | FileCheck %s -check-prefix=V9 s-barannikov wrote: Would be nice to check V8 as well. https://github.com/llvm/llvm-project/pull/135715 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [SPARC] Use lzcnt to implement CTLZ when we have VIS3 (PR #135715)
https://github.com/s-barannikov approved this pull request. Looks great, I left some final comments (few of them are actionable). There is also a couple of methods in TargetLoweringBase that should be implemented: `isCheapToSpeculateCtlz()`, `isCtlzFast()`. I think they could improve codegen a bit. Not required in this PR though. https://github.com/llvm/llvm-project/pull/135715 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [SPARC] Use lzcnt to implement CTLZ when we have VIS3 (PR #135715)
@@ -0,0 +1,183 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=sparcv9 | FileCheck %s -check-prefix=V9
+; RUN: llc < %s -mtriple=sparcv9 -mattr=popc | FileCheck %s -check-prefix=POPC
+; RUN: llc < %s -mtriple=sparcv9 -mattr=vis3 | FileCheck %s -check-prefix=VIS3
+
+define i32 @i32_nopoison(i32 %x) nounwind {
+; V9-LABEL: i32_nopoison:
+; V9: ! %bb.0:
+; V9-NEXT:save %sp, -176, %sp
+; V9-NEXT:cmp %i0, 0
+; V9-NEXT:be %icc, .LBB0_2
+; V9-NEXT:nop
+; V9-NEXT: ! %bb.1: ! %cond.false
+; V9-NEXT:call __clzdi2
+; V9-NEXT:sllx %i0, 32, %o0
+; V9-NEXT:ret
+; V9-NEXT:restore %g0, %o0, %o0
+; V9-NEXT: .LBB0_2:
+; V9-NEXT:ret
+; V9-NEXT:restore %g0, 32, %o0
+;
+; POPC-LABEL: i32_nopoison:
+; POPC: ! %bb.0:
+; POPC-NEXT:cmp %o0, 0
+; POPC-NEXT:be %icc, .LBB0_2
+; POPC-NEXT:nop
+; POPC-NEXT: ! %bb.1: ! %cond.false
+; POPC-NEXT:srl %o0, 1, %o1
+; POPC-NEXT:or %o0, %o1, %o0
+; POPC-NEXT:srl %o0, 2, %o1
+; POPC-NEXT:or %o0, %o1, %o0
+; POPC-NEXT:srl %o0, 4, %o1
+; POPC-NEXT:or %o0, %o1, %o0
+; POPC-NEXT:srl %o0, 8, %o1
+; POPC-NEXT:or %o0, %o1, %o0
+; POPC-NEXT:srl %o0, 16, %o1
+; POPC-NEXT:or %o0, %o1, %o0
+; POPC-NEXT:xor %o0, -1, %o0
+; POPC-NEXT:srl %o0, 0, %o0
+; POPC-NEXT:retl
+; POPC-NEXT:popc %o0, %o0
+; POPC-NEXT: .LBB0_2:
+; POPC-NEXT:retl
+; POPC-NEXT:mov 32, %o0
+;
+; VIS3-LABEL: i32_nopoison:
+; VIS3: ! %bb.0:
+; VIS3-NEXT:cmp %o0, 0
+; VIS3-NEXT:be %icc, .LBB0_2
s-barannikov wrote:
The branch is redundant, but I guess there is nothing we can do with it right
now. It must've been created too early.
https://github.com/llvm/llvm-project/pull/135715
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[llvm-branch-commits] [llvm] [HLSL] Adding support for Root Constants in LLVM Metadata (PR #135085)
https://github.com/joaosaffran updated
https://github.com/llvm/llvm-project/pull/135085
>From 9b59d0108f6b23c039e2c417247216862073cd4b Mon Sep 17 00:00:00 2001
From: joaosaffran
Date: Wed, 9 Apr 2025 21:05:58 +
Subject: [PATCH 01/13] adding support for root constants in metadata
generation
---
llvm/lib/Target/DirectX/DXILRootSignature.cpp | 120 +-
llvm/lib/Target/DirectX/DXILRootSignature.h | 6 +-
.../RootSignature-Flags-Validation-Error.ll | 7 +-
.../RootSignature-RootConstants.ll| 34 +
...ature-ShaderVisibility-Validation-Error.ll | 20 +++
5 files changed, 182 insertions(+), 5 deletions(-)
create mode 100644
llvm/test/CodeGen/DirectX/ContainerData/RootSignature-RootConstants.ll
create mode 100644
llvm/test/CodeGen/DirectX/ContainerData/RootSignature-ShaderVisibility-Validation-Error.ll
diff --git a/llvm/lib/Target/DirectX/DXILRootSignature.cpp
b/llvm/lib/Target/DirectX/DXILRootSignature.cpp
index 412ab7765a7ae..7686918b0fc75 100644
--- a/llvm/lib/Target/DirectX/DXILRootSignature.cpp
+++ b/llvm/lib/Target/DirectX/DXILRootSignature.cpp
@@ -40,6 +40,13 @@ static bool reportError(LLVMContext *Ctx, Twine Message,
return true;
}
+static bool reportValueError(LLVMContext *Ctx, Twine ParamName, uint32_t Value,
+ DiagnosticSeverity Severity = DS_Error) {
+ Ctx->diagnose(DiagnosticInfoGeneric(
+ "Invalid value for " + ParamName + ": " + Twine(Value), Severity));
+ return true;
+}
+
static bool parseRootFlags(LLVMContext *Ctx, mcdxbc::RootSignatureDesc &RSD,
MDNode *RootFlagNode) {
@@ -52,6 +59,45 @@ static bool parseRootFlags(LLVMContext *Ctx,
mcdxbc::RootSignatureDesc &RSD,
return false;
}
+static bool extractMdValue(uint32_t &Value, MDNode *Node, unsigned int OpId) {
+
+ auto *CI = mdconst::extract(Node->getOperand(OpId));
+ if (CI == nullptr)
+return true;
+
+ Value = CI->getZExtValue();
+ return false;
+}
+
+static bool parseRootConstants(LLVMContext *Ctx, mcdxbc::RootSignatureDesc
&RSD,
+ MDNode *RootFlagNode) {
+
+ if (RootFlagNode->getNumOperands() != 5)
+return reportError(Ctx, "Invalid format for RootConstants Element");
+
+ mcdxbc::RootParameter NewParameter;
+ NewParameter.Header.ParameterType = dxbc::RootParameterType::Constants32Bit;
+
+ uint32_t SV;
+ if (extractMdValue(SV, RootFlagNode, 1))
+return reportError(Ctx, "Invalid value for ShaderVisibility");
+
+ NewParameter.Header.ShaderVisibility = (dxbc::ShaderVisibility)SV;
+
+ if (extractMdValue(NewParameter.Constants.ShaderRegister, RootFlagNode, 2))
+return reportError(Ctx, "Invalid value for ShaderRegister");
+
+ if (extractMdValue(NewParameter.Constants.RegisterSpace, RootFlagNode, 3))
+return reportError(Ctx, "Invalid value for RegisterSpace");
+
+ if (extractMdValue(NewParameter.Constants.Num32BitValues, RootFlagNode, 4))
+return reportError(Ctx, "Invalid value for Num32BitValues");
+
+ RSD.Parameters.push_back(NewParameter);
+
+ return false;
+}
+
static bool parseRootSignatureElement(LLVMContext *Ctx,
mcdxbc::RootSignatureDesc &RSD,
MDNode *Element) {
@@ -62,12 +108,16 @@ static bool parseRootSignatureElement(LLVMContext *Ctx,
RootSignatureElementKind ElementKind =
StringSwitch(ElementText->getString())
.Case("RootFlags", RootSignatureElementKind::RootFlags)
+ .Case("RootConstants", RootSignatureElementKind::RootConstants)
.Default(RootSignatureElementKind::Error);
switch (ElementKind) {
case RootSignatureElementKind::RootFlags:
return parseRootFlags(Ctx, RSD, Element);
+ case RootSignatureElementKind::RootConstants:
+return parseRootConstants(Ctx, RSD, Element);
+break;
case RootSignatureElementKind::Error:
return reportError(Ctx, "Invalid Root Signature Element: " +
ElementText->getString());
@@ -94,10 +144,56 @@ static bool parse(LLVMContext *Ctx,
mcdxbc::RootSignatureDesc &RSD,
static bool verifyRootFlag(uint32_t Flags) { return (Flags & ~0xfff) == 0; }
+static bool verifyShaderVisibility(dxbc::ShaderVisibility Flags) {
+ switch (Flags) {
+
+ case dxbc::ShaderVisibility::All:
+ case dxbc::ShaderVisibility::Vertex:
+ case dxbc::ShaderVisibility::Hull:
+ case dxbc::ShaderVisibility::Domain:
+ case dxbc::ShaderVisibility::Geometry:
+ case dxbc::ShaderVisibility::Pixel:
+ case dxbc::ShaderVisibility::Amplification:
+ case dxbc::ShaderVisibility::Mesh:
+return true;
+ }
+
+ return false;
+}
+
+static bool verifyParameterType(dxbc::RootParameterType Flags) {
+ switch (Flags) {
+ case dxbc::RootParameterType::Constants32Bit:
+return true;
+ }
+
+ return false;
+}
+
+static bool verifyVersion(uint32_t Version) {
+ return (Version == 1 || Version == 2);
+}
+
static bool validate(LLVMContext *Ctx, const mcdxbc::RootSignatureDe
[llvm-branch-commits] [SPARC] Use native bitcast instructions when we have VIS3 (PR #135716)
https://github.com/koachan updated https://github.com/llvm/llvm-project/pull/135716 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [SPARC] Use lzcnt to implement CTLZ when we have VIS3 (PR #135715)
@@ -0,0 +1,183 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=sparcv9 | FileCheck %s -check-prefix=V9
+; RUN: llc < %s -mtriple=sparcv9 -mattr=popc | FileCheck %s -check-prefix=POPC
+; RUN: llc < %s -mtriple=sparcv9 -mattr=vis3 | FileCheck %s -check-prefix=VIS3
+
+define i32 @i32_nopoison(i32 %x) nounwind {
+; V9-LABEL: i32_nopoison:
+; V9: ! %bb.0:
+; V9-NEXT:save %sp, -176, %sp
+; V9-NEXT:cmp %i0, 0
+; V9-NEXT:be %icc, .LBB0_2
+; V9-NEXT:nop
+; V9-NEXT: ! %bb.1: ! %cond.false
+; V9-NEXT:call __clzdi2
+; V9-NEXT:sllx %i0, 32, %o0
+; V9-NEXT:ret
+; V9-NEXT:restore %g0, %o0, %o0
+; V9-NEXT: .LBB0_2:
+; V9-NEXT:ret
+; V9-NEXT:restore %g0, 32, %o0
+;
+; POPC-LABEL: i32_nopoison:
+; POPC: ! %bb.0:
+; POPC-NEXT:cmp %o0, 0
+; POPC-NEXT:be %icc, .LBB0_2
+; POPC-NEXT:nop
+; POPC-NEXT: ! %bb.1: ! %cond.false
+; POPC-NEXT:srl %o0, 1, %o1
+; POPC-NEXT:or %o0, %o1, %o0
+; POPC-NEXT:srl %o0, 2, %o1
+; POPC-NEXT:or %o0, %o1, %o0
+; POPC-NEXT:srl %o0, 4, %o1
+; POPC-NEXT:or %o0, %o1, %o0
+; POPC-NEXT:srl %o0, 8, %o1
+; POPC-NEXT:or %o0, %o1, %o0
+; POPC-NEXT:srl %o0, 16, %o1
+; POPC-NEXT:or %o0, %o1, %o0
+; POPC-NEXT:xor %o0, -1, %o0
+; POPC-NEXT:srl %o0, 0, %o0
+; POPC-NEXT:retl
+; POPC-NEXT:popc %o0, %o0
+; POPC-NEXT: .LBB0_2:
+; POPC-NEXT:retl
+; POPC-NEXT:mov 32, %o0
+;
+; VIS3-LABEL: i32_nopoison:
+; VIS3: ! %bb.0:
+; VIS3-NEXT:cmp %o0, 0
+; VIS3-NEXT:be %icc, .LBB0_2
+; VIS3-NEXT:nop
+; VIS3-NEXT: ! %bb.1: ! %cond.false
+; VIS3-NEXT:sllx %o0, 32, %o0
+; VIS3-NEXT:retl
+; VIS3-NEXT:lzcnt %o0, %o0
+; VIS3-NEXT: .LBB0_2:
+; VIS3-NEXT:retl
+; VIS3-NEXT:mov 32, %o0
+ %ret = call i32 @llvm.ctlz.i32(i32 %x, i1 false)
+ ret i32 %ret
+}
+
+define i32 @i32_poison(i32 %x) nounwind {
+; V9-LABEL: i32_poison:
+; V9: ! %bb.0:
+; V9-NEXT:save %sp, -176, %sp
+; V9-NEXT:call __clzdi2
+; V9-NEXT:sllx %i0, 32, %o0
+; V9-NEXT:ret
+; V9-NEXT:restore %g0, %o0, %o0
s-barannikov wrote:
I wonder why gcc produced another shift and an add...
https://github.com/llvm/llvm-project/pull/135715
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[llvm-branch-commits] [llvm] [SPARC] Use lzcnt to implement CTLZ when we have VIS3 (PR #135715)
https://github.com/s-barannikov edited https://github.com/llvm/llvm-project/pull/135715 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
