[llvm-branch-commits] [llvm] [BOLT] Gadget scanner: Detect address materialization and arithmetics (PR #132540)
https://github.com/atrosinenko updated https://github.com/llvm/llvm-project/pull/132540 >From b79f18b92219916d47f134bf9a3da83889b69f4d Mon Sep 17 00:00:00 2001 From: Anatoly Trosinenko Date: Thu, 20 Mar 2025 20:15:07 +0300 Subject: [PATCH] [BOLT] Gadget scanner: Detect address materialization and arithmetics In addition to authenticated pointers, consider the contents of a register safe if it was * written by PC-relative address computation * updated by an arithmetic instruction whose input address is safe --- bolt/include/bolt/Core/MCPlusBuilder.h| 16 ++ bolt/lib/Passes/PAuthGadgetScanner.cpp| 92 +-- .../Target/AArch64/AArch64MCPlusBuilder.cpp | 30 +++ .../AArch64/gs-pacret-autiasp.s | 15 -- .../gs-pauth-address-materialization.s| 228 ++ .../binary-analysis/AArch64/lit.local.cfg | 3 +- 6 files changed, 345 insertions(+), 39 deletions(-) create mode 100644 bolt/test/binary-analysis/AArch64/gs-pauth-address-materialization.s diff --git a/bolt/include/bolt/Core/MCPlusBuilder.h b/bolt/include/bolt/Core/MCPlusBuilder.h index b3d54ccd5955d..50137a9137951 100644 --- a/bolt/include/bolt/Core/MCPlusBuilder.h +++ b/bolt/include/bolt/Core/MCPlusBuilder.h @@ -587,6 +587,22 @@ class MCPlusBuilder { return getNoRegister(); } + virtual MCPhysReg getSafelyMaterializedAddressReg(const MCInst &Inst) const { +llvm_unreachable("not implemented"); +return getNoRegister(); + } + + /// Analyzes if this instruction can safely perform address arithmetics. + /// + /// If the first element of the returned pair is no-register, this instruction + /// is considered unknown. Otherwise, (output, input) pair is returned, + /// so that output is as trusted as input is. + virtual std::pair + analyzeSafeAddressArithmetics(const MCInst &Inst) const { +llvm_unreachable("not implemented"); +return std::make_pair(getNoRegister(), getNoRegister()); + } + virtual bool isTerminator(const MCInst &Inst) const; virtual bool isNoop(const MCInst &Inst) const { diff --git a/bolt/lib/Passes/PAuthGadgetScanner.cpp b/bolt/lib/Passes/PAuthGadgetScanner.cpp index 08b55bb55d0dc..10545347a6711 100644 --- a/bolt/lib/Passes/PAuthGadgetScanner.cpp +++ b/bolt/lib/Passes/PAuthGadgetScanner.cpp @@ -325,18 +325,7 @@ class PacRetAnalysis }); } - State computeNext(const MCInst &Point, const State &Cur) { -PacStatePrinter P(BC); -LLVM_DEBUG({ - dbgs() << " PacRetAnalysis::ComputeNext("; - BC.InstPrinter->printInst(&const_cast(Point), 0, "", *BC.STI, -dbgs()); - dbgs() << ", "; - P.print(dbgs(), Cur); - dbgs() << ")\n"; -}); - -State Next = Cur; + BitVector getClobberedRegs(const MCInst &Point) const { BitVector Clobbered(NumRegs, false); // Assume a call can clobber all registers, including callee-saved // registers. There's a good chance that callee-saved registers will be @@ -349,6 +338,62 @@ class PacRetAnalysis Clobbered.set(); else BC.MIB->getClobberedRegs(Point, Clobbered); +return Clobbered; + } + + // Returns all registers that can be treated as if they are written by an + // authentication instruction. + SmallVector getAuthenticatedRegs(const MCInst &Point, + const State &Cur) const { +SmallVector Regs; +const MCPhysReg NoReg = BC.MIB->getNoRegister(); + +// A signed pointer can be authenticated, or +ErrorOr AutReg = BC.MIB->getAuthenticatedReg(Point); +if (AutReg && *AutReg != NoReg) + Regs.push_back(*AutReg); + +// ... a safe address can be materialized, or +MCPhysReg NewAddrReg = BC.MIB->getSafelyMaterializedAddressReg(Point); +if (NewAddrReg != NoReg) + Regs.push_back(NewAddrReg); + +// ... address can be updated in a safe manner, producing the result +// which is as trusted as the input address. +MCPhysReg ArithResult, ArithSrc; +std::tie(ArithResult, ArithSrc) = +BC.MIB->analyzeSafeAddressArithmetics(Point); +if (ArithResult != NoReg && Cur.SafeToDerefRegs[ArithSrc]) + Regs.push_back(ArithResult); + +return Regs; + } + + State computeNext(const MCInst &Point, const State &Cur) { +PacStatePrinter P(BC); +LLVM_DEBUG({ + dbgs() << " PacRetAnalysis::ComputeNext("; + BC.InstPrinter->printInst(&const_cast(Point), 0, "", *BC.STI, +dbgs()); + dbgs() << ", "; + P.print(dbgs(), Cur); + dbgs() << ")\n"; +}); + +// First, compute various properties of the instruction, taking the state +// before its execution into account, if necessary. + +BitVector Clobbered = getClobberedRegs(Point); +// Compute the set of registers that can be considered as written by +// an authentication instruction. This includes operations that are +// *strictly better* than authentication, such as materializing a +// P
[llvm-branch-commits] [llvm] [BOLT] Gadget scanner: Detect address materialization and arithmetics (PR #132540)
https://github.com/atrosinenko ready_for_review https://github.com/llvm/llvm-project/pull/132540 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [BOLT] Gadget scanner: Detect address materialization and arithmetics (PR #132540)
atrosinenko wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/132540?utm_source=stack-comment-downstack-mergeability-warning"; > >on Graphite. > https://graphite.dev/docs/merge-pull-requests";>Learn more * **#132540** https://app.graphite.dev/github/pr/llvm/llvm-project/132540?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/132540?utm_source=stack-comment-view-in-graphite"; target="_blank">(View in Graphite) * **#131899** https://app.graphite.dev/github/pr/llvm/llvm-project/131899?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * **#131898** https://app.graphite.dev/github/pr/llvm/llvm-project/131898?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * **#131897** https://app.graphite.dev/github/pr/llvm/llvm-project/131897?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * **#131896** https://app.graphite.dev/github/pr/llvm/llvm-project/131896?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * **#131895** https://app.graphite.dev/github/pr/llvm/llvm-project/131895?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * `main` This stack of pull requests is managed by https://graphite.dev?utm-source=stack-comment";>Graphite. Learn more about https://stacking.dev/?utm_source=stack-comment";>stacking. https://github.com/llvm/llvm-project/pull/132540 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [BOLT] Gadget scanner: Detect address materialization and arithmetics (PR #132540)
llvmbot wrote: @llvm/pr-subscribers-bolt Author: Anatoly Trosinenko (atrosinenko) Changes In addition to authenticated pointers, consider the contents of a register safe if it was * written by PC-relative address computation * updated by an arithmetic instruction whose input address is safe --- Full diff: https://github.com/llvm/llvm-project/pull/132540.diff 6 Files Affected: - (modified) bolt/include/bolt/Core/MCPlusBuilder.h (+16) - (modified) bolt/lib/Passes/PAuthGadgetScanner.cpp (+69-23) - (modified) bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp (+30) - (modified) bolt/test/binary-analysis/AArch64/gs-pacret-autiasp.s (-15) - (added) bolt/test/binary-analysis/AArch64/gs-pauth-address-materialization.s (+228) - (modified) bolt/test/binary-analysis/AArch64/lit.local.cfg (+2-1) ``diff diff --git a/bolt/include/bolt/Core/MCPlusBuilder.h b/bolt/include/bolt/Core/MCPlusBuilder.h index b3d54ccd5955d..50137a9137951 100644 --- a/bolt/include/bolt/Core/MCPlusBuilder.h +++ b/bolt/include/bolt/Core/MCPlusBuilder.h @@ -587,6 +587,22 @@ class MCPlusBuilder { return getNoRegister(); } + virtual MCPhysReg getSafelyMaterializedAddressReg(const MCInst &Inst) const { +llvm_unreachable("not implemented"); +return getNoRegister(); + } + + /// Analyzes if this instruction can safely perform address arithmetics. + /// + /// If the first element of the returned pair is no-register, this instruction + /// is considered unknown. Otherwise, (output, input) pair is returned, + /// so that output is as trusted as input is. + virtual std::pair + analyzeSafeAddressArithmetics(const MCInst &Inst) const { +llvm_unreachable("not implemented"); +return std::make_pair(getNoRegister(), getNoRegister()); + } + virtual bool isTerminator(const MCInst &Inst) const; virtual bool isNoop(const MCInst &Inst) const { diff --git a/bolt/lib/Passes/PAuthGadgetScanner.cpp b/bolt/lib/Passes/PAuthGadgetScanner.cpp index 08b55bb55d0dc..10545347a6711 100644 --- a/bolt/lib/Passes/PAuthGadgetScanner.cpp +++ b/bolt/lib/Passes/PAuthGadgetScanner.cpp @@ -325,18 +325,7 @@ class PacRetAnalysis }); } - State computeNext(const MCInst &Point, const State &Cur) { -PacStatePrinter P(BC); -LLVM_DEBUG({ - dbgs() << " PacRetAnalysis::ComputeNext("; - BC.InstPrinter->printInst(&const_cast(Point), 0, "", *BC.STI, -dbgs()); - dbgs() << ", "; - P.print(dbgs(), Cur); - dbgs() << ")\n"; -}); - -State Next = Cur; + BitVector getClobberedRegs(const MCInst &Point) const { BitVector Clobbered(NumRegs, false); // Assume a call can clobber all registers, including callee-saved // registers. There's a good chance that callee-saved registers will be @@ -349,6 +338,62 @@ class PacRetAnalysis Clobbered.set(); else BC.MIB->getClobberedRegs(Point, Clobbered); +return Clobbered; + } + + // Returns all registers that can be treated as if they are written by an + // authentication instruction. + SmallVector getAuthenticatedRegs(const MCInst &Point, + const State &Cur) const { +SmallVector Regs; +const MCPhysReg NoReg = BC.MIB->getNoRegister(); + +// A signed pointer can be authenticated, or +ErrorOr AutReg = BC.MIB->getAuthenticatedReg(Point); +if (AutReg && *AutReg != NoReg) + Regs.push_back(*AutReg); + +// ... a safe address can be materialized, or +MCPhysReg NewAddrReg = BC.MIB->getSafelyMaterializedAddressReg(Point); +if (NewAddrReg != NoReg) + Regs.push_back(NewAddrReg); + +// ... address can be updated in a safe manner, producing the result +// which is as trusted as the input address. +MCPhysReg ArithResult, ArithSrc; +std::tie(ArithResult, ArithSrc) = +BC.MIB->analyzeSafeAddressArithmetics(Point); +if (ArithResult != NoReg && Cur.SafeToDerefRegs[ArithSrc]) + Regs.push_back(ArithResult); + +return Regs; + } + + State computeNext(const MCInst &Point, const State &Cur) { +PacStatePrinter P(BC); +LLVM_DEBUG({ + dbgs() << " PacRetAnalysis::ComputeNext("; + BC.InstPrinter->printInst(&const_cast(Point), 0, "", *BC.STI, +dbgs()); + dbgs() << ", "; + P.print(dbgs(), Cur); + dbgs() << ")\n"; +}); + +// First, compute various properties of the instruction, taking the state +// before its execution into account, if necessary. + +BitVector Clobbered = getClobberedRegs(Point); +// Compute the set of registers that can be considered as written by +// an authentication instruction. This includes operations that are +// *strictly better* than authentication, such as materializing a +// PC-relative constant. +SmallVector AuthenticatedOrBetter = +getAuthenticatedRegs(Point, Cur); + +// Then, compute the state after this instruction is executed. +State Next = C
[llvm-branch-commits] [llvm] [AMDGPU] Precommit si-fold-bitmask.mir (PR #131310)
arsenm wrote: > I tried it but the DAG immediately transforms (and x, 0xFF) into a zext and > it seems pretty stubborn about it as it's a basic transform. Then isUnneededShiftMask should probably recognize more forms of the pattern. I'd assume this only forms the zext if it is legal https://github.com/llvm/llvm-project/pull/131310 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [clang-tools-extra] [clang][HeuristicResolver] Apply default argument heuristic in resolveDeclRefExpr as well (PR #132576)
https://github.com/HighCommander4 created https://github.com/llvm/llvm-project/pull/132576 None >From ea949861a4b03123d7784fe5ef3bc1fe2f3cf2cd Mon Sep 17 00:00:00 2001 From: Nathan Ridge Date: Sat, 22 Mar 2025 20:54:02 -0400 Subject: [PATCH] [clang][HeuristicResolver] Apply default argument heuristic in resolveDeclRefExpr as well --- .../clangd/unittests/XRefsTests.cpp | 2 +- clang/lib/Sema/HeuristicResolver.cpp| 6 +++--- clang/unittests/Sema/HeuristicResolverTest.cpp | 17 + 3 files changed, 21 insertions(+), 4 deletions(-) diff --git a/clang-tools-extra/clangd/unittests/XRefsTests.cpp b/clang-tools-extra/clangd/unittests/XRefsTests.cpp index e12d7691c58fb..693e965e78a96 100644 --- a/clang-tools-extra/clangd/unittests/XRefsTests.cpp +++ b/clang-tools-extra/clangd/unittests/XRefsTests.cpp @@ -1091,7 +1091,7 @@ TEST(LocateSymbol, All) { )objc", R"cpp( struct PointerIntPairInfo { - static void *getPointer(void *Value); + static void *$decl[[getPointer]](void *Value); }; template struct PointerIntPair { diff --git a/clang/lib/Sema/HeuristicResolver.cpp b/clang/lib/Sema/HeuristicResolver.cpp index d377379c627db..5f1495f5334b9 100644 --- a/clang/lib/Sema/HeuristicResolver.cpp +++ b/clang/lib/Sema/HeuristicResolver.cpp @@ -300,9 +300,9 @@ std::vector HeuristicResolverImpl::resolveMemberExpr( std::vector HeuristicResolverImpl::resolveDeclRefExpr(const DependentScopeDeclRefExpr *RE) { - return resolveDependentMember( - resolveNestedNameSpecifierToType(RE->getQualifier()), RE->getDeclName(), - StaticFilter); + QualType Qualifier = resolveNestedNameSpecifierToType(RE->getQualifier()); + Qualifier = simplifyType(Qualifier, nullptr, /*UnwrapPointer=*/false); + return resolveDependentMember(Qualifier, RE->getDeclName(), StaticFilter); } std::vector diff --git a/clang/unittests/Sema/HeuristicResolverTest.cpp b/clang/unittests/Sema/HeuristicResolverTest.cpp index c7cfe7917c532..b4994c315b2ff 100644 --- a/clang/unittests/Sema/HeuristicResolverTest.cpp +++ b/clang/unittests/Sema/HeuristicResolverTest.cpp @@ -429,6 +429,23 @@ TEST(HeuristicResolver, DeclRefExpr_StaticMethod) { cxxMethodDecl(hasName("bar")).bind("output")); } +TEST(HeuristicResolver, DeclRefExpr_DefaultTemplateArgument) { + std::string Code = R"cpp( +struct Default { + static void foo(); +}; +template +void bar() { + T::foo(); +} + )cpp"; + // Test resolution of "foo" in "T::foo()". + expectResolution( + Code, &HeuristicResolver::resolveDeclRefExpr, + dependentScopeDeclRefExpr(hasDependentName("foo")).bind("input"), + cxxMethodDecl(hasName("foo")).bind("output")); +} + TEST(HeuristicResolver, DeclRefExpr_StaticOverloads) { std::string Code = R"cpp( template ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [clang-tools-extra] [clang][HeuristicResolver] Apply default argument heuristic in resolveDeclRefExpr as well (PR #132576)
HighCommander4 wrote: This is a follow-up to https://github.com/llvm/llvm-project/pull/131074. After moving the default argument heuristic to `simplifyType` as per [this discussion](https://github.com/llvm/llvm-project/pull/131074#discussion_r2006918564), I realized that this made it no longer apply to the `DependentScopeDeclRefExpr` case, because that wasn't using `simplifyType`. This patch fixes that, with an added testcase. https://github.com/llvm/llvm-project/pull/132576 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [RISCV] Replace @plt/@gotpcrel in data directives with %plt %gotpcrel (PR #132569)
https://github.com/MaskRay edited https://github.com/llvm/llvm-project/pull/132569 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: add RegBankLegalize rules for AND OR and XOR (PR #132382)
petar-avramovic wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/132382?utm_source=stack-comment-downstack-mergeability-warning"; > >on Graphite. > https://graphite.dev/docs/merge-pull-requests";>Learn more * **#132385** https://app.graphite.dev/github/pr/llvm/llvm-project/132385?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * **#132384** https://app.graphite.dev/github/pr/llvm/llvm-project/132384?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * **#132383** https://app.graphite.dev/github/pr/llvm/llvm-project/132383?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * **#132382** https://app.graphite.dev/github/pr/llvm/llvm-project/132382?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/132382?utm_source=stack-comment-view-in-graphite"; target="_blank">(View in Graphite) * **#132381** https://app.graphite.dev/github/pr/llvm/llvm-project/132381?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * `main` This stack of pull requests is managed by https://graphite.dev?utm-source=stack-comment";>Graphite. Learn more about https://stacking.dev/?utm_source=stack-comment";>stacking. https://github.com/llvm/llvm-project/pull/132382 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [SPARC][MC] Add tests for VIS family instructions (PR #130967)
@@ -1,4 +1,237 @@ -! RUN: llvm-mc %s -triple=sparcv9 -mcpu=niagara -show-encoding | FileCheck %s +! RUN: not llvm-mc %s -triple=sparcv9 -show-encoding 2>&1 | FileCheck %s --check-prefixes=NO-VIS MaskRay wrote: might want `--implicit-check-not=error:` to ensure that you do not miss any error check pattern. https://github.com/llvm/llvm-project/pull/130967 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [RISCV] Replace @plt/@gotpcrel in data directives with %plt %gotpcrel (PR #132569)
https://github.com/MaskRay edited https://github.com/llvm/llvm-project/pull/132569 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [SPARC][MC] Add tests for VIS family instructions (PR #130967)
@@ -7,76 +7,96 @@ //===--===// // // This file contains instruction formats, definitions and patterns needed for -// VIS, VIS II, VIS II instructions on SPARC. +// VIS, VIS II, VIS III instructions on SPARC. //===--===// // VIS Instruction Format. class VISInstFormat opfval, dag outs, dag ins, string asmstr, - list pattern> +list pattern = []> : F3_3<0b10, 0b110110, opfval, outs, ins, asmstr, pattern>; -class VISInst opfval, string OpcStr, RegisterClass RC = DFPRegs> +class VISInst opfval, string OpcStr, RegisterClass RC = DFPRegs, +list pattern = []> : VISInstFormat; +!strconcat(OpcStr, " $rs1, $rs2, $rd"), pattern>; // VIS Instruction with integer destination register. -class VISInstID opfval, string OpcStr> +class VISInstID opfval, string OpcStr, list pattern = []> : VISInstFormat; +!strconcat(OpcStr, " $rs1, $rs2, $rd"), pattern>; // For VIS Instructions with no operand. let rd = 0, rs1 = 0, rs2 = 0 in -class VISInst0 opfval, string asmstr> - : VISInstFormat; +class VISInst0 opfval, string asmstr, list pattern = []> + : VISInstFormat; // For VIS Instructions with only rs1, rd operands. let rs2 = 0 in -class VISInst1 opfval, string OpcStr, RegisterClass RC = DFPRegs> +class VISInst1 opfval, string OpcStr, RegisterClass RC = DFPRegs, +list pattern = []> : VISInstFormat; +!strconcat(OpcStr, " $rs1, $rd"), pattern>; // For VIS Instructions with only rs2, rd operands. let rs1 = 0 in -class VISInst2 opfval, string OpcStr, RegisterClass RC = DFPRegs> +class VISInst2 opfval, string OpcStr, RegisterClass RC = DFPRegs, +list pattern = []> : VISInstFormat; +!strconcat(OpcStr, " $rs2, $rd"), pattern>; // For VIS Instructions with only rd operand. let Constraints = "$rd = $f", rs1 = 0, rs2 = 0 in -class VISInstD opfval, string OpcStr, RegisterClass RC = DFPRegs> +class VISInstD opfval, string OpcStr, RegisterClass RC = DFPRegs, +list pattern = []> s-barannikov wrote: IMHO `Pat` is a much cleaner way to define patterns. Currently, there are multiple issues involving patterns that are not obvious because the patterns are inline. For instance, we don't have patterns for some extending loads (IIRC), which results in suboptimal codegen. Having those patterns defined in one place rather thann scattered across large files would make the issue obvious. There is one downside of using `Pat` that you should be aware of: one has to duplicate feature checks on `Pat` from instruction definition. This may not be a big issue though as it is possible to do something like this: ``` let Predicates = [FeatureVIS] in { // multiple patterns here } ``` https://github.com/llvm/llvm-project/pull/130967 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [RISCV] Replace @plt/@gotpcrel in data directives with %plt %gotpcrel (PR #132569)
@@ -18,6 +18,6 @@ .globl _start _start: .data - .word foo@PLT - . - .word foo@PLT - . + 1 - .word foo@PLT - . - 1 + .word %plt(foo - .) jrtc27 wrote: We have %(got_)pcrel_hi and now %gotpcrel, what's so different about this one? https://github.com/llvm/llvm-project/pull/132569 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [clang] Template Specialization Resugaring - Template Type Alias (PR #132442)
https://github.com/mizvekov updated https://github.com/llvm/llvm-project/pull/132442 >From 67a09813823003681954b0fa9adeeb834ec4e576 Mon Sep 17 00:00:00 2001 From: Matheus Izvekov Date: Mon, 30 May 2022 01:46:31 +0200 Subject: [PATCH] [clang] Template Specialization Resugaring - Template Type Alias This implements an additional user of the resugaring transform: the pattern of template type aliases. For more details and discussion see: https://discourse.llvm.org/t/rfc-improving-diagnostics-with-template-specialization-resugaring/64294 Differential Revision: https://reviews.llvm.org/D137199 --- clang/include/clang/Sema/Sema.h | 3 +- clang/lib/Sema/SemaCXXScopeSpec.cpp | 3 +- clang/lib/Sema/SemaCoroutine.cpp | 4 +- clang/lib/Sema/SemaDeclCXX.cpp| 6 ++- clang/lib/Sema/SemaTemplate.cpp | 43 +++ .../lib/Sema/SemaTemplateInstantiateDecl.cpp | 3 +- clang/lib/Sema/TreeTransform.h| 3 +- clang/test/AST/ast-dump-template-decls.cpp| 4 +- clang/test/Sema/Resugar/resugar-types.cpp | 6 +-- 9 files changed, 43 insertions(+), 32 deletions(-) diff --git a/clang/include/clang/Sema/Sema.h b/clang/include/clang/Sema/Sema.h index 047ba88511dac..d45fc14e7b3c4 100644 --- a/clang/include/clang/Sema/Sema.h +++ b/clang/include/clang/Sema/Sema.h @@ -11508,7 +11508,8 @@ class Sema final : public SemaBase { void NoteAllFoundTemplates(TemplateName Name); - QualType CheckTemplateIdType(TemplateName Template, + QualType CheckTemplateIdType(const NestedNameSpecifier *NNS, + TemplateName Template, SourceLocation TemplateLoc, TemplateArgumentListInfo &TemplateArgs); diff --git a/clang/lib/Sema/SemaCXXScopeSpec.cpp b/clang/lib/Sema/SemaCXXScopeSpec.cpp index e8fe1cdd7336a..fe39696a6c6b6 100644 --- a/clang/lib/Sema/SemaCXXScopeSpec.cpp +++ b/clang/lib/Sema/SemaCXXScopeSpec.cpp @@ -910,7 +910,8 @@ bool Sema::ActOnCXXNestedNameSpecifier(Scope *S, // We were able to resolve the template name to an actual template. // Build an appropriate nested-name-specifier. - QualType T = CheckTemplateIdType(Template, TemplateNameLoc, TemplateArgs); + QualType T = CheckTemplateIdType(SS.getScopeRep(), Template, TemplateNameLoc, + TemplateArgs); if (T.isNull()) return true; diff --git a/clang/lib/Sema/SemaCoroutine.cpp b/clang/lib/Sema/SemaCoroutine.cpp index 88d849b27db07..8cca65edc84e3 100644 --- a/clang/lib/Sema/SemaCoroutine.cpp +++ b/clang/lib/Sema/SemaCoroutine.cpp @@ -90,7 +90,7 @@ static QualType lookupPromiseType(Sema &S, const FunctionDecl *FD, // Build the template-id. QualType CoroTrait = - S.CheckTemplateIdType(TemplateName(CoroTraits), KwLoc, Args); + S.CheckTemplateIdType(nullptr, TemplateName(CoroTraits), KwLoc, Args); if (CoroTrait.isNull()) return QualType(); if (S.RequireCompleteType(KwLoc, CoroTrait, @@ -170,7 +170,7 @@ static QualType lookupCoroutineHandleType(Sema &S, QualType PromiseType, // Build the template-id. QualType CoroHandleType = - S.CheckTemplateIdType(TemplateName(CoroHandle), Loc, Args); + S.CheckTemplateIdType(nullptr, TemplateName(CoroHandle), Loc, Args); if (CoroHandleType.isNull()) return QualType(); if (S.RequireCompleteType(Loc, CoroHandleType, diff --git a/clang/lib/Sema/SemaDeclCXX.cpp b/clang/lib/Sema/SemaDeclCXX.cpp index 330afbfa2d19d..26a3f86a718c4 100644 --- a/clang/lib/Sema/SemaDeclCXX.cpp +++ b/clang/lib/Sema/SemaDeclCXX.cpp @@ -1142,7 +1142,8 @@ static bool lookupStdTypeTraitMember(Sema &S, LookupResult &TraitMemberLookup, } // Build the template-id. - QualType TraitTy = S.CheckTemplateIdType(TemplateName(TraitTD), Loc, Args); + QualType TraitTy = + S.CheckTemplateIdType(nullptr, TemplateName(TraitTD), Loc, Args); if (TraitTy.isNull()) return true; if (!S.isCompleteType(Loc, TraitTy)) { @@ -12185,7 +12186,8 @@ QualType Sema::BuildStdInitializerList(QualType Element, SourceLocation Loc) { return Context.getElaboratedType( ElaboratedTypeKeyword::None, NestedNameSpecifier::Create(Context, nullptr, getStdNamespace()), - CheckTemplateIdType(TemplateName(StdInitializerList), Loc, Args)); + CheckTemplateIdType(nullptr, TemplateName(StdInitializerList), Loc, + Args)); } bool Sema::isInitListConstructor(const FunctionDecl *Ctor) { diff --git a/clang/lib/Sema/SemaTemplate.cpp b/clang/lib/Sema/SemaTemplate.cpp index 0b26f79ea3bfc..63a4dab9a41f3 100644 --- a/clang/lib/Sema/SemaTemplate.cpp +++ b/clang/lib/Sema/SemaTemplate.cpp @@ -3817,7 +3817,8 @@ void Sema::NoteAllFoundTemplates(TemplateName Name) { } } -static QualType builtinCommonTypeImpl(Sema &S, TemplateName BaseTemplate, +static QualType builtinCommonTypeImpl(Sema &S, const NestedNameSpecifier *NNS, +
[llvm-branch-commits] [BOLT][NFC] Pre-disasm metadata rewriters (PR #132113)
llvmbot wrote: @llvm/pr-subscribers-bolt Author: Amir Ayupov (aaupov) Changes We need a hook for metadata rewriters after functions are identified but before functions are disassembled. Currently we only have section rewriters (after storage is discovered but before functions are identified) and pre-CFG rewriters (after functions are disassembled). The reason for that particular location is that BOLT finds and uses jump tables during disassembly. If we pre-parse jump tables through #132114, we need them before disassembly. Additionally, debug info pre-parsing can be moved into that hook. Depends on #132110. --- Full diff: https://github.com/llvm/llvm-project/pull/132113.diff 5 Files Affected: - (modified) bolt/include/bolt/Rewrite/MetadataManager.h (+4) - (modified) bolt/include/bolt/Rewrite/MetadataRewriter.h (+4) - (modified) bolt/include/bolt/Rewrite/RewriteInstance.h (+3) - (modified) bolt/lib/Rewrite/MetadataManager.cpp (+12) - (modified) bolt/lib/Rewrite/RewriteInstance.cpp (+9-1) ``diff diff --git a/bolt/include/bolt/Rewrite/MetadataManager.h b/bolt/include/bolt/Rewrite/MetadataManager.h index 6001b70f625e2..cc6e3f98f5e82 100644 --- a/bolt/include/bolt/Rewrite/MetadataManager.h +++ b/bolt/include/bolt/Rewrite/MetadataManager.h @@ -31,6 +31,10 @@ class MetadataManager { /// Run initializers after sections are discovered. void runSectionInitializers(); + /// Execute metadata initializers when functions are discovered but not yet + /// disassembled. + void runInitializersPreDisasm(); + /// Execute initialization of rewriters while functions are disassembled, but /// CFG is not yet built. void runInitializersPreCFG(); diff --git a/bolt/include/bolt/Rewrite/MetadataRewriter.h b/bolt/include/bolt/Rewrite/MetadataRewriter.h index 6ff8f0af7a8e6..d39500c83814c 100644 --- a/bolt/include/bolt/Rewrite/MetadataRewriter.h +++ b/bolt/include/bolt/Rewrite/MetadataRewriter.h @@ -49,6 +49,10 @@ class MetadataRewriter { /// but before functions are discovered. virtual Error sectionInitializer() { return Error::success(); } + /// Run initialization after the functions are identified but not yet + /// disassembled. + virtual Error preDisasmInitializer() { return Error::success(); } + /// Interface for modifying/annotating functions in the binary based on the /// contents of the section. Functions are in pre-cfg state. virtual Error preCFGInitializer() { return Error::success(); } diff --git a/bolt/include/bolt/Rewrite/RewriteInstance.h b/bolt/include/bolt/Rewrite/RewriteInstance.h index fdd65bbd535f7..a8e627711db9e 100644 --- a/bolt/include/bolt/Rewrite/RewriteInstance.h +++ b/bolt/include/bolt/Rewrite/RewriteInstance.h @@ -181,6 +181,9 @@ class RewriteInstance { /// Process metadata in sections before functions are discovered. void processSectionMetadata(); + /// Process metadata in special sections before functions are disassembled. + void processMetadataPreDisasm(); + /// Process metadata in special sections before CFG is built for functions. void processMetadataPreCFG(); diff --git a/bolt/lib/Rewrite/MetadataManager.cpp b/bolt/lib/Rewrite/MetadataManager.cpp index 713d2e47b6efa..8114e156f5a96 100644 --- a/bolt/lib/Rewrite/MetadataManager.cpp +++ b/bolt/lib/Rewrite/MetadataManager.cpp @@ -32,6 +32,18 @@ void MetadataManager::runSectionInitializers() { } } +void MetadataManager::runInitializersPreDisasm() { + for (auto &Rewriter : Rewriters) { +LLVM_DEBUG(dbgs() << "BOLT-DEBUG: invoking " << Rewriter->getName() + << " after reading sections\n"); +if (Error E = Rewriter->preDisasmInitializer()) { + errs() << "BOLT-ERROR: while running " << Rewriter->getName() + << " in pre-disasm state: " << toString(std::move(E)) << '\n'; + exit(1); +} + } +} + void MetadataManager::runInitializersPreCFG() { for (auto &Rewriter : Rewriters) { LLVM_DEBUG(dbgs() << "BOLT-DEBUG: invoking " << Rewriter->getName() diff --git a/bolt/lib/Rewrite/RewriteInstance.cpp b/bolt/lib/Rewrite/RewriteInstance.cpp index a97762063eb1e..32f2cfee60053 100644 --- a/bolt/lib/Rewrite/RewriteInstance.cpp +++ b/bolt/lib/Rewrite/RewriteInstance.cpp @@ -694,7 +694,7 @@ Error RewriteInstance::run() { selectFunctionsToProcess(); - readDebugInfo(); + processMetadataPreDisasm(); disassembleFunctions(); @@ -3237,6 +3237,14 @@ void RewriteInstance::processSectionMetadata() { MetadataManager.runSectionInitializers(); } +void RewriteInstance::processMetadataPreDisasm() { + NamedRegionTimer T("processmetadata-predisasm", "process metadata pre-disasm", + TimerGroupName, TimerGroupDesc, opts::TimeRewrite); + MetadataManager.runInitializersPreDisasm(); + + readDebugInfo(); +} + void RewriteInstance::processMetadataPreCFG() { NamedRegionTimer T("processmetadata-precfg", "process metadata pre-CFG", TimerGroupName, TimerGroupDesc, opts::TimeRe
[llvm-branch-commits] [llvm] [CodeGen][StaticDataSplitter]Support constant pool partitioning (PR #129781)
https://github.com/mingmingl-llvm updated https://github.com/llvm/llvm-project/pull/129781 >From 072c44f0f9272682480cc2837196a906bd694276 Mon Sep 17 00:00:00 2001 From: mingmingl Date: Fri, 28 Feb 2025 14:41:56 -0800 Subject: [PATCH 1/2] [CodeGen][StaticDataSplitter]Support constant pool partitioning --- llvm/include/llvm/CodeGen/AsmPrinter.h| 8 + .../CodeGen/TargetLoweringObjectFileImpl.h| 6 + .../llvm/Target/TargetLoweringObjectFile.h| 7 + llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp| 22 ++- llvm/lib/CodeGen/StaticDataSplitter.cpp | 56 +-- .../CodeGen/TargetLoweringObjectFileImpl.cpp | 35 + llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp | 10 ++ llvm/lib/Target/TargetLoweringObjectFile.cpp | 10 ++ llvm/lib/Target/X86/X86AsmPrinter.cpp | 10 ++ .../AArch64/constant-pool-partition.ll| 141 ++ .../CodeGen/X86/constant-pool-partition.ll| 131 11 files changed, 422 insertions(+), 14 deletions(-) create mode 100644 llvm/test/CodeGen/AArch64/constant-pool-partition.ll create mode 100644 llvm/test/CodeGen/X86/constant-pool-partition.ll diff --git a/llvm/include/llvm/CodeGen/AsmPrinter.h b/llvm/include/llvm/CodeGen/AsmPrinter.h index 3da63af5ba571..2018f411be796 100644 --- a/llvm/include/llvm/CodeGen/AsmPrinter.h +++ b/llvm/include/llvm/CodeGen/AsmPrinter.h @@ -18,6 +18,8 @@ #include "llvm/ADT/DenseMap.h" #include "llvm/ADT/MapVector.h" #include "llvm/ADT/SmallVector.h" +#include "llvm/Analysis/ProfileSummaryInfo.h" +#include "llvm/Analysis/StaticDataProfileInfo.h" #include "llvm/BinaryFormat/Dwarf.h" #include "llvm/CodeGen/DwarfStringPoolEntry.h" #include "llvm/CodeGen/MachineFunctionPass.h" @@ -132,6 +134,12 @@ class AsmPrinter : public MachineFunctionPass { /// default, this is equal to CurrentFnSym. MCSymbol *CurrentFnSymForSize = nullptr; + /// Provides the profile information for constants. + const StaticDataProfileInfo *SDPI = nullptr; + + /// The profile summary information. + const ProfileSummaryInfo *PSI = nullptr; + /// Map a basic block section ID to the begin and end symbols of that section /// which determine the section's range. struct MBBSectionRange { diff --git a/llvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h b/llvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h index 10f0594c267ae..563980fb24ab8 100644 --- a/llvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h +++ b/llvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h @@ -68,6 +68,12 @@ class TargetLoweringObjectFileELF : public TargetLoweringObjectFile { const Constant *C, Align &Alignment) const override; + /// Similar to the function above, but append \p SectionSuffix to the section + /// name. + MCSection *getSectionForConstant(const DataLayout &DL, SectionKind Kind, + const Constant *C, Align &Alignment, + StringRef SectionSuffix) const override; + MCSection *getExplicitSectionGlobal(const GlobalObject *GO, SectionKind Kind, const TargetMachine &TM) const override; diff --git a/llvm/include/llvm/Target/TargetLoweringObjectFile.h b/llvm/include/llvm/Target/TargetLoweringObjectFile.h index a5ed1b29dc1bc..1956748b8058b 100644 --- a/llvm/include/llvm/Target/TargetLoweringObjectFile.h +++ b/llvm/include/llvm/Target/TargetLoweringObjectFile.h @@ -104,6 +104,13 @@ class TargetLoweringObjectFile : public MCObjectFileInfo { SectionKind Kind, const Constant *C, Align &Alignment) const; + /// Similar to the function above, but append \p SectionSuffix to the section + /// name. + virtual MCSection *getSectionForConstant(const DataLayout &DL, + SectionKind Kind, const Constant *C, + Align &Alignment, + StringRef SectionSuffix) const; + virtual MCSection * getSectionForMachineBasicBlock(const Function &F, const MachineBasicBlock &MBB, diff --git a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp index 3c4280333e76d..60018afe2f8a7 100644 --- a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp +++ b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp @@ -2791,8 +2791,26 @@ void AsmPrinter::emitConstantPool() { if (!CPE.isMachineConstantPoolEntry()) C = CPE.Val.ConstVal; -MCSection *S = getObjFileLowering().getSectionForConstant( -getDataLayout(), Kind, C, Alignment); +MCSection *S = nullptr; +if (TM.Options.EnableStaticDataPartitioning) { + SmallString<8> SectionNameSuffix; + if (C && SDPI && PSI) { +auto Count = SDPI->getConstantProfileCount(C); +if (Count) { +
[llvm-branch-commits] [mlir] [mlir][memref] Remove runtime verification for `memref.reinterpret_cast` (PR #132547)
https://github.com/matthias-springer created https://github.com/llvm/llvm-project/pull/132547 The runtime verification code used to verify that the result of a `memref.reinterpret_cast` is in-bounds with respect to the source memref. This is incorrect: `memref.reinterpret_cast` allows users to construct almost arbitrary memref descriptors and there is no correctness expectation. This op is supposed to be used when the user "knows what they are doing." Similarly, the static verifier of `memref.reinterpret_cast` does not verify in-bounds semantics either. >From b52e2fde970610bb749195259d915e488d66f9c8 Mon Sep 17 00:00:00 2001 From: Matthias Springer Date: Sat, 22 Mar 2025 13:24:53 +0100 Subject: [PATCH] [mlir][memref] Remove runtime verification for `memref.reinterpret_cast` The runtime verification code used to verify that the result of a `memref.reinterpret_cast` is in-bounds with respect to the source memref. This is incorrect: `memref.reinterpret_cast` allows users to construct almost arbitrary memref descriptors and there is no correctness expectation. This op is supposed to be used when the user "knows what they are doing." Similarly, the static verifier of `memref.reinterpret_cast` does not verify in-bounds semantics either. --- .../Transforms/RuntimeOpVerification.cpp | 74 +-- ...reinterpret-cast-runtime-verification.mlir | 74 --- 2 files changed, 1 insertion(+), 147 deletions(-) delete mode 100644 mlir/test/Integration/Dialect/MemRef/reinterpret-cast-runtime-verification.mlir diff --git a/mlir/lib/Dialect/MemRef/Transforms/RuntimeOpVerification.cpp b/mlir/lib/Dialect/MemRef/Transforms/RuntimeOpVerification.cpp index 7cd4814bf88d0..922111e1fad1f 100644 --- a/mlir/lib/Dialect/MemRef/Transforms/RuntimeOpVerification.cpp +++ b/mlir/lib/Dialect/MemRef/Transforms/RuntimeOpVerification.cpp @@ -255,78 +255,6 @@ struct LoadStoreOpInterface } }; -/// Compute the linear index for the provided strided layout and indices. -Value computeLinearIndex(OpBuilder &builder, Location loc, OpFoldResult offset, - ArrayRef strides, - ArrayRef indices) { - auto [expr, values] = computeLinearIndex(offset, strides, indices); - auto index = - affine::makeComposedFoldedAffineApply(builder, loc, expr, values); - return getValueOrCreateConstantIndexOp(builder, loc, index); -} - -/// Returns two Values representing the bounds of the provided strided layout -/// metadata. The bounds are returned as a half open interval -- [low, high). -std::pair computeLinearBounds(OpBuilder &builder, Location loc, -OpFoldResult offset, -ArrayRef strides, -ArrayRef sizes) { - auto zeros = SmallVector(sizes.size(), 0); - auto indices = getAsIndexOpFoldResult(builder.getContext(), zeros); - auto lowerBound = computeLinearIndex(builder, loc, offset, strides, indices); - auto upperBound = computeLinearIndex(builder, loc, offset, strides, sizes); - return {lowerBound, upperBound}; -} - -/// Returns two Values representing the bounds of the memref. The bounds are -/// returned as a half open interval -- [low, high). -std::pair computeLinearBounds(OpBuilder &builder, Location loc, -TypedValue memref) { - auto runtimeMetadata = builder.create(loc, memref); - auto offset = runtimeMetadata.getConstifiedMixedOffset(); - auto strides = runtimeMetadata.getConstifiedMixedStrides(); - auto sizes = runtimeMetadata.getConstifiedMixedSizes(); - return computeLinearBounds(builder, loc, offset, strides, sizes); -} - -/// Verifies that the linear bounds of a reinterpret_cast op are within the -/// linear bounds of the base memref: low >= baseLow && high <= baseHigh -struct ReinterpretCastOpInterface -: public RuntimeVerifiableOpInterface::ExternalModel< - ReinterpretCastOpInterface, ReinterpretCastOp> { - void generateRuntimeVerification(Operation *op, OpBuilder &builder, - Location loc) const { -auto reinterpretCast = cast(op); -auto baseMemref = reinterpretCast.getSource(); -auto resultMemref = -cast>(reinterpretCast.getResult()); - -builder.setInsertionPointAfter(op); - -// Compute the linear bounds of the base memref -auto [baseLow, baseHigh] = computeLinearBounds(builder, loc, baseMemref); - -// Compute the linear bounds of the resulting memref -auto [low, high] = computeLinearBounds(builder, loc, resultMemref); - -// Check low >= baseLow -auto geLow = builder.createOrFold( -loc, arith::CmpIPredicate::sge, low, baseLow); - -// Check high <= baseHigh -auto leHigh = builder.createOrFold( -loc, arith::CmpIPredicate::sle, high, baseHigh); - -auto assertCond = builder.createOrFold(loc, geLow, leHigh); - -builder.create( -loc, ass
[llvm-branch-commits] [llvm] [SPARC][MC] Add tests for VIS family instructions (PR #130967)
@@ -82,6 +82,8 @@ def UseDeprecatedInsts : Predicate<"Subtarget->useV8DeprecatedInsts()">; // Instruction Pattern Stuff //===--===// +def siam_mode : PatLeaf<(imm), [{ return isUInt<3>(N->getZExtValue()); }]>; s-barannikov wrote: ```suggestion def uimm3 : PatLeaf<(imm), [{ return isUInt<3>(N->getZExtValue()); }]>; ``` https://github.com/llvm/llvm-project/pull/130967 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [SPARC][MC] Add tests for VIS family instructions (PR #130967)
https://github.com/s-barannikov approved this pull request. https://github.com/llvm/llvm-project/pull/130967 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [BOLT] Gadget scanner: Detect address materialization and arithmetics (PR #132540)
https://github.com/atrosinenko created https://github.com/llvm/llvm-project/pull/132540 In addition to authenticated pointers, consider the contents of a register safe if it was * written by PC-relative address computation * updated by an arithmetic instruction whose input address is safe >From 8f1221b67cffeedf4455a911c86db3afd59addfe Mon Sep 17 00:00:00 2001 From: Anatoly Trosinenko Date: Thu, 20 Mar 2025 20:15:07 +0300 Subject: [PATCH] [BOLT] Gadget scanner: Detect address materialization and arithmetics In addition to authenticated pointers, consider the contents of a register safe if it was * written by PC-relative address computation * updated by an arithmetic instruction whose input address is safe --- bolt/include/bolt/Core/MCPlusBuilder.h| 16 ++ bolt/lib/Passes/PAuthGadgetScanner.cpp| 92 +-- .../Target/AArch64/AArch64MCPlusBuilder.cpp | 30 +++ .../AArch64/gs-pacret-autiasp.s | 15 -- .../gs-pauth-address-materialization.s| 228 ++ .../binary-analysis/AArch64/lit.local.cfg | 3 +- 6 files changed, 345 insertions(+), 39 deletions(-) create mode 100644 bolt/test/binary-analysis/AArch64/gs-pauth-address-materialization.s diff --git a/bolt/include/bolt/Core/MCPlusBuilder.h b/bolt/include/bolt/Core/MCPlusBuilder.h index b3d54ccd5955d..50137a9137951 100644 --- a/bolt/include/bolt/Core/MCPlusBuilder.h +++ b/bolt/include/bolt/Core/MCPlusBuilder.h @@ -587,6 +587,22 @@ class MCPlusBuilder { return getNoRegister(); } + virtual MCPhysReg getSafelyMaterializedAddressReg(const MCInst &Inst) const { +llvm_unreachable("not implemented"); +return getNoRegister(); + } + + /// Analyzes if this instruction can safely perform address arithmetics. + /// + /// If the first element of the returned pair is no-register, this instruction + /// is considered unknown. Otherwise, (output, input) pair is returned, + /// so that output is as trusted as input is. + virtual std::pair + analyzeSafeAddressArithmetics(const MCInst &Inst) const { +llvm_unreachable("not implemented"); +return std::make_pair(getNoRegister(), getNoRegister()); + } + virtual bool isTerminator(const MCInst &Inst) const; virtual bool isNoop(const MCInst &Inst) const { diff --git a/bolt/lib/Passes/PAuthGadgetScanner.cpp b/bolt/lib/Passes/PAuthGadgetScanner.cpp index 08b55bb55d0dc..10545347a6711 100644 --- a/bolt/lib/Passes/PAuthGadgetScanner.cpp +++ b/bolt/lib/Passes/PAuthGadgetScanner.cpp @@ -325,18 +325,7 @@ class PacRetAnalysis }); } - State computeNext(const MCInst &Point, const State &Cur) { -PacStatePrinter P(BC); -LLVM_DEBUG({ - dbgs() << " PacRetAnalysis::ComputeNext("; - BC.InstPrinter->printInst(&const_cast(Point), 0, "", *BC.STI, -dbgs()); - dbgs() << ", "; - P.print(dbgs(), Cur); - dbgs() << ")\n"; -}); - -State Next = Cur; + BitVector getClobberedRegs(const MCInst &Point) const { BitVector Clobbered(NumRegs, false); // Assume a call can clobber all registers, including callee-saved // registers. There's a good chance that callee-saved registers will be @@ -349,6 +338,62 @@ class PacRetAnalysis Clobbered.set(); else BC.MIB->getClobberedRegs(Point, Clobbered); +return Clobbered; + } + + // Returns all registers that can be treated as if they are written by an + // authentication instruction. + SmallVector getAuthenticatedRegs(const MCInst &Point, + const State &Cur) const { +SmallVector Regs; +const MCPhysReg NoReg = BC.MIB->getNoRegister(); + +// A signed pointer can be authenticated, or +ErrorOr AutReg = BC.MIB->getAuthenticatedReg(Point); +if (AutReg && *AutReg != NoReg) + Regs.push_back(*AutReg); + +// ... a safe address can be materialized, or +MCPhysReg NewAddrReg = BC.MIB->getSafelyMaterializedAddressReg(Point); +if (NewAddrReg != NoReg) + Regs.push_back(NewAddrReg); + +// ... address can be updated in a safe manner, producing the result +// which is as trusted as the input address. +MCPhysReg ArithResult, ArithSrc; +std::tie(ArithResult, ArithSrc) = +BC.MIB->analyzeSafeAddressArithmetics(Point); +if (ArithResult != NoReg && Cur.SafeToDerefRegs[ArithSrc]) + Regs.push_back(ArithResult); + +return Regs; + } + + State computeNext(const MCInst &Point, const State &Cur) { +PacStatePrinter P(BC); +LLVM_DEBUG({ + dbgs() << " PacRetAnalysis::ComputeNext("; + BC.InstPrinter->printInst(&const_cast(Point), 0, "", *BC.STI, +dbgs()); + dbgs() << ", "; + P.print(dbgs(), Cur); + dbgs() << ")\n"; +}); + +// First, compute various properties of the instruction, taking the state +// before its execution into account, if necessary. + +BitVector Clobbered = getClobberedRegs(Point); +// Compute the set
[llvm-branch-commits] [llvm] [SPARC][MC] Add tests for VIS family instructions (PR #130967)
@@ -7,76 +7,96 @@ //===--===// // // This file contains instruction formats, definitions and patterns needed for -// VIS, VIS II, VIS II instructions on SPARC. +// VIS, VIS II, VIS III instructions on SPARC. //===--===// // VIS Instruction Format. class VISInstFormat opfval, dag outs, dag ins, string asmstr, - list pattern> +list pattern = []> : F3_3<0b10, 0b110110, opfval, outs, ins, asmstr, pattern>; -class VISInst opfval, string OpcStr, RegisterClass RC = DFPRegs> +class VISInst opfval, string OpcStr, RegisterClass RC = DFPRegs, +list pattern = []> : VISInstFormat; +!strconcat(OpcStr, " $rs1, $rs2, $rd"), pattern>; // VIS Instruction with integer destination register. -class VISInstID opfval, string OpcStr> +class VISInstID opfval, string OpcStr, list pattern = []> : VISInstFormat; +!strconcat(OpcStr, " $rs1, $rs2, $rd"), pattern>; // For VIS Instructions with no operand. let rd = 0, rs1 = 0, rs2 = 0 in -class VISInst0 opfval, string asmstr> - : VISInstFormat; +class VISInst0 opfval, string asmstr, list pattern = []> + : VISInstFormat; // For VIS Instructions with only rs1, rd operands. let rs2 = 0 in -class VISInst1 opfval, string OpcStr, RegisterClass RC = DFPRegs> +class VISInst1 opfval, string OpcStr, RegisterClass RC = DFPRegs, +list pattern = []> : VISInstFormat; +!strconcat(OpcStr, " $rs1, $rd"), pattern>; // For VIS Instructions with only rs2, rd operands. let rs1 = 0 in -class VISInst2 opfval, string OpcStr, RegisterClass RC = DFPRegs> +class VISInst2 opfval, string OpcStr, RegisterClass RC = DFPRegs, +list pattern = []> : VISInstFormat; +!strconcat(OpcStr, " $rs2, $rd"), pattern>; // For VIS Instructions with only rd operand. let Constraints = "$rd = $f", rs1 = 0, rs2 = 0 in -class VISInstD opfval, string OpcStr, RegisterClass RC = DFPRegs> +class VISInstD opfval, string OpcStr, RegisterClass RC = DFPRegs, +list pattern = []> s-barannikov wrote: Is `pattern` ever given non-empty list? I'd rather do the opposite - remove the parameter everywhere and define top-level `Pat` patterns where necessary. https://github.com/llvm/llvm-project/pull/130967 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [compiler-rt] release/20.x: [compiler-rt][Darwin][x86] Fix instrprof-darwin-exports test (#131425) (PR #132506)
llvmbot wrote: @llvm/pr-subscribers-pgo Author: None (llvmbot) Changes Backport 94426df66a8d7c2321f9e197e5ef9636b0d5ce70 Requested by: @j-hui --- Full diff: https://github.com/llvm/llvm-project/pull/132506.diff 1 Files Affected: - (modified) compiler-rt/test/profile/instrprof-darwin-exports.c (+3-3) ``diff diff --git a/compiler-rt/test/profile/instrprof-darwin-exports.c b/compiler-rt/test/profile/instrprof-darwin-exports.c index 079d5d28ed24d..1a2ac8c813272 100644 --- a/compiler-rt/test/profile/instrprof-darwin-exports.c +++ b/compiler-rt/test/profile/instrprof-darwin-exports.c @@ -7,13 +7,13 @@ // just "_main" produces no warnings or errors. // // RUN: echo "_main" > %t.exports -// RUN: %clang_pgogen -Werror -Wl,-exported_symbols_list,%t.exports -o %t %s 2>&1 | tee %t.log -// RUN: %clang_profgen -Werror -fcoverage-mapping -Wl,-exported_symbols_list,%t.exports -o %t %s 2>&1 | tee -a %t.log +// RUN: %clang_pgogen -Werror -Wl,-exported_symbols_list,%t.exports -Wl,-w -o %t %s 2>&1 | tee %t.log +// RUN: %clang_profgen -Werror -fcoverage-mapping -Wl,-exported_symbols_list,%t.exports -Wl,-w -o %t %s 2>&1 | tee -a %t.log // RUN: cat %t.log | count 0 // 2) Ditto (1), but for GCOV. // -// RUN: %clang -Werror -Wl,-exported_symbols_list,%t.exports --coverage -o %t.gcov %s | tee -a %t.gcov.log +// RUN: %clang -Werror -Wl,-exported_symbols_list,%t.exports -Wl,-w --coverage -o %t.gcov %s | tee -a %t.gcov.log // RUN: cat %t.gcov.log | count 0 // 3) The default set of weak external symbols should match the set of symbols `` https://github.com/llvm/llvm-project/pull/132506 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [AMDGPU][NFC] Mark GEPs in flat offset folding tests as inbounds (PR #131994)
https://github.com/arsenm approved this pull request. https://github.com/llvm/llvm-project/pull/131994 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [mlir] [mlir][memref] Remove runtime verification for `memref.reinterpret_cast` (PR #132547)
llvmbot wrote: @llvm/pr-subscribers-mlir-memref Author: Matthias Springer (matthias-springer) Changes The runtime verification code used to verify that the result of a `memref.reinterpret_cast` is in-bounds with respect to the source memref. This is incorrect: `memref.reinterpret_cast` allows users to construct almost arbitrary memref descriptors and there is no correctness expectation. This op is supposed to be used when the user "knows what they are doing." Similarly, the static verifier of `memref.reinterpret_cast` does not verify in-bounds semantics either. --- Full diff: https://github.com/llvm/llvm-project/pull/132547.diff 2 Files Affected: - (modified) mlir/lib/Dialect/MemRef/Transforms/RuntimeOpVerification.cpp (+1-73) - (removed) mlir/test/Integration/Dialect/MemRef/reinterpret-cast-runtime-verification.mlir (-74) ``diff diff --git a/mlir/lib/Dialect/MemRef/Transforms/RuntimeOpVerification.cpp b/mlir/lib/Dialect/MemRef/Transforms/RuntimeOpVerification.cpp index 7cd4814bf88d0..922111e1fad1f 100644 --- a/mlir/lib/Dialect/MemRef/Transforms/RuntimeOpVerification.cpp +++ b/mlir/lib/Dialect/MemRef/Transforms/RuntimeOpVerification.cpp @@ -255,78 +255,6 @@ struct LoadStoreOpInterface } }; -/// Compute the linear index for the provided strided layout and indices. -Value computeLinearIndex(OpBuilder &builder, Location loc, OpFoldResult offset, - ArrayRef strides, - ArrayRef indices) { - auto [expr, values] = computeLinearIndex(offset, strides, indices); - auto index = - affine::makeComposedFoldedAffineApply(builder, loc, expr, values); - return getValueOrCreateConstantIndexOp(builder, loc, index); -} - -/// Returns two Values representing the bounds of the provided strided layout -/// metadata. The bounds are returned as a half open interval -- [low, high). -std::pair computeLinearBounds(OpBuilder &builder, Location loc, -OpFoldResult offset, -ArrayRef strides, -ArrayRef sizes) { - auto zeros = SmallVector(sizes.size(), 0); - auto indices = getAsIndexOpFoldResult(builder.getContext(), zeros); - auto lowerBound = computeLinearIndex(builder, loc, offset, strides, indices); - auto upperBound = computeLinearIndex(builder, loc, offset, strides, sizes); - return {lowerBound, upperBound}; -} - -/// Returns two Values representing the bounds of the memref. The bounds are -/// returned as a half open interval -- [low, high). -std::pair computeLinearBounds(OpBuilder &builder, Location loc, -TypedValue memref) { - auto runtimeMetadata = builder.create(loc, memref); - auto offset = runtimeMetadata.getConstifiedMixedOffset(); - auto strides = runtimeMetadata.getConstifiedMixedStrides(); - auto sizes = runtimeMetadata.getConstifiedMixedSizes(); - return computeLinearBounds(builder, loc, offset, strides, sizes); -} - -/// Verifies that the linear bounds of a reinterpret_cast op are within the -/// linear bounds of the base memref: low >= baseLow && high <= baseHigh -struct ReinterpretCastOpInterface -: public RuntimeVerifiableOpInterface::ExternalModel< - ReinterpretCastOpInterface, ReinterpretCastOp> { - void generateRuntimeVerification(Operation *op, OpBuilder &builder, - Location loc) const { -auto reinterpretCast = cast(op); -auto baseMemref = reinterpretCast.getSource(); -auto resultMemref = -cast>(reinterpretCast.getResult()); - -builder.setInsertionPointAfter(op); - -// Compute the linear bounds of the base memref -auto [baseLow, baseHigh] = computeLinearBounds(builder, loc, baseMemref); - -// Compute the linear bounds of the resulting memref -auto [low, high] = computeLinearBounds(builder, loc, resultMemref); - -// Check low >= baseLow -auto geLow = builder.createOrFold( -loc, arith::CmpIPredicate::sge, low, baseLow); - -// Check high <= baseHigh -auto leHigh = builder.createOrFold( -loc, arith::CmpIPredicate::sle, high, baseHigh); - -auto assertCond = builder.createOrFold(loc, geLow, leHigh); - -builder.create( -loc, assertCond, -RuntimeVerifiableOpInterface::generateErrorMessage( -op, -"result of reinterpret_cast is out-of-bounds of the base memref")); - } -}; - struct SubViewOpInterface : public RuntimeVerifiableOpInterface::ExternalModel { @@ -430,9 +358,9 @@ void mlir::memref::registerRuntimeVerifiableOpInterfaceExternalModels( DimOp::attachInterface(*ctx); ExpandShapeOp::attachInterface(*ctx); LoadOp::attachInterface>(*ctx); -ReinterpretCastOp::attachInterface(*ctx); StoreOp::attachInterface>(*ctx); SubViewOp::attachInterface(*ctx); +// Note: There is nothing to verify for ReinterpretCastOp. // Load additional dialect
[llvm-branch-commits] [mlir] [mlir][memref] Remove runtime verification for `memref.reinterpret_cast` (PR #132547)
https://github.com/matthias-springer edited https://github.com/llvm/llvm-project/pull/132547 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [mlir] [mlir][memref] Verify out-of-bounds access for `memref.subview` (PR #131876)
https://github.com/matthias-springer edited https://github.com/llvm/llvm-project/pull/131876 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [RISCV] Replace @plt/@gotpcrel in data directives with %plt %gotpcrel (PR #132569)
https://github.com/MaskRay updated https://github.com/llvm/llvm-project/pull/132569 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [RISCV] Replace @plt/@gotpcrel in data directives with %plt %gotpcrel (PR #132569)
https://github.com/MaskRay updated https://github.com/llvm/llvm-project/pull/132569 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [RISCV] Replace @plt/@gotpcrel in data directives with %plt %gotpcrel (PR #132569)
https://github.com/MaskRay edited https://github.com/llvm/llvm-project/pull/132569 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [RISCV] Replace @plt/@gotpcrel in data directives with %plt %gotpcrel (PR #132569)
@@ -18,6 +18,6 @@ .globl _start _start: .data - .word foo@PLT - . - .word foo@PLT - . + 1 - .word foo@PLT - . - 1 + .word %plt(foo - .) MaskRay wrote: The core principle is that relocation specifiers must operate on the full expression, not just a part of it. This would avoid a lot of complexity/ambiguity in parsing and expression folding. `.word %plt(foo - .)` might look unusual. It describes a PC-relative relocatable expression. We evaluate it to a relocatable expression (`relocation_specifier(sym_a - sym_b + offset)`), and allows the referenced "addend" (sym_a) to be a PLT. `.word %plt(foo)` describes an absolute reference to foo's PLT, which we don't support. https://github.com/llvm/llvm-project/pull/132569 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [RISCV] Replace @plt/@gotpcrel in data directives with %plt %gotpcrel (PR #132569)
https://github.com/MaskRay edited https://github.com/llvm/llvm-project/pull/132569 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [Github] Bump CI container to ubuntu 24.04 (PR #132568)
https://github.com/boomanaiden154 created https://github.com/llvm/llvm-project/pull/132568 This helps keep things up to date, and should not cause any issues given we do not need to care about binary compatibility for things built in the CI container. This patch also changes the name of the container which allows incrementally moving jobs over after this lands. ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [Github] Bump CI container to ubuntu 24.04 (PR #132568)
llvmbot wrote: @llvm/pr-subscribers-github-workflow Author: Aiden Grossman (boomanaiden154) Changes This helps keep things up to date, and should not cause any issues given we do not need to care about binary compatibility for things built in the CI container. This patch also changes the name of the container which allows incrementally moving jobs over after this lands. --- Full diff: https://github.com/llvm/llvm-project/pull/132568.diff 2 Files Affected: - (modified) .github/workflows/build-ci-container.yml (+1-1) - (modified) .github/workflows/containers/github-action-ci/Dockerfile (+1-1) ``diff diff --git a/.github/workflows/build-ci-container.yml b/.github/workflows/build-ci-container.yml index 994435a8973b6..3159aae32ca51 100644 --- a/.github/workflows/build-ci-container.yml +++ b/.github/workflows/build-ci-container.yml @@ -44,7 +44,7 @@ jobs: id: vars run: | tag=$(git rev-parse --short=12 HEAD) - container_name="ghcr.io/$GITHUB_REPOSITORY_OWNER/${{ matrix.arch }}/ci-ubuntu-22.04" + container_name="ghcr.io/$GITHUB_REPOSITORY_OWNER/${{ matrix.arch }}/ci-ubuntu-24.04" echo "container-name=$container_name" >> $GITHUB_OUTPUT echo "container-name-agent=$container_name-agent" >> $GITHUB_OUTPUT echo "container-name-tag=$container_name:$tag" >> $GITHUB_OUTPUT diff --git a/.github/workflows/containers/github-action-ci/Dockerfile b/.github/workflows/containers/github-action-ci/Dockerfile index ef4a11013acb3..a60c1ba019a99 100644 --- a/.github/workflows/containers/github-action-ci/Dockerfile +++ b/.github/workflows/containers/github-action-ci/Dockerfile @@ -1,4 +1,4 @@ -FROM docker.io/library/ubuntu:22.04 as base +FROM docker.io/library/ubuntu:24.04 as base ENV LLVM_SYSROOT=/opt/llvm FROM base as stage1-toolchain `` https://github.com/llvm/llvm-project/pull/132568 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [RISCV] Replace @plt/@gotpcrel in data directives with %plt %gotpcrel (PR #132569)
@@ -1194,18 +1194,34 @@ const MCExpr *TargetLoweringObjectFileELF::lowerRelativeReference( MCSymbolRefExpr::create(TM.getSymbol(RHS), getContext()), getContext()); MaskRay wrote: `lowerRelativeReference` uses MCSymbolRefExpr. It seems legacy (probably should be removed). https://github.com/llvm/llvm-project/pull/132569 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [RISCV] Replace @plt/@gotpcrel in data directives with %plt %gotpcrel (PR #132569)
@@ -18,6 +18,6 @@ .globl _start _start: .data - .word foo@PLT - . - .word foo@PLT - . + 1 - .word foo@PLT - . - 1 + .word %plt(foo - .) jrtc27 wrote: Yeah, I know, but it's pretty weird and confusing syntax. It's not really written that way because it makes sense, it's just written that way because it aligns with how implementations think about it. Perhaps %pltpcrel, to mirror %gotpcrel, would be the right thing to do here that sidesteps the issue? https://github.com/llvm/llvm-project/pull/132569 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [RISCV] Replace @plt/@gotpcrel in data directives with %plt %gotpcrel (PR #132569)
llvmbot wrote: @llvm/pr-subscribers-backend-risc-v Author: Fangrui Song (MaskRay) Changes clang -fexperimental-relative-c++-abi-vtables might generate @plt and @gotpcrel specifiers in data directives. The syntax is not used in humand-written assembly code, and is not supported by GNU assembler. Note: the `@plt` in `.word foo@plt` is different from the legacy `call func@plt` (where `@plt` is simply ignored). The @plt syntax was selected was simply due to a quirk of AsmParser: the syntax was supported by all targets until I updated it to be an opt-in feature in a0671758eb6e52a758bd1b096a9b421eec60204c RISC-V favors the `%specifier(expr)` syntax following MIPS and Sparc, and we should follow this convention. This PR adds support for `.word %plt(foo-.)` and `.word %gotpcreel(foo)` and drops `@plt` `@gotpcrel`. * MCValue::SymA can no longer have a SymbolVariant. Add an assert similar to that of AArch64ELFObjectWriter.cpp before https://reviews.llvm.org/D81446 (see my analysis at https://maskray.me/blog/2025-03-16-relocation-generation-in-assemblers if intrigued) * `jump foo@plt, x31` now has a different diagnostic. --- Patch is 21.89 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/132569.diff 20 Files Affected: - (modified) lld/test/ELF/riscv-reloc-plt32.s (+3-3) - (modified) lld/test/ELF/riscv-undefined-weak.s (+1-1) - (modified) lld/test/ELF/riscv64-reloc-got32-pcrel.s (+8-8) - (modified) llvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h (+6) - (modified) llvm/include/llvm/MC/MCParser/MCTargetAsmParser.h (+6) - (modified) llvm/include/llvm/Target/TargetLoweringObjectFile.h (+1) - (modified) llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp (+6-5) - (modified) llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp (+23-7) - (modified) llvm/lib/MC/MCAssembler.cpp (+1-1) - (modified) llvm/lib/MC/MCParser/AsmParser.cpp (+1-1) - (modified) llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp (+24-7) - (modified) llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp (+11-8) - (modified) llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCAsmInfo.cpp (-7) - (modified) llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp (+11-4) - (modified) llvm/lib/Target/RISCV/RISCVTargetObjectFile.cpp (+8) - (modified) llvm/lib/Target/RISCV/RISCVTargetObjectFile.h (+3) - (modified) llvm/test/CodeGen/RISCV/dso_local_equivalent.ll (+1-1) - (modified) llvm/test/MC/RISCV/data-directive-specifier.s (+11-11) - (modified) llvm/test/MC/RISCV/pseudo-jump-invalid.s (+1-1) - (modified) llvm/test/MC/RISCV/rv32i-invalid.s (+1) ``diff diff --git a/lld/test/ELF/riscv-reloc-plt32.s b/lld/test/ELF/riscv-reloc-plt32.s index 8cbc2d3f442c0..a50b9fe3f137a 100644 --- a/lld/test/ELF/riscv-reloc-plt32.s +++ b/lld/test/ELF/riscv-reloc-plt32.s @@ -18,6 +18,6 @@ .globl _start _start: .data - .word foo@PLT - . - .word foo@PLT - . + 1 - .word foo@PLT - . - 1 + .word %plt(foo - .) + .word %plt(foo - . + 1) + .word %plt(foo - . - 1) diff --git a/lld/test/ELF/riscv-undefined-weak.s b/lld/test/ELF/riscv-undefined-weak.s index 8a78e1f838338..d78f55394b619 100644 --- a/lld/test/ELF/riscv-undefined-weak.s +++ b/lld/test/ELF/riscv-undefined-weak.s @@ -97,4 +97,4 @@ branch: # PC-NOT: .plt: # PLT: .plt: -.word target@plt - . +.word %plt(target - .) diff --git a/lld/test/ELF/riscv64-reloc-got32-pcrel.s b/lld/test/ELF/riscv64-reloc-got32-pcrel.s index 24bd828235b25..a8f42ae6df2b9 100644 --- a/lld/test/ELF/riscv64-reloc-got32-pcrel.s +++ b/lld/test/ELF/riscv64-reloc-got32-pcrel.s @@ -12,16 +12,16 @@ bar: .globl _start _start: // PC = 0x33a8 -// bar@GOTPCREL = 0x2398 (got entry for `bar`) - 0x33a8 (.) = 0xf0ef -// bar@GOTPCREL+4 = 0x2398 (got entry for `bar`) - 0x33ac (.) + 4 = 0xf0ef -// bar@GOTPCREL-4 = 0x2398 (got entry for `bar`) - 0x33b0 (.) - 4 = 0xe4ef +// %gotpcrel(bar) = 0x2398 (got entry for `bar`) - 0x33a8 (.) = 0xf0ef +// %gotpcrel(bar+4) = 0x2398 (got entry for `bar`) - 0x33ac (.) + 4 = 0xf0ef +// %gotpcrel(bar-4) = 0x2398 (got entry for `bar`) - 0x33b0 (.) - 4 = 0xe4ef // CHECK: Contents of section .data: // CHECK-NEXT: {{.*}} f0ef f0ef e4ef - .word bar@GOTPCREL - .word bar@GOTPCREL+4 - .word bar@GOTPCREL-4 + .word %gotpcrel(bar) + .word %gotpcrel(bar+4) + .word %gotpcrel(bar-4) // WARN: relocation R_RISCV_GOT32_PCREL out of range: {{.*}} is not in [-2147483648, 2147483647]; references 'baz' // WARN: relocation R_RISCV_GOT32_PCREL out of range: {{.*}} is not in [-2147483648, 2147483647]; references 'baz' - .word baz@GOTPCREL+0x - .word baz@GOTPCREL-0x + .word %gotpcrel(baz+0x) + .word %gotpcrel(baz-0x) diff --git a/llvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h b/llvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h index 7392963bd341f..f6e875e7ad373 100644 --- a/llvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h +++ b/l
[llvm-branch-commits] [RISCV] Replace @plt/@gotpcrel in data directives with %plt %gotpcrel (PR #132569)
@@ -18,6 +18,6 @@ .globl _start _start: .data - .word foo@PLT - . - .word foo@PLT - . + 1 - .word foo@PLT - . - 1 + .word %plt(foo - .) MaskRay wrote: It's challenging to use an inherent PC-relative specifier (e.g. `%pltpcrel`; which I actually thought about) This is because in the code block around `llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp:3477` (`AsmPrinter::lowerConstant`), the function doesn't actually know its current address. The function call needs a subtrahend. (`llvm/test/CodeGen/X86/x86-64-plt-relative-reloc.ll` contains a better test that demonstrates this: the subtrahend `vtable` might be a few bytes before the current address (that feature might be obsoleted by the dsolocal equivalent feature)) https://github.com/llvm/llvm-project/pull/132569 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [RISCV] Replace @plt/@gotpcrel in data directives with %plt %gotpcrel (PR #132569)
https://github.com/MaskRay edited https://github.com/llvm/llvm-project/pull/132569 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [clang-tools-extra] [clang][HeuristicResolver] Apply default argument heuristic in resolveDeclRefExpr as well (PR #132576)
llvmbot wrote: @llvm/pr-subscribers-clang Author: Nathan Ridge (HighCommander4) Changes --- Full diff: https://github.com/llvm/llvm-project/pull/132576.diff 3 Files Affected: - (modified) clang-tools-extra/clangd/unittests/XRefsTests.cpp (+1-1) - (modified) clang/lib/Sema/HeuristicResolver.cpp (+3-3) - (modified) clang/unittests/Sema/HeuristicResolverTest.cpp (+17) ``diff diff --git a/clang-tools-extra/clangd/unittests/XRefsTests.cpp b/clang-tools-extra/clangd/unittests/XRefsTests.cpp index e12d7691c58fb..693e965e78a96 100644 --- a/clang-tools-extra/clangd/unittests/XRefsTests.cpp +++ b/clang-tools-extra/clangd/unittests/XRefsTests.cpp @@ -1091,7 +1091,7 @@ TEST(LocateSymbol, All) { )objc", R"cpp( struct PointerIntPairInfo { - static void *getPointer(void *Value); + static void *$decl[[getPointer]](void *Value); }; template struct PointerIntPair { diff --git a/clang/lib/Sema/HeuristicResolver.cpp b/clang/lib/Sema/HeuristicResolver.cpp index d377379c627db..5f1495f5334b9 100644 --- a/clang/lib/Sema/HeuristicResolver.cpp +++ b/clang/lib/Sema/HeuristicResolver.cpp @@ -300,9 +300,9 @@ std::vector HeuristicResolverImpl::resolveMemberExpr( std::vector HeuristicResolverImpl::resolveDeclRefExpr(const DependentScopeDeclRefExpr *RE) { - return resolveDependentMember( - resolveNestedNameSpecifierToType(RE->getQualifier()), RE->getDeclName(), - StaticFilter); + QualType Qualifier = resolveNestedNameSpecifierToType(RE->getQualifier()); + Qualifier = simplifyType(Qualifier, nullptr, /*UnwrapPointer=*/false); + return resolveDependentMember(Qualifier, RE->getDeclName(), StaticFilter); } std::vector diff --git a/clang/unittests/Sema/HeuristicResolverTest.cpp b/clang/unittests/Sema/HeuristicResolverTest.cpp index c7cfe7917c532..b4994c315b2ff 100644 --- a/clang/unittests/Sema/HeuristicResolverTest.cpp +++ b/clang/unittests/Sema/HeuristicResolverTest.cpp @@ -429,6 +429,23 @@ TEST(HeuristicResolver, DeclRefExpr_StaticMethod) { cxxMethodDecl(hasName("bar")).bind("output")); } +TEST(HeuristicResolver, DeclRefExpr_DefaultTemplateArgument) { + std::string Code = R"cpp( +struct Default { + static void foo(); +}; +template +void bar() { + T::foo(); +} + )cpp"; + // Test resolution of "foo" in "T::foo()". + expectResolution( + Code, &HeuristicResolver::resolveDeclRefExpr, + dependentScopeDeclRefExpr(hasDependentName("foo")).bind("input"), + cxxMethodDecl(hasName("foo")).bind("output")); +} + TEST(HeuristicResolver, DeclRefExpr_StaticOverloads) { std::string Code = R"cpp( template `` https://github.com/llvm/llvm-project/pull/132576 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [clang-tools-extra] [clang][HeuristicResolver] Apply default argument heuristic in resolveDeclRefExpr as well (PR #132576)
https://github.com/zyn0217 approved this pull request. Thanks for following up on it, this looks great. Please flesh out the PR body before you commit, with the reason you said in https://github.com/llvm/llvm-project/pull/132576#issuecomment-2745944724. (Just a copy-paste is good enough) https://github.com/llvm/llvm-project/pull/132576 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [SPARC][MC] Add tests for VIS family instructions (PR #130967)
@@ -7,76 +7,96 @@ //===--===// // // This file contains instruction formats, definitions and patterns needed for -// VIS, VIS II, VIS II instructions on SPARC. +// VIS, VIS II, VIS III instructions on SPARC. //===--===// // VIS Instruction Format. class VISInstFormat opfval, dag outs, dag ins, string asmstr, - list pattern> +list pattern = []> : F3_3<0b10, 0b110110, opfval, outs, ins, asmstr, pattern>; -class VISInst opfval, string OpcStr, RegisterClass RC = DFPRegs> +class VISInst opfval, string OpcStr, RegisterClass RC = DFPRegs, +list pattern = []> : VISInstFormat; +!strconcat(OpcStr, " $rs1, $rs2, $rd"), pattern>; // VIS Instruction with integer destination register. -class VISInstID opfval, string OpcStr> +class VISInstID opfval, string OpcStr, list pattern = []> : VISInstFormat; +!strconcat(OpcStr, " $rs1, $rs2, $rd"), pattern>; // For VIS Instructions with no operand. let rd = 0, rs1 = 0, rs2 = 0 in -class VISInst0 opfval, string asmstr> - : VISInstFormat; +class VISInst0 opfval, string asmstr, list pattern = []> + : VISInstFormat; // For VIS Instructions with only rs1, rd operands. let rs2 = 0 in -class VISInst1 opfval, string OpcStr, RegisterClass RC = DFPRegs> +class VISInst1 opfval, string OpcStr, RegisterClass RC = DFPRegs, +list pattern = []> : VISInstFormat; +!strconcat(OpcStr, " $rs1, $rd"), pattern>; // For VIS Instructions with only rs2, rd operands. let rs1 = 0 in -class VISInst2 opfval, string OpcStr, RegisterClass RC = DFPRegs> +class VISInst2 opfval, string OpcStr, RegisterClass RC = DFPRegs, +list pattern = []> : VISInstFormat; +!strconcat(OpcStr, " $rs2, $rd"), pattern>; // For VIS Instructions with only rd operand. let Constraints = "$rd = $f", rs1 = 0, rs2 = 0 in -class VISInstD opfval, string OpcStr, RegisterClass RC = DFPRegs> +class VISInstD opfval, string OpcStr, RegisterClass RC = DFPRegs, +list pattern = []> koachan wrote: Ah, for this, I have a WIP codegen patch series to start using some of those instructions by filling `pattern`. Should I use `Pat`s instead for those too? https://github.com/llvm/llvm-project/pull/130967 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [RISCV] Replace @plt/@gotpcrel in data directives with %plt %gotpcrel (PR #132569)
https://github.com/MaskRay created https://github.com/llvm/llvm-project/pull/132569 clang -fexperimental-relative-c++-abi-vtables might generate @plt and @gotpcrel specifiers in data directives. The syntax is not used in humand-written assembly code, and is not supported by GNU assembler. Note: the `@plt` in `.word foo@plt` is different from the legacy `call func@plt` (where `@plt` is simply ignored). The @plt syntax was selected was simply due to a quirk of AsmParser: the syntax was supported by all targets until I updated it to be an opt-in feature in a0671758eb6e52a758bd1b096a9b421eec60204c RISC-V favors the `%specifier(expr)` syntax following MIPS and Sparc, and we should follow this convention. This PR adds support for `.word %plt(foo-.)` and `.word %gotpcreel(foo)` and drops `@plt` `@gotpcrel`. * MCValue::SymA can no longer have a SymbolVariant. Add an assert similar to that of AArch64ELFObjectWriter.cpp before https://reviews.llvm.org/D81446 (see my analysis at https://maskray.me/blog/2025-03-16-relocation-generation-in-assemblers if intrigued) * `jump foo@plt, x31` now has a different diagnostic. ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [clang-tools-extra] [clang][HeuristicResolver] Apply default argument heuristic in resolveDeclRefExpr as well (PR #132576)
https://github.com/HighCommander4 updated https://github.com/llvm/llvm-project/pull/132576 >From 2c9fc17bf2ef28c42df472598e4b7d09297cb668 Mon Sep 17 00:00:00 2001 From: Nathan Ridge Date: Sat, 22 Mar 2025 20:54:02 -0400 Subject: [PATCH] [clang][HeuristicResolver] Apply default argument heuristic in resolveDeclRefExpr as well --- .../clangd/unittests/XRefsTests.cpp | 2 +- clang/lib/Sema/HeuristicResolver.cpp| 6 +++--- clang/unittests/Sema/HeuristicResolverTest.cpp | 17 + 3 files changed, 21 insertions(+), 4 deletions(-) diff --git a/clang-tools-extra/clangd/unittests/XRefsTests.cpp b/clang-tools-extra/clangd/unittests/XRefsTests.cpp index e12d7691c58fb..693e965e78a96 100644 --- a/clang-tools-extra/clangd/unittests/XRefsTests.cpp +++ b/clang-tools-extra/clangd/unittests/XRefsTests.cpp @@ -1091,7 +1091,7 @@ TEST(LocateSymbol, All) { )objc", R"cpp( struct PointerIntPairInfo { - static void *getPointer(void *Value); + static void *$decl[[getPointer]](void *Value); }; template struct PointerIntPair { diff --git a/clang/lib/Sema/HeuristicResolver.cpp b/clang/lib/Sema/HeuristicResolver.cpp index 9b793e876a49f..5202ae340bbfd 100644 --- a/clang/lib/Sema/HeuristicResolver.cpp +++ b/clang/lib/Sema/HeuristicResolver.cpp @@ -315,9 +315,9 @@ std::vector HeuristicResolverImpl::resolveMemberExpr( std::vector HeuristicResolverImpl::resolveDeclRefExpr(const DependentScopeDeclRefExpr *RE) { - return resolveDependentMember( - resolveNestedNameSpecifierToType(RE->getQualifier()), RE->getDeclName(), - StaticFilter); + QualType Qualifier = resolveNestedNameSpecifierToType(RE->getQualifier()); + Qualifier = simplifyType(Qualifier, nullptr, /*UnwrapPointer=*/false); + return resolveDependentMember(Qualifier, RE->getDeclName(), StaticFilter); } std::vector diff --git a/clang/unittests/Sema/HeuristicResolverTest.cpp b/clang/unittests/Sema/HeuristicResolverTest.cpp index f7eb4b23c2ab0..3ed6bba790be3 100644 --- a/clang/unittests/Sema/HeuristicResolverTest.cpp +++ b/clang/unittests/Sema/HeuristicResolverTest.cpp @@ -463,6 +463,23 @@ TEST(HeuristicResolver, DeclRefExpr_StaticMethod) { cxxMethodDecl(hasName("bar")).bind("output")); } +TEST(HeuristicResolver, DeclRefExpr_DefaultTemplateArgument) { + std::string Code = R"cpp( +struct Default { + static void foo(); +}; +template +void bar() { + T::foo(); +} + )cpp"; + // Test resolution of "foo" in "T::foo()". + expectResolution( + Code, &HeuristicResolver::resolveDeclRefExpr, + dependentScopeDeclRefExpr(hasDependentName("foo")).bind("input"), + cxxMethodDecl(hasName("foo")).bind("output")); +} + TEST(HeuristicResolver, DeclRefExpr_StaticOverloads) { std::string Code = R"cpp( template ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [RISCV] Replace @plt/@gotpcrel in data directives with %plt %gotpcrel (PR #132569)
@@ -18,6 +18,6 @@ .globl _start _start: .data - .word foo@PLT - . - .word foo@PLT - . + 1 - .word foo@PLT - . - 1 + .word %plt(foo - .) jrtc27 wrote: Would `%plt(foo) - .` not be the saner syntax? PLT of an offset is a bit nonsensical... https://github.com/llvm/llvm-project/pull/132569 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [clang-tools-extra] [clang][HeuristicResolver] Apply default argument heuristic in resolveDeclRefExpr as well (PR #132576)
HighCommander4 wrote: (Rebased) https://github.com/llvm/llvm-project/pull/132576 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [clang-tools-extra] [clang][HeuristicResolver] Apply default argument heuristic in resolveDeclRefExpr as well (PR #132576)
https://github.com/HighCommander4 edited https://github.com/llvm/llvm-project/pull/132576 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits