[llvm-branch-commits] [clang] [lld] [llvm] release/20.x: [hexagon] Bump the default version to v68 (#132304) (PR #132499)
llvmbot wrote:
@llvm/pr-subscribers-lld-elf
Author: None (llvmbot)
Changes
Backport 759ef5811e22 c0b2c10e9f3a
Requested by: @androm3da
---
Patch is 32.08 KiB, truncated to 20.00 KiB below, full version:
https://github.com/llvm/llvm-project/pull/132499.diff
23 Files Affected:
- (modified) clang/lib/Driver/ToolChains/Hexagon.cpp (+1-3)
- (added) clang/test/Driver/hexagon-cpu-default.c (+4)
- (modified) lld/ELF/Arch/Hexagon.cpp (+1-1)
- (modified) lld/docs/ReleaseNotes.rst (+5)
- (modified) lld/test/ELF/emulation-hexagon.s (+2-2)
- (modified) lld/test/ELF/hexagon-eflag.s (+3-2)
- (modified) llvm/docs/ReleaseNotes.md (+4)
- (modified) llvm/include/llvm/BinaryFormat/ELF.h (+10)
- (modified) llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp
(+1-1)
- (modified) llvm/test/CodeGen/Hexagon/arg-copy-elison.ll (+11-12)
- (modified) llvm/test/CodeGen/Hexagon/atomicrmw-cond-sub-clamp.ll (+1-3)
- (modified) llvm/test/CodeGen/Hexagon/atomicrmw-uinc-udec-wrap.ll (+6-6)
- (modified) llvm/test/CodeGen/Hexagon/bank-conflict.mir (+1-1)
- (modified) llvm/test/CodeGen/Hexagon/fixed-spill-mutable.ll (+3-2)
- (modified) llvm/test/CodeGen/Hexagon/isel-memory-vNi1.ll (+28-22)
- (modified) llvm/test/CodeGen/Hexagon/isel/logical.ll (+26-26)
- (modified) llvm/test/CodeGen/Hexagon/isel/select-i1.ll (+3-9)
- (modified) llvm/test/CodeGen/Hexagon/postinc-baseoffset.mir (+2-2)
- (modified) llvm/test/CodeGen/Hexagon/setmemrefs.ll (+1-1)
- (modified) llvm/test/MC/Hexagon/arch-support.s (+4)
- (modified) llvm/test/MC/Hexagon/hexagon_attributes.s (+8-4)
- (modified)
llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/hexagon_generated_funcs.ll.generated.expected
(+12-13)
- (modified)
llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/hexagon_generated_funcs.ll.nogenerated.expected
(+12-13)
``diff
diff --git a/clang/lib/Driver/ToolChains/Hexagon.cpp
b/clang/lib/Driver/ToolChains/Hexagon.cpp
index 76cedf312d68a..7ca5ab9af8810 100644
--- a/clang/lib/Driver/ToolChains/Hexagon.cpp
+++ b/clang/lib/Driver/ToolChains/Hexagon.cpp
@@ -802,9 +802,7 @@ bool HexagonToolChain::isAutoHVXEnabled(const
llvm::opt::ArgList &Args) {
// Returns the default CPU for Hexagon. This is the default compilation target
// if no Hexagon processor is selected at the command-line.
//
-StringRef HexagonToolChain::GetDefaultCPU() {
- return "hexagonv60";
-}
+StringRef HexagonToolChain::GetDefaultCPU() { return "hexagonv68"; }
StringRef HexagonToolChain::GetTargetCPUVersion(const ArgList &Args) {
Arg *CpuArg = nullptr;
diff --git a/clang/test/Driver/hexagon-cpu-default.c
b/clang/test/Driver/hexagon-cpu-default.c
new file mode 100644
index 0..31fb839f21656
--- /dev/null
+++ b/clang/test/Driver/hexagon-cpu-default.c
@@ -0,0 +1,4 @@
+// CHECK: "-target-cpu" "hexagonv68"
+
+// RUN: %clang -c %s -### --target=hexagon-unknown-elf \
+// RUN: 2>&1 | FileCheck %s
diff --git a/lld/ELF/Arch/Hexagon.cpp b/lld/ELF/Arch/Hexagon.cpp
index 23b60672f6317..4ba61db2733c2 100644
--- a/lld/ELF/Arch/Hexagon.cpp
+++ b/lld/ELF/Arch/Hexagon.cpp
@@ -68,7 +68,7 @@ uint32_t Hexagon::calcEFlags() const {
if (!ret || eflags > *ret)
ret = eflags;
}
- return ret.value_or(/* Default Arch Rev: */ 0x60);
+ return ret.value_or(/* Default Arch Rev: */ EF_HEXAGON_MACH_V68);
}
static uint32_t applyMask(uint32_t mask, uint32_t data) {
diff --git a/lld/docs/ReleaseNotes.rst b/lld/docs/ReleaseNotes.rst
index e13b0cf0678ce..b8604611e286e 100644
--- a/lld/docs/ReleaseNotes.rst
+++ b/lld/docs/ReleaseNotes.rst
@@ -76,6 +76,11 @@ ELF Improvements
* Supported relocation types for LoongArch target:
``R_LARCH_TLS_{LD,GD,DESC}_PCREL20_S2``.
(`#100105 `_)
+* The default Hexagon architecture version in ELF object files produced by
+ lld is changed to v68. This change is only effective when the version is
+ not provided in the command line by the user and cannot be inferred from
+ inputs.
+
Breaking changes
diff --git a/lld/test/ELF/emulation-hexagon.s b/lld/test/ELF/emulation-hexagon.s
index a8a02d4c428b5..5bdd88941c269 100644
--- a/lld/test/ELF/emulation-hexagon.s
+++ b/lld/test/ELF/emulation-hexagon.s
@@ -1,5 +1,5 @@
# REQUIRES: hexagon
-# RUN: llvm-mc -filetype=obj -triple=hexagon %s -o %t.o
+# RUN: llvm-mc -filetype=obj -triple=hexagon --mcpu=hexagonv73 %s -o %t.o
# RUN: ld.lld %t.o -o %t
# RUN: llvm-readelf --file-headers %t | FileCheck --check-prefix=CHECK %s
# RUN: ld.lld -m hexagonelf %t.o -o %t
@@ -26,7 +26,7 @@
# CHECK-NEXT:Entry point address: 0x200B4
# CHECK-NEXT:Start of program headers: 52 (bytes into file)
# CHECK-NEXT:Start of section headers:
-# CHECK-NEXT:Flags: 0x60
+# CHECK-NEXT:Flags: 0x73
# CHECK-NEXT:Size of this header: 52 (bytes)
# CHECK-NEXT:Size of program headers
[llvm-branch-commits] [compiler-rt] [compiler-rt][Darwin][x86] Fix instrprof-darwin-exports test (#131425) (PR #132500)
llvmbot wrote: @llvm/pr-subscribers-pgo Author: John Hui (j-hui) Changes ld64 issues a warning about section alignment which was counted as an unexpected exported symbol and the test failed. Fixed by disabling all linker warnings using -Wl,-w. cherry-picked from commit 94426df66a8d7c2321f9e197e5ef9636b0d5ce70 --- Full diff: https://github.com/llvm/llvm-project/pull/132500.diff 1 Files Affected: - (modified) compiler-rt/test/profile/instrprof-darwin-exports.c (+3-3) ``diff diff --git a/compiler-rt/test/profile/instrprof-darwin-exports.c b/compiler-rt/test/profile/instrprof-darwin-exports.c index 079d5d28ed24d..1a2ac8c813272 100644 --- a/compiler-rt/test/profile/instrprof-darwin-exports.c +++ b/compiler-rt/test/profile/instrprof-darwin-exports.c @@ -7,13 +7,13 @@ // just "_main" produces no warnings or errors. // // RUN: echo "_main" > %t.exports -// RUN: %clang_pgogen -Werror -Wl,-exported_symbols_list,%t.exports -o %t %s 2>&1 | tee %t.log -// RUN: %clang_profgen -Werror -fcoverage-mapping -Wl,-exported_symbols_list,%t.exports -o %t %s 2>&1 | tee -a %t.log +// RUN: %clang_pgogen -Werror -Wl,-exported_symbols_list,%t.exports -Wl,-w -o %t %s 2>&1 | tee %t.log +// RUN: %clang_profgen -Werror -fcoverage-mapping -Wl,-exported_symbols_list,%t.exports -Wl,-w -o %t %s 2>&1 | tee -a %t.log // RUN: cat %t.log | count 0 // 2) Ditto (1), but for GCOV. // -// RUN: %clang -Werror -Wl,-exported_symbols_list,%t.exports --coverage -o %t.gcov %s | tee -a %t.gcov.log +// RUN: %clang -Werror -Wl,-exported_symbols_list,%t.exports -Wl,-w --coverage -o %t.gcov %s | tee -a %t.gcov.log // RUN: cat %t.gcov.log | count 0 // 3) The default set of weak external symbols should match the set of symbols `` https://github.com/llvm/llvm-project/pull/132500 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [llvm] release/20.x: [Hexagon] Set the default compilation target to V68 (#125239) (PR #128597)
llvmbot wrote: /pull-request llvm/llvm-project#132499 https://github.com/llvm/llvm-project/pull/128597 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [lld] [llvm] release/20.x: [hexagon] Bump the default version to v68 (#132304) (PR #132499)
https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/132499 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [flang] [flang][OpenMP] Extend `do concurrent` mapping to multi-range loops (PR #127634)
ergawy wrote: Again sorry, GH is acting weird!! https://github.com/llvm/llvm-project/pull/127634 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/20.x: [hexagon] Prevent alignment search beyond a label (#130631) (PR #132336)
llvmbot wrote:
@llvm/pr-subscribers-mc
@llvm/pr-subscribers-backend-hexagon
Author: None (llvmbot)
Changes
Backport 1fe463182cea
Requested by: @androm3da
---
Full diff: https://github.com/llvm/llvm-project/pull/132336.diff
3 Files Affected:
- (modified) llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp (+18)
- (added) llvm/test/MC/Hexagon/align-leb128.s (+18)
- (modified) llvm/test/MC/Hexagon/align.s (+13)
``diff
diff --git a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
index 98b1dde8fa3fc..725067e0c9bdd 100644
--- a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
+++ b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
@@ -728,6 +728,24 @@ class HexagonAsmBackend : public MCAsmBackend {
MCContext &Context = Asm.getContext();
auto &RF = cast(*Frags[K]);
auto &Inst = const_cast(RF.getInst());
+
+ const bool WouldTraverseLabel = llvm::any_of(
+ Asm.symbols(), [&Asm, &RF, &Inst](MCSymbol const &sym) {
+uint64_t Offset = 0;
+const bool HasOffset = Asm.getSymbolOffset(sym, Offset);
+const unsigned PacketSizeBytes =
+HexagonMCInstrInfo::bundleSize(Inst) *
+HEXAGON_INSTR_SIZE;
+const bool OffsetPastSym =
+Offset <= (Asm.getFragmentOffset(RF) +
PacketSizeBytes);
+return !sym.isVariable() && Offset != 0 && HasOffset &&
+ OffsetPastSym;
+ });
+ if (WouldTraverseLabel) {
+Size = 0;
+break;
+ }
+
while (Size > 0 &&
HexagonMCInstrInfo::bundleSize(Inst) < MaxPacketSize) {
MCInst *Nop = Context.createMCInst();
diff --git a/llvm/test/MC/Hexagon/align-leb128.s
b/llvm/test/MC/Hexagon/align-leb128.s
new file mode 100644
index 0..77018f0114311
--- /dev/null
+++ b/llvm/test/MC/Hexagon/align-leb128.s
@@ -0,0 +1,18 @@
+# RUN: llvm-mc -triple=hexagon -filetype=obj %s | llvm-readelf -x .data - \
+# RUN: | FileCheck %s --match-full-lines
+
+# Illustrate the case when padding packets across labels also breaks leb128
+# relocations. This happens because .align padding is inserted once at the
+# very end of the section layout.
+L1:
+ nop
+L2:
+.size L1, L2-L1
+.align 16
+ nop
+.data
+.word L2-L1
+.uleb128 L2-L1
+
+# CHECK: Hex dump of section '.data':
+# CHECK-NEXT: 0x 0400 04 .
diff --git a/llvm/test/MC/Hexagon/align.s b/llvm/test/MC/Hexagon/align.s
index 9c2978df71373..e17d09cfd8c96 100644
--- a/llvm/test/MC/Hexagon/align.s
+++ b/llvm/test/MC/Hexagon/align.s
@@ -58,3 +58,16 @@ r0 = vextract(v0, r0)
r1 = sub (##1, r1) }
.align 16
{ r0 = sub (#1, r0) }
+
+# Don't search backwards to pad packets beyond a label:
+{ r1 = add(r1, r0) }
+# CHECK-NEXT: { r1 = add(r1,r0)
+# CHECK-NOT: nop
+
+post_label:
+.align 16
+# CHECK-LABEL: post_label
+# CHECK-NEXT: { nop
+# CHECK-NEXT: nop }
+# CHECK-NEXT: { r1 = sub(#1,r1) }
+{ r1 = sub(#1, r1) }
``
https://github.com/llvm/llvm-project/pull/132336
___
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[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: add RegBankLegalize rules for bit shifts and sext-inreg (PR #132385)
llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Petar Avramovic (petar-avramovic)
Changes
Uniform S16 shifts have to be extended to S32 using appropriate Extend
before lowering to S32 instruction.
Uniform packed V2S16 are lowered to SGPR S32 instructions,
other option is to use VALU packed V2S16 and ReadAnyLane.
For uniform S32 and S64 and divergent S16, S32, S64 and V2S16 there are
instructions available.
---
Patch is 48.59 KiB, truncated to 20.00 KiB below, full version:
https://github.com/llvm/llvm-project/pull/132385.diff
13 Files Affected:
- (modified) llvm/lib/Target/AMDGPU/AMDGPURegBankLegalize.cpp (+2-1)
- (modified) llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp (+104)
- (modified) llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.h (+5)
- (modified) llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp (+43-2)
- (modified) llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h (+11)
- (modified) llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll (+5-5)
- (modified) llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll (+98-89)
- (modified) llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ashr.mir (+2-4)
- (modified) llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-lshr.mir (+7-10)
- (modified) llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sext-inreg.mir
(+10-14)
- (modified) llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-shl.mir (+2-4)
- (modified) llvm/test/CodeGen/AMDGPU/GlobalISel/sext_inreg.ll (+17-17)
- (modified) llvm/test/CodeGen/AMDGPU/GlobalISel/shl.ll (+5-5)
``diff
diff --git a/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalize.cpp
b/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalize.cpp
index 44f1b5419abb9..4fd776bec9492 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalize.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalize.cpp
@@ -23,6 +23,7 @@
#include "GCNSubtarget.h"
#include "llvm/CodeGen/GlobalISel/CSEInfo.h"
#include "llvm/CodeGen/GlobalISel/CSEMIRBuilder.h"
+#include "llvm/CodeGen/GlobalISel/Utils.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineUniformityAnalysis.h"
#include "llvm/CodeGen/TargetPassConfig.h"
@@ -306,7 +307,7 @@ bool
AMDGPURegBankLegalize::runOnMachineFunction(MachineFunction &MF) {
// Opcodes that support pretty much all combinations of reg banks and LLTs
// (except S1). There is no point in writing rules for them.
if (Opc == AMDGPU::G_BUILD_VECTOR || Opc == AMDGPU::G_UNMERGE_VALUES ||
-Opc == AMDGPU::G_MERGE_VALUES) {
+Opc == AMDGPU::G_MERGE_VALUES || Opc == G_BITCAST) {
RBLHelper.applyMappingTrivial(*MI);
continue;
}
diff --git a/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
b/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
index 0f5f3545ac8eb..59f16315bbd72 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
@@ -14,13 +14,16 @@
#include "AMDGPURegBankLegalizeHelper.h"
#include "AMDGPUGlobalISelUtils.h"
#include "AMDGPUInstrInfo.h"
+#include "AMDGPURegBankLegalizeRules.h"
#include "AMDGPURegisterBankInfo.h"
#include "GCNSubtarget.h"
#include "MCTargetDesc/AMDGPUMCTargetDesc.h"
#include "llvm/CodeGen/GlobalISel/GenericMachineInstrs.h"
+#include "llvm/CodeGen/GlobalISel/MIPatternMatch.h"
#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
#include "llvm/CodeGen/MachineUniformityAnalysis.h"
#include "llvm/IR/IntrinsicsAMDGPU.h"
+#include "llvm/Support/ErrorHandling.h"
#define DEBUG_TYPE "amdgpu-regbanklegalize"
@@ -130,6 +133,28 @@ void RegBankLegalizeHelper::widenLoad(MachineInstr &MI,
LLT WideTy,
MI.eraseFromParent();
}
+std::pair RegBankLegalizeHelper::unpackZExt(Register Reg) {
+ auto PackedS32 = B.buildBitcast(SgprRB_S32, Reg);
+ auto Mask = B.buildConstant(SgprRB_S32, 0x);
+ auto Lo = B.buildAnd(SgprRB_S32, PackedS32, Mask);
+ auto Hi = B.buildLShr(SgprRB_S32, PackedS32, B.buildConstant(SgprRB_S32,
16));
+ return {Lo.getReg(0), Hi.getReg(0)};
+}
+
+std::pair RegBankLegalizeHelper::unpackSExt(Register Reg) {
+ auto PackedS32 = B.buildBitcast(SgprRB_S32, Reg);
+ auto Lo = B.buildSExtInReg(SgprRB_S32, PackedS32, 16);
+ auto Hi = B.buildAShr(SgprRB_S32, PackedS32, B.buildConstant(SgprRB_S32,
16));
+ return {Lo.getReg(0), Hi.getReg(0)};
+}
+
+std::pair RegBankLegalizeHelper::unpackAExt(Register Reg) {
+ auto PackedS32 = B.buildBitcast(SgprRB_S32, Reg);
+ auto Lo = PackedS32;
+ auto Hi = B.buildLShr(SgprRB_S32, PackedS32, B.buildConstant(SgprRB_S32,
16));
+ return {Lo.getReg(0), Hi.getReg(0)};
+}
+
void RegBankLegalizeHelper::lower(MachineInstr &MI,
const RegBankLLTMapping &Mapping,
SmallSet &WaterfallSgprs) {
@@ -259,6 +284,33 @@ void RegBankLegalizeHelper::lower(MachineInstr &MI,
MI.eraseFromParent();
break;
}
+ case SExtInRegSplitTo32: {
+auto Op1 = B.buildUnmerge(VgprRB_S32, MI.getOperand(1).getReg())
[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: add RegBankLegalize rules for AND OR and XOR (PR #132382)
https://github.com/petar-avramovic ready_for_review https://github.com/llvm/llvm-project/pull/132382 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: add RegBankLegalize rules for AND OR and XOR (PR #132382)
llvmbot wrote:
@llvm/pr-subscribers-llvm-globalisel
Author: Petar Avramovic (petar-avramovic)
Changes
Uniform S1 is lowered to S32.
Divergent S1 is selected as VCC(S1) instruction select will select
SALU instruction based on wavesize (S32 or S64).
S16 are selected as is. There are register classes for vgpr S16.
Since some isel patterns check for sgpr S16 we don't lower to S32.
For 32 and 64 bit types we use B32/B64 rules that cover scalar vector
and pointers types.
SALU B32 and B64 and VALU B32 instructions are available.
Divergent B64 is lowered to B32.
---
Patch is 41.59 KiB, truncated to 20.00 KiB below, full version:
https://github.com/llvm/llvm-project/pull/132382.diff
6 Files Affected:
- (modified) llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp (+13-4)
- (modified) llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp (+9-1)
- (modified) llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h (+2)
- (modified) llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-and.mir (+21-12)
- (modified) llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-or.mir (+40-45)
- (modified) llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-xor.mir (+39-45)
``diff
diff --git a/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
b/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
index e4eaa01951a7f..5dbaa9488d668 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
@@ -219,11 +219,16 @@ void RegBankLegalizeHelper::lower(MachineInstr &MI,
return;
}
case SplitTo32: {
-auto Op1 = B.buildUnmerge(VgprRB_S32, MI.getOperand(1).getReg());
-auto Op2 = B.buildUnmerge(VgprRB_S32, MI.getOperand(2).getReg());
+Register Dst = MI.getOperand(0).getReg();
+LLT Ty = MRI.getType(Dst) == V4S16 ? V2S16 : S32;
+auto Op1 = B.buildUnmerge({VgprRB, Ty}, MI.getOperand(1).getReg());
+auto Op2 = B.buildUnmerge({VgprRB, Ty}, MI.getOperand(2).getReg());
unsigned Opc = MI.getOpcode();
-auto Lo = B.buildInstr(Opc, {VgprRB_S32}, {Op1.getReg(0), Op2.getReg(0)});
-auto Hi = B.buildInstr(Opc, {VgprRB_S32}, {Op1.getReg(1), Op2.getReg(1)});
+auto Flags = MI.getFlags();
+auto Lo = B.buildInstr(Opc, {{VgprRB, Ty}}, {Op1.getReg(0), Op2.getReg(0)},
+ Flags);
+auto Hi = B.buildInstr(Opc, {{VgprRB, Ty}}, {Op1.getReg(1), Op2.getReg(1)},
+ Flags);
B.buildMergeLikeInstr(MI.getOperand(0).getReg(), {Lo, Hi});
MI.eraseFromParent();
break;
@@ -384,6 +389,7 @@ LLT
RegBankLegalizeHelper::getTyFromID(RegBankLLTMappingApplyID ID) {
case UniInVcc:
return LLT::scalar(1);
case Sgpr16:
+ case Vgpr16:
return LLT::scalar(16);
case Sgpr32:
case Sgpr32Trunc:
@@ -503,6 +509,7 @@
RegBankLegalizeHelper::getRegBankFromID(RegBankLLTMappingApplyID ID) {
case Sgpr32AExtBoolInReg:
case Sgpr32SExt:
return SgprRB;
+ case Vgpr16:
case Vgpr32:
case Vgpr64:
case VgprP0:
@@ -546,6 +553,7 @@ void RegBankLegalizeHelper::applyMappingDst(
case SgprP4:
case SgprP5:
case SgprV4S32:
+case Vgpr16:
case Vgpr32:
case Vgpr64:
case VgprP0:
@@ -677,6 +685,7 @@ void RegBankLegalizeHelper::applyMappingSrc(
break;
}
// vgpr scalars, pointers and vectors
+case Vgpr16:
case Vgpr32:
case Vgpr64:
case VgprP0:
diff --git a/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
b/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
index 7959bf30ca27d..96bc969dd1f40 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
@@ -106,6 +106,8 @@ bool matchUniformityAndLLT(Register Reg,
UniformityLLTOpPredicateID UniID,
return MRI.getType(Reg).getSizeInBits() == 512 && MUI.isUniform(Reg);
case DivS1:
return MRI.getType(Reg) == LLT::scalar(1) && MUI.isDivergent(Reg);
+ case DivS16:
+return MRI.getType(Reg) == LLT::scalar(16) && MUI.isDivergent(Reg);
case DivS32:
return MRI.getType(Reg) == LLT::scalar(32) && MUI.isDivergent(Reg);
case DivS64:
@@ -441,6 +443,9 @@ RegBankLegalizeRules::RegBankLegalizeRules(const
GCNSubtarget &_ST,
addRulesForGOpcs({G_XOR, G_OR, G_AND}, StandardB)
.Any({{UniS1}, {{Sgpr32Trunc}, {Sgpr32AExt, Sgpr32AExt}}})
.Any({{DivS1}, {{Vcc}, {Vcc, Vcc}}})
+ .Any({{UniS16}, {{Sgpr16}, {Sgpr16, Sgpr16}}})
+ .Any({{DivS16}, {{Vgpr16}, {Vgpr16, Vgpr16}}})
+ .Uni(B32, {{SgprB32}, {SgprB32, SgprB32}})
.Div(B32, {{VgprB32}, {VgprB32, VgprB32}})
.Uni(B64, {{SgprB64}, {SgprB64, SgprB64}})
.Div(B64, {{VgprB64}, {VgprB64, VgprB64}, SplitTo32});
@@ -483,11 +488,14 @@ RegBankLegalizeRules::RegBankLegalizeRules(const
GCNSubtarget &_ST,
.Div(B32, {{VgprB32}, {Vcc, VgprB32, VgprB32}})
.Uni(B32, {{SgprB32}, {Sgpr32AExtBoolInReg, SgprB32, SgprB32}});
- addRulesForGOpcs({G_ANYEXT}).Any({{UniS32, S16}, {{Sg
[llvm-branch-commits] [llvm] [AMDGPU][GlobalISel] Allow forming s16 U/SBFX pre-regbankselect (PR #131309)
https://github.com/Pierre-vh updated
https://github.com/llvm/llvm-project/pull/131309
>From 16cbcc2c44bfe74ba54f00c5be634c54ff43a5cf Mon Sep 17 00:00:00 2001
From: pvanhout
Date: Wed, 12 Mar 2025 09:43:15 +0100
Subject: [PATCH] [AMDGPU][GlobalISel] Allow forming s16 U/SBFX
pre-regbankselect
Make s16 G_U/SBFX legal and widen them in RegBankSelect.
This allows the set of BFX formation combines to work on s16 types.
---
.../lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 9 +-
.../Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 33 +-
llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll | 645 --
llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll | 380 ---
.../AMDGPU/GlobalISel/legalize-sbfx.mir | 26 +-
.../AMDGPU/GlobalISel/legalize-ubfx.mir | 27 +-
llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll | 27 +-
7 files changed, 503 insertions(+), 644 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
index d6675f225cdfc..cc014fbd32466 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
@@ -2068,10 +2068,13 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo(const
GCNSubtarget &ST_,
.minScalar(0, S32)
.lower();
+ // Only {S32, S32} or {S32, S64} should ever reach codegen.
+ // We allow S/UBFX for S16 so the combiner can form them before
+ // RegBankSelect, and RegBankSelect will then legalize them correctly.
getActionDefinitionsBuilder({G_SBFX, G_UBFX})
- .legalFor({{S32, S32}, {S64, S32}})
- .clampScalar(1, S32, S32)
- .clampScalar(0, S32, S64)
+ .legalFor({{S16, S16}, {S32, S32}, {S64, S32}})
+ .clampScalar(1, S16, S32)
+ .clampScalar(0, S16, S64)
.widenScalarToNextPow2(0)
.scalarize(0);
diff --git a/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
b/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
index b46fc7d9c752a..1c9d67826186f 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
@@ -1485,7 +1485,9 @@ bool
AMDGPURegisterBankInfo::applyMappingBFE(MachineIRBuilder &B,
Register DstReg = MI.getOperand(0).getReg();
LLT Ty = MRI.getType(DstReg);
+ const LLT S64 = LLT::scalar(64);
const LLT S32 = LLT::scalar(32);
+ const LLT S16 = LLT::scalar(16);
unsigned FirstOpnd = isa(MI) ? 2 : 1;
Register SrcReg = MI.getOperand(FirstOpnd).getReg();
@@ -1495,6 +1497,18 @@ bool
AMDGPURegisterBankInfo::applyMappingBFE(MachineIRBuilder &B,
const RegisterBank *DstBank =
OpdMapper.getInstrMapping().getOperandMapping(0).BreakDown[0].RegBank;
if (DstBank == &AMDGPU::VGPRRegBank) {
+if (Ty == S16) {
+ ApplyRegBankMapping ApplyBank(B, *this, MRI, &AMDGPU::VGPRRegBank);
+ B.setInsertPt(B.getMBB(), MI);
+ LegalizerHelper Helper(B.getMF(), ApplyBank, B);
+
+ Helper.widenScalarDst(MI, S32);
+ Helper.widenScalarSrc(MI, S32, 1, AMDGPU::G_ANYEXT);
+ Helper.widenScalarSrc(MI, S32, 2, AMDGPU::G_ZEXT);
+ Helper.widenScalarSrc(MI, S32, 3, AMDGPU::G_ZEXT);
+ return true;
+}
+
if (Ty == S32)
return true;
@@ -1554,6 +1568,11 @@ bool
AMDGPURegisterBankInfo::applyMappingBFE(MachineIRBuilder &B,
ApplyRegBankMapping ApplyBank(B, *this, MRI, &AMDGPU::SGPRRegBank);
+ if (Ty == S16) {
+OffsetReg = B.buildAnyExtOrTrunc(S32, OffsetReg).getReg(0);
+WidthReg = B.buildAnyExtOrTrunc(S32, WidthReg).getReg(0);
+ }
+
// Ensure the high bits are clear to insert the offset.
auto OffsetMask = B.buildConstant(S32, maskTrailingOnes(6));
auto ClampOffset = B.buildAnd(S32, OffsetReg, OffsetMask);
@@ -1568,13 +1587,21 @@ bool
AMDGPURegisterBankInfo::applyMappingBFE(MachineIRBuilder &B,
// TODO: It might be worth using a pseudo here to avoid scc clobber and
// register class constraints.
- unsigned Opc = Ty == S32 ? (Signed ? AMDGPU::S_BFE_I32 : AMDGPU::S_BFE_U32) :
- (Signed ? AMDGPU::S_BFE_I64 : AMDGPU::S_BFE_U64);
+ unsigned Opc = (Ty != S64) ? (Signed ? AMDGPU::S_BFE_I32 : AMDGPU::S_BFE_U32)
+ : (Signed ? AMDGPU::S_BFE_I64 :
AMDGPU::S_BFE_U64);
- auto MIB = B.buildInstr(Opc, {DstReg}, {SrcReg, MergedInputs});
+ Register BFEDst = DstReg;
+ if (Ty == S16) {
+BFEDst = MRI.createGenericVirtualRegister(S32);
+MRI.setRegBank(BFEDst, AMDGPU::SGPRRegBank);
+ }
+ auto MIB = B.buildInstr(Opc, {BFEDst}, {SrcReg, MergedInputs});
if (!constrainSelectedInstRegOperands(*MIB, *TII, *TRI, *this))
llvm_unreachable("failed to constrain BFE");
+ if (BFEDst != DstReg)
+B.buildZExtOrTrunc(DstReg, BFEDst);
+
MI.eraseFromParent();
return true;
}
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
b/llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
index 07fcb02d98649..d2b600b04f9fc 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/fsh
[llvm-branch-commits] [llvm] [AMDGPU][GlobalISel] Allow forming s16 U/SBFX pre-regbankselect (PR #131309)
https://github.com/Pierre-vh updated
https://github.com/llvm/llvm-project/pull/131309
>From 16cbcc2c44bfe74ba54f00c5be634c54ff43a5cf Mon Sep 17 00:00:00 2001
From: pvanhout
Date: Wed, 12 Mar 2025 09:43:15 +0100
Subject: [PATCH] [AMDGPU][GlobalISel] Allow forming s16 U/SBFX
pre-regbankselect
Make s16 G_U/SBFX legal and widen them in RegBankSelect.
This allows the set of BFX formation combines to work on s16 types.
---
.../lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 9 +-
.../Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 33 +-
llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll | 645 --
llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll | 380 ---
.../AMDGPU/GlobalISel/legalize-sbfx.mir | 26 +-
.../AMDGPU/GlobalISel/legalize-ubfx.mir | 27 +-
llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll | 27 +-
7 files changed, 503 insertions(+), 644 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
index d6675f225cdfc..cc014fbd32466 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
@@ -2068,10 +2068,13 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo(const
GCNSubtarget &ST_,
.minScalar(0, S32)
.lower();
+ // Only {S32, S32} or {S32, S64} should ever reach codegen.
+ // We allow S/UBFX for S16 so the combiner can form them before
+ // RegBankSelect, and RegBankSelect will then legalize them correctly.
getActionDefinitionsBuilder({G_SBFX, G_UBFX})
- .legalFor({{S32, S32}, {S64, S32}})
- .clampScalar(1, S32, S32)
- .clampScalar(0, S32, S64)
+ .legalFor({{S16, S16}, {S32, S32}, {S64, S32}})
+ .clampScalar(1, S16, S32)
+ .clampScalar(0, S16, S64)
.widenScalarToNextPow2(0)
.scalarize(0);
diff --git a/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
b/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
index b46fc7d9c752a..1c9d67826186f 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
@@ -1485,7 +1485,9 @@ bool
AMDGPURegisterBankInfo::applyMappingBFE(MachineIRBuilder &B,
Register DstReg = MI.getOperand(0).getReg();
LLT Ty = MRI.getType(DstReg);
+ const LLT S64 = LLT::scalar(64);
const LLT S32 = LLT::scalar(32);
+ const LLT S16 = LLT::scalar(16);
unsigned FirstOpnd = isa(MI) ? 2 : 1;
Register SrcReg = MI.getOperand(FirstOpnd).getReg();
@@ -1495,6 +1497,18 @@ bool
AMDGPURegisterBankInfo::applyMappingBFE(MachineIRBuilder &B,
const RegisterBank *DstBank =
OpdMapper.getInstrMapping().getOperandMapping(0).BreakDown[0].RegBank;
if (DstBank == &AMDGPU::VGPRRegBank) {
+if (Ty == S16) {
+ ApplyRegBankMapping ApplyBank(B, *this, MRI, &AMDGPU::VGPRRegBank);
+ B.setInsertPt(B.getMBB(), MI);
+ LegalizerHelper Helper(B.getMF(), ApplyBank, B);
+
+ Helper.widenScalarDst(MI, S32);
+ Helper.widenScalarSrc(MI, S32, 1, AMDGPU::G_ANYEXT);
+ Helper.widenScalarSrc(MI, S32, 2, AMDGPU::G_ZEXT);
+ Helper.widenScalarSrc(MI, S32, 3, AMDGPU::G_ZEXT);
+ return true;
+}
+
if (Ty == S32)
return true;
@@ -1554,6 +1568,11 @@ bool
AMDGPURegisterBankInfo::applyMappingBFE(MachineIRBuilder &B,
ApplyRegBankMapping ApplyBank(B, *this, MRI, &AMDGPU::SGPRRegBank);
+ if (Ty == S16) {
+OffsetReg = B.buildAnyExtOrTrunc(S32, OffsetReg).getReg(0);
+WidthReg = B.buildAnyExtOrTrunc(S32, WidthReg).getReg(0);
+ }
+
// Ensure the high bits are clear to insert the offset.
auto OffsetMask = B.buildConstant(S32, maskTrailingOnes(6));
auto ClampOffset = B.buildAnd(S32, OffsetReg, OffsetMask);
@@ -1568,13 +1587,21 @@ bool
AMDGPURegisterBankInfo::applyMappingBFE(MachineIRBuilder &B,
// TODO: It might be worth using a pseudo here to avoid scc clobber and
// register class constraints.
- unsigned Opc = Ty == S32 ? (Signed ? AMDGPU::S_BFE_I32 : AMDGPU::S_BFE_U32) :
- (Signed ? AMDGPU::S_BFE_I64 : AMDGPU::S_BFE_U64);
+ unsigned Opc = (Ty != S64) ? (Signed ? AMDGPU::S_BFE_I32 : AMDGPU::S_BFE_U32)
+ : (Signed ? AMDGPU::S_BFE_I64 :
AMDGPU::S_BFE_U64);
- auto MIB = B.buildInstr(Opc, {DstReg}, {SrcReg, MergedInputs});
+ Register BFEDst = DstReg;
+ if (Ty == S16) {
+BFEDst = MRI.createGenericVirtualRegister(S32);
+MRI.setRegBank(BFEDst, AMDGPU::SGPRRegBank);
+ }
+ auto MIB = B.buildInstr(Opc, {BFEDst}, {SrcReg, MergedInputs});
if (!constrainSelectedInstRegOperands(*MIB, *TII, *TRI, *this))
llvm_unreachable("failed to constrain BFE");
+ if (BFEDst != DstReg)
+B.buildZExtOrTrunc(DstReg, BFEDst);
+
MI.eraseFromParent();
return true;
}
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
b/llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
index 07fcb02d98649..d2b600b04f9fc 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/fsh
[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Only fold flat offsets if they are inbounds (PR #131863)
ritter-x2a wrote: The changes are now in #131994 and #132353. https://github.com/llvm/llvm-project/pull/131863 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [AMDGPU][NFC] Mark GEPs in flat offset folding tests as inbounds (PR #131994)
https://github.com/ritter-x2a ready_for_review https://github.com/llvm/llvm-project/pull/131994 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [BOLT] Gadget scanner: detect non-protected indirect calls (PR #131899)
https://github.com/atrosinenko updated
https://github.com/llvm/llvm-project/pull/131899
>From efd98b412431b0c597d3d7dcee0dd4255b8e2418 Mon Sep 17 00:00:00 2001
From: Anatoly Trosinenko
Date: Tue, 18 Mar 2025 21:32:11 +0300
Subject: [PATCH 1/2] [BOLT] Gadget scanner: detect non-protected indirect
calls
---
bolt/include/bolt/Core/MCPlusBuilder.h| 10 +
bolt/lib/Passes/PAuthGadgetScanner.cpp| 33 +-
.../Target/AArch64/AArch64MCPlusBuilder.cpp | 42 ++
.../binary-analysis/AArch64/gs-pauth-calls.s | 676 ++
4 files changed, 757 insertions(+), 4 deletions(-)
create mode 100644 bolt/test/binary-analysis/AArch64/gs-pauth-calls.s
diff --git a/bolt/include/bolt/Core/MCPlusBuilder.h
b/bolt/include/bolt/Core/MCPlusBuilder.h
index 76ea2489e7038..b3d54ccd5955d 100644
--- a/bolt/include/bolt/Core/MCPlusBuilder.h
+++ b/bolt/include/bolt/Core/MCPlusBuilder.h
@@ -577,6 +577,16 @@ class MCPlusBuilder {
return getNoRegister();
}
+ /// Returns the register used as call destination, or no-register, if not
+ /// an indirect call. Sets IsAuthenticatedInternally if the instruction
+ /// accepts signed pointer as its operand and authenticates it internally.
+ virtual MCPhysReg
+ getRegUsedAsCallDest(const MCInst &Inst,
+ bool &IsAuthenticatedInternally) const {
+llvm_unreachable("not implemented");
+return getNoRegister();
+ }
+
virtual bool isTerminator(const MCInst &Inst) const;
virtual bool isNoop(const MCInst &Inst) const {
diff --git a/bolt/lib/Passes/PAuthGadgetScanner.cpp
b/bolt/lib/Passes/PAuthGadgetScanner.cpp
index c81a586b02771..b8a0a80215ce2 100644
--- a/bolt/lib/Passes/PAuthGadgetScanner.cpp
+++ b/bolt/lib/Passes/PAuthGadgetScanner.cpp
@@ -382,11 +382,11 @@ class PacRetAnalysis
public:
std::vector
- getLastClobberingInsts(const MCInst Ret, BinaryFunction &BF,
- const ArrayRef UsedDirtyRegs) const {
+ getLastClobberingInsts(const MCInst &Inst, BinaryFunction &BF,
+ const ArrayRef UsedDirtyRegs) {
if (RegsToTrackInstsFor.empty())
return {};
-auto MaybeState = getStateAt(Ret);
+auto MaybeState = getStateBefore(Inst);
if (!MaybeState)
llvm_unreachable("Expected State to be present");
const State &S = *MaybeState;
@@ -434,6 +434,29 @@ static std::shared_ptr tryCheckReturn(const
BinaryContext &BC,
return std::make_shared(RetKind, Inst, RetReg);
}
+static std::shared_ptr tryCheckCall(const BinaryContext &BC,
+const MCInstReference &Inst,
+const State &S) {
+ static const GadgetKind CallKind("non-protected call found");
+ if (!BC.MIB->isCall(Inst) && !BC.MIB->isBranch(Inst))
+return nullptr;
+
+ bool IsAuthenticated = false;
+ MCPhysReg DestReg = BC.MIB->getRegUsedAsCallDest(Inst, IsAuthenticated);
+ if (IsAuthenticated || DestReg == BC.MIB->getNoRegister())
+return nullptr;
+
+ LLVM_DEBUG({
+traceInst(BC, "Found call inst", Inst);
+traceReg(BC, "Call destination reg", DestReg);
+traceRegMask(BC, "SafeToDerefRegs", S.SafeToDerefRegs);
+ });
+ if (S.SafeToDerefRegs[DestReg])
+return nullptr;
+
+ return std::make_shared(CallKind, Inst, DestReg);
+}
+
FunctionAnalysisResult
Analysis::computeDfState(BinaryFunction &BF,
MCPlusBuilder::AllocatorIdTy AllocatorId) {
@@ -450,10 +473,12 @@ Analysis::computeDfState(BinaryFunction &BF,
for (BinaryBasicBlock &BB : BF) {
for (int64_t I = 0, E = BB.size(); I < E; ++I) {
MCInstReference Inst(&BB, I);
- const State &S = *PRA.getStateAt(Inst);
+ const State &S = *PRA.getStateBefore(Inst);
if (auto Report = tryCheckReturn(BC, Inst, S))
Result.Diagnostics.push_back(Report);
+ if (auto Report = tryCheckCall(BC, Inst, S))
+Result.Diagnostics.push_back(Report);
}
}
diff --git a/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
b/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
index d238a1df5c7d7..9ce1514639f95 100644
--- a/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
+++ b/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
@@ -277,6 +277,48 @@ class AArch64MCPlusBuilder : public MCPlusBuilder {
}
}
+ MCPhysReg
+ getRegUsedAsCallDest(const MCInst &Inst,
+ bool &IsAuthenticatedInternally) const override {
+assert(isCall(Inst) || isBranch(Inst));
+IsAuthenticatedInternally = false;
+
+switch (Inst.getOpcode()) {
+case AArch64::B:
+case AArch64::BL:
+ assert(Inst.getOperand(0).isExpr());
+ return getNoRegister();
+case AArch64::Bcc:
+case AArch64::CBNZW:
+case AArch64::CBNZX:
+case AArch64::CBZW:
+case AArch64::CBZX:
+ assert(Inst.getOperand(1).isExpr());
+ return getNoRegister();
+case AArch64::TBNZW:
+case AArch64::TBNZX:
+case AArch64::TBZW:
+case AArch64::TBZX:
+ assert(Ins
[llvm-branch-commits] [llvm] [BOLT] Gadget scanner: reformulate the state for data-flow analysis (PR #131898)
https://github.com/atrosinenko updated
https://github.com/llvm/llvm-project/pull/131898
>From 76946f1e35bfc31c6a7268c6d881efa9f1189a0f Mon Sep 17 00:00:00 2001
From: Anatoly Trosinenko
Date: Mon, 17 Mar 2025 22:27:53 +0300
Subject: [PATCH 1/2] [BOLT] Gadget scanner: reformulate the state for
data-flow analysis
In preparation for implementing support for detection of non-protected
call instructions, refine the definition of state which is computed for
each register by data-flow analysis.
Explicitly marking the registers which are known to be trusted at
function entry is crucial for finding non-protected calls. In addition,
it fixes less-common false negatives for pac-ret, such as `ret x1` in
`f_nonx30_ret_non_auted` test case.
---
bolt/include/bolt/Core/MCPlusBuilder.h| 10 ++
bolt/include/bolt/Passes/PAuthGadgetScanner.h | 7 +-
bolt/lib/Passes/PAuthGadgetScanner.cpp| 129 +++---
.../Target/AArch64/AArch64MCPlusBuilder.cpp | 4 +
.../AArch64/gs-pacret-autiasp.s | 19 ++-
.../AArch64/gs-pacret-multi-bb.s | 3 +-
6 files changed, 104 insertions(+), 68 deletions(-)
diff --git a/bolt/include/bolt/Core/MCPlusBuilder.h
b/bolt/include/bolt/Core/MCPlusBuilder.h
index b285138b77fe7..76ea2489e7038 100644
--- a/bolt/include/bolt/Core/MCPlusBuilder.h
+++ b/bolt/include/bolt/Core/MCPlusBuilder.h
@@ -551,6 +551,16 @@ class MCPlusBuilder {
return Analysis->isReturn(Inst);
}
+ /// Returns the registers that are trusted at function entry.
+ ///
+ /// Each register should be treated as if a successfully authenticated
+ /// pointer was written to it before entering the function (i.e. the
+ /// pointer is safe to jump to as well as to be signed).
+ virtual SmallVector getTrustedLiveInRegs() const {
+llvm_unreachable("not implemented");
+return {};
+ }
+
virtual ErrorOr getAuthenticatedReg(const MCInst &Inst) const {
llvm_unreachable("not implemented");
return getNoRegister();
diff --git a/bolt/include/bolt/Passes/PAuthGadgetScanner.h
b/bolt/include/bolt/Passes/PAuthGadgetScanner.h
index f102f1080e2e8..404dde2901767 100644
--- a/bolt/include/bolt/Passes/PAuthGadgetScanner.h
+++ b/bolt/include/bolt/Passes/PAuthGadgetScanner.h
@@ -209,13 +209,12 @@ struct Report {
struct GadgetReport : public Report {
const GadgetKind &Kind;
- SmallVector AffectedRegisters;
+ SmallVector AffectedRegisters;
std::vector OverwritingInstrs;
GadgetReport(const GadgetKind &Kind, MCInstReference Location,
- const BitVector &AffectedRegisters)
- : Report(Location), Kind(Kind),
-AffectedRegisters(AffectedRegisters.set_bits()) {}
+ MCPhysReg AffectedRegister)
+ : Report(Location), Kind(Kind), AffectedRegisters({AffectedRegister}) {}
void generateReport(raw_ostream &OS, const BinaryContext &BC) const override;
diff --git a/bolt/lib/Passes/PAuthGadgetScanner.cpp
b/bolt/lib/Passes/PAuthGadgetScanner.cpp
index 4f7be17327b49..c81a586b02771 100644
--- a/bolt/lib/Passes/PAuthGadgetScanner.cpp
+++ b/bolt/lib/Passes/PAuthGadgetScanner.cpp
@@ -126,18 +126,16 @@ class TrackedRegisters {
// The security property that is checked is:
// When a register is used as the address to jump to in a return instruction,
-// that register must either:
-// (a) never be changed within this function, i.e. have the same value as when
-// the function started, or
+// that register must be safe-to-dereference. It must either
+// (a) be safe-to-dereference at function entry and never be changed within
this
+// function, i.e. have the same value as when the function started, or
// (b) the last write to the register must be by an authentication instruction.
// This property is checked by using dataflow analysis to keep track of which
-// registers have been written (def-ed), since last authenticated. Those are
-// exactly the registers containing values that should not be trusted (as they
-// could have changed since the last time they were authenticated). For
pac-ret,
-// any return instruction using such a register is a gadget to be reported. For
-// PAuthABI, probably at least any indirect control flow using such a register
-// should be reported.
+// registers have been written (def-ed), since last authenticated. For pac-ret,
+// any return instruction using a register which is not safe-to-dereference is
+// a gadget to be reported. For PAuthABI, probably at least any indirect
control
+// flow using such a register should be reported.
// Furthermore, when producing a diagnostic for a found non-pac-ret protected
// return, the analysis also lists the last instructions that wrote to the
@@ -156,10 +154,29 @@ class TrackedRegisters {
//in the gadgets to be reported. This information is used in the second run
//to also track which instructions last wrote to those registers.
+/// A state representing which registers are safe to use by an instruction
+/// at a given program p
[llvm-branch-commits] [llvm] [BOLT] Gadget scanner: reformulate the state for data-flow analysis (PR #131898)
https://github.com/atrosinenko updated
https://github.com/llvm/llvm-project/pull/131898
>From 76946f1e35bfc31c6a7268c6d881efa9f1189a0f Mon Sep 17 00:00:00 2001
From: Anatoly Trosinenko
Date: Mon, 17 Mar 2025 22:27:53 +0300
Subject: [PATCH 1/2] [BOLT] Gadget scanner: reformulate the state for
data-flow analysis
In preparation for implementing support for detection of non-protected
call instructions, refine the definition of state which is computed for
each register by data-flow analysis.
Explicitly marking the registers which are known to be trusted at
function entry is crucial for finding non-protected calls. In addition,
it fixes less-common false negatives for pac-ret, such as `ret x1` in
`f_nonx30_ret_non_auted` test case.
---
bolt/include/bolt/Core/MCPlusBuilder.h| 10 ++
bolt/include/bolt/Passes/PAuthGadgetScanner.h | 7 +-
bolt/lib/Passes/PAuthGadgetScanner.cpp| 129 +++---
.../Target/AArch64/AArch64MCPlusBuilder.cpp | 4 +
.../AArch64/gs-pacret-autiasp.s | 19 ++-
.../AArch64/gs-pacret-multi-bb.s | 3 +-
6 files changed, 104 insertions(+), 68 deletions(-)
diff --git a/bolt/include/bolt/Core/MCPlusBuilder.h
b/bolt/include/bolt/Core/MCPlusBuilder.h
index b285138b77fe7..76ea2489e7038 100644
--- a/bolt/include/bolt/Core/MCPlusBuilder.h
+++ b/bolt/include/bolt/Core/MCPlusBuilder.h
@@ -551,6 +551,16 @@ class MCPlusBuilder {
return Analysis->isReturn(Inst);
}
+ /// Returns the registers that are trusted at function entry.
+ ///
+ /// Each register should be treated as if a successfully authenticated
+ /// pointer was written to it before entering the function (i.e. the
+ /// pointer is safe to jump to as well as to be signed).
+ virtual SmallVector getTrustedLiveInRegs() const {
+llvm_unreachable("not implemented");
+return {};
+ }
+
virtual ErrorOr getAuthenticatedReg(const MCInst &Inst) const {
llvm_unreachable("not implemented");
return getNoRegister();
diff --git a/bolt/include/bolt/Passes/PAuthGadgetScanner.h
b/bolt/include/bolt/Passes/PAuthGadgetScanner.h
index f102f1080e2e8..404dde2901767 100644
--- a/bolt/include/bolt/Passes/PAuthGadgetScanner.h
+++ b/bolt/include/bolt/Passes/PAuthGadgetScanner.h
@@ -209,13 +209,12 @@ struct Report {
struct GadgetReport : public Report {
const GadgetKind &Kind;
- SmallVector AffectedRegisters;
+ SmallVector AffectedRegisters;
std::vector OverwritingInstrs;
GadgetReport(const GadgetKind &Kind, MCInstReference Location,
- const BitVector &AffectedRegisters)
- : Report(Location), Kind(Kind),
-AffectedRegisters(AffectedRegisters.set_bits()) {}
+ MCPhysReg AffectedRegister)
+ : Report(Location), Kind(Kind), AffectedRegisters({AffectedRegister}) {}
void generateReport(raw_ostream &OS, const BinaryContext &BC) const override;
diff --git a/bolt/lib/Passes/PAuthGadgetScanner.cpp
b/bolt/lib/Passes/PAuthGadgetScanner.cpp
index 4f7be17327b49..c81a586b02771 100644
--- a/bolt/lib/Passes/PAuthGadgetScanner.cpp
+++ b/bolt/lib/Passes/PAuthGadgetScanner.cpp
@@ -126,18 +126,16 @@ class TrackedRegisters {
// The security property that is checked is:
// When a register is used as the address to jump to in a return instruction,
-// that register must either:
-// (a) never be changed within this function, i.e. have the same value as when
-// the function started, or
+// that register must be safe-to-dereference. It must either
+// (a) be safe-to-dereference at function entry and never be changed within
this
+// function, i.e. have the same value as when the function started, or
// (b) the last write to the register must be by an authentication instruction.
// This property is checked by using dataflow analysis to keep track of which
-// registers have been written (def-ed), since last authenticated. Those are
-// exactly the registers containing values that should not be trusted (as they
-// could have changed since the last time they were authenticated). For
pac-ret,
-// any return instruction using such a register is a gadget to be reported. For
-// PAuthABI, probably at least any indirect control flow using such a register
-// should be reported.
+// registers have been written (def-ed), since last authenticated. For pac-ret,
+// any return instruction using a register which is not safe-to-dereference is
+// a gadget to be reported. For PAuthABI, probably at least any indirect
control
+// flow using such a register should be reported.
// Furthermore, when producing a diagnostic for a found non-pac-ret protected
// return, the analysis also lists the last instructions that wrote to the
@@ -156,10 +154,29 @@ class TrackedRegisters {
//in the gadgets to be reported. This information is used in the second run
//to also track which instructions last wrote to those registers.
+/// A state representing which registers are safe to use by an instruction
+/// at a given program p
[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: add RegBankLegalize rules for extends and trunc (PR #132383)
petar-avramovic wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/132383?utm_source=stack-comment-downstack-mergeability-warning"; > >on Graphite. > https://graphite.dev/docs/merge-pull-requests";>Learn more * **#132385** https://app.graphite.dev/github/pr/llvm/llvm-project/132385?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * **#132384** https://app.graphite.dev/github/pr/llvm/llvm-project/132384?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * **#132383** https://app.graphite.dev/github/pr/llvm/llvm-project/132383?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/132383?utm_source=stack-comment-view-in-graphite"; target="_blank">(View in Graphite) * **#132382** https://app.graphite.dev/github/pr/llvm/llvm-project/132382?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * **#132381** https://app.graphite.dev/github/pr/llvm/llvm-project/132381?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * `main` This stack of pull requests is managed by https://graphite.dev?utm-source=stack-comment";>Graphite. Learn more about https://stacking.dev/?utm_source=stack-comment";>stacking. https://github.com/llvm/llvm-project/pull/132383 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Only fold flat offsets if they are inbounds (PR #132353)
https://github.com/ritter-x2a updated
https://github.com/llvm/llvm-project/pull/132353
>From dd12dc2dc49b65b426b6ced3268e85939e55f9f6 Mon Sep 17 00:00:00 2001
From: Fabian Ritter
Date: Fri, 21 Mar 2025 03:33:02 -0400
Subject: [PATCH] [AMDGPU][SDAG] Only fold flat offsets if they are inbounds
For flat memory instructions where the address is supplied as a base address
register with an immediate offset, the memory aperture test ignores the
immediate offset. Currently, ISel does not respect that, which leads to
miscompilations where valid input programs crash when the address computation
relies on the immediate offset to get the base address in the proper memory
aperture. Global or scratch instructions are not affected.
This patch only selects flat instructions with immediate offsets from address
computations with the inbounds flag: If the address computation does not leave
the bounds of the allocated object, it cannot leave the bounds of the memory
aperture and is therefore safe to handle with an immediate offset.
It also adds the inbounds flag to DAG nodes resulting from transformations:
- Address computations resulting from getObjectPtrOffset. As far as I can tell,
this function is only used to compute addresses within accessed memory ranges,
e.g., for loads and stores that are split during legalization.
- Reassociated inbounds adds. If both involved operations are inbounds, then so
are operations after the transformation.
- Address computations in the SelectionDAG lowering of the memcpy/move/set
intrinsics. Base and result of the address arithmetic there are accessed, so
the operation must be inbounds.
It might make sense to separate these changes into their own PR, but I don't
see a way to test them without adding a use of the inbounds SDAG flag.
Affected tests:
- CodeGen/AMDGPU/fold-gep-offset.ll: Offsets are no longer wrongly folded,
added new positive tests where we still do fold them.
- Transforms/InferAddressSpaces/AMDGPU/flat_atomic.ll: Offset folding doesn't
seem integral to this test, so the test is not changed to make offset folding
still happen.
- CodeGen/AMDGPU/loop-prefetch-data.ll: loop-reduce prefers to base addresses
on the potentially OOB addresses used for prefetching for memory accesses,
that might be a separate issue to look into.
- Added memset tests to CodeGen/AMDGPU/memintrinsic-unroll.ll to make sure that
offsets in the memset DAG lowering are still folded properly.
A similar patch for GlobalISel will follow.
Fixes SWDEV-516125.
---
llvm/include/llvm/CodeGen/SelectionDAG.h | 12 +-
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 9 +-
.../lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 12 +-
llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 140 ---
llvm/test/CodeGen/AMDGPU/fold-gep-offset.ll | 377 +-
.../test/CodeGen/AMDGPU/loop-prefetch-data.ll | 17 +-
.../CodeGen/AMDGPU/memintrinsic-unroll.ll | 241 +++
.../InferAddressSpaces/AMDGPU/flat_atomic.ll | 6 +-
8 files changed, 720 insertions(+), 94 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/SelectionDAG.h
b/llvm/include/llvm/CodeGen/SelectionDAG.h
index 15a2370e5d8b8..aa3668d3e9aae 100644
--- a/llvm/include/llvm/CodeGen/SelectionDAG.h
+++ b/llvm/include/llvm/CodeGen/SelectionDAG.h
@@ -1069,7 +1069,8 @@ class SelectionDAG {
SDValue EVL);
/// Returns sum of the base pointer and offset.
- /// Unlike getObjectPtrOffset this does not set NoUnsignedWrap by default.
+ /// Unlike getObjectPtrOffset this does not set NoUnsignedWrap and InBounds
by
+ /// default.
SDValue getMemBasePlusOffset(SDValue Base, TypeSize Offset, const SDLoc &DL,
const SDNodeFlags Flags = SDNodeFlags());
SDValue getMemBasePlusOffset(SDValue Base, SDValue Offset, const SDLoc &DL,
@@ -1077,15 +1078,18 @@ class SelectionDAG {
/// Create an add instruction with appropriate flags when used for
/// addressing some offset of an object. i.e. if a load is split into
multiple
- /// components, create an add nuw from the base pointer to the offset.
+ /// components, create an add nuw inbounds from the base pointer to the
+ /// offset.
SDValue getObjectPtrOffset(const SDLoc &SL, SDValue Ptr, TypeSize Offset) {
-return getMemBasePlusOffset(Ptr, Offset, SL, SDNodeFlags::NoUnsignedWrap);
+return getMemBasePlusOffset(
+Ptr, Offset, SL, SDNodeFlags::NoUnsignedWrap | SDNodeFlags::InBounds);
}
SDValue getObjectPtrOffset(const SDLoc &SL, SDValue Ptr, SDValue Offset) {
// The object itself can't wrap around the address space, so it shouldn't
be
// possible for the adds of the offsets to the split parts to overflow.
-return getMemBasePlusOffset(Ptr, Offset, SL, SDNodeFlags::NoUnsignedWrap);
+return getMemBasePlusOffset(
+Ptr, Offset, SL, SDNodeFlags::NoUnsignedWrap | SDNodeFlags::InBounds);
}
/// Return a new CALLSEQ_START node, that starts new call fram
[llvm-branch-commits] [BOLT][NFC] Pass JumpTable to analyzeJumpTable (PR #132110)
https://github.com/aaupov updated https://github.com/llvm/llvm-project/pull/132110 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [AMDGPU] Precommit si-fold-bitmask.mir (PR #131310)
Pierre-vh wrote: > > Where and how should that be implemented ? I struggled with that. I tried > > adding a new special case in TableGen but I just couldn't find the right > > way to do it. Do I just add it in C++ InstructionSelector before it checks > > the patterns? Or should it be some kind of post-processing step after the > > shift has been selected, but before the G_ZEXT is selected? > > It already exists as a complex pattern, isUnneededShiftMask. The combiners > should be trying to get the clamping code into this form which expects the and I tried it but the DAG immediately transforms `(and x, 0xFF)` into a zext and it seems pretty stubborn about it as it's a basic transform. I don't mind trying to make it work a bit longer, but I could also just bring this back. What do you think? https://github.com/llvm/llvm-project/pull/131310 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [clang][HeuristicResolver] Default argument heuristic for template parameters (PR #131074)
https://github.com/zyn0217 approved this pull request. thanks https://github.com/llvm/llvm-project/pull/131074 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/20.x: [llvm-dlltool] Add a missing dependency (PR #132483)
Martin =?utf-8?q?Storsjö?=
Message-ID:
In-Reply-To:
https://github.com/llvmbot created
https://github.com/llvm/llvm-project/pull/132483
Backport dcc08a17c781a5066ab17b9791e1c455f7cedbf7
1ca93b15482d3bfa1560b35960ab46fea65b3074
Requested by: @mstorsjo
>From 0ce9b7c9b91739df4da888e5a59db93f89313da9 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Martin=20Storsj=C3=B6?=
Date: Thu, 20 Feb 2025 21:49:19 -0100
Subject: [PATCH 1/2] [llvm-dlltool] Implement the --identify option (#127465)
This option prints the name of the DLL that gets imported, when linking
against an import library.
This is implemented using the same strategy as GNU dlltool does; looking
for the contents of .idata$6 or .idata$7 chunks. The right section name
to check for is chosen by identifying whether the library is GNU or LLVM
style. In the case of GNU import libraries, the DLL name is in an
.idata$7 chunk. However there are also other chunks with that section
name (for entries for the IAT or ILT); identify these by looking for
whether a chunk contains relocations.
Alternatively, one could also just look for .idata$2 chunks, look for
relocations at the right offset, and locate data at the symbol that the
relocation points at (which may be in the same or in another object
file).
(cherry picked from commit dcc08a17c781a5066ab17b9791e1c455f7cedbf7)
---
.../llvm-dlltool/DlltoolDriver.cpp| 146 +-
llvm/lib/ToolDrivers/llvm-dlltool/Options.td | 5 +
.../llvm-dlltool/Inputs/gnu_foo_lib_h.yaml| 133
.../Inputs/gnu_foo_lib_s0.yaml| 116 ++
.../llvm-dlltool/Inputs/gnu_foo_lib_t.yaml| 119 ++
.../llvm-dlltool/Inputs/llvm_foo_dll_1.yaml | 69 +
.../llvm-dlltool/Inputs/llvm_foo_dll_2.yaml | 18 +++
.../llvm-dlltool/Inputs/llvm_foo_dll_3.yaml | 23 +++
llvm/test/tools/llvm-dlltool/identify.test| 69 +
9 files changed, 697 insertions(+), 1 deletion(-)
create mode 100644 llvm/test/tools/llvm-dlltool/Inputs/gnu_foo_lib_h.yaml
create mode 100644 llvm/test/tools/llvm-dlltool/Inputs/gnu_foo_lib_s0.yaml
create mode 100644 llvm/test/tools/llvm-dlltool/Inputs/gnu_foo_lib_t.yaml
create mode 100644 llvm/test/tools/llvm-dlltool/Inputs/llvm_foo_dll_1.yaml
create mode 100644 llvm/test/tools/llvm-dlltool/Inputs/llvm_foo_dll_2.yaml
create mode 100644 llvm/test/tools/llvm-dlltool/Inputs/llvm_foo_dll_3.yaml
create mode 100644 llvm/test/tools/llvm-dlltool/identify.test
diff --git a/llvm/lib/ToolDrivers/llvm-dlltool/DlltoolDriver.cpp
b/llvm/lib/ToolDrivers/llvm-dlltool/DlltoolDriver.cpp
index 1782e24287860..380fbd8b6fc6c 100644
--- a/llvm/lib/ToolDrivers/llvm-dlltool/DlltoolDriver.cpp
+++ b/llvm/lib/ToolDrivers/llvm-dlltool/DlltoolDriver.cpp
@@ -12,6 +12,7 @@
#include "llvm/ToolDrivers/llvm-dlltool/DlltoolDriver.h"
#include "llvm/ADT/StringSwitch.h"
+#include "llvm/Object/Archive.h"
#include "llvm/Object/COFF.h"
#include "llvm/Object/COFFImportFile.h"
#include "llvm/Object/COFFModuleDefinition.h"
@@ -158,6 +159,143 @@ bool parseModuleDefinition(StringRef DefFileName,
MachineTypes Machine,
return true;
}
+int printError(llvm::Error E, Twine File) {
+ if (!E)
+return 0;
+ handleAllErrors(std::move(E), [&](const llvm::ErrorInfoBase &EIB) {
+llvm::errs() << "error opening " << File << ": " << EIB.message() << "\n";
+ });
+ return 1;
+}
+
+template
+int forEachCoff(object::Archive &Archive, StringRef Name, Callable Callback) {
+ Error Err = Error::success();
+ for (auto &C : Archive.children(Err)) {
+Expected NameOrErr = C.getName();
+if (!NameOrErr)
+ return printError(NameOrErr.takeError(), Name);
+StringRef Name = *NameOrErr;
+
+Expected ChildMB = C.getMemoryBufferRef();
+if (!ChildMB)
+ return printError(ChildMB.takeError(), Name);
+
+if (identify_magic(ChildMB->getBuffer()) == file_magic::coff_object) {
+ auto Obj = object::COFFObjectFile::create(*ChildMB);
+ if (!Obj)
+return printError(Obj.takeError(), Name);
+ if (!Callback(*Obj->get(), Name))
+return 1;
+}
+ }
+ if (Err)
+return printError(std::move(Err), Name);
+ return 0;
+}
+
+// To find the named of the imported DLL from an import library, we can either
+// inspect the object files that form the import table entries, or we could
+// just look at the archive member names, for MSVC style import libraries.
+// Looking at the archive member names doesn't work for GNU style import
+// libraries though, while inspecting the import table entries works for
+// both. (MSVC style import libraries contain a couple regular object files
+// for the header/trailers.)
+//
+// This implementation does the same as GNU dlltool does; look at the
+// content of ".idata$7" sections, or for MSVC style libraries, look
+// at ".idata$6" sections.
+//
+// For GNU style import libraries, there are also other data chunks in sections
+// named ".idata$7" (entries to the IAT or ILT); these are dist
[llvm-branch-commits] [llvm] [CodeGen][StaticDataSplitter]Support constant pool partitioning (PR #129781)
@@ -2769,6 +2769,23 @@ namespace {
} // end anonymous namespace
+StringRef AsmPrinter::getConstantSectionSuffix(const Constant *C) const {
mingmingl-llvm wrote:
done.
https://github.com/llvm/llvm-project/pull/129781
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[llvm-branch-commits] [llvm] [CodeGen][StaticDataSplitter]Support constant pool partitioning (PR #129781)
@@ -112,21 +117,52 @@ bool
StaticDataSplitter::runOnMachineFunction(MachineFunction &MF) {
return Changed;
}
+const Constant *
+StaticDataSplitter::getConstant(const MachineOperand &Op,
+const TargetMachine &TM,
+const MachineConstantPool *MCP) {
+ if (!Op.isGlobal() && !Op.isCPI())
+return nullptr;
+
+ if (Op.isGlobal()) {
+// Find global variables with local linkage.
+const GlobalVariable *GV = getLocalLinkageGlobalVariable(Op.getGlobal());
+// Skip 'special' global variables conservatively because they are
+// often handled specially, and skip those not in static data
+// sections.
+if (!GV || GV->getName().starts_with("llvm.") ||
+!inStaticDataSection(GV, TM))
+ return nullptr;
+return GV;
+ }
+ assert(Op.isCPI() && "Op must be constant pool index in this branch");
+ int CPI = Op.getIndex();
+ if (CPI == -1)
+return nullptr;
+
+ assert(MCP != nullptr && "Constant pool info is not available.");
+ const MachineConstantPoolEntry &CPE = MCP->getConstants()[CPI];
+
+ if (CPE.isMachineConstantPoolEntry())
+return nullptr;
+
+ return CPE.Val.ConstVal;
+}
+
bool StaticDataSplitter::partitionStaticDataWithProfiles(MachineFunction &MF) {
int NumChangedJumpTables = 0;
- const TargetMachine &TM = MF.getTarget();
MachineJumpTableInfo *MJTI = MF.getJumpTableInfo();
// Jump table could be used by either terminating instructions or
// non-terminating ones, so we walk all instructions and use
// `MachineOperand::isJTI()` to identify jump table operands.
- // Similarly, `MachineOperand::isCPI()` can identify constant pool usages
- // in the same loop.
+ // Similarly, `MachineOperand::isCPI()` is used to identify constant pool
+ // usages in the same loop.
for (const auto &MBB : MF) {
for (const MachineInstr &I : MBB) {
for (const MachineOperand &Op : I.operands()) {
-if (!Op.isJTI() && !Op.isGlobal())
+if (!Op.isJTI() && !Op.isGlobal() && !Op.isCPI())
continue;
std::optional Count = MBFI->getBlockProfileCount(&MBB);
mingmingl-llvm wrote:
done.
https://github.com/llvm/llvm-project/pull/129781
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[llvm-branch-commits] [llvm] [CodeGen][StaticDataSplitter]Support constant pool partitioning (PR #129781)
@@ -206,14 +234,10 @@ void
StaticDataSplitter::annotateStaticDataWithoutProfiles(
for (const auto &MBB : MF) {
for (const MachineInstr &I : MBB) {
for (const MachineOperand &Op : I.operands()) {
-if (!Op.isGlobal())
- continue;
-const GlobalVariable *GV =
-getLocalLinkageGlobalVariable(Op.getGlobal());
-if (!GV || GV->getName().starts_with("llvm.") ||
-!inStaticDataSection(GV, MF.getTarget()))
- continue;
-SDPI->addConstantProfileCount(GV, std::nullopt);
+const Constant *C =
mingmingl-llvm wrote:
done, and did this in other places.
https://github.com/llvm/llvm-project/pull/129781
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[llvm-branch-commits] [llvm] [CodeGen][StaticDataSplitter]Support constant pool partitioning (PR #129781)
github-actions[bot] wrote:
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
You can test this locally with the following command:
``bash
git-clang-format --diff 9302b2b708cdce89add071fa584c12ddb4f9d71d
23fd549393c79a0aa1fd038bfcfb320e312b5fb8 --extensions cpp,h --
llvm/include/llvm/CodeGen/AsmPrinter.h
llvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h
llvm/include/llvm/Target/TargetLoweringObjectFile.h
llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
llvm/lib/CodeGen/StaticDataSplitter.cpp
llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
llvm/lib/Target/TargetLoweringObjectFile.cpp
llvm/lib/Target/X86/X86AsmPrinter.cpp
``
View the diff from clang-format here.
``diff
diff --git a/llvm/lib/CodeGen/StaticDataSplitter.cpp
b/llvm/lib/CodeGen/StaticDataSplitter.cpp
index f6d9c55952..9ed5d33fd2 100644
--- a/llvm/lib/CodeGen/StaticDataSplitter.cpp
+++ b/llvm/lib/CodeGen/StaticDataSplitter.cpp
@@ -58,10 +58,9 @@ class StaticDataSplitter : public MachineFunctionPass {
// .data.rel.ro} sections.
bool inStaticDataSection(const GlobalVariable *GV, const TargetMachine &TM);
-// Returns the constant if the operand refers to a global variable or
constant
+ // Returns the constant if the operand refers to a global variable or
constant
// that gets lowered to static data sections. Otherwise, return nullptr.
- const Constant *getConstant(const MachineOperand &Op,
- const TargetMachine &TM,
+ const Constant *getConstant(const MachineOperand &Op, const TargetMachine
&TM,
const MachineConstantPool *MCP);
// Use profiles to partition static data.
@@ -247,7 +246,8 @@ void StaticDataSplitter::annotateStaticDataWithoutProfiles(
for (const auto &MBB : MF)
for (const MachineInstr &I : MBB)
for (const MachineOperand &Op : I.operands())
-if (const Constant *C = getConstant(Op, MF.getTarget(),
MF.getConstantPool()))
+if (const Constant *C =
+getConstant(Op, MF.getTarget(), MF.getConstantPool()))
SDPI->addConstantProfileCount(C, std::nullopt);
}
``
https://github.com/llvm/llvm-project/pull/129781
___
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[llvm-branch-commits] [clang] [clang][HeuristicResolver] Default argument heuristic for template parameters (PR #131074)
HighCommander4 wrote: Resubmitted at https://github.com/llvm/llvm-project/pull/132465 https://github.com/llvm/llvm-project/pull/131074 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] Bump version to 20.1.2 (PR #132293)
github-actions[bot] wrote: @tstellar (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. When you are done, please add the release:note label to this PR. https://github.com/llvm/llvm-project/pull/132293 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] Bump version to 20.1.2 (PR #132293)
https://github.com/tstellar closed https://github.com/llvm/llvm-project/pull/132293 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [BOLT] Gadget scanner: detect non-protected indirect calls (PR #131899)
https://github.com/atrosinenko updated
https://github.com/llvm/llvm-project/pull/131899
>From 0b39fd45befe73650b3be72b3069e5c59cec2947 Mon Sep 17 00:00:00 2001
From: Anatoly Trosinenko
Date: Tue, 18 Mar 2025 21:32:11 +0300
Subject: [PATCH] [BOLT] Gadget scanner: detect non-protected indirect calls
---
bolt/include/bolt/Core/MCPlusBuilder.h| 10 +
bolt/lib/Passes/PAuthGadgetScanner.cpp| 33 +-
.../Target/AArch64/AArch64MCPlusBuilder.cpp | 42 ++
.../binary-analysis/AArch64/gs-pauth-calls.s | 676 ++
.../AArch64/gs-pauth-debug-output.s | 49 +-
5 files changed, 796 insertions(+), 14 deletions(-)
create mode 100644 bolt/test/binary-analysis/AArch64/gs-pauth-calls.s
diff --git a/bolt/include/bolt/Core/MCPlusBuilder.h
b/bolt/include/bolt/Core/MCPlusBuilder.h
index 76ea2489e7038..b3d54ccd5955d 100644
--- a/bolt/include/bolt/Core/MCPlusBuilder.h
+++ b/bolt/include/bolt/Core/MCPlusBuilder.h
@@ -577,6 +577,16 @@ class MCPlusBuilder {
return getNoRegister();
}
+ /// Returns the register used as call destination, or no-register, if not
+ /// an indirect call. Sets IsAuthenticatedInternally if the instruction
+ /// accepts signed pointer as its operand and authenticates it internally.
+ virtual MCPhysReg
+ getRegUsedAsCallDest(const MCInst &Inst,
+ bool &IsAuthenticatedInternally) const {
+llvm_unreachable("not implemented");
+return getNoRegister();
+ }
+
virtual bool isTerminator(const MCInst &Inst) const;
virtual bool isNoop(const MCInst &Inst) const {
diff --git a/bolt/lib/Passes/PAuthGadgetScanner.cpp
b/bolt/lib/Passes/PAuthGadgetScanner.cpp
index 5269710e1c995..08b55bb55d0dc 100644
--- a/bolt/lib/Passes/PAuthGadgetScanner.cpp
+++ b/bolt/lib/Passes/PAuthGadgetScanner.cpp
@@ -382,11 +382,11 @@ class PacRetAnalysis
public:
std::vector
- getLastClobberingInsts(const MCInst Ret, BinaryFunction &BF,
- const ArrayRef UsedDirtyRegs) const {
+ getLastClobberingInsts(const MCInst &Inst, BinaryFunction &BF,
+ const ArrayRef UsedDirtyRegs) {
if (RegsToTrackInstsFor.empty())
return {};
-auto MaybeState = getStateAt(Ret);
+auto MaybeState = getStateBefore(Inst);
if (!MaybeState)
llvm_unreachable("Expected State to be present");
const State &S = *MaybeState;
@@ -434,6 +434,29 @@ shouldReportReturnGadget(const BinaryContext &BC, const
MCInstReference &Inst,
return std::make_shared(RetKind, Inst, RetReg);
}
+static std::shared_ptr
+shouldReportCallGadget(const BinaryContext &BC, const MCInstReference &Inst,
+ const State &S) {
+ static const GadgetKind CallKind("non-protected call found");
+ if (!BC.MIB->isCall(Inst) && !BC.MIB->isBranch(Inst))
+return nullptr;
+
+ bool IsAuthenticated = false;
+ MCPhysReg DestReg = BC.MIB->getRegUsedAsCallDest(Inst, IsAuthenticated);
+ if (IsAuthenticated || DestReg == BC.MIB->getNoRegister())
+return nullptr;
+
+ LLVM_DEBUG({
+traceInst(BC, "Found call inst", Inst);
+traceReg(BC, "Call destination reg", DestReg);
+traceRegMask(BC, "SafeToDerefRegs", S.SafeToDerefRegs);
+ });
+ if (S.SafeToDerefRegs[DestReg])
+return nullptr;
+
+ return std::make_shared(CallKind, Inst, DestReg);
+}
+
FunctionAnalysisResult
Analysis::findGadgets(BinaryFunction &BF,
MCPlusBuilder::AllocatorIdTy AllocatorId) {
@@ -450,10 +473,12 @@ Analysis::findGadgets(BinaryFunction &BF,
for (BinaryBasicBlock &BB : BF) {
for (int64_t I = 0, E = BB.size(); I < E; ++I) {
MCInstReference Inst(&BB, I);
- const State &S = *PRA.getStateAt(Inst);
+ const State &S = *PRA.getStateBefore(Inst);
if (auto Report = shouldReportReturnGadget(BC, Inst, S))
Result.Diagnostics.push_back(Report);
+ if (auto Report = shouldReportCallGadget(BC, Inst, S))
+Result.Diagnostics.push_back(Report);
}
}
return Result;
diff --git a/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
b/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
index d238a1df5c7d7..9ce1514639f95 100644
--- a/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
+++ b/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
@@ -277,6 +277,48 @@ class AArch64MCPlusBuilder : public MCPlusBuilder {
}
}
+ MCPhysReg
+ getRegUsedAsCallDest(const MCInst &Inst,
+ bool &IsAuthenticatedInternally) const override {
+assert(isCall(Inst) || isBranch(Inst));
+IsAuthenticatedInternally = false;
+
+switch (Inst.getOpcode()) {
+case AArch64::B:
+case AArch64::BL:
+ assert(Inst.getOperand(0).isExpr());
+ return getNoRegister();
+case AArch64::Bcc:
+case AArch64::CBNZW:
+case AArch64::CBNZX:
+case AArch64::CBZW:
+case AArch64::CBZX:
+ assert(Inst.getOperand(1).isExpr());
+ return getNoRegister();
+case AArch64::TBNZW:
+case AArch64::TBNZX:
+case AArch64::TBZW:
+
[llvm-branch-commits] [llvm] [BOLT] Gadget scanner: reformulate the state for data-flow analysis (PR #131898)
https://github.com/atrosinenko updated
https://github.com/llvm/llvm-project/pull/131898
>From 479bf6822797ba5e65b1697d9b7ff065014205a4 Mon Sep 17 00:00:00 2001
From: Anatoly Trosinenko
Date: Mon, 17 Mar 2025 22:27:53 +0300
Subject: [PATCH] [BOLT] Gadget scanner: reformulate the state for data-flow
analysis
In preparation for implementing support for detection of non-protected
call instructions, refine the definition of state which is computed for
each register by data-flow analysis.
Explicitly marking the registers which are known to be trusted at
function entry is crucial for finding non-protected calls. In addition,
it fixes less-common false negatives for pac-ret, such as `ret x1` in
`f_nonx30_ret_non_auted` test case.
---
bolt/include/bolt/Core/MCPlusBuilder.h| 10 ++
bolt/include/bolt/Passes/PAuthGadgetScanner.h | 7 +-
bolt/lib/Passes/PAuthGadgetScanner.cpp| 129 +++---
.../Target/AArch64/AArch64MCPlusBuilder.cpp | 4 +
.../AArch64/gs-pacret-autiasp.s | 19 ++-
.../AArch64/gs-pacret-multi-bb.s | 3 +-
.../AArch64/gs-pauth-debug-output.s | 72 +-
7 files changed, 139 insertions(+), 105 deletions(-)
diff --git a/bolt/include/bolt/Core/MCPlusBuilder.h
b/bolt/include/bolt/Core/MCPlusBuilder.h
index b285138b77fe7..76ea2489e7038 100644
--- a/bolt/include/bolt/Core/MCPlusBuilder.h
+++ b/bolt/include/bolt/Core/MCPlusBuilder.h
@@ -551,6 +551,16 @@ class MCPlusBuilder {
return Analysis->isReturn(Inst);
}
+ /// Returns the registers that are trusted at function entry.
+ ///
+ /// Each register should be treated as if a successfully authenticated
+ /// pointer was written to it before entering the function (i.e. the
+ /// pointer is safe to jump to as well as to be signed).
+ virtual SmallVector getTrustedLiveInRegs() const {
+llvm_unreachable("not implemented");
+return {};
+ }
+
virtual ErrorOr getAuthenticatedReg(const MCInst &Inst) const {
llvm_unreachable("not implemented");
return getNoRegister();
diff --git a/bolt/include/bolt/Passes/PAuthGadgetScanner.h
b/bolt/include/bolt/Passes/PAuthGadgetScanner.h
index 1a8abffa09c46..700059b814ab9 100644
--- a/bolt/include/bolt/Passes/PAuthGadgetScanner.h
+++ b/bolt/include/bolt/Passes/PAuthGadgetScanner.h
@@ -212,7 +212,7 @@ struct GadgetReport : public Report {
// The particular kind of gadget that is detected.
const GadgetKind &Kind;
// The set of registers related to this gadget report (possibly empty).
- SmallVector AffectedRegisters;
+ SmallVector AffectedRegisters;
// The instructions that clobber the affected registers.
// There is no one-to-one correspondence with AffectedRegisters: for example,
// the same register can be overwritten by different instructions in
different
@@ -220,9 +220,8 @@ struct GadgetReport : public Report {
SmallVector OverwritingInstrs;
GadgetReport(const GadgetKind &Kind, MCInstReference Location,
- const BitVector &AffectedRegisters)
- : Report(Location), Kind(Kind),
-AffectedRegisters(AffectedRegisters.set_bits()) {}
+ MCPhysReg AffectedRegister)
+ : Report(Location), Kind(Kind), AffectedRegisters({AffectedRegister}) {}
void generateReport(raw_ostream &OS, const BinaryContext &BC) const override;
diff --git a/bolt/lib/Passes/PAuthGadgetScanner.cpp
b/bolt/lib/Passes/PAuthGadgetScanner.cpp
index 84c209ac838f8..5269710e1c995 100644
--- a/bolt/lib/Passes/PAuthGadgetScanner.cpp
+++ b/bolt/lib/Passes/PAuthGadgetScanner.cpp
@@ -126,18 +126,16 @@ class TrackedRegisters {
// The security property that is checked is:
// When a register is used as the address to jump to in a return instruction,
-// that register must either:
-// (a) never be changed within this function, i.e. have the same value as when
-// the function started, or
+// that register must be safe-to-dereference. It must either
+// (a) be safe-to-dereference at function entry and never be changed within
this
+// function, i.e. have the same value as when the function started, or
// (b) the last write to the register must be by an authentication instruction.
// This property is checked by using dataflow analysis to keep track of which
-// registers have been written (def-ed), since last authenticated. Those are
-// exactly the registers containing values that should not be trusted (as they
-// could have changed since the last time they were authenticated). For
pac-ret,
-// any return instruction using such a register is a gadget to be reported. For
-// PAuthABI, probably at least any indirect control flow using such a register
-// should be reported.
+// registers have been written (def-ed), since last authenticated. For pac-ret,
+// any return instruction using a register which is not safe-to-dereference is
+// a gadget to be reported. For PAuthABI, probably at least any indirect
control
+// flow using such a register should be reported.
// Fu
[llvm-branch-commits] [llvm] [BOLT] Gadget scanner: detect non-protected indirect calls (PR #131899)
https://github.com/atrosinenko updated
https://github.com/llvm/llvm-project/pull/131899
>From bbb379d74e59fc4409de1a94b4e0698de684b6a1 Mon Sep 17 00:00:00 2001
From: Anatoly Trosinenko
Date: Tue, 18 Mar 2025 21:32:11 +0300
Subject: [PATCH] [BOLT] Gadget scanner: detect non-protected indirect calls
---
bolt/include/bolt/Core/MCPlusBuilder.h| 10 +
bolt/lib/Passes/PAuthGadgetScanner.cpp| 33 +-
.../Target/AArch64/AArch64MCPlusBuilder.cpp | 42 ++
.../binary-analysis/AArch64/gs-pauth-calls.s | 676 ++
.../AArch64/gs-pauth-debug-output.s | 49 +-
5 files changed, 796 insertions(+), 14 deletions(-)
create mode 100644 bolt/test/binary-analysis/AArch64/gs-pauth-calls.s
diff --git a/bolt/include/bolt/Core/MCPlusBuilder.h
b/bolt/include/bolt/Core/MCPlusBuilder.h
index 76ea2489e7038..b3d54ccd5955d 100644
--- a/bolt/include/bolt/Core/MCPlusBuilder.h
+++ b/bolt/include/bolt/Core/MCPlusBuilder.h
@@ -577,6 +577,16 @@ class MCPlusBuilder {
return getNoRegister();
}
+ /// Returns the register used as call destination, or no-register, if not
+ /// an indirect call. Sets IsAuthenticatedInternally if the instruction
+ /// accepts signed pointer as its operand and authenticates it internally.
+ virtual MCPhysReg
+ getRegUsedAsCallDest(const MCInst &Inst,
+ bool &IsAuthenticatedInternally) const {
+llvm_unreachable("not implemented");
+return getNoRegister();
+ }
+
virtual bool isTerminator(const MCInst &Inst) const;
virtual bool isNoop(const MCInst &Inst) const {
diff --git a/bolt/lib/Passes/PAuthGadgetScanner.cpp
b/bolt/lib/Passes/PAuthGadgetScanner.cpp
index 5269710e1c995..08b55bb55d0dc 100644
--- a/bolt/lib/Passes/PAuthGadgetScanner.cpp
+++ b/bolt/lib/Passes/PAuthGadgetScanner.cpp
@@ -382,11 +382,11 @@ class PacRetAnalysis
public:
std::vector
- getLastClobberingInsts(const MCInst Ret, BinaryFunction &BF,
- const ArrayRef UsedDirtyRegs) const {
+ getLastClobberingInsts(const MCInst &Inst, BinaryFunction &BF,
+ const ArrayRef UsedDirtyRegs) {
if (RegsToTrackInstsFor.empty())
return {};
-auto MaybeState = getStateAt(Ret);
+auto MaybeState = getStateBefore(Inst);
if (!MaybeState)
llvm_unreachable("Expected State to be present");
const State &S = *MaybeState;
@@ -434,6 +434,29 @@ shouldReportReturnGadget(const BinaryContext &BC, const
MCInstReference &Inst,
return std::make_shared(RetKind, Inst, RetReg);
}
+static std::shared_ptr
+shouldReportCallGadget(const BinaryContext &BC, const MCInstReference &Inst,
+ const State &S) {
+ static const GadgetKind CallKind("non-protected call found");
+ if (!BC.MIB->isCall(Inst) && !BC.MIB->isBranch(Inst))
+return nullptr;
+
+ bool IsAuthenticated = false;
+ MCPhysReg DestReg = BC.MIB->getRegUsedAsCallDest(Inst, IsAuthenticated);
+ if (IsAuthenticated || DestReg == BC.MIB->getNoRegister())
+return nullptr;
+
+ LLVM_DEBUG({
+traceInst(BC, "Found call inst", Inst);
+traceReg(BC, "Call destination reg", DestReg);
+traceRegMask(BC, "SafeToDerefRegs", S.SafeToDerefRegs);
+ });
+ if (S.SafeToDerefRegs[DestReg])
+return nullptr;
+
+ return std::make_shared(CallKind, Inst, DestReg);
+}
+
FunctionAnalysisResult
Analysis::findGadgets(BinaryFunction &BF,
MCPlusBuilder::AllocatorIdTy AllocatorId) {
@@ -450,10 +473,12 @@ Analysis::findGadgets(BinaryFunction &BF,
for (BinaryBasicBlock &BB : BF) {
for (int64_t I = 0, E = BB.size(); I < E; ++I) {
MCInstReference Inst(&BB, I);
- const State &S = *PRA.getStateAt(Inst);
+ const State &S = *PRA.getStateBefore(Inst);
if (auto Report = shouldReportReturnGadget(BC, Inst, S))
Result.Diagnostics.push_back(Report);
+ if (auto Report = shouldReportCallGadget(BC, Inst, S))
+Result.Diagnostics.push_back(Report);
}
}
return Result;
diff --git a/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
b/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
index d238a1df5c7d7..9ce1514639f95 100644
--- a/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
+++ b/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
@@ -277,6 +277,48 @@ class AArch64MCPlusBuilder : public MCPlusBuilder {
}
}
+ MCPhysReg
+ getRegUsedAsCallDest(const MCInst &Inst,
+ bool &IsAuthenticatedInternally) const override {
+assert(isCall(Inst) || isBranch(Inst));
+IsAuthenticatedInternally = false;
+
+switch (Inst.getOpcode()) {
+case AArch64::B:
+case AArch64::BL:
+ assert(Inst.getOperand(0).isExpr());
+ return getNoRegister();
+case AArch64::Bcc:
+case AArch64::CBNZW:
+case AArch64::CBNZX:
+case AArch64::CBZW:
+case AArch64::CBZX:
+ assert(Inst.getOperand(1).isExpr());
+ return getNoRegister();
+case AArch64::TBNZW:
+case AArch64::TBNZX:
+case AArch64::TBZW:
+
[llvm-branch-commits] [lld] release/20.x: [LLD] [COFF] Add a few more mingw libs to skip autoexports for (#132289) (PR #132478)
https://github.com/cjacek approved this pull request. https://github.com/llvm/llvm-project/pull/132478 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lld] release/20.x: [LLD] [COFF] Add a few more mingw libs to skip autoexports for (#132289) (PR #132478)
llvmbot wrote: @cjacek What do you think about merging this PR to the release branch? https://github.com/llvm/llvm-project/pull/132478 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lld] release/20.x: [LLD] [COFF] Add a few more mingw libs to skip autoexports for (#132289) (PR #132478)
https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/132478 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [clang-tools-extra] [lldb] [clang] Template Specialization Resugaring - TypeDecl (PR #132441)
https://github.com/mizvekov updated
https://github.com/llvm/llvm-project/pull/132441
>From 4571fada1ea055a845bf5c4eb3d1a20904f768c6 Mon Sep 17 00:00:00 2001
From: Matheus Izvekov
Date: Mon, 30 May 2022 01:46:31 +0200
Subject: [PATCH] [clang] Template Specialization Resugaring - TypeDecl
This is the introductory patch for a larger work which
intends to solve the long standing C++ issue with losing
type sugar when acessing template specializations.
The well known example here is specializing a template
with `std::string`, but getting diagnostics related to
`std::basic_string` instead.
This implements a transform which, upon member access,
propagates type sugar from the naming context into the
accessed entity.
It also implements a single use of this transform,
resugaring access to TypeDecls.
For more details and discussion see:
https://discourse.llvm.org/t/rfc-improving-diagnostics-with-template-specialization-resugaring/64294
This is ready for review, although maybe not finished and
there is some more stuff that could be done either here
or in follow ups.
* Its worth exploring if a global resugaring cache is
worthwhile, besides the current operational cache.
A global cache would be more expensive to index, so there
is a tradeoff, and maybe should be used of the whole
result of the operation, while keeping the existing
cache for sub-results.
* It would be ideal if the transform could live in ASTContext
instead of Sema. There are a few dependencies that would
have to be tackled.
* Template arguments deduced for partial specializations.
* Some kinds of type adjustments currently require Sema.
Differential Revision: https://reviews.llvm.org/D127695
---
.../readability/QualifiedAutoCheck.cpp| 2 +-
clang/include/clang/AST/ASTContext.h | 13 +-
clang/include/clang/AST/Type.h| 11 +-
clang/include/clang/Sema/Sema.h | 8 +-
clang/lib/AST/ASTContext.cpp | 17 +-
clang/lib/Sema/SemaCXXScopeSpec.cpp | 5 +-
clang/lib/Sema/SemaCoroutine.cpp | 1 +
clang/lib/Sema/SemaDecl.cpp | 9 +-
clang/lib/Sema/SemaDeclCXX.cpp| 2 +-
clang/lib/Sema/SemaTemplate.cpp | 722 +-
clang/lib/Sema/SemaTemplateDeduction.cpp | 6 +-
clang/lib/Sema/SemaType.cpp | 10 +-
...openmp-begin-declare-variant_reference.cpp | 8 +-
clang/test/AST/ast-dump-template-name.cpp | 7 +-
clang/test/CXX/temp/temp.param/p15-cxx0x.cpp | 4 +-
clang/test/Sema/Resugar/resugar-types.cpp | 209 +
.../iterator/TestIteratorFromStdModule.py | 6 +-
17 files changed, 989 insertions(+), 51 deletions(-)
create mode 100644 clang/test/Sema/Resugar/resugar-types.cpp
diff --git a/clang-tools-extra/clang-tidy/readability/QualifiedAutoCheck.cpp
b/clang-tools-extra/clang-tidy/readability/QualifiedAutoCheck.cpp
index e843c593a92cc..679fbd75d2479 100644
--- a/clang-tools-extra/clang-tidy/readability/QualifiedAutoCheck.cpp
+++ b/clang-tools-extra/clang-tidy/readability/QualifiedAutoCheck.cpp
@@ -126,7 +126,7 @@ void QualifiedAutoCheck::registerMatchers(MatchFinder
*Finder) {
auto UnlessFunctionType =
unless(hasUnqualifiedDesugaredType(functionType()));
auto IsAutoDeducedToPointer = [](const auto &...InnerMatchers) {
return autoType(hasDeducedType(
-hasUnqualifiedDesugaredType(pointerType(pointee(InnerMatchers...);
+hasCanonicalType(pointerType(pointee(InnerMatchers...);
};
Finder->addMatcher(
diff --git a/clang/include/clang/AST/ASTContext.h
b/clang/include/clang/AST/ASTContext.h
index ef596f99262be..23d789d8466d3 100644
--- a/clang/include/clang/AST/ASTContext.h
+++ b/clang/include/clang/AST/ASTContext.h
@@ -1319,8 +1319,6 @@ class ASTContext : public RefCountedBase {
QualType getTypeDeclTypeSlow(const TypeDecl *Decl) const;
- QualType getPipeType(QualType T, bool ReadOnly) const;
-
public:
/// Return the uniqued reference to the type for an address space
/// qualified type with the specified type and address space.
@@ -1500,6 +1498,9 @@ class ASTContext : public RefCountedBase {
/// blocks.
QualType getBlockDescriptorType() const;
+ // Return a pipe type for the specified type.
+ QualType getPipeType(QualType T, bool ReadOnly) const;
+
/// Return a read_only pipe type for the specified type.
QualType getReadPipeType(QualType T) const;
@@ -1901,10 +1902,10 @@ class ASTContext : public RefCountedBase {
/// C++11 decltype.
QualType getDecltypeType(Expr *e, QualType UnderlyingType) const;
- QualType getPackIndexingType(QualType Pattern, Expr *IndexExpr,
- bool FullySubstituted = false,
- ArrayRef Expansions = {},
- int Index = -1) const;
+ QualType getPackIndexingType(
+ QualType Pattern, Expr *IndexExpr, bool FullySubstituted = false,
+ ArrayRef Expans
[llvm-branch-commits] [clang] [clang] resugar decltype of DeclRefExpr (PR #132447)
https://github.com/mizvekov updated
https://github.com/llvm/llvm-project/pull/132447
>From 29cc63d882332f4c476388a8817def7de564ad4b Mon Sep 17 00:00:00 2001
From: Matheus Izvekov
Date: Fri, 14 Mar 2025 19:41:38 -0300
Subject: [PATCH] [clang] resugar decltype of DeclRefExpr
This keeps around the resugared DeclType for DeclRefExpr,
which is otherwise partially lost as the expression type
removes top level references.
This helps 'decltype' resugaring work without any loss
of information.
---
clang/include/clang/AST/Expr.h| 32 +++--
clang/include/clang/AST/Stmt.h| 2 +
clang/include/clang/Sema/Sema.h | 20 +++---
clang/lib/AST/ASTImporter.cpp | 3 +-
clang/lib/AST/Expr.cpp| 82 +++
clang/lib/CodeGen/CGExpr.cpp | 4 +-
clang/lib/Sema/SemaChecking.cpp | 3 +-
clang/lib/Sema/SemaDeclCXX.cpp| 19 +++---
clang/lib/Sema/SemaExpr.cpp | 81 +++---
clang/lib/Sema/SemaOpenMP.cpp | 11 ++-
clang/lib/Sema/SemaOverload.cpp | 25 ---
clang/lib/Sema/SemaSYCL.cpp | 2 +-
clang/lib/Sema/SemaTemplate.cpp | 13
clang/lib/Sema/SemaType.cpp | 9 ++-
clang/lib/Sema/TreeTransform.h| 5 +-
clang/lib/Serialization/ASTReaderStmt.cpp | 8 ++-
clang/lib/Serialization/ASTWriterStmt.cpp | 6 +-
clang/test/Sema/Resugar/resugar-expr.cpp | 6 +-
18 files changed, 201 insertions(+), 130 deletions(-)
diff --git a/clang/include/clang/AST/Expr.h b/clang/include/clang/AST/Expr.h
index 2ba787ac6df55..e92f6696027f9 100644
--- a/clang/include/clang/AST/Expr.h
+++ b/clang/include/clang/AST/Expr.h
@@ -1266,7 +1266,7 @@ class DeclRefExpr final
: public Expr,
private llvm::TrailingObjects {
+TemplateArgumentLoc, QualType> {
friend class ASTStmtReader;
friend class ASTStmtWriter;
friend TrailingObjects;
@@ -1292,17 +1292,27 @@ class DeclRefExpr final
return hasTemplateKWAndArgsInfo();
}
+ size_t numTrailingObjects(OverloadToken) const {
+return getNumTemplateArgs();
+ }
+
+ size_t numTrailingObjects(OverloadToken) const {
+return HasResugaredDeclType();
+ }
+
/// Test whether there is a distinct FoundDecl attached to the end of
/// this DRE.
bool hasFoundDecl() const { return DeclRefExprBits.HasFoundDecl; }
+ static bool needsDeclTypeStorage(ValueDecl *VD, QualType DeclType);
+
DeclRefExpr(const ASTContext &Ctx, NestedNameSpecifierLoc QualifierLoc,
SourceLocation TemplateKWLoc, ValueDecl *D,
bool RefersToEnclosingVariableOrCapture,
const DeclarationNameInfo &NameInfo, NamedDecl *FoundD,
const TemplateArgumentListInfo *TemplateArgs,
const TemplateArgumentList *ConvertedArgs, QualType T,
- ExprValueKind VK, NonOdrUseReason NOUR);
+ ExprValueKind VK, QualType DeclType, NonOdrUseReason NOUR);
/// Construct an empty declaration reference expression.
explicit DeclRefExpr(EmptyShell Empty) : Expr(DeclRefExprClass, Empty) {}
@@ -1318,7 +1328,8 @@ class DeclRefExpr final
Create(const ASTContext &Context, NestedNameSpecifierLoc QualifierLoc,
SourceLocation TemplateKWLoc, ValueDecl *D,
bool RefersToEnclosingVariableOrCapture, SourceLocation NameLoc,
- QualType T, ExprValueKind VK, NamedDecl *FoundD = nullptr,
+ QualType T, ExprValueKind VK, QualType DeclType = QualType(),
+ NamedDecl *FoundD = nullptr,
const TemplateArgumentListInfo *TemplateArgs = nullptr,
const TemplateArgumentList *ConvertedArgs = nullptr,
NonOdrUseReason NOUR = NOUR_None);
@@ -1328,7 +1339,7 @@ class DeclRefExpr final
SourceLocation TemplateKWLoc, ValueDecl *D,
bool RefersToEnclosingVariableOrCapture,
const DeclarationNameInfo &NameInfo, QualType T, ExprValueKind VK,
- NamedDecl *FoundD = nullptr,
+ QualType DeclType = QualType(), NamedDecl *FoundD = nullptr,
const TemplateArgumentListInfo *TemplateArgs = nullptr,
const TemplateArgumentList *ConvertedArgs = nullptr,
NonOdrUseReason NOUR = NOUR_None);
@@ -1337,11 +1348,22 @@ class DeclRefExpr final
static DeclRefExpr *CreateEmpty(const ASTContext &Context, bool HasQualifier,
bool HasFoundDecl,
bool HasTemplateKWAndArgsInfo,
- unsigned NumTemplateArgs);
+ unsigned NumTemplateArgs,
+ bool HasResugaredDeclType);
ValueDecl *getDecl() { return D; }
const ValueDecl *getDecl() const { return D; }
void setDecl(ValueDecl *NewD);
+ void recomputeDependency();
+
+ bool HasResugaredDeclType() const {
+return DeclRefExprBits.HasResugaredDeclType;
+ }
+ QualType getDeclTyp
[llvm-branch-commits] [llvm] [BOLT] Gadget scanner: detect non-protected indirect calls (PR #131899)
https://github.com/atrosinenko updated
https://github.com/llvm/llvm-project/pull/131899
>From bbb379d74e59fc4409de1a94b4e0698de684b6a1 Mon Sep 17 00:00:00 2001
From: Anatoly Trosinenko
Date: Tue, 18 Mar 2025 21:32:11 +0300
Subject: [PATCH] [BOLT] Gadget scanner: detect non-protected indirect calls
---
bolt/include/bolt/Core/MCPlusBuilder.h| 10 +
bolt/lib/Passes/PAuthGadgetScanner.cpp| 33 +-
.../Target/AArch64/AArch64MCPlusBuilder.cpp | 42 ++
.../binary-analysis/AArch64/gs-pauth-calls.s | 676 ++
.../AArch64/gs-pauth-debug-output.s | 49 +-
5 files changed, 796 insertions(+), 14 deletions(-)
create mode 100644 bolt/test/binary-analysis/AArch64/gs-pauth-calls.s
diff --git a/bolt/include/bolt/Core/MCPlusBuilder.h
b/bolt/include/bolt/Core/MCPlusBuilder.h
index 76ea2489e7038..b3d54ccd5955d 100644
--- a/bolt/include/bolt/Core/MCPlusBuilder.h
+++ b/bolt/include/bolt/Core/MCPlusBuilder.h
@@ -577,6 +577,16 @@ class MCPlusBuilder {
return getNoRegister();
}
+ /// Returns the register used as call destination, or no-register, if not
+ /// an indirect call. Sets IsAuthenticatedInternally if the instruction
+ /// accepts signed pointer as its operand and authenticates it internally.
+ virtual MCPhysReg
+ getRegUsedAsCallDest(const MCInst &Inst,
+ bool &IsAuthenticatedInternally) const {
+llvm_unreachable("not implemented");
+return getNoRegister();
+ }
+
virtual bool isTerminator(const MCInst &Inst) const;
virtual bool isNoop(const MCInst &Inst) const {
diff --git a/bolt/lib/Passes/PAuthGadgetScanner.cpp
b/bolt/lib/Passes/PAuthGadgetScanner.cpp
index 5269710e1c995..08b55bb55d0dc 100644
--- a/bolt/lib/Passes/PAuthGadgetScanner.cpp
+++ b/bolt/lib/Passes/PAuthGadgetScanner.cpp
@@ -382,11 +382,11 @@ class PacRetAnalysis
public:
std::vector
- getLastClobberingInsts(const MCInst Ret, BinaryFunction &BF,
- const ArrayRef UsedDirtyRegs) const {
+ getLastClobberingInsts(const MCInst &Inst, BinaryFunction &BF,
+ const ArrayRef UsedDirtyRegs) {
if (RegsToTrackInstsFor.empty())
return {};
-auto MaybeState = getStateAt(Ret);
+auto MaybeState = getStateBefore(Inst);
if (!MaybeState)
llvm_unreachable("Expected State to be present");
const State &S = *MaybeState;
@@ -434,6 +434,29 @@ shouldReportReturnGadget(const BinaryContext &BC, const
MCInstReference &Inst,
return std::make_shared(RetKind, Inst, RetReg);
}
+static std::shared_ptr
+shouldReportCallGadget(const BinaryContext &BC, const MCInstReference &Inst,
+ const State &S) {
+ static const GadgetKind CallKind("non-protected call found");
+ if (!BC.MIB->isCall(Inst) && !BC.MIB->isBranch(Inst))
+return nullptr;
+
+ bool IsAuthenticated = false;
+ MCPhysReg DestReg = BC.MIB->getRegUsedAsCallDest(Inst, IsAuthenticated);
+ if (IsAuthenticated || DestReg == BC.MIB->getNoRegister())
+return nullptr;
+
+ LLVM_DEBUG({
+traceInst(BC, "Found call inst", Inst);
+traceReg(BC, "Call destination reg", DestReg);
+traceRegMask(BC, "SafeToDerefRegs", S.SafeToDerefRegs);
+ });
+ if (S.SafeToDerefRegs[DestReg])
+return nullptr;
+
+ return std::make_shared(CallKind, Inst, DestReg);
+}
+
FunctionAnalysisResult
Analysis::findGadgets(BinaryFunction &BF,
MCPlusBuilder::AllocatorIdTy AllocatorId) {
@@ -450,10 +473,12 @@ Analysis::findGadgets(BinaryFunction &BF,
for (BinaryBasicBlock &BB : BF) {
for (int64_t I = 0, E = BB.size(); I < E; ++I) {
MCInstReference Inst(&BB, I);
- const State &S = *PRA.getStateAt(Inst);
+ const State &S = *PRA.getStateBefore(Inst);
if (auto Report = shouldReportReturnGadget(BC, Inst, S))
Result.Diagnostics.push_back(Report);
+ if (auto Report = shouldReportCallGadget(BC, Inst, S))
+Result.Diagnostics.push_back(Report);
}
}
return Result;
diff --git a/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
b/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
index d238a1df5c7d7..9ce1514639f95 100644
--- a/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
+++ b/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
@@ -277,6 +277,48 @@ class AArch64MCPlusBuilder : public MCPlusBuilder {
}
}
+ MCPhysReg
+ getRegUsedAsCallDest(const MCInst &Inst,
+ bool &IsAuthenticatedInternally) const override {
+assert(isCall(Inst) || isBranch(Inst));
+IsAuthenticatedInternally = false;
+
+switch (Inst.getOpcode()) {
+case AArch64::B:
+case AArch64::BL:
+ assert(Inst.getOperand(0).isExpr());
+ return getNoRegister();
+case AArch64::Bcc:
+case AArch64::CBNZW:
+case AArch64::CBNZX:
+case AArch64::CBZW:
+case AArch64::CBZX:
+ assert(Inst.getOperand(1).isExpr());
+ return getNoRegister();
+case AArch64::TBNZW:
+case AArch64::TBNZX:
+case AArch64::TBZW:
+
[llvm-branch-commits] [clang] [clang-tools-extra] [lldb] [clang] Template Specialization Resugaring - TypeDecl (PR #132441)
https://github.com/mizvekov created
https://github.com/llvm/llvm-project/pull/132441
This is the introductory patch for a larger work which intends to solve the
long standing C++ issue with losing type sugar when acessing template
specializations.
The well known example here is specializing a template with `std::string`, but
getting diagnostics related to `std::basic_string` instead.
This implements a transform which, upon member access, propagates type sugar
from the naming context into the accessed entity.
It also implements a single use of this transform, resugaring access to
TypeDecls.
For more details and discussion see:
https://discourse.llvm.org/t/rfc-improving-diagnostics-with-template-specialization-resugaring/64294
Even though this patch is ready for review, some dependent patches are not, and
might not be ready for some time.
There is some more stuff that could be done either here or in follow ups:
* Its worth exploring if a global resugaring cache is worthwhile, besides the
current operational cache. A global cache would be more expensive to index, so
there is a tradeoff, and maybe should be used of the whole result of the
operation, while keeping the existing cache for sub-results.
* It would be ideal if the transform could live in ASTContext instead of Sema.
There are a few dependencies that would have to be tackled.
* Template arguments deduced for partial specializations.
* Some kinds of type adjustments currently require Sema.
Differential Revision: https://reviews.llvm.org/D127695
>From e621da3ff081f9efee76ed83b1a21627e0904ed0 Mon Sep 17 00:00:00 2001
From: Matheus Izvekov
Date: Mon, 30 May 2022 01:46:31 +0200
Subject: [PATCH] [clang] Template Specialization Resugaring - TypeDecl
This is the introductory patch for a larger work which
intends to solve the long standing C++ issue with losing
type sugar when acessing template specializations.
The well known example here is specializing a template
with `std::string`, but getting diagnostics related to
`std::basic_string` instead.
This implements a transform which, upon member access,
propagates type sugar from the naming context into the
accessed entity.
It also implements a single use of this transform,
resugaring access to TypeDecls.
For more details and discussion see:
https://discourse.llvm.org/t/rfc-improving-diagnostics-with-template-specialization-resugaring/64294
This is ready for review, although maybe not finished and
there is some more stuff that could be done either here
or in follow ups.
* Its worth exploring if a global resugaring cache is
worthwhile, besides the current operational cache.
A global cache would be more expensive to index, so there
is a tradeoff, and maybe should be used of the whole
result of the operation, while keeping the existing
cache for sub-results.
* It would be ideal if the transform could live in ASTContext
instead of Sema. There are a few dependencies that would
have to be tackled.
* Template arguments deduced for partial specializations.
* Some kinds of type adjustments currently require Sema.
Differential Revision: https://reviews.llvm.org/D127695
---
.../readability/QualifiedAutoCheck.cpp| 2 +-
clang/include/clang/AST/ASTContext.h | 13 +-
clang/include/clang/AST/Type.h| 11 +-
clang/include/clang/Sema/Sema.h | 8 +-
clang/lib/AST/ASTContext.cpp | 17 +-
clang/lib/Sema/SemaCXXScopeSpec.cpp | 5 +-
clang/lib/Sema/SemaCoroutine.cpp | 1 +
clang/lib/Sema/SemaDecl.cpp | 9 +-
clang/lib/Sema/SemaDeclCXX.cpp| 2 +-
clang/lib/Sema/SemaTemplate.cpp | 722 +-
clang/lib/Sema/SemaTemplateDeduction.cpp | 6 +-
clang/lib/Sema/SemaType.cpp | 10 +-
...openmp-begin-declare-variant_reference.cpp | 8 +-
clang/test/AST/ast-dump-template-name.cpp | 7 +-
clang/test/CXX/temp/temp.param/p15-cxx0x.cpp | 4 +-
clang/test/Sema/Resugar/resugar-types.cpp | 209 +
.../iterator/TestIteratorFromStdModule.py | 2 +-
17 files changed, 985 insertions(+), 51 deletions(-)
create mode 100644 clang/test/Sema/Resugar/resugar-types.cpp
diff --git a/clang-tools-extra/clang-tidy/readability/QualifiedAutoCheck.cpp
b/clang-tools-extra/clang-tidy/readability/QualifiedAutoCheck.cpp
index e843c593a92cc..679fbd75d2479 100644
--- a/clang-tools-extra/clang-tidy/readability/QualifiedAutoCheck.cpp
+++ b/clang-tools-extra/clang-tidy/readability/QualifiedAutoCheck.cpp
@@ -126,7 +126,7 @@ void QualifiedAutoCheck::registerMatchers(MatchFinder
*Finder) {
auto UnlessFunctionType =
unless(hasUnqualifiedDesugaredType(functionType()));
auto IsAutoDeducedToPointer = [](const auto &...InnerMatchers) {
return autoType(hasDeducedType(
-hasUnqualifiedDesugaredType(pointerType(pointee(InnerMatchers...);
+hasCanonicalType(pointerType(pointee(InnerMatchers...)))
[llvm-branch-commits] [clang] [clang][HeuristicResolver] Default argument heuristic for template parameters (PR #131074)
zyn0217 wrote: @HighCommander4 did you merge it into a wrong branch? https://github.com/llvm/llvm-project/pull/131074 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] 56d7a0a - Revert "[TailDuplicator] Do not restrict the computed gotos (#114990)"
Author: Alexander Kornienko
Date: 2025-03-21T18:25:21+01:00
New Revision: 56d7a0a18c7dcd09ff42c05d847ac5af49c848b5
URL:
https://github.com/llvm/llvm-project/commit/56d7a0a18c7dcd09ff42c05d847ac5af49c848b5
DIFF:
https://github.com/llvm/llvm-project/commit/56d7a0a18c7dcd09ff42c05d847ac5af49c848b5.diff
LOG: Revert "[TailDuplicator] Do not restrict the computed gotos (#114990)"
This reverts commit dd21aacd76e36d4db157a5d7a7b5370d456426e6.
Added:
Modified:
llvm/include/llvm/CodeGen/MachineInstr.h
llvm/lib/CodeGen/TailDuplicator.cpp
Removed:
llvm/test/CodeGen/X86/tail-dup-computed-goto.mir
diff --git a/llvm/include/llvm/CodeGen/MachineInstr.h
b/llvm/include/llvm/CodeGen/MachineInstr.h
index b26cabe801ee8..102b1eb07358e 100644
--- a/llvm/include/llvm/CodeGen/MachineInstr.h
+++ b/llvm/include/llvm/CodeGen/MachineInstr.h
@@ -994,17 +994,8 @@ class MachineInstr
/// Return true if this is an indirect branch, such as a
/// branch through a register.
- bool isIndirectBranch(QueryType Type = AnyInBundle,
-bool IncludeJumpTable = true) const {
-return hasProperty(MCID::IndirectBranch, Type) &&
- (IncludeJumpTable || !llvm::any_of(operands(), [](const auto &Op) {
- return Op.isJTI();
-}));
- }
-
- bool isComputedGoto(QueryType Type = AnyInBundle) const {
-// Jump tables are not considered computed gotos.
-return isIndirectBranch(Type, /*IncludeJumpTable=*/false);
+ bool isIndirectBranch(QueryType Type = AnyInBundle) const {
+return hasProperty(MCID::IndirectBranch, Type);
}
/// Return true if this is a branch which may fall
diff --git a/llvm/lib/CodeGen/TailDuplicator.cpp
b/llvm/lib/CodeGen/TailDuplicator.cpp
index 4a2d1355485da..abca8b76081e7 100644
--- a/llvm/lib/CodeGen/TailDuplicator.cpp
+++ b/llvm/lib/CodeGen/TailDuplicator.cpp
@@ -601,11 +601,8 @@ bool TailDuplicator::shouldTailDuplicate(bool IsSimple,
// that rearrange the predecessors of the indirect branch.
bool HasIndirectbr = false;
- bool HasComputedGoto = false;
- if (!TailBB.empty()) {
+ if (!TailBB.empty())
HasIndirectbr = TailBB.back().isIndirectBranch();
-HasComputedGoto = TailBB.back().isComputedGoto();
- }
if (HasIndirectbr && PreRegAlloc)
MaxDuplicateCount = TailDupIndirectBranchSize;
@@ -663,12 +660,7 @@ bool TailDuplicator::shouldTailDuplicate(bool IsSimple,
// Duplicating a BB which has both multiple predecessors and successors will
// may cause huge amount of PHI nodes. If we want to remove this limitation,
// we have to address https://github.com/llvm/llvm-project/issues/78578.
- // NB. This basically unfactors computed gotos that were factored early on in
- // the compilation process to speed up edge based data flow. If we do not
- // unfactor them again, it can seriously pessimize code with many computed
- // jumps in the source code, such as interpreters. Therefore we do not
- // restrict the computed gotos.
- if (!HasComputedGoto && TailBB.pred_size() > TailDupPredSize &&
+ if (TailBB.pred_size() > TailDupPredSize &&
TailBB.succ_size() > TailDupSuccSize) {
// If TailBB or any of its successors contains a phi, we may have to add a
// large number of additional phis with additional incoming values.
diff --git a/llvm/test/CodeGen/X86/tail-dup-computed-goto.mir
b/llvm/test/CodeGen/X86/tail-dup-computed-goto.mir
deleted file mode 100644
index a472dc67d8d51..0
--- a/llvm/test/CodeGen/X86/tail-dup-computed-goto.mir
+++ /dev/null
@@ -1,255 +0,0 @@
-# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
UTC_ARGS: --version 5
-# RUN: llc -mtriple=x86_64-unknown-linux-gnu -run-pass=early-tailduplication
-tail-dup-pred-size=1 -tail-dup-succ-size=1 %s -o - | FileCheck %s
-# Check that only the computed goto is not be restrict by tail-dup-pred-size
and tail-dup-succ-size.
|
- declare i64 @f0()
- declare i64 @f1()
- declare i64 @f2()
- declare i64 @f3()
- declare i64 @f4()
- declare i64 @f5()
- @computed_goto.dispatch = external global [5 x ptr]
- define void @computed_goto() { ret void }
- define void @jump_table() { ret void }
-...
-name:computed_goto
-tracksRegLiveness: true
-body: |
- ; CHECK-LABEL: name: computed_goto
- ; CHECK: bb.0:
- ; CHECK-NEXT: successors: %bb.1(0x2000), %bb.2(0x2000),
%bb.3(0x2000), %bb.4(0x2000)
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp,
implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
- ; CHECK-NEXT: CALL64pcrel32 target-flags(x86-plt) @f0, csr_64, implicit
$rsp, implicit $ssp, implicit-def $rsp, implicit-def $ssp, implicit-def $rax
- ; CHECK-NEXT: ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def
dead $eflags, implicit-def dead $ssp, implicit $rsp, im
[llvm-branch-commits] [clang] [clang][HeuristicResolver] Default argument heuristic for template parameters (PR #131074)
HighCommander4 wrote: > @HighCommander4 did you merge it into a wrong branch? Oops. I forgot that the patch was stacked on top of another patch for https://github.com/llvm/llvm-project/issues/130468. I will resubmit and reland. https://github.com/llvm/llvm-project/pull/131074 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [CodeGen][StaticDataSplitter]Support constant pool partitioning (PR #129781)
@@ -386,6 +386,16 @@ MCSection *TargetLoweringObjectFile::getSectionForConstant(
return DataSection;
}
+MCSection *TargetLoweringObjectFile::getSectionForConstant(
+const DataLayout &DL, SectionKind Kind, const Constant *C, Align
&Alignment,
+StringRef SectionPrefix) const {
+ // Fallback to `getSectionForConstant` without `SectionPrefix` parameter if
it
+ // is empty.
+ if (SectionPrefix.empty())
mingmingl-llvm wrote:
done.
https://github.com/llvm/llvm-project/pull/129781
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/20.x: [llvm-dlltool] Add a missing dependency (PR #132483)
Martin =?utf-8?q?Storsj=C3=B6?= Message-ID: In-Reply-To: https://github.com/cjacek approved this pull request. https://github.com/llvm/llvm-project/pull/132483 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [CodeGen][StaticDataSplitter]Support constant pool partitioning (PR #129781)
@@ -148,17 +184,9 @@ bool
StaticDataSplitter::partitionStaticDataWithProfiles(MachineFunction &MF) {
if (MJTI->updateJumpTableEntryHotness(JTI, Hotness))
++NumChangedJumpTables;
-} else {
- // Find global variables with local linkage.
- const GlobalVariable *GV =
- getLocalLinkageGlobalVariable(Op.getGlobal());
- // Skip 'special' global variables conservatively because they are
- // often handled specially, and skip those not in static data
- // sections.
- if (!GV || GV->getName().starts_with("llvm.") ||
- !inStaticDataSection(GV, TM))
-continue;
- SDPI->addConstantProfileCount(GV, Count);
+} else if (const Constant *C =
+ getConstant(Op, MF.getTarget(), MF.getConstantPool())) {
+ SDPI->addConstantProfileCount(C, Count);
mingmingl-llvm wrote:
Good question. Or rather, why do StaticDataSplitter pass return 'true' or
'false` to pass manager?
Notably,
1) For the StaticdataSplitter pass, none of the data structures
(MachineJumpTableInfo or immutable pass StaticDataProfileInfoWrapperPass)
touched by this pass are tracked by its mutable, required analysis, and by
definition of pass manager, it means it's _correct_ to say call
[setPreservesAll](https://github.com/llvm/llvm-project/blob/ecaef010f31e2557d94b4d98774ca4b4d5fe2149/llvm/include/llvm/PassAnalysisSupport.h#L129-L130)
for this pass.
2) For faster compile time, we want subsequent passes to reuse analysis result
(of mutable passes) as much as possible rather than re-computing them, since
the analysis result are not mutated by this pass. Also pass manager won't
automatically re-schedule (or re-compute) an immutable pass whether a
transformation pass returns true or false.
I think the return value is mainly for informative purposes. More specifically,
pass manager can dump [2] pass execution history (presumably when people are
debugging something), when
1) `-debug-pass` is specified as `Executions` or higher [1] (e.g., for `opt`,
`llc` or `clang -mllvm -debug-pass=`)
2) a pass return true which makes
`[LocalChanged](https://github.com/llvm/llvm-project/blob/ecaef010f31e2557d94b4d98774ca4b4d5fe2149/llvm/lib/IR/LegacyPassManager.cpp#L1406)`
true,
Upon this comment and discussion, I made two code changes (along with comments)
1) In `getAnalysisUsage` (at line 87 - 97) to call `setPreservesAll()`
2) In `partitionStaticDataWithProfiles`, changed `int NumChangedJumpTables` to
`bool Changed`, and make it track both jump table and constant changes. How
does this look?
[1]
https://github.com/llvm/llvm-project/blob/ecaef010f31e2557d94b4d98774ca4b4d5fe2149/llvm/lib/IR/LegacyPassManager.cpp#L1152-L1153
[2]
https://github.com/llvm/llvm-project/blob/ecaef010f31e2557d94b4d98774ca4b4d5fe2149/llvm/lib/IR/LegacyPassManager.cpp#L1433-L1434
https://github.com/llvm/llvm-project/pull/129781
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[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: add RegBankLegalize rules for AND OR and XOR (PR #132382)
llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Petar Avramovic (petar-avramovic)
Changes
Uniform S1 is lowered to S32.
Divergent S1 is selected as VCC(S1) instruction select will select
SALU instruction based on wavesize (S32 or S64).
S16 are selected as is. There are register classes for vgpr S16.
Since some isel patterns check for sgpr S16 we don't lower to S32.
For 32 and 64 bit types we use B32/B64 rules that cover scalar vector
and pointers types.
SALU B32 and B64 and VALU B32 instructions are available.
Divergent B64 is lowered to B32.
---
Patch is 41.59 KiB, truncated to 20.00 KiB below, full version:
https://github.com/llvm/llvm-project/pull/132382.diff
6 Files Affected:
- (modified) llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp (+13-4)
- (modified) llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp (+9-1)
- (modified) llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h (+2)
- (modified) llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-and.mir (+21-12)
- (modified) llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-or.mir (+40-45)
- (modified) llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-xor.mir (+39-45)
``diff
diff --git a/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
b/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
index e4eaa01951a7f..5dbaa9488d668 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
@@ -219,11 +219,16 @@ void RegBankLegalizeHelper::lower(MachineInstr &MI,
return;
}
case SplitTo32: {
-auto Op1 = B.buildUnmerge(VgprRB_S32, MI.getOperand(1).getReg());
-auto Op2 = B.buildUnmerge(VgprRB_S32, MI.getOperand(2).getReg());
+Register Dst = MI.getOperand(0).getReg();
+LLT Ty = MRI.getType(Dst) == V4S16 ? V2S16 : S32;
+auto Op1 = B.buildUnmerge({VgprRB, Ty}, MI.getOperand(1).getReg());
+auto Op2 = B.buildUnmerge({VgprRB, Ty}, MI.getOperand(2).getReg());
unsigned Opc = MI.getOpcode();
-auto Lo = B.buildInstr(Opc, {VgprRB_S32}, {Op1.getReg(0), Op2.getReg(0)});
-auto Hi = B.buildInstr(Opc, {VgprRB_S32}, {Op1.getReg(1), Op2.getReg(1)});
+auto Flags = MI.getFlags();
+auto Lo = B.buildInstr(Opc, {{VgprRB, Ty}}, {Op1.getReg(0), Op2.getReg(0)},
+ Flags);
+auto Hi = B.buildInstr(Opc, {{VgprRB, Ty}}, {Op1.getReg(1), Op2.getReg(1)},
+ Flags);
B.buildMergeLikeInstr(MI.getOperand(0).getReg(), {Lo, Hi});
MI.eraseFromParent();
break;
@@ -384,6 +389,7 @@ LLT
RegBankLegalizeHelper::getTyFromID(RegBankLLTMappingApplyID ID) {
case UniInVcc:
return LLT::scalar(1);
case Sgpr16:
+ case Vgpr16:
return LLT::scalar(16);
case Sgpr32:
case Sgpr32Trunc:
@@ -503,6 +509,7 @@
RegBankLegalizeHelper::getRegBankFromID(RegBankLLTMappingApplyID ID) {
case Sgpr32AExtBoolInReg:
case Sgpr32SExt:
return SgprRB;
+ case Vgpr16:
case Vgpr32:
case Vgpr64:
case VgprP0:
@@ -546,6 +553,7 @@ void RegBankLegalizeHelper::applyMappingDst(
case SgprP4:
case SgprP5:
case SgprV4S32:
+case Vgpr16:
case Vgpr32:
case Vgpr64:
case VgprP0:
@@ -677,6 +685,7 @@ void RegBankLegalizeHelper::applyMappingSrc(
break;
}
// vgpr scalars, pointers and vectors
+case Vgpr16:
case Vgpr32:
case Vgpr64:
case VgprP0:
diff --git a/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
b/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
index 7959bf30ca27d..96bc969dd1f40 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
@@ -106,6 +106,8 @@ bool matchUniformityAndLLT(Register Reg,
UniformityLLTOpPredicateID UniID,
return MRI.getType(Reg).getSizeInBits() == 512 && MUI.isUniform(Reg);
case DivS1:
return MRI.getType(Reg) == LLT::scalar(1) && MUI.isDivergent(Reg);
+ case DivS16:
+return MRI.getType(Reg) == LLT::scalar(16) && MUI.isDivergent(Reg);
case DivS32:
return MRI.getType(Reg) == LLT::scalar(32) && MUI.isDivergent(Reg);
case DivS64:
@@ -441,6 +443,9 @@ RegBankLegalizeRules::RegBankLegalizeRules(const
GCNSubtarget &_ST,
addRulesForGOpcs({G_XOR, G_OR, G_AND}, StandardB)
.Any({{UniS1}, {{Sgpr32Trunc}, {Sgpr32AExt, Sgpr32AExt}}})
.Any({{DivS1}, {{Vcc}, {Vcc, Vcc}}})
+ .Any({{UniS16}, {{Sgpr16}, {Sgpr16, Sgpr16}}})
+ .Any({{DivS16}, {{Vgpr16}, {Vgpr16, Vgpr16}}})
+ .Uni(B32, {{SgprB32}, {SgprB32, SgprB32}})
.Div(B32, {{VgprB32}, {VgprB32, VgprB32}})
.Uni(B64, {{SgprB64}, {SgprB64, SgprB64}})
.Div(B64, {{VgprB64}, {VgprB64, VgprB64}, SplitTo32});
@@ -483,11 +488,14 @@ RegBankLegalizeRules::RegBankLegalizeRules(const
GCNSubtarget &_ST,
.Div(B32, {{VgprB32}, {Vcc, VgprB32, VgprB32}})
.Uni(B32, {{SgprB32}, {Sgpr32AExtBoolInReg, SgprB32, SgprB32}});
- addRulesForGOpcs({G_ANYEXT}).Any({{UniS32, S16}, {{Sgp
[llvm-branch-commits] [clang] release/20.x: [clang][docs] Move -Wnontrivial-memcall to added flags. (PR #132367)
R-Goc wrote: Not sure about the version check. Should this just be ignored? https://github.com/llvm/llvm-project/pull/132367 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [clang] resugar decltype of MemberExpr (PR #132448)
https://github.com/mizvekov updated
https://github.com/llvm/llvm-project/pull/132448
>From e97d04ecc7c72488f83c5cd63f8ea7f44c2bcf68 Mon Sep 17 00:00:00 2001
From: Matheus Izvekov
Date: Sun, 16 Mar 2025 13:44:04 -0300
Subject: [PATCH] [clang] resugar decltype of MemberExpr
This keeps around the resugared DeclType for MemberExpr,
which is otherwise partially lost as the expression type
removes top level references.
This helps 'decltype' resugaring work without any loss
of information.
---
clang/include/clang/AST/Expr.h| 33 ---
clang/include/clang/AST/Stmt.h| 4 ++
clang/include/clang/Sema/Sema.h | 6 ++-
clang/lib/AST/ASTImporter.cpp | 3 +-
clang/lib/AST/Expr.cpp| 50 ++-
clang/lib/Analysis/BodyFarm.cpp | 2 +-
clang/lib/CodeGen/CGExpr.cpp | 2 +-
clang/lib/Sema/SemaExpr.cpp | 19 +++--
clang/lib/Sema/SemaExprMember.cpp | 25 +++-
clang/lib/Sema/SemaOverload.cpp | 9 ++--
clang/lib/Sema/SemaTemplate.cpp | 11 +
clang/lib/Sema/SemaType.cpp | 2 +-
clang/lib/Serialization/ASTReaderStmt.cpp | 9 +++-
clang/lib/Serialization/ASTWriterStmt.cpp | 4 ++
clang/test/Sema/Resugar/resugar-expr.cpp | 3 +-
15 files changed, 129 insertions(+), 53 deletions(-)
diff --git a/clang/include/clang/AST/Expr.h b/clang/include/clang/AST/Expr.h
index e92f6696027f9..53afd206073ab 100644
--- a/clang/include/clang/AST/Expr.h
+++ b/clang/include/clang/AST/Expr.h
@@ -3263,7 +3263,7 @@ class MemberExpr final
: public Expr,
private llvm::TrailingObjects {
+TemplateArgumentLoc, QualType> {
friend class ASTReader;
friend class ASTStmtReader;
friend class ASTStmtWriter;
@@ -3304,13 +3304,23 @@ class MemberExpr final
return MemberExprBits.HasTemplateKWAndArgsInfo;
}
+ size_t numTrailingObjects(OverloadToken) const {
+return getNumTemplateArgs();
+ }
+
+ size_t numTrailingObjects(OverloadToken) const {
+return HasResugaredDeclType();
+ }
+
+ static bool needsDeclTypeStorage(ValueDecl *VD, QualType DeclType);
+
MemberExpr(Expr *Base, bool IsArrow, SourceLocation OperatorLoc,
NestedNameSpecifierLoc QualifierLoc, SourceLocation TemplateKWLoc,
ValueDecl *MemberDecl, DeclAccessPair FoundDecl,
const DeclarationNameInfo &NameInfo,
const TemplateArgumentListInfo *TemplateArgs,
const TemplateArgumentList *Deduced, QualType T, ExprValueKind VK,
- ExprObjectKind OK, NonOdrUseReason NOUR);
+ QualType DeclType, ExprObjectKind OK, NonOdrUseReason NOUR);
MemberExpr(EmptyShell Empty)
: Expr(MemberExprClass, Empty), Base(), MemberDecl() {}
@@ -3322,7 +3332,7 @@ class MemberExpr final
DeclAccessPair FoundDecl, DeclarationNameInfo MemberNameInfo,
const TemplateArgumentListInfo *TemplateArgs,
const TemplateArgumentList *Deduced, QualType T, ExprValueKind VK,
- ExprObjectKind OK, NonOdrUseReason NOUR);
+ QualType DeclType, ExprObjectKind OK, NonOdrUseReason NOUR);
/// Create an implicit MemberExpr, with no location, qualifier, template
/// arguments, and so on. Suitable only for non-static member access.
@@ -,14 +3343,15 @@ class MemberExpr final
return Create(C, Base, IsArrow, SourceLocation(), NestedNameSpecifierLoc(),
SourceLocation(), MemberDecl,
DeclAccessPair::make(MemberDecl, MemberDecl->getAccess()),
- DeclarationNameInfo(), nullptr, /*Deduced=*/{}, T, VK, OK,
- NOUR_None);
+ DeclarationNameInfo(), nullptr, /*Deduced=*/{}, T, VK,
+ QualType(), OK, NOUR_None);
}
static MemberExpr *CreateEmpty(const ASTContext &Context, bool HasQualifier,
bool HasFoundDecl,
bool HasTemplateKWAndArgsInfo,
- unsigned NumTemplateArgs);
+ unsigned NumTemplateArgs,
+ bool HasResugaredDeclType);
void setBase(Expr *E) { Base = E; }
Expr *getBase() const { return cast(Base); }
@@ -3351,6 +3362,16 @@ class MemberExpr final
/// static data members), a CXXMethodDecl, or an EnumConstantDecl.
ValueDecl *getMemberDecl() const { return MemberDecl; }
void setMemberDecl(ValueDecl *D);
+ void recomputeDependency();
+
+ bool HasResugaredDeclType() const {
+return MemberExprBits.HasResugaredDeclType;
+ }
+ QualType getDeclType() const {
+return HasResugaredDeclType() ? *getTrailingObjects()
+ : MemberDecl->getType();
+ }
+ void setDeclType(QualType T);
/// Retrieves the declaration found by lookup.
DeclAccessPair getFoundDecl() const {
diff --git a/clang/include/clang/AST/Stmt.h b/clang/includ
[llvm-branch-commits] [llvm] [Metadata] Preserve MD_prof when merging instructions when one is missing. (PR #132433)
https://github.com/snehasish created
https://github.com/llvm/llvm-project/pull/132433
Preserve branch weight metadata when merging instructions if one of the
instructions is missing metadata. This is similar in behaviour to what
we do today for other types of metadata such as mmra, memprof and
callsite metadata.
>From 8677f6470103b6af093f57f79c18c4f81912c5fa Mon Sep 17 00:00:00 2001
From: Snehasish Kumar
Date: Fri, 21 Mar 2025 17:00:38 +
Subject: [PATCH] [Metadata] Preserve MD_prof when merging instructions when
one is missing.
Preserve branch weight metadata when merging instructions if one of the
instructions is missing metadata. This is similar in behaviour to what
we do today for other types of metadata such as mmra, memprof and
callsite metadata.
---
llvm/lib/Transforms/Utils/Local.cpp | 18 --
...rect-call-branch-weights-preserve-hoist.ll | 62 +++
...irect-call-branch-weights-preserve-sink.ll | 62 +++
3 files changed, 137 insertions(+), 5 deletions(-)
create mode 100644
llvm/test/Transforms/SimplifyCFG/merge-direct-call-branch-weights-preserve-hoist.ll
create mode 100644
llvm/test/Transforms/SimplifyCFG/merge-direct-call-branch-weights-preserve-sink.ll
diff --git a/llvm/lib/Transforms/Utils/Local.cpp
b/llvm/lib/Transforms/Utils/Local.cpp
index d18adac5fa914..069ebae117b48 100644
--- a/llvm/lib/Transforms/Utils/Local.cpp
+++ b/llvm/lib/Transforms/Utils/Local.cpp
@@ -3355,9 +3355,11 @@ static void combineMetadata(Instruction *K, const
Instruction *J,
case LLVMContext::MD_invariant_group:
// Preserve !invariant.group in K.
break;
- // Keep empty cases for mmra, memprof, and callsite to prevent them from
+ // Keep empty cases for prof, mmra, memprof, and callsite to prevent
them from
// being removed as unknown metadata. The actual merging is handled
// separately below.
+ case LLVMContext::MD_prof:
+[[fallthrough]];
case LLVMContext::MD_mmra:
case LLVMContext::MD_memprof:
case LLVMContext::MD_callsite:
@@ -3386,10 +3388,6 @@ static void combineMetadata(Instruction *K, const
Instruction *J,
if (!AAOnly)
K->setMetadata(Kind, JMD);
break;
- case LLVMContext::MD_prof:
-if (!AAOnly && DoesKMove)
- K->setMetadata(Kind, MDNode::getMergedProfMetadata(KMD, JMD, K, J));
-break;
case LLVMContext::MD_noalias_addrspace:
if (DoesKMove)
K->setMetadata(Kind,
@@ -3436,6 +3434,16 @@ static void combineMetadata(Instruction *K, const
Instruction *J,
K->setMetadata(LLVMContext::MD_callsite,
MDNode::getMergedCallsiteMetadata(KCallSite, JCallSite));
}
+
+ // Merge prof metadata.
+ // Handle separately to support cases where only one instruction has the
+ // metadata.
+ auto JProf = J->getMetadata(LLVMContext::MD_prof);
+ auto KProf = K->getMetadata(LLVMContext::MD_prof);
+ if (!AAOnly && (JProf || KProf)) {
+K->setMetadata(LLVMContext::MD_prof,
+ MDNode::getMergedProfMetadata(KProf, JProf, K, J));
+ }
}
void llvm::combineMetadataForCSE(Instruction *K, const Instruction *J,
diff --git
a/llvm/test/Transforms/SimplifyCFG/merge-direct-call-branch-weights-preserve-hoist.ll
b/llvm/test/Transforms/SimplifyCFG/merge-direct-call-branch-weights-preserve-hoist.ll
new file mode 100644
index 0..2a0fc3ffc2d4d
--- /dev/null
+++
b/llvm/test/Transforms/SimplifyCFG/merge-direct-call-branch-weights-preserve-hoist.ll
@@ -0,0 +1,62 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
UTC_ARGS: --check-globals --version 2
+; RUN: opt < %s -passes='simplifycfg'
-simplifycfg-require-and-preserve-domtree=1 -S | FileCheck %s
--check-prefix=HOIST
+
+; Test case based on C++ code with manualy annotated !prof metadata.
+; This is to test that when calls to 'func1' from 'if.then' block
+; and 'if.else' block are hoisted, the branch_weights are merged and
+; attached to merged call rather than dropped.
+;
+; int func1(int a, int b) ;
+; int func2(int a, int b) ;
+
+; int func(int a, int b, bool c) {
+;int sum= 0;
+;if(c) {
+;sum += func1(a, b);
+;} else {
+;sum += func1(a, b);
+;sum -= func2(a, b);
+;}
+;return sum;
+; }
+define i32 @_Z4funciib(i32 %a, i32 %b, i1 %c) {
+; HOIST-LABEL: define i32 @_Z4funciib
+; HOIST-SAME: (i32 [[A:%.*]], i32 [[B:%.*]], i1 [[C:%.*]]) {
+; HOIST-NEXT: entry:
+; HOIST-NEXT:[[CALL:%.*]] = tail call i32 @_Z5func1ii(i32 [[A]], i32
[[B]]), !prof [[PROF0:![0-9]+]]
+; HOIST-NEXT:br i1 [[C]], label [[IF_END:%.*]], label [[IF_ELSE:%.*]]
+; HOIST: if.else:
+; HOIST-NEXT:[[CALL3:%.*]] = tail call i32 @_Z5func2ii(i32 [[A]], i32
[[B]])
+; HOIST-NEXT:[[SUB:%.*]] = sub i32 [[CALL]], [[CALL3]]
+; HOIST-NEXT:br label [[IF_END]]
+; HOIST: if.end:
+; HOIST-NEXT:[[SUM_0:%.*]] = phi i32 [ [[SUB]], [[IF_ELSE]] ], [ [[CALL]],
[
[llvm-branch-commits] [lld] release/20.x: [LLD] [COFF] Add a few more mingw libs to skip autoexports for (#132289) (PR #132478)
https://github.com/llvmbot created
https://github.com/llvm/llvm-project/pull/132478
Backport af93db9344919085551fac38d6d6a4f774a7220a
Requested by: @mstorsjo
>From 3cf1b126bdefe2b99cf98c4c8a02fe51254d32a7 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Martin=20Storsj=C3=B6?=
Date: Fri, 21 Mar 2025 15:33:25 +0200
Subject: [PATCH] [LLD] [COFF] Add a few more mingw libs to skip autoexports
for (#132289)
"libmsvcrt-os" was added to the list of excluded libs in binutils in
9d9c67b06c1bf4c4550e3de0eb575c2bfbe96df9 in 2017.
"libucrt" was added in c4a8df19ba0a82aa8dea88d9f72ed9e63cb1fa84 in 2022.
"libucrtapp" isn't in the binutils exclusion list yet, but a patch for
adding it has been submitted. Since
0d403d5dd13ce22c07418058f3b640708992890c in mingw-w64 (in 2020), there's
such a third variant of the UCRT import library available.
Since 18df3e8323dcf9fdfec56b5f12c04a9c723a0931 in 2025, "libpthread" and
"libwinpthread" are also excluded.
(cherry picked from commit af93db9344919085551fac38d6d6a4f774a7220a)
---
lld/COFF/MinGW.cpp | 5 +
1 file changed, 5 insertions(+)
diff --git a/lld/COFF/MinGW.cpp b/lld/COFF/MinGW.cpp
index 76f5a0a7500b9..097cf228f7d6e 100644
--- a/lld/COFF/MinGW.cpp
+++ b/lld/COFF/MinGW.cpp
@@ -54,7 +54,12 @@ AutoExporter::AutoExporter(
"libFortranDecimal",
"libunwind",
"libmsvcrt",
+ "libmsvcrt-os",
"libucrtbase",
+ "libucrt",
+ "libucrtapp",
+ "libpthread",
+ "libwinpthread",
};
excludeObjects = {
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[llvm-branch-commits] [lld] release/20.x: [LLD] [COFF] Add a few more mingw libs to skip autoexports for (#132289) (PR #132478)
llvmbot wrote:
@llvm/pr-subscribers-lld-coff
Author: None (llvmbot)
Changes
Backport af93db9344919085551fac38d6d6a4f774a7220a
Requested by: @mstorsjo
---
Full diff: https://github.com/llvm/llvm-project/pull/132478.diff
1 Files Affected:
- (modified) lld/COFF/MinGW.cpp (+5)
``diff
diff --git a/lld/COFF/MinGW.cpp b/lld/COFF/MinGW.cpp
index 76f5a0a7500b9..097cf228f7d6e 100644
--- a/lld/COFF/MinGW.cpp
+++ b/lld/COFF/MinGW.cpp
@@ -54,7 +54,12 @@ AutoExporter::AutoExporter(
"libFortranDecimal",
"libunwind",
"libmsvcrt",
+ "libmsvcrt-os",
"libucrtbase",
+ "libucrt",
+ "libucrtapp",
+ "libpthread",
+ "libwinpthread",
};
excludeObjects = {
``
https://github.com/llvm/llvm-project/pull/132478
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[llvm-branch-commits] [llvm] [Metadata] Preserve MD_prof when merging instructions when one is missing. (PR #132433)
snehasish wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/132433?utm_source=stack-comment-downstack-mergeability-warning"; > >on Graphite. > https://graphite.dev/docs/merge-pull-requests";>Learn more * **#132433** https://app.graphite.dev/github/pr/llvm/llvm-project/132433?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/132433?utm_source=stack-comment-view-in-graphite"; target="_blank">(View in Graphite) * **#132106** https://app.graphite.dev/github/pr/llvm/llvm-project/132106?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * `main` This stack of pull requests is managed by https://graphite.dev?utm-source=stack-comment";>Graphite. Learn more about https://stacking.dev/?utm_source=stack-comment";>stacking. https://github.com/llvm/llvm-project/pull/132433 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [Metadata] Preserve MD_prof when merging instructions when one is missing. (PR #132433)
github-actions[bot] wrote: :warning: C/C++ code formatter, clang-format found issues in your code. :warning: You can test this locally with the following command: ``bash git-clang-format --diff 24e557330e418cf73f92cc58e58e35e90623a53d 8677f6470103b6af093f57f79c18c4f81912c5fa --extensions cpp -- llvm/lib/Transforms/Utils/Local.cpp `` View the diff from clang-format here. ``diff diff --git a/llvm/lib/Transforms/Utils/Local.cpp b/llvm/lib/Transforms/Utils/Local.cpp index 069ebae117..a8f1bc5bbb 100644 --- a/llvm/lib/Transforms/Utils/Local.cpp +++ b/llvm/lib/Transforms/Utils/Local.cpp @@ -3355,8 +3355,8 @@ static void combineMetadata(Instruction *K, const Instruction *J, case LLVMContext::MD_invariant_group: // Preserve !invariant.group in K. break; - // Keep empty cases for prof, mmra, memprof, and callsite to prevent them from - // being removed as unknown metadata. The actual merging is handled + // Keep empty cases for prof, mmra, memprof, and callsite to prevent them + // from being removed as unknown metadata. The actual merging is handled // separately below. case LLVMContext::MD_prof: [[fallthrough]]; `` https://github.com/llvm/llvm-project/pull/132433 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [Metadata] Preserve MD_prof when merging instructions when one is missing. (PR #132433)
https://github.com/snehasish updated
https://github.com/llvm/llvm-project/pull/132433
>From 5b2f87db7ec72d12e4d8837203c3c7b953649907 Mon Sep 17 00:00:00 2001
From: Snehasish Kumar
Date: Fri, 21 Mar 2025 17:00:38 +
Subject: [PATCH] [Metadata] Preserve MD_prof when merging instructions when
one is missing.
Preserve branch weight metadata when merging instructions if one of the
instructions is missing metadata. This is similar in behaviour to what
we do today for other types of metadata such as mmra, memprof and
callsite metadata.
---
llvm/lib/Transforms/Utils/Local.cpp | 19 --
...rect-call-branch-weights-preserve-hoist.ll | 62 +++
...irect-call-branch-weights-preserve-sink.ll | 62 +++
3 files changed, 137 insertions(+), 6 deletions(-)
create mode 100644
llvm/test/Transforms/SimplifyCFG/merge-direct-call-branch-weights-preserve-hoist.ll
create mode 100644
llvm/test/Transforms/SimplifyCFG/merge-direct-call-branch-weights-preserve-sink.ll
diff --git a/llvm/lib/Transforms/Utils/Local.cpp
b/llvm/lib/Transforms/Utils/Local.cpp
index d18adac5fa914..a9408df328030 100644
--- a/llvm/lib/Transforms/Utils/Local.cpp
+++ b/llvm/lib/Transforms/Utils/Local.cpp
@@ -3355,9 +3355,10 @@ static void combineMetadata(Instruction *K, const
Instruction *J,
case LLVMContext::MD_invariant_group:
// Preserve !invariant.group in K.
break;
- // Keep empty cases for mmra, memprof, and callsite to prevent them from
- // being removed as unknown metadata. The actual merging is handled
+ // Keep empty cases for prof, mmra, memprof, and callsite to prevent them
+ // from being removed as unknown metadata. The actual merging is handled
// separately below.
+ case LLVMContext::MD_prof:
case LLVMContext::MD_mmra:
case LLVMContext::MD_memprof:
case LLVMContext::MD_callsite:
@@ -3386,10 +3387,6 @@ static void combineMetadata(Instruction *K, const
Instruction *J,
if (!AAOnly)
K->setMetadata(Kind, JMD);
break;
- case LLVMContext::MD_prof:
-if (!AAOnly && DoesKMove)
- K->setMetadata(Kind, MDNode::getMergedProfMetadata(KMD, JMD, K, J));
-break;
case LLVMContext::MD_noalias_addrspace:
if (DoesKMove)
K->setMetadata(Kind,
@@ -3436,6 +3433,16 @@ static void combineMetadata(Instruction *K, const
Instruction *J,
K->setMetadata(LLVMContext::MD_callsite,
MDNode::getMergedCallsiteMetadata(KCallSite, JCallSite));
}
+
+ // Merge prof metadata.
+ // Handle separately to support cases where only one instruction has the
+ // metadata.
+ auto JProf = J->getMetadata(LLVMContext::MD_prof);
+ auto KProf = K->getMetadata(LLVMContext::MD_prof);
+ if (!AAOnly && (JProf || KProf)) {
+K->setMetadata(LLVMContext::MD_prof,
+ MDNode::getMergedProfMetadata(KProf, JProf, K, J));
+ }
}
void llvm::combineMetadataForCSE(Instruction *K, const Instruction *J,
diff --git
a/llvm/test/Transforms/SimplifyCFG/merge-direct-call-branch-weights-preserve-hoist.ll
b/llvm/test/Transforms/SimplifyCFG/merge-direct-call-branch-weights-preserve-hoist.ll
new file mode 100644
index 0..2a0fc3ffc2d4d
--- /dev/null
+++
b/llvm/test/Transforms/SimplifyCFG/merge-direct-call-branch-weights-preserve-hoist.ll
@@ -0,0 +1,62 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
UTC_ARGS: --check-globals --version 2
+; RUN: opt < %s -passes='simplifycfg'
-simplifycfg-require-and-preserve-domtree=1 -S | FileCheck %s
--check-prefix=HOIST
+
+; Test case based on C++ code with manualy annotated !prof metadata.
+; This is to test that when calls to 'func1' from 'if.then' block
+; and 'if.else' block are hoisted, the branch_weights are merged and
+; attached to merged call rather than dropped.
+;
+; int func1(int a, int b) ;
+; int func2(int a, int b) ;
+
+; int func(int a, int b, bool c) {
+;int sum= 0;
+;if(c) {
+;sum += func1(a, b);
+;} else {
+;sum += func1(a, b);
+;sum -= func2(a, b);
+;}
+;return sum;
+; }
+define i32 @_Z4funciib(i32 %a, i32 %b, i1 %c) {
+; HOIST-LABEL: define i32 @_Z4funciib
+; HOIST-SAME: (i32 [[A:%.*]], i32 [[B:%.*]], i1 [[C:%.*]]) {
+; HOIST-NEXT: entry:
+; HOIST-NEXT:[[CALL:%.*]] = tail call i32 @_Z5func1ii(i32 [[A]], i32
[[B]]), !prof [[PROF0:![0-9]+]]
+; HOIST-NEXT:br i1 [[C]], label [[IF_END:%.*]], label [[IF_ELSE:%.*]]
+; HOIST: if.else:
+; HOIST-NEXT:[[CALL3:%.*]] = tail call i32 @_Z5func2ii(i32 [[A]], i32
[[B]])
+; HOIST-NEXT:[[SUB:%.*]] = sub i32 [[CALL]], [[CALL3]]
+; HOIST-NEXT:br label [[IF_END]]
+; HOIST: if.end:
+; HOIST-NEXT:[[SUM_0:%.*]] = phi i32 [ [[SUB]], [[IF_ELSE]] ], [ [[CALL]],
[[ENTRY:%.*]] ]
+; HOIST-NEXT:ret i32 [[SUM_0]]
+;
+entry:
+ br i1 %c, label %if.then, label %if.else
+
+if.then: ; preds = %entry
+ %c
[llvm-branch-commits] [llvm] [Metadata] Preserve MD_prof when merging instructions when one is missing. (PR #132433)
@@ -0,0 +1,62 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
UTC_ARGS: --check-globals --version 2
+; RUN: opt < %s -passes='simplifycfg'
-simplifycfg-require-and-preserve-domtree=1 -S | FileCheck %s
--check-prefix=HOIST
+
+; Test case based on C++ code with manualy annotated !prof metadata.
+; This is to test that when calls to 'func1' from 'if.then' block
+; and 'if.else' block are hoisted, the branch_weights are merged and
+; attached to merged call rather than dropped.
+;
+; int func1(int a, int b) ;
+; int func2(int a, int b) ;
+
+; int func(int a, int b, bool c) {
+;int sum= 0;
+;if(c) {
+;sum += func1(a, b);
+;} else {
+;sum += func1(a, b);
+;sum -= func2(a, b);
+;}
+;return sum;
+; }
+define i32 @_Z4funciib(i32 %a, i32 %b, i1 %c) {
+; HOIST-LABEL: define i32 @_Z4funciib
+; HOIST-SAME: (i32 [[A:%.*]], i32 [[B:%.*]], i1 [[C:%.*]]) {
+; HOIST-NEXT: entry:
+; HOIST-NEXT:[[CALL:%.*]] = tail call i32 @_Z5func1ii(i32 [[A]], i32
[[B]]), !prof [[PROF0:![0-9]+]]
+; HOIST-NEXT:br i1 [[C]], label [[IF_END:%.*]], label [[IF_ELSE:%.*]]
+; HOIST: if.else:
+; HOIST-NEXT:[[CALL3:%.*]] = tail call i32 @_Z5func2ii(i32 [[A]], i32
[[B]])
+; HOIST-NEXT:[[SUB:%.*]] = sub i32 [[CALL]], [[CALL3]]
+; HOIST-NEXT:br label [[IF_END]]
+; HOIST: if.end:
+; HOIST-NEXT:[[SUM_0:%.*]] = phi i32 [ [[SUB]], [[IF_ELSE]] ], [ [[CALL]],
[[ENTRY:%.*]] ]
+; HOIST-NEXT:ret i32 [[SUM_0]]
+;
+entry:
+ br i1 %c, label %if.then, label %if.else
+
+if.then: ; preds = %entry
+ %call = tail call i32 @_Z5func1ii(i32 %a, i32 %b), !prof !0
+ br label %if.end
+
+if.else: ; preds = %entry
+ %call1 = tail call i32 @_Z5func1ii(i32 %a, i32 %b)
+ %call3 = tail call i32 @_Z5func2ii(i32 %a, i32 %b)
+ %sub = sub i32 %call1, %call3
+ br label %if.end
+
+if.end: ; preds = %if.else, %if.then
+ %sum.0 = phi i32 [ %call, %if.then ], [ %sub, %if.else ]
+ ret i32 %sum.0
+}
+
+declare i32 @_Z5func1ii(i32, i32)
+
+declare i32 @_Z5func2ii(i32, i32)
+
+!0 = !{!"branch_weights", i32 10}
+!1 = !{!"branch_weights", i32 90}
teresajohnson wrote:
Unused in this test?
https://github.com/llvm/llvm-project/pull/132433
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[llvm-branch-commits] [llvm] [Metadata] Preserve MD_prof when merging instructions when one is missing. (PR #132433)
@@ -3436,6 +3433,16 @@ static void combineMetadata(Instruction *K, const
Instruction *J,
K->setMetadata(LLVMContext::MD_callsite,
MDNode::getMergedCallsiteMetadata(KCallSite, JCallSite));
}
+
+ // Merge prof metadata.
+ // Handle separately to support cases where only one instruction has the
+ // metadata.
+ auto JProf = J->getMetadata(LLVMContext::MD_prof);
+ auto KProf = K->getMetadata(LLVMContext::MD_prof);
+ if (!AAOnly && (JProf || KProf)) {
teresajohnson wrote:
The old handling was guarded on DoesKMove - what is the implication of removing
that?
https://github.com/llvm/llvm-project/pull/132433
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[llvm-branch-commits] [clang] [clang-tools-extra] WIP: [clang] Template Specialization Resugaring - Expressions (PR #132446)
https://github.com/mizvekov updated
https://github.com/llvm/llvm-project/pull/132446
>From 002480bdc8dc64f22d6abaefcfc46914cc5ba093 Mon Sep 17 00:00:00 2001
From: Matheus Izvekov
Date: Mon, 30 May 2022 01:46:31 +0200
Subject: [PATCH] WIP: [clang] Template Specialization Resugaring - Expressions
This adds some additional users of the resugaring transform,
around expressions. This makes function calls work for example.
While probably not the largest patch in the series,
this could use some further splitting up.
Differential Revision: https://reviews.llvm.org/D137200
---
.../clangd/unittests/InlayHintTests.cpp | 60 ++---
clang/include/clang/Sema/Sema.h | 16 +-
clang/lib/Sema/SemaChecking.cpp | 15 +-
clang/lib/Sema/SemaCoroutine.cpp | 2 +-
clang/lib/Sema/SemaDecl.cpp | 1 +
clang/lib/Sema/SemaDeclAttr.cpp | 1 +
clang/lib/Sema/SemaDeclCXX.cpp| 14 +-
clang/lib/Sema/SemaExpr.cpp | 30 ++-
clang/lib/Sema/SemaExprMember.cpp | 130 +-
clang/lib/Sema/SemaHLSL.cpp | 3 +-
clang/lib/Sema/SemaInit.cpp | 5 +-
clang/lib/Sema/SemaOverload.cpp | 87 +--
clang/lib/Sema/SemaTemplate.cpp | 110 +
clang/lib/Sema/SemaTemplateDeduction.cpp | 15 +-
clang/lib/Sema/TreeTransform.h| 4 +-
.../test/AST/ast-dump-for-range-lifetime.cpp | 66 ++---
clang/test/Analysis/cast-value-notes.cpp | 38 +--
clang/test/Analysis/cast-value-state-dump.cpp | 6 +-
.../Analysis/lifetime-extended-regions.cpp| 8 +-
.../CXX/class.derived/class.abstract/p3.cpp | 2 +-
clang/test/CXX/drs/cwg23xx.cpp| 4 +-
clang/test/CXX/drs/cwg26xx.cpp| 2 +-
clang/test/CXX/drs/cwg4xx.cpp | 8 +-
clang/test/CXX/drs/cwg6xx.cpp | 2 +-
clang/test/Index/print-type.cpp | 6 +-
.../test/Misc/diag-template-diffing-cxx11.cpp | 6 +-
clang/test/Sema/Resugar/resugar-expr.cpp | 227 ++
clang/test/SemaTemplate/attributes.cpp| 3 +-
clang/unittests/Tooling/StencilTest.cpp | 3 +-
29 files changed, 669 insertions(+), 205 deletions(-)
create mode 100644 clang/test/Sema/Resugar/resugar-expr.cpp
diff --git a/clang-tools-extra/clangd/unittests/InlayHintTests.cpp
b/clang-tools-extra/clangd/unittests/InlayHintTests.cpp
index 77d78b8777fe3..81a342cdcf58e 100644
--- a/clang-tools-extra/clangd/unittests/InlayHintTests.cpp
+++ b/clang-tools-extra/clangd/unittests/InlayHintTests.cpp
@@ -1290,8 +1290,8 @@ TEST(TypeHints, Lambda) {
assertTypeHints(R"cpp(
void f() {
int cap = 42;
- auto $L[[L]] = [cap, $init[[init]] = 1 + 1](int a$ret[[)]] {
-return a + cap + init;
+ auto $L[[L]] = [cap, $init[[init]] = 1 + 1](int a$ret[[)]] {
+return a + cap + init;
};
}
)cpp",
@@ -1367,7 +1367,7 @@ TEST(TypeHints, StructuredBindings_TupleLike) {
TEST(TypeHints, StructuredBindings_NoInitializer) {
assertTypeHints(R"cpp(
// No initializer (ill-formed).
-// Do not show useless "NULL TYPE" hint.
+// Do not show useless "NULL TYPE" hint.
auto [x, y]; /*error-ok*/
)cpp");
}
@@ -1670,15 +1670,16 @@ TEST(TypeHints, SubstTemplateParameterAliases) {
auto $end[[end]] = array.end();
)cpp";
- assertHintsWithHeader(
- InlayHintKind::Type, VectorIntPtr, Header,
- ExpectedHint{": int *", "no_modifier"},
- ExpectedHint{": int **", "ptr_modifier"},
- ExpectedHint{": int *&", "ref_modifier"},
- ExpectedHint{": int *const &", "at"}, ExpectedHint{": int **", "data"},
- ExpectedHint{": allocator", "allocator"},
- ExpectedHint{": size_type", "size"}, ExpectedHint{": iterator", "begin"},
- ExpectedHint{": non_template_iterator", "end"});
+ assertHintsWithHeader(InlayHintKind::Type, VectorIntPtr, Header,
+ExpectedHint{": int *", "no_modifier"},
+ExpectedHint{": int **", "ptr_modifier"},
+ExpectedHint{": int *&", "ref_modifier"},
+ExpectedHint{": const value_type &", "at"},
+ExpectedHint{": pointer", "data"},
+ExpectedHint{": allocator_type", "allocator"},
+ExpectedHint{": size_type", "size"},
+ExpectedHint{": iterator", "begin"},
+ExpectedHint{": non_template_iterator", "end"});
llvm::StringRef VectorInt = R"cpp(
vector array;
@@ -1694,15 +1695,16 @@ TEST(TypeHints, SubstTemplateParameterAliases) {
auto $end[[end]] = array.end();
)cpp";
- assertHintsWithHeader(
- InlayHintKind::Type, VectorInt, Header,
- ExpectedHint{": int", "no_modifier"},
- ExpectedHint{": int *", "ptr_modifier"},
- ExpectedHint{": int &", "ref_modifier"},
- Expected
[llvm-branch-commits] [llvm] [AMDGPU][Attributor] Rework update of `AAAMDWavesPerEU` (PR #123995)
github-actions[bot] wrote:
:warning: undef deprecator found issues in your code. :warning:
You can test this locally with the following command:
``bash
git diff -U0 --pickaxe-regex -S
'([^a-zA-Z0-9#_-]undef[^a-zA-Z0-9_-]|UndefValue::get)'
31185938e33e4033c0e78ebf898041dd2e1ec90a
64d1817a15664f8a7a35428267762d3bed64100a
llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
llvm/test/CodeGen/AMDGPU/addrspacecast-constantexpr.ll
llvm/test/CodeGen/AMDGPU/amdgpu-attributor-no-agpr.ll
llvm/test/CodeGen/AMDGPU/annotate-existing-abi-attributes.ll
llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa-call.ll
llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa.ll
llvm/test/CodeGen/AMDGPU/annotate-kernel-features.ll
llvm/test/CodeGen/AMDGPU/attr-amdgpu-max-num-workgroups-propagate.ll
llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit.ll
llvm/test/CodeGen/AMDGPU/attributor-loop-issue-58639.ll
llvm/test/CodeGen/AMDGPU/direct-indirect-call.ll
llvm/test/CodeGen/AMDGPU/duplicate-attribute-indirect.ll
llvm/test/CodeGen/AMDGPU/implicitarg-offset-attributes.ll
llvm/test/CodeGen/AMDGPU/indirect-call-set-from-other-function.ll
llvm/test/CodeGen/AMDGPU/inline-attr.ll
llvm/test/CodeGen/AMDGPU/issue120256-annotate-constexpr-addrspacecast.ll
llvm/test/CodeGen/AMDGPU/pal-simple-indirect-call.ll
llvm/test/CodeGen/AMDGPU/propagate-flat-work-group-size.ll
llvm/test/CodeGen/AMDGPU/propagate-waves-per-eu.ll
llvm/test/CodeGen/AMDGPU/recursive_global_initializer.ll
llvm/test/CodeGen/AMDGPU/remove-no-kernel-id-attribute.ll
llvm/test/CodeGen/AMDGPU/simple-indirect-call-2.ll
llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
llvm/test/CodeGen/AMDGPU/simplify-libcalls.ll
llvm/test/CodeGen/AMDGPU/uniform-work-group-attribute-missing.ll
llvm/test/CodeGen/AMDGPU/uniform-work-group-multistep.ll
llvm/test/CodeGen/AMDGPU/uniform-work-group-nested-function-calls.ll
llvm/test/CodeGen/AMDGPU/uniform-work-group-prevent-attribute-propagation.ll
llvm/test/CodeGen/AMDGPU/uniform-work-group-propagate-attribute.ll
llvm/test/CodeGen/AMDGPU/uniform-work-group-recursion-test.ll
llvm/test/CodeGen/AMDGPU/uniform-work-group-test.ll
``
The following files introduce new uses of undef:
- llvm/test/CodeGen/AMDGPU/addrspacecast-constantexpr.ll
- llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa-call.ll
- llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa.ll
- llvm/test/CodeGen/AMDGPU/propagate-flat-work-group-size.ll
- llvm/test/CodeGen/AMDGPU/propagate-waves-per-eu.ll
[Undef](https://llvm.org/docs/LangRef.html#undefined-values) is now deprecated
and should only be used in the rare cases where no replacement is possible. For
example, a load of uninitialized memory yields `undef`. You should use `poison`
values for placeholders instead.
In tests, avoid using `undef` and having tests that trigger undefined behavior.
If you need an operand with some unimportant value, you can add a new argument
to the function and use that instead.
For example, this is considered a bad practice:
```llvm
define void @fn() {
...
br i1 undef, ...
}
```
Please use the following instead:
```llvm
define void @fn(i1 %cond) {
...
br i1 %cond, ...
}
```
Please refer to the [Undefined Behavior
Manual](https://llvm.org/docs/UndefinedBehavior.html) for more information.
https://github.com/llvm/llvm-project/pull/123995
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[llvm-branch-commits] [clang] [clang-tools-extra] [lldb] [clang] Template Specialization Resugaring - TypeDecl (PR #132441)
https://github.com/erichkeane approved this pull request. I don't really have any comments, quite a few improvements here that are valuable. https://github.com/llvm/llvm-project/pull/132441 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [BOLT] Gadget scanner: detect non-protected indirect calls (PR #131899)
https://github.com/atrosinenko updated
https://github.com/llvm/llvm-project/pull/131899
>From 0b39fd45befe73650b3be72b3069e5c59cec2947 Mon Sep 17 00:00:00 2001
From: Anatoly Trosinenko
Date: Tue, 18 Mar 2025 21:32:11 +0300
Subject: [PATCH] [BOLT] Gadget scanner: detect non-protected indirect calls
---
bolt/include/bolt/Core/MCPlusBuilder.h| 10 +
bolt/lib/Passes/PAuthGadgetScanner.cpp| 33 +-
.../Target/AArch64/AArch64MCPlusBuilder.cpp | 42 ++
.../binary-analysis/AArch64/gs-pauth-calls.s | 676 ++
.../AArch64/gs-pauth-debug-output.s | 49 +-
5 files changed, 796 insertions(+), 14 deletions(-)
create mode 100644 bolt/test/binary-analysis/AArch64/gs-pauth-calls.s
diff --git a/bolt/include/bolt/Core/MCPlusBuilder.h
b/bolt/include/bolt/Core/MCPlusBuilder.h
index 76ea2489e7038..b3d54ccd5955d 100644
--- a/bolt/include/bolt/Core/MCPlusBuilder.h
+++ b/bolt/include/bolt/Core/MCPlusBuilder.h
@@ -577,6 +577,16 @@ class MCPlusBuilder {
return getNoRegister();
}
+ /// Returns the register used as call destination, or no-register, if not
+ /// an indirect call. Sets IsAuthenticatedInternally if the instruction
+ /// accepts signed pointer as its operand and authenticates it internally.
+ virtual MCPhysReg
+ getRegUsedAsCallDest(const MCInst &Inst,
+ bool &IsAuthenticatedInternally) const {
+llvm_unreachable("not implemented");
+return getNoRegister();
+ }
+
virtual bool isTerminator(const MCInst &Inst) const;
virtual bool isNoop(const MCInst &Inst) const {
diff --git a/bolt/lib/Passes/PAuthGadgetScanner.cpp
b/bolt/lib/Passes/PAuthGadgetScanner.cpp
index 5269710e1c995..08b55bb55d0dc 100644
--- a/bolt/lib/Passes/PAuthGadgetScanner.cpp
+++ b/bolt/lib/Passes/PAuthGadgetScanner.cpp
@@ -382,11 +382,11 @@ class PacRetAnalysis
public:
std::vector
- getLastClobberingInsts(const MCInst Ret, BinaryFunction &BF,
- const ArrayRef UsedDirtyRegs) const {
+ getLastClobberingInsts(const MCInst &Inst, BinaryFunction &BF,
+ const ArrayRef UsedDirtyRegs) {
if (RegsToTrackInstsFor.empty())
return {};
-auto MaybeState = getStateAt(Ret);
+auto MaybeState = getStateBefore(Inst);
if (!MaybeState)
llvm_unreachable("Expected State to be present");
const State &S = *MaybeState;
@@ -434,6 +434,29 @@ shouldReportReturnGadget(const BinaryContext &BC, const
MCInstReference &Inst,
return std::make_shared(RetKind, Inst, RetReg);
}
+static std::shared_ptr
+shouldReportCallGadget(const BinaryContext &BC, const MCInstReference &Inst,
+ const State &S) {
+ static const GadgetKind CallKind("non-protected call found");
+ if (!BC.MIB->isCall(Inst) && !BC.MIB->isBranch(Inst))
+return nullptr;
+
+ bool IsAuthenticated = false;
+ MCPhysReg DestReg = BC.MIB->getRegUsedAsCallDest(Inst, IsAuthenticated);
+ if (IsAuthenticated || DestReg == BC.MIB->getNoRegister())
+return nullptr;
+
+ LLVM_DEBUG({
+traceInst(BC, "Found call inst", Inst);
+traceReg(BC, "Call destination reg", DestReg);
+traceRegMask(BC, "SafeToDerefRegs", S.SafeToDerefRegs);
+ });
+ if (S.SafeToDerefRegs[DestReg])
+return nullptr;
+
+ return std::make_shared(CallKind, Inst, DestReg);
+}
+
FunctionAnalysisResult
Analysis::findGadgets(BinaryFunction &BF,
MCPlusBuilder::AllocatorIdTy AllocatorId) {
@@ -450,10 +473,12 @@ Analysis::findGadgets(BinaryFunction &BF,
for (BinaryBasicBlock &BB : BF) {
for (int64_t I = 0, E = BB.size(); I < E; ++I) {
MCInstReference Inst(&BB, I);
- const State &S = *PRA.getStateAt(Inst);
+ const State &S = *PRA.getStateBefore(Inst);
if (auto Report = shouldReportReturnGadget(BC, Inst, S))
Result.Diagnostics.push_back(Report);
+ if (auto Report = shouldReportCallGadget(BC, Inst, S))
+Result.Diagnostics.push_back(Report);
}
}
return Result;
diff --git a/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
b/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
index d238a1df5c7d7..9ce1514639f95 100644
--- a/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
+++ b/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
@@ -277,6 +277,48 @@ class AArch64MCPlusBuilder : public MCPlusBuilder {
}
}
+ MCPhysReg
+ getRegUsedAsCallDest(const MCInst &Inst,
+ bool &IsAuthenticatedInternally) const override {
+assert(isCall(Inst) || isBranch(Inst));
+IsAuthenticatedInternally = false;
+
+switch (Inst.getOpcode()) {
+case AArch64::B:
+case AArch64::BL:
+ assert(Inst.getOperand(0).isExpr());
+ return getNoRegister();
+case AArch64::Bcc:
+case AArch64::CBNZW:
+case AArch64::CBNZX:
+case AArch64::CBZW:
+case AArch64::CBZX:
+ assert(Inst.getOperand(1).isExpr());
+ return getNoRegister();
+case AArch64::TBNZW:
+case AArch64::TBNZX:
+case AArch64::TBZW:
+
[llvm-branch-commits] [clang] [clang][HeuristicResolver] Default argument heuristic for template parameters (PR #131074)
https://github.com/HighCommander4 closed https://github.com/llvm/llvm-project/pull/131074 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] Release 20.x: [clang][docs] Move non-trivial-memcall to added flags. (PR #132367)
https://github.com/R-Goc created https://github.com/llvm/llvm-project/pull/132367 -Wnon-trivial-memcall was incorrectly added to modified flags instead of added flags. This commit moves it to the added compiler flags. >From 7b7009f548851db2f0937e0a3392b4fc5a787529 Mon Sep 17 00:00:00 2001 From: R-Goc Date: Fri, 21 Mar 2025 11:04:31 +0100 Subject: [PATCH] Release 20.x: [clang][docs] Move non-trivial-memcall to added flags. -Wnon-trivial-memcall was incorrectly added to modified flags instead of added flags. This commit moves it to the added compiler flags. --- clang/docs/ReleaseNotes.rst | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst index 03b68271b7864..8560b2a7adf95 100644 --- a/clang/docs/ReleaseNotes.rst +++ b/clang/docs/ReleaseNotes.rst @@ -545,6 +545,11 @@ New Compiler Flags - The ``-Warray-compare-cxx26`` warning has been added to warn about array comparison starting from C++26, this warning is enabled as an error by default. +- The ``-Wnontrivial-memcall`` warning has been added to warn about + passing non-trivially-copyable destination parameter to ``memcpy``, + ``memset`` and similar functions for which it is a documented undefined + behavior. It is implied by ``-Wnontrivial-memaccess`` + - clang-cl and clang-dxc now support ``-fdiagnostics-color=[auto|never|always]`` in addition to ``-f[no-]color-diagnostics``. @@ -576,11 +581,6 @@ Modified Compiler Flags to utilize these vector libraries. The behavior for all other vector function libraries remains unchanged. -- The ``-Wnontrivial-memcall`` warning has been added to warn about - passing non-trivially-copyable destination parameter to ``memcpy``, - ``memset`` and similar functions for which it is a documented undefined - behavior. It is implied by ``-Wnontrivial-memaccess`` - - Added ``-fmodules-reduced-bmi`` flag corresponding to ``-fexperimental-modules-reduced-bmi`` flag. The ``-fmodules-reduced-bmi`` flag is intended to be enabled by default in the future. ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] Release 20.x: [clang][docs] Move non-trivial-memcall to added flags. (PR #132367)
llvmbot wrote: @llvm/pr-subscribers-clang Author: None (R-Goc) Changes -Wnon-trivial-memcall was incorrectly added to modified flags instead of added flags. This commit moves it to the added compiler flags. --- Full diff: https://github.com/llvm/llvm-project/pull/132367.diff 1 Files Affected: - (modified) clang/docs/ReleaseNotes.rst (+5-5) ``diff diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst index 03b68271b7864..8560b2a7adf95 100644 --- a/clang/docs/ReleaseNotes.rst +++ b/clang/docs/ReleaseNotes.rst @@ -545,6 +545,11 @@ New Compiler Flags - The ``-Warray-compare-cxx26`` warning has been added to warn about array comparison starting from C++26, this warning is enabled as an error by default. +- The ``-Wnontrivial-memcall`` warning has been added to warn about + passing non-trivially-copyable destination parameter to ``memcpy``, + ``memset`` and similar functions for which it is a documented undefined + behavior. It is implied by ``-Wnontrivial-memaccess`` + - clang-cl and clang-dxc now support ``-fdiagnostics-color=[auto|never|always]`` in addition to ``-f[no-]color-diagnostics``. @@ -576,11 +581,6 @@ Modified Compiler Flags to utilize these vector libraries. The behavior for all other vector function libraries remains unchanged. -- The ``-Wnontrivial-memcall`` warning has been added to warn about - passing non-trivially-copyable destination parameter to ``memcpy``, - ``memset`` and similar functions for which it is a documented undefined - behavior. It is implied by ``-Wnontrivial-memaccess`` - - Added ``-fmodules-reduced-bmi`` flag corresponding to ``-fexperimental-modules-reduced-bmi`` flag. The ``-fmodules-reduced-bmi`` flag is intended to be enabled by default in the future. `` https://github.com/llvm/llvm-project/pull/132367 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] Release 20.x: [clang][docs] Move non-trivial-memcall to added flags. (PR #132367)
https://github.com/R-Goc updated https://github.com/llvm/llvm-project/pull/132367 >From 5f13d9a19a5d04bfeb7df5e6681db2a1e9cec3dd Mon Sep 17 00:00:00 2001 From: R-Goc Date: Fri, 21 Mar 2025 11:04:31 +0100 Subject: [PATCH] release/20.x: [clang][docs] Move -Wnon-trivial-memcall to added flags. -Wnon-trivial-memcall was incorrectly added to modified flags instead of added flags. This commit moves it to the added compiler flags. --- clang/docs/ReleaseNotes.rst | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst index 03b68271b7864..8560b2a7adf95 100644 --- a/clang/docs/ReleaseNotes.rst +++ b/clang/docs/ReleaseNotes.rst @@ -545,6 +545,11 @@ New Compiler Flags - The ``-Warray-compare-cxx26`` warning has been added to warn about array comparison starting from C++26, this warning is enabled as an error by default. +- The ``-Wnontrivial-memcall`` warning has been added to warn about + passing non-trivially-copyable destination parameter to ``memcpy``, + ``memset`` and similar functions for which it is a documented undefined + behavior. It is implied by ``-Wnontrivial-memaccess`` + - clang-cl and clang-dxc now support ``-fdiagnostics-color=[auto|never|always]`` in addition to ``-f[no-]color-diagnostics``. @@ -576,11 +581,6 @@ Modified Compiler Flags to utilize these vector libraries. The behavior for all other vector function libraries remains unchanged. -- The ``-Wnontrivial-memcall`` warning has been added to warn about - passing non-trivially-copyable destination parameter to ``memcpy``, - ``memset`` and similar functions for which it is a documented undefined - behavior. It is implied by ``-Wnontrivial-memaccess`` - - Added ``-fmodules-reduced-bmi`` flag corresponding to ``-fexperimental-modules-reduced-bmi`` flag. The ``-fmodules-reduced-bmi`` flag is intended to be enabled by default in the future. ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] release/20.x: [clang][docs] Move -Wnon-trivial-memcall to added flags. (PR #132367)
https://github.com/R-Goc updated https://github.com/llvm/llvm-project/pull/132367 >From 27a139bbb73c604fb98f5bcd9095c1659528c0ad Mon Sep 17 00:00:00 2001 From: R-Goc Date: Fri, 21 Mar 2025 11:04:31 +0100 Subject: [PATCH] release/20.x: [clang][docs] Move -Wnontrivial-memcall to added flags. -Wnontrivial-memcall was incorrectly added to modified flags instead of added flags. This commit moves it to the added compiler flags. --- clang/docs/ReleaseNotes.rst | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst index 03b68271b7864..8560b2a7adf95 100644 --- a/clang/docs/ReleaseNotes.rst +++ b/clang/docs/ReleaseNotes.rst @@ -545,6 +545,11 @@ New Compiler Flags - The ``-Warray-compare-cxx26`` warning has been added to warn about array comparison starting from C++26, this warning is enabled as an error by default. +- The ``-Wnontrivial-memcall`` warning has been added to warn about + passing non-trivially-copyable destination parameter to ``memcpy``, + ``memset`` and similar functions for which it is a documented undefined + behavior. It is implied by ``-Wnontrivial-memaccess`` + - clang-cl and clang-dxc now support ``-fdiagnostics-color=[auto|never|always]`` in addition to ``-f[no-]color-diagnostics``. @@ -576,11 +581,6 @@ Modified Compiler Flags to utilize these vector libraries. The behavior for all other vector function libraries remains unchanged. -- The ``-Wnontrivial-memcall`` warning has been added to warn about - passing non-trivially-copyable destination parameter to ``memcpy``, - ``memset`` and similar functions for which it is a documented undefined - behavior. It is implied by ``-Wnontrivial-memaccess`` - - Added ``-fmodules-reduced-bmi`` flag corresponding to ``-fexperimental-modules-reduced-bmi`` flag. The ``-fmodules-reduced-bmi`` flag is intended to be enabled by default in the future. ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] release/20.x: [clang][docs] Move -Wnontrivial-memcall to added flags. (PR #132367)
https://github.com/R-Goc edited https://github.com/llvm/llvm-project/pull/132367 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [llvm] release/20.x: [Hexagon] Set the default compilation target to V68 (#125239) (PR #128597)
androm3da wrote: /cherry-pick 759ef5811e22 c0b2c10e9f3a https://github.com/llvm/llvm-project/pull/128597 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [compiler-rt] [compiler-rt][Darwin][x86] Fix instrprof-darwin-exports test (#131425) (PR #132500)
https://github.com/j-hui closed https://github.com/llvm/llvm-project/pull/132500 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [compiler-rt] [compiler-rt][Darwin][x86] Fix instrprof-darwin-exports test (#131425) (PR #132500)
j-hui wrote: Superseded by backport request issue https://github.com/llvm/llvm-project/issues/132505 https://github.com/llvm/llvm-project/pull/132500 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [compiler-rt] release/20.x: [compiler-rt][Darwin][x86] Fix instrprof-darwin-exports test (#131425) (PR #132506)
https://github.com/llvmbot created https://github.com/llvm/llvm-project/pull/132506 Backport 94426df66a8d7c2321f9e197e5ef9636b0d5ce70 Requested by: @j-hui >From 01d366d45dfefdb1c49f6344d722918c5be99943 Mon Sep 17 00:00:00 2001 From: David Tellenbach Date: Mon, 17 Mar 2025 17:23:58 -0700 Subject: [PATCH] [compiler-rt][Darwin][x86] Fix instrprof-darwin-exports test (#131425) ld64 issues a warning about section alignment which was counted as an unexpected exported symbol and the test failed. Fixed by disabling all linker warnings using -Wl,-w. (cherry picked from commit 94426df66a8d7c2321f9e197e5ef9636b0d5ce70) --- compiler-rt/test/profile/instrprof-darwin-exports.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/compiler-rt/test/profile/instrprof-darwin-exports.c b/compiler-rt/test/profile/instrprof-darwin-exports.c index 079d5d28ed24d..1a2ac8c813272 100644 --- a/compiler-rt/test/profile/instrprof-darwin-exports.c +++ b/compiler-rt/test/profile/instrprof-darwin-exports.c @@ -7,13 +7,13 @@ // just "_main" produces no warnings or errors. // // RUN: echo "_main" > %t.exports -// RUN: %clang_pgogen -Werror -Wl,-exported_symbols_list,%t.exports -o %t %s 2>&1 | tee %t.log -// RUN: %clang_profgen -Werror -fcoverage-mapping -Wl,-exported_symbols_list,%t.exports -o %t %s 2>&1 | tee -a %t.log +// RUN: %clang_pgogen -Werror -Wl,-exported_symbols_list,%t.exports -Wl,-w -o %t %s 2>&1 | tee %t.log +// RUN: %clang_profgen -Werror -fcoverage-mapping -Wl,-exported_symbols_list,%t.exports -Wl,-w -o %t %s 2>&1 | tee -a %t.log // RUN: cat %t.log | count 0 // 2) Ditto (1), but for GCOV. // -// RUN: %clang -Werror -Wl,-exported_symbols_list,%t.exports --coverage -o %t.gcov %s | tee -a %t.gcov.log +// RUN: %clang -Werror -Wl,-exported_symbols_list,%t.exports -Wl,-w --coverage -o %t.gcov %s | tee -a %t.gcov.log // RUN: cat %t.gcov.log | count 0 // 3) The default set of weak external symbols should match the set of symbols ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [llvm] release/20.x: [Hexagon] Set the default compilation target to V68 (#125239) (PR #128597)
llvmbot wrote: Failed to cherry-pick: 1abe7e8debc44d9a7e460c2be0b85b7cf137585b https://github.com/llvm/llvm-project/actions/runs/14003839625 Please manually backport the fix and push it to your github fork. Once this is done, please create a [pull request](https://github.com/llvm/llvm-project/compare) https://github.com/llvm/llvm-project/pull/128597 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [compiler-rt] release/20.x: [compiler-rt][Darwin][x86] Fix instrprof-darwin-exports test (#131425) (PR #132506)
https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/132506 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [clang-tools-extra] [lldb] [clang] Template Specialization Resugaring - TypeDecl (PR #132441)
llvmbot wrote: @llvm/pr-subscribers-lldb Author: Matheus Izvekov (mizvekov) Changes This is the introductory patch for a larger work which intends to solve the long standing C++ issue with losing type sugar when acessing template specializations. The well known example here is specializing a template with `std::string`, but getting diagnostics related to `std::basic_string` instead. This implements a transform which, upon member access, propagates type sugar from the naming context into the accessed entity. It also implements a single use of this transform, resugaring access to TypeDecls. For more details and discussion see: https://discourse.llvm.org/t/rfc-improving-diagnostics-with-template-specialization-resugaring/64294 Even though this patch is ready for review, some dependent patches are not, and might not be ready for some time. There is some more stuff that could be done either here or in follow ups: * Its worth exploring if a global resugaring cache is worthwhile, besides the current operational cache. A global cache would be more expensive to index, so there is a tradeoff, and maybe should be used of the whole result of the operation, while keeping the existing cache for sub-results. * It would be ideal if the transform could live in ASTContext instead of Sema. There are a few dependencies that would have to be tackled. * Template arguments deduced for partial specializations. * Some kinds of type adjustments currently require Sema. Differential Revision: https://reviews.llvm.org/D127695 --- Patch is 53.59 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/132441.diff 17 Files Affected: - (modified) clang-tools-extra/clang-tidy/readability/QualifiedAutoCheck.cpp (+1-1) - (modified) clang/include/clang/AST/ASTContext.h (+7-6) - (modified) clang/include/clang/AST/Type.h (+6-5) - (modified) clang/include/clang/Sema/Sema.h (+6-2) - (modified) clang/lib/AST/ASTContext.cpp (+8-9) - (modified) clang/lib/Sema/SemaCXXScopeSpec.cpp (+3-2) - (modified) clang/lib/Sema/SemaCoroutine.cpp (+1) - (modified) clang/lib/Sema/SemaDecl.cpp (+5-4) - (modified) clang/lib/Sema/SemaDeclCXX.cpp (+1-1) - (modified) clang/lib/Sema/SemaTemplate.cpp (+721-1) - (modified) clang/lib/Sema/SemaTemplateDeduction.cpp (+4-2) - (modified) clang/lib/Sema/SemaType.cpp (+6-4) - (modified) clang/test/AST/ast-dump-openmp-begin-declare-variant_reference.cpp (+2-6) - (modified) clang/test/AST/ast-dump-template-name.cpp (+2-5) - (modified) clang/test/CXX/temp/temp.param/p15-cxx0x.cpp (+2-2) - (added) clang/test/Sema/Resugar/resugar-types.cpp (+209) - (modified) lldb/test/API/commands/expression/import-std-module/iterator/TestIteratorFromStdModule.py (+1-1) ``diff diff --git a/clang-tools-extra/clang-tidy/readability/QualifiedAutoCheck.cpp b/clang-tools-extra/clang-tidy/readability/QualifiedAutoCheck.cpp index e843c593a92cc..679fbd75d2479 100644 --- a/clang-tools-extra/clang-tidy/readability/QualifiedAutoCheck.cpp +++ b/clang-tools-extra/clang-tidy/readability/QualifiedAutoCheck.cpp @@ -126,7 +126,7 @@ void QualifiedAutoCheck::registerMatchers(MatchFinder *Finder) { auto UnlessFunctionType = unless(hasUnqualifiedDesugaredType(functionType())); auto IsAutoDeducedToPointer = [](const auto &...InnerMatchers) { return autoType(hasDeducedType( -hasUnqualifiedDesugaredType(pointerType(pointee(InnerMatchers...); +hasCanonicalType(pointerType(pointee(InnerMatchers...); }; Finder->addMatcher( diff --git a/clang/include/clang/AST/ASTContext.h b/clang/include/clang/AST/ASTContext.h index ef596f99262be..23d789d8466d3 100644 --- a/clang/include/clang/AST/ASTContext.h +++ b/clang/include/clang/AST/ASTContext.h @@ -1319,8 +1319,6 @@ class ASTContext : public RefCountedBase { QualType getTypeDeclTypeSlow(const TypeDecl *Decl) const; - QualType getPipeType(QualType T, bool ReadOnly) const; - public: /// Return the uniqued reference to the type for an address space /// qualified type with the specified type and address space. @@ -1500,6 +1498,9 @@ class ASTContext : public RefCountedBase { /// blocks. QualType getBlockDescriptorType() const; + // Return a pipe type for the specified type. + QualType getPipeType(QualType T, bool ReadOnly) const; + /// Return a read_only pipe type for the specified type. QualType getReadPipeType(QualType T) const; @@ -1901,10 +1902,10 @@ class ASTContext : public RefCountedBase { /// C++11 decltype. QualType getDecltypeType(Expr *e, QualType UnderlyingType) const; - QualType getPackIndexingType(QualType Pattern, Expr *IndexExpr, - bool FullySubstituted = false, - ArrayRef Expansions = {}, - int Index = -1) const; + QualType getPackIndexingType( + QualType Pattern, Expr *IndexExpr, bool FullySubstituted = false, + ArrayRef Expansio
[llvm-branch-commits] [clang] [clang] Template Specialization Resugaring - Template Type Alias (PR #132442)
llvmbot wrote:
@llvm/pr-subscribers-clang
Author: Matheus Izvekov (mizvekov)
Changes
This implements an additional user of the resugaring transform: the pattern of
template type aliases.
For more details and discussion see:
https://discourse.llvm.org/t/rfc-improving-diagnostics-with-template-specialization-resugaring/64294
Differential Revision: https://reviews.llvm.org/D137199
---
Full diff: https://github.com/llvm/llvm-project/pull/132442.diff
9 Files Affected:
- (modified) clang/include/clang/Sema/Sema.h (+2-1)
- (modified) clang/lib/Sema/SemaCXXScopeSpec.cpp (+2-1)
- (modified) clang/lib/Sema/SemaCoroutine.cpp (+2-2)
- (modified) clang/lib/Sema/SemaDeclCXX.cpp (+4-2)
- (modified) clang/lib/Sema/SemaTemplate.cpp (+25-18)
- (modified) clang/lib/Sema/SemaTemplateInstantiateDecl.cpp (+2-1)
- (modified) clang/lib/Sema/TreeTransform.h (+2-1)
- (modified) clang/test/AST/ast-dump-template-decls.cpp (+1-3)
- (modified) clang/test/Sema/Resugar/resugar-types.cpp (+3-3)
``diff
diff --git a/clang/include/clang/Sema/Sema.h b/clang/include/clang/Sema/Sema.h
index 047ba88511dac..d45fc14e7b3c4 100644
--- a/clang/include/clang/Sema/Sema.h
+++ b/clang/include/clang/Sema/Sema.h
@@ -11508,7 +11508,8 @@ class Sema final : public SemaBase {
void NoteAllFoundTemplates(TemplateName Name);
- QualType CheckTemplateIdType(TemplateName Template,
+ QualType CheckTemplateIdType(const NestedNameSpecifier *NNS,
+ TemplateName Template,
SourceLocation TemplateLoc,
TemplateArgumentListInfo &TemplateArgs);
diff --git a/clang/lib/Sema/SemaCXXScopeSpec.cpp
b/clang/lib/Sema/SemaCXXScopeSpec.cpp
index e8fe1cdd7336a..fe39696a6c6b6 100644
--- a/clang/lib/Sema/SemaCXXScopeSpec.cpp
+++ b/clang/lib/Sema/SemaCXXScopeSpec.cpp
@@ -910,7 +910,8 @@ bool Sema::ActOnCXXNestedNameSpecifier(Scope *S,
// We were able to resolve the template name to an actual template.
// Build an appropriate nested-name-specifier.
- QualType T = CheckTemplateIdType(Template, TemplateNameLoc, TemplateArgs);
+ QualType T = CheckTemplateIdType(SS.getScopeRep(), Template, TemplateNameLoc,
+ TemplateArgs);
if (T.isNull())
return true;
diff --git a/clang/lib/Sema/SemaCoroutine.cpp b/clang/lib/Sema/SemaCoroutine.cpp
index 88d849b27db07..8cca65edc84e3 100644
--- a/clang/lib/Sema/SemaCoroutine.cpp
+++ b/clang/lib/Sema/SemaCoroutine.cpp
@@ -90,7 +90,7 @@ static QualType lookupPromiseType(Sema &S, const FunctionDecl
*FD,
// Build the template-id.
QualType CoroTrait =
- S.CheckTemplateIdType(TemplateName(CoroTraits), KwLoc, Args);
+ S.CheckTemplateIdType(nullptr, TemplateName(CoroTraits), KwLoc, Args);
if (CoroTrait.isNull())
return QualType();
if (S.RequireCompleteType(KwLoc, CoroTrait,
@@ -170,7 +170,7 @@ static QualType lookupCoroutineHandleType(Sema &S, QualType
PromiseType,
// Build the template-id.
QualType CoroHandleType =
- S.CheckTemplateIdType(TemplateName(CoroHandle), Loc, Args);
+ S.CheckTemplateIdType(nullptr, TemplateName(CoroHandle), Loc, Args);
if (CoroHandleType.isNull())
return QualType();
if (S.RequireCompleteType(Loc, CoroHandleType,
diff --git a/clang/lib/Sema/SemaDeclCXX.cpp b/clang/lib/Sema/SemaDeclCXX.cpp
index 330afbfa2d19d..26a3f86a718c4 100644
--- a/clang/lib/Sema/SemaDeclCXX.cpp
+++ b/clang/lib/Sema/SemaDeclCXX.cpp
@@ -1142,7 +1142,8 @@ static bool lookupStdTypeTraitMember(Sema &S,
LookupResult &TraitMemberLookup,
}
// Build the template-id.
- QualType TraitTy = S.CheckTemplateIdType(TemplateName(TraitTD), Loc, Args);
+ QualType TraitTy =
+ S.CheckTemplateIdType(nullptr, TemplateName(TraitTD), Loc, Args);
if (TraitTy.isNull())
return true;
if (!S.isCompleteType(Loc, TraitTy)) {
@@ -12185,7 +12186,8 @@ QualType Sema::BuildStdInitializerList(QualType
Element, SourceLocation Loc) {
return Context.getElaboratedType(
ElaboratedTypeKeyword::None,
NestedNameSpecifier::Create(Context, nullptr, getStdNamespace()),
- CheckTemplateIdType(TemplateName(StdInitializerList), Loc, Args));
+ CheckTemplateIdType(nullptr, TemplateName(StdInitializerList), Loc,
+ Args));
}
bool Sema::isInitListConstructor(const FunctionDecl *Ctor) {
diff --git a/clang/lib/Sema/SemaTemplate.cpp b/clang/lib/Sema/SemaTemplate.cpp
index 0b26f79ea3bfc..63a4dab9a41f3 100644
--- a/clang/lib/Sema/SemaTemplate.cpp
+++ b/clang/lib/Sema/SemaTemplate.cpp
@@ -3817,7 +3817,8 @@ void Sema::NoteAllFoundTemplates(TemplateName Name) {
}
}
-static QualType builtinCommonTypeImpl(Sema &S, TemplateName BaseTemplate,
+static QualType builtinCommonTypeImpl(Sema &S, const NestedNameSpecifier *NNS,
+ TemplateName BaseTemplate,
SourceLocation TemplateLoc,
ArrayRef Ts)
[llvm-branch-commits] [clang] [clang-tools-extra] [lldb] [clang] Template Specialization Resugaring - TypeDecl (PR #132441)
github-actions[bot] wrote:
:warning: Python code formatter, darker found issues in your code. :warning:
You can test this locally with the following command:
``bash
darker --check --diff -r
6f705031ce3646a5699a8cfdeeeb32569409be49...e621da3ff081f9efee76ed83b1a21627e0904ed0
lldb/test/API/commands/expression/import-std-module/iterator/TestIteratorFromStdModule.py
``
View the diff from darker here.
``diff
--- TestIteratorFromStdModule.py2025-03-21 18:03:03.00 +
+++ TestIteratorFromStdModule.py2025-03-21 18:19:06.368364 +
@@ -20,11 +20,15 @@
self.runCmd("settings set target.import-std-module true")
iter_type = "std::move_iterator >"
self.expect_expr("move_begin", result_type=iter_type)
-self.expect_expr("move_begin[0]",
result_type="__libcpp_remove_reference_t<__reference>", result_value="1")
+self.expect_expr(
+"move_begin[0]",
+result_type="__libcpp_remove_reference_t<__reference>",
+result_value="1",
+)
self.expect_expr("move_begin + 3 == move_end", result_value="true")
self.expect("expr move_begin++")
self.expect_expr("move_begin + 2 == move_end", result_value="true")
``
https://github.com/llvm/llvm-project/pull/132441
___
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[llvm-branch-commits] [clang] [clang] resugar decltype of DeclRefExpr (PR #132447)
https://github.com/mizvekov created
https://github.com/llvm/llvm-project/pull/132447
This keeps around the resugared DeclType for DeclRefExpr, which is otherwise
partially lost as the expression type removes top level references.
This helps 'decltype' resugaring work without any loss of information.
>From 8d8ee15d388e6ecb0e71f3a18f1f90dc28611fff Mon Sep 17 00:00:00 2001
From: Matheus Izvekov
Date: Fri, 14 Mar 2025 19:41:38 -0300
Subject: [PATCH] [clang] resugar decltype of DeclRefExpr
This keeps around the resugared DeclType for DeclRefExpr,
which is otherwise partially lost as the expression type
removes top level references.
This helps 'decltype' resugaring work without any loss
of information.
---
clang/include/clang/AST/Expr.h| 32 +++--
clang/include/clang/AST/Stmt.h| 2 +
clang/include/clang/Sema/Sema.h | 20 +++---
clang/lib/AST/ASTImporter.cpp | 3 +-
clang/lib/AST/Expr.cpp| 82 +++
clang/lib/CodeGen/CGExpr.cpp | 4 +-
clang/lib/Sema/SemaChecking.cpp | 3 +-
clang/lib/Sema/SemaDeclCXX.cpp| 19 +++---
clang/lib/Sema/SemaExpr.cpp | 81 +++---
clang/lib/Sema/SemaOpenMP.cpp | 11 ++-
clang/lib/Sema/SemaOverload.cpp | 25 ---
clang/lib/Sema/SemaSYCL.cpp | 2 +-
clang/lib/Sema/SemaTemplate.cpp | 13
clang/lib/Sema/SemaType.cpp | 9 ++-
clang/lib/Sema/TreeTransform.h| 5 +-
clang/lib/Serialization/ASTReaderStmt.cpp | 8 ++-
clang/lib/Serialization/ASTWriterStmt.cpp | 6 +-
clang/test/Sema/Resugar/resugar-expr.cpp | 6 +-
18 files changed, 201 insertions(+), 130 deletions(-)
diff --git a/clang/include/clang/AST/Expr.h b/clang/include/clang/AST/Expr.h
index 2ba787ac6df55..e92f6696027f9 100644
--- a/clang/include/clang/AST/Expr.h
+++ b/clang/include/clang/AST/Expr.h
@@ -1266,7 +1266,7 @@ class DeclRefExpr final
: public Expr,
private llvm::TrailingObjects {
+TemplateArgumentLoc, QualType> {
friend class ASTStmtReader;
friend class ASTStmtWriter;
friend TrailingObjects;
@@ -1292,17 +1292,27 @@ class DeclRefExpr final
return hasTemplateKWAndArgsInfo();
}
+ size_t numTrailingObjects(OverloadToken) const {
+return getNumTemplateArgs();
+ }
+
+ size_t numTrailingObjects(OverloadToken) const {
+return HasResugaredDeclType();
+ }
+
/// Test whether there is a distinct FoundDecl attached to the end of
/// this DRE.
bool hasFoundDecl() const { return DeclRefExprBits.HasFoundDecl; }
+ static bool needsDeclTypeStorage(ValueDecl *VD, QualType DeclType);
+
DeclRefExpr(const ASTContext &Ctx, NestedNameSpecifierLoc QualifierLoc,
SourceLocation TemplateKWLoc, ValueDecl *D,
bool RefersToEnclosingVariableOrCapture,
const DeclarationNameInfo &NameInfo, NamedDecl *FoundD,
const TemplateArgumentListInfo *TemplateArgs,
const TemplateArgumentList *ConvertedArgs, QualType T,
- ExprValueKind VK, NonOdrUseReason NOUR);
+ ExprValueKind VK, QualType DeclType, NonOdrUseReason NOUR);
/// Construct an empty declaration reference expression.
explicit DeclRefExpr(EmptyShell Empty) : Expr(DeclRefExprClass, Empty) {}
@@ -1318,7 +1328,8 @@ class DeclRefExpr final
Create(const ASTContext &Context, NestedNameSpecifierLoc QualifierLoc,
SourceLocation TemplateKWLoc, ValueDecl *D,
bool RefersToEnclosingVariableOrCapture, SourceLocation NameLoc,
- QualType T, ExprValueKind VK, NamedDecl *FoundD = nullptr,
+ QualType T, ExprValueKind VK, QualType DeclType = QualType(),
+ NamedDecl *FoundD = nullptr,
const TemplateArgumentListInfo *TemplateArgs = nullptr,
const TemplateArgumentList *ConvertedArgs = nullptr,
NonOdrUseReason NOUR = NOUR_None);
@@ -1328,7 +1339,7 @@ class DeclRefExpr final
SourceLocation TemplateKWLoc, ValueDecl *D,
bool RefersToEnclosingVariableOrCapture,
const DeclarationNameInfo &NameInfo, QualType T, ExprValueKind VK,
- NamedDecl *FoundD = nullptr,
+ QualType DeclType = QualType(), NamedDecl *FoundD = nullptr,
const TemplateArgumentListInfo *TemplateArgs = nullptr,
const TemplateArgumentList *ConvertedArgs = nullptr,
NonOdrUseReason NOUR = NOUR_None);
@@ -1337,11 +1348,22 @@ class DeclRefExpr final
static DeclRefExpr *CreateEmpty(const ASTContext &Context, bool HasQualifier,
bool HasFoundDecl,
bool HasTemplateKWAndArgsInfo,
- unsigned NumTemplateArgs);
+ unsigned NumTemplateArgs,
+ bool HasResugaredDeclType);
ValueDecl *getDecl() { return D; }
const Value
[llvm-branch-commits] [clang] [clang] resugar decltype of MemberExpr (PR #132448)
https://github.com/mizvekov created
https://github.com/llvm/llvm-project/pull/132448
This keeps around the resugared DeclType for MemberExpr, which is otherwise
partially lost as the expression type removes top level references.
This helps 'decltype' resugaring work without any loss of information.
>From 53a3db55936c22bd73b6d3c10bf31001efafeefd Mon Sep 17 00:00:00 2001
From: Matheus Izvekov
Date: Sun, 16 Mar 2025 13:44:04 -0300
Subject: [PATCH] [clang] resugar decltype of MemberExpr
This keeps around the resugared DeclType for MemberExpr,
which is otherwise partially lost as the expression type
removes top level references.
This helps 'decltype' resugaring work without any loss
of information.
---
clang/include/clang/AST/Expr.h| 33 ---
clang/include/clang/AST/Stmt.h| 4 ++
clang/include/clang/Sema/Sema.h | 6 ++-
clang/lib/AST/ASTImporter.cpp | 3 +-
clang/lib/AST/Expr.cpp| 50 ++-
clang/lib/Analysis/BodyFarm.cpp | 2 +-
clang/lib/CodeGen/CGExpr.cpp | 2 +-
clang/lib/Sema/SemaExpr.cpp | 19 +++--
clang/lib/Sema/SemaExprMember.cpp | 25 +++-
clang/lib/Sema/SemaOverload.cpp | 9 ++--
clang/lib/Sema/SemaTemplate.cpp | 11 +
clang/lib/Sema/SemaType.cpp | 2 +-
clang/lib/Serialization/ASTReaderStmt.cpp | 9 +++-
clang/lib/Serialization/ASTWriterStmt.cpp | 4 ++
clang/test/Sema/Resugar/resugar-expr.cpp | 3 +-
15 files changed, 129 insertions(+), 53 deletions(-)
diff --git a/clang/include/clang/AST/Expr.h b/clang/include/clang/AST/Expr.h
index e92f6696027f9..53afd206073ab 100644
--- a/clang/include/clang/AST/Expr.h
+++ b/clang/include/clang/AST/Expr.h
@@ -3263,7 +3263,7 @@ class MemberExpr final
: public Expr,
private llvm::TrailingObjects {
+TemplateArgumentLoc, QualType> {
friend class ASTReader;
friend class ASTStmtReader;
friend class ASTStmtWriter;
@@ -3304,13 +3304,23 @@ class MemberExpr final
return MemberExprBits.HasTemplateKWAndArgsInfo;
}
+ size_t numTrailingObjects(OverloadToken) const {
+return getNumTemplateArgs();
+ }
+
+ size_t numTrailingObjects(OverloadToken) const {
+return HasResugaredDeclType();
+ }
+
+ static bool needsDeclTypeStorage(ValueDecl *VD, QualType DeclType);
+
MemberExpr(Expr *Base, bool IsArrow, SourceLocation OperatorLoc,
NestedNameSpecifierLoc QualifierLoc, SourceLocation TemplateKWLoc,
ValueDecl *MemberDecl, DeclAccessPair FoundDecl,
const DeclarationNameInfo &NameInfo,
const TemplateArgumentListInfo *TemplateArgs,
const TemplateArgumentList *Deduced, QualType T, ExprValueKind VK,
- ExprObjectKind OK, NonOdrUseReason NOUR);
+ QualType DeclType, ExprObjectKind OK, NonOdrUseReason NOUR);
MemberExpr(EmptyShell Empty)
: Expr(MemberExprClass, Empty), Base(), MemberDecl() {}
@@ -3322,7 +3332,7 @@ class MemberExpr final
DeclAccessPair FoundDecl, DeclarationNameInfo MemberNameInfo,
const TemplateArgumentListInfo *TemplateArgs,
const TemplateArgumentList *Deduced, QualType T, ExprValueKind VK,
- ExprObjectKind OK, NonOdrUseReason NOUR);
+ QualType DeclType, ExprObjectKind OK, NonOdrUseReason NOUR);
/// Create an implicit MemberExpr, with no location, qualifier, template
/// arguments, and so on. Suitable only for non-static member access.
@@ -,14 +3343,15 @@ class MemberExpr final
return Create(C, Base, IsArrow, SourceLocation(), NestedNameSpecifierLoc(),
SourceLocation(), MemberDecl,
DeclAccessPair::make(MemberDecl, MemberDecl->getAccess()),
- DeclarationNameInfo(), nullptr, /*Deduced=*/{}, T, VK, OK,
- NOUR_None);
+ DeclarationNameInfo(), nullptr, /*Deduced=*/{}, T, VK,
+ QualType(), OK, NOUR_None);
}
static MemberExpr *CreateEmpty(const ASTContext &Context, bool HasQualifier,
bool HasFoundDecl,
bool HasTemplateKWAndArgsInfo,
- unsigned NumTemplateArgs);
+ unsigned NumTemplateArgs,
+ bool HasResugaredDeclType);
void setBase(Expr *E) { Base = E; }
Expr *getBase() const { return cast(Base); }
@@ -3351,6 +3362,16 @@ class MemberExpr final
/// static data members), a CXXMethodDecl, or an EnumConstantDecl.
ValueDecl *getMemberDecl() const { return MemberDecl; }
void setMemberDecl(ValueDecl *D);
+ void recomputeDependency();
+
+ bool HasResugaredDeclType() const {
+return MemberExprBits.HasResugaredDeclType;
+ }
+ QualType getDeclType() const {
+return HasResugaredDeclType() ? *getTrailingObjects()
+
[llvm-branch-commits] [llvm] [SDAG] Introduce inbounds flag for pointer arithmetic (PR #131862)
efriedma-quic wrote: If an pointer is constructed using inttoptr, it can be based on multiple objects. (In IR, we can see the inttoptr, but in SelectionDAG, it's treated as a noop and eliminated.) The "inbounds" rule should probably say something like this: "The base pointer must be based on one or more allocated objects for which the following applies: the base pointer has an *in bounds* address of the allocated object, and the resulting pointer is *in bounds* of the allocated object." - Actually, thinking about it a bit more, the "allocated object" referenced in the LangRef spec doesn't actually have to be live. So you also have to worry about objects which were previously allocated at the same address... which means inbounds is basically meaningless for a pointer created using inttoptr. https://github.com/llvm/llvm-project/pull/131862 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [Metadata] Preserve MD_prof when merging instructions when one is missing. (PR #132433)
llvmbot wrote:
@llvm/pr-subscribers-llvm-transforms
Author: Snehasish Kumar (snehasish)
Changes
Preserve branch weight metadata when merging instructions if one of the
instructions is missing metadata. This is similar in behaviour to what
we do today for other types of metadata such as mmra, memprof and
callsite metadata.
---
Full diff: https://github.com/llvm/llvm-project/pull/132433.diff
3 Files Affected:
- (modified) llvm/lib/Transforms/Utils/Local.cpp (+13-5)
- (added)
llvm/test/Transforms/SimplifyCFG/merge-direct-call-branch-weights-preserve-hoist.ll
(+62)
- (added)
llvm/test/Transforms/SimplifyCFG/merge-direct-call-branch-weights-preserve-sink.ll
(+62)
``diff
diff --git a/llvm/lib/Transforms/Utils/Local.cpp
b/llvm/lib/Transforms/Utils/Local.cpp
index d18adac5fa914..069ebae117b48 100644
--- a/llvm/lib/Transforms/Utils/Local.cpp
+++ b/llvm/lib/Transforms/Utils/Local.cpp
@@ -3355,9 +3355,11 @@ static void combineMetadata(Instruction *K, const
Instruction *J,
case LLVMContext::MD_invariant_group:
// Preserve !invariant.group in K.
break;
- // Keep empty cases for mmra, memprof, and callsite to prevent them from
+ // Keep empty cases for prof, mmra, memprof, and callsite to prevent
them from
// being removed as unknown metadata. The actual merging is handled
// separately below.
+ case LLVMContext::MD_prof:
+[[fallthrough]];
case LLVMContext::MD_mmra:
case LLVMContext::MD_memprof:
case LLVMContext::MD_callsite:
@@ -3386,10 +3388,6 @@ static void combineMetadata(Instruction *K, const
Instruction *J,
if (!AAOnly)
K->setMetadata(Kind, JMD);
break;
- case LLVMContext::MD_prof:
-if (!AAOnly && DoesKMove)
- K->setMetadata(Kind, MDNode::getMergedProfMetadata(KMD, JMD, K, J));
-break;
case LLVMContext::MD_noalias_addrspace:
if (DoesKMove)
K->setMetadata(Kind,
@@ -3436,6 +3434,16 @@ static void combineMetadata(Instruction *K, const
Instruction *J,
K->setMetadata(LLVMContext::MD_callsite,
MDNode::getMergedCallsiteMetadata(KCallSite, JCallSite));
}
+
+ // Merge prof metadata.
+ // Handle separately to support cases where only one instruction has the
+ // metadata.
+ auto JProf = J->getMetadata(LLVMContext::MD_prof);
+ auto KProf = K->getMetadata(LLVMContext::MD_prof);
+ if (!AAOnly && (JProf || KProf)) {
+K->setMetadata(LLVMContext::MD_prof,
+ MDNode::getMergedProfMetadata(KProf, JProf, K, J));
+ }
}
void llvm::combineMetadataForCSE(Instruction *K, const Instruction *J,
diff --git
a/llvm/test/Transforms/SimplifyCFG/merge-direct-call-branch-weights-preserve-hoist.ll
b/llvm/test/Transforms/SimplifyCFG/merge-direct-call-branch-weights-preserve-hoist.ll
new file mode 100644
index 0..2a0fc3ffc2d4d
--- /dev/null
+++
b/llvm/test/Transforms/SimplifyCFG/merge-direct-call-branch-weights-preserve-hoist.ll
@@ -0,0 +1,62 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
UTC_ARGS: --check-globals --version 2
+; RUN: opt < %s -passes='simplifycfg'
-simplifycfg-require-and-preserve-domtree=1 -S | FileCheck %s
--check-prefix=HOIST
+
+; Test case based on C++ code with manualy annotated !prof metadata.
+; This is to test that when calls to 'func1' from 'if.then' block
+; and 'if.else' block are hoisted, the branch_weights are merged and
+; attached to merged call rather than dropped.
+;
+; int func1(int a, int b) ;
+; int func2(int a, int b) ;
+
+; int func(int a, int b, bool c) {
+;int sum= 0;
+;if(c) {
+;sum += func1(a, b);
+;} else {
+;sum += func1(a, b);
+;sum -= func2(a, b);
+;}
+;return sum;
+; }
+define i32 @_Z4funciib(i32 %a, i32 %b, i1 %c) {
+; HOIST-LABEL: define i32 @_Z4funciib
+; HOIST-SAME: (i32 [[A:%.*]], i32 [[B:%.*]], i1 [[C:%.*]]) {
+; HOIST-NEXT: entry:
+; HOIST-NEXT:[[CALL:%.*]] = tail call i32 @_Z5func1ii(i32 [[A]], i32
[[B]]), !prof [[PROF0:![0-9]+]]
+; HOIST-NEXT:br i1 [[C]], label [[IF_END:%.*]], label [[IF_ELSE:%.*]]
+; HOIST: if.else:
+; HOIST-NEXT:[[CALL3:%.*]] = tail call i32 @_Z5func2ii(i32 [[A]], i32
[[B]])
+; HOIST-NEXT:[[SUB:%.*]] = sub i32 [[CALL]], [[CALL3]]
+; HOIST-NEXT:br label [[IF_END]]
+; HOIST: if.end:
+; HOIST-NEXT:[[SUM_0:%.*]] = phi i32 [ [[SUB]], [[IF_ELSE]] ], [ [[CALL]],
[[ENTRY:%.*]] ]
+; HOIST-NEXT:ret i32 [[SUM_0]]
+;
+entry:
+ br i1 %c, label %if.then, label %if.else
+
+if.then: ; preds = %entry
+ %call = tail call i32 @_Z5func1ii(i32 %a, i32 %b), !prof !0
+ br label %if.end
+
+if.else: ; preds = %entry
+ %call1 = tail call i32 @_Z5func1ii(i32 %a, i32 %b)
+ %call3 = tail call i32 @_Z5func2ii(i32 %a, i32 %b)
+ %sub = sub i32 %call1, %call3
+ br label %if.end
+
+if.end:
[llvm-branch-commits] [llvm] release/20.x: [llvm-dlltool] Add a missing dependency (PR #132483)
Martin =?utf-8?q?Storsj=C3=B6?= Message-ID: In-Reply-To: llvmbot wrote: @cjacek What do you think about merging this PR to the release branch? https://github.com/llvm/llvm-project/pull/132483 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/20.x: [llvm-dlltool] Add a missing dependency (PR #132483)
Martin =?utf-8?q?Storsjö?= Message-ID: In-Reply-To: https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/132483 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [lld] [llvm] release/20.x: [hexagon] Bump the default version to v68 (#132304) (PR #132499)
llvmbot wrote:
@llvm/pr-subscribers-clang
Author: None (llvmbot)
Changes
Backport 759ef5811e22 c0b2c10e9f3a
Requested by: @androm3da
---
Patch is 32.08 KiB, truncated to 20.00 KiB below, full version:
https://github.com/llvm/llvm-project/pull/132499.diff
23 Files Affected:
- (modified) clang/lib/Driver/ToolChains/Hexagon.cpp (+1-3)
- (added) clang/test/Driver/hexagon-cpu-default.c (+4)
- (modified) lld/ELF/Arch/Hexagon.cpp (+1-1)
- (modified) lld/docs/ReleaseNotes.rst (+5)
- (modified) lld/test/ELF/emulation-hexagon.s (+2-2)
- (modified) lld/test/ELF/hexagon-eflag.s (+3-2)
- (modified) llvm/docs/ReleaseNotes.md (+4)
- (modified) llvm/include/llvm/BinaryFormat/ELF.h (+10)
- (modified) llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp
(+1-1)
- (modified) llvm/test/CodeGen/Hexagon/arg-copy-elison.ll (+11-12)
- (modified) llvm/test/CodeGen/Hexagon/atomicrmw-cond-sub-clamp.ll (+1-3)
- (modified) llvm/test/CodeGen/Hexagon/atomicrmw-uinc-udec-wrap.ll (+6-6)
- (modified) llvm/test/CodeGen/Hexagon/bank-conflict.mir (+1-1)
- (modified) llvm/test/CodeGen/Hexagon/fixed-spill-mutable.ll (+3-2)
- (modified) llvm/test/CodeGen/Hexagon/isel-memory-vNi1.ll (+28-22)
- (modified) llvm/test/CodeGen/Hexagon/isel/logical.ll (+26-26)
- (modified) llvm/test/CodeGen/Hexagon/isel/select-i1.ll (+3-9)
- (modified) llvm/test/CodeGen/Hexagon/postinc-baseoffset.mir (+2-2)
- (modified) llvm/test/CodeGen/Hexagon/setmemrefs.ll (+1-1)
- (modified) llvm/test/MC/Hexagon/arch-support.s (+4)
- (modified) llvm/test/MC/Hexagon/hexagon_attributes.s (+8-4)
- (modified)
llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/hexagon_generated_funcs.ll.generated.expected
(+12-13)
- (modified)
llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/hexagon_generated_funcs.ll.nogenerated.expected
(+12-13)
``diff
diff --git a/clang/lib/Driver/ToolChains/Hexagon.cpp
b/clang/lib/Driver/ToolChains/Hexagon.cpp
index 76cedf312d68a..7ca5ab9af8810 100644
--- a/clang/lib/Driver/ToolChains/Hexagon.cpp
+++ b/clang/lib/Driver/ToolChains/Hexagon.cpp
@@ -802,9 +802,7 @@ bool HexagonToolChain::isAutoHVXEnabled(const
llvm::opt::ArgList &Args) {
// Returns the default CPU for Hexagon. This is the default compilation target
// if no Hexagon processor is selected at the command-line.
//
-StringRef HexagonToolChain::GetDefaultCPU() {
- return "hexagonv60";
-}
+StringRef HexagonToolChain::GetDefaultCPU() { return "hexagonv68"; }
StringRef HexagonToolChain::GetTargetCPUVersion(const ArgList &Args) {
Arg *CpuArg = nullptr;
diff --git a/clang/test/Driver/hexagon-cpu-default.c
b/clang/test/Driver/hexagon-cpu-default.c
new file mode 100644
index 0..31fb839f21656
--- /dev/null
+++ b/clang/test/Driver/hexagon-cpu-default.c
@@ -0,0 +1,4 @@
+// CHECK: "-target-cpu" "hexagonv68"
+
+// RUN: %clang -c %s -### --target=hexagon-unknown-elf \
+// RUN: 2>&1 | FileCheck %s
diff --git a/lld/ELF/Arch/Hexagon.cpp b/lld/ELF/Arch/Hexagon.cpp
index 23b60672f6317..4ba61db2733c2 100644
--- a/lld/ELF/Arch/Hexagon.cpp
+++ b/lld/ELF/Arch/Hexagon.cpp
@@ -68,7 +68,7 @@ uint32_t Hexagon::calcEFlags() const {
if (!ret || eflags > *ret)
ret = eflags;
}
- return ret.value_or(/* Default Arch Rev: */ 0x60);
+ return ret.value_or(/* Default Arch Rev: */ EF_HEXAGON_MACH_V68);
}
static uint32_t applyMask(uint32_t mask, uint32_t data) {
diff --git a/lld/docs/ReleaseNotes.rst b/lld/docs/ReleaseNotes.rst
index e13b0cf0678ce..b8604611e286e 100644
--- a/lld/docs/ReleaseNotes.rst
+++ b/lld/docs/ReleaseNotes.rst
@@ -76,6 +76,11 @@ ELF Improvements
* Supported relocation types for LoongArch target:
``R_LARCH_TLS_{LD,GD,DESC}_PCREL20_S2``.
(`#100105 `_)
+* The default Hexagon architecture version in ELF object files produced by
+ lld is changed to v68. This change is only effective when the version is
+ not provided in the command line by the user and cannot be inferred from
+ inputs.
+
Breaking changes
diff --git a/lld/test/ELF/emulation-hexagon.s b/lld/test/ELF/emulation-hexagon.s
index a8a02d4c428b5..5bdd88941c269 100644
--- a/lld/test/ELF/emulation-hexagon.s
+++ b/lld/test/ELF/emulation-hexagon.s
@@ -1,5 +1,5 @@
# REQUIRES: hexagon
-# RUN: llvm-mc -filetype=obj -triple=hexagon %s -o %t.o
+# RUN: llvm-mc -filetype=obj -triple=hexagon --mcpu=hexagonv73 %s -o %t.o
# RUN: ld.lld %t.o -o %t
# RUN: llvm-readelf --file-headers %t | FileCheck --check-prefix=CHECK %s
# RUN: ld.lld -m hexagonelf %t.o -o %t
@@ -26,7 +26,7 @@
# CHECK-NEXT:Entry point address: 0x200B4
# CHECK-NEXT:Start of program headers: 52 (bytes into file)
# CHECK-NEXT:Start of section headers:
-# CHECK-NEXT:Flags: 0x60
+# CHECK-NEXT:Flags: 0x73
# CHECK-NEXT:Size of this header: 52 (bytes)
# CHECK-NEXT:Size of program headers:
[llvm-branch-commits] [clang] [llvm] release/20.x: [Hexagon] Set the default compilation target to V68 (#125239) (PR #128597)
androm3da wrote: /cherry-pick 759ef5811e22 1abe7e8debc44d9a7e460c2be0b85b7cf137585b c0b2c10e9f3a https://github.com/llvm/llvm-project/pull/128597 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [llvm] release/20.x: [Hexagon] Set the default compilation target to V68 (#125239) (PR #128597)
https://github.com/llvmbot closed https://github.com/llvm/llvm-project/pull/128597 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
