[llvm-branch-commits] [flang] release/20.x: [flang] fix AArch64 PCS for struct following pointer (#127802) (PR #128518)
https://github.com/nikic approved this pull request. Backporting crash fixes is fine at this point, especially if they're simple and self-contained like this. https://github.com/llvm/llvm-project/pull/128518 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/20.x: [LV][VPlan] Prevent calculate cost for skiped instructions in precomputeCosts(). (#127966) (PR #128694)
https://github.com/llvmbot created
https://github.com/llvm/llvm-project/pull/128694
Backport 8009c1f
Requested by: @fhahn
>From 508d5e45a57affceeb87e69a99ebb65efde88478 Mon Sep 17 00:00:00 2001
From: Elvis Wang
Date: Tue, 25 Feb 2025 11:09:09 +0800
Subject: [PATCH] [LV][VPlan] Prevent calculate cost for skiped instructions in
precomputeCosts(). (#127966)
Skip calculating instruction costs for exit conditions in
precomputeCosts() when it should be skipped.
Reported from:
https://github.com/llvm/llvm-project/issues/115744#issuecomment-2670479463
Godbolt for reduced test cases: https://godbolt.org/z/fr4YMeqcv
(cherry picked from commit 8009c1fd81ad0b6ac65724d2b134a92db48f8fbf)
---
.../Transforms/Vectorize/LoopVectorize.cpp| 5 +-
.../LoopVectorize/X86/cost-model.ll | 124 ++
2 files changed, 127 insertions(+), 2 deletions(-)
diff --git a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
index 0ceeec48487f6..7cd395255163a 100644
--- a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+++ b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
@@ -7239,7 +7239,7 @@ LoopVectorizationPlanner::precomputeCosts(VPlan &Plan,
ElementCount VF,
// Collect all exit conditions.
for (BasicBlock *EB : Exiting) {
auto *Term = dyn_cast(EB->getTerminator());
-if (!Term)
+if (!Term || CostCtx.skipCostComputation(Term, VF.isVector()))
continue;
if (auto *CondI = dyn_cast(Term->getOperand(0))) {
ExitInstrs.insert(CondI);
@@ -7259,7 +7259,8 @@ LoopVectorizationPlanner::precomputeCosts(VPlan &Plan,
ElementCount VF,
Cost += CondICost;
for (Value *Op : CondI->operands()) {
auto *OpI = dyn_cast(Op);
- if (!OpI || any_of(OpI->users(), [&ExitInstrs, this](User *U) {
+ if (!OpI || CostCtx.skipCostComputation(OpI, VF.isVector()) ||
+ any_of(OpI->users(), [&ExitInstrs, this](User *U) {
return OrigLoop->contains(cast(U)->getParent()) &&
!ExitInstrs.contains(cast(U));
}))
diff --git a/llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
b/llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
index bd28e28ddff95..1b2aaa373f2c8 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
@@ -1211,6 +1211,130 @@ exit:
ret i32 %or
}
+; Check if the vplan-based cost model select same VF to the legacy cost model.
+; Reduced from:
https://github.com/llvm/llvm-project/issues/115744#issuecomment-2670479463
+define i32 @g(i64 %n) {
+; CHECK-LABEL: @g(
+; CHECK-NEXT: iter.check:
+; CHECK-NEXT:[[TMP0:%.*]] = trunc i64 [[N:%.*]] to i32
+; CHECK-NEXT:[[TMP1:%.*]] = add i32 [[TMP0]], 1
+; CHECK-NEXT:[[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[TMP1]], 4
+; CHECK-NEXT:br i1 [[MIN_ITERS_CHECK]], label
[[VEC_EPILOG_SCALAR_PH:%.*]], label [[VECTOR_SCEVCHECK:%.*]]
+; CHECK: vector.scevcheck:
+; CHECK-NEXT:[[TMP2:%.*]] = icmp ugt i64 [[N]], 4294967295
+; CHECK-NEXT:br i1 [[TMP2]], label [[VEC_EPILOG_SCALAR_PH]], label
[[VECTOR_MAIN_LOOP_ITER_CHECK:%.*]]
+; CHECK: vector.main.loop.iter.check:
+; CHECK-NEXT:[[MIN_ITERS_CHECK1:%.*]] = icmp ult i32 [[TMP1]], 16
+; CHECK-NEXT:br i1 [[MIN_ITERS_CHECK1]], label [[VEC_EPILOG_PH:%.*]],
label [[VECTOR_PH:%.*]]
+; CHECK: vector.ph:
+; CHECK-NEXT:[[N_MOD_VF:%.*]] = urem i32 [[TMP1]], 16
+; CHECK-NEXT:[[N_VEC:%.*]] = sub i32 [[TMP1]], [[N_MOD_VF]]
+; CHECK-NEXT:[[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i64>
poison, i64 [[N]], i64 0
+; CHECK-NEXT:[[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i64>
[[BROADCAST_SPLATINSERT]], <4 x i64> poison, <4 x i32> zeroinitializer
+; CHECK-NEXT:br label [[VECTOR_BODY:%.*]]
+; CHECK: vector.body:
+; CHECK-NEXT:[[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [
[[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
+; CHECK-NEXT:[[VEC_IND:%.*]] = phi <4 x i32> [ , [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ]
+; CHECK-NEXT:[[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer,
[[VECTOR_PH]] ], [ [[TMP15:%.*]], [[VECTOR_BODY]] ]
+; CHECK-NEXT:[[VEC_PHI2:%.*]] = phi <4 x i32> [ zeroinitializer,
[[VECTOR_PH]] ], [ [[TMP16:%.*]], [[VECTOR_BODY]] ]
+; CHECK-NEXT:[[VEC_PHI3:%.*]] = phi <4 x i32> [ zeroinitializer,
[[VECTOR_PH]] ], [ [[TMP17:%.*]], [[VECTOR_BODY]] ]
+; CHECK-NEXT:[[VEC_PHI4:%.*]] = phi <4 x i32> [ zeroinitializer,
[[VECTOR_PH]] ], [ [[TMP18:%.*]], [[VECTOR_BODY]] ]
+; CHECK-NEXT:[[STEP_ADD:%.*]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
+; CHECK-NEXT:[[STEP_ADD_2:%.*]] = add <4 x i32> [[STEP_ADD]], splat (i32 4)
+; CHECK-NEXT:[[STEP_ADD_3:%.*]] = add <4 x i32> [[STEP_ADD_2]], splat (i32
4)
+; CHECK-NEXT:[[TMP3:%.*]] = zext <4 x i32> [[VEC_IND]] to <4 x i64>
+; CHECK-NEXT:[[TMP4:%.*]] = zext <4 x i32> [[STEP_ADD]] to <4 x i64>
+; CHECK-NEXT:[[TMP5:%.*]] = zext <4 x i32> [[STEP_ADD_2]]
[llvm-branch-commits] [llvm] release/20.x: [LV][VPlan] Prevent calculate cost for skiped instructions in precomputeCosts(). (#127966) (PR #128694)
llvmbot wrote: @fhahn What do you think about merging this PR to the release branch? https://github.com/llvm/llvm-project/pull/128694 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/20.x: [LV][VPlan] Prevent calculate cost for skiped instructions in precomputeCosts(). (#127966) (PR #128694)
llvmbot wrote:
@llvm/pr-subscribers-vectorizers
@llvm/pr-subscribers-llvm-transforms
Author: None (llvmbot)
Changes
Backport 8009c1f
Requested by: @fhahn
---
Full diff: https://github.com/llvm/llvm-project/pull/128694.diff
2 Files Affected:
- (modified) llvm/lib/Transforms/Vectorize/LoopVectorize.cpp (+3-2)
- (modified) llvm/test/Transforms/LoopVectorize/X86/cost-model.ll (+124)
``diff
diff --git a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
index 0ceeec48487f6..7cd395255163a 100644
--- a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+++ b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
@@ -7239,7 +7239,7 @@ LoopVectorizationPlanner::precomputeCosts(VPlan &Plan,
ElementCount VF,
// Collect all exit conditions.
for (BasicBlock *EB : Exiting) {
auto *Term = dyn_cast(EB->getTerminator());
-if (!Term)
+if (!Term || CostCtx.skipCostComputation(Term, VF.isVector()))
continue;
if (auto *CondI = dyn_cast(Term->getOperand(0))) {
ExitInstrs.insert(CondI);
@@ -7259,7 +7259,8 @@ LoopVectorizationPlanner::precomputeCosts(VPlan &Plan,
ElementCount VF,
Cost += CondICost;
for (Value *Op : CondI->operands()) {
auto *OpI = dyn_cast(Op);
- if (!OpI || any_of(OpI->users(), [&ExitInstrs, this](User *U) {
+ if (!OpI || CostCtx.skipCostComputation(OpI, VF.isVector()) ||
+ any_of(OpI->users(), [&ExitInstrs, this](User *U) {
return OrigLoop->contains(cast(U)->getParent()) &&
!ExitInstrs.contains(cast(U));
}))
diff --git a/llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
b/llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
index bd28e28ddff95..1b2aaa373f2c8 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
@@ -1211,6 +1211,130 @@ exit:
ret i32 %or
}
+; Check if the vplan-based cost model select same VF to the legacy cost model.
+; Reduced from:
https://github.com/llvm/llvm-project/issues/115744#issuecomment-2670479463
+define i32 @g(i64 %n) {
+; CHECK-LABEL: @g(
+; CHECK-NEXT: iter.check:
+; CHECK-NEXT:[[TMP0:%.*]] = trunc i64 [[N:%.*]] to i32
+; CHECK-NEXT:[[TMP1:%.*]] = add i32 [[TMP0]], 1
+; CHECK-NEXT:[[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[TMP1]], 4
+; CHECK-NEXT:br i1 [[MIN_ITERS_CHECK]], label
[[VEC_EPILOG_SCALAR_PH:%.*]], label [[VECTOR_SCEVCHECK:%.*]]
+; CHECK: vector.scevcheck:
+; CHECK-NEXT:[[TMP2:%.*]] = icmp ugt i64 [[N]], 4294967295
+; CHECK-NEXT:br i1 [[TMP2]], label [[VEC_EPILOG_SCALAR_PH]], label
[[VECTOR_MAIN_LOOP_ITER_CHECK:%.*]]
+; CHECK: vector.main.loop.iter.check:
+; CHECK-NEXT:[[MIN_ITERS_CHECK1:%.*]] = icmp ult i32 [[TMP1]], 16
+; CHECK-NEXT:br i1 [[MIN_ITERS_CHECK1]], label [[VEC_EPILOG_PH:%.*]],
label [[VECTOR_PH:%.*]]
+; CHECK: vector.ph:
+; CHECK-NEXT:[[N_MOD_VF:%.*]] = urem i32 [[TMP1]], 16
+; CHECK-NEXT:[[N_VEC:%.*]] = sub i32 [[TMP1]], [[N_MOD_VF]]
+; CHECK-NEXT:[[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i64>
poison, i64 [[N]], i64 0
+; CHECK-NEXT:[[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i64>
[[BROADCAST_SPLATINSERT]], <4 x i64> poison, <4 x i32> zeroinitializer
+; CHECK-NEXT:br label [[VECTOR_BODY:%.*]]
+; CHECK: vector.body:
+; CHECK-NEXT:[[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [
[[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
+; CHECK-NEXT:[[VEC_IND:%.*]] = phi <4 x i32> [ , [[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], [[VECTOR_BODY]] ]
+; CHECK-NEXT:[[VEC_PHI:%.*]] = phi <4 x i32> [ zeroinitializer,
[[VECTOR_PH]] ], [ [[TMP15:%.*]], [[VECTOR_BODY]] ]
+; CHECK-NEXT:[[VEC_PHI2:%.*]] = phi <4 x i32> [ zeroinitializer,
[[VECTOR_PH]] ], [ [[TMP16:%.*]], [[VECTOR_BODY]] ]
+; CHECK-NEXT:[[VEC_PHI3:%.*]] = phi <4 x i32> [ zeroinitializer,
[[VECTOR_PH]] ], [ [[TMP17:%.*]], [[VECTOR_BODY]] ]
+; CHECK-NEXT:[[VEC_PHI4:%.*]] = phi <4 x i32> [ zeroinitializer,
[[VECTOR_PH]] ], [ [[TMP18:%.*]], [[VECTOR_BODY]] ]
+; CHECK-NEXT:[[STEP_ADD:%.*]] = add <4 x i32> [[VEC_IND]], splat (i32 4)
+; CHECK-NEXT:[[STEP_ADD_2:%.*]] = add <4 x i32> [[STEP_ADD]], splat (i32 4)
+; CHECK-NEXT:[[STEP_ADD_3:%.*]] = add <4 x i32> [[STEP_ADD_2]], splat (i32
4)
+; CHECK-NEXT:[[TMP3:%.*]] = zext <4 x i32> [[VEC_IND]] to <4 x i64>
+; CHECK-NEXT:[[TMP4:%.*]] = zext <4 x i32> [[STEP_ADD]] to <4 x i64>
+; CHECK-NEXT:[[TMP5:%.*]] = zext <4 x i32> [[STEP_ADD_2]] to <4 x i64>
+; CHECK-NEXT:[[TMP6:%.*]] = zext <4 x i32> [[STEP_ADD_3]] to <4 x i64>
+; CHECK-NEXT:[[TMP7:%.*]] = icmp eq <4 x i64> [[BROADCAST_SPLAT]], [[TMP3]]
+; CHECK-NEXT:[[TMP8:%.*]] = icmp eq <4 x i64> [[BROADCAST_SPLAT]], [[TMP4]]
+; CHECK-NEXT:[[TMP9:%.*]] = icmp eq <4 x i64> [[BROADCAST_SPLAT]], [[TMP5]]
+; CHECK-NEXT:[[TMP10:%.*]] = icmp eq <4 x i64> [[BROADCAST_SPLAT]],
[[TMP6]]
+; CHECK-NEXT:[[TMP11:%.*]] = select <4 x i1
[llvm-branch-commits] [llvm] release/20.x: [LV][VPlan] Prevent calculate cost for skiped instructions in precomputeCosts(). (#127966) (PR #128694)
https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/128694 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [flang] release/20.x: [flang] fix AArch64 PCS for struct following pointer (#127802) (PR #128518)
https://github.com/tblah approved this pull request. https://github.com/llvm/llvm-project/pull/128518 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/20.x: [LV][VPlan] Prevent calculate cost for skiped instructions in precomputeCosts(). (#127966) (PR #128694)
https://github.com/fhahn approved this pull request. This fixes a potential crash with assertions enabled, would be good to pick to avoid assertions. https://github.com/llvm/llvm-project/pull/128694 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/20.x: [Support] Ensure complete type DelimitedScope (#127459) (PR #128686)
https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/128686 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/20.x: [Support] Ensure complete type DelimitedScope (#127459) (PR #128686)
llvmbot wrote:
@llvm/pr-subscribers-llvm-support
Author: None (llvmbot)
Changes
Backport e65d3882af6fcc15342451ad4f9494b1ba6b9b9d
Requested by: @hahnjo
---
Full diff: https://github.com/llvm/llvm-project/pull/128686.diff
1 Files Affected:
- (modified) llvm/include/llvm/Support/ScopedPrinter.h (+7-9)
``diff
diff --git a/llvm/include/llvm/Support/ScopedPrinter.h
b/llvm/include/llvm/Support/ScopedPrinter.h
index 419ab97366796..506b40a09ed78 100644
--- a/llvm/include/llvm/Support/ScopedPrinter.h
+++ b/llvm/include/llvm/Support/ScopedPrinter.h
@@ -539,7 +539,13 @@ ScopedPrinter::printHex(StringRef
Label,
startLine() << Label << ": " << hex(Value) << "\n";
}
-struct DelimitedScope;
+struct DelimitedScope {
+ DelimitedScope(ScopedPrinter &W) : W(&W) {}
+ DelimitedScope() : W(nullptr) {}
+ virtual ~DelimitedScope() = default;
+ virtual void setPrinter(ScopedPrinter &W) = 0;
+ ScopedPrinter *W;
+};
class JSONScopedPrinter : public ScopedPrinter {
private:
@@ -838,14 +844,6 @@ class JSONScopedPrinter : public ScopedPrinter {
}
};
-struct DelimitedScope {
- DelimitedScope(ScopedPrinter &W) : W(&W) {}
- DelimitedScope() : W(nullptr) {}
- virtual ~DelimitedScope() = default;
- virtual void setPrinter(ScopedPrinter &W) = 0;
- ScopedPrinter *W;
-};
-
struct DictScope : DelimitedScope {
explicit DictScope() = default;
explicit DictScope(ScopedPrinter &W) : DelimitedScope(W) { W.objectBegin(); }
``
https://github.com/llvm/llvm-project/pull/128686
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/20.x: [Support] Ensure complete type DelimitedScope (#127459) (PR #128686)
https://github.com/llvmbot created
https://github.com/llvm/llvm-project/pull/128686
Backport e65d3882af6fcc15342451ad4f9494b1ba6b9b9d
Requested by: @hahnjo
>From 84aebf371d0e6adc6fb9b5ed5c57655377572cca Mon Sep 17 00:00:00 2001
From: Jonas Hahnfeld
Date: Fri, 21 Feb 2025 21:19:56 +0100
Subject: [PATCH] [Support] Ensure complete type DelimitedScope (#127459)
`JSONScopedPrinter` has a `std::unique_ptr` member and
defaulted constructor argument, so it needs a complete type. This
resolves one of the many build errors with C++23 using Clang.
(cherry picked from commit e65d3882af6fcc15342451ad4f9494b1ba6b9b9d)
---
llvm/include/llvm/Support/ScopedPrinter.h | 16 +++-
1 file changed, 7 insertions(+), 9 deletions(-)
diff --git a/llvm/include/llvm/Support/ScopedPrinter.h
b/llvm/include/llvm/Support/ScopedPrinter.h
index 419ab97366796..506b40a09ed78 100644
--- a/llvm/include/llvm/Support/ScopedPrinter.h
+++ b/llvm/include/llvm/Support/ScopedPrinter.h
@@ -539,7 +539,13 @@ ScopedPrinter::printHex(StringRef
Label,
startLine() << Label << ": " << hex(Value) << "\n";
}
-struct DelimitedScope;
+struct DelimitedScope {
+ DelimitedScope(ScopedPrinter &W) : W(&W) {}
+ DelimitedScope() : W(nullptr) {}
+ virtual ~DelimitedScope() = default;
+ virtual void setPrinter(ScopedPrinter &W) = 0;
+ ScopedPrinter *W;
+};
class JSONScopedPrinter : public ScopedPrinter {
private:
@@ -838,14 +844,6 @@ class JSONScopedPrinter : public ScopedPrinter {
}
};
-struct DelimitedScope {
- DelimitedScope(ScopedPrinter &W) : W(&W) {}
- DelimitedScope() : W(nullptr) {}
- virtual ~DelimitedScope() = default;
- virtual void setPrinter(ScopedPrinter &W) = 0;
- ScopedPrinter *W;
-};
-
struct DictScope : DelimitedScope {
explicit DictScope() = default;
explicit DictScope(ScopedPrinter &W) : DelimitedScope(W) { W.objectBegin(); }
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/20.x: [Support] Ensure complete type DelimitedScope (#127459) (PR #128686)
llvmbot wrote: @dwblaikie What do you think about merging this PR to the release branch? https://github.com/llvm/llvm-project/pull/128686 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] release/20.x: [Serialization] Update DECL_LAST (PR #128690)
https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/128690 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] release/20.x: [Serialization] Update DECL_LAST (PR #128690)
https://github.com/llvmbot created
https://github.com/llvm/llvm-project/pull/128690
Backport 366daddfad9aa38ebb7d40055cf65f4ecb7dd6f9
Requested by: @ChuanqiXu9
>From ae054ed78e210b120cc86b5dae802151f542fdb3 Mon Sep 17 00:00:00 2001
From: Chuanqi Xu
Date: Tue, 25 Feb 2025 13:29:42 +0800
Subject: [PATCH] [Serialization] Update DECL_LAST
Address post commit review at
https://github.com/llvm/llvm-project/pull/119333#pullrequestreview-2637471908
(cherry picked from commit 366daddfad9aa38ebb7d40055cf65f4ecb7dd6f9)
---
clang/include/clang/Serialization/ASTBitCodes.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/clang/include/clang/Serialization/ASTBitCodes.h
b/clang/include/clang/Serialization/ASTBitCodes.h
index 1b56ed2c9776b..d60cb655aa261 100644
--- a/clang/include/clang/Serialization/ASTBitCodes.h
+++ b/clang/include/clang/Serialization/ASTBitCodes.h
@@ -1522,13 +1522,13 @@ enum DeclCode {
/// An ImplicitConceptSpecializationDecl record.
DECL_IMPLICIT_CONCEPT_SPECIALIZATION,
- // A decls specilization record.
+ // A decls specialization record.
DECL_SPECIALIZATIONS,
- // A decls specilization record.
+ // A decls specialization record.
DECL_PARTIAL_SPECIALIZATIONS,
- DECL_LAST = DECL_IMPLICIT_CONCEPT_SPECIALIZATION
+ DECL_LAST = DECL_PARTIAL_SPECIALIZATIONS
};
/// Record codes for each kind of statement or expression.
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] release/20.x: [Serialization] Update DECL_LAST (PR #128690)
llvmbot wrote:
@llvm/pr-subscribers-clang-modules
@llvm/pr-subscribers-clang
Author: None (llvmbot)
Changes
Backport 366daddfad9aa38ebb7d40055cf65f4ecb7dd6f9
Requested by: @ChuanqiXu9
---
Full diff: https://github.com/llvm/llvm-project/pull/128690.diff
1 Files Affected:
- (modified) clang/include/clang/Serialization/ASTBitCodes.h (+3-3)
``diff
diff --git a/clang/include/clang/Serialization/ASTBitCodes.h
b/clang/include/clang/Serialization/ASTBitCodes.h
index 1b56ed2c9776b..d60cb655aa261 100644
--- a/clang/include/clang/Serialization/ASTBitCodes.h
+++ b/clang/include/clang/Serialization/ASTBitCodes.h
@@ -1522,13 +1522,13 @@ enum DeclCode {
/// An ImplicitConceptSpecializationDecl record.
DECL_IMPLICIT_CONCEPT_SPECIALIZATION,
- // A decls specilization record.
+ // A decls specialization record.
DECL_SPECIALIZATIONS,
- // A decls specilization record.
+ // A decls specialization record.
DECL_PARTIAL_SPECIALIZATIONS,
- DECL_LAST = DECL_IMPLICIT_CONCEPT_SPECIALIZATION
+ DECL_LAST = DECL_PARTIAL_SPECIALIZATIONS
};
/// Record codes for each kind of statement or expression.
``
https://github.com/llvm/llvm-project/pull/128690
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [HLSL] Refactor Offset calculation while writing Root Signatures. (PR #128577)
https://github.com/bogner approved this pull request. https://github.com/llvm/llvm-project/pull/128577 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [HLSL] Refactor Offset calculation while writing Root Signatures. (PR #128577)
@@ -134,12 +134,12 @@ TEST(RootSignature, ParseRootFlags) {
)"));
uint8_t Buffer[] = {
- 0x44, 0x58, 0x42, 0x43, 0x32, 0x9A, 0x53, 0xD8, 0xEC, 0xBE, 0x35, 0x6F,
- 0x05, 0x39, 0xE1, 0xFE, 0x31, 0x20, 0xF0, 0xC1, 0x01, 0x00, 0x00, 0x00,
+ 0x44, 0x58, 0x42, 0x43, 0x32, 0x9a, 0x53, 0xd8, 0xec, 0xbe, 0x35, 0x6f,
+ 0x05, 0x39, 0xe1, 0xfe, 0x31, 0x20, 0xf0, 0xc1, 0x01, 0x00, 0x00, 0x00,
0x44, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x24, 0x00, 0x00, 0x00,
0x52, 0x54, 0x53, 0x30, 0x18, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x18, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
};
joaosaffran wrote:
Yes
https://github.com/llvm/llvm-project/pull/128577
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [llvm] [PowerPC] Update LLVM 20.1.0 Release Notes (PR #128764)
github-actions[bot] wrote: @amy-kwan (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. When you are done, please add the release:note label to this PR. https://github.com/llvm/llvm-project/pull/128764 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [llvm] [PowerPC] Update LLVM 20.1.0 Release Notes (PR #128764)
https://github.com/tstellar closed https://github.com/llvm/llvm-project/pull/128764 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] 5d3b9e2 - [PowerPC] Update LLVM 20.1.0 Release Notes (#128764)
Author: Amy Kwan Date: 2025-02-25T15:01:32-08:00 New Revision: 5d3b9e2f92bbb6c1f3b4bb68f1f63aff72aaa7b1 URL: https://github.com/llvm/llvm-project/commit/5d3b9e2f92bbb6c1f3b4bb68f1f63aff72aaa7b1 DIFF: https://github.com/llvm/llvm-project/commit/5d3b9e2f92bbb6c1f3b4bb68f1f63aff72aaa7b1.diff LOG: [PowerPC] Update LLVM 20.1.0 Release Notes (#128764) This PR adds LLVM 20.1.0 release notes that are related to the PowerPC target. - Co-authored-by: Hubert Tong Added: Modified: clang/docs/ReleaseNotes.rst llvm/docs/ReleaseNotes.md Removed: diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst index a2518042cb5b0..153afdb3d59e3 100644 --- a/clang/docs/ReleaseNotes.rst +++ b/clang/docs/ReleaseNotes.rst @@ -1269,6 +1269,8 @@ CUDA Support AIX Support ^^^ +- Fixed the ``-print-runtime-dir`` option. +- Enable continuous profile syncing feature on AIX. NetBSD Support ^^ diff --git a/llvm/docs/ReleaseNotes.md b/llvm/docs/ReleaseNotes.md index e654509792652..958b7adbc4c36 100644 --- a/llvm/docs/ReleaseNotes.md +++ b/llvm/docs/ReleaseNotes.md @@ -263,7 +263,23 @@ Changes to the PowerPC Backend -- * The Linux `ppc64` LLC default cpu is updated from `ppc` to `ppc64`. -* The AIX LLC default cpu is updated from `generic` to `pwr7`. +* Replaced PPCMergeStringPool with GlobalMerge. +* Disabled vsx and altivec when -msoft-float is used. +* Added support for -mcpu=pwr11 -mtune=pwr11. +* Implemented BCD assist builtins. +* Expanded global named register support. +* Updated to use tablegen's MatchRegisterName(). +* Fixed saving of Link Register when using ROP Protect. +* Fixed SUBREG_TO_REG handling in the RegisterCoalescer. +* Fixed data layout alignment of i128 to 16. +* Fixed codegen for transparent_union function parameters. +* Added an error for incorrect use of memory operands. +* Other various bug fixes and codegen improvements. + +AIX Specific: +* LLC default cpu is updated from `generic` to `pwr7`. +* Fixed handling in emitGlobalConstantImpl to emit aliases to subobjects at proper offsets. +* Enabled aggressive merging of constants to reduce TOC entries. Changes to the RISC-V Backend - @@ -478,6 +494,10 @@ Changes to the LLVM tools * llvm-objcopy now prints the correct file path in the error message when the output file specified by `--dump-section` cannot be opened. +* llvm-cxxfilt now supports demangling call expressions encoded using `cp` instead of `cl`. + +* llvm-objdump now supports printing the file header, load section header and auxiliary header for XCOFF object files under the ``--private-headers`` option. + Changes to LLDB - @@ -630,6 +650,14 @@ Changes to BOLT Changes to Sanitizers - +Changes to the Profile Runtime +-- + +* On platforms where ``atexit``-registered functions are not called when + a DSO is ``dlclose``'d, a mechanism is added that implements this + missing functionality for calls to ``atexit`` in the profile runtime. + [This is currently only enabled on AIX](https://github.com/llvm/llvm-project/pull/102940). + Other Changes - ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] release/20.x: [CMake][Release] Statically link ZSTD on all OSes (#128554) (PR #128793)
keith wrote: Seems good to me! https://github.com/llvm/llvm-project/pull/128793 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [HLSL] Refactor Offset calculation while writing Root Signatures. (PR #128577)
https://github.com/joaosaffran updated
https://github.com/llvm/llvm-project/pull/128577
>From 767b7d02bf71e6e0137e2b5f9f9b8d8b799ac81f Mon Sep 17 00:00:00 2001
From: joaosaffran
Date: Sat, 22 Feb 2025 06:19:15 +
Subject: [PATCH 01/11] first working version
---
.../llvm/MC/DXContainerRootSignature.h| 5 +-
llvm/lib/MC/DXContainerRootSignature.cpp | 90 +--
llvm/lib/Object/DXContainer.cpp | 10 ++-
llvm/lib/ObjectYAML/DXContainerEmitter.cpp| 4 +-
.../lib/Target/DirectX/DXContainerGlobals.cpp | 5 +-
.../ContainerData/RootSignature-Flags.ll | 2 +-
.../DXContainer/RootSignature-Flags.yaml | 2 +-
.../RootSignature-MultipleParameters.yaml | 2 +-
.../ObjectYAML/DXContainerYAMLTest.cpp| 8 +-
9 files changed, 85 insertions(+), 43 deletions(-)
diff --git a/llvm/include/llvm/MC/DXContainerRootSignature.h
b/llvm/include/llvm/MC/DXContainerRootSignature.h
index b31b0da352038..cae4f79aef56f 100644
--- a/llvm/include/llvm/MC/DXContainerRootSignature.h
+++ b/llvm/include/llvm/MC/DXContainerRootSignature.h
@@ -7,8 +7,7 @@
//===--===//
#include "llvm/BinaryFormat/DXContainer.h"
-#include
-#include
+#include "llvm/Support/raw_ostream.h"
namespace llvm {
@@ -19,7 +18,7 @@ struct RootSignatureDesc {
dxbc::RootSignatureHeader Header;
SmallVector Parameters;
- void write(raw_ostream &OS) const;
+ Error write(raw_ostream &OS) const;
};
} // namespace mcdxbc
} // namespace llvm
diff --git a/llvm/lib/MC/DXContainerRootSignature.cpp
b/llvm/lib/MC/DXContainerRootSignature.cpp
index 35a4ef322d01e..9a279ab722877 100644
--- a/llvm/lib/MC/DXContainerRootSignature.cpp
+++ b/llvm/lib/MC/DXContainerRootSignature.cpp
@@ -7,53 +7,89 @@
//===--===//
#include "llvm/MC/DXContainerRootSignature.h"
-#include "llvm/Support/EndianStream.h"
+#include "llvm/Support/BinaryStreamWriter.h"
+#include
using namespace llvm;
using namespace llvm::mcdxbc;
-void RootSignatureDesc::write(raw_ostream &OS) const {
- // Root signature header in dxcontainer has 6 uint_32t values.
- const uint32_t HeaderSize = 24;
- const uint32_t ParameterByteSize = Parameters.size_in_bytes();
- const uint32_t NumParametes = Parameters.size();
+Error RootSignatureDesc::write(raw_ostream &OS) const {
+ // Header Size + accounting for parameter offset + parameters size
+ std::vector Buffer(24 + (Parameters.size() * 4) +
+ Parameters.size_in_bytes());
+ BinaryStreamWriter Writer(Buffer, llvm::endianness::little);
+
+ SmallVector OffsetsToReplace;
+ SmallVector ValuesToReplaceOffsetsWith;
+ const uint32_t Dummy = std::numeric_limits::max();
+
+ const uint32_t NumParameters = Parameters.size();
const uint32_t Zero = 0;
- // Writing header information
- support::endian::write(OS, Header.Version, llvm::endianness::little);
- support::endian::write(OS, NumParametes, llvm::endianness::little);
- support::endian::write(OS, HeaderSize, llvm::endianness::little);
+ if (Error Err = Writer.writeInteger(Header.Version))
+return Err;
+
+ if (Error Err = Writer.writeInteger(NumParameters))
+return Err;
+
+ OffsetsToReplace.push_back(Writer.getOffset());
+ if (Error Err = Writer.writeInteger(Dummy))
+return Err;
// Static samplers still not implemented
- support::endian::write(OS, Zero, llvm::endianness::little);
- support::endian::write(OS, ParameterByteSize + HeaderSize,
- llvm::endianness::little);
+ if (Error Err = Writer.writeInteger(Zero))
+return Err;
+
+ if (Error Err = Writer.writeInteger(Zero))
+return Err;
+
+ if (Error Err = Writer.writeInteger(Header.Flags))
+return Err;
- support::endian::write(OS, Header.Flags, llvm::endianness::little);
+ ValuesToReplaceOffsetsWith.push_back(Writer.getOffset());
- uint32_t ParamsOffset =
- HeaderSize + (3 * sizeof(uint32_t) * Parameters.size());
for (const dxbc::RootParameter &P : Parameters) {
-support::endian::write(OS, P.ParameterType, llvm::endianness::little);
-support::endian::write(OS, P.ShaderVisibility, llvm::endianness::little);
-support::endian::write(OS, ParamsOffset, llvm::endianness::little);
+if (Error Err = Writer.writeEnum(P.ParameterType))
+ return Err;
+if (Error Err = Writer.writeEnum(P.ShaderVisibility))
+ return Err;
-// Size of root parameter, removing the ParameterType and ShaderVisibility.
-ParamsOffset += sizeof(dxbc::RootParameter) - 2 * sizeof(uint32_t);
+OffsetsToReplace.push_back(Writer.getOffset());
+if (Error Err = Writer.writeInteger(Dummy))
+ return Err;
}
for (const dxbc::RootParameter &P : Parameters) {
+ValuesToReplaceOffsetsWith.push_back(Writer.getOffset());
switch (P.ParameterType) {
case dxbc::RootParameterType::Constants32Bit: {
- support::endia
[llvm-branch-commits] [llvm] RegAllocFast: Fix verifier errors after assigning to reserved registers (PR #128281)
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/128281
>From d93b45487feba452868706b31e6e59e0bb1a5d19 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Thu, 12 Dec 2024 10:53:41 +0900
Subject: [PATCH 1/2] RegAllocFast: Fix verifier errors after assigning to
reserved registers
---
llvm/lib/CodeGen/RegAllocFast.cpp | 41 ---
...ut-of-registers-error-all-regs-reserved.ll | 3 +-
2 files changed, 28 insertions(+), 16 deletions(-)
diff --git a/llvm/lib/CodeGen/RegAllocFast.cpp
b/llvm/lib/CodeGen/RegAllocFast.cpp
index 14128dafbe4ee..9f92c11826cce 100644
--- a/llvm/lib/CodeGen/RegAllocFast.cpp
+++ b/llvm/lib/CodeGen/RegAllocFast.cpp
@@ -206,6 +206,7 @@ class RegAllocFastImpl {
bool Error = false; ///< Could not allocate.
explicit LiveReg(Register VirtReg) : VirtReg(VirtReg) {}
+explicit LiveReg() {}
unsigned getSparseSetIndex() const { return VirtReg.virtRegIndex(); }
};
@@ -216,7 +217,7 @@ class RegAllocFastImpl {
LiveRegMap LiveVirtRegs;
/// Stores assigned virtual registers present in the bundle MI.
- DenseMap BundleVirtRegsMap;
+ DenseMap BundleVirtRegsMap;
DenseMap> LiveDbgValueMap;
/// List of DBG_VALUE that we encountered without the vreg being assigned
@@ -374,7 +375,8 @@ class RegAllocFastImpl {
SmallSet &PrologLiveIns) const;
void reloadAtBegin(MachineBasicBlock &MBB);
- bool setPhysReg(MachineInstr &MI, MachineOperand &MO, MCPhysReg PhysReg);
+ bool setPhysReg(MachineInstr &MI, MachineOperand &MO,
+ const LiveReg &Assignment);
Register traceCopies(Register VirtReg) const;
Register traceCopyChain(Register Reg) const;
@@ -1005,7 +1007,8 @@ void RegAllocFastImpl::allocVirtRegUndef(MachineOperand
&MO) {
MO.setSubReg(0);
}
MO.setReg(PhysReg);
- MO.setIsRenamable(true);
+ if (!LRI->Error)
+MO.setIsRenamable(true);
}
/// Variation of defineVirtReg() with special handling for livethrough regs
@@ -1109,10 +1112,10 @@ bool RegAllocFastImpl::defineVirtReg(MachineInstr &MI,
unsigned OpNum,
LRI->Reloaded = false;
}
if (MI.getOpcode() == TargetOpcode::BUNDLE) {
-BundleVirtRegsMap[VirtReg] = PhysReg;
+BundleVirtRegsMap[VirtReg] = *LRI;
}
markRegUsedInInstr(PhysReg);
- return setPhysReg(MI, MO, PhysReg);
+ return setPhysReg(MI, MO, *LRI);
}
/// Allocates a register for a VirtReg use.
@@ -1158,10 +1161,10 @@ bool RegAllocFastImpl::useVirtReg(MachineInstr &MI,
MachineOperand &MO,
LRI->LastUse = &MI;
if (MI.getOpcode() == TargetOpcode::BUNDLE) {
-BundleVirtRegsMap[VirtReg] = LRI->PhysReg;
+BundleVirtRegsMap[VirtReg] = *LRI;
}
markRegUsedInInstr(LRI->PhysReg);
- return setPhysReg(MI, MO, LRI->PhysReg);
+ return setPhysReg(MI, MO, *LRI);
}
/// Query a physical register to use as a filler in contexts where the
@@ -1215,16 +1218,27 @@ MCPhysReg RegAllocFastImpl::getErrorAssignment(const
LiveReg &LR,
/// Changes operand OpNum in MI the refer the PhysReg, considering subregs.
/// \return true if MI's MachineOperands were re-arranged/invalidated.
bool RegAllocFastImpl::setPhysReg(MachineInstr &MI, MachineOperand &MO,
- MCPhysReg PhysReg) {
+ const LiveReg &Assignment) {
+ MCPhysReg PhysReg = Assignment.PhysReg;
+ assert(PhysReg && "assignments should always be to a valid physreg");
+
+ if (LLVM_UNLIKELY(Assignment.Error)) {
+// Make sure we don't set renamable in error scenarios, as we may have
+// assigned to a reserved register.
+if (MO.isUse())
+ MO.setIsUndef(true);
+ }
+
if (!MO.getSubReg()) {
MO.setReg(PhysReg);
-MO.setIsRenamable(true);
+MO.setIsRenamable(!Assignment.Error);
return false;
}
// Handle subregister index.
- MO.setReg(PhysReg ? TRI->getSubReg(PhysReg, MO.getSubReg()) : MCRegister());
- MO.setIsRenamable(true);
+ MO.setReg(TRI->getSubReg(PhysReg, MO.getSubReg()));
+ MO.setIsRenamable(!Assignment.Error);
+
// Note: We leave the subreg number around a little longer in case of defs.
// This is so that the register freeing logic in allocateInstruction can
still
// recognize this as subregister defs. The code there will clear the number.
@@ -1706,7 +1720,7 @@ void RegAllocFastImpl::handleDebugValue(MachineInstr &MI)
{
if (LRI != LiveVirtRegs.end() && LRI->PhysReg) {
// Update every use of Reg within MI.
for (auto &RegMO : DbgOps)
-setPhysReg(MI, *RegMO, LRI->PhysReg);
+setPhysReg(MI, *RegMO, *LRI);
} else {
DanglingDbgValues[Reg].push_back(&MI);
}
@@ -1729,8 +1743,7 @@ void RegAllocFastImpl::handleBundle(MachineInstr &MI) {
if (!Reg.isVirtual() || !shouldAllocateRegister(Reg))
continue;
- DenseMap::iterator DI;
- DI = BundleVirtRegsMap.find(Reg);
+ DenseMap::iterator DI = BundleVirtRegsMap.find(Reg);
assert(DI != BundleVirtReg
[llvm-branch-commits] [llvm] 6ea4e1e - Revert "Reland "[AArch64][NPM] Chalk out the CodeGenPassBuilder for NPM (#128…"
Author: Akshat Oke
Date: 2025-02-26T10:54:09+05:30
New Revision: 6ea4e1e1415d4902c69670343205b5c44f51514a
URL:
https://github.com/llvm/llvm-project/commit/6ea4e1e1415d4902c69670343205b5c44f51514a
DIFF:
https://github.com/llvm/llvm-project/commit/6ea4e1e1415d4902c69670343205b5c44f51514a.diff
LOG: Revert "Reland "[AArch64][NPM] Chalk out the CodeGenPassBuilder for NPM
(#128…"
This reverts commit e927cf6653a9df804ca0556d8a5985f86ed9147c.
Added:
Modified:
llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
llvm/lib/Target/AArch64/AArch64TargetMachine.h
llvm/lib/Target/AArch64/CMakeLists.txt
llvm/test/CodeGen/AArch64/machine-latecleanup-inlineasm.mir
Removed:
diff --git a/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
b/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
index 7c8f101fa1538..d10a0c0a08f89 100644
--- a/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
+++ b/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
@@ -41,7 +41,6 @@
#include "llvm/MC/MCTargetOptions.h"
#include "llvm/MC/TargetRegistry.h"
#include "llvm/Pass.h"
-#include "llvm/Passes/CodeGenPassBuilder.h"
#include "llvm/Passes/PassBuilder.h"
#include "llvm/Support/CodeGen.h"
#include "llvm/Support/CommandLine.h"
@@ -563,39 +562,8 @@ class AArch64PassConfig : public TargetPassConfig {
std::unique_ptr getCSEConfig() const override;
};
-class AArch64CodeGenPassBuilder
-: public CodeGenPassBuilder {
- using Base =
- CodeGenPassBuilder;
-
-public:
- AArch64CodeGenPassBuilder(AArch64TargetMachine &TM,
-const CGPassBuilderOption &Opts,
-PassInstrumentationCallbacks *PIC)
- : CodeGenPassBuilder(TM, Opts, PIC) {}
- void addPreISel(AddIRPass &) const {
-// TODO: Add pre-isel passes
- }
- void addAsmPrinter(AddMachinePass &addPass, CreateMCStreamer) const {
-// TODO: Add asm printer passes
- }
- Error addInstSelector(AddMachinePass &) const {
-// TODO: Add instruction selector passes
-return Error::success();
- }
-};
-
} // end anonymous namespace
-Error AArch64TargetMachine::buildCodeGenPipeline(
-ModulePassManager &MPM, raw_pwrite_stream &Out, raw_pwrite_stream *DwoOut,
-CodeGenFileType FileType, const CGPassBuilderOption &Opts,
-PassInstrumentationCallbacks *PIC) {
- AArch64CodeGenPassBuilder Builder(*this, Opts, PIC);
- return Builder.buildPipeline(MPM, Out, DwoOut, FileType);
-}
-
void AArch64TargetMachine::registerPassBuilderCallbacks(PassBuilder &PB) {
PB.registerLateLoopOptimizationsEPCallback(
diff --git a/llvm/lib/Target/AArch64/AArch64TargetMachine.h
b/llvm/lib/Target/AArch64/AArch64TargetMachine.h
index 4fb4581c63547..f8ba41f215430 100644
--- a/llvm/lib/Target/AArch64/AArch64TargetMachine.h
+++ b/llvm/lib/Target/AArch64/AArch64TargetMachine.h
@@ -46,12 +46,6 @@ class AArch64TargetMachine : public CodeGenTargetMachineImpl
{
// Pass Pipeline Configuration
TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
- Error buildCodeGenPipeline(ModulePassManager &MPM, raw_pwrite_stream &Out,
- raw_pwrite_stream *DwoOut,
- CodeGenFileType FileType,
- const CGPassBuilderOption &Opts,
- PassInstrumentationCallbacks *PIC) override;
-
void registerPassBuilderCallbacks(PassBuilder &PB) override;
TargetTransformInfo getTargetTransformInfo(const Function &F) const override;
diff --git a/llvm/lib/Target/AArch64/CMakeLists.txt
b/llvm/lib/Target/AArch64/CMakeLists.txt
index e7acc08f6f1eb..2300e479bc110 100644
--- a/llvm/lib/Target/AArch64/CMakeLists.txt
+++ b/llvm/lib/Target/AArch64/CMakeLists.txt
@@ -105,7 +105,6 @@ add_llvm_target(AArch64CodeGen
Core
GlobalISel
MC
- Passes
Scalar
SelectionDAG
Support
diff --git a/llvm/test/CodeGen/AArch64/machine-latecleanup-inlineasm.mir
b/llvm/test/CodeGen/AArch64/machine-latecleanup-inlineasm.mir
index 5ce0fca6cd179..9a8e5c6341bca 100644
--- a/llvm/test/CodeGen/AArch64/machine-latecleanup-inlineasm.mir
+++ b/llvm/test/CodeGen/AArch64/machine-latecleanup-inlineasm.mir
@@ -1,9 +1,6 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
UTC_ARGS: --version 2
# RUN: llc -start-before=machine-latecleanup -stop-after=machine-latecleanup \
# RUN: -o - %s | FileCheck %s
-
-# RUN: llc -enable-new-pm -passes=machine-latecleanup \
-# RUN: -o - %s | FileCheck %s
--- |
; ModuleID = 'reduced5.ll'
source_filename = "reduced5.ll"
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] RegAllocFast: Fix verifier errors after assigning to reserved registers (PR #128281)
arsenm wrote: ### Merge activity * **Feb 26, 1:16 AM EST**: A user started a stack merge that includes this pull request via [Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/128281). https://github.com/llvm/llvm-project/pull/128281 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] Reapply "RegAlloc: Fix verifier error after failed allocation (#119690)" (PR #128400)
arsenm wrote: ### Merge activity * **Feb 26, 1:16 AM EST**: A user started a stack merge that includes this pull request via [Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/128400). https://github.com/llvm/llvm-project/pull/128400 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] RegAlloc: Use new approach to handling failed allocations (PR #128469)
arsenm wrote: ### Merge activity * **Feb 26, 1:16 AM EST**: A user started a stack merge that includes this pull request via [Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/128469). https://github.com/llvm/llvm-project/pull/128469 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] RegAlloc: Use new approach to handling failed allocations (PR #128469)
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/128469
>From 4e83e255ae747198877c0b5534a4656bca4b4b1d Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Sun, 23 Feb 2025 11:21:34 +0700
Subject: [PATCH 1/2] RegAlloc: Use new approach to handling failed allocations
This fixes an assert after allocation failure.
Rather than collecting failed virtual registers and hacking
on the uses after the fact, directly hack on the uses and rewrite
the registers to the dummy assignment immediately.
Previously we were bypassing LiveRegMatrix and directly assigning
in the VirtRegMap. This resulted in inconsistencies where illegal
overlapping assignments were missing. Rather than try to hack in
some system to manage these in LiveRegMatrix (i.e. hacking around
cases with invalid iterators), avoid this by directly using the
physreg. This should also allow removal of special casing in
virtregrewriter for failed allocations.
---
llvm/lib/CodeGen/RegAllocBase.cpp | 66 ++-
llvm/lib/CodeGen/RegAllocBase.h | 3 +-
llvm/lib/CodeGen/RegAllocBasic.cpp| 1 -
llvm/lib/CodeGen/RegAllocGreedy.cpp | 1 -
llvm/lib/CodeGen/VirtRegMap.cpp | 3 +-
...e-registers-assertion-after-ra-failure.ll} | 7 +-
.../AMDGPU/illegal-eviction-assert.mir| 4 +-
...-reg-class-snippet-copy-use-after-free.mir | 16 ++---
llvm/test/CodeGen/AMDGPU/issue48473.mir | 2 +-
...ster-killed-error-after-alloc-failure0.mir | 18 ++---
10 files changed, 47 insertions(+), 74 deletions(-)
rename
llvm/test/CodeGen/AMDGPU/{agpr-copy-no-free-registers-assertion-after-ra-failure.xfail.ll
=> agpr-copy-no-free-registers-assertion-after-ra-failure.ll} (75%)
diff --git a/llvm/lib/CodeGen/RegAllocBase.cpp
b/llvm/lib/CodeGen/RegAllocBase.cpp
index d66d396a15018..b9599e77fbf0a 100644
--- a/llvm/lib/CodeGen/RegAllocBase.cpp
+++ b/llvm/lib/CodeGen/RegAllocBase.cpp
@@ -128,8 +128,7 @@ void RegAllocBase::allocatePhysRegs() {
AvailablePhysReg = getErrorAssignment(*RC, MI);
// Keep going after reporting the error.
- VRM->assignVirt2Phys(VirtReg->reg(), AvailablePhysReg);
- FailedVRegs.insert(VirtReg->reg());
+ cleanupFailedVReg(VirtReg->reg(), AvailablePhysReg, SplitVRegs);
} else if (AvailablePhysReg)
Matrix->assign(*VirtReg, AvailablePhysReg);
@@ -163,58 +162,35 @@ void RegAllocBase::postOptimization() {
DeadRemats.clear();
}
-void RegAllocBase::cleanupFailedVRegs() {
- SmallSet JunkRegs;
-
- for (Register FailedReg : FailedVRegs) {
-JunkRegs.insert(FailedReg);
-
-MCRegister PhysReg = VRM->getPhys(FailedReg);
-LiveInterval &FailedInterval = LIS->getInterval(FailedReg);
-
-// The liveness information for the failed register and anything
interfering
-// with the physical register we arbitrarily chose is junk and needs to be
-// deleted.
-for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units) {
- LiveIntervalUnion::Query &Q = Matrix->query(FailedInterval, *Units);
- for (const LiveInterval *InterferingReg : Q.interferingVRegs())
-JunkRegs.insert(InterferingReg->reg());
- LIS->removeRegUnit(*Units);
-}
+void RegAllocBase::cleanupFailedVReg(Register FailedReg, MCRegister PhysReg,
+ SmallVectorImpl &SplitRegs) {
+ // We still should produce valid IR. Kill all the uses and reduce the live
+ // ranges so that we don't think it's possible to introduce kill flags later
+ // which will fail the verifier.
+ for (MachineOperand &MO : MRI->reg_operands(FailedReg)) {
+if (MO.readsReg())
+ MO.setIsUndef(true);
}
- for (Register JunkReg : JunkRegs) {
-MCRegister PhysReg = VRM->getPhys(JunkReg);
-// We still should produce valid IR. Kill all the uses and reduce the live
-// ranges so that we don't think it's possible to introduce kill flags
-// later which will fail the verifier.
-for (MachineOperand &MO : MRI->reg_operands(JunkReg)) {
- if (MO.readsReg())
-MO.setIsUndef(true);
-}
-
-// The liveness of the assigned physical register is also now unreliable.
+ if (!MRI->isReserved(PhysReg)) {
+// Physical liveness for any aliasing registers is now unreliable, so
delete
+// the uses.
for (MCRegAliasIterator Aliases(PhysReg, TRI, true); Aliases.isValid();
++Aliases) {
for (MachineOperand &MO : MRI->reg_operands(*Aliases)) {
-if (MO.readsReg())
+if (MO.readsReg()) {
MO.setIsUndef(true);
- }
-}
-
-LiveInterval &JunkLI = LIS->getInterval(JunkReg);
-if (LIS->shrinkToUses(&JunkLI)) {
- SmallVector SplitLIs;
- LIS->splitSeparateComponents(JunkLI, SplitLIs);
-
- VRM->grow();
- Register Original = VRM->getOriginal(JunkReg);
- for (LiveInterval *SplitLI : SplitLIs) {
-VRM->setIsSplitFromReg(SplitLI->reg(), Original);
-VRM->assignVirt2Phys(SplitLI->reg
[llvm-branch-commits] [llvm] RegAlloc: Use new approach to handling failed allocations (PR #128469)
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/128469
>From 4e83e255ae747198877c0b5534a4656bca4b4b1d Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Sun, 23 Feb 2025 11:21:34 +0700
Subject: [PATCH 1/2] RegAlloc: Use new approach to handling failed allocations
This fixes an assert after allocation failure.
Rather than collecting failed virtual registers and hacking
on the uses after the fact, directly hack on the uses and rewrite
the registers to the dummy assignment immediately.
Previously we were bypassing LiveRegMatrix and directly assigning
in the VirtRegMap. This resulted in inconsistencies where illegal
overlapping assignments were missing. Rather than try to hack in
some system to manage these in LiveRegMatrix (i.e. hacking around
cases with invalid iterators), avoid this by directly using the
physreg. This should also allow removal of special casing in
virtregrewriter for failed allocations.
---
llvm/lib/CodeGen/RegAllocBase.cpp | 66 ++-
llvm/lib/CodeGen/RegAllocBase.h | 3 +-
llvm/lib/CodeGen/RegAllocBasic.cpp| 1 -
llvm/lib/CodeGen/RegAllocGreedy.cpp | 1 -
llvm/lib/CodeGen/VirtRegMap.cpp | 3 +-
...e-registers-assertion-after-ra-failure.ll} | 7 +-
.../AMDGPU/illegal-eviction-assert.mir| 4 +-
...-reg-class-snippet-copy-use-after-free.mir | 16 ++---
llvm/test/CodeGen/AMDGPU/issue48473.mir | 2 +-
...ster-killed-error-after-alloc-failure0.mir | 18 ++---
10 files changed, 47 insertions(+), 74 deletions(-)
rename
llvm/test/CodeGen/AMDGPU/{agpr-copy-no-free-registers-assertion-after-ra-failure.xfail.ll
=> agpr-copy-no-free-registers-assertion-after-ra-failure.ll} (75%)
diff --git a/llvm/lib/CodeGen/RegAllocBase.cpp
b/llvm/lib/CodeGen/RegAllocBase.cpp
index d66d396a15018..b9599e77fbf0a 100644
--- a/llvm/lib/CodeGen/RegAllocBase.cpp
+++ b/llvm/lib/CodeGen/RegAllocBase.cpp
@@ -128,8 +128,7 @@ void RegAllocBase::allocatePhysRegs() {
AvailablePhysReg = getErrorAssignment(*RC, MI);
// Keep going after reporting the error.
- VRM->assignVirt2Phys(VirtReg->reg(), AvailablePhysReg);
- FailedVRegs.insert(VirtReg->reg());
+ cleanupFailedVReg(VirtReg->reg(), AvailablePhysReg, SplitVRegs);
} else if (AvailablePhysReg)
Matrix->assign(*VirtReg, AvailablePhysReg);
@@ -163,58 +162,35 @@ void RegAllocBase::postOptimization() {
DeadRemats.clear();
}
-void RegAllocBase::cleanupFailedVRegs() {
- SmallSet JunkRegs;
-
- for (Register FailedReg : FailedVRegs) {
-JunkRegs.insert(FailedReg);
-
-MCRegister PhysReg = VRM->getPhys(FailedReg);
-LiveInterval &FailedInterval = LIS->getInterval(FailedReg);
-
-// The liveness information for the failed register and anything
interfering
-// with the physical register we arbitrarily chose is junk and needs to be
-// deleted.
-for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units) {
- LiveIntervalUnion::Query &Q = Matrix->query(FailedInterval, *Units);
- for (const LiveInterval *InterferingReg : Q.interferingVRegs())
-JunkRegs.insert(InterferingReg->reg());
- LIS->removeRegUnit(*Units);
-}
+void RegAllocBase::cleanupFailedVReg(Register FailedReg, MCRegister PhysReg,
+ SmallVectorImpl &SplitRegs) {
+ // We still should produce valid IR. Kill all the uses and reduce the live
+ // ranges so that we don't think it's possible to introduce kill flags later
+ // which will fail the verifier.
+ for (MachineOperand &MO : MRI->reg_operands(FailedReg)) {
+if (MO.readsReg())
+ MO.setIsUndef(true);
}
- for (Register JunkReg : JunkRegs) {
-MCRegister PhysReg = VRM->getPhys(JunkReg);
-// We still should produce valid IR. Kill all the uses and reduce the live
-// ranges so that we don't think it's possible to introduce kill flags
-// later which will fail the verifier.
-for (MachineOperand &MO : MRI->reg_operands(JunkReg)) {
- if (MO.readsReg())
-MO.setIsUndef(true);
-}
-
-// The liveness of the assigned physical register is also now unreliable.
+ if (!MRI->isReserved(PhysReg)) {
+// Physical liveness for any aliasing registers is now unreliable, so
delete
+// the uses.
for (MCRegAliasIterator Aliases(PhysReg, TRI, true); Aliases.isValid();
++Aliases) {
for (MachineOperand &MO : MRI->reg_operands(*Aliases)) {
-if (MO.readsReg())
+if (MO.readsReg()) {
MO.setIsUndef(true);
- }
-}
-
-LiveInterval &JunkLI = LIS->getInterval(JunkReg);
-if (LIS->shrinkToUses(&JunkLI)) {
- SmallVector SplitLIs;
- LIS->splitSeparateComponents(JunkLI, SplitLIs);
-
- VRM->grow();
- Register Original = VRM->getOriginal(JunkReg);
- for (LiveInterval *SplitLI : SplitLIs) {
-VRM->setIsSplitFromReg(SplitLI->reg(), Original);
-VRM->assignVirt2Phys(SplitLI->reg
[llvm-branch-commits] [llvm] [HLSL] Refactor Offset calculation while writing Root Signatures. (PR #128577)
https://github.com/joaosaffran closed https://github.com/llvm/llvm-project/pull/128577 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] release/20.x: [CMake][Release] Statically link ZSTD on all OSes (#128554) (PR #128793)
https://github.com/llvmbot updated
https://github.com/llvm/llvm-project/pull/128793
>From 560ac756cb18db3f6252b4d43e0444b10fd36e8b Mon Sep 17 00:00:00 2001
From: Tom Stellard
Date: Tue, 25 Feb 2025 16:10:20 -0800
Subject: [PATCH] [CMake][Release] Statically link ZSTD on all OSes (#128554)
This will make the binaries more portable.
(cherry picked from commit 09832777d830e0fddff84bf36793ec4e453656b0)
---
clang/cmake/caches/Release.cmake | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/clang/cmake/caches/Release.cmake b/clang/cmake/caches/Release.cmake
index aedbd1a25fb38..fb12dfcdcb5a5 100644
--- a/clang/cmake/caches/Release.cmake
+++ b/clang/cmake/caches/Release.cmake
@@ -143,6 +143,4 @@ endif()
set_final_stage_var(CPACK_GENERATOR "TXZ" STRING)
set_final_stage_var(CPACK_ARCHIVE_THREADS "0" STRING)
-if(${CMAKE_HOST_SYSTEM_NAME} MATCHES "Darwin")
- set_final_stage_var(LLVM_USE_STATIC_ZSTD "ON" BOOL)
-endif()
+set_final_stage_var(LLVM_USE_STATIC_ZSTD "ON" BOOL)
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] 560ac75 - [CMake][Release] Statically link ZSTD on all OSes (#128554)
Author: Tom Stellard
Date: 2025-02-25T17:08:20-08:00
New Revision: 560ac756cb18db3f6252b4d43e0444b10fd36e8b
URL:
https://github.com/llvm/llvm-project/commit/560ac756cb18db3f6252b4d43e0444b10fd36e8b
DIFF:
https://github.com/llvm/llvm-project/commit/560ac756cb18db3f6252b4d43e0444b10fd36e8b.diff
LOG: [CMake][Release] Statically link ZSTD on all OSes (#128554)
This will make the binaries more portable.
(cherry picked from commit 09832777d830e0fddff84bf36793ec4e453656b0)
Added:
Modified:
clang/cmake/caches/Release.cmake
Removed:
diff --git a/clang/cmake/caches/Release.cmake
b/clang/cmake/caches/Release.cmake
index aedbd1a25fb38..fb12dfcdcb5a5 100644
--- a/clang/cmake/caches/Release.cmake
+++ b/clang/cmake/caches/Release.cmake
@@ -143,6 +143,4 @@ endif()
set_final_stage_var(CPACK_GENERATOR "TXZ" STRING)
set_final_stage_var(CPACK_ARCHIVE_THREADS "0" STRING)
-if(${CMAKE_HOST_SYSTEM_NAME} MATCHES "Darwin")
- set_final_stage_var(LLVM_USE_STATIC_ZSTD "ON" BOOL)
-endif()
+set_final_stage_var(LLVM_USE_STATIC_ZSTD "ON" BOOL)
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] release/20.x: [CMake][Release] Statically link ZSTD on all OSes (#128554) (PR #128793)
https://github.com/tstellar closed https://github.com/llvm/llvm-project/pull/128793 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] release/20.x: [CMake][Release] Statically link ZSTD on all OSes (#128554) (PR #128793)
github-actions[bot] wrote: @tstellar (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. When you are done, please add the release:note label to this PR. https://github.com/llvm/llvm-project/pull/128793 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [HLSL] Refactor Offset calculation while writing Root Signatures. (PR #128577)
https://github.com/damyanp approved this pull request. https://github.com/llvm/llvm-project/pull/128577 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [HLSL] Refactor Offset calculation while writing Root Signatures. (PR #128577)
https://github.com/joaosaffran updated
https://github.com/llvm/llvm-project/pull/128577
>From 767b7d02bf71e6e0137e2b5f9f9b8d8b799ac81f Mon Sep 17 00:00:00 2001
From: joaosaffran
Date: Sat, 22 Feb 2025 06:19:15 +
Subject: [PATCH 01/12] first working version
---
.../llvm/MC/DXContainerRootSignature.h| 5 +-
llvm/lib/MC/DXContainerRootSignature.cpp | 90 +--
llvm/lib/Object/DXContainer.cpp | 10 ++-
llvm/lib/ObjectYAML/DXContainerEmitter.cpp| 4 +-
.../lib/Target/DirectX/DXContainerGlobals.cpp | 5 +-
.../ContainerData/RootSignature-Flags.ll | 2 +-
.../DXContainer/RootSignature-Flags.yaml | 2 +-
.../RootSignature-MultipleParameters.yaml | 2 +-
.../ObjectYAML/DXContainerYAMLTest.cpp| 8 +-
9 files changed, 85 insertions(+), 43 deletions(-)
diff --git a/llvm/include/llvm/MC/DXContainerRootSignature.h
b/llvm/include/llvm/MC/DXContainerRootSignature.h
index b31b0da352038..cae4f79aef56f 100644
--- a/llvm/include/llvm/MC/DXContainerRootSignature.h
+++ b/llvm/include/llvm/MC/DXContainerRootSignature.h
@@ -7,8 +7,7 @@
//===--===//
#include "llvm/BinaryFormat/DXContainer.h"
-#include
-#include
+#include "llvm/Support/raw_ostream.h"
namespace llvm {
@@ -19,7 +18,7 @@ struct RootSignatureDesc {
dxbc::RootSignatureHeader Header;
SmallVector Parameters;
- void write(raw_ostream &OS) const;
+ Error write(raw_ostream &OS) const;
};
} // namespace mcdxbc
} // namespace llvm
diff --git a/llvm/lib/MC/DXContainerRootSignature.cpp
b/llvm/lib/MC/DXContainerRootSignature.cpp
index 35a4ef322d01e..9a279ab722877 100644
--- a/llvm/lib/MC/DXContainerRootSignature.cpp
+++ b/llvm/lib/MC/DXContainerRootSignature.cpp
@@ -7,53 +7,89 @@
//===--===//
#include "llvm/MC/DXContainerRootSignature.h"
-#include "llvm/Support/EndianStream.h"
+#include "llvm/Support/BinaryStreamWriter.h"
+#include
using namespace llvm;
using namespace llvm::mcdxbc;
-void RootSignatureDesc::write(raw_ostream &OS) const {
- // Root signature header in dxcontainer has 6 uint_32t values.
- const uint32_t HeaderSize = 24;
- const uint32_t ParameterByteSize = Parameters.size_in_bytes();
- const uint32_t NumParametes = Parameters.size();
+Error RootSignatureDesc::write(raw_ostream &OS) const {
+ // Header Size + accounting for parameter offset + parameters size
+ std::vector Buffer(24 + (Parameters.size() * 4) +
+ Parameters.size_in_bytes());
+ BinaryStreamWriter Writer(Buffer, llvm::endianness::little);
+
+ SmallVector OffsetsToReplace;
+ SmallVector ValuesToReplaceOffsetsWith;
+ const uint32_t Dummy = std::numeric_limits::max();
+
+ const uint32_t NumParameters = Parameters.size();
const uint32_t Zero = 0;
- // Writing header information
- support::endian::write(OS, Header.Version, llvm::endianness::little);
- support::endian::write(OS, NumParametes, llvm::endianness::little);
- support::endian::write(OS, HeaderSize, llvm::endianness::little);
+ if (Error Err = Writer.writeInteger(Header.Version))
+return Err;
+
+ if (Error Err = Writer.writeInteger(NumParameters))
+return Err;
+
+ OffsetsToReplace.push_back(Writer.getOffset());
+ if (Error Err = Writer.writeInteger(Dummy))
+return Err;
// Static samplers still not implemented
- support::endian::write(OS, Zero, llvm::endianness::little);
- support::endian::write(OS, ParameterByteSize + HeaderSize,
- llvm::endianness::little);
+ if (Error Err = Writer.writeInteger(Zero))
+return Err;
+
+ if (Error Err = Writer.writeInteger(Zero))
+return Err;
+
+ if (Error Err = Writer.writeInteger(Header.Flags))
+return Err;
- support::endian::write(OS, Header.Flags, llvm::endianness::little);
+ ValuesToReplaceOffsetsWith.push_back(Writer.getOffset());
- uint32_t ParamsOffset =
- HeaderSize + (3 * sizeof(uint32_t) * Parameters.size());
for (const dxbc::RootParameter &P : Parameters) {
-support::endian::write(OS, P.ParameterType, llvm::endianness::little);
-support::endian::write(OS, P.ShaderVisibility, llvm::endianness::little);
-support::endian::write(OS, ParamsOffset, llvm::endianness::little);
+if (Error Err = Writer.writeEnum(P.ParameterType))
+ return Err;
+if (Error Err = Writer.writeEnum(P.ShaderVisibility))
+ return Err;
-// Size of root parameter, removing the ParameterType and ShaderVisibility.
-ParamsOffset += sizeof(dxbc::RootParameter) - 2 * sizeof(uint32_t);
+OffsetsToReplace.push_back(Writer.getOffset());
+if (Error Err = Writer.writeInteger(Dummy))
+ return Err;
}
for (const dxbc::RootParameter &P : Parameters) {
+ValuesToReplaceOffsetsWith.push_back(Writer.getOffset());
switch (P.ParameterType) {
case dxbc::RootParameterType::Constants32Bit: {
- support::endia
[llvm-branch-commits] [LTO][Pipelines][Coro] De-duplicate Coro passes (PR #128654)
https://github.com/vitalybuka updated https://github.com/llvm/llvm-project/pull/128654 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [LTO][Pipelines][Coro] De-duplicate Coro passes (PR #128654)
https://github.com/vitalybuka updated https://github.com/llvm/llvm-project/pull/128654 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] release/20.x: [CMake][Release] Statically link ZSTD on all OSes (#128554) (PR #128793)
https://github.com/llvmbot created
https://github.com/llvm/llvm-project/pull/128793
Backport 09832777d830e0fddff84bf36793ec4e453656b0
Requested by: @tstellar
>From 2ca80566033289f3401f4ee8957eb166dad04f62 Mon Sep 17 00:00:00 2001
From: Tom Stellard
Date: Tue, 25 Feb 2025 16:10:20 -0800
Subject: [PATCH] [CMake][Release] Statically link ZSTD on all OSes (#128554)
This will make the binaries more portable.
(cherry picked from commit 09832777d830e0fddff84bf36793ec4e453656b0)
---
clang/cmake/caches/Release.cmake | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/clang/cmake/caches/Release.cmake b/clang/cmake/caches/Release.cmake
index a1c68fc51dbd0..1500fe24fccd3 100644
--- a/clang/cmake/caches/Release.cmake
+++ b/clang/cmake/caches/Release.cmake
@@ -128,6 +128,4 @@ set_final_stage_var(LLVM_ENABLE_PROJECTS
"${LLVM_RELEASE_ENABLE_PROJECTS}" STRIN
set_final_stage_var(CPACK_GENERATOR "TXZ" STRING)
set_final_stage_var(CPACK_ARCHIVE_THREADS "0" STRING)
-if(${CMAKE_HOST_SYSTEM_NAME} MATCHES "Darwin")
- set_final_stage_var(LLVM_USE_STATIC_ZSTD "ON" BOOL)
-endif()
+set_final_stage_var(LLVM_USE_STATIC_ZSTD "ON" BOOL)
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] release/20.x: [CMake][Release] Statically link ZSTD on all OSes (#128554) (PR #128793)
llvmbot wrote: @keith What do you think about merging this PR to the release branch? https://github.com/llvm/llvm-project/pull/128793 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] release/20.x: [CMake][Release] Statically link ZSTD on all OSes (#128554) (PR #128793)
https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/128793 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] release/20.x: [CMake][Release] Statically link ZSTD on all OSes (#128554) (PR #128793)
llvmbot wrote:
@llvm/pr-subscribers-clang
Author: None (llvmbot)
Changes
Backport 09832777d830e0fddff84bf36793ec4e453656b0
Requested by: @tstellar
---
Full diff: https://github.com/llvm/llvm-project/pull/128793.diff
1 Files Affected:
- (modified) clang/cmake/caches/Release.cmake (+1-3)
``diff
diff --git a/clang/cmake/caches/Release.cmake b/clang/cmake/caches/Release.cmake
index a1c68fc51dbd0..1500fe24fccd3 100644
--- a/clang/cmake/caches/Release.cmake
+++ b/clang/cmake/caches/Release.cmake
@@ -128,6 +128,4 @@ set_final_stage_var(LLVM_ENABLE_PROJECTS
"${LLVM_RELEASE_ENABLE_PROJECTS}" STRIN
set_final_stage_var(CPACK_GENERATOR "TXZ" STRING)
set_final_stage_var(CPACK_ARCHIVE_THREADS "0" STRING)
-if(${CMAKE_HOST_SYSTEM_NAME} MATCHES "Darwin")
- set_final_stage_var(LLVM_USE_STATIC_ZSTD "ON" BOOL)
-endif()
+set_final_stage_var(LLVM_USE_STATIC_ZSTD "ON" BOOL)
``
https://github.com/llvm/llvm-project/pull/128793
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] b8b7fce - [PPC][MC] Restore support for case-insensitive register names (#128525)
Author: Nikita Popov
Date: 2025-02-25T16:13:18-08:00
New Revision: b8b7fce446a6516be6bee61456e7292f7c1afb86
URL:
https://github.com/llvm/llvm-project/commit/b8b7fce446a6516be6bee61456e7292f7c1afb86
DIFF:
https://github.com/llvm/llvm-project/commit/b8b7fce446a6516be6bee61456e7292f7c1afb86.diff
LOG: [PPC][MC] Restore support for case-insensitive register names (#128525)
Lowercase the name before calling MatchRegisterName(), to restore
support for using `%R3` instead of `%r3` and similar, matching the GNU
assembler.
Fixes https://github.com/llvm/llvm-project/issues/126786.
(cherry picked from commit f1252f539ca203a979d61b616186e9be9d612f96)
Added:
llvm/test/MC/PowerPC/case-insensitive-regs.s
Modified:
llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
Removed:
diff --git a/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
b/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
index dc75814b9796b..47e7aa8785e69 100644
--- a/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
+++ b/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
@@ -1320,7 +1320,10 @@ MCRegister PPCAsmParser::matchRegisterName(int64_t
&IntVal) {
if (!getParser().getTok().is(AsmToken::Identifier))
return MCRegister();
- StringRef Name = getParser().getTok().getString();
+ // MatchRegisterName() expects lower-case registers, but we want to support
+ // case-insensitive spelling.
+ std::string NameBuf = getParser().getTok().getString().lower();
+ StringRef Name(NameBuf);
MCRegister RegNo = MatchRegisterName(Name);
if (!RegNo)
return RegNo;
@@ -1329,15 +1332,15 @@ MCRegister PPCAsmParser::matchRegisterName(int64_t
&IntVal) {
// MatchRegisterName doesn't seem to have special handling for 64bit vs 32bit
// register types.
- if (Name.equals_insensitive("lr")) {
+ if (Name == "lr") {
RegNo = isPPC64() ? PPC::LR8 : PPC::LR;
IntVal = 8;
- } else if (Name.equals_insensitive("ctr")) {
+ } else if (Name == "ctr") {
RegNo = isPPC64() ? PPC::CTR8 : PPC::CTR;
IntVal = 9;
- } else if (Name.equals_insensitive("vrsave"))
+ } else if (Name == "vrsave")
IntVal = 256;
- else if (Name.starts_with_insensitive("r"))
+ else if (Name.starts_with("r"))
RegNo = isPPC64() ? XRegs[IntVal] : RRegs[IntVal];
getParser().Lex();
diff --git a/llvm/test/MC/PowerPC/case-insensitive-regs.s
b/llvm/test/MC/PowerPC/case-insensitive-regs.s
new file mode 100644
index 0..f20a590318504
--- /dev/null
+++ b/llvm/test/MC/PowerPC/case-insensitive-regs.s
@@ -0,0 +1,11 @@
+# RUN: llvm-mc -triple powerpc64le-unknown-unknown %s 2>&1 | FileCheck %s
+
+# Test that upper case registers are accepted.
+
+# CHECK-LABEL: test:
+# CHECK-NEXT: ld 1, 0(3)
+# CHECK-NEXT: blr
+
+test:
+ld %R1, 0(%R3)
+blr
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/20.x: [PPC][MC] Restore support for case-insensitive register names (#128525) (PR #128539)
https://github.com/llvmbot updated
https://github.com/llvm/llvm-project/pull/128539
>From b8b7fce446a6516be6bee61456e7292f7c1afb86 Mon Sep 17 00:00:00 2001
From: Nikita Popov
Date: Mon, 24 Feb 2025 18:06:51 +0100
Subject: [PATCH] [PPC][MC] Restore support for case-insensitive register names
(#128525)
Lowercase the name before calling MatchRegisterName(), to restore
support for using `%R3` instead of `%r3` and similar, matching the GNU
assembler.
Fixes https://github.com/llvm/llvm-project/issues/126786.
(cherry picked from commit f1252f539ca203a979d61b616186e9be9d612f96)
---
llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp | 13 -
llvm/test/MC/PowerPC/case-insensitive-regs.s | 11 +++
2 files changed, 19 insertions(+), 5 deletions(-)
create mode 100644 llvm/test/MC/PowerPC/case-insensitive-regs.s
diff --git a/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
b/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
index dc75814b9796b..47e7aa8785e69 100644
--- a/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
+++ b/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
@@ -1320,7 +1320,10 @@ MCRegister PPCAsmParser::matchRegisterName(int64_t
&IntVal) {
if (!getParser().getTok().is(AsmToken::Identifier))
return MCRegister();
- StringRef Name = getParser().getTok().getString();
+ // MatchRegisterName() expects lower-case registers, but we want to support
+ // case-insensitive spelling.
+ std::string NameBuf = getParser().getTok().getString().lower();
+ StringRef Name(NameBuf);
MCRegister RegNo = MatchRegisterName(Name);
if (!RegNo)
return RegNo;
@@ -1329,15 +1332,15 @@ MCRegister PPCAsmParser::matchRegisterName(int64_t
&IntVal) {
// MatchRegisterName doesn't seem to have special handling for 64bit vs 32bit
// register types.
- if (Name.equals_insensitive("lr")) {
+ if (Name == "lr") {
RegNo = isPPC64() ? PPC::LR8 : PPC::LR;
IntVal = 8;
- } else if (Name.equals_insensitive("ctr")) {
+ } else if (Name == "ctr") {
RegNo = isPPC64() ? PPC::CTR8 : PPC::CTR;
IntVal = 9;
- } else if (Name.equals_insensitive("vrsave"))
+ } else if (Name == "vrsave")
IntVal = 256;
- else if (Name.starts_with_insensitive("r"))
+ else if (Name.starts_with("r"))
RegNo = isPPC64() ? XRegs[IntVal] : RRegs[IntVal];
getParser().Lex();
diff --git a/llvm/test/MC/PowerPC/case-insensitive-regs.s
b/llvm/test/MC/PowerPC/case-insensitive-regs.s
new file mode 100644
index 0..f20a590318504
--- /dev/null
+++ b/llvm/test/MC/PowerPC/case-insensitive-regs.s
@@ -0,0 +1,11 @@
+# RUN: llvm-mc -triple powerpc64le-unknown-unknown %s 2>&1 | FileCheck %s
+
+# Test that upper case registers are accepted.
+
+# CHECK-LABEL: test:
+# CHECK-NEXT: ld 1, 0(3)
+# CHECK-NEXT: blr
+
+test:
+ld %R1, 0(%R3)
+blr
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/20.x: [PPC][MC] Restore support for case-insensitive register names (#128525) (PR #128539)
github-actions[bot] wrote: @nikic (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. When you are done, please add the release:note label to this PR. https://github.com/llvm/llvm-project/pull/128539 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/20.x: [PPC][MC] Restore support for case-insensitive register names (#128525) (PR #128539)
https://github.com/tstellar closed https://github.com/llvm/llvm-project/pull/128539 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [llvm] release/20.x: [CMake][Release] Enable bolt optimization for clang on Linux (#128090) (PR #128730)
https://github.com/llvmbot updated
https://github.com/llvm/llvm-project/pull/128730
>From a2112e20c736b1648ada1aa0b976f42fedf62a23 Mon Sep 17 00:00:00 2001
From: Tom Stellard
Date: Tue, 25 Feb 2025 07:33:42 -0800
Subject: [PATCH] [CMake][Release] Enable bolt optimization for clang on Linux
(#128090)
Also stop buiding the bolt project on other platforms since bolt only
supports ELF.
(cherry picked from commit 148111fdcf0e807fe74274b18fcf65c4cff45d63)
---
.github/workflows/release-binaries.yml | 2 +-
clang/cmake/caches/Release.cmake | 17 -
2 files changed, 17 insertions(+), 2 deletions(-)
diff --git a/.github/workflows/release-binaries.yml
b/.github/workflows/release-binaries.yml
index fa3dfa5b7d313..a18f64d6bc226 100644
--- a/.github/workflows/release-binaries.yml
+++ b/.github/workflows/release-binaries.yml
@@ -142,7 +142,7 @@ jobs:
# 2-3 hours to build on macOS, much slower than on Linux.
# The long build time causes the release build to time out on
x86_64,
# so we need to disable flang there.
-target_cmake_flags="$target_cmake_flags
-DLLVM_RELEASE_ENABLE_PROJECTS='clang;lld;lldb;clang-tools-extra;bolt;polly;mlir'"
+target_cmake_flags="$target_cmake_flags
-DLLVM_RELEASE_ENABLE_PROJECTS='clang;lld;lldb;clang-tools-extra;polly;mlir'"
fi
target_cmake_flags="$target_cmake_flags
-DBOOTSTRAP_DARWIN_osx_ARCHS=$arches
-DBOOTSTRAP_DARWIN_osx_BUILTIN_ARCHS=$arches"
fi
diff --git a/clang/cmake/caches/Release.cmake b/clang/cmake/caches/Release.cmake
index a1c68fc51dbd0..aedbd1a25fb38 100644
--- a/clang/cmake/caches/Release.cmake
+++ b/clang/cmake/caches/Release.cmake
@@ -29,6 +29,13 @@ endfunction()
# cache file to CMake via -C. e.g.
#
# cmake -D LLVM_RELEASE_ENABLE_PGO=ON -C Release.cmake
+
+set (DEFAULT_PROJECTS "clang;lld;lldb;clang-tools-extra;polly;mlir;flang")
+# bolt only supports ELF, so only enable it for Linux.
+if (${CMAKE_HOST_SYSTEM_NAME} MATCHES "Linux")
+ list(APPEND DEFAULT_PROJECTS "bolt")
+endif()
+
set (DEFAULT_RUNTIMES "compiler-rt;libcxx")
if (NOT WIN32)
list(APPEND DEFAULT_RUNTIMES "libcxxabi" "libunwind")
@@ -36,7 +43,7 @@ endif()
set(LLVM_RELEASE_ENABLE_LTO THIN CACHE STRING "")
set(LLVM_RELEASE_ENABLE_PGO ON CACHE BOOL "")
set(LLVM_RELEASE_ENABLE_RUNTIMES ${DEFAULT_RUNTIMES} CACHE STRING "")
-set(LLVM_RELEASE_ENABLE_PROJECTS
"clang;lld;lldb;clang-tools-extra;bolt;polly;mlir;flang" CACHE STRING "")
+set(LLVM_RELEASE_ENABLE_PROJECTS ${DEFAULT_PROJECTS} CACHE STRING "")
# Note we don't need to add install here, since it is one of the pre-defined
# steps.
set(LLVM_RELEASE_FINAL_STAGE_TARGETS
"clang;package;check-all;check-llvm;check-clang" CACHE STRING "")
@@ -118,6 +125,11 @@ if(NOT ${CMAKE_HOST_SYSTEM_NAME} MATCHES "Darwin")
set(RELEASE_LINKER_FLAGS "${RELEASE_LINKER_FLAGS} -static-libgcc")
endif()
+# Set flags for bolt
+if (${CMAKE_HOST_SYSTEM_NAME} MATCHES "Linux")
+ set(RELEASE_LINKER_FLAGS "${RELEASE_LINKER_FLAGS} -Wl,--emit-relocs,-znow")
+endif()
+
set_instrument_and_final_stage_var(CMAKE_EXE_LINKER_FLAGS
${RELEASE_LINKER_FLAGS} STRING)
set_instrument_and_final_stage_var(CMAKE_SHARED_LINKER_FLAGS
${RELEASE_LINKER_FLAGS} STRING)
set_instrument_and_final_stage_var(CMAKE_MODULE_LINKER_FLAGS
${RELEASE_LINKER_FLAGS} STRING)
@@ -125,6 +137,9 @@
set_instrument_and_final_stage_var(CMAKE_MODULE_LINKER_FLAGS ${RELEASE_LINKER_FL
# Final Stage Config (stage2)
set_final_stage_var(LLVM_ENABLE_RUNTIMES "${LLVM_RELEASE_ENABLE_RUNTIMES}"
STRING)
set_final_stage_var(LLVM_ENABLE_PROJECTS "${LLVM_RELEASE_ENABLE_PROJECTS}"
STRING)
+if (${CMAKE_HOST_SYSTEM_NAME} MATCHES "Linux")
+ set_final_stage_var(CLANG_BOLT "INSTRUMENT" STRING)
+endif()
set_final_stage_var(CPACK_GENERATOR "TXZ" STRING)
set_final_stage_var(CPACK_ARCHIVE_THREADS "0" STRING)
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [llvm] release/20.x: [CMake][Release] Enable bolt optimization for clang on Linux (#128090) (PR #128730)
https://github.com/tstellar closed https://github.com/llvm/llvm-project/pull/128730 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [llvm] release/20.x: [CMake][Release] Enable bolt optimization for clang on Linux (#128090) (PR #128730)
github-actions[bot] wrote: @tstellar (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. When you are done, please add the release:note label to this PR. https://github.com/llvm/llvm-project/pull/128730 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [DirectX] Support the CBufferLoadLegacy operation (PR #128699)
https://github.com/bogner updated
https://github.com/llvm/llvm-project/pull/128699
>From be9554eabde52e6feb37ad91935ee73aacdf00d6 Mon Sep 17 00:00:00 2001
From: Justin Bogner
Date: Sat, 22 Feb 2025 12:40:46 -0800
Subject: [PATCH 1/2] [DirectX] Support the CBufferLoadLegacy operation
Fixes #112992
---
llvm/docs/DirectX/DXILResources.rst | 126 +-
llvm/include/llvm/IR/IntrinsicsDirectX.td | 15 +++
llvm/lib/Target/DirectX/DXIL.td | 19 +++
llvm/lib/Target/DirectX/DXILOpBuilder.cpp | 40 ++
llvm/lib/Target/DirectX/DXILOpBuilder.h | 3 +
llvm/lib/Target/DirectX/DXILOpLowering.cpp| 31 +
.../DirectX/CBufferLoadLegacy-errors.ll | 45 +++
.../test/CodeGen/DirectX/CBufferLoadLegacy.ll | 63 +
llvm/utils/TableGen/DXILEmitter.cpp | 8 +-
9 files changed, 343 insertions(+), 7 deletions(-)
create mode 100644 llvm/test/CodeGen/DirectX/CBufferLoadLegacy-errors.ll
create mode 100644 llvm/test/CodeGen/DirectX/CBufferLoadLegacy.ll
diff --git a/llvm/docs/DirectX/DXILResources.rst
b/llvm/docs/DirectX/DXILResources.rst
index 80e3c2c11153d..91dcd5c8d5214 100644
--- a/llvm/docs/DirectX/DXILResources.rst
+++ b/llvm/docs/DirectX/DXILResources.rst
@@ -277,7 +277,7 @@ Examples:
Accessing Resources as Memory
-
-*relevant types: Buffers, CBuffer, and Textures*
+*relevant types: Buffers and Textures*
Loading and storing from resources is generally represented in LLVM using
operations on memory that is only accessible via a handle object. Given a
@@ -321,12 +321,11 @@ Examples:
Loads, Samples, and Gathers
---
-*relevant types: Buffers, CBuffers, and Textures*
+*relevant types: Buffers and Textures*
-All load, sample, and gather operations in DXIL return a `ResRet`_ type, and
-CBuffer loads return a similar `CBufRet`_ type. These types are structs
-containing 4 elements of some basic type, and in the case of `ResRet` a 5th
-element that is used by the `CheckAccessFullyMapped`_ operation. Some of these
+All load, sample, and gather operations in DXIL return a `ResRet`_ type. These
+types are structs containing 4 elements of some basic type, and a 5th element
+that is used by the `CheckAccessFullyMapped`_ operation. Some of these
operations, like `RawBufferLoad`_ include a mask and/or alignment that tell us
some information about how to interpret those four values.
@@ -632,3 +631,118 @@ Examples:
target("dx.RawBuffer", i8, 1, 0, 0) %buffer,
i32 %index, i32 0, <4 x double> %data)
+Constant Buffer Loads
+-
+
+*relevant types: CBuffers*
+
+The `CBufferLoadLegacy`_ operation, which despite the name is the only
+supported way to load from a cbuffer in any DXIL version, loads a single "row"
+of a cbuffer, which is exactly 16 bytes. The return value of the operation is
+represented by a `CBufRet`_ type, which has variants for 2 64-bit values, 4
+32-bit values, and 8 16-bit values.
+
+We represent these in LLVM IR with 3 separate operations, which return a
+2-element, 4-element, or 8-element struct respectively.
+
+.. _CBufferLoadLegacy:
https://github.com/microsoft/DirectXShaderCompiler/blob/main/docs/DXIL.rst#cbufferLoadLegacy
+.. _CBufRet:
https://github.com/microsoft/DirectXShaderCompiler/blob/main/docs/DXIL.rst#cbufferloadlegacy
+
+.. list-table:: ``@llvm.dx.resource.load.cbufferrow.4``
+ :header-rows: 1
+
+ * - Argument
+ -
+ - Type
+ - Description
+ * - Return value
+ -
+ - A struct of 4 32-bit values
+ - A single row of a cbuffer, interpreted as 4 32-bit values
+ * - ``%buffer``
+ - 0
+ - ``target(dx.CBuffer, ...)``
+ - The buffer to load from
+ * - ``%index``
+ - 1
+ - ``i32``
+ - Index into the buffer
+
+Examples:
+
+.. code-block:: llvm
+
+ %ret = call {float, float, float, float}
+ @llvm.dx.resource.load.cbufferrow.4(
+ target("dx.CBuffer", target("dx.Layout", {float}, 4, 0)) %buffer,
+ i32 %index)
+ %ret = call {i32, i32, i32, i32}
+ @llvm.dx.resource.load.cbufferrow.4(
+ target("dx.CBuffer", target("dx.Layout", {i32}, 4, 0)) %buffer,
+ i32 %index)
+
+.. list-table:: ``@llvm.dx.resource.load.cbufferrow.2``
+ :header-rows: 1
+
+ * - Argument
+ -
+ - Type
+ - Description
+ * - Return value
+ -
+ - A struct of 2 64-bit values
+ - A single row of a cbuffer, interpreted as 2 64-bit values
+ * - ``%buffer``
+ - 0
+ - ``target(dx.CBuffer, ...)``
+ - The buffer to load from
+ * - ``%index``
+ - 1
+ - ``i32``
+ - Index into the buffer
+
+Examples:
+
+.. code-block:: llvm
+
+ %ret = call {double, double}
+ @llvm.dx.resource.load.cbufferrow.2(
+ target("dx.CBuffer", target("dx.Layout", {double}, 8, 0)) %buffer,
+ i32 %index)
+ %ret = call {i64, i64}
+ @llvm.dx.resource.load.cbufferrow.2(
+ target("dx.CBuffer",
[llvm-branch-commits] [llvm] [DirectX] Fix printing of DXIL cbuffer info (PR #128698)
https://github.com/llvm-beanz approved this pull request. https://github.com/llvm/llvm-project/pull/128698 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [DirectX] Fix printing of DXIL cbuffer info (PR #128698)
https://github.com/farzonl approved this pull request. https://github.com/llvm/llvm-project/pull/128698 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [LTO][Pipelines][Coro] De-duplicate Coro passes (PR #128654)
@@ -421,12 +421,15 @@ static bool isLTOPostLink(ThinOrFullLTOPhase Phase) {
static CoroConditionalWrapper buildCoroWrapper(ThinOrFullLTOPhase Phase) {
// TODO: Skip passes according to Phase.
aeubanks wrote:
remove TODO?
https://github.com/llvm/llvm-project/pull/128654
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [LTO][Pipelines][Coro] De-duplicate Coro passes (PR #128654)
https://github.com/aeubanks approved this pull request. https://github.com/llvm/llvm-project/pull/128654 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [HLSL] Refactor Offset calculation while writing Root Signatures. (PR #128577)
@@ -12,44 +12,59 @@
using namespace llvm;
using namespace llvm::mcdxbc;
+void setRewrite(raw_ostream &Stream, uint32_t &Offset) {
+ const uint32_t DummyValue = std::numeric_limits::max();
+ Offset = Stream.tell();
+ support::endian::write(Stream, DummyValue, llvm::endianness::little);
+}
+
+void rewriteOffset(buffer_ostream &Stream, uint32_t Offset) {
+ uint32_t Value = Stream.tell();
+ auto *InsertPoint = &Stream.buffer()[Offset];
+ support::endian::write(InsertPoint, Value, llvm::endianness::little);
+}
+
void RootSignatureDesc::write(raw_ostream &OS) const {
- // Root signature header in dxcontainer has 6 uint_32t values.
- const uint32_t HeaderSize = 24;
- const uint32_t ParameterByteSize = Parameters.size_in_bytes();
- const uint32_t NumParametes = Parameters.size();
+ buffer_ostream Writer(OS);
+ const uint32_t NumParameters = Parameters.size();
const uint32_t Zero = 0;
- // Writing header information
- support::endian::write(OS, Header.Version, llvm::endianness::little);
- support::endian::write(OS, NumParametes, llvm::endianness::little);
- support::endian::write(OS, HeaderSize, llvm::endianness::little);
+ support::endian::write(Writer, Header.Version, llvm::endianness::little);
+ support::endian::write(Writer, NumParameters, llvm::endianness::little);
- // Static samplers still not implemented
- support::endian::write(OS, Zero, llvm::endianness::little);
- support::endian::write(OS, ParameterByteSize + HeaderSize,
- llvm::endianness::little);
+ uint32_t HeaderPoint;
+ setRewrite(Writer, HeaderPoint);
- support::endian::write(OS, Header.Flags, llvm::endianness::little);
+ support::endian::write(Writer, Zero, llvm::endianness::little);
+ support::endian::write(Writer, Zero, llvm::endianness::little);
+ support::endian::write(Writer, Header.Flags, llvm::endianness::little);
- uint32_t ParamsOffset =
- HeaderSize + (3 * sizeof(uint32_t) * Parameters.size());
- for (const dxbc::RootParameter &P : Parameters) {
-support::endian::write(OS, P.ParameterType, llvm::endianness::little);
-support::endian::write(OS, P.ShaderVisibility, llvm::endianness::little);
-support::endian::write(OS, ParamsOffset, llvm::endianness::little);
+ rewriteOffset(Writer, HeaderPoint);
-// Size of root parameter, removing the ParameterType and ShaderVisibility.
-ParamsOffset += sizeof(dxbc::RootParameter) - 2 * sizeof(uint32_t);
+ SmallVector ParamsOffset;
damyanp wrote:
Naming nit:
```suggestion
SmallVector ParamsOffsets;
```
https://github.com/llvm/llvm-project/pull/128577
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [HLSL] Refactor Offset calculation while writing Root Signatures. (PR #128577)
@@ -12,44 +12,59 @@
using namespace llvm;
using namespace llvm::mcdxbc;
+void setRewrite(raw_ostream &Stream, uint32_t &Offset) {
+ const uint32_t DummyValue = std::numeric_limits::max();
+ Offset = Stream.tell();
+ support::endian::write(Stream, DummyValue, llvm::endianness::little);
+}
+
+void rewriteOffset(buffer_ostream &Stream, uint32_t Offset) {
+ uint32_t Value = Stream.tell();
+ auto *InsertPoint = &Stream.buffer()[Offset];
+ support::endian::write(InsertPoint, Value, llvm::endianness::little);
+}
+
void RootSignatureDesc::write(raw_ostream &OS) const {
- // Root signature header in dxcontainer has 6 uint_32t values.
- const uint32_t HeaderSize = 24;
- const uint32_t ParameterByteSize = Parameters.size_in_bytes();
- const uint32_t NumParametes = Parameters.size();
+ buffer_ostream Writer(OS);
damyanp wrote:
Not convinced "Writer" is an appropriate name now. BOS? BS?
```suggestion
buffer_ostream BOS(OS);
```
https://github.com/llvm/llvm-project/pull/128577
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [HLSL] Refactor Offset calculation while writing Root Signatures. (PR #128577)
@@ -12,44 +12,59 @@
using namespace llvm;
using namespace llvm::mcdxbc;
+void setRewrite(raw_ostream &Stream, uint32_t &Offset) {
+ const uint32_t DummyValue = std::numeric_limits::max();
+ Offset = Stream.tell();
+ support::endian::write(Stream, DummyValue, llvm::endianness::little);
+}
+
+void rewriteOffset(buffer_ostream &Stream, uint32_t Offset) {
+ uint32_t Value = Stream.tell();
+ auto *InsertPoint = &Stream.buffer()[Offset];
+ support::endian::write(InsertPoint, Value, llvm::endianness::little);
+}
+
void RootSignatureDesc::write(raw_ostream &OS) const {
- // Root signature header in dxcontainer has 6 uint_32t values.
- const uint32_t HeaderSize = 24;
- const uint32_t ParameterByteSize = Parameters.size_in_bytes();
- const uint32_t NumParametes = Parameters.size();
+ buffer_ostream Writer(OS);
+ const uint32_t NumParameters = Parameters.size();
const uint32_t Zero = 0;
- // Writing header information
- support::endian::write(OS, Header.Version, llvm::endianness::little);
- support::endian::write(OS, NumParametes, llvm::endianness::little);
- support::endian::write(OS, HeaderSize, llvm::endianness::little);
+ support::endian::write(Writer, Header.Version, llvm::endianness::little);
+ support::endian::write(Writer, NumParameters, llvm::endianness::little);
- // Static samplers still not implemented
- support::endian::write(OS, Zero, llvm::endianness::little);
- support::endian::write(OS, ParameterByteSize + HeaderSize,
- llvm::endianness::little);
+ uint32_t HeaderPoint;
+ setRewrite(Writer, HeaderPoint);
- support::endian::write(OS, Header.Flags, llvm::endianness::little);
+ support::endian::write(Writer, Zero, llvm::endianness::little);
+ support::endian::write(Writer, Zero, llvm::endianness::little);
+ support::endian::write(Writer, Header.Flags, llvm::endianness::little);
- uint32_t ParamsOffset =
- HeaderSize + (3 * sizeof(uint32_t) * Parameters.size());
- for (const dxbc::RootParameter &P : Parameters) {
-support::endian::write(OS, P.ParameterType, llvm::endianness::little);
-support::endian::write(OS, P.ShaderVisibility, llvm::endianness::little);
-support::endian::write(OS, ParamsOffset, llvm::endianness::little);
+ rewriteOffset(Writer, HeaderPoint);
-// Size of root parameter, removing the ParameterType and ShaderVisibility.
-ParamsOffset += sizeof(dxbc::RootParameter) - 2 * sizeof(uint32_t);
+ SmallVector ParamsOffset;
+ for (const auto &P : Parameters) {
+support::endian::write(Writer, P.ParameterType, llvm::endianness::little);
+support::endian::write(Writer, P.ShaderVisibility,
+ llvm::endianness::little);
+
+uint32_t Offset;
+setRewrite(Writer, Offset);
+
+ParamsOffset.push_back(Offset);
damyanp wrote:
Take this or leave it, but I think this can be made a little nicer:
```suggestion
ParamsOffset.push_back(writePlaceholder(Writer));
```
https://github.com/llvm/llvm-project/pull/128577
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [HLSL] Refactor Offset calculation while writing Root Signatures. (PR #128577)
https://github.com/damyanp edited https://github.com/llvm/llvm-project/pull/128577 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [HLSL] Refactor Offset calculation while writing Root Signatures. (PR #128577)
@@ -12,44 +12,59 @@
using namespace llvm;
using namespace llvm::mcdxbc;
+void setRewrite(raw_ostream &Stream, uint32_t &Offset) {
damyanp wrote:
I think these two functions are only used from within this cpp. Should either
be marked as static, or in an anonymous namespace, to make that clear.
(I'm not sure what LLVM's preference is between static / anonymous namespace)
https://github.com/llvm/llvm-project/pull/128577
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [HLSL] Refactor Offset calculation while writing Root Signatures. (PR #128577)
@@ -12,44 +12,59 @@
using namespace llvm;
using namespace llvm::mcdxbc;
+void setRewrite(raw_ostream &Stream, uint32_t &Offset) {
+ const uint32_t DummyValue = std::numeric_limits::max();
+ Offset = Stream.tell();
+ support::endian::write(Stream, DummyValue, llvm::endianness::little);
+}
+
+void rewriteOffset(buffer_ostream &Stream, uint32_t Offset) {
+ uint32_t Value = Stream.tell();
+ auto *InsertPoint = &Stream.buffer()[Offset];
+ support::endian::write(InsertPoint, Value, llvm::endianness::little);
+}
damyanp wrote:
`Stream.pwrite` can help you avoid messing around with buffers and pointers.
```suggestion
void rewriteOffset(buffer_ostream &Stream, uint32_t Offset) {
uint32_t Value =
support::endian::byte_swap(
Stream.tell());
Stream.pwrite(reinterpret_cast(&Value), sizeof(Value), Offset);
}```
https://github.com/llvm/llvm-project/pull/128577
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [HLSL] Refactor Offset calculation while writing Root Signatures. (PR #128577)
https://github.com/damyanp requested changes to this pull request. A few nits, and I want to make sure that existing clients of this binary format can cope with a value of 0 for StaticSamplersOffset. https://github.com/llvm/llvm-project/pull/128577 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [llvm] [PowerPC] Update LLVM 20.1.0 Release Notes (PR #128764)
@@ -478,6 +494,10 @@ Changes to the LLVM tools * llvm-objcopy now prints the correct file path in the error message when the output file specified by `--dump-section` cannot be opened. +* llvm-cxxfilt now supports demangling call expressions encoded using `cp` instead of `cl`. + +* llvm-objdump now supports printing the file header, load section header and auxillary header for XCOFF object files under the ``--private-headers`` option. hubert-reinterpretcast wrote: ```suggestion * llvm-objdump now supports printing the file header, load section header and auxiliary header for XCOFF object files under the ``--private-headers`` option. ``` https://github.com/llvm/llvm-project/pull/128764 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [llvm] [PowerPC] Update LLVM 20.1.0 Release Notes (PR #128764)
https://github.com/hubert-reinterpretcast updated https://github.com/llvm/llvm-project/pull/128764 >From d8479f20064d7043bf3caf466968fadab2ccb45e Mon Sep 17 00:00:00 2001 From: Amy Kwan Date: Tue, 25 Feb 2025 13:21:45 -0600 Subject: [PATCH 1/2] [PowerPC] Update LLVM 20.1.0 Release Notes --- clang/docs/ReleaseNotes.rst | 2 ++ llvm/docs/ReleaseNotes.md | 30 +- 2 files changed, 31 insertions(+), 1 deletion(-) diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst index a2518042cb5b0..153afdb3d59e3 100644 --- a/clang/docs/ReleaseNotes.rst +++ b/clang/docs/ReleaseNotes.rst @@ -1269,6 +1269,8 @@ CUDA Support AIX Support ^^^ +- Fixed the ``-print-runtime-dir`` option. +- Enable continuous profile syncing feature on AIX. NetBSD Support ^^ diff --git a/llvm/docs/ReleaseNotes.md b/llvm/docs/ReleaseNotes.md index e654509792652..f4a8ac21a8312 100644 --- a/llvm/docs/ReleaseNotes.md +++ b/llvm/docs/ReleaseNotes.md @@ -263,7 +263,23 @@ Changes to the PowerPC Backend -- * The Linux `ppc64` LLC default cpu is updated from `ppc` to `ppc64`. -* The AIX LLC default cpu is updated from `generic` to `pwr7`. +* Replaced PPCMergeStringPool with GlobalMerge. +* Disabled vsx and altivec when -msoft-float is used. +* Added support for -mcpu=pwr11 -mtune=pwr11. +* Implemented BCD assist builtins. +* Expanded global named register support. +* Updated to use tablegen's MatchRegisterName(). +* Fixed saving of Link Register when using ROP Protect. +* Fixed SUBREG_TO_REG handling in the RegisterCoalescer. +* Fixed data layout alignment of i128 to 16. +* Fixed codegen for transparent_union function parameters. +* Added an error for incorrect use of memory operands. +* Other various bug fixes and codegen improvements. + +AIX Specific: +* LLC default cpu is updated from `generic` to `pwr7`. +* Fixed handling in emitGlobalConstantImpl to emit aliases to subobjects at proper offsets. +* Enabled aggressive merging of constants to reduce TOC entries. Changes to the RISC-V Backend - @@ -478,6 +494,10 @@ Changes to the LLVM tools * llvm-objcopy now prints the correct file path in the error message when the output file specified by `--dump-section` cannot be opened. +* llvm-cxxfilt now supports demangling call expressions encoded using `cp` instead of `cl`. + +* llvm-objdump now supports printing the file header, load section header and auxillary header for XCOFF object files under the ``--private-headers`` option. + Changes to LLDB - @@ -630,6 +650,14 @@ Changes to BOLT Changes to Sanitizers - +Changes to the Profile Runtime +-- + +* On platforms where ``atexit``-registered functions are not called when + a DSO is ``dlclose``'d, a mechanism is added that implements this + missing functionality for calls to ``atexit`` in the profile runtime. + [This is currently only enabled on AIX](https://github.com/llvm/llvm-project/pull/102940). + Other Changes - >From 55b80101fd8c47f657b67d8d0b9625eddd31944e Mon Sep 17 00:00:00 2001 From: Hubert Tong Date: Tue, 25 Feb 2025 16:47:44 -0400 Subject: [PATCH 2/2] Fix spelling error; should be "auxiliary" --- llvm/docs/ReleaseNotes.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/llvm/docs/ReleaseNotes.md b/llvm/docs/ReleaseNotes.md index f4a8ac21a8312..958b7adbc4c36 100644 --- a/llvm/docs/ReleaseNotes.md +++ b/llvm/docs/ReleaseNotes.md @@ -496,7 +496,7 @@ Changes to the LLVM tools * llvm-cxxfilt now supports demangling call expressions encoded using `cp` instead of `cl`. -* llvm-objdump now supports printing the file header, load section header and auxillary header for XCOFF object files under the ``--private-headers`` option. +* llvm-objdump now supports printing the file header, load section header and auxiliary header for XCOFF object files under the ``--private-headers`` option. Changes to LLDB - ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [DirectX] Support the CBufferLoadLegacy operation (PR #128699)
@@ -816,6 +822,19 @@ def CreateHandle : DXILOp<57, createHandle> {
let attributes = [Attributes];
}
+def CBufferLoadLegacy : DXILOp<59, cbufferLoadLegacy> {
+ let Doc = "reads from a TypedBuffer";
hekota wrote:
```suggestion
let Doc = "reads from a constant buffer";
```
https://github.com/llvm/llvm-project/pull/128699
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [DirectX] Support the CBufferLoadLegacy operation (PR #128699)
https://github.com/hekota edited https://github.com/llvm/llvm-project/pull/128699 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [DirectX] Support the CBufferLoadLegacy operation (PR #128699)
https://github.com/hekota approved this pull request. LGTM! Just one copy-paste nit. https://github.com/llvm/llvm-project/pull/128699 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [llvm] [PowerPC] Update LLVM 20.1.0 Release Notes (PR #128764)
amy-kwan wrote: @hubert-reinterpretcast Thanks for catching the typo! https://github.com/llvm/llvm-project/pull/128764 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [HLSL] Refactor Offset calculation while writing Root Signatures. (PR #128577)
@@ -134,12 +134,12 @@ TEST(RootSignature, ParseRootFlags) {
)"));
uint8_t Buffer[] = {
- 0x44, 0x58, 0x42, 0x43, 0x32, 0x9A, 0x53, 0xD8, 0xEC, 0xBE, 0x35, 0x6F,
- 0x05, 0x39, 0xE1, 0xFE, 0x31, 0x20, 0xF0, 0xC1, 0x01, 0x00, 0x00, 0x00,
+ 0x44, 0x58, 0x42, 0x43, 0x32, 0x9a, 0x53, 0xd8, 0xec, 0xbe, 0x35, 0x6f,
+ 0x05, 0x39, 0xe1, 0xfe, 0x31, 0x20, 0xf0, 0xc1, 0x01, 0x00, 0x00, 0x00,
0x44, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x24, 0x00, 0x00, 0x00,
0x52, 0x54, 0x53, 0x30, 0x18, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x18, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
};
damyanp wrote:
Are we confident that existing tooling (eg DXC or D3D) can handle receiving "0"
for StaticSamplersOffsets?
https://github.com/llvm/llvm-project/pull/128577
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/20.x: [X86][DAGCombiner] Skip x87 fp80 values in `combineFMulOrFDivWithIntPow2` (#128618) (PR #128717)
llvmbot wrote:
@llvm/pr-subscribers-llvm-support
Author: None (llvmbot)
Changes
Backport 44d1dbd24c20a0ee93063dcf44d68e2b8f0bf77c
Requested by: @dtcxzyw
---
Full diff: https://github.com/llvm/llvm-project/pull/128717.diff
4 Files Affected:
- (modified) llvm/include/llvm/ADT/APFloat.h (+1)
- (modified) llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (+5-2)
- (modified) llvm/lib/Support/APFloat.cpp (+5)
- (modified) llvm/test/CodeGen/X86/fold-int-pow2-with-fmul-or-fdiv.ll (+28)
``diff
diff --git a/llvm/include/llvm/ADT/APFloat.h b/llvm/include/llvm/ADT/APFloat.h
index 9792749230cbf..3bff205e7aa9e 100644
--- a/llvm/include/llvm/ADT/APFloat.h
+++ b/llvm/include/llvm/ADT/APFloat.h
@@ -353,6 +353,7 @@ struct APFloatBase {
static bool semanticsHasSignedRepr(const fltSemantics &);
static bool semanticsHasInf(const fltSemantics &);
static bool semanticsHasNaN(const fltSemantics &);
+ static bool isIEEELikeFP(const fltSemantics &);
// Returns true if any number described by \p Src can be precisely
represented
// by a normal (not subnormal) value in \p Dst.
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index a0c703d2df8a2..d57766cd9a5bc 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -17281,6 +17281,9 @@ SDValue DAGCombiner::visitFSUB(SDNode *N) {
// prefer it.
SDValue DAGCombiner::combineFMulOrFDivWithIntPow2(SDNode *N) {
EVT VT = N->getValueType(0);
+ if (!APFloat::isIEEELikeFP(VT.getFltSemantics()))
+return SDValue();
+
SDValue ConstOp, Pow2Op;
std::optional Mantissa;
@@ -17307,8 +17310,8 @@ SDValue
DAGCombiner::combineFMulOrFDivWithIntPow2(SDNode *N) {
const APFloat &APF = CFP->getValueAPF();
- // Make sure we have normal/ieee constant.
- if (!APF.isNormal() || !APF.isIEEE())
+ // Make sure we have normal constant.
+ if (!APF.isNormal())
return false;
// Make sure the floats exponent is within the bounds that this transform
diff --git a/llvm/lib/Support/APFloat.cpp b/llvm/lib/Support/APFloat.cpp
index b0d92ae37fe8f..cbee7f48b8773 100644
--- a/llvm/lib/Support/APFloat.cpp
+++ b/llvm/lib/Support/APFloat.cpp
@@ -353,6 +353,11 @@ bool APFloatBase::semanticsHasNaN(const fltSemantics
&semantics) {
return semantics.nonFiniteBehavior != fltNonfiniteBehavior::FiniteOnly;
}
+bool APFloatBase::isIEEELikeFP(const fltSemantics &semantics) {
+ // Keep in sync with Type::isIEEELikeFPTy
+ return SemanticsToEnum(semantics) <= S_IEEEquad;
+}
+
bool APFloatBase::isRepresentableAsNormalIn(const fltSemantics &Src,
const fltSemantics &Dst) {
// Exponent range must be larger.
diff --git a/llvm/test/CodeGen/X86/fold-int-pow2-with-fmul-or-fdiv.ll
b/llvm/test/CodeGen/X86/fold-int-pow2-with-fmul-or-fdiv.ll
index 2163121410553..15a9cbecd808a 100644
--- a/llvm/test/CodeGen/X86/fold-int-pow2-with-fmul-or-fdiv.ll
+++ b/llvm/test/CodeGen/X86/fold-int-pow2-with-fmul-or-fdiv.ll
@@ -1662,3 +1662,31 @@ define float @fdiv_pow_shl_cnt32_okay(i32 %cnt) nounwind
{
%mul = fdiv float 0x3a20, %conv
ret float %mul
}
+
+define x86_fp80 @pr128528(i1 %cond) {
+; CHECK-SSE-LABEL: pr128528:
+; CHECK-SSE: # %bb.0:
+; CHECK-SSE-NEXT:testb $1, %dil
+; CHECK-SSE-NEXT:movl $8, %eax
+; CHECK-SSE-NEXT:movl $1, %ecx
+; CHECK-SSE-NEXT:cmovnel %eax, %ecx
+; CHECK-SSE-NEXT:movl %ecx, -{{[0-9]+}}(%rsp)
+; CHECK-SSE-NEXT:fildl -{{[0-9]+}}(%rsp)
+; CHECK-SSE-NEXT:fmull {{\.?LCPI[0-9]+_[0-9]+}}(%rip)
+; CHECK-SSE-NEXT:retq
+;
+; CHECK-AVX-LABEL: pr128528:
+; CHECK-AVX: # %bb.0:
+; CHECK-AVX-NEXT:testb $1, %dil
+; CHECK-AVX-NEXT:movl $8, %eax
+; CHECK-AVX-NEXT:movl $1, %ecx
+; CHECK-AVX-NEXT:cmovnel %eax, %ecx
+; CHECK-AVX-NEXT:movl %ecx, -{{[0-9]+}}(%rsp)
+; CHECK-AVX-NEXT:fildl -{{[0-9]+}}(%rsp)
+; CHECK-AVX-NEXT:fmull {{\.?LCPI[0-9]+_[0-9]+}}(%rip)
+; CHECK-AVX-NEXT:retq
+ %sub9 = select i1 %cond, i32 8, i32 1
+ %conv = uitofp i32 %sub9 to x86_fp80
+ %mul = fmul x86_fp80 %conv, 0xK4007D0555800
+ ret x86_fp80 %mul
+}
``
https://github.com/llvm/llvm-project/pull/128717
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/20.x: [X86][DAGCombiner] Skip x87 fp80 values in `combineFMulOrFDivWithIntPow2` (#128618) (PR #128717)
https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/128717 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/20.x: [X86][DAGCombiner] Skip x87 fp80 values in `combineFMulOrFDivWithIntPow2` (#128618) (PR #128717)
https://github.com/llvmbot created
https://github.com/llvm/llvm-project/pull/128717
Backport 44d1dbd24c20a0ee93063dcf44d68e2b8f0bf77c
Requested by: @dtcxzyw
>From 21a6ae4cfdf1f364fe18cf152fe9eff543b4899b Mon Sep 17 00:00:00 2001
From: Yingwei Zheng
Date: Tue, 25 Feb 2025 22:03:17 +0800
Subject: [PATCH] [X86][DAGCombiner] Skip x87 fp80 values in
`combineFMulOrFDivWithIntPow2` (#128618)
f80 is not a valid IEEE floating-point type.
Closes https://github.com/llvm/llvm-project/issues/128528.
(cherry picked from commit 44d1dbd24c20a0ee93063dcf44d68e2b8f0bf77c)
---
llvm/include/llvm/ADT/APFloat.h | 1 +
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 7 +++--
llvm/lib/Support/APFloat.cpp | 5
.../X86/fold-int-pow2-with-fmul-or-fdiv.ll| 28 +++
4 files changed, 39 insertions(+), 2 deletions(-)
diff --git a/llvm/include/llvm/ADT/APFloat.h b/llvm/include/llvm/ADT/APFloat.h
index 9792749230cbf..3bff205e7aa9e 100644
--- a/llvm/include/llvm/ADT/APFloat.h
+++ b/llvm/include/llvm/ADT/APFloat.h
@@ -353,6 +353,7 @@ struct APFloatBase {
static bool semanticsHasSignedRepr(const fltSemantics &);
static bool semanticsHasInf(const fltSemantics &);
static bool semanticsHasNaN(const fltSemantics &);
+ static bool isIEEELikeFP(const fltSemantics &);
// Returns true if any number described by \p Src can be precisely
represented
// by a normal (not subnormal) value in \p Dst.
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index a0c703d2df8a2..d57766cd9a5bc 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -17281,6 +17281,9 @@ SDValue DAGCombiner::visitFSUB(SDNode *N) {
// prefer it.
SDValue DAGCombiner::combineFMulOrFDivWithIntPow2(SDNode *N) {
EVT VT = N->getValueType(0);
+ if (!APFloat::isIEEELikeFP(VT.getFltSemantics()))
+return SDValue();
+
SDValue ConstOp, Pow2Op;
std::optional Mantissa;
@@ -17307,8 +17310,8 @@ SDValue
DAGCombiner::combineFMulOrFDivWithIntPow2(SDNode *N) {
const APFloat &APF = CFP->getValueAPF();
- // Make sure we have normal/ieee constant.
- if (!APF.isNormal() || !APF.isIEEE())
+ // Make sure we have normal constant.
+ if (!APF.isNormal())
return false;
// Make sure the floats exponent is within the bounds that this transform
diff --git a/llvm/lib/Support/APFloat.cpp b/llvm/lib/Support/APFloat.cpp
index b0d92ae37fe8f..cbee7f48b8773 100644
--- a/llvm/lib/Support/APFloat.cpp
+++ b/llvm/lib/Support/APFloat.cpp
@@ -353,6 +353,11 @@ bool APFloatBase::semanticsHasNaN(const fltSemantics
&semantics) {
return semantics.nonFiniteBehavior != fltNonfiniteBehavior::FiniteOnly;
}
+bool APFloatBase::isIEEELikeFP(const fltSemantics &semantics) {
+ // Keep in sync with Type::isIEEELikeFPTy
+ return SemanticsToEnum(semantics) <= S_IEEEquad;
+}
+
bool APFloatBase::isRepresentableAsNormalIn(const fltSemantics &Src,
const fltSemantics &Dst) {
// Exponent range must be larger.
diff --git a/llvm/test/CodeGen/X86/fold-int-pow2-with-fmul-or-fdiv.ll
b/llvm/test/CodeGen/X86/fold-int-pow2-with-fmul-or-fdiv.ll
index 2163121410553..15a9cbecd808a 100644
--- a/llvm/test/CodeGen/X86/fold-int-pow2-with-fmul-or-fdiv.ll
+++ b/llvm/test/CodeGen/X86/fold-int-pow2-with-fmul-or-fdiv.ll
@@ -1662,3 +1662,31 @@ define float @fdiv_pow_shl_cnt32_okay(i32 %cnt) nounwind
{
%mul = fdiv float 0x3a20, %conv
ret float %mul
}
+
+define x86_fp80 @pr128528(i1 %cond) {
+; CHECK-SSE-LABEL: pr128528:
+; CHECK-SSE: # %bb.0:
+; CHECK-SSE-NEXT:testb $1, %dil
+; CHECK-SSE-NEXT:movl $8, %eax
+; CHECK-SSE-NEXT:movl $1, %ecx
+; CHECK-SSE-NEXT:cmovnel %eax, %ecx
+; CHECK-SSE-NEXT:movl %ecx, -{{[0-9]+}}(%rsp)
+; CHECK-SSE-NEXT:fildl -{{[0-9]+}}(%rsp)
+; CHECK-SSE-NEXT:fmull {{\.?LCPI[0-9]+_[0-9]+}}(%rip)
+; CHECK-SSE-NEXT:retq
+;
+; CHECK-AVX-LABEL: pr128528:
+; CHECK-AVX: # %bb.0:
+; CHECK-AVX-NEXT:testb $1, %dil
+; CHECK-AVX-NEXT:movl $8, %eax
+; CHECK-AVX-NEXT:movl $1, %ecx
+; CHECK-AVX-NEXT:cmovnel %eax, %ecx
+; CHECK-AVX-NEXT:movl %ecx, -{{[0-9]+}}(%rsp)
+; CHECK-AVX-NEXT:fildl -{{[0-9]+}}(%rsp)
+; CHECK-AVX-NEXT:fmull {{\.?LCPI[0-9]+_[0-9]+}}(%rip)
+; CHECK-AVX-NEXT:retq
+ %sub9 = select i1 %cond, i32 8, i32 1
+ %conv = uitofp i32 %sub9 to x86_fp80
+ %mul = fmul x86_fp80 %conv, 0xK4007D0555800
+ ret x86_fp80 %mul
+}
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/20.x: [X86][DAGCombiner] Skip x87 fp80 values in `combineFMulOrFDivWithIntPow2` (#128618) (PR #128717)
llvmbot wrote: @arsenm What do you think about merging this PR to the release branch? https://github.com/llvm/llvm-project/pull/128717 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/20.x: [X86][DAGCombiner] Skip x87 fp80 values in `combineFMulOrFDivWithIntPow2` (#128618) (PR #128717)
https://github.com/arsenm approved this pull request. https://github.com/llvm/llvm-project/pull/128717 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [DirectX] Fix printing of DXIL cbuffer info (PR #128698)
llvmbot wrote:
@llvm/pr-subscribers-backend-directx
Author: Justin Bogner (bogner)
Changes
Make sure we're able to print cbuffer comments in a way that's compatible with
DXC.
Fixes #128562
---
Full diff: https://github.com/llvm/llvm-project/pull/128698.diff
2 Files Affected:
- (modified) llvm/lib/Target/DirectX/DXILPrettyPrinter.cpp (+3)
- (modified) llvm/test/CodeGen/DirectX/CreateHandleFromBinding.ll (+9-1)
``diff
diff --git a/llvm/lib/Target/DirectX/DXILPrettyPrinter.cpp
b/llvm/lib/Target/DirectX/DXILPrettyPrinter.cpp
index ff690f2abe490..7255a9be06d51 100644
--- a/llvm/lib/Target/DirectX/DXILPrettyPrinter.cpp
+++ b/llvm/lib/Target/DirectX/DXILPrettyPrinter.cpp
@@ -164,6 +164,9 @@ struct FormatResourceDimension
case dxil::ResourceKind::TypedBuffer:
OS << "buf";
break;
+case dxil::ResourceKind::CBuffer:
+ OS << "NA";
+ break;
case dxil::ResourceKind::RTAccelerationStructure:
// TODO: dxc would print "ras" here. Can/should this happen?
llvm_unreachable("RTAccelerationStructure printing is not implemented");
diff --git a/llvm/test/CodeGen/DirectX/CreateHandleFromBinding.ll
b/llvm/test/CodeGen/DirectX/CreateHandleFromBinding.ll
index e0fcd4b2d9ac5..9919a3f2dbd25 100644
--- a/llvm/test/CodeGen/DirectX/CreateHandleFromBinding.ll
+++ b/llvm/test/CodeGen/DirectX/CreateHandleFromBinding.ll
@@ -9,6 +9,7 @@
; CHECK-PRETTY:SRV u32 buf T3 t3,space524
; CHECK-PRETTY:UAV i32 buf U0 u7,space2 1
; CHECK-PRETTY:UAV f32 buf U1 u5,space3 1
+; CHECK-PRETTY:cbuffer NA NA CB0cb0 1
target triple = "dxil-pc-shadermodel6.6-compute"
@@ -63,6 +64,12 @@ define void @test_bindings() {
; CHECK: [[BUF5:%.*]] = call %dx.types.Handle
@dx.op.createHandleFromBinding(i32 217, %dx.types.ResBind { i32 7, i32 -1, i32
0, i8 0 }, i32 %[[IX]], i1 false) #[[#ATTR]]
; CHECK: call %dx.types.Handle @dx.op.annotateHandle(i32 216,
%dx.types.Handle [[BUF5]], %dx.types.ResourceProperties { i32 10, i32 1033 })
#[[#ATTR]]
+ ; cbuffer cb0 : register(b0) { int4 i; float4 f; }
+ %cb0 = call target("dx.CBuffer", target("dx.Layout", {<4 x i32>, <4 x
float>}, 32, 0, 16))
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false)
+ ; CHECK: [[BUF6:%.*]] = call %dx.types.Handle
@dx.op.createHandleFromBinding(i32 217, %dx.types.ResBind { i32 0, i32 0, i32
0, i8 2 }, i32 0, i1 false) #[[#ATTR]]
+ ; CHECK: call %dx.types.Handle @dx.op.annotateHandle(i32 216,
%dx.types.Handle [[BUF6]], %dx.types.ResourceProperties { i32 13, i32 32 })
#[[#ATTR]]
+
ret void
}
@@ -72,8 +79,9 @@ define void @test_bindings() {
; contents of the metadata are tested elsewhere.
;
; CHECK: !dx.resources = !{[[RESMD:![0-9]+]]}
-; CHECK: [[RESMD]] = !{[[SRVMD:![0-9]+]], [[UAVMD:![0-9]+]], null, null}
+; CHECK: [[RESMD]] = !{[[SRVMD:![0-9]+]], [[UAVMD:![0-9]+]],
[[CBUFMD:![0-9]+]], null}
; CHECK-DAG: [[SRVMD]] = !{!{{[0-9]+}}, !{{[0-9]+}}, !{{[0-9]+}}, !{{[0-9]+}}}
; CHECK-DAG: [[UAVMD]] = !{!{{[0-9]+}}, !{{[0-9]+}}}
+; CHECK-DAG: [[CBUFMD]] = !{!{{[0-9]+}}}
attributes #0 = { nocallback nofree nosync nounwind willreturn memory(none) }
``
https://github.com/llvm/llvm-project/pull/128698
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [DirectX] Fix printing of DXIL cbuffer info (PR #128698)
https://github.com/bogner created
https://github.com/llvm/llvm-project/pull/128698
Make sure we're able to print cbuffer comments in a way that's compatible with
DXC.
Fixes #128562
>From 155483b100e7e60d62b966dfd56747a2c64a94dd Mon Sep 17 00:00:00 2001
From: Justin Bogner
Date: Sat, 22 Feb 2025 12:39:39 -0800
Subject: [PATCH] [DirectX] Fix printing of DXIL cbuffer info
Make sure we're able to print cbuffer comments in a way that's
compatible with DXC.
Fixes #128562
---
llvm/lib/Target/DirectX/DXILPrettyPrinter.cpp| 3 +++
llvm/test/CodeGen/DirectX/CreateHandleFromBinding.ll | 10 +-
2 files changed, 12 insertions(+), 1 deletion(-)
diff --git a/llvm/lib/Target/DirectX/DXILPrettyPrinter.cpp
b/llvm/lib/Target/DirectX/DXILPrettyPrinter.cpp
index ff690f2abe490..7255a9be06d51 100644
--- a/llvm/lib/Target/DirectX/DXILPrettyPrinter.cpp
+++ b/llvm/lib/Target/DirectX/DXILPrettyPrinter.cpp
@@ -164,6 +164,9 @@ struct FormatResourceDimension
case dxil::ResourceKind::TypedBuffer:
OS << "buf";
break;
+case dxil::ResourceKind::CBuffer:
+ OS << "NA";
+ break;
case dxil::ResourceKind::RTAccelerationStructure:
// TODO: dxc would print "ras" here. Can/should this happen?
llvm_unreachable("RTAccelerationStructure printing is not implemented");
diff --git a/llvm/test/CodeGen/DirectX/CreateHandleFromBinding.ll
b/llvm/test/CodeGen/DirectX/CreateHandleFromBinding.ll
index e0fcd4b2d9ac5..9919a3f2dbd25 100644
--- a/llvm/test/CodeGen/DirectX/CreateHandleFromBinding.ll
+++ b/llvm/test/CodeGen/DirectX/CreateHandleFromBinding.ll
@@ -9,6 +9,7 @@
; CHECK-PRETTY:SRV u32 buf T3 t3,space524
; CHECK-PRETTY:UAV i32 buf U0 u7,space2 1
; CHECK-PRETTY:UAV f32 buf U1 u5,space3 1
+; CHECK-PRETTY:cbuffer NA NA CB0cb0 1
target triple = "dxil-pc-shadermodel6.6-compute"
@@ -63,6 +64,12 @@ define void @test_bindings() {
; CHECK: [[BUF5:%.*]] = call %dx.types.Handle
@dx.op.createHandleFromBinding(i32 217, %dx.types.ResBind { i32 7, i32 -1, i32
0, i8 0 }, i32 %[[IX]], i1 false) #[[#ATTR]]
; CHECK: call %dx.types.Handle @dx.op.annotateHandle(i32 216,
%dx.types.Handle [[BUF5]], %dx.types.ResourceProperties { i32 10, i32 1033 })
#[[#ATTR]]
+ ; cbuffer cb0 : register(b0) { int4 i; float4 f; }
+ %cb0 = call target("dx.CBuffer", target("dx.Layout", {<4 x i32>, <4 x
float>}, 32, 0, 16))
+ @llvm.dx.resource.handlefrombinding(i32 0, i32 0, i32 1, i32 0, i1 false)
+ ; CHECK: [[BUF6:%.*]] = call %dx.types.Handle
@dx.op.createHandleFromBinding(i32 217, %dx.types.ResBind { i32 0, i32 0, i32
0, i8 2 }, i32 0, i1 false) #[[#ATTR]]
+ ; CHECK: call %dx.types.Handle @dx.op.annotateHandle(i32 216,
%dx.types.Handle [[BUF6]], %dx.types.ResourceProperties { i32 13, i32 32 })
#[[#ATTR]]
+
ret void
}
@@ -72,8 +79,9 @@ define void @test_bindings() {
; contents of the metadata are tested elsewhere.
;
; CHECK: !dx.resources = !{[[RESMD:![0-9]+]]}
-; CHECK: [[RESMD]] = !{[[SRVMD:![0-9]+]], [[UAVMD:![0-9]+]], null, null}
+; CHECK: [[RESMD]] = !{[[SRVMD:![0-9]+]], [[UAVMD:![0-9]+]],
[[CBUFMD:![0-9]+]], null}
; CHECK-DAG: [[SRVMD]] = !{!{{[0-9]+}}, !{{[0-9]+}}, !{{[0-9]+}}, !{{[0-9]+}}}
; CHECK-DAG: [[UAVMD]] = !{!{{[0-9]+}}, !{{[0-9]+}}}
+; CHECK-DAG: [[CBUFMD]] = !{!{{[0-9]+}}}
attributes #0 = { nocallback nofree nosync nounwind willreturn memory(none) }
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [DirectX] Support the CBufferLoadLegacy operation (PR #128699)
github-actions[bot] wrote:
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
You can test this locally with the following command:
``bash
git-clang-format --diff 7e00339e259f01f8b18d409760d78eee2460aeee
be9554eabde52e6feb37ad91935ee73aacdf00d6 --extensions h,cpp --
llvm/lib/Target/DirectX/DXILOpBuilder.cpp
llvm/lib/Target/DirectX/DXILOpBuilder.h
llvm/lib/Target/DirectX/DXILOpLowering.cpp llvm/utils/TableGen/DXILEmitter.cpp
``
View the diff from clang-format here.
``diff
diff --git a/llvm/lib/Target/DirectX/DXILOpBuilder.cpp
b/llvm/lib/Target/DirectX/DXILOpBuilder.cpp
index f45f86f601..e76b7d6ad7 100644
--- a/llvm/lib/Target/DirectX/DXILOpBuilder.cpp
+++ b/llvm/lib/Target/DirectX/DXILOpBuilder.cpp
@@ -208,8 +208,7 @@ static StructType *getCBufRetType(Type *ElementTy) {
// 64-bit types only have two elements
if (ElementTy->isDoubleTy() || ElementTy->isIntegerTy(64))
-return getOrCreateStructType(
-TypeName, {ElementTy, ElementTy}, Ctx);
+return getOrCreateStructType(TypeName, {ElementTy, ElementTy}, Ctx);
// 16-bit types pack 8 elements and have .8 in their name to differentiate
// from min-precision types.
``
https://github.com/llvm/llvm-project/pull/128699
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: Update divergence lowering tests (PR #128702)
https://github.com/arsenm approved this pull request. https://github.com/llvm/llvm-project/pull/128702 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [MachineSink] Lower SplitEdgeProbabilityThreshold (PR #127666)
https://github.com/guy-david edited https://github.com/llvm/llvm-project/pull/127666 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [MachineSink] Lower SplitEdgeProbabilityThreshold (PR #127666)
llvmbot wrote: @llvm/pr-subscribers-backend-amdgpu Author: Guy David (guy-david) Changes Requires https://github.com/llvm/llvm-project/pull/128745. Lower it slightly below the likeliness of a null-check to be true which is set to 37.5% (see PtrUntakenProb). Otherwise, it will split the edge and create another basic-block and with an unconditional branch which might make the CFG more complex and with a suboptimal block placement. Note that if multiple instructions can be sinked from the same edge then a split will occur regardless of this change. On M4 Pro: ``` $ ./utils/compare.py build-a/results1.json build-a/results2.json build-a/results3.json vs build-b/results1.json build-b/results2.json build-b/results3.json Tests: 4314 Metric: exec_time Program exec_time lhs rhsdiff MultiSourc...chmarks/Prolangs-C/agrep/agrep 0.00 0.01 44.7% MultiSourc...rks/McCat/03-testtrie/testtrie 0.01 0.01 31.7% SingleSour...hmarks/Shootout/Shootout-lists 2.02 2.64 30.6% SingleSour...ecute/GCC-C-execute-20170419-1 0.00 0.00 14.3% SingleSour.../execute/GCC-C-execute-pr59101 0.00 0.00 14.3% SingleSour...ecute/GCC-C-execute-20040311-1 0.00 0.00 14.3% SingleSour.../execute/GCC-C-execute-pr57124 0.00 0.00 14.3% SingleSour...ecute/GCC-C-execute-20031204-1 0.00 0.00 14.3% SingleSour...xecute/GCC-C-execute-pr57344-3 0.00 0.00 14.3% SingleSour.../execute/GCC-C-execute-pr57875 0.00 0.00 14.3% SingleSour...ecute/GCC-C-execute-20030811-1 0.00 0.00 14.3% SingleSour.../execute/GCC-C-execute-pr58640 0.00 0.00 14.3% SingleSour...ecute/GCC-C-execute-20030408-1 0.00 0.00 14.3% SingleSour...ecute/GCC-C-execute-20030323-1 0.00 0.00 14.3% SingleSour...ecute/GCC-C-execute-20030203-1 0.00 0.00 14.3% Geomean difference 0.1% exec_time l/r lhsrhs diff count 4314.004314.004294.00 mean 453.919219 454.105532 0.002072 std10865.757400 10868.002426 0.043046 min0.00 0.00 -0.171642 25%0.000700 0.000700 0.00 50%0.007400 0.007400 0.00 75%0.047829 0.047950 0.33 max321294.306703 321320.624713 0.447368 ``` On Ryzen9 5950X: ``` $ ./utils/compare.py build-a/results1.json build-a/results2.json build-a/results3.json vs build-b/results1.json build-b/results2.json build-b/results3.json Tests: 3326 Metric: exec_time Program exec_time lhs rhs diff MemFunctio...mCmp<1, GreaterThanZero, None> 1741.26 1885.00 143.74 MemFunctio..._MemCmp<1, LessThanZero, Last> 1759.78 1873.93 114.15 MemFunctio...est:BM_MemCmp<1, EqZero, Last> 1747.19 1847.42 100.22 MemFunctio...Cmp<1, GreaterThanZero, First> 1750.17 1844.57 94.40 MemFunctio...mCmp<1, GreaterThanZero, Last> 1751.05 1844.68 93.63 MemFunctio...emCmp<1, GreaterThanZero, Mid> 1756.49 1849.62 93.13 MemFunctio..._MemCmp<1, LessThanZero, None> 1744.87 1835.22 90.35 MemFunctio...M_MemCmp<1, LessThanZero, Mid> 1757.53 1846.29 88.77 harris/har...est:BENCHMARK_HARRIS/1024/1024 5689.29 5754.88 65.59 MemFunctio...MemCmp<2, LessThanZero, First> 1123.00 1181.63 58.63 MemFunctio...test:BM_MemCmp<1, EqZero, Mid> 2524.93 2582.21 57.28 MemFunctio...est:BM_MemCmp<1, EqZero, None> 2525.97 2582.43 56.46 MemFunctio..._MemCmp<3, LessThanZero, Last>869.04924.66 55.62 MemFunctio...test:BM_MemCmp<3, EqZero, Mid>878.39932.53 54.14 MemFunctio...MemCmp<1, LessThanZero, First> 2528.37 2582.27 53.90 exec_time l/r lhs rhs diff Program test-suite :: MicroBenchmarks/MemFunctions/MemFunctions.test:BM_MemCmp<1, GreaterThanZero, None> 1741.2616631884.998860143.737197 test-suite :: MicroBenchmarks/MemFunctions/MemFunctions.test:BM_MemCmp<1, LessThanZero, Last> 1759.7793551873.926412114.147056 test-suite :: MicroBenchmarks/MemFunctions/MemFunctions.test:BM_MemCmp<1, EqZero, Last>
[llvm-branch-commits] [llvm] [MachineSink] Lower SplitEdgeProbabilityThreshold (PR #127666)
llvmbot wrote: @llvm/pr-subscribers-llvm-globalisel Author: Guy David (guy-david) Changes Requires https://github.com/llvm/llvm-project/pull/128745. Lower it slightly below the likeliness of a null-check to be true which is set to 37.5% (see PtrUntakenProb). Otherwise, it will split the edge and create another basic-block and with an unconditional branch which might make the CFG more complex and with a suboptimal block placement. Note that if multiple instructions can be sinked from the same edge then a split will occur regardless of this change. On M4 Pro: ``` $ ./utils/compare.py build-a/results1.json build-a/results2.json build-a/results3.json vs build-b/results1.json build-b/results2.json build-b/results3.json Tests: 4314 Metric: exec_time Program exec_time lhs rhsdiff MultiSourc...chmarks/Prolangs-C/agrep/agrep 0.00 0.01 44.7% MultiSourc...rks/McCat/03-testtrie/testtrie 0.01 0.01 31.7% SingleSour...hmarks/Shootout/Shootout-lists 2.02 2.64 30.6% SingleSour...ecute/GCC-C-execute-20170419-1 0.00 0.00 14.3% SingleSour.../execute/GCC-C-execute-pr59101 0.00 0.00 14.3% SingleSour...ecute/GCC-C-execute-20040311-1 0.00 0.00 14.3% SingleSour.../execute/GCC-C-execute-pr57124 0.00 0.00 14.3% SingleSour...ecute/GCC-C-execute-20031204-1 0.00 0.00 14.3% SingleSour...xecute/GCC-C-execute-pr57344-3 0.00 0.00 14.3% SingleSour.../execute/GCC-C-execute-pr57875 0.00 0.00 14.3% SingleSour...ecute/GCC-C-execute-20030811-1 0.00 0.00 14.3% SingleSour.../execute/GCC-C-execute-pr58640 0.00 0.00 14.3% SingleSour...ecute/GCC-C-execute-20030408-1 0.00 0.00 14.3% SingleSour...ecute/GCC-C-execute-20030323-1 0.00 0.00 14.3% SingleSour...ecute/GCC-C-execute-20030203-1 0.00 0.00 14.3% Geomean difference 0.1% exec_time l/r lhsrhs diff count 4314.004314.004294.00 mean 453.919219 454.105532 0.002072 std10865.757400 10868.002426 0.043046 min0.00 0.00 -0.171642 25%0.000700 0.000700 0.00 50%0.007400 0.007400 0.00 75%0.047829 0.047950 0.33 max321294.306703 321320.624713 0.447368 ``` On Ryzen9 5950X: ``` $ ./utils/compare.py build-a/results1.json build-a/results2.json build-a/results3.json vs build-b/results1.json build-b/results2.json build-b/results3.json Tests: 3326 Metric: exec_time Program exec_time lhs rhs diff MemFunctio...mCmp<1, GreaterThanZero, None> 1741.26 1885.00 143.74 MemFunctio..._MemCmp<1, LessThanZero, Last> 1759.78 1873.93 114.15 MemFunctio...est:BM_MemCmp<1, EqZero, Last> 1747.19 1847.42 100.22 MemFunctio...Cmp<1, GreaterThanZero, First> 1750.17 1844.57 94.40 MemFunctio...mCmp<1, GreaterThanZero, Last> 1751.05 1844.68 93.63 MemFunctio...emCmp<1, GreaterThanZero, Mid> 1756.49 1849.62 93.13 MemFunctio..._MemCmp<1, LessThanZero, None> 1744.87 1835.22 90.35 MemFunctio...M_MemCmp<1, LessThanZero, Mid> 1757.53 1846.29 88.77 harris/har...est:BENCHMARK_HARRIS/1024/1024 5689.29 5754.88 65.59 MemFunctio...MemCmp<2, LessThanZero, First> 1123.00 1181.63 58.63 MemFunctio...test:BM_MemCmp<1, EqZero, Mid> 2524.93 2582.21 57.28 MemFunctio...est:BM_MemCmp<1, EqZero, None> 2525.97 2582.43 56.46 MemFunctio..._MemCmp<3, LessThanZero, Last>869.04924.66 55.62 MemFunctio...test:BM_MemCmp<3, EqZero, Mid>878.39932.53 54.14 MemFunctio...MemCmp<1, LessThanZero, First> 2528.37 2582.27 53.90 exec_time l/r lhs rhs diff Program test-suite :: MicroBenchmarks/MemFunctions/MemFunctions.test:BM_MemCmp<1, GreaterThanZero, None> 1741.2616631884.998860143.737197 test-suite :: MicroBenchmarks/MemFunctions/MemFunctions.test:BM_MemCmp<1, LessThanZero, Last> 1759.7793551873.926412114.147056 test-suite :: MicroBenchmarks/MemFunctions/MemFunctions.test:BM_MemCmp<1, EqZero, Last>
[llvm-branch-commits] [llvm] [MachineSink] Lower SplitEdgeProbabilityThreshold (PR #127666)
llvmbot wrote: @llvm/pr-subscribers-backend-arm @llvm/pr-subscribers-backend-powerpc Author: Guy David (guy-david) Changes Requires https://github.com/llvm/llvm-project/pull/128745. Lower it slightly below the likeliness of a null-check to be true which is set to 37.5% (see PtrUntakenProb). Otherwise, it will split the edge and create another basic-block and with an unconditional branch which might make the CFG more complex and with a suboptimal block placement. Note that if multiple instructions can be sinked from the same edge then a split will occur regardless of this change. On M4 Pro: ``` $ ./utils/compare.py build-a/results1.json build-a/results2.json build-a/results3.json vs build-b/results1.json build-b/results2.json build-b/results3.json Tests: 4314 Metric: exec_time Program exec_time lhs rhsdiff MultiSourc...chmarks/Prolangs-C/agrep/agrep 0.00 0.01 44.7% MultiSourc...rks/McCat/03-testtrie/testtrie 0.01 0.01 31.7% SingleSour...hmarks/Shootout/Shootout-lists 2.02 2.64 30.6% SingleSour...ecute/GCC-C-execute-20170419-1 0.00 0.00 14.3% SingleSour.../execute/GCC-C-execute-pr59101 0.00 0.00 14.3% SingleSour...ecute/GCC-C-execute-20040311-1 0.00 0.00 14.3% SingleSour.../execute/GCC-C-execute-pr57124 0.00 0.00 14.3% SingleSour...ecute/GCC-C-execute-20031204-1 0.00 0.00 14.3% SingleSour...xecute/GCC-C-execute-pr57344-3 0.00 0.00 14.3% SingleSour.../execute/GCC-C-execute-pr57875 0.00 0.00 14.3% SingleSour...ecute/GCC-C-execute-20030811-1 0.00 0.00 14.3% SingleSour.../execute/GCC-C-execute-pr58640 0.00 0.00 14.3% SingleSour...ecute/GCC-C-execute-20030408-1 0.00 0.00 14.3% SingleSour...ecute/GCC-C-execute-20030323-1 0.00 0.00 14.3% SingleSour...ecute/GCC-C-execute-20030203-1 0.00 0.00 14.3% Geomean difference 0.1% exec_time l/r lhsrhs diff count 4314.004314.004294.00 mean 453.919219 454.105532 0.002072 std10865.757400 10868.002426 0.043046 min0.00 0.00 -0.171642 25%0.000700 0.000700 0.00 50%0.007400 0.007400 0.00 75%0.047829 0.047950 0.33 max321294.306703 321320.624713 0.447368 ``` On Ryzen9 5950X: ``` $ ./utils/compare.py build-a/results1.json build-a/results2.json build-a/results3.json vs build-b/results1.json build-b/results2.json build-b/results3.json Tests: 3326 Metric: exec_time Program exec_time lhs rhs diff MemFunctio...mCmp<1, GreaterThanZero, None> 1741.26 1885.00 143.74 MemFunctio..._MemCmp<1, LessThanZero, Last> 1759.78 1873.93 114.15 MemFunctio...est:BM_MemCmp<1, EqZero, Last> 1747.19 1847.42 100.22 MemFunctio...Cmp<1, GreaterThanZero, First> 1750.17 1844.57 94.40 MemFunctio...mCmp<1, GreaterThanZero, Last> 1751.05 1844.68 93.63 MemFunctio...emCmp<1, GreaterThanZero, Mid> 1756.49 1849.62 93.13 MemFunctio..._MemCmp<1, LessThanZero, None> 1744.87 1835.22 90.35 MemFunctio...M_MemCmp<1, LessThanZero, Mid> 1757.53 1846.29 88.77 harris/har...est:BENCHMARK_HARRIS/1024/1024 5689.29 5754.88 65.59 MemFunctio...MemCmp<2, LessThanZero, First> 1123.00 1181.63 58.63 MemFunctio...test:BM_MemCmp<1, EqZero, Mid> 2524.93 2582.21 57.28 MemFunctio...est:BM_MemCmp<1, EqZero, None> 2525.97 2582.43 56.46 MemFunctio..._MemCmp<3, LessThanZero, Last>869.04924.66 55.62 MemFunctio...test:BM_MemCmp<3, EqZero, Mid>878.39932.53 54.14 MemFunctio...MemCmp<1, LessThanZero, First> 2528.37 2582.27 53.90 exec_time l/r lhs rhs diff Program test-suite :: MicroBenchmarks/MemFunctions/MemFunctions.test:BM_MemCmp<1, GreaterThanZero, None> 1741.2616631884.998860143.737197 test-suite :: MicroBenchmarks/MemFunctions/MemFunctions.test:BM_MemCmp<1, LessThanZero, Last> 1759.7793551873.926412114.147056 test-suite :: MicroBenchmarks/MemFunctions/MemFunctions.test:BM_MemCmp<1, EqZero, Last>
[llvm-branch-commits] [llvm] 69ee30f - [DAGCombiner] visitFREEZE: Early exit when N is deleted (#128161)
Author: Yingwei Zheng
Date: 2025-02-25T08:25:08-08:00
New Revision: 69ee30f9db773048d314db466aaa187b6843c3c0
URL:
https://github.com/llvm/llvm-project/commit/69ee30f9db773048d314db466aaa187b6843c3c0
DIFF:
https://github.com/llvm/llvm-project/commit/69ee30f9db773048d314db466aaa187b6843c3c0.diff
LOG: [DAGCombiner] visitFREEZE: Early exit when N is deleted (#128161)
`N` may get merged with existing nodes inside the loop. Early exit when
it is deleted to avoid the crash.
Alternative solution: use `DAGNodeDeletedListener` to refresh the value
of N.
Closes https://github.com/llvm/llvm-project/issues/128143.
(cherry picked from commit 646e4f2eede9a39e46012dde9430cd289682e83c)
Added:
llvm/test/CodeGen/X86/pr128143.ll
Modified:
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Removed:
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index a0c703d2df8a2..1e023d4f76b2c 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -16170,11 +16170,13 @@ SDValue DAGCombiner::visitFREEZE(SDNode *N) {
DAG.UpdateNodeOperands(FrozenMaybePoisonOperand.getNode(),
MaybePoisonOperand);
}
+
+// This node has been merged with another.
+if (N->getOpcode() == ISD::DELETED_NODE)
+ return SDValue(N, 0);
}
- // This node has been merged with another.
- if (N->getOpcode() == ISD::DELETED_NODE)
-return SDValue(N, 0);
+ assert(N->getOpcode() != ISD::DELETED_NODE && "Node was deleted!");
// The whole node may have been updated, so the value we were holding
// may no longer be valid. Re-fetch the operand we're `freeze`ing.
diff --git a/llvm/test/CodeGen/X86/pr128143.ll
b/llvm/test/CodeGen/X86/pr128143.ll
new file mode 100644
index 0..2517ad9ebcb6b
--- /dev/null
+++ b/llvm/test/CodeGen/X86/pr128143.ll
@@ -0,0 +1,32 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
UTC_ARGS: --version 5
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+
+@g_1 = external global i8
+@g_2 = external global i8
+
+; Make sure we don't crash on this test.
+
+define i1 @test(i1 %cmp1, i32 %x) {
+; CHECK-LABEL: test:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT:movq g_2@GOTPCREL(%rip), %rcx
+; CHECK-NEXT:xorl %eax, %eax
+; CHECK-NEXT:cmpq %rcx, g_1@GOTPCREL(%rip)
+; CHECK-NEXT:setne %al
+; CHECK-NEXT:cmpl %eax, %esi
+; CHECK-NEXT:setb %cl
+; CHECK-NEXT:orb %cl, %al
+; CHECK-NEXT:andb %dil, %al
+; CHECK-NEXT:# kill: def $al killed $al killed $eax
+; CHECK-NEXT:retq
+entry:
+ %cmp2 = icmp ne ptr @g_1, @g_2
+ %fr = freeze ptr @g_1
+ %cmp3 = icmp ne ptr %fr, @g_2
+ %ext1 = zext i1 %cmp3 to i32
+ %sel1 = select i1 %cmp1, i1 %cmp2, i1 false
+ %cmp4 = icmp ult i32 %x, %ext1
+ %sel3 = select i1 %cmp1, i1 %cmp4, i1 false
+ %or = or i1 %sel1, %sel3
+ ret i1 %or
+}
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [flang] release/20.x: [flang] fix AArch64 PCS for struct following pointer (#127802) (PR #128518)
https://github.com/llvmbot updated
https://github.com/llvm/llvm-project/pull/128518
>From 350e0e2b45331279a003d3ab7c7178680e533158 Mon Sep 17 00:00:00 2001
From: David Truby
Date: Fri, 21 Feb 2025 18:50:52 +
Subject: [PATCH] [flang] fix AArch64 PCS for struct following pointer
(#127802)
Pointers are already handled as taking up a register in the ABI
handling, but the handling for structs was not taking this into account.
This patch changes the struct handling to acknowledge that pointer
arguments take up an integer register.
Fixes #123075
(cherry picked from commit 449f84fea652e31de418c3087d7e3628809241b4)
---
flang/lib/Optimizer/CodeGen/Target.cpp | 7 +++
flang/test/Fir/struct-passing-aarch64-byval.fir | 14 ++
2 files changed, 21 insertions(+)
diff --git a/flang/lib/Optimizer/CodeGen/Target.cpp
b/flang/lib/Optimizer/CodeGen/Target.cpp
index 1bc673bb34e32..2a1eb0bc33f5c 100644
--- a/flang/lib/Optimizer/CodeGen/Target.cpp
+++ b/flang/lib/Optimizer/CodeGen/Target.cpp
@@ -930,6 +930,13 @@ struct TargetAArch64 : public GenericTarget
{
.Case([&](auto) {
TODO(loc, "passing vector argument to C by value is not supported");
return NRegs{};
+})
+.Default([&](auto ty) {
+ if (fir::conformsWithPassByRef(ty))
+return NRegs{1, false}; // Pointers take 1 integer register
+ TODO(loc, "unsupported component type for BIND(C), VALUE derived "
+"type argument");
+ return NRegs{};
});
}
diff --git a/flang/test/Fir/struct-passing-aarch64-byval.fir
b/flang/test/Fir/struct-passing-aarch64-byval.fir
index 27143459dde2f..087efba393014 100644
--- a/flang/test/Fir/struct-passing-aarch64-byval.fir
+++ b/flang/test/Fir/struct-passing-aarch64-byval.fir
@@ -71,3 +71,17 @@ func.func private
@too_many_hfa(!fir.type,
// CHECK-LABEL: func.func private
@too_big(!fir.ref}>> {{{.*}}, llvm.byval
= !fir.type}>})
func.func private @too_big(!fir.type}>)
+
+// CHECK-LABEL: func.func private @pointer_type(!fir.ref,
!fir.array<1xi64>)
+func.func private @pointer_type(!fir.ref, !fir.type)
+
+// CHECK-LABEL: func.func private @pointer_type_too_many_int(!fir.ref,
+// CHECK-SAME: !fir.array<2xi64>,
+// CHECK-SAME: !fir.array<2xi64>,
+// CHECK-SAME: !fir.array<2xi64>,
+// CHECK-SAME: !fir.ref> {{{.*}}, llvm.byval =
!fir.type})
+func.func private @pointer_type_too_many_int(!fir.ref,
+ !fir.type,
+ !fir.type,
+ !fir.type,
+ !fir.type)
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/20.x: Do not treat llvm.fake.use as a debug instruction (#128684) (PR #128734)
llvmbot wrote:
@llvm/pr-subscribers-llvm-ir
Author: None (llvmbot)
Changes
Backport af68927a831c45b92248b1f6fc24d445be42dd91
Requested by: @SLTozer
---
Full diff: https://github.com/llvm/llvm-project/pull/128734.diff
2 Files Affected:
- (modified) llvm/lib/IR/Instruction.cpp (+1-4)
- (added)
llvm/test/Transforms/SimplifyCFG/X86/fake-use-considered-when-sinking.ll (+67)
``diff
diff --git a/llvm/lib/IR/Instruction.cpp b/llvm/lib/IR/Instruction.cpp
index 84d9306ca6700..7d43de982df0d 100644
--- a/llvm/lib/IR/Instruction.cpp
+++ b/llvm/lib/IR/Instruction.cpp
@@ -1233,10 +1233,7 @@ Instruction::getNextNonDebugInstruction(bool
SkipPseudoOp) const {
const Instruction *
Instruction::getPrevNonDebugInstruction(bool SkipPseudoOp) const {
for (const Instruction *I = getPrevNode(); I; I = I->getPrevNode())
-if (!isa(I) &&
-!(SkipPseudoOp && isa(I)) &&
-!(isa(I) &&
- cast(I)->getIntrinsicID() == Intrinsic::fake_use))
+if (!isa(I) && !(SkipPseudoOp &&
isa(I)))
return I;
return nullptr;
}
diff --git
a/llvm/test/Transforms/SimplifyCFG/X86/fake-use-considered-when-sinking.ll
b/llvm/test/Transforms/SimplifyCFG/X86/fake-use-considered-when-sinking.ll
new file mode 100644
index 0..63217315c978c
--- /dev/null
+++ b/llvm/test/Transforms/SimplifyCFG/X86/fake-use-considered-when-sinking.ll
@@ -0,0 +1,67 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
UTC_ARGS: --version 5
+; RUN: opt -p="simplifycfg" -S < %s | FileCheck %s
+
+;; Verify that fake uses are not ignored when sinking instructions in
+;; SimplifyCFG; when a fake use appears in only one incoming block they prevent
+;; further sinking, and when identical fake uses appear on both sides they
+;; are sunk normally.
+
+target datalayout =
"e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-linux-gnu"
+
+define void @foo(i1 %bool, ptr %p) {
+; CHECK-LABEL: define void @foo(
+; CHECK-SAME: i1 [[BOOL:%.*]], ptr [[P:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT:br i1 [[BOOL]], label %[[IF_ELSE:.*]], label %[[IF_THEN:.*]]
+; CHECK: [[COMMON_RET:.*]]:
+; CHECK-NEXT:ret void
+; CHECK: [[IF_THEN]]:
+; CHECK-NEXT:store ptr [[P]], ptr [[P]], align 8
+; CHECK-NEXT:br label %[[COMMON_RET]]
+; CHECK: [[IF_ELSE]]:
+; CHECK-NEXT:store ptr [[P]], ptr [[P]], align 8
+; CHECK-NEXT:notail call void (...) @llvm.fake.use(ptr [[P]])
+; CHECK-NEXT:br label %[[COMMON_RET]]
+;
+entry:
+ br i1 %bool, label %if.else, label %if.then
+
+common.ret: ; preds = %if.else, %if.then
+ ret void
+
+if.then: ; preds = %entry
+ store ptr %p, ptr %p, align 8
+ br label %common.ret
+
+if.else: ; preds = %entry
+ store ptr %p, ptr %p, align 8
+ notail call void (...) @llvm.fake.use(ptr %p)
+ br label %common.ret
+}
+
+define void @bar(i1 %bool, ptr %p) {
+; CHECK-LABEL: define void @bar(
+; CHECK-SAME: i1 [[BOOL:%.*]], ptr [[P:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*:]]
+; CHECK-NEXT:store ptr [[P]], ptr [[P]], align 8
+; CHECK-NEXT:notail call void (...) @llvm.fake.use(ptr [[P]])
+; CHECK-NEXT:ret void
+;
+entry:
+ br i1 %bool, label %if.else, label %if.then
+
+common.ret: ; preds = %if.else, %if.then
+ ret void
+
+if.then: ; preds = %entry
+ store ptr %p, ptr %p, align 8
+ notail call void (...) @llvm.fake.use(ptr %p)
+ br label %common.ret
+
+if.else: ; preds = %entry
+ store ptr %p, ptr %p, align 8
+ notail call void (...) @llvm.fake.use(ptr %p)
+ br label %common.ret
+}
+
``
https://github.com/llvm/llvm-project/pull/128734
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [flang] release/20.x: [flang] fix AArch64 PCS for struct following pointer (#127802) (PR #128518)
https://github.com/tstellar closed https://github.com/llvm/llvm-project/pull/128518 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [flang] 350e0e2 - [flang] fix AArch64 PCS for struct following pointer (#127802)
Author: David Truby
Date: 2025-02-25T08:27:06-08:00
New Revision: 350e0e2b45331279a003d3ab7c7178680e533158
URL:
https://github.com/llvm/llvm-project/commit/350e0e2b45331279a003d3ab7c7178680e533158
DIFF:
https://github.com/llvm/llvm-project/commit/350e0e2b45331279a003d3ab7c7178680e533158.diff
LOG: [flang] fix AArch64 PCS for struct following pointer (#127802)
Pointers are already handled as taking up a register in the ABI
handling, but the handling for structs was not taking this into account.
This patch changes the struct handling to acknowledge that pointer
arguments take up an integer register.
Fixes #123075
(cherry picked from commit 449f84fea652e31de418c3087d7e3628809241b4)
Added:
Modified:
flang/lib/Optimizer/CodeGen/Target.cpp
flang/test/Fir/struct-passing-aarch64-byval.fir
Removed:
diff --git a/flang/lib/Optimizer/CodeGen/Target.cpp
b/flang/lib/Optimizer/CodeGen/Target.cpp
index 1bc673bb34e32..2a1eb0bc33f5c 100644
--- a/flang/lib/Optimizer/CodeGen/Target.cpp
+++ b/flang/lib/Optimizer/CodeGen/Target.cpp
@@ -930,6 +930,13 @@ struct TargetAArch64 : public GenericTarget
{
.Case([&](auto) {
TODO(loc, "passing vector argument to C by value is not supported");
return NRegs{};
+})
+.Default([&](auto ty) {
+ if (fir::conformsWithPassByRef(ty))
+return NRegs{1, false}; // Pointers take 1 integer register
+ TODO(loc, "unsupported component type for BIND(C), VALUE derived "
+"type argument");
+ return NRegs{};
});
}
diff --git a/flang/test/Fir/struct-passing-aarch64-byval.fir
b/flang/test/Fir/struct-passing-aarch64-byval.fir
index 27143459dde2f..087efba393014 100644
--- a/flang/test/Fir/struct-passing-aarch64-byval.fir
+++ b/flang/test/Fir/struct-passing-aarch64-byval.fir
@@ -71,3 +71,17 @@ func.func private
@too_many_hfa(!fir.type,
// CHECK-LABEL: func.func private
@too_big(!fir.ref}>> {{{.*}}, llvm.byval
= !fir.type}>})
func.func private @too_big(!fir.type}>)
+
+// CHECK-LABEL: func.func private @pointer_type(!fir.ref,
!fir.array<1xi64>)
+func.func private @pointer_type(!fir.ref, !fir.type)
+
+// CHECK-LABEL: func.func private @pointer_type_too_many_int(!fir.ref,
+// CHECK-SAME: !fir.array<2xi64>,
+// CHECK-SAME: !fir.array<2xi64>,
+// CHECK-SAME: !fir.array<2xi64>,
+// CHECK-SAME: !fir.ref> {{{.*}}, llvm.byval =
!fir.type})
+func.func private @pointer_type_too_many_int(!fir.ref,
+ !fir.type,
+ !fir.type,
+ !fir.type,
+ !fir.type)
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/20.x: [Hexagon] Add a case to BitTracker for new register class (#128580) (PR #128738)
androm3da wrote: > @androm3da What do you think about merging this PR to the release branch? well I just love that idea, tyvm @llvmbot https://github.com/llvm/llvm-project/pull/128738 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/20.x: Do not treat llvm.fake.use as a debug instruction (#128684) (PR #128734)
https://github.com/jmorse approved this pull request. LGTM too as per Orlando's analysis https://github.com/llvm/llvm-project/pull/128734 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/20.x: [X86][DAGCombiner] Skip x87 fp80 values in `combineFMulOrFDivWithIntPow2` (#128618) (PR #128717)
github-actions[bot] wrote: @dtcxzyw (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. When you are done, please add the release:note label to this PR. https://github.com/llvm/llvm-project/pull/128717 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [HLSL] Refactor Offset calculation while writing Root Signatures. (PR #128577)
https://github.com/joaosaffran updated
https://github.com/llvm/llvm-project/pull/128577
>From 767b7d02bf71e6e0137e2b5f9f9b8d8b799ac81f Mon Sep 17 00:00:00 2001
From: joaosaffran
Date: Sat, 22 Feb 2025 06:19:15 +
Subject: [PATCH 1/7] first working version
---
.../llvm/MC/DXContainerRootSignature.h| 5 +-
llvm/lib/MC/DXContainerRootSignature.cpp | 90 +--
llvm/lib/Object/DXContainer.cpp | 10 ++-
llvm/lib/ObjectYAML/DXContainerEmitter.cpp| 4 +-
.../lib/Target/DirectX/DXContainerGlobals.cpp | 5 +-
.../ContainerData/RootSignature-Flags.ll | 2 +-
.../DXContainer/RootSignature-Flags.yaml | 2 +-
.../RootSignature-MultipleParameters.yaml | 2 +-
.../ObjectYAML/DXContainerYAMLTest.cpp| 8 +-
9 files changed, 85 insertions(+), 43 deletions(-)
diff --git a/llvm/include/llvm/MC/DXContainerRootSignature.h
b/llvm/include/llvm/MC/DXContainerRootSignature.h
index b31b0da352038..cae4f79aef56f 100644
--- a/llvm/include/llvm/MC/DXContainerRootSignature.h
+++ b/llvm/include/llvm/MC/DXContainerRootSignature.h
@@ -7,8 +7,7 @@
//===--===//
#include "llvm/BinaryFormat/DXContainer.h"
-#include
-#include
+#include "llvm/Support/raw_ostream.h"
namespace llvm {
@@ -19,7 +18,7 @@ struct RootSignatureDesc {
dxbc::RootSignatureHeader Header;
SmallVector Parameters;
- void write(raw_ostream &OS) const;
+ Error write(raw_ostream &OS) const;
};
} // namespace mcdxbc
} // namespace llvm
diff --git a/llvm/lib/MC/DXContainerRootSignature.cpp
b/llvm/lib/MC/DXContainerRootSignature.cpp
index 35a4ef322d01e..9a279ab722877 100644
--- a/llvm/lib/MC/DXContainerRootSignature.cpp
+++ b/llvm/lib/MC/DXContainerRootSignature.cpp
@@ -7,53 +7,89 @@
//===--===//
#include "llvm/MC/DXContainerRootSignature.h"
-#include "llvm/Support/EndianStream.h"
+#include "llvm/Support/BinaryStreamWriter.h"
+#include
using namespace llvm;
using namespace llvm::mcdxbc;
-void RootSignatureDesc::write(raw_ostream &OS) const {
- // Root signature header in dxcontainer has 6 uint_32t values.
- const uint32_t HeaderSize = 24;
- const uint32_t ParameterByteSize = Parameters.size_in_bytes();
- const uint32_t NumParametes = Parameters.size();
+Error RootSignatureDesc::write(raw_ostream &OS) const {
+ // Header Size + accounting for parameter offset + parameters size
+ std::vector Buffer(24 + (Parameters.size() * 4) +
+ Parameters.size_in_bytes());
+ BinaryStreamWriter Writer(Buffer, llvm::endianness::little);
+
+ SmallVector OffsetsToReplace;
+ SmallVector ValuesToReplaceOffsetsWith;
+ const uint32_t Dummy = std::numeric_limits::max();
+
+ const uint32_t NumParameters = Parameters.size();
const uint32_t Zero = 0;
- // Writing header information
- support::endian::write(OS, Header.Version, llvm::endianness::little);
- support::endian::write(OS, NumParametes, llvm::endianness::little);
- support::endian::write(OS, HeaderSize, llvm::endianness::little);
+ if (Error Err = Writer.writeInteger(Header.Version))
+return Err;
+
+ if (Error Err = Writer.writeInteger(NumParameters))
+return Err;
+
+ OffsetsToReplace.push_back(Writer.getOffset());
+ if (Error Err = Writer.writeInteger(Dummy))
+return Err;
// Static samplers still not implemented
- support::endian::write(OS, Zero, llvm::endianness::little);
- support::endian::write(OS, ParameterByteSize + HeaderSize,
- llvm::endianness::little);
+ if (Error Err = Writer.writeInteger(Zero))
+return Err;
+
+ if (Error Err = Writer.writeInteger(Zero))
+return Err;
+
+ if (Error Err = Writer.writeInteger(Header.Flags))
+return Err;
- support::endian::write(OS, Header.Flags, llvm::endianness::little);
+ ValuesToReplaceOffsetsWith.push_back(Writer.getOffset());
- uint32_t ParamsOffset =
- HeaderSize + (3 * sizeof(uint32_t) * Parameters.size());
for (const dxbc::RootParameter &P : Parameters) {
-support::endian::write(OS, P.ParameterType, llvm::endianness::little);
-support::endian::write(OS, P.ShaderVisibility, llvm::endianness::little);
-support::endian::write(OS, ParamsOffset, llvm::endianness::little);
+if (Error Err = Writer.writeEnum(P.ParameterType))
+ return Err;
+if (Error Err = Writer.writeEnum(P.ShaderVisibility))
+ return Err;
-// Size of root parameter, removing the ParameterType and ShaderVisibility.
-ParamsOffset += sizeof(dxbc::RootParameter) - 2 * sizeof(uint32_t);
+OffsetsToReplace.push_back(Writer.getOffset());
+if (Error Err = Writer.writeInteger(Dummy))
+ return Err;
}
for (const dxbc::RootParameter &P : Parameters) {
+ValuesToReplaceOffsetsWith.push_back(Writer.getOffset());
switch (P.ParameterType) {
case dxbc::RootParameterType::Constants32Bit: {
- support::endian:
[llvm-branch-commits] [llvm] [HLSL] Refactor Offset calculation while writing Root Signatures. (PR #128577)
https://github.com/joaosaffran updated
https://github.com/llvm/llvm-project/pull/128577
>From 767b7d02bf71e6e0137e2b5f9f9b8d8b799ac81f Mon Sep 17 00:00:00 2001
From: joaosaffran
Date: Sat, 22 Feb 2025 06:19:15 +
Subject: [PATCH 01/10] first working version
---
.../llvm/MC/DXContainerRootSignature.h| 5 +-
llvm/lib/MC/DXContainerRootSignature.cpp | 90 +--
llvm/lib/Object/DXContainer.cpp | 10 ++-
llvm/lib/ObjectYAML/DXContainerEmitter.cpp| 4 +-
.../lib/Target/DirectX/DXContainerGlobals.cpp | 5 +-
.../ContainerData/RootSignature-Flags.ll | 2 +-
.../DXContainer/RootSignature-Flags.yaml | 2 +-
.../RootSignature-MultipleParameters.yaml | 2 +-
.../ObjectYAML/DXContainerYAMLTest.cpp| 8 +-
9 files changed, 85 insertions(+), 43 deletions(-)
diff --git a/llvm/include/llvm/MC/DXContainerRootSignature.h
b/llvm/include/llvm/MC/DXContainerRootSignature.h
index b31b0da352038..cae4f79aef56f 100644
--- a/llvm/include/llvm/MC/DXContainerRootSignature.h
+++ b/llvm/include/llvm/MC/DXContainerRootSignature.h
@@ -7,8 +7,7 @@
//===--===//
#include "llvm/BinaryFormat/DXContainer.h"
-#include
-#include
+#include "llvm/Support/raw_ostream.h"
namespace llvm {
@@ -19,7 +18,7 @@ struct RootSignatureDesc {
dxbc::RootSignatureHeader Header;
SmallVector Parameters;
- void write(raw_ostream &OS) const;
+ Error write(raw_ostream &OS) const;
};
} // namespace mcdxbc
} // namespace llvm
diff --git a/llvm/lib/MC/DXContainerRootSignature.cpp
b/llvm/lib/MC/DXContainerRootSignature.cpp
index 35a4ef322d01e..9a279ab722877 100644
--- a/llvm/lib/MC/DXContainerRootSignature.cpp
+++ b/llvm/lib/MC/DXContainerRootSignature.cpp
@@ -7,53 +7,89 @@
//===--===//
#include "llvm/MC/DXContainerRootSignature.h"
-#include "llvm/Support/EndianStream.h"
+#include "llvm/Support/BinaryStreamWriter.h"
+#include
using namespace llvm;
using namespace llvm::mcdxbc;
-void RootSignatureDesc::write(raw_ostream &OS) const {
- // Root signature header in dxcontainer has 6 uint_32t values.
- const uint32_t HeaderSize = 24;
- const uint32_t ParameterByteSize = Parameters.size_in_bytes();
- const uint32_t NumParametes = Parameters.size();
+Error RootSignatureDesc::write(raw_ostream &OS) const {
+ // Header Size + accounting for parameter offset + parameters size
+ std::vector Buffer(24 + (Parameters.size() * 4) +
+ Parameters.size_in_bytes());
+ BinaryStreamWriter Writer(Buffer, llvm::endianness::little);
+
+ SmallVector OffsetsToReplace;
+ SmallVector ValuesToReplaceOffsetsWith;
+ const uint32_t Dummy = std::numeric_limits::max();
+
+ const uint32_t NumParameters = Parameters.size();
const uint32_t Zero = 0;
- // Writing header information
- support::endian::write(OS, Header.Version, llvm::endianness::little);
- support::endian::write(OS, NumParametes, llvm::endianness::little);
- support::endian::write(OS, HeaderSize, llvm::endianness::little);
+ if (Error Err = Writer.writeInteger(Header.Version))
+return Err;
+
+ if (Error Err = Writer.writeInteger(NumParameters))
+return Err;
+
+ OffsetsToReplace.push_back(Writer.getOffset());
+ if (Error Err = Writer.writeInteger(Dummy))
+return Err;
// Static samplers still not implemented
- support::endian::write(OS, Zero, llvm::endianness::little);
- support::endian::write(OS, ParameterByteSize + HeaderSize,
- llvm::endianness::little);
+ if (Error Err = Writer.writeInteger(Zero))
+return Err;
+
+ if (Error Err = Writer.writeInteger(Zero))
+return Err;
+
+ if (Error Err = Writer.writeInteger(Header.Flags))
+return Err;
- support::endian::write(OS, Header.Flags, llvm::endianness::little);
+ ValuesToReplaceOffsetsWith.push_back(Writer.getOffset());
- uint32_t ParamsOffset =
- HeaderSize + (3 * sizeof(uint32_t) * Parameters.size());
for (const dxbc::RootParameter &P : Parameters) {
-support::endian::write(OS, P.ParameterType, llvm::endianness::little);
-support::endian::write(OS, P.ShaderVisibility, llvm::endianness::little);
-support::endian::write(OS, ParamsOffset, llvm::endianness::little);
+if (Error Err = Writer.writeEnum(P.ParameterType))
+ return Err;
+if (Error Err = Writer.writeEnum(P.ShaderVisibility))
+ return Err;
-// Size of root parameter, removing the ParameterType and ShaderVisibility.
-ParamsOffset += sizeof(dxbc::RootParameter) - 2 * sizeof(uint32_t);
+OffsetsToReplace.push_back(Writer.getOffset());
+if (Error Err = Writer.writeInteger(Dummy))
+ return Err;
}
for (const dxbc::RootParameter &P : Parameters) {
+ValuesToReplaceOffsetsWith.push_back(Writer.getOffset());
switch (P.ParameterType) {
case dxbc::RootParameterType::Constants32Bit: {
- support::endia
[llvm-branch-commits] [clang] [llvm] [PowerPC] Update LLVM 20.1.0 Release Notes (PR #128764)
https://github.com/amy-kwan created https://github.com/llvm/llvm-project/pull/128764 This PR adds LLVM 20.1.0 release notes that are related to the PowerPC target. >From d8479f20064d7043bf3caf466968fadab2ccb45e Mon Sep 17 00:00:00 2001 From: Amy Kwan Date: Tue, 25 Feb 2025 13:21:45 -0600 Subject: [PATCH] [PowerPC] Update LLVM 20.1.0 Release Notes --- clang/docs/ReleaseNotes.rst | 2 ++ llvm/docs/ReleaseNotes.md | 30 +- 2 files changed, 31 insertions(+), 1 deletion(-) diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst index a2518042cb5b0..153afdb3d59e3 100644 --- a/clang/docs/ReleaseNotes.rst +++ b/clang/docs/ReleaseNotes.rst @@ -1269,6 +1269,8 @@ CUDA Support AIX Support ^^^ +- Fixed the ``-print-runtime-dir`` option. +- Enable continuous profile syncing feature on AIX. NetBSD Support ^^ diff --git a/llvm/docs/ReleaseNotes.md b/llvm/docs/ReleaseNotes.md index e654509792652..f4a8ac21a8312 100644 --- a/llvm/docs/ReleaseNotes.md +++ b/llvm/docs/ReleaseNotes.md @@ -263,7 +263,23 @@ Changes to the PowerPC Backend -- * The Linux `ppc64` LLC default cpu is updated from `ppc` to `ppc64`. -* The AIX LLC default cpu is updated from `generic` to `pwr7`. +* Replaced PPCMergeStringPool with GlobalMerge. +* Disabled vsx and altivec when -msoft-float is used. +* Added support for -mcpu=pwr11 -mtune=pwr11. +* Implemented BCD assist builtins. +* Expanded global named register support. +* Updated to use tablegen's MatchRegisterName(). +* Fixed saving of Link Register when using ROP Protect. +* Fixed SUBREG_TO_REG handling in the RegisterCoalescer. +* Fixed data layout alignment of i128 to 16. +* Fixed codegen for transparent_union function parameters. +* Added an error for incorrect use of memory operands. +* Other various bug fixes and codegen improvements. + +AIX Specific: +* LLC default cpu is updated from `generic` to `pwr7`. +* Fixed handling in emitGlobalConstantImpl to emit aliases to subobjects at proper offsets. +* Enabled aggressive merging of constants to reduce TOC entries. Changes to the RISC-V Backend - @@ -478,6 +494,10 @@ Changes to the LLVM tools * llvm-objcopy now prints the correct file path in the error message when the output file specified by `--dump-section` cannot be opened. +* llvm-cxxfilt now supports demangling call expressions encoded using `cp` instead of `cl`. + +* llvm-objdump now supports printing the file header, load section header and auxillary header for XCOFF object files under the ``--private-headers`` option. + Changes to LLDB - @@ -630,6 +650,14 @@ Changes to BOLT Changes to Sanitizers - +Changes to the Profile Runtime +-- + +* On platforms where ``atexit``-registered functions are not called when + a DSO is ``dlclose``'d, a mechanism is added that implements this + missing functionality for calls to ``atexit`` in the profile runtime. + [This is currently only enabled on AIX](https://github.com/llvm/llvm-project/pull/102940). + Other Changes - ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [llvm] [PowerPC] Update LLVM 20.1.0 Release Notes (PR #128764)
llvmbot wrote: @llvm/pr-subscribers-clang Author: Amy Kwan (amy-kwan) Changes This PR adds LLVM 20.1.0 release notes that are related to the PowerPC target. --- Full diff: https://github.com/llvm/llvm-project/pull/128764.diff 2 Files Affected: - (modified) clang/docs/ReleaseNotes.rst (+2) - (modified) llvm/docs/ReleaseNotes.md (+29-1) ``diff diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst index a2518042cb5b0..153afdb3d59e3 100644 --- a/clang/docs/ReleaseNotes.rst +++ b/clang/docs/ReleaseNotes.rst @@ -1269,6 +1269,8 @@ CUDA Support AIX Support ^^^ +- Fixed the ``-print-runtime-dir`` option. +- Enable continuous profile syncing feature on AIX. NetBSD Support ^^ diff --git a/llvm/docs/ReleaseNotes.md b/llvm/docs/ReleaseNotes.md index e654509792652..f4a8ac21a8312 100644 --- a/llvm/docs/ReleaseNotes.md +++ b/llvm/docs/ReleaseNotes.md @@ -263,7 +263,23 @@ Changes to the PowerPC Backend -- * The Linux `ppc64` LLC default cpu is updated from `ppc` to `ppc64`. -* The AIX LLC default cpu is updated from `generic` to `pwr7`. +* Replaced PPCMergeStringPool with GlobalMerge. +* Disabled vsx and altivec when -msoft-float is used. +* Added support for -mcpu=pwr11 -mtune=pwr11. +* Implemented BCD assist builtins. +* Expanded global named register support. +* Updated to use tablegen's MatchRegisterName(). +* Fixed saving of Link Register when using ROP Protect. +* Fixed SUBREG_TO_REG handling in the RegisterCoalescer. +* Fixed data layout alignment of i128 to 16. +* Fixed codegen for transparent_union function parameters. +* Added an error for incorrect use of memory operands. +* Other various bug fixes and codegen improvements. + +AIX Specific: +* LLC default cpu is updated from `generic` to `pwr7`. +* Fixed handling in emitGlobalConstantImpl to emit aliases to subobjects at proper offsets. +* Enabled aggressive merging of constants to reduce TOC entries. Changes to the RISC-V Backend - @@ -478,6 +494,10 @@ Changes to the LLVM tools * llvm-objcopy now prints the correct file path in the error message when the output file specified by `--dump-section` cannot be opened. +* llvm-cxxfilt now supports demangling call expressions encoded using `cp` instead of `cl`. + +* llvm-objdump now supports printing the file header, load section header and auxillary header for XCOFF object files under the ``--private-headers`` option. + Changes to LLDB - @@ -630,6 +650,14 @@ Changes to BOLT Changes to Sanitizers - +Changes to the Profile Runtime +-- + +* On platforms where ``atexit``-registered functions are not called when + a DSO is ``dlclose``'d, a mechanism is added that implements this + missing functionality for calls to ``atexit`` in the profile runtime. + [This is currently only enabled on AIX](https://github.com/llvm/llvm-project/pull/102940). + Other Changes - `` https://github.com/llvm/llvm-project/pull/128764 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [HLSL] Refactor Offset calculation while writing Root Signatures. (PR #128577)
https://github.com/joaosaffran updated
https://github.com/llvm/llvm-project/pull/128577
>From 767b7d02bf71e6e0137e2b5f9f9b8d8b799ac81f Mon Sep 17 00:00:00 2001
From: joaosaffran
Date: Sat, 22 Feb 2025 06:19:15 +
Subject: [PATCH 1/8] first working version
---
.../llvm/MC/DXContainerRootSignature.h| 5 +-
llvm/lib/MC/DXContainerRootSignature.cpp | 90 +--
llvm/lib/Object/DXContainer.cpp | 10 ++-
llvm/lib/ObjectYAML/DXContainerEmitter.cpp| 4 +-
.../lib/Target/DirectX/DXContainerGlobals.cpp | 5 +-
.../ContainerData/RootSignature-Flags.ll | 2 +-
.../DXContainer/RootSignature-Flags.yaml | 2 +-
.../RootSignature-MultipleParameters.yaml | 2 +-
.../ObjectYAML/DXContainerYAMLTest.cpp| 8 +-
9 files changed, 85 insertions(+), 43 deletions(-)
diff --git a/llvm/include/llvm/MC/DXContainerRootSignature.h
b/llvm/include/llvm/MC/DXContainerRootSignature.h
index b31b0da352038..cae4f79aef56f 100644
--- a/llvm/include/llvm/MC/DXContainerRootSignature.h
+++ b/llvm/include/llvm/MC/DXContainerRootSignature.h
@@ -7,8 +7,7 @@
//===--===//
#include "llvm/BinaryFormat/DXContainer.h"
-#include
-#include
+#include "llvm/Support/raw_ostream.h"
namespace llvm {
@@ -19,7 +18,7 @@ struct RootSignatureDesc {
dxbc::RootSignatureHeader Header;
SmallVector Parameters;
- void write(raw_ostream &OS) const;
+ Error write(raw_ostream &OS) const;
};
} // namespace mcdxbc
} // namespace llvm
diff --git a/llvm/lib/MC/DXContainerRootSignature.cpp
b/llvm/lib/MC/DXContainerRootSignature.cpp
index 35a4ef322d01e..9a279ab722877 100644
--- a/llvm/lib/MC/DXContainerRootSignature.cpp
+++ b/llvm/lib/MC/DXContainerRootSignature.cpp
@@ -7,53 +7,89 @@
//===--===//
#include "llvm/MC/DXContainerRootSignature.h"
-#include "llvm/Support/EndianStream.h"
+#include "llvm/Support/BinaryStreamWriter.h"
+#include
using namespace llvm;
using namespace llvm::mcdxbc;
-void RootSignatureDesc::write(raw_ostream &OS) const {
- // Root signature header in dxcontainer has 6 uint_32t values.
- const uint32_t HeaderSize = 24;
- const uint32_t ParameterByteSize = Parameters.size_in_bytes();
- const uint32_t NumParametes = Parameters.size();
+Error RootSignatureDesc::write(raw_ostream &OS) const {
+ // Header Size + accounting for parameter offset + parameters size
+ std::vector Buffer(24 + (Parameters.size() * 4) +
+ Parameters.size_in_bytes());
+ BinaryStreamWriter Writer(Buffer, llvm::endianness::little);
+
+ SmallVector OffsetsToReplace;
+ SmallVector ValuesToReplaceOffsetsWith;
+ const uint32_t Dummy = std::numeric_limits::max();
+
+ const uint32_t NumParameters = Parameters.size();
const uint32_t Zero = 0;
- // Writing header information
- support::endian::write(OS, Header.Version, llvm::endianness::little);
- support::endian::write(OS, NumParametes, llvm::endianness::little);
- support::endian::write(OS, HeaderSize, llvm::endianness::little);
+ if (Error Err = Writer.writeInteger(Header.Version))
+return Err;
+
+ if (Error Err = Writer.writeInteger(NumParameters))
+return Err;
+
+ OffsetsToReplace.push_back(Writer.getOffset());
+ if (Error Err = Writer.writeInteger(Dummy))
+return Err;
// Static samplers still not implemented
- support::endian::write(OS, Zero, llvm::endianness::little);
- support::endian::write(OS, ParameterByteSize + HeaderSize,
- llvm::endianness::little);
+ if (Error Err = Writer.writeInteger(Zero))
+return Err;
+
+ if (Error Err = Writer.writeInteger(Zero))
+return Err;
+
+ if (Error Err = Writer.writeInteger(Header.Flags))
+return Err;
- support::endian::write(OS, Header.Flags, llvm::endianness::little);
+ ValuesToReplaceOffsetsWith.push_back(Writer.getOffset());
- uint32_t ParamsOffset =
- HeaderSize + (3 * sizeof(uint32_t) * Parameters.size());
for (const dxbc::RootParameter &P : Parameters) {
-support::endian::write(OS, P.ParameterType, llvm::endianness::little);
-support::endian::write(OS, P.ShaderVisibility, llvm::endianness::little);
-support::endian::write(OS, ParamsOffset, llvm::endianness::little);
+if (Error Err = Writer.writeEnum(P.ParameterType))
+ return Err;
+if (Error Err = Writer.writeEnum(P.ShaderVisibility))
+ return Err;
-// Size of root parameter, removing the ParameterType and ShaderVisibility.
-ParamsOffset += sizeof(dxbc::RootParameter) - 2 * sizeof(uint32_t);
+OffsetsToReplace.push_back(Writer.getOffset());
+if (Error Err = Writer.writeInteger(Dummy))
+ return Err;
}
for (const dxbc::RootParameter &P : Parameters) {
+ValuesToReplaceOffsetsWith.push_back(Writer.getOffset());
switch (P.ParameterType) {
case dxbc::RootParameterType::Constants32Bit: {
- support::endian:
[llvm-branch-commits] [llvm] release/20.x: [Support] Ensure complete type DelimitedScope (#127459) (PR #128686)
https://github.com/llvmbot updated
https://github.com/llvm/llvm-project/pull/128686
>From 83081919e42376eb3cdbb8267daaf8da0691f9ae Mon Sep 17 00:00:00 2001
From: Jonas Hahnfeld
Date: Fri, 21 Feb 2025 21:19:56 +0100
Subject: [PATCH] [Support] Ensure complete type DelimitedScope (#127459)
`JSONScopedPrinter` has a `std::unique_ptr` member and
defaulted constructor argument, so it needs a complete type. This
resolves one of the many build errors with C++23 using Clang.
(cherry picked from commit e65d3882af6fcc15342451ad4f9494b1ba6b9b9d)
---
llvm/include/llvm/Support/ScopedPrinter.h | 16 +++-
1 file changed, 7 insertions(+), 9 deletions(-)
diff --git a/llvm/include/llvm/Support/ScopedPrinter.h
b/llvm/include/llvm/Support/ScopedPrinter.h
index 419ab97366796..506b40a09ed78 100644
--- a/llvm/include/llvm/Support/ScopedPrinter.h
+++ b/llvm/include/llvm/Support/ScopedPrinter.h
@@ -539,7 +539,13 @@ ScopedPrinter::printHex(StringRef
Label,
startLine() << Label << ": " << hex(Value) << "\n";
}
-struct DelimitedScope;
+struct DelimitedScope {
+ DelimitedScope(ScopedPrinter &W) : W(&W) {}
+ DelimitedScope() : W(nullptr) {}
+ virtual ~DelimitedScope() = default;
+ virtual void setPrinter(ScopedPrinter &W) = 0;
+ ScopedPrinter *W;
+};
class JSONScopedPrinter : public ScopedPrinter {
private:
@@ -838,14 +844,6 @@ class JSONScopedPrinter : public ScopedPrinter {
}
};
-struct DelimitedScope {
- DelimitedScope(ScopedPrinter &W) : W(&W) {}
- DelimitedScope() : W(nullptr) {}
- virtual ~DelimitedScope() = default;
- virtual void setPrinter(ScopedPrinter &W) = 0;
- ScopedPrinter *W;
-};
-
struct DictScope : DelimitedScope {
explicit DictScope() = default;
explicit DictScope(ScopedPrinter &W) : DelimitedScope(W) { W.objectBegin(); }
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] eb389b1 - [C++20] [Modules] handling selectAny attribute for vardecl
Author: Chuanqi Xu
Date: 2025-02-25T08:15:51-08:00
New Revision: eb389b1259c35ea0f91b8aba133bca4a8ab9f4ab
URL:
https://github.com/llvm/llvm-project/commit/eb389b1259c35ea0f91b8aba133bca4a8ab9f4ab
DIFF:
https://github.com/llvm/llvm-project/commit/eb389b1259c35ea0f91b8aba133bca4a8ab9f4ab.diff
LOG: [C++20] [Modules] handling selectAny attribute for vardecl
Close https://github.com/llvm/llvm-project/issues/127963
The root cause of the problem seems to be that we didn't realize it
simply.
(cherry picked from commit 24c06a19be7bcf28b37e5eabbe65df95a2c0265a)
Added:
clang/test/Modules/pr127943.cppm
Modified:
clang/lib/Sema/SemaDecl.cpp
Removed:
diff --git a/clang/lib/Sema/SemaDecl.cpp b/clang/lib/Sema/SemaDecl.cpp
index 1ecb9aff5f319..01f09aba8c2ad 100644
--- a/clang/lib/Sema/SemaDecl.cpp
+++ b/clang/lib/Sema/SemaDecl.cpp
@@ -4803,7 +4803,8 @@ bool Sema::checkVarDeclRedefinition(VarDecl *Old, VarDecl
*New) {
(New->getFormalLinkage() == Linkage::Internal || New->isInline() ||
isa(New) ||
New->getDescribedVarTemplate() || New->getNumTemplateParameterLists() ||
- New->getDeclContext()->isDependentContext())) {
+ New->getDeclContext()->isDependentContext() ||
+ New->hasAttr())) {
// The previous definition is hidden, and multiple definitions are
// permitted (in separate TUs). Demote this to a declaration.
New->demoteThisDefinitionToDeclaration();
diff --git a/clang/test/Modules/pr127943.cppm
b/clang/test/Modules/pr127943.cppm
new file mode 100644
index 0..7cc3be6903e6a
--- /dev/null
+++ b/clang/test/Modules/pr127943.cppm
@@ -0,0 +1,31 @@
+// RUN: rm -rf %t
+// RUN: mkdir -p %t
+// RUN: split-file %s %t
+//
+// RUN: %clang_cc1 -std=c++20 %t/repro.cppm -fdeclspec -emit-module-interface
-o %t/repro.pcm
+// RUN: %clang_cc1 -std=c++20 %t/source.cpp -fdeclspec -fsyntax-only -verify
-fprebuilt-module-path=%t
+
+//--- repro_decl.hpp
+#pragma once
+
+extern "C"
+{
+__declspec(selectany) int foo = 0;
+}
+
+//--- repro.cppm
+module;
+#include "repro_decl.hpp"
+
+export module repro;
+
+export inline int func()
+{
+return foo;
+}
+
+//--- source.cpp
+// expected-no-diagnostics
+import repro;
+
+#include "repro_decl.hpp"
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/20.x: [DAGCombiner] visitFREEZE: Early exit when N is deleted (#128161) (PR #128283)
github-actions[bot] wrote: @dtcxzyw (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. When you are done, please add the release:note label to this PR. https://github.com/llvm/llvm-project/pull/128283 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] d919b8d - [Clang] Handle instantiating captures in addInstantiatedCapturesToScope() (#128478)
Author: Younan Zhang
Date: 2025-02-25T08:30:16-08:00
New Revision: d919b8d97b12c24a13e1e92aa66ef1421e20104b
URL:
https://github.com/llvm/llvm-project/commit/d919b8d97b12c24a13e1e92aa66ef1421e20104b
DIFF:
https://github.com/llvm/llvm-project/commit/d919b8d97b12c24a13e1e92aa66ef1421e20104b.diff
LOG: [Clang] Handle instantiating captures in addInstantiatedCapturesToScope()
(#128478)
addInstantiatedCapturesToScope() might be called when transforming a
lambda body. In this situation, it would look into all the lambda's
parents and figure out all the instantiated captures. However, the
instantiated captures are not visible from lambda's class decl until the
lambda is rebuilt (i.e. after the lambda body transform). So this patch
corrects that by also examining the LambdaScopeInfo, serving as a
workaround for not having deferred lambda body instantiation in Clang
20, to avoid regressing some real-world use cases.
Fixes #128175
(cherry picked from commit ecc7e6ce4cd57a614985e95daf7027918cb8723e)
Added:
Modified:
clang/lib/Sema/SemaConcept.cpp
clang/test/SemaTemplate/concepts-lambda.cpp
Removed:
diff --git a/clang/lib/Sema/SemaConcept.cpp b/clang/lib/Sema/SemaConcept.cpp
index 8a77cbf8c9477..a7b609f7f3ce4 100644
--- a/clang/lib/Sema/SemaConcept.cpp
+++ b/clang/lib/Sema/SemaConcept.cpp
@@ -711,9 +711,32 @@ bool Sema::addInstantiatedCapturesToScope(
unsigned Instantiated = 0;
+ // FIXME: This is a workaround for not having deferred lambda body
+ // instantiation.
+ // When transforming a lambda's body, if we encounter another call to a
+ // nested lambda that contains a constraint expression, we add all of the
+ // outer lambda's instantiated captures to the current instantiation scope to
+ // facilitate constraint evaluation. However, these captures don't appear in
+ // the CXXRecordDecl until after the lambda expression is rebuilt, so we
+ // pull them out from the corresponding LSI.
+ LambdaScopeInfo *InstantiatingScope = nullptr;
+ if (LambdaPattern->capture_size() && !LambdaClass->capture_size()) {
+for (FunctionScopeInfo *Scope : llvm::reverse(FunctionScopes)) {
+ auto *LSI = dyn_cast(Scope);
+ if (!LSI ||
+ LSI->CallOperator->getTemplateInstantiationPattern() != PatternDecl)
+continue;
+ InstantiatingScope = LSI;
+ break;
+}
+assert(InstantiatingScope);
+ }
+
auto AddSingleCapture = [&](const ValueDecl *CapturedPattern,
unsigned Index) {
-ValueDecl *CapturedVar = LambdaClass->getCapture(Index)->getCapturedVar();
+ValueDecl *CapturedVar =
+InstantiatingScope ? InstantiatingScope->Captures[Index].getVariable()
+ : LambdaClass->getCapture(Index)->getCapturedVar();
assert(CapturedVar->isInitCapture());
Scope.InstantiatedLocal(CapturedPattern, CapturedVar);
};
diff --git a/clang/test/SemaTemplate/concepts-lambda.cpp
b/clang/test/SemaTemplate/concepts-lambda.cpp
index 306f86cfcb28f..dcb09c76d26b6 100644
--- a/clang/test/SemaTemplate/concepts-lambda.cpp
+++ b/clang/test/SemaTemplate/concepts-lambda.cpp
@@ -307,3 +307,21 @@ void test() {
}
}
+
+namespace GH128175 {
+
+template void f() {
+ [i{0}] {
+[&] {
+ [&] {
+[]()
+ requires true
+{}();
+ }();
+}();
+ }();
+}
+
+template void f();
+
+}
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] release/20.x: [Clang] Handle instantiating captures in addInstantiatedCapturesToScope() (#128478) (PR #128639)
https://github.com/llvmbot updated
https://github.com/llvm/llvm-project/pull/128639
>From d919b8d97b12c24a13e1e92aa66ef1421e20104b Mon Sep 17 00:00:00 2001
From: Younan Zhang
Date: Tue, 25 Feb 2025 14:35:07 +0800
Subject: [PATCH] [Clang] Handle instantiating captures in
addInstantiatedCapturesToScope() (#128478)
addInstantiatedCapturesToScope() might be called when transforming a
lambda body. In this situation, it would look into all the lambda's
parents and figure out all the instantiated captures. However, the
instantiated captures are not visible from lambda's class decl until the
lambda is rebuilt (i.e. after the lambda body transform). So this patch
corrects that by also examining the LambdaScopeInfo, serving as a
workaround for not having deferred lambda body instantiation in Clang
20, to avoid regressing some real-world use cases.
Fixes #128175
(cherry picked from commit ecc7e6ce4cd57a614985e95daf7027918cb8723e)
---
clang/lib/Sema/SemaConcept.cpp | 25 -
clang/test/SemaTemplate/concepts-lambda.cpp | 18 +++
2 files changed, 42 insertions(+), 1 deletion(-)
diff --git a/clang/lib/Sema/SemaConcept.cpp b/clang/lib/Sema/SemaConcept.cpp
index 8a77cbf8c9477..a7b609f7f3ce4 100644
--- a/clang/lib/Sema/SemaConcept.cpp
+++ b/clang/lib/Sema/SemaConcept.cpp
@@ -711,9 +711,32 @@ bool Sema::addInstantiatedCapturesToScope(
unsigned Instantiated = 0;
+ // FIXME: This is a workaround for not having deferred lambda body
+ // instantiation.
+ // When transforming a lambda's body, if we encounter another call to a
+ // nested lambda that contains a constraint expression, we add all of the
+ // outer lambda's instantiated captures to the current instantiation scope to
+ // facilitate constraint evaluation. However, these captures don't appear in
+ // the CXXRecordDecl until after the lambda expression is rebuilt, so we
+ // pull them out from the corresponding LSI.
+ LambdaScopeInfo *InstantiatingScope = nullptr;
+ if (LambdaPattern->capture_size() && !LambdaClass->capture_size()) {
+for (FunctionScopeInfo *Scope : llvm::reverse(FunctionScopes)) {
+ auto *LSI = dyn_cast(Scope);
+ if (!LSI ||
+ LSI->CallOperator->getTemplateInstantiationPattern() != PatternDecl)
+continue;
+ InstantiatingScope = LSI;
+ break;
+}
+assert(InstantiatingScope);
+ }
+
auto AddSingleCapture = [&](const ValueDecl *CapturedPattern,
unsigned Index) {
-ValueDecl *CapturedVar = LambdaClass->getCapture(Index)->getCapturedVar();
+ValueDecl *CapturedVar =
+InstantiatingScope ? InstantiatingScope->Captures[Index].getVariable()
+ : LambdaClass->getCapture(Index)->getCapturedVar();
assert(CapturedVar->isInitCapture());
Scope.InstantiatedLocal(CapturedPattern, CapturedVar);
};
diff --git a/clang/test/SemaTemplate/concepts-lambda.cpp
b/clang/test/SemaTemplate/concepts-lambda.cpp
index 306f86cfcb28f..dcb09c76d26b6 100644
--- a/clang/test/SemaTemplate/concepts-lambda.cpp
+++ b/clang/test/SemaTemplate/concepts-lambda.cpp
@@ -307,3 +307,21 @@ void test() {
}
}
+
+namespace GH128175 {
+
+template void f() {
+ [i{0}] {
+[&] {
+ [&] {
+[]()
+ requires true
+{}();
+ }();
+}();
+ }();
+}
+
+template void f();
+
+}
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/20.x: Do not treat llvm.fake.use as a debug instruction (#128684) (PR #128734)
https://github.com/OCHyams approved this pull request. LGTM - IIUC without this patch we run into failed verifier checks, e.g. in the SimplifyCFG case outlined in the test. This patch could have a knock-on effect, blocking optimisations beyond the one in the test, but that's what the user signs up for with the `-fextend-variable-liveness` flag, so I think this is ok. Definitely better to do the right thing (this) now (in this release), and tweak specific optimisations later on a case by case basis, if we discover better trade offs. https://github.com/llvm/llvm-project/pull/128734 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/20.x: [LV][VPlan] Prevent calculate cost for skiped instructions in precomputeCosts(). (#127966) (PR #128694)
tstellar wrote: @fhahn I can't merge this yet due to the test failure. https://github.com/llvm/llvm-project/pull/128694 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
