[llvm-branch-commits] [clang] [clang][NFC] Remove CXXRecordDecl::lookupDependentName() and its helpers (PR #128392)
https://github.com/cor3ntin approved this pull request. https://github.com/llvm/llvm-project/pull/128392 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [clang][NFC] Remove CXXRecordDecl::lookupDependentName() and its helpers (PR #128392)
https://github.com/zyn0217 commented: LGTM in general, but my concern would be that we're less clear if there's any use of this function out-of-tree, so as an alternative, can we turn the implementation to use HeuristicResolver and explicitly deprecate it for a while before eventually removing it? https://github.com/llvm/llvm-project/pull/128392 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [clang][NFC] Remove CXXRecordDecl::lookupDependentName() and its helpers (PR #128392)
https://github.com/zyn0217 edited https://github.com/llvm/llvm-project/pull/128392 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/20.x: Reland "[LV]: Teach LV to recursively (de)interleave." (#125094) (PR #128389)
nikic wrote: There is a test failure. Why is it important for this change to be part of the LLVM 20 release? https://github.com/llvm/llvm-project/pull/128389 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm-size] Early return with error on invalid args (PR #128447)
https://github.com/vitalybuka created https://github.com/llvm/llvm-project/pull/128447 This is very uncommon to recover from such errors. It's especially bad or Radix, which affect format specifiers. ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm-size] Early return with error on invalid args (PR #128447)
llvmbot wrote:
@llvm/pr-subscribers-llvm-binary-utilities
Author: Vitaly Buka (vitalybuka)
Changes
This is very uncommon to recover from such errors.
It's especially bad or Radix, which affect format
specifiers.
---
Full diff: https://github.com/llvm/llvm-project/pull/128447.diff
1 Files Affected:
- (modified) llvm/tools/llvm-size/llvm-size.cpp (+6-2)
``diff
diff --git a/llvm/tools/llvm-size/llvm-size.cpp
b/llvm/tools/llvm-size/llvm-size.cpp
index 0d7bf24832670..045237f161322 100644
--- a/llvm/tools/llvm-size/llvm-size.cpp
+++ b/llvm/tools/llvm-size/llvm-size.cpp
@@ -899,8 +899,10 @@ int llvm_size_main(int argc, char **argv, const
llvm::ToolContext &) {
OutputFormat = darwin;
else if (V == "sysv")
OutputFormat = sysv;
- else
+ else {
error("--format value should be one of: 'berkeley', 'darwin', 'sysv'");
+return 1;
+ }
V = Args.getLastArgValue(OPT_radix_EQ, "10");
if (V == "8")
Radix = RadixTy::octal;
@@ -908,8 +910,10 @@ int llvm_size_main(int argc, char **argv, const
llvm::ToolContext &) {
Radix = RadixTy::decimal;
else if (V == "16")
Radix = RadixTy::hexadecimal;
- else
+ else {
error("--radix value should be one of: 8, 10, 16 ");
+return 1;
+ }
for (const auto *A : Args.filtered(OPT_arch_EQ)) {
SmallVector Values;
``
https://github.com/llvm/llvm-project/pull/128447
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[llvm-branch-commits] [llvm] release/20.x: Reland "[LV]: Teach LV to recursively (de)interleave." (#125094) (PR #128389)
hassnaaHamdi wrote: > There is a test failure. > > Why is it important for this change to be part of the LLVM 20 release? This patch was supposed to be included in the release, but it exposed an issue (missing implementation) somewhere else (not related to it), so it got delayed until that issue got resolved, and I have included that issue fix in the release. Also it provides better performance for AArch64. https://github.com/llvm/llvm-project/pull/128389 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm-size] Early return with error on invalid args (PR #128447)
MaskRay wrote: A lot of utilities using LLVMOption, including clang and lld, are able to report multiple unknown option errors or other parsing errors before exiting. What the motivation behind this change? https://github.com/llvm/llvm-project/pull/128447 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [clang][NFC] Remove CXXRecordDecl::lookupDependentName() and its helpers (PR #128392)
https://github.com/zyn0217 approved this pull request. https://github.com/llvm/llvm-project/pull/128392 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm-size] Early return with error on invalid args (PR #128447)
vitalybuka wrote: > What the motivation behind this change? Bad printf spec, when radix is not one of enum. If you realy think recovery is important, I'll change fallback to default on error. https://github.com/llvm/llvm-project/pull/128447 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm-size] Early return with error on invalid args (PR #128447)
https://github.com/vitalybuka updated https://github.com/llvm/llvm-project/pull/128447 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm-size] Early return with error on invalid args (PR #128447)
vitalybuka wrote: > > What the motivation behind this change? > > Bad printf format string, when radix is not one of enum. > > If you realy think recovery is important, I'll change fallback to default on > error. Done https://github.com/llvm/llvm-project/pull/128447 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm-size] Early return with error on invalid args (PR #128447)
https://github.com/vitalybuka updated https://github.com/llvm/llvm-project/pull/128447 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm-size] Fallback to defaults on error in args (PR #128447)
https://github.com/vitalybuka edited https://github.com/llvm/llvm-project/pull/128447 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm-size] Fallback to defaults on error in args (PR #128447)
https://github.com/vitalybuka edited https://github.com/llvm/llvm-project/pull/128447 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [compiler-rt] cbe1fac - Revert "[compiler-rt][rtsan] stat api interception. (#128430)"
Author: Chris Apple
Date: 2025-02-24T14:20:18+09:00
New Revision: cbe1fac154be42b8b4cad2f25df0642726098bdf
URL:
https://github.com/llvm/llvm-project/commit/cbe1fac154be42b8b4cad2f25df0642726098bdf
DIFF:
https://github.com/llvm/llvm-project/commit/cbe1fac154be42b8b4cad2f25df0642726098bdf.diff
LOG: Revert "[compiler-rt][rtsan] stat api interception. (#128430)"
This reverts commit 4d928d5b5858de18f47f68c0d309dafd24cea875.
Added:
Modified:
compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Removed:
diff --git a/compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
b/compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
index 57a01396b8123..5b9e992639f55 100644
--- a/compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
+++ b/compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
@@ -285,45 +285,6 @@ INTERCEPTOR(int, unlinkat, int fd, const char *pathname,
int flag) {
return REAL(unlinkat)(fd, pathname, flag);
}
-INTERCEPTOR(int, stat, const char *pathname, struct stat *s) {
- __rtsan_notify_intercepted_call("stat");
- return REAL(stat)(pathname, s);
-}
-
-INTERCEPTOR(int, lstat, const char *pathname, struct stat *s) {
- __rtsan_notify_intercepted_call("lstat");
- return REAL(lstat)(pathname, s);
-}
-
-INTERCEPTOR(int, fstat, int fd, struct stat *s) {
- __rtsan_notify_intercepted_call("fstat");
- return REAL(fstat)(fd, s);
-}
-
-#if !SANITIZER_APPLE // deprecated for darwin
-INTERCEPTOR(int, stat64, const char *pathname, struct stat64 *s) {
- __rtsan_notify_intercepted_call("stat64");
- return REAL(stat64)(pathname, s);
-}
-
-INTERCEPTOR(int, lstat64, const char *pathname, struct stat64 *s) {
- __rtsan_notify_intercepted_call("lstat64");
- return REAL(lstat64)(pathname, s);
-}
-
-INTERCEPTOR(int, fstat64, int fd, struct stat64 *s) {
- __rtsan_notify_intercepted_call("fstat64");
- return REAL(fstat64)(fd, s);
-}
-#define RTSAN_MAYBE_INTERCEPT_STAT64 INTERCEPT_FUNCTION(stat64)
-#define RTSAN_MAYBE_INTERCEPT_LSTAT64 INTERCEPT_FUNCTION(lstat64)
-#define RTSAN_MAYBE_INTERCEPT_FSTAT64 INTERCEPT_FUNCTION(fstat64)
-#else
-#define RTSAN_MAYBE_INTERCEPT_STAT64
-#define RTSAN_MAYBE_INTERCEPT_LSTAT64
-#define RTSAN_MAYBE_INTERCEPT_FSTAT64
-#endif
-
// Streams
INTERCEPTOR(FILE *, fopen, const char *path, const char *mode) {
@@ -1476,12 +1437,6 @@ void __rtsan::InitializeInterceptors() {
RTSAN_MAYBE_INTERCEPT_READLINKAT;
INTERCEPT_FUNCTION(unlink);
INTERCEPT_FUNCTION(unlinkat);
- INTERCEPT_FUNCTION(stat);
- INTERCEPT_FUNCTION(lstat);
- INTERCEPT_FUNCTION(fstat);
- RTSAN_MAYBE_INTERCEPT_STAT64;
- RTSAN_MAYBE_INTERCEPT_LSTAT64;
- RTSAN_MAYBE_INTERCEPT_FSTAT64;
INTERCEPT_FUNCTION(fopen);
RTSAN_MAYBE_INTERCEPT_FOPEN64;
RTSAN_MAYBE_INTERCEPT_FREOPEN64;
diff --git a/compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
b/compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
index fc5a2f771ddb7..d1c5a94c12213 100644
--- a/compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
+++ b/compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
@@ -401,7 +401,7 @@ TEST_F(RtsanFileTest, FcntlFlockDiesWhenRealtime) {
ASSERT_THAT(fd, Ne(-1));
auto Func = [fd]() {
-struct flock lock{};
+struct flock lock {};
lock.l_type = F_RDLCK;
lock.l_whence = SEEK_SET;
lock.l_start = 0;
@@ -735,7 +735,7 @@ TEST(TestRtsanInterceptors, IoctlBehavesWithOutputPointer) {
GTEST_SKIP();
}
- struct ifreq ifr{};
+ struct ifreq ifr {};
strncpy(ifr.ifr_name, ifaddr->ifa_name, IFNAMSIZ - 1);
int retval = ioctl(sock, SIOCGIFADDR, &ifr);
@@ -875,33 +875,6 @@ TEST_F(RtsanOpenedFileTest, UnlinkatDiesWhenRealtime) {
ExpectNonRealtimeSurvival(Func);
}
-TEST_F(RtsanOpenedFileTest, StatDiesWhenRealtime) {
- auto Func = [&]() {
-struct stat s{};
-stat(GetTemporaryFilePath(), &s);
- };
- ExpectRealtimeDeath(Func, MAYBE_APPEND_64("stat"));
- ExpectNonRealtimeSurvival(Func);
-}
-
-TEST_F(RtsanOpenedFileTest, LstatDiesWhenRealtime) {
- auto Func = [&]() {
-struct stat s{};
-lstat(GetTemporaryFilePath(), &s);
- };
- ExpectRealtimeDeath(Func, MAYBE_APPEND_64("lstat"));
- ExpectNonRealtimeSurvival(Func);
-}
-
-TEST_F(RtsanOpenedFileTest, FstatDiesWhenRealtime) {
- auto Func = [&]() {
-struct stat s{};
-fstat(GetOpenFd(), &s);
- };
- ExpectRealtimeDeath(Func, MAYBE_APPEND_64("fstat"));
- ExpectNonRealtimeSurvival(Func);
-}
-
TEST_F(RtsanFileTest, FcloseDiesWhenRealtime) {
FILE *f = fopen(GetTemporaryFilePath(), "w");
EXPECT_THAT(f, Ne(nullptr));
___
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[llvm-branch-commits] [clang] [Driver] Change linker job in Baremetal toolchain object accomodate GCCInstallation.(2/3) (PR #121830)
quic-garvgupt wrote: It's been a few weeks since this patch was last reviewed. If everything looks good, could someone please provide an LGTM? I'd like to merge this patch soon. https://github.com/llvm/llvm-project/pull/121830 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] RegAlloc: Use new approach to handling failed allocations (PR #128469)
https://github.com/arsenm created
https://github.com/llvm/llvm-project/pull/128469
This fixes an assert after allocation failure.
Rather than collecting failed virtual registers and hacking
on the uses after the fact, directly hack on the uses and rewrite
the registers to the dummy assignment immediately.
Previously we were bypassing LiveRegMatrix and directly assigning
in the VirtRegMap. This resulted in inconsistencies where illegal
overlapping assignments were missing. Rather than try to hack in
some system to manage these in LiveRegMatrix (i.e. hacking around
cases with invalid iterators), avoid this by directly using the
physreg. This should also allow removal of special casing in
virtregrewriter for failed allocations.
>From 399d5d603c7127e8480b665860cc0a8073e0a503 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Sun, 23 Feb 2025 11:21:34 +0700
Subject: [PATCH] RegAlloc: Use new approach to handling failed allocations
This fixes an assert after allocation failure.
Rather than collecting failed virtual registers and hacking
on the uses after the fact, directly hack on the uses and rewrite
the registers to the dummy assignment immediately.
Previously we were bypassing LiveRegMatrix and directly assigning
in the VirtRegMap. This resulted in inconsistencies where illegal
overlapping assignments were missing. Rather than try to hack in
some system to manage these in LiveRegMatrix (i.e. hacking around
cases with invalid iterators), avoid this by directly using the
physreg. This should also allow removal of special casing in
virtregrewriter for failed allocations.
---
llvm/lib/CodeGen/RegAllocBase.cpp | 66 ++-
llvm/lib/CodeGen/RegAllocBase.h | 3 +-
llvm/lib/CodeGen/RegAllocBasic.cpp| 1 -
llvm/lib/CodeGen/RegAllocGreedy.cpp | 1 -
llvm/lib/CodeGen/VirtRegMap.cpp | 3 +-
...e-registers-assertion-after-ra-failure.ll} | 7 +-
.../AMDGPU/illegal-eviction-assert.mir| 4 +-
...-reg-class-snippet-copy-use-after-free.mir | 16 ++---
llvm/test/CodeGen/AMDGPU/issue48473.mir | 2 +-
...ster-killed-error-after-alloc-failure0.mir | 18 ++---
10 files changed, 47 insertions(+), 74 deletions(-)
rename
llvm/test/CodeGen/AMDGPU/{agpr-copy-no-free-registers-assertion-after-ra-failure.xfail.ll
=> agpr-copy-no-free-registers-assertion-after-ra-failure.ll} (75%)
diff --git a/llvm/lib/CodeGen/RegAllocBase.cpp
b/llvm/lib/CodeGen/RegAllocBase.cpp
index d66d396a15018..b9599e77fbf0a 100644
--- a/llvm/lib/CodeGen/RegAllocBase.cpp
+++ b/llvm/lib/CodeGen/RegAllocBase.cpp
@@ -128,8 +128,7 @@ void RegAllocBase::allocatePhysRegs() {
AvailablePhysReg = getErrorAssignment(*RC, MI);
// Keep going after reporting the error.
- VRM->assignVirt2Phys(VirtReg->reg(), AvailablePhysReg);
- FailedVRegs.insert(VirtReg->reg());
+ cleanupFailedVReg(VirtReg->reg(), AvailablePhysReg, SplitVRegs);
} else if (AvailablePhysReg)
Matrix->assign(*VirtReg, AvailablePhysReg);
@@ -163,58 +162,35 @@ void RegAllocBase::postOptimization() {
DeadRemats.clear();
}
-void RegAllocBase::cleanupFailedVRegs() {
- SmallSet JunkRegs;
-
- for (Register FailedReg : FailedVRegs) {
-JunkRegs.insert(FailedReg);
-
-MCRegister PhysReg = VRM->getPhys(FailedReg);
-LiveInterval &FailedInterval = LIS->getInterval(FailedReg);
-
-// The liveness information for the failed register and anything
interfering
-// with the physical register we arbitrarily chose is junk and needs to be
-// deleted.
-for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units) {
- LiveIntervalUnion::Query &Q = Matrix->query(FailedInterval, *Units);
- for (const LiveInterval *InterferingReg : Q.interferingVRegs())
-JunkRegs.insert(InterferingReg->reg());
- LIS->removeRegUnit(*Units);
-}
+void RegAllocBase::cleanupFailedVReg(Register FailedReg, MCRegister PhysReg,
+ SmallVectorImpl &SplitRegs) {
+ // We still should produce valid IR. Kill all the uses and reduce the live
+ // ranges so that we don't think it's possible to introduce kill flags later
+ // which will fail the verifier.
+ for (MachineOperand &MO : MRI->reg_operands(FailedReg)) {
+if (MO.readsReg())
+ MO.setIsUndef(true);
}
- for (Register JunkReg : JunkRegs) {
-MCRegister PhysReg = VRM->getPhys(JunkReg);
-// We still should produce valid IR. Kill all the uses and reduce the live
-// ranges so that we don't think it's possible to introduce kill flags
-// later which will fail the verifier.
-for (MachineOperand &MO : MRI->reg_operands(JunkReg)) {
- if (MO.readsReg())
-MO.setIsUndef(true);
-}
-
-// The liveness of the assigned physical register is also now unreliable.
+ if (!MRI->isReserved(PhysReg)) {
+// Physical liveness for any aliasing registers is now unreliable, so
delete
+// the uses.
for (MCRegAliasIter
[llvm-branch-commits] [llvm] RegAlloc: Use new approach to handling failed allocations (PR #128469)
https://github.com/arsenm ready_for_review https://github.com/llvm/llvm-project/pull/128469 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] RegAlloc: Use new approach to handling failed allocations (PR #128469)
arsenm wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/128469?utm_source=stack-comment-downstack-mergeability-warning"; > >on Graphite. > https://graphite.dev/docs/merge-pull-requests";>Learn more * **#128469** https://app.graphite.dev/github/pr/llvm/llvm-project/128469?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/128469?utm_source=stack-comment-view-in-graphite"; target="_blank">(View in Graphite) * **#128400** https://app.graphite.dev/github/pr/llvm/llvm-project/128400?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * **#128281** https://app.graphite.dev/github/pr/llvm/llvm-project/128281?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * **#128280** https://app.graphite.dev/github/pr/llvm/llvm-project/128280?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * `main` This stack of pull requests is managed by https://graphite.dev?utm-source=stack-comment";>Graphite. Learn more about https://stacking.dev/?utm_source=stack-comment";>stacking. https://github.com/llvm/llvm-project/pull/128469 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] RegAlloc: Use new approach to handling failed allocations (PR #128469)
llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Matt Arsenault (arsenm)
Changes
This fixes an assert after allocation failure.
Rather than collecting failed virtual registers and hacking
on the uses after the fact, directly hack on the uses and rewrite
the registers to the dummy assignment immediately.
Previously we were bypassing LiveRegMatrix and directly assigning
in the VirtRegMap. This resulted in inconsistencies where illegal
overlapping assignments were missing. Rather than try to hack in
some system to manage these in LiveRegMatrix (i.e. hacking around
cases with invalid iterators), avoid this by directly using the
physreg. This should also allow removal of special casing in
virtregrewriter for failed allocations.
---
Full diff: https://github.com/llvm/llvm-project/pull/128469.diff
10 Files Affected:
- (modified) llvm/lib/CodeGen/RegAllocBase.cpp (+21-45)
- (modified) llvm/lib/CodeGen/RegAllocBase.h (+2-1)
- (modified) llvm/lib/CodeGen/RegAllocBasic.cpp (-1)
- (modified) llvm/lib/CodeGen/RegAllocGreedy.cpp (-1)
- (modified) llvm/lib/CodeGen/VirtRegMap.cpp (+1-2)
- (renamed)
llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers-assertion-after-ra-failure.ll
(+3-4)
- (modified) llvm/test/CodeGen/AMDGPU/illegal-eviction-assert.mir (+2-2)
- (modified)
llvm/test/CodeGen/AMDGPU/inflated-reg-class-snippet-copy-use-after-free.mir
(+8-8)
- (modified) llvm/test/CodeGen/AMDGPU/issue48473.mir (+1-1)
- (modified)
llvm/test/CodeGen/AMDGPU/register-killed-error-after-alloc-failure0.mir (+9-9)
``diff
diff --git a/llvm/lib/CodeGen/RegAllocBase.cpp
b/llvm/lib/CodeGen/RegAllocBase.cpp
index d66d396a15018..b9599e77fbf0a 100644
--- a/llvm/lib/CodeGen/RegAllocBase.cpp
+++ b/llvm/lib/CodeGen/RegAllocBase.cpp
@@ -128,8 +128,7 @@ void RegAllocBase::allocatePhysRegs() {
AvailablePhysReg = getErrorAssignment(*RC, MI);
// Keep going after reporting the error.
- VRM->assignVirt2Phys(VirtReg->reg(), AvailablePhysReg);
- FailedVRegs.insert(VirtReg->reg());
+ cleanupFailedVReg(VirtReg->reg(), AvailablePhysReg, SplitVRegs);
} else if (AvailablePhysReg)
Matrix->assign(*VirtReg, AvailablePhysReg);
@@ -163,58 +162,35 @@ void RegAllocBase::postOptimization() {
DeadRemats.clear();
}
-void RegAllocBase::cleanupFailedVRegs() {
- SmallSet JunkRegs;
-
- for (Register FailedReg : FailedVRegs) {
-JunkRegs.insert(FailedReg);
-
-MCRegister PhysReg = VRM->getPhys(FailedReg);
-LiveInterval &FailedInterval = LIS->getInterval(FailedReg);
-
-// The liveness information for the failed register and anything
interfering
-// with the physical register we arbitrarily chose is junk and needs to be
-// deleted.
-for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units) {
- LiveIntervalUnion::Query &Q = Matrix->query(FailedInterval, *Units);
- for (const LiveInterval *InterferingReg : Q.interferingVRegs())
-JunkRegs.insert(InterferingReg->reg());
- LIS->removeRegUnit(*Units);
-}
+void RegAllocBase::cleanupFailedVReg(Register FailedReg, MCRegister PhysReg,
+ SmallVectorImpl &SplitRegs) {
+ // We still should produce valid IR. Kill all the uses and reduce the live
+ // ranges so that we don't think it's possible to introduce kill flags later
+ // which will fail the verifier.
+ for (MachineOperand &MO : MRI->reg_operands(FailedReg)) {
+if (MO.readsReg())
+ MO.setIsUndef(true);
}
- for (Register JunkReg : JunkRegs) {
-MCRegister PhysReg = VRM->getPhys(JunkReg);
-// We still should produce valid IR. Kill all the uses and reduce the live
-// ranges so that we don't think it's possible to introduce kill flags
-// later which will fail the verifier.
-for (MachineOperand &MO : MRI->reg_operands(JunkReg)) {
- if (MO.readsReg())
-MO.setIsUndef(true);
-}
-
-// The liveness of the assigned physical register is also now unreliable.
+ if (!MRI->isReserved(PhysReg)) {
+// Physical liveness for any aliasing registers is now unreliable, so
delete
+// the uses.
for (MCRegAliasIterator Aliases(PhysReg, TRI, true); Aliases.isValid();
++Aliases) {
for (MachineOperand &MO : MRI->reg_operands(*Aliases)) {
-if (MO.readsReg())
+if (MO.readsReg()) {
MO.setIsUndef(true);
- }
-}
-
-LiveInterval &JunkLI = LIS->getInterval(JunkReg);
-if (LIS->shrinkToUses(&JunkLI)) {
- SmallVector SplitLIs;
- LIS->splitSeparateComponents(JunkLI, SplitLIs);
-
- VRM->grow();
- Register Original = VRM->getOriginal(JunkReg);
- for (LiveInterval *SplitLI : SplitLIs) {
-VRM->setIsSplitFromReg(SplitLI->reg(), Original);
-VRM->assignVirt2Phys(SplitLI->reg(), PhysReg);
+ LIS->removeAllRegUnitsForPhysReg(MO.getReg());
+}
}
}
}
+
+ // Directly perform the rewrite, and do not leave it to VirtRegRewriter
[llvm-branch-commits] try (PR #128474)
https://github.com/vitalybuka created https://github.com/llvm/llvm-project/pull/128474 None ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] try (PR #128474)
https://github.com/vitalybuka converted_to_draft https://github.com/llvm/llvm-project/pull/128474 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] try (PR #128474)
llvmbot wrote:
@llvm/pr-subscribers-llvm-support
Author: Vitaly Buka (vitalybuka)
Changes
---
Full diff: https://github.com/llvm/llvm-project/pull/128474.diff
1 Files Affected:
- (modified) llvm/lib/Support/Unix/DynamicLibrary.inc (+7-2)
``diff
diff --git a/llvm/lib/Support/Unix/DynamicLibrary.inc
b/llvm/lib/Support/Unix/DynamicLibrary.inc
index 7452913049ebb..ac254790a6ca4 100644
--- a/llvm/lib/Support/Unix/DynamicLibrary.inc
+++ b/llvm/lib/Support/Unix/DynamicLibrary.inc
@@ -27,8 +27,10 @@ DynamicLibrary::HandleSet::~HandleSet() {
void *DynamicLibrary::HandleSet::DLOpen(const char *File, std::string *Err) {
void *Handle = ::dlopen(File, RTLD_LAZY | RTLD_GLOBAL);
if (!Handle) {
-if (Err)
+if (Err) {
*Err = ::dlerror();
+ ::dlerror();
+}
return &DynamicLibrary::Invalid;
}
@@ -45,7 +47,10 @@ void *DynamicLibrary::HandleSet::DLOpen(const char *File,
std::string *Err) {
void DynamicLibrary::HandleSet::DLClose(void *Handle) { ::dlclose(Handle); }
void *DynamicLibrary::HandleSet::DLSym(void *Handle, const char *Symbol) {
- return ::dlsym(Handle, Symbol);
+ auto* p = ::dlsym(Handle, Symbol);
+ ::dlerror();
+ ::dlerror();
+ return p;
}
#else // !HAVE_DLOPEN
``
https://github.com/llvm/llvm-project/pull/128474
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[llvm-branch-commits] try (PR #128474)
github-actions[bot] wrote:
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
You can test this locally with the following command:
``bash
git-clang-format --diff 8cfd2db29c5079a02dab713c59cfa8a5674d6ea3
936ef337f1c3cd0b94fd494dcb81e6e09ed0e284 --extensions inc --
llvm/lib/Support/Unix/DynamicLibrary.inc
``
View the diff from clang-format here.
``diff
diff --git a/llvm/lib/Support/Unix/DynamicLibrary.inc
b/llvm/lib/Support/Unix/DynamicLibrary.inc
index ac254790a6..56ccb46af5 100644
--- a/llvm/lib/Support/Unix/DynamicLibrary.inc
+++ b/llvm/lib/Support/Unix/DynamicLibrary.inc
@@ -47,7 +47,7 @@ void *DynamicLibrary::HandleSet::DLOpen(const char *File,
std::string *Err) {
void DynamicLibrary::HandleSet::DLClose(void *Handle) { ::dlclose(Handle); }
void *DynamicLibrary::HandleSet::DLSym(void *Handle, const char *Symbol) {
- auto* p = ::dlsym(Handle, Symbol);
+ auto *p = ::dlsym(Handle, Symbol);
::dlerror();
::dlerror();
return p;
``
https://github.com/llvm/llvm-project/pull/128474
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[llvm-branch-commits] [llvm-size] Fallback to defaults on error in args (PR #128447)
serge-sans-paille wrote: @vitalybuka if I understand @MaskRay advice correctly, we just want to finish the command line argument parsing before exiting because of errors. https://github.com/llvm/llvm-project/pull/128447 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] RegAlloc: Use new approach to handling failed allocations (PR #128469)
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/128469
>From 399d5d603c7127e8480b665860cc0a8073e0a503 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Sun, 23 Feb 2025 11:21:34 +0700
Subject: [PATCH 1/2] RegAlloc: Use new approach to handling failed allocations
This fixes an assert after allocation failure.
Rather than collecting failed virtual registers and hacking
on the uses after the fact, directly hack on the uses and rewrite
the registers to the dummy assignment immediately.
Previously we were bypassing LiveRegMatrix and directly assigning
in the VirtRegMap. This resulted in inconsistencies where illegal
overlapping assignments were missing. Rather than try to hack in
some system to manage these in LiveRegMatrix (i.e. hacking around
cases with invalid iterators), avoid this by directly using the
physreg. This should also allow removal of special casing in
virtregrewriter for failed allocations.
---
llvm/lib/CodeGen/RegAllocBase.cpp | 66 ++-
llvm/lib/CodeGen/RegAllocBase.h | 3 +-
llvm/lib/CodeGen/RegAllocBasic.cpp| 1 -
llvm/lib/CodeGen/RegAllocGreedy.cpp | 1 -
llvm/lib/CodeGen/VirtRegMap.cpp | 3 +-
...e-registers-assertion-after-ra-failure.ll} | 7 +-
.../AMDGPU/illegal-eviction-assert.mir| 4 +-
...-reg-class-snippet-copy-use-after-free.mir | 16 ++---
llvm/test/CodeGen/AMDGPU/issue48473.mir | 2 +-
...ster-killed-error-after-alloc-failure0.mir | 18 ++---
10 files changed, 47 insertions(+), 74 deletions(-)
rename
llvm/test/CodeGen/AMDGPU/{agpr-copy-no-free-registers-assertion-after-ra-failure.xfail.ll
=> agpr-copy-no-free-registers-assertion-after-ra-failure.ll} (75%)
diff --git a/llvm/lib/CodeGen/RegAllocBase.cpp
b/llvm/lib/CodeGen/RegAllocBase.cpp
index d66d396a15018..b9599e77fbf0a 100644
--- a/llvm/lib/CodeGen/RegAllocBase.cpp
+++ b/llvm/lib/CodeGen/RegAllocBase.cpp
@@ -128,8 +128,7 @@ void RegAllocBase::allocatePhysRegs() {
AvailablePhysReg = getErrorAssignment(*RC, MI);
// Keep going after reporting the error.
- VRM->assignVirt2Phys(VirtReg->reg(), AvailablePhysReg);
- FailedVRegs.insert(VirtReg->reg());
+ cleanupFailedVReg(VirtReg->reg(), AvailablePhysReg, SplitVRegs);
} else if (AvailablePhysReg)
Matrix->assign(*VirtReg, AvailablePhysReg);
@@ -163,58 +162,35 @@ void RegAllocBase::postOptimization() {
DeadRemats.clear();
}
-void RegAllocBase::cleanupFailedVRegs() {
- SmallSet JunkRegs;
-
- for (Register FailedReg : FailedVRegs) {
-JunkRegs.insert(FailedReg);
-
-MCRegister PhysReg = VRM->getPhys(FailedReg);
-LiveInterval &FailedInterval = LIS->getInterval(FailedReg);
-
-// The liveness information for the failed register and anything
interfering
-// with the physical register we arbitrarily chose is junk and needs to be
-// deleted.
-for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units) {
- LiveIntervalUnion::Query &Q = Matrix->query(FailedInterval, *Units);
- for (const LiveInterval *InterferingReg : Q.interferingVRegs())
-JunkRegs.insert(InterferingReg->reg());
- LIS->removeRegUnit(*Units);
-}
+void RegAllocBase::cleanupFailedVReg(Register FailedReg, MCRegister PhysReg,
+ SmallVectorImpl &SplitRegs) {
+ // We still should produce valid IR. Kill all the uses and reduce the live
+ // ranges so that we don't think it's possible to introduce kill flags later
+ // which will fail the verifier.
+ for (MachineOperand &MO : MRI->reg_operands(FailedReg)) {
+if (MO.readsReg())
+ MO.setIsUndef(true);
}
- for (Register JunkReg : JunkRegs) {
-MCRegister PhysReg = VRM->getPhys(JunkReg);
-// We still should produce valid IR. Kill all the uses and reduce the live
-// ranges so that we don't think it's possible to introduce kill flags
-// later which will fail the verifier.
-for (MachineOperand &MO : MRI->reg_operands(JunkReg)) {
- if (MO.readsReg())
-MO.setIsUndef(true);
-}
-
-// The liveness of the assigned physical register is also now unreliable.
+ if (!MRI->isReserved(PhysReg)) {
+// Physical liveness for any aliasing registers is now unreliable, so
delete
+// the uses.
for (MCRegAliasIterator Aliases(PhysReg, TRI, true); Aliases.isValid();
++Aliases) {
for (MachineOperand &MO : MRI->reg_operands(*Aliases)) {
-if (MO.readsReg())
+if (MO.readsReg()) {
MO.setIsUndef(true);
- }
-}
-
-LiveInterval &JunkLI = LIS->getInterval(JunkReg);
-if (LIS->shrinkToUses(&JunkLI)) {
- SmallVector SplitLIs;
- LIS->splitSeparateComponents(JunkLI, SplitLIs);
-
- VRM->grow();
- Register Original = VRM->getOriginal(JunkReg);
- for (LiveInterval *SplitLI : SplitLIs) {
-VRM->setIsSplitFromReg(SplitLI->reg(), Original);
-VRM->assignVirt2Phys(SplitLI->reg
[llvm-branch-commits] [llvm] 54f1318 - Revert "[AMDGPU] Add verification for amdgcn.init.exec.from.input (#128172)"
Author: Robert Imschweiler
Date: 2025-02-23T21:24:30+01:00
New Revision: 54f13182cb208abd397347a63953d4b75f112e63
URL:
https://github.com/llvm/llvm-project/commit/54f13182cb208abd397347a63953d4b75f112e63
DIFF:
https://github.com/llvm/llvm-project/commit/54f13182cb208abd397347a63953d4b75f112e63.diff
LOG: Revert "[AMDGPU] Add verification for amdgcn.init.exec.from.input
(#128172)"
This reverts commit cafad2b75a6e1c4957db1967cadeb002339887e3.
Added:
Modified:
llvm/lib/IR/Verifier.cpp
Removed:
llvm/test/Verifier/AMDGPU/intrinsic-amdgpu-init-exec-from-input.ll
diff --git a/llvm/lib/IR/Verifier.cpp b/llvm/lib/IR/Verifier.cpp
index 310a6735d55d6..58fd575e6e7e8 100644
--- a/llvm/lib/IR/Verifier.cpp
+++ b/llvm/lib/IR/Verifier.cpp
@@ -6371,14 +6371,6 @@ void Verifier::visitIntrinsicCall(Intrinsic::ID ID,
CallBase &Call) {
"llvm.amdgcn.cs.chain must be followed by unreachable", &Call);
break;
}
- case Intrinsic::amdgcn_init_exec_from_input: {
-const Argument *Arg = dyn_cast(Call.getOperand(0));
-Check(Arg && Arg->hasInRegAttr(),
- "only inreg arguments to the parent function are valid as inputs to "
- "this intrinsic",
- &Call);
-break;
- }
case Intrinsic::amdgcn_set_inactive_chain_arg: {
auto CallerCC = Call.getCaller()->getCallingConv();
switch (CallerCC) {
diff --git
a/llvm/test/Verifier/AMDGPU/intrinsic-amdgpu-init-exec-from-input.ll
b/llvm/test/Verifier/AMDGPU/intrinsic-amdgpu-init-exec-from-input.ll
deleted file mode 100644
index 11426041924e4..0
--- a/llvm/test/Verifier/AMDGPU/intrinsic-amdgpu-init-exec-from-input.ll
+++ /dev/null
@@ -1,25 +0,0 @@
-; RUN: not llvm-as -disable-output 2>&1 %s | FileCheck %s
-
-declare void @llvm.amdgcn.init.exec.from.input(i32, i32 immarg)
-
-; CHECK: only inreg arguments to the parent function are valid as inputs to
this intrinsic
-; CHECK-NEXT: call void @llvm.amdgcn.init.exec.from.input(i32 0, i32 0)
-define void @init_exec_from_input_fail_constant() {
- call void @llvm.amdgcn.init.exec.from.input(i32 0, i32 0)
- ret void
-}
-
-; CHECK: only inreg arguments to the parent function are valid as inputs to
this intrinsic
-; CHECK-NEXT: call void @llvm.amdgcn.init.exec.from.input(i32 %b, i32 0)
-define void @init_exec_from_input_fail_not_inreg(i32 inreg %a, i32 %b) {
- call void @llvm.amdgcn.init.exec.from.input(i32 %b, i32 0)
- ret void
-}
-
-; CHECK: only inreg arguments to the parent function are valid as inputs to
this intrinsic
-; CHECK-NEXT: call void @llvm.amdgcn.init.exec.from.input(i32 %c, i32 0)
-define void @init_exec_from_input_fail_instruction(i32 inreg %a, i32 %b) {
- %c = add i32 %a, %b
- call void @llvm.amdgcn.init.exec.from.input(i32 %c, i32 0)
- ret void
-}
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[llvm-branch-commits] [clang] [clang][NFC] Remove CXXRecordDecl::lookupDependentName() and its helpers (PR #128392)
HighCommander4 wrote: > LGTM in general, but my concern would be that we're less clear about the > number of uses of this function out-of-tree (and how hard it could be to > migrate them to HeuristicResolver), so as an alternative, can we turn the > implementation to use HeuristicResolver and explicitly deprecate it for a > while before eventually removing it? I tried this, but this would require linking `clangSema` into `clang/lib/AST` which creates a circular dependency. FWIW I did a Github code search and could only find [one](https://github.com/sourcegraph/scip-clang/blob/cc64149ae5f7819ac34c987807753b440c681b6a/indexer/ApproximateNameResolver.cc#L69) out-of-tree use in public code available on Github, and it looks straightforward to port to HeuristicResolver. https://github.com/llvm/llvm-project/pull/128392 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm-size] Fallback to defaults on error in args (PR #128447)
https://github.com/vitalybuka edited https://github.com/llvm/llvm-project/pull/128447 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [CodeGen][NewPM] Port MachineSink to NPM (PR #115434)
@@ -189,30 +198,19 @@ class MachineSinking : public MachineFunctionPass {
bool EnableSinkAndFold;
public:
- static char ID; // Pass identification
-
- MachineSinking() : MachineFunctionPass(ID) {
-initializeMachineSinkingPass(*PassRegistry::getPassRegistry());
- }
-
- bool runOnMachineFunction(MachineFunction &MF) override;
-
- void getAnalysisUsage(AnalysisUsage &AU) const override {
-MachineFunctionPass::getAnalysisUsage(AU);
-AU.addRequired();
-AU.addRequired();
-AU.addRequired();
-AU.addRequired();
-AU.addRequired();
-AU.addPreserved();
-AU.addPreserved();
-AU.addRequired();
-if (UseBlockFreqInfo)
- AU.addRequired();
-AU.addRequired();
- }
-
- void releaseMemory() override {
+ MachineSinking(bool EnableSinkAndFold, MachineDominatorTree *DT,
+ MachinePostDominatorTree *PDT, LiveVariables *LV,
+ MachineLoopInfo *MLI, SlotIndexes *SI, LiveIntervals *LIS,
+ MachineCycleInfo *CI, ProfileSummaryInfo *PSI,
+ MachineBlockFrequencyInfo *MBFI,
+ const MachineBranchProbabilityInfo *MBPI, AliasAnalysis *AA)
+ : DT(DT), PDT(PDT), CI(CI), PSI(PSI), MBFI(MBFI), MBPI(MBPI), AA(AA),
optimisan wrote:
Figured it's not essential, later we can just collapse impl into the new pass
class.
https://github.com/llvm/llvm-project/pull/115434
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