[llvm-branch-commits] [LoongArch] Avoid indirect branch jumps using the ra register (PR #115424)
https://github.com/SixWeining approved this pull request. https://github.com/llvm/llvm-project/pull/115424 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [compiler-rt] [libcxx] [libcxxabi] [llvm] Reapply "[runtimes] Allow building against an installed LLVM tree" (PR #114307)
https://github.com/arichardson updated
https://github.com/llvm/llvm-project/pull/114307
>From 6a6483cfe53ad33d3a5cd4432c33a5af93694668 Mon Sep 17 00:00:00 2001
From: Alexander Richardson
Date: Wed, 30 Oct 2024 14:33:11 -0700
Subject: [PATCH 1/2] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20in?=
=?UTF-8?q?itial=20version?=
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Created using spr 1.3.6-beta.1
---
compiler-rt/cmake/Modules/AddCompilerRT.cmake | 1 +
compiler-rt/test/hwasan/lit.cfg.py| 9 +
compiler-rt/test/lit.common.configured.in | 1 +
libcxx/CMakeLists.txt | 12 +++---
libcxxabi/CMakeLists.txt | 6 +--
runtimes/CMakeLists.txt | 40 +--
6 files changed, 53 insertions(+), 16 deletions(-)
diff --git a/compiler-rt/cmake/Modules/AddCompilerRT.cmake
b/compiler-rt/cmake/Modules/AddCompilerRT.cmake
index e3d81d241b1054..b2f33d1a961c74 100644
--- a/compiler-rt/cmake/Modules/AddCompilerRT.cmake
+++ b/compiler-rt/cmake/Modules/AddCompilerRT.cmake
@@ -773,6 +773,7 @@ function(configure_compiler_rt_lit_site_cfg input output)
string(REPLACE ${CMAKE_CFG_INTDIR} ${LLVM_BUILD_MODE}
COMPILER_RT_RESOLVED_TEST_COMPILER ${COMPILER_RT_TEST_COMPILER})
string(REPLACE ${CMAKE_CFG_INTDIR} ${LLVM_BUILD_MODE}
COMPILER_RT_RESOLVED_OUTPUT_DIR ${COMPILER_RT_OUTPUT_DIR})
+ string(REPLACE ${CMAKE_CFG_INTDIR} ${LLVM_BUILD_MODE}
COMPILER_RT_RESOLVED_EXEC_OUTPUT_DIR ${COMPILER_RT_EXEC_OUTPUT_DIR})
string(REPLACE ${CMAKE_CFG_INTDIR} ${LLVM_BUILD_MODE}
COMPILER_RT_RESOLVED_LIBRARY_OUTPUT_DIR ${output_dir})
configure_lit_site_cfg(${input} ${output})
diff --git a/compiler-rt/test/hwasan/lit.cfg.py
b/compiler-rt/test/hwasan/lit.cfg.py
index 594f3294a84ac1..bbf23e683240ac 100644
--- a/compiler-rt/test/hwasan/lit.cfg.py
+++ b/compiler-rt/test/hwasan/lit.cfg.py
@@ -2,6 +2,9 @@
import os
+from lit.llvm import llvm_config
+from lit.llvm.subst import ToolSubst, FindTool
+
# Setup config name.
config.name = "HWAddressSanitizer" + getattr(config, "name_suffix", "default")
@@ -74,6 +77,12 @@ def build_invocation(compile_flags):
("%env_hwasan_opts=", "env HWASAN_OPTIONS=" + default_hwasan_opts_str)
)
+# Ensure that we can use hwasan_symbolize from the expected location
+llvm_config.add_tool_substitutions(
+[ToolSubst("hwasan_symbolize", unresolved="fatal")],
+search_dirs=[config.compiler_rt_bindir],
+)
+
# Default test suffixes.
config.suffixes = [".c", ".cpp"]
diff --git a/compiler-rt/test/lit.common.configured.in
b/compiler-rt/test/lit.common.configured.in
index 66935c358afedd..050792b6b26217 100644
--- a/compiler-rt/test/lit.common.configured.in
+++ b/compiler-rt/test/lit.common.configured.in
@@ -28,6 +28,7 @@ set_default("python_executable", "@Python3_EXECUTABLE@")
set_default("compiler_rt_debug", @COMPILER_RT_DEBUG_PYBOOL@)
set_default("compiler_rt_intercept_libdispatch",
@COMPILER_RT_INTERCEPT_LIBDISPATCH_PYBOOL@)
set_default("compiler_rt_output_dir", "@COMPILER_RT_RESOLVED_OUTPUT_DIR@")
+set_default("compiler_rt_bindir", "@COMPILER_RT_RESOLVED_EXEC_OUTPUT_DIR@")
set_default("compiler_rt_libdir", "@COMPILER_RT_RESOLVED_LIBRARY_OUTPUT_DIR@")
set_default("emulator", "@COMPILER_RT_EMULATOR@")
set_default("asan_shadow_scale", "@COMPILER_RT_ASAN_SHADOW_SCALE@")
diff --git a/libcxx/CMakeLists.txt b/libcxx/CMakeLists.txt
index 95a7d10f055ea7..7b3f032fd82126 100644
--- a/libcxx/CMakeLists.txt
+++ b/libcxx/CMakeLists.txt
@@ -413,9 +413,9 @@ if(LLVM_ENABLE_PER_TARGET_RUNTIME_DIR AND NOT APPLE)
string(APPEND LIBCXX_TARGET_SUBDIR /${LIBCXX_LIBDIR_SUBDIR})
endif()
set(LIBCXX_LIBRARY_DIR ${LLVM_LIBRARY_OUTPUT_INTDIR}/${LIBCXX_TARGET_SUBDIR})
- set(LIBCXX_GENERATED_INCLUDE_DIR "${LLVM_BINARY_DIR}/include/c++/v1")
- set(LIBCXX_GENERATED_MODULE_DIR "${LLVM_BINARY_DIR}/modules/c++/v1")
- set(LIBCXX_GENERATED_INCLUDE_TARGET_DIR
"${LLVM_BINARY_DIR}/include/${LIBCXX_TARGET_SUBDIR}/c++/v1")
+ set(LIBCXX_GENERATED_INCLUDE_DIR "${LIBCXX_BINARY_DIR}/include/c++/v1")
+ set(LIBCXX_GENERATED_MODULE_DIR "${LIBCXX_BINARY_DIR}/modules/c++/v1")
+ set(LIBCXX_GENERATED_INCLUDE_TARGET_DIR
"${LIBCXX_BINARY_DIR}/include/${LIBCXX_TARGET_SUBDIR}/c++/v1")
set(LIBCXX_INSTALL_LIBRARY_DIR
lib${LLVM_LIBDIR_SUFFIX}/${LIBCXX_TARGET_SUBDIR} CACHE STRING
"Path where built libc++ libraries should be installed.")
set(LIBCXX_INSTALL_INCLUDE_TARGET_DIR
"${CMAKE_INSTALL_INCLUDEDIR}/${LIBCXX_TARGET_SUBDIR}/c++/v1" CACHE STRING
@@ -424,13 +424,11 @@ if(LLVM_ENABLE_PER_TARGET_RUNTIME_DIR AND NOT APPLE)
else()
if(LLVM_LIBRARY_OUTPUT_INTDIR)
set(LIBCXX_LIBRARY_DIR ${LLVM_LIBRARY_OUTPUT_INTDIR})
-set(LIBCXX_GENERATED_INCLUDE_DIR "${LLVM_BINARY_DIR}/include/c++/v1")
-set(LIBCXX_GENERATED_MODULE_DIR "${LLVM_BINARY_DIR}/modules/c++/v1")
else()
set(LIBCXX_LIBRARY_DIR ${CMAKE_BINARY_DIR}/lib${LIBCXX_LIBDIR_SUFFIX})
-set(LIB
[llvm-branch-commits] [compiler-rt] [libcxx] [libcxxabi] [llvm] Reapply "[runtimes] Allow building against an installed LLVM tree" (PR #114307)
https://github.com/arichardson updated
https://github.com/llvm/llvm-project/pull/114307
>From 6a6483cfe53ad33d3a5cd4432c33a5af93694668 Mon Sep 17 00:00:00 2001
From: Alexander Richardson
Date: Wed, 30 Oct 2024 14:33:11 -0700
Subject: [PATCH 1/2] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20in?=
=?UTF-8?q?itial=20version?=
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Created using spr 1.3.6-beta.1
---
compiler-rt/cmake/Modules/AddCompilerRT.cmake | 1 +
compiler-rt/test/hwasan/lit.cfg.py| 9 +
compiler-rt/test/lit.common.configured.in | 1 +
libcxx/CMakeLists.txt | 12 +++---
libcxxabi/CMakeLists.txt | 6 +--
runtimes/CMakeLists.txt | 40 +--
6 files changed, 53 insertions(+), 16 deletions(-)
diff --git a/compiler-rt/cmake/Modules/AddCompilerRT.cmake
b/compiler-rt/cmake/Modules/AddCompilerRT.cmake
index e3d81d241b1054..b2f33d1a961c74 100644
--- a/compiler-rt/cmake/Modules/AddCompilerRT.cmake
+++ b/compiler-rt/cmake/Modules/AddCompilerRT.cmake
@@ -773,6 +773,7 @@ function(configure_compiler_rt_lit_site_cfg input output)
string(REPLACE ${CMAKE_CFG_INTDIR} ${LLVM_BUILD_MODE}
COMPILER_RT_RESOLVED_TEST_COMPILER ${COMPILER_RT_TEST_COMPILER})
string(REPLACE ${CMAKE_CFG_INTDIR} ${LLVM_BUILD_MODE}
COMPILER_RT_RESOLVED_OUTPUT_DIR ${COMPILER_RT_OUTPUT_DIR})
+ string(REPLACE ${CMAKE_CFG_INTDIR} ${LLVM_BUILD_MODE}
COMPILER_RT_RESOLVED_EXEC_OUTPUT_DIR ${COMPILER_RT_EXEC_OUTPUT_DIR})
string(REPLACE ${CMAKE_CFG_INTDIR} ${LLVM_BUILD_MODE}
COMPILER_RT_RESOLVED_LIBRARY_OUTPUT_DIR ${output_dir})
configure_lit_site_cfg(${input} ${output})
diff --git a/compiler-rt/test/hwasan/lit.cfg.py
b/compiler-rt/test/hwasan/lit.cfg.py
index 594f3294a84ac1..bbf23e683240ac 100644
--- a/compiler-rt/test/hwasan/lit.cfg.py
+++ b/compiler-rt/test/hwasan/lit.cfg.py
@@ -2,6 +2,9 @@
import os
+from lit.llvm import llvm_config
+from lit.llvm.subst import ToolSubst, FindTool
+
# Setup config name.
config.name = "HWAddressSanitizer" + getattr(config, "name_suffix", "default")
@@ -74,6 +77,12 @@ def build_invocation(compile_flags):
("%env_hwasan_opts=", "env HWASAN_OPTIONS=" + default_hwasan_opts_str)
)
+# Ensure that we can use hwasan_symbolize from the expected location
+llvm_config.add_tool_substitutions(
+[ToolSubst("hwasan_symbolize", unresolved="fatal")],
+search_dirs=[config.compiler_rt_bindir],
+)
+
# Default test suffixes.
config.suffixes = [".c", ".cpp"]
diff --git a/compiler-rt/test/lit.common.configured.in
b/compiler-rt/test/lit.common.configured.in
index 66935c358afedd..050792b6b26217 100644
--- a/compiler-rt/test/lit.common.configured.in
+++ b/compiler-rt/test/lit.common.configured.in
@@ -28,6 +28,7 @@ set_default("python_executable", "@Python3_EXECUTABLE@")
set_default("compiler_rt_debug", @COMPILER_RT_DEBUG_PYBOOL@)
set_default("compiler_rt_intercept_libdispatch",
@COMPILER_RT_INTERCEPT_LIBDISPATCH_PYBOOL@)
set_default("compiler_rt_output_dir", "@COMPILER_RT_RESOLVED_OUTPUT_DIR@")
+set_default("compiler_rt_bindir", "@COMPILER_RT_RESOLVED_EXEC_OUTPUT_DIR@")
set_default("compiler_rt_libdir", "@COMPILER_RT_RESOLVED_LIBRARY_OUTPUT_DIR@")
set_default("emulator", "@COMPILER_RT_EMULATOR@")
set_default("asan_shadow_scale", "@COMPILER_RT_ASAN_SHADOW_SCALE@")
diff --git a/libcxx/CMakeLists.txt b/libcxx/CMakeLists.txt
index 95a7d10f055ea7..7b3f032fd82126 100644
--- a/libcxx/CMakeLists.txt
+++ b/libcxx/CMakeLists.txt
@@ -413,9 +413,9 @@ if(LLVM_ENABLE_PER_TARGET_RUNTIME_DIR AND NOT APPLE)
string(APPEND LIBCXX_TARGET_SUBDIR /${LIBCXX_LIBDIR_SUBDIR})
endif()
set(LIBCXX_LIBRARY_DIR ${LLVM_LIBRARY_OUTPUT_INTDIR}/${LIBCXX_TARGET_SUBDIR})
- set(LIBCXX_GENERATED_INCLUDE_DIR "${LLVM_BINARY_DIR}/include/c++/v1")
- set(LIBCXX_GENERATED_MODULE_DIR "${LLVM_BINARY_DIR}/modules/c++/v1")
- set(LIBCXX_GENERATED_INCLUDE_TARGET_DIR
"${LLVM_BINARY_DIR}/include/${LIBCXX_TARGET_SUBDIR}/c++/v1")
+ set(LIBCXX_GENERATED_INCLUDE_DIR "${LIBCXX_BINARY_DIR}/include/c++/v1")
+ set(LIBCXX_GENERATED_MODULE_DIR "${LIBCXX_BINARY_DIR}/modules/c++/v1")
+ set(LIBCXX_GENERATED_INCLUDE_TARGET_DIR
"${LIBCXX_BINARY_DIR}/include/${LIBCXX_TARGET_SUBDIR}/c++/v1")
set(LIBCXX_INSTALL_LIBRARY_DIR
lib${LLVM_LIBDIR_SUFFIX}/${LIBCXX_TARGET_SUBDIR} CACHE STRING
"Path where built libc++ libraries should be installed.")
set(LIBCXX_INSTALL_INCLUDE_TARGET_DIR
"${CMAKE_INSTALL_INCLUDEDIR}/${LIBCXX_TARGET_SUBDIR}/c++/v1" CACHE STRING
@@ -424,13 +424,11 @@ if(LLVM_ENABLE_PER_TARGET_RUNTIME_DIR AND NOT APPLE)
else()
if(LLVM_LIBRARY_OUTPUT_INTDIR)
set(LIBCXX_LIBRARY_DIR ${LLVM_LIBRARY_OUTPUT_INTDIR})
-set(LIBCXX_GENERATED_INCLUDE_DIR "${LLVM_BINARY_DIR}/include/c++/v1")
-set(LIBCXX_GENERATED_MODULE_DIR "${LLVM_BINARY_DIR}/modules/c++/v1")
else()
set(LIBCXX_LIBRARY_DIR ${CMAKE_BINARY_DIR}/lib${LIBCXX_LIBDIR_SUFFIX})
-set(LIB
[llvm-branch-commits] [LoongArch] Avoid indirect branch jumps using the ra register (PR #115424)
https://github.com/wangleiat updated https://github.com/llvm/llvm-project/pull/115424 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [mlir] [mlir][IR] `DominanceInfo`: Deduplicate `properlyDominates` implementation (PR #115433)
https://github.com/matthias-springer updated
https://github.com/llvm/llvm-project/pull/115433
>From 213a01bb92eeab460fd82d881f53e96768e161ca Mon Sep 17 00:00:00 2001
From: Matthias Springer
Date: Fri, 8 Nov 2024 08:12:08 +0100
Subject: [PATCH] [mlir][IR] `DominanceInfo`: Deduplicate `properlyDominates`
implementation
The implementations of `DominanceInfo::properlyDominates` and
`PostDominanceInfo::properlyPostDominates` are almost identical: only one line
of code is different. Define the function in `DominanceInfoBase` to avoid the
code duplication.
Note: This commit is not marked as NFC because
`PostDominanceInfo::properlyPostDominates` now also has an `enclosingOpOk`
argument.
---
mlir/include/mlir/IR/Dominance.h | 21 --
mlir/lib/IR/Dominance.cpp| 111 +--
2 files changed, 48 insertions(+), 84 deletions(-)
diff --git a/mlir/include/mlir/IR/Dominance.h b/mlir/include/mlir/IR/Dominance.h
index 2947bdc21dfebf..16d17b9c0f3d01 100644
--- a/mlir/include/mlir/IR/Dominance.h
+++ b/mlir/include/mlir/IR/Dominance.h
@@ -113,8 +113,12 @@ class DominanceInfoBase {
llvm::PointerIntPair
getDominanceInfo(Region *region, bool needsDomTree) const;
- /// Return true if the specified block A properly dominates block B.
- bool properlyDominates(Block *a, Block *b) const;
+ /// Return "true" if the specified block A properly (post)dominates block B.
+ bool properlyDominatesImpl(Block *a, Block *b) const;
+
+ /// Return "true" if the specified op A properly (post)dominates op B.
+ bool properlyDominatesImpl(Operation *a, Operation *b,
+ bool enclosingOpOk = true) const;
/// A mapping of regions to their base dominator tree and a cached
/// "hasSSADominance" bit. This map does not contain dominator trees for
@@ -147,7 +151,9 @@ class DominanceInfo : public
detail::DominanceInfoBase {
/// The `enclosingOpOk` flag says whether we should return true if the B op
/// is enclosed by a region on A.
bool properlyDominates(Operation *a, Operation *b,
- bool enclosingOpOk = true) const;
+ bool enclosingOpOk = true) const {
+return super::properlyDominatesImpl(a, b, enclosingOpOk);
+ }
/// Return true if operation A dominates operation B, i.e. if A and B are the
/// same operation or A properly dominates B.
@@ -183,7 +189,7 @@ class DominanceInfo : public
detail::DominanceInfoBase {
/// dominance" of ops, the single block is considered to properly dominate
/// itself in a graph region.
bool properlyDominates(Block *a, Block *b) const {
-return super::properlyDominates(a, b);
+return super::properlyDominatesImpl(a, b);
}
};
@@ -193,7 +199,10 @@ class PostDominanceInfo : public
detail::DominanceInfoBase {
using super::super;
/// Return true if operation A properly postdominates operation B.
- bool properlyPostDominates(Operation *a, Operation *b) const;
+ bool properlyPostDominates(Operation *a, Operation *b,
+ bool enclosingOpOk = true) const {
+return super::properlyDominatesImpl(a, b, enclosingOpOk);
+ }
/// Return true if operation A postdominates operation B.
bool postDominates(Operation *a, Operation *b) const {
@@ -202,7 +211,7 @@ class PostDominanceInfo : public
detail::DominanceInfoBase {
/// Return true if the specified block A properly postdominates block B.
bool properlyPostDominates(Block *a, Block *b) const {
-return super::properlyDominates(a, b);
+return super::properlyDominatesImpl(a, b);
}
/// Return true if the specified block A postdominates block B.
diff --git a/mlir/lib/IR/Dominance.cpp b/mlir/lib/IR/Dominance.cpp
index c9b8ee69c24570..406e0f2d62d640 100644
--- a/mlir/lib/IR/Dominance.cpp
+++ b/mlir/lib/IR/Dominance.cpp
@@ -215,7 +215,8 @@
DominanceInfoBase::findNearestCommonDominator(Block *a,
/// Return true if the specified block A properly dominates block B.
template
-bool DominanceInfoBase::properlyDominates(Block *a, Block *b) const
{
+bool DominanceInfoBase::properlyDominatesImpl(Block *a,
+ Block *b) const {
assert(a && b && "null blocks not allowed");
// A block dominates, but does not properly dominate, itself unless this
@@ -243,36 +244,14 @@ bool
DominanceInfoBase::properlyDominates(Block *a, Block *b) const {
return getDomTree(regionA).properlyDominates(a, b);
}
-/// Return true if the specified block is reachable from the entry block of
-/// its region.
template
-bool DominanceInfoBase::isReachableFromEntry(Block *a) const {
- // If this is the first block in its region, then it is obviously reachable.
- Region *region = a->getParent();
- if (®ion->front() == a)
-return true;
-
- // Otherwise this is some block in a multi-block region. Check DomTree.
- return getDomTree(region).isReachableFromEntry(a);
-}
-
-template class detail::DominanceInfo
[llvm-branch-commits] [mlir] [mlir][IR][NFC] `DominanceInfo`: Share same impl for block/op dominance (PR #115587)
https://github.com/matthias-springer updated
https://github.com/llvm/llvm-project/pull/115587
>From 57bd3919c4976f01fb0b6a15928545744e25d0cb Mon Sep 17 00:00:00 2001
From: Matthias Springer
Date: Sat, 9 Nov 2024 07:13:07 +0100
Subject: [PATCH] [mlir][IR][NFC] `DominanceInfo`: Share same impl for block/op
dominance
The `properlyDominates` implementations for blocks and ops are very similar.
This commit replaces them with a single implementation that operates on block
iterators. That implementation can be used to implement both
`properlyDominates` variants.
Note: A subsequent commit will add a new public `properlyDominates` overload
that accepts block iterators. That functionality can then be used to find a
valid insertion point at which a range of values is defined (by utilizing post
dominance).
Depends on #115433.
---
mlir/include/mlir/IR/Dominance.h | 28 +++
mlir/lib/IR/Dominance.cpp| 124 ---
2 files changed, 92 insertions(+), 60 deletions(-)
diff --git a/mlir/include/mlir/IR/Dominance.h b/mlir/include/mlir/IR/Dominance.h
index 16d17b9c0f3d01..63504cad211a4d 100644
--- a/mlir/include/mlir/IR/Dominance.h
+++ b/mlir/include/mlir/IR/Dominance.h
@@ -113,12 +113,12 @@ class DominanceInfoBase {
llvm::PointerIntPair
getDominanceInfo(Region *region, bool needsDomTree) const;
- /// Return "true" if the specified block A properly (post)dominates block B.
- bool properlyDominatesImpl(Block *a, Block *b) const;
-
- /// Return "true" if the specified op A properly (post)dominates op B.
- bool properlyDominatesImpl(Operation *a, Operation *b,
- bool enclosingOpOk = true) const;
+ /// Return "true" if block iterator A properly (post)dominates block iterator
+ /// B. If `enclosingOk` is set, A is considered to (post)dominate B if A
+ /// encloses B.
+ bool properlyDominatesImpl(Block *aBlock, Block::iterator aIt, Block *bBlock,
+ Block::iterator bIt,
+ bool enclosingOk = true) const;
/// A mapping of regions to their base dominator tree and a cached
/// "hasSSADominance" bit. This map does not contain dominator trees for
@@ -151,9 +151,7 @@ class DominanceInfo : public
detail::DominanceInfoBase {
/// The `enclosingOpOk` flag says whether we should return true if the B op
/// is enclosed by a region on A.
bool properlyDominates(Operation *a, Operation *b,
- bool enclosingOpOk = true) const {
-return super::properlyDominatesImpl(a, b, enclosingOpOk);
- }
+ bool enclosingOpOk = true) const;
/// Return true if operation A dominates operation B, i.e. if A and B are the
/// same operation or A properly dominates B.
@@ -188,9 +186,7 @@ class DominanceInfo : public
detail::DominanceInfoBase {
/// Graph regions have only a single block. To be consistent with "proper
/// dominance" of ops, the single block is considered to properly dominate
/// itself in a graph region.
- bool properlyDominates(Block *a, Block *b) const {
-return super::properlyDominatesImpl(a, b);
- }
+ bool properlyDominates(Block *a, Block *b) const;
};
/// A class for computing basic postdominance information.
@@ -200,9 +196,7 @@ class PostDominanceInfo : public
detail::DominanceInfoBase {
/// Return true if operation A properly postdominates operation B.
bool properlyPostDominates(Operation *a, Operation *b,
- bool enclosingOpOk = true) const {
-return super::properlyDominatesImpl(a, b, enclosingOpOk);
- }
+ bool enclosingOpOk = true) const;
/// Return true if operation A postdominates operation B.
bool postDominates(Operation *a, Operation *b) const {
@@ -210,9 +204,7 @@ class PostDominanceInfo : public
detail::DominanceInfoBase {
}
/// Return true if the specified block A properly postdominates block B.
- bool properlyPostDominates(Block *a, Block *b) const {
-return super::properlyDominatesImpl(a, b);
- }
+ bool properlyPostDominates(Block *a, Block *b) const;
/// Return true if the specified block A postdominates block B.
bool postDominates(Block *a, Block *b) const {
diff --git a/mlir/lib/IR/Dominance.cpp b/mlir/lib/IR/Dominance.cpp
index 406e0f2d62d640..1c54e09d29b9b5 100644
--- a/mlir/lib/IR/Dominance.cpp
+++ b/mlir/lib/IR/Dominance.cpp
@@ -213,61 +213,73 @@
DominanceInfoBase::findNearestCommonDominator(Block *a,
return getDomTree(a->getParent()).findNearestCommonDominator(a, b);
}
-/// Return true if the specified block A properly dominates block B.
-template
-bool DominanceInfoBase::properlyDominatesImpl(Block *a,
- Block *b) const {
- assert(a && b && "null blocks not allowed");
+/// Returns the given block iterator if it lies within the region region.
+/// Otherwise, otherwise finds the ancestor of the given block iterator that
+/
[llvm-branch-commits] [llvm] release/19.x: [loongarch][DAG][FREEZE] Fix crash when FREEZE a half(f16) type on loongarch (#107791) (PR #109093)
heiher wrote: Although the original intent of this patch was to resolve an assertion issue (https://github.com/ziglang/zig-bootstrap/issues/164#issuecomment-2332357069), it actually addresses two miscompilation issues (https://github.com/llvm/llvm-project/issues/97975 https://github.com/llvm/llvm-project/issues/97981) as well. When the backport was initially proposed, I was believed that an ABI change would be necessary to ensure compatibility with future hardware supporting fp16. However, it's now clear that no such change will be required (https://github.com/llvm/llvm-project/pull/109368#issuecomment-2423879356). Given that this is primarily a bug fix, could we proceed with merging this backport into 19? https://github.com/llvm/llvm-project/pull/109093 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [mlir] [mlir][IR] Add `OpBuilder::setInsertionPointAfterValues` (PR #114940)
https://github.com/matthias-springer edited https://github.com/llvm/llvm-project/pull/114940 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [mlir] [mlir][IR] Add `OpBuilder::setInsertionPointAfterValues` (PR #114940)
https://github.com/matthias-springer edited https://github.com/llvm/llvm-project/pull/114940 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lld] [PAC][lld] Use braa instr in PAC PLT sequence with valid PAuth core info (PR #113945)
https://github.com/kovdan01 updated
https://github.com/llvm/llvm-project/pull/113945
>From 9751851e290bb7a1af6d327663c4f90ad3205df9 Mon Sep 17 00:00:00 2001
From: Daniil Kovalev
Date: Mon, 28 Oct 2024 21:23:54 +0300
Subject: [PATCH 1/2] [PAC][lld] Use braa instr in PAC PLT sequence with valid
PAuth core info
Assume PAC instructions being supported with PAuth core info different
from (0,0). Given that, `autia1716; br x17` can be replaced with
`braa x17, x16; nop`.
---
lld/ELF/Arch/AArch64.cpp | 19 +++
lld/test/ELF/aarch64-feature-pauth.s | 10 ++
2 files changed, 21 insertions(+), 8 deletions(-)
diff --git a/lld/ELF/Arch/AArch64.cpp b/lld/ELF/Arch/AArch64.cpp
index 025672d4a3665d..766c025ac724b0 100644
--- a/lld/ELF/Arch/AArch64.cpp
+++ b/lld/ELF/Arch/AArch64.cpp
@@ -999,7 +999,9 @@ class AArch64BtiPac final : public AArch64 {
private:
bool btiHeader; // bti instruction needed in PLT Header and Entry
- bool pacEntry; // autia1716 instruction needed in PLT Entry
+ bool pacEntry; // Authenticated branch needed in PLT Entry
+ bool pacUseHint =
+ true; // Use hint space instructions for authenticated branch in PLT
entry
};
} // namespace
@@ -1016,6 +1018,10 @@ AArch64BtiPac::AArch64BtiPac(Ctx &ctx) : AArch64(ctx) {
// from properties in the objects, so we use the command line flag.
pacEntry = ctx.arg.zPacPlt;
+ if (llvm::any_of(ctx.aarch64PauthAbiCoreInfo,
+ [](uint8_t c) { return c != 0; }))
+pacUseHint = false;
+
if (btiHeader || pacEntry) {
pltEntrySize = 24;
ipltEntrySize = 24;
@@ -1066,9 +1072,13 @@ void AArch64BtiPac::writePlt(uint8_t *buf, const Symbol
&sym,
0x11, 0x02, 0x40, 0xf9, // ldr x17, [x16, Offset(&(.got.plt[n]))]
0x10, 0x02, 0x00, 0x91 // add x16, x16, Offset(&(.got.plt[n]))
};
+ const uint8_t pacHintBr[] = {
+ 0x9f, 0x21, 0x03, 0xd5, // autia1716
+ 0x20, 0x02, 0x1f, 0xd6 // br x17
+ };
const uint8_t pacBr[] = {
- 0x9f, 0x21, 0x03, 0xd5, // autia1716
- 0x20, 0x02, 0x1f, 0xd6 // br x17
+ 0x30, 0x0a, 0x1f, 0xd7, // braa x17, x16
+ 0x1f, 0x20, 0x03, 0xd5 // nop
};
const uint8_t stdBr[] = {
0x20, 0x02, 0x1f, 0xd6, // br x17
@@ -1097,7 +1107,8 @@ void AArch64BtiPac::writePlt(uint8_t *buf, const Symbol
&sym,
relocateNoSym(buf + 8, R_AARCH64_ADD_ABS_LO12_NC, gotPltEntryAddr);
if (pacEntry)
-memcpy(buf + sizeof(addrInst), pacBr, sizeof(pacBr));
+memcpy(buf + sizeof(addrInst), (pacUseHint ? pacHintBr : pacBr),
+ sizeof(pacUseHint ? pacHintBr : pacBr));
else
memcpy(buf + sizeof(addrInst), stdBr, sizeof(stdBr));
if (!hasBti)
diff --git a/lld/test/ELF/aarch64-feature-pauth.s
b/lld/test/ELF/aarch64-feature-pauth.s
index c11073dba86f24..34f2f2698a26b8 100644
--- a/lld/test/ELF/aarch64-feature-pauth.s
+++ b/lld/test/ELF/aarch64-feature-pauth.s
@@ -56,8 +56,8 @@
# PACPLTTAG: 0x7003 (AARCH64_PAC_PLT)
-# RUN: llvm-objdump -d pacplt-nowarn | FileCheck --check-prefix PACPLT
-DA=10380 -DB=478 -DC=480 %s
-# RUN: llvm-objdump -d pacplt-warn | FileCheck --check-prefix PACPLT
-DA=10390 -DB=488 -DC=490 %s
+# RUN: llvm-objdump -d pacplt-nowarn | FileCheck
--check-prefixes=PACPLT,NOHINT -DA=10380 -DB=478 -DC=480 %s
+# RUN: llvm-objdump -d pacplt-warn | FileCheck --check-prefixes=PACPLT,HINT
-DA=10390 -DB=488 -DC=490 %s
# PACPLT: Disassembly of section .text:
# PACPLT: :
@@ -77,8 +77,10 @@
# PACPLT-NEXT: adrpx16, 0x3
# PACPLT-NEXT: ldr x17, [x16, #0x[[C]]]
# PACPLT-NEXT: add x16, x16, #0x[[C]]
-# PACPLT-NEXT: autia1716
-# PACPLT-NEXT: br x17
+# NOHINT-NEXT: braax17, x16
+# NOHINT-NEXT: nop
+# HINT-NEXT: autia1716
+# HINT-NEXT: br x17
# PACPLT-NEXT: nop
#--- abi-tag-short.s
>From 963794c8bd2e2ca061cbf14cd30f1e9a642d2be9 Mon Sep 17 00:00:00 2001
From: Daniil Kovalev
Date: Fri, 1 Nov 2024 14:20:44 +0300
Subject: [PATCH 2/2] Address review comments
---
lld/ELF/Arch/AArch64.cpp | 30 +++---
1 file changed, 19 insertions(+), 11 deletions(-)
diff --git a/lld/ELF/Arch/AArch64.cpp b/lld/ELF/Arch/AArch64.cpp
index 766c025ac724b0..5f480b4f790f64 100644
--- a/lld/ELF/Arch/AArch64.cpp
+++ b/lld/ELF/Arch/AArch64.cpp
@@ -999,9 +999,11 @@ class AArch64BtiPac final : public AArch64 {
private:
bool btiHeader; // bti instruction needed in PLT Header and Entry
- bool pacEntry; // Authenticated branch needed in PLT Entry
- bool pacUseHint =
- true; // Use hint space instructions for authenticated branch in PLT
entry
+ enum {
+PEK_NoAuth,
+PEK_AuthHint, // use autia1716 instr for authenticated branch in PLT entry
+PEK_Auth, // use braa instr for authenticated branch in PLT entry
+ } pacEntryKind;
};
} // namespace
@@ -1016,13 +1018,18 @@ AArch64BtiPac::AArch64BtiPac(Ctx &ctx) : AArch64(ctx) {
// relocations.
// The PAC PLT en
[llvm-branch-commits] [clang] [flang] [lld] [llvm] [Flang] LLVM_ENABLE_RUNTIMES=flang-rt (PR #110217)
jhuber6 wrote: > > Overall I think the patch is fine pending some naming nits, my one concern > > is the `-U__GLIBCXX` stuff, because undefining internal vars seems really > > sketchy. Do we use `-nostdlib++` to make sure we don't link the C++ library? > > There is a > [test](https://github.com/llvm/llvm-project/blob/main/flang/test/Runtime/no-cpp-dep.c) > that uses a C-compiler to link the runtime. This more portable than > `-nostdlib++`. > > [`_GLIBCXX_ASSERTIONS`](https://gcc.gnu.org/onlinedocs/libstdc++/manual/using_macros.html) > and > [`_LIBCPP_ENABLE_ASSERTIONS`](https://releases.llvm.org/17.0.1/projects/libcxx/docs/UsingLibcxx.html) > are used as described by their respective libraries and how it is done > before this PR. For libstdc++ defining We should do `check_cxx_compiler_flag(-nostdlib++ FLANG_RT_HAS_NOSTDLIBPP)`, it's a lot more obvious when your program doesn't link than when a test fails (but the test is still good). > `_GLIBCXX_NO_ASSERTIONS=1` might be better than undefining something. For > libc++ `_LIBCPP_ENABLE_ASSERTIONS` has been > [deprecated](https://reviews.llvm.org/D154997) in favor of > [`_LIBCPP_HARDENING_MODE`](https://libcxx.llvm.org/Hardening.html). Changing > that would be a different concern than addressed by this PR. Yeah it's just copying what's already there so it's not a blocker. I agree that defining them explicitly is way better, because then if someone redefines them you'll get a warning. https://github.com/llvm/llvm-project/pull/110217 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [flang] [lld] [llvm] [Flang] LLVM_ENABLE_RUNTIMES=flang-rt (PR #110217)
Meinersbur wrote: > Overall I think the patch is fine pending some naming nits, my one concern is > the `-U__GLIBCXX` stuff, because undefining internal vars seems really > sketchy. Do we use `-nostdlib++` to make sure we don't link the C++ library? There is a [test](https://github.com/llvm/llvm-project/blob/main/flang/test/Runtime/no-cpp-dep.c) that uses a C-compiler to link the runtime. This more portable than `-nostdlib++`. [`_GLIBCXX_ASSERTIONS`](https://gcc.gnu.org/onlinedocs/libstdc++/manual/using_macros.html) and [`_LIBCPP_ENABLE_ASSERTIONS`](https://releases.llvm.org/17.0.1/projects/libcxx/docs/UsingLibcxx.html) are used as described by their respective libraries and how it is done before this PR. For libstdc++ defining `_GLIBCXX_NO_ASSERTIONS=1` might be better than undefining something. For libc++ `_LIBCPP_ENABLE_ASSERTIONS` has beed [deprecated](https://reviews.llvm.org/D154997) in favor of [`_LIBCPP_HARDENING_MODE`](https://libcxx.llvm.org/Hardening.html). Changing that would be a different concern than addressed by this PR. https://github.com/llvm/llvm-project/pull/110217 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lld] [PAC][lld][AArch64][ELF] Support signed TLSDESC (PR #113817)
https://github.com/kovdan01 updated
https://github.com/llvm/llvm-project/pull/113817
>From 0a2b9e4ce6e6d991a0c7de28e8a6bcca63861bae Mon Sep 17 00:00:00 2001
From: Daniil Kovalev
Date: Fri, 25 Oct 2024 12:32:27 +0300
Subject: [PATCH 1/4] [PAC][lld][AArch64][ELF] Support signed TLSDESC
Support `R_AARCH64_AUTH_TLSDESC_ADR_PAGE21`, `R_AARCH64_AUTH_TLSDESC_LD64_LO12`
and `R_AARCH64_AUTH_TLSDESC_LD64_LO12` static TLSDESC relocations.
---
lld/ELF/Arch/AArch64.cpp | 8 ++
lld/ELF/InputSection.cpp | 2 +
lld/ELF/Relocations.cpp | 38 +++-
lld/ELF/Relocations.h| 4 +
lld/ELF/Symbols.h| 1 +
lld/ELF/SyntheticSections.cpp| 5 +
lld/test/ELF/aarch64-tlsdesc-pauth.s | 134 +++
7 files changed, 190 insertions(+), 2 deletions(-)
create mode 100644 lld/test/ELF/aarch64-tlsdesc-pauth.s
diff --git a/lld/ELF/Arch/AArch64.cpp b/lld/ELF/Arch/AArch64.cpp
index c1cce6d437a10b..cf9566f7986367 100644
--- a/lld/ELF/Arch/AArch64.cpp
+++ b/lld/ELF/Arch/AArch64.cpp
@@ -157,9 +157,14 @@ RelExpr AArch64::getRelExpr(RelType type, const Symbol &s,
return R_AARCH64_AUTH;
case R_AARCH64_TLSDESC_ADR_PAGE21:
return R_AARCH64_TLSDESC_PAGE;
+ case R_AARCH64_AUTH_TLSDESC_ADR_PAGE21:
+return R_AARCH64_AUTH_TLSDESC_PAGE;
case R_AARCH64_TLSDESC_LD64_LO12:
case R_AARCH64_TLSDESC_ADD_LO12:
return R_TLSDESC;
+ case R_AARCH64_AUTH_TLSDESC_LD64_LO12:
+ case R_AARCH64_AUTH_TLSDESC_ADD_LO12:
+return RelExpr::R_AARCH64_AUTH_TLSDESC;
case R_AARCH64_TLSDESC_CALL:
return R_TLSDESC_CALL;
case R_AARCH64_TLSLE_ADD_TPREL_HI12:
@@ -543,6 +548,7 @@ void AArch64::relocate(uint8_t *loc, const Relocation &rel,
case R_AARCH64_ADR_PREL_PG_HI21:
case R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
case R_AARCH64_TLSDESC_ADR_PAGE21:
+ case R_AARCH64_AUTH_TLSDESC_ADR_PAGE21:
checkInt(ctx, loc, val, 33, rel);
[[fallthrough]];
case R_AARCH64_ADR_PREL_PG_HI21_NC:
@@ -593,6 +599,7 @@ void AArch64::relocate(uint8_t *loc, const Relocation &rel,
case R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
case R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC:
case R_AARCH64_TLSDESC_LD64_LO12:
+ case R_AARCH64_AUTH_TLSDESC_LD64_LO12:
checkAlignment(ctx, loc, val, 8, rel);
write32Imm12(loc, getBits(val, 3, 11));
break;
@@ -667,6 +674,7 @@ void AArch64::relocate(uint8_t *loc, const Relocation &rel,
break;
case R_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
case R_AARCH64_TLSDESC_ADD_LO12:
+ case R_AARCH64_AUTH_TLSDESC_ADD_LO12:
write32Imm12(loc, val);
break;
case R_AARCH64_TLSDESC:
diff --git a/lld/ELF/InputSection.cpp b/lld/ELF/InputSection.cpp
index e7c02225ea29de..f6c14ba21eff60 100644
--- a/lld/ELF/InputSection.cpp
+++ b/lld/ELF/InputSection.cpp
@@ -942,12 +942,14 @@ uint64_t InputSectionBase::getRelocTargetVA(Ctx &ctx,
const Relocation &r,
case R_SIZE:
return r.sym->getSize() + a;
case R_TLSDESC:
+ case RelExpr::R_AARCH64_AUTH_TLSDESC:
return ctx.in.got->getTlsDescAddr(*r.sym) + a;
case R_TLSDESC_PC:
return ctx.in.got->getTlsDescAddr(*r.sym) + a - p;
case R_TLSDESC_GOTPLT:
return ctx.in.got->getTlsDescAddr(*r.sym) + a - ctx.in.gotPlt->getVA();
case R_AARCH64_TLSDESC_PAGE:
+ case R_AARCH64_AUTH_TLSDESC_PAGE:
return getAArch64Page(ctx.in.got->getTlsDescAddr(*r.sym) + a) -
getAArch64Page(p);
case R_LOONGARCH_TLSDESC_PAGE_PC:
diff --git a/lld/ELF/Relocations.cpp b/lld/ELF/Relocations.cpp
index b684337a7b3ed8..3378944b05835c 100644
--- a/lld/ELF/Relocations.cpp
+++ b/lld/ELF/Relocations.cpp
@@ -1351,6 +1351,36 @@ unsigned RelocationScanner::handleTlsRelocation(RelExpr
expr, RelType type,
return 1;
}
+ auto fatalBothAuthAndNonAuth = [&sym]() {
+fatal("both AUTH and non-AUTH TLSDESC entries for '" + sym.getName() +
+ "' requested, but only one type of TLSDESC entry per symbol is "
+ "supported");
+ };
+
+ // Do not optimize signed TLSDESC as described in pauthabielf64 to LE/IE.
+ //
https://github.com/ARM-software/abi-aa/blob/main/pauthabielf64/pauthabielf64.rst#general-restrictions
+ // > PAUTHELF64 only supports the descriptor based TLS (TLSDESC).
+ if (oneof(
+ expr)) {
+assert(ctx.arg.emachine == EM_AARCH64);
+if (!sym.hasFlag(NEEDS_TLSDESC))
+ sym.setFlags(NEEDS_TLSDESC | NEEDS_TLSDESC_AUTH);
+else if (!sym.hasFlag(NEEDS_TLSDESC_AUTH))
+ fatalBothAuthAndNonAuth();
+sec->addReloc({expr, type, offset, addend, &sym});
+return 1;
+ }
+
+ if (sym.hasFlag(NEEDS_TLSDESC_AUTH)) {
+assert(ctx.arg.emachine == EM_AARCH64);
+// TLSDESC_CALL hint relocation probably should not be emitted by compiler
+// with signed TLSDESC enabled since it does not give any value, but leave
a
+// check against that just in case someone uses it.
+if (expr != R_TLSDESC_CALL)
+ fatalBothAuthAndNonAuth();
+return 1;
+ }
+
bool isRISCV = ctx.arg.emachine
[llvm-branch-commits] [lld] [PAC][lld][AArch64][ELF] Support signed TLSDESC (PR #113817)
@@ -92,6 +92,10 @@ enum RelExpr {
R_AARCH64_PAGE_PC,
R_AARCH64_RELAX_TLS_GD_TO_IE_PAGE_PC,
R_AARCH64_TLSDESC_PAGE,
+ R_AARCH64_AUTH_TLSDESC_PAGE,
+ // TODO: maybe it's better to rename this expression
+ // to avoid name conflict with dynamic reloc
+ R_AARCH64_AUTH_TLSDESC,
kovdan01 wrote:
It's fine for me, but it would be glad to see @MaskRay 's opinion on rel exprs
naming conventions :)
https://github.com/llvm/llvm-project/pull/113817
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[llvm-branch-commits] [lld] [PAC][lld][AArch64][ELF] Support signed TLSDESC (PR #113817)
@@ -1352,6 +1352,36 @@ unsigned RelocationScanner::handleTlsRelocation(RelExpr
expr, RelType type,
return 1;
}
+ auto fatalBothAuthAndNonAuth = [&sym]() {
+fatal("both AUTH and non-AUTH TLSDESC entries for '" + sym.getName() +
kovdan01 wrote:
> We now use `Fatal(ctx) << ...`. Unlike fatal, `Fatal` executes `exit` but is
> not `noreturn`.
>
> `Fatal` should generally be avoided in favor of `Err`. You will need to make
> sure lld doesn't crash when it keeps execution, though the output is not
> required to be functional.
Thanks! Switched from `fatal` to `Err(ctx)`. After emitting an error, we return
the number of processed relocations (which is 1), and do not add any entries to
GOT synthetic section. So, I don't expect lld to crash, and it should be OK to
use `Err` instead of `Fatal` here. See 105213dde62927e619fb38149e8c613ab7462ed8
> Can you add getLocation to the error message so that a user can find the
> source of at least one of the relocations?
Added that, thanks! See 105213dde62927e619fb38149e8c613ab7462ed8
https://github.com/llvm/llvm-project/pull/113817
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[llvm-branch-commits] [lld] [PAC][lld][AArch64][ELF] Support signed TLSDESC (PR #113817)
@@ -0,0 +1,134 @@
+// REQUIRES: aarch64
+// RUN: rm -rf %t && split-file %s %t && cd %t
+
+//--- a.s
+
+.section .tbss,"awT",@nobits
+.global a
+a:
+.xword 0
+
+//--- ok.s
+
+// RUN: llvm-mc -filetype=obj -triple=aarch64-pc-linux -mattr=+pauth ok.s -o
ok.o
+// RUN: ld.lld -shared ok.o -o ok.so
+// RUN: llvm-objdump --no-print-imm-hex -d --no-show-raw-insn ok.so | \
+// RUN: FileCheck -DP=20 -DA=896 -DB=912 -DC=928 %s
+// RUN: llvm-readobj -r -x .got ok.so | FileCheck --check-prefix=REL \
+// RUN: -DP1=20 -DA1=380 -DB1=390 -DC1=3A0 -DP2=020 -DA2=380 -DB2=390
-DC2=3a0 %s
+
+// RUN: llvm-mc -filetype=obj -triple=aarch64-pc-linux -mattr=+pauth a.s -o
a.so.o
+// RUN: ld.lld -shared a.so.o -soname=so -o a.so
+// RUN: ld.lld ok.o a.so -o ok
+// RUN: llvm-objdump --no-print-imm-hex -d --no-show-raw-insn ok | \
+// RUN: FileCheck -DP=220 -DA=936 -DB=952 -DC=968 %s
+// RUN: llvm-readobj -r -x .got ok | FileCheck --check-prefix=REL \
+// RUN: -DP1=220 -DA1=3A8 -DB1=3B8 -DC1=3C8 -DP2=220 -DA2=3a8 -DB2=3b8
-DC2=3c8 %s
+
+.text
+adrpx0, :tlsdesc_auth:a
+ldr x16, [x0, :tlsdesc_auth_lo12:a]
+add x0, x0, :tlsdesc_auth_lo12:a
+.tlsdesccall a
+blraa x16, x0
+
+// CHECK: adrpx0, 0x[[P]]000
+// CHECK-NEXT: ldr x16, [x0, #[[A]]]
+// CHECK-NEXT: add x0, x0, #[[A]]
+// CHECK-NEXT: blraa x16, x0
+
+// Create relocation against local TLS symbols where linker should
+// create target specific dynamic TLSDESC relocation where addend is
+// the symbol VMA in tls block.
+
+adrpx0, :tlsdesc_auth:local1
+ldr x16, [x0, :tlsdesc_auth_lo12:local1]
+add x0, x0, :tlsdesc_auth_lo12:local1
+.tlsdesccall local1
+blraa x16, x0
+
+// CHECK: adrpx0, 0x[[P]]000
+// CHECK-NEXT: ldr x16, [x0, #[[B]]]
+// CHECK-NEXT: add x0, x0, #[[B]]
+// CHECK-NEXT: blraa x16, x0
+
+adrpx0, :tlsdesc_auth:local2
+ldr x16, [x0, :tlsdesc_auth_lo12:local2]
+add x0, x0, :tlsdesc_auth_lo12:local2
+.tlsdesccall local2
+blraa x16, x0
+
+// CHECK: adrpx0, 0x[[P]]000
+// CHECK-NEXT: ldr x16, [x0, #[[C]]]
+// CHECK-NEXT: add x0, x0, #[[C]]
+// CHECK-NEXT: blraa x16, x0
+
+.section .tbss,"awT",@nobits
+.type local1,@object
+.p2align 2
+local1:
+.word 0
+.size local1, 4
+
+.type local2,@object
+.p2align 3
+local2:
+.xword 0
+.size local2, 8
+
+
+// R_AARCH64_AUTH_TLSDESC - 0x0 -> start of tls block
+// R_AARCH64_AUTH_TLSDESC - 0x8 -> align (sizeof (local1), 8)
+
+// REL: Relocations [
+// REL-NEXT: Section (5) .rela.dyn {
+// REL-NEXT: 0x[[P1]][[B1]] R_AARCH64_AUTH_TLSDESC - 0x0
+// REL-NEXT: 0x[[P1]][[C1]] R_AARCH64_AUTH_TLSDESC - 0x8
+// REL-NEXT: 0x[[P1]][[A1]] R_AARCH64_AUTH_TLSDESC a 0x0
+// REL-NEXT: }
+// REL-NEXT: ]
+
+// REL: Hex dump of section '.got':
+// REL-NEXT: 0x00[[P2]][[A2]] 0080 00a0
+// REL-NEXT: 0x00[[P2]][[B2]] 0080 00a0
+// REL-NEXT: 0x00[[P2]][[C2]] 0080 00a0
+// ^^
+// 0b1000 bit 63 address
diversity = true, bits 61..60 key = IA
+// ^^
+// 0b1010 bit
63 address diversity = true, bits 61..60 key = DA
kovdan01 wrote:
Changed prefix to /// to indicate that it's a comment, see
4b78eae77f3be1c019a46d0f370e52ecf92d6954
https://github.com/llvm/llvm-project/pull/113817
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[llvm-branch-commits] [lld] [PAC][lld][AArch64][ELF] Support signed TLSDESC (PR #113817)
@@ -0,0 +1,134 @@ +// REQUIRES: aarch64 +// RUN: rm -rf %t && split-file %s %t && cd %t + +//--- a.s + +.section .tbss,"awT",@nobits +.global a +a: +.xword 0 + +//--- ok.s + +// RUN: llvm-mc -filetype=obj -triple=aarch64-pc-linux -mattr=+pauth ok.s -o ok.o +// RUN: ld.lld -shared ok.o -o ok.so +// RUN: llvm-objdump --no-print-imm-hex -d --no-show-raw-insn ok.so | \ +// RUN: FileCheck -DP=20 -DA=896 -DB=912 -DC=928 %s +// RUN: llvm-readobj -r -x .got ok.so | FileCheck --check-prefix=REL \ +// RUN: -DP1=20 -DA1=380 -DB1=390 -DC1=3A0 -DP2=020 -DA2=380 -DB2=390 -DC2=3a0 %s + +// RUN: llvm-mc -filetype=obj -triple=aarch64-pc-linux -mattr=+pauth a.s -o a.so.o +// RUN: ld.lld -shared a.so.o -soname=so -o a.so +// RUN: ld.lld ok.o a.so -o ok +// RUN: llvm-objdump --no-print-imm-hex -d --no-show-raw-insn ok | \ +// RUN: FileCheck -DP=220 -DA=936 -DB=952 -DC=968 %s +// RUN: llvm-readobj -r -x .got ok | FileCheck --check-prefix=REL \ +// RUN: -DP1=220 -DA1=3A8 -DB1=3B8 -DC1=3C8 -DP2=220 -DA2=3a8 -DB2=3b8 -DC2=3c8 %s + +.text +adrpx0, :tlsdesc_auth:a +ldr x16, [x0, :tlsdesc_auth_lo12:a] +add x0, x0, :tlsdesc_auth_lo12:a +.tlsdesccall a +blraa x16, x0 + +// CHECK: adrpx0, 0x[[P]]000 +// CHECK-NEXT: ldr x16, [x0, #[[A]]] +// CHECK-NEXT: add x0, x0, #[[A]] +// CHECK-NEXT: blraa x16, x0 + +// Create relocation against local TLS symbols where linker should kovdan01 wrote: Thanks for bringing attention to this, forgot to follow the convention here. Fixed in 4b78eae77f3be1c019a46d0f370e52ecf92d6954 https://github.com/llvm/llvm-project/pull/113817 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lld] [PAC][lld][AArch64][ELF] Support signed TLSDESC (PR #113817)
https://github.com/kovdan01 updated
https://github.com/llvm/llvm-project/pull/113817
>From 9476c4028766e076587889100c34bf5002f85c99 Mon Sep 17 00:00:00 2001
From: Daniil Kovalev
Date: Fri, 25 Oct 2024 12:32:27 +0300
Subject: [PATCH 1/5] [PAC][lld][AArch64][ELF] Support signed TLSDESC
Support `R_AARCH64_AUTH_TLSDESC_ADR_PAGE21`, `R_AARCH64_AUTH_TLSDESC_LD64_LO12`
and `R_AARCH64_AUTH_TLSDESC_LD64_LO12` static TLSDESC relocations.
---
lld/ELF/Arch/AArch64.cpp | 8 ++
lld/ELF/InputSection.cpp | 2 +
lld/ELF/Relocations.cpp | 38 +++-
lld/ELF/Relocations.h| 4 +
lld/ELF/Symbols.h| 1 +
lld/ELF/SyntheticSections.cpp| 5 +
lld/test/ELF/aarch64-tlsdesc-pauth.s | 134 +++
7 files changed, 190 insertions(+), 2 deletions(-)
create mode 100644 lld/test/ELF/aarch64-tlsdesc-pauth.s
diff --git a/lld/ELF/Arch/AArch64.cpp b/lld/ELF/Arch/AArch64.cpp
index c1cce6d437a10b..cf9566f7986367 100644
--- a/lld/ELF/Arch/AArch64.cpp
+++ b/lld/ELF/Arch/AArch64.cpp
@@ -157,9 +157,14 @@ RelExpr AArch64::getRelExpr(RelType type, const Symbol &s,
return R_AARCH64_AUTH;
case R_AARCH64_TLSDESC_ADR_PAGE21:
return R_AARCH64_TLSDESC_PAGE;
+ case R_AARCH64_AUTH_TLSDESC_ADR_PAGE21:
+return R_AARCH64_AUTH_TLSDESC_PAGE;
case R_AARCH64_TLSDESC_LD64_LO12:
case R_AARCH64_TLSDESC_ADD_LO12:
return R_TLSDESC;
+ case R_AARCH64_AUTH_TLSDESC_LD64_LO12:
+ case R_AARCH64_AUTH_TLSDESC_ADD_LO12:
+return RelExpr::R_AARCH64_AUTH_TLSDESC;
case R_AARCH64_TLSDESC_CALL:
return R_TLSDESC_CALL;
case R_AARCH64_TLSLE_ADD_TPREL_HI12:
@@ -543,6 +548,7 @@ void AArch64::relocate(uint8_t *loc, const Relocation &rel,
case R_AARCH64_ADR_PREL_PG_HI21:
case R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
case R_AARCH64_TLSDESC_ADR_PAGE21:
+ case R_AARCH64_AUTH_TLSDESC_ADR_PAGE21:
checkInt(ctx, loc, val, 33, rel);
[[fallthrough]];
case R_AARCH64_ADR_PREL_PG_HI21_NC:
@@ -593,6 +599,7 @@ void AArch64::relocate(uint8_t *loc, const Relocation &rel,
case R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
case R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC:
case R_AARCH64_TLSDESC_LD64_LO12:
+ case R_AARCH64_AUTH_TLSDESC_LD64_LO12:
checkAlignment(ctx, loc, val, 8, rel);
write32Imm12(loc, getBits(val, 3, 11));
break;
@@ -667,6 +674,7 @@ void AArch64::relocate(uint8_t *loc, const Relocation &rel,
break;
case R_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
case R_AARCH64_TLSDESC_ADD_LO12:
+ case R_AARCH64_AUTH_TLSDESC_ADD_LO12:
write32Imm12(loc, val);
break;
case R_AARCH64_TLSDESC:
diff --git a/lld/ELF/InputSection.cpp b/lld/ELF/InputSection.cpp
index e7c02225ea29de..f6c14ba21eff60 100644
--- a/lld/ELF/InputSection.cpp
+++ b/lld/ELF/InputSection.cpp
@@ -942,12 +942,14 @@ uint64_t InputSectionBase::getRelocTargetVA(Ctx &ctx,
const Relocation &r,
case R_SIZE:
return r.sym->getSize() + a;
case R_TLSDESC:
+ case RelExpr::R_AARCH64_AUTH_TLSDESC:
return ctx.in.got->getTlsDescAddr(*r.sym) + a;
case R_TLSDESC_PC:
return ctx.in.got->getTlsDescAddr(*r.sym) + a - p;
case R_TLSDESC_GOTPLT:
return ctx.in.got->getTlsDescAddr(*r.sym) + a - ctx.in.gotPlt->getVA();
case R_AARCH64_TLSDESC_PAGE:
+ case R_AARCH64_AUTH_TLSDESC_PAGE:
return getAArch64Page(ctx.in.got->getTlsDescAddr(*r.sym) + a) -
getAArch64Page(p);
case R_LOONGARCH_TLSDESC_PAGE_PC:
diff --git a/lld/ELF/Relocations.cpp b/lld/ELF/Relocations.cpp
index 6d5da5b50fd37c..43c896d7c3e902 100644
--- a/lld/ELF/Relocations.cpp
+++ b/lld/ELF/Relocations.cpp
@@ -1352,6 +1352,36 @@ unsigned RelocationScanner::handleTlsRelocation(RelExpr
expr, RelType type,
return 1;
}
+ auto fatalBothAuthAndNonAuth = [&sym]() {
+fatal("both AUTH and non-AUTH TLSDESC entries for '" + sym.getName() +
+ "' requested, but only one type of TLSDESC entry per symbol is "
+ "supported");
+ };
+
+ // Do not optimize signed TLSDESC as described in pauthabielf64 to LE/IE.
+ //
https://github.com/ARM-software/abi-aa/blob/main/pauthabielf64/pauthabielf64.rst#general-restrictions
+ // > PAUTHELF64 only supports the descriptor based TLS (TLSDESC).
+ if (oneof(
+ expr)) {
+assert(ctx.arg.emachine == EM_AARCH64);
+if (!sym.hasFlag(NEEDS_TLSDESC))
+ sym.setFlags(NEEDS_TLSDESC | NEEDS_TLSDESC_AUTH);
+else if (!sym.hasFlag(NEEDS_TLSDESC_AUTH))
+ fatalBothAuthAndNonAuth();
+sec->addReloc({expr, type, offset, addend, &sym});
+return 1;
+ }
+
+ if (sym.hasFlag(NEEDS_TLSDESC_AUTH)) {
+assert(ctx.arg.emachine == EM_AARCH64);
+// TLSDESC_CALL hint relocation probably should not be emitted by compiler
+// with signed TLSDESC enabled since it does not give any value, but leave
a
+// check against that just in case someone uses it.
+if (expr != R_TLSDESC_CALL)
+ fatalBothAuthAndNonAuth();
+return 1;
+ }
+
bool isRISCV = ctx.arg.emachine
[llvm-branch-commits] [lld] [PAC][lld][AArch64][ELF] Support signed GOT with tiny code model (PR #113816)
https://github.com/kovdan01 updated
https://github.com/llvm/llvm-project/pull/113816
>From 7eddd301c02588dd56fea43996e089ab181ae0c5 Mon Sep 17 00:00:00 2001
From: Daniil Kovalev
Date: Fri, 25 Oct 2024 21:28:18 +0300
Subject: [PATCH 1/2] [PAC][lld][AArch64][ELF] Support signed GOT with tiny
code model
Support `R_AARCH64_AUTH_GOT_ADR_PREL_LO21` and `R_AARCH64_AUTH_GOT_LD_PREL19`
GOT-generating relocations.
---
lld/ELF/Arch/AArch64.cpp | 5 ++
lld/ELF/InputSection.cpp | 1 +
lld/ELF/Relocations.cpp | 17 ++---
lld/ELF/Relocations.h| 1 +
lld/test/ELF/aarch64-got-relocations-pauth.s | 73
5 files changed, 89 insertions(+), 8 deletions(-)
diff --git a/lld/ELF/Arch/AArch64.cpp b/lld/ELF/Arch/AArch64.cpp
index c1cce6d437a10b..84ca814e2e2efb 100644
--- a/lld/ELF/Arch/AArch64.cpp
+++ b/lld/ELF/Arch/AArch64.cpp
@@ -205,6 +205,9 @@ RelExpr AArch64::getRelExpr(RelType type, const Symbol &s,
case R_AARCH64_AUTH_LD64_GOT_LO12_NC:
case R_AARCH64_AUTH_GOT_ADD_LO12_NC:
return R_AARCH64_AUTH_GOT;
+ case R_AARCH64_AUTH_GOT_LD_PREL19:
+ case R_AARCH64_AUTH_GOT_ADR_PREL_LO21:
+return R_AARCH64_AUTH_GOT_PC;
case R_AARCH64_LD64_GOTPAGE_LO15:
return R_AARCH64_GOT_PAGE;
case R_AARCH64_ADR_GOT_PAGE:
@@ -549,6 +552,7 @@ void AArch64::relocate(uint8_t *loc, const Relocation &rel,
write32AArch64Addr(loc, val >> 12);
break;
case R_AARCH64_ADR_PREL_LO21:
+ case R_AARCH64_AUTH_GOT_ADR_PREL_LO21:
checkInt(ctx, loc, val, 21, rel);
write32AArch64Addr(loc, val);
break;
@@ -569,6 +573,7 @@ void AArch64::relocate(uint8_t *loc, const Relocation &rel,
case R_AARCH64_CONDBR19:
case R_AARCH64_LD_PREL_LO19:
case R_AARCH64_GOT_LD_PREL19:
+ case R_AARCH64_AUTH_GOT_LD_PREL19:
checkAlignment(ctx, loc, val, 4, rel);
checkInt(ctx, loc, val, 21, rel);
writeMaskedBits32le(loc, (val & 0x1C) << 3, 0x1C << 3);
diff --git a/lld/ELF/InputSection.cpp b/lld/ELF/InputSection.cpp
index e7c02225ea29de..79d68878a17949 100644
--- a/lld/ELF/InputSection.cpp
+++ b/lld/ELF/InputSection.cpp
@@ -795,6 +795,7 @@ uint64_t InputSectionBase::getRelocTargetVA(Ctx &ctx, const
Relocation &r,
case R_AARCH64_GOT_PAGE:
return r.sym->getGotVA(ctx) + a - getAArch64Page(ctx.in.got->getVA());
case R_GOT_PC:
+ case R_AARCH64_AUTH_GOT_PC:
case R_RELAX_TLS_GD_TO_IE:
return r.sym->getGotVA(ctx) + a - p;
case R_GOTPLT_GOTREL:
diff --git a/lld/ELF/Relocations.cpp b/lld/ELF/Relocations.cpp
index 6d5da5b50fd37c..5d29c601036136 100644
--- a/lld/ELF/Relocations.cpp
+++ b/lld/ELF/Relocations.cpp
@@ -210,11 +210,11 @@ static bool needsPlt(RelExpr expr) {
}
bool lld::elf::needsGot(RelExpr expr) {
- return oneof(
- expr);
+ return oneof(expr);
}
// True if this expression is of the form Sym - X, where X is a position in the
@@ -1010,8 +1010,8 @@ bool RelocationScanner::isStaticLinkTimeConstant(RelExpr
e, RelType type,
R_GOTONLY_PC, R_GOTPLTONLY_PC, R_PLT_PC, R_PLT_GOTREL,
R_PLT_GOTPLT,
R_GOTPLT_GOTREL, R_GOTPLT_PC, R_PPC32_PLTREL, R_PPC64_CALL_PLT,
R_PPC64_RELAX_TOC, R_RISCV_ADD, R_AARCH64_GOT_PAGE,
-R_AARCH64_AUTH_GOT, R_LOONGARCH_PLT_PAGE_PC, R_LOONGARCH_GOT,
-R_LOONGARCH_GOT_PAGE_PC>(e))
+R_AARCH64_AUTH_GOT, R_AARCH64_AUTH_GOT_PC, R_LOONGARCH_PLT_PAGE_PC,
+R_LOONGARCH_GOT, R_LOONGARCH_GOT_PAGE_PC>(e))
return true;
// These never do, except if the entire file is position dependent or if
@@ -1126,7 +1126,8 @@ void RelocationScanner::processAux(RelExpr expr, RelType
type, uint64_t offset,
// Many LoongArch TLS relocs reuse the R_LOONGARCH_GOT type, in which
// case the NEEDS_GOT flag shouldn't get set.
bool needsGotAuth =
- (expr == R_AARCH64_AUTH_GOT || expr == R_AARCH64_AUTH_GOT_PAGE_PC);
+ (expr == R_AARCH64_AUTH_GOT || expr == R_AARCH64_AUTH_GOT_PC ||
+ expr == R_AARCH64_AUTH_GOT_PAGE_PC);
uint16_t flags = sym.flags.load(std::memory_order_relaxed);
if (!(flags & NEEDS_GOT)) {
sym.setFlags(needsGotAuth ? (NEEDS_GOT | NEEDS_GOT_AUTH) : NEEDS_GOT);
diff --git a/lld/ELF/Relocations.h b/lld/ELF/Relocations.h
index 20d88de402ac18..38d55d46116569 100644
--- a/lld/ELF/Relocations.h
+++ b/lld/ELF/Relocations.h
@@ -89,6 +89,7 @@ enum RelExpr {
R_AARCH64_AUTH_GOT_PAGE_PC,
R_AARCH64_GOT_PAGE,
R_AARCH64_AUTH_GOT,
+ R_AARCH64_AUTH_GOT_PC,
R_AARCH64_PAGE_PC,
R_AARCH64_RELAX_TLS_GD_TO_IE_PAGE_PC,
R_AARCH64_TLSDESC_PAGE,
diff --git a/lld/test/ELF/aarch64-got-relocations-pauth.s
b/lld/test/ELF/aarch64-got-relocations-pauth.s
index 5760579bcb02e2..85b14fc1bee361 100644
--- a/lld/test/ELF/aarch64-got-relocations-pauth.s
+++ b/lld/test/ELF/aarch64-got-relocations-pauth.s
@@ -78,6 +78,79 @@ _start:
adrp x1, :got_auth:zed
add x1, x1, :got_auth_lo12:zed
+#--- ok-tiny.s
+
+# RUN: ll
[llvm-branch-commits] [mlir] [mlir][IR][NFC] `PostDominanceInfo`: Mark all functions as `const` (PR #115597)
https://github.com/joker-eph approved this pull request. https://github.com/llvm/llvm-project/pull/115597 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lld] [PAC][lld] Use braa instr in PAC PLT sequence with valid PAuth core info (PR #113945)
https://github.com/kovdan01 updated
https://github.com/llvm/llvm-project/pull/113945
>From d195b1eb6c41d9cda912ed50b79bc05a7d700e5b Mon Sep 17 00:00:00 2001
From: Daniil Kovalev
Date: Mon, 28 Oct 2024 21:23:54 +0300
Subject: [PATCH 1/2] [PAC][lld] Use braa instr in PAC PLT sequence with valid
PAuth core info
Assume PAC instructions being supported with PAuth core info different
from (0,0). Given that, `autia1716; br x17` can be replaced with
`braa x17, x16; nop`.
---
lld/ELF/Arch/AArch64.cpp | 19 +++
lld/test/ELF/aarch64-feature-pauth.s | 10 ++
2 files changed, 21 insertions(+), 8 deletions(-)
diff --git a/lld/ELF/Arch/AArch64.cpp b/lld/ELF/Arch/AArch64.cpp
index 025672d4a3665d..766c025ac724b0 100644
--- a/lld/ELF/Arch/AArch64.cpp
+++ b/lld/ELF/Arch/AArch64.cpp
@@ -999,7 +999,9 @@ class AArch64BtiPac final : public AArch64 {
private:
bool btiHeader; // bti instruction needed in PLT Header and Entry
- bool pacEntry; // autia1716 instruction needed in PLT Entry
+ bool pacEntry; // Authenticated branch needed in PLT Entry
+ bool pacUseHint =
+ true; // Use hint space instructions for authenticated branch in PLT
entry
};
} // namespace
@@ -1016,6 +1018,10 @@ AArch64BtiPac::AArch64BtiPac(Ctx &ctx) : AArch64(ctx) {
// from properties in the objects, so we use the command line flag.
pacEntry = ctx.arg.zPacPlt;
+ if (llvm::any_of(ctx.aarch64PauthAbiCoreInfo,
+ [](uint8_t c) { return c != 0; }))
+pacUseHint = false;
+
if (btiHeader || pacEntry) {
pltEntrySize = 24;
ipltEntrySize = 24;
@@ -1066,9 +1072,13 @@ void AArch64BtiPac::writePlt(uint8_t *buf, const Symbol
&sym,
0x11, 0x02, 0x40, 0xf9, // ldr x17, [x16, Offset(&(.got.plt[n]))]
0x10, 0x02, 0x00, 0x91 // add x16, x16, Offset(&(.got.plt[n]))
};
+ const uint8_t pacHintBr[] = {
+ 0x9f, 0x21, 0x03, 0xd5, // autia1716
+ 0x20, 0x02, 0x1f, 0xd6 // br x17
+ };
const uint8_t pacBr[] = {
- 0x9f, 0x21, 0x03, 0xd5, // autia1716
- 0x20, 0x02, 0x1f, 0xd6 // br x17
+ 0x30, 0x0a, 0x1f, 0xd7, // braa x17, x16
+ 0x1f, 0x20, 0x03, 0xd5 // nop
};
const uint8_t stdBr[] = {
0x20, 0x02, 0x1f, 0xd6, // br x17
@@ -1097,7 +1107,8 @@ void AArch64BtiPac::writePlt(uint8_t *buf, const Symbol
&sym,
relocateNoSym(buf + 8, R_AARCH64_ADD_ABS_LO12_NC, gotPltEntryAddr);
if (pacEntry)
-memcpy(buf + sizeof(addrInst), pacBr, sizeof(pacBr));
+memcpy(buf + sizeof(addrInst), (pacUseHint ? pacHintBr : pacBr),
+ sizeof(pacUseHint ? pacHintBr : pacBr));
else
memcpy(buf + sizeof(addrInst), stdBr, sizeof(stdBr));
if (!hasBti)
diff --git a/lld/test/ELF/aarch64-feature-pauth.s
b/lld/test/ELF/aarch64-feature-pauth.s
index 3150c130d460f5..c50f38f4a7c975 100644
--- a/lld/test/ELF/aarch64-feature-pauth.s
+++ b/lld/test/ELF/aarch64-feature-pauth.s
@@ -56,8 +56,8 @@
# PACPLTTAG: 0x7003 (AARCH64_PAC_PLT)
-# RUN: llvm-objdump -d pacplt-nowarn | FileCheck --check-prefix PACPLT
-DA=10380 -DB=478 -DC=480 %s
-# RUN: llvm-objdump -d pacplt-warn | FileCheck --check-prefix PACPLT
-DA=10390 -DB=488 -DC=490 %s
+# RUN: llvm-objdump -d pacplt-nowarn | FileCheck
--check-prefixes=PACPLT,NOHINT -DA=10380 -DB=478 -DC=480 %s
+# RUN: llvm-objdump -d pacplt-warn | FileCheck --check-prefixes=PACPLT,HINT
-DA=10390 -DB=488 -DC=490 %s
# PACPLT: Disassembly of section .text:
# PACPLT: :
@@ -77,8 +77,10 @@
# PACPLT-NEXT: adrpx16, 0x3
# PACPLT-NEXT: ldr x17, [x16, #0x[[C]]]
# PACPLT-NEXT: add x16, x16, #0x[[C]]
-# PACPLT-NEXT: autia1716
-# PACPLT-NEXT: br x17
+# NOHINT-NEXT: braax17, x16
+# NOHINT-NEXT: nop
+# HINT-NEXT: autia1716
+# HINT-NEXT: br x17
# PACPLT-NEXT: nop
#--- abi-tag-short.s
>From 6b3574553a750af8301d0574f7641838911662d5 Mon Sep 17 00:00:00 2001
From: Daniil Kovalev
Date: Fri, 1 Nov 2024 14:20:44 +0300
Subject: [PATCH 2/2] Address review comments
---
lld/ELF/Arch/AArch64.cpp | 30 +++---
1 file changed, 19 insertions(+), 11 deletions(-)
diff --git a/lld/ELF/Arch/AArch64.cpp b/lld/ELF/Arch/AArch64.cpp
index 766c025ac724b0..5f480b4f790f64 100644
--- a/lld/ELF/Arch/AArch64.cpp
+++ b/lld/ELF/Arch/AArch64.cpp
@@ -999,9 +999,11 @@ class AArch64BtiPac final : public AArch64 {
private:
bool btiHeader; // bti instruction needed in PLT Header and Entry
- bool pacEntry; // Authenticated branch needed in PLT Entry
- bool pacUseHint =
- true; // Use hint space instructions for authenticated branch in PLT
entry
+ enum {
+PEK_NoAuth,
+PEK_AuthHint, // use autia1716 instr for authenticated branch in PLT entry
+PEK_Auth, // use braa instr for authenticated branch in PLT entry
+ } pacEntryKind;
};
} // namespace
@@ -1016,13 +1018,18 @@ AArch64BtiPac::AArch64BtiPac(Ctx &ctx) : AArch64(ctx) {
// relocations.
// The PAC PLT en
