date:20241011

[llvm-branch-commits] [BOLT][NFC] Speedup BAT::writeMaps (PR #112061)

2024-10-11 Thread Maksim Panchenko via llvm-branch-commits


https://github.com/maksfb approved this pull request.

LGTM. I'd mark this PR as "NFCI".

https://github.com/llvm/llvm-project/pull/112061
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[llvm-branch-commits] [NFC][sanitizer] Add Debug utility to print thread history (PR #111948)

2024-10-11 Thread via llvm-branch-commits


Enna1 wrote:

Will uses of 
[`__asan::DescribeThread`](https://github.com/llvm/llvm-project/blob/main/compiler-rt/lib/asan/asan_descriptions.cpp#L39)
 be replaced with `__sanitizer::PrintThreadHistory` introduced in this patch?

https://github.com/llvm/llvm-project/pull/111948
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[llvm-branch-commits] [clang] release/19.x: [clang-format] Handle template closer followed by braces (#110971) (PR #111958)

2024-10-11 Thread via llvm-branch-commits


https://github.com/llvmbot milestoned 
https://github.com/llvm/llvm-project/pull/111958
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[llvm-branch-commits] [clang] release/19.x: [clang-format] Handle template closer followed by braces (#110971) (PR #111958)

2024-10-11 Thread via llvm-branch-commits


https://github.com/llvmbot created 
https://github.com/llvm/llvm-project/pull/111958

Backport e5b05a51b8151cc7788bbdea4d491e5ccfceedea

Requested by: @owenca

>From c1946eec57dcc901211a7464e7893098cb252d50 Mon Sep 17 00:00:00 2001
From: Owen Pan 
Date: Fri, 4 Oct 2024 18:18:03 -0700
Subject: [PATCH] [clang-format] Handle template closer followed by braces
 (#110971)

Fixes #110968.

(cherry picked from commit e5b05a51b8151cc7788bbdea4d491e5ccfceedea)
---
 clang/lib/Format/UnwrappedLineParser.cpp  | 5 +
 clang/unittests/Format/TokenAnnotatorTest.cpp | 5 +
 2 files changed, 10 insertions(+)

diff --git a/clang/lib/Format/UnwrappedLineParser.cpp 
b/clang/lib/Format/UnwrappedLineParser.cpp
index f7b3561f6e0335..631c7c62baac18 100644
--- a/clang/lib/Format/UnwrappedLineParser.cpp
+++ b/clang/lib/Format/UnwrappedLineParser.cpp
@@ -2131,6 +2131,11 @@ void UnwrappedLineParser::parseStructuralElement(
 return;
   }
   break;
+case tok::greater:
+  nextToken();
+  if (FormatTok->is(tok::l_brace))
+FormatTok->Previous->setFinalizedType(TT_TemplateCloser);
+  break;
 default:
   nextToken();
   break;
diff --git a/clang/unittests/Format/TokenAnnotatorTest.cpp 
b/clang/unittests/Format/TokenAnnotatorTest.cpp
index 2f09b380a87134..6f3ef3b646c619 100644
--- a/clang/unittests/Format/TokenAnnotatorTest.cpp
+++ b/clang/unittests/Format/TokenAnnotatorTest.cpp
@@ -3399,6 +3399,11 @@ TEST_F(TokenAnnotatorTest, TemplateInstantiation) {
   ASSERT_EQ(Tokens.size(), 11u) << Tokens;
   EXPECT_TOKEN(Tokens[2], tok::less, TT_TemplateOpener);
   EXPECT_TOKEN(Tokens[6], tok::greater, TT_TemplateCloser);
+
+  Tokens = annotate("return std::conditional_t{};");
+  ASSERT_EQ(Tokens.size(), 21u) << Tokens;
+  EXPECT_TOKEN(Tokens[4], tok::less, TT_TemplateOpener);
+  EXPECT_TOKEN(Tokens[16], tok::greater, TT_TemplateCloser);
 }
 
 } // namespace

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[llvm-branch-commits] [clang] release/19.x: [clang-format] Handle template closer followed by braces (#110971) (PR #111958)

2024-10-11 Thread via llvm-branch-commits


llvmbot wrote:

@mydeveloperday What do you think about merging this PR to the release branch?

https://github.com/llvm/llvm-project/pull/111958
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[llvm-branch-commits] [clang] release/19.x: [clang-format] Handle template closer followed by braces (#110971) (PR #111958)

2024-10-11 Thread via llvm-branch-commits


llvmbot wrote:




@llvm/pr-subscribers-clang-format

Author: None (llvmbot)


Changes

Backport e5b05a51b8151cc7788bbdea4d491e5ccfceedea

Requested by: @owenca

---
Full diff: https://github.com/llvm/llvm-project/pull/111958.diff


2 Files Affected:

- (modified) clang/lib/Format/UnwrappedLineParser.cpp (+5) 
- (modified) clang/unittests/Format/TokenAnnotatorTest.cpp (+5) 


``diff
diff --git a/clang/lib/Format/UnwrappedLineParser.cpp 
b/clang/lib/Format/UnwrappedLineParser.cpp
index f7b3561f6e0335..631c7c62baac18 100644
--- a/clang/lib/Format/UnwrappedLineParser.cpp
+++ b/clang/lib/Format/UnwrappedLineParser.cpp
@@ -2131,6 +2131,11 @@ void UnwrappedLineParser::parseStructuralElement(
 return;
   }
   break;
+case tok::greater:
+  nextToken();
+  if (FormatTok->is(tok::l_brace))
+FormatTok->Previous->setFinalizedType(TT_TemplateCloser);
+  break;
 default:
   nextToken();
   break;
diff --git a/clang/unittests/Format/TokenAnnotatorTest.cpp 
b/clang/unittests/Format/TokenAnnotatorTest.cpp
index 2f09b380a87134..6f3ef3b646c619 100644
--- a/clang/unittests/Format/TokenAnnotatorTest.cpp
+++ b/clang/unittests/Format/TokenAnnotatorTest.cpp
@@ -3399,6 +3399,11 @@ TEST_F(TokenAnnotatorTest, TemplateInstantiation) {
   ASSERT_EQ(Tokens.size(), 11u) << Tokens;
   EXPECT_TOKEN(Tokens[2], tok::less, TT_TemplateOpener);
   EXPECT_TOKEN(Tokens[6], tok::greater, TT_TemplateCloser);
+
+  Tokens = annotate("return std::conditional_t{};");
+  ASSERT_EQ(Tokens.size(), 21u) << Tokens;
+  EXPECT_TOKEN(Tokens[4], tok::less, TT_TemplateOpener);
+  EXPECT_TOKEN(Tokens[16], tok::greater, TT_TemplateCloser);
 }
 
 } // namespace

``




https://github.com/llvm/llvm-project/pull/111958
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[llvm-branch-commits] [libcxx] [release/19.x][libc++] Adjust the version of __cpp_lib_ranges in C++20 mode (PR #109324)

2024-10-11 Thread A. Jiang via llvm-branch-commits


https://github.com/frederick-vs-ja updated 
https://github.com/llvm/llvm-project/pull/109324

>From eb53b498045eca14b64897a329d24b182689fc14 Mon Sep 17 00:00:00 2001
From: Louis Dionne 
Date: Thu, 19 Sep 2024 15:40:47 -0400
Subject: [PATCH] [libc++] Adjust the version of __cpp_lib_ranges in C++20 mode

This is a (very partial) cherry-pick of #101715 to fix this oversight
in the LLVM 19 release.
---
 libcxx/docs/FeatureTestMacroTable.rst   | 2 +-
 libcxx/include/version  | 4 ++--
 .../algorithm.version.compile.pass.cpp  | 6 +++---
 .../functional.version.compile.pass.cpp | 6 +++---
 .../iterator.version.compile.pass.cpp   | 6 +++---
 .../support.limits.general/memory.version.compile.pass.cpp  | 6 +++---
 .../support.limits.general/ranges.version.compile.pass.cpp  | 6 +++---
 .../support.limits.general/version.version.compile.pass.cpp | 6 +++---
 libcxx/utils/generate_feature_test_macro_components.py  | 2 +-
 9 files changed, 22 insertions(+), 22 deletions(-)

diff --git a/libcxx/docs/FeatureTestMacroTable.rst 
b/libcxx/docs/FeatureTestMacroTable.rst
index 7f95f0f4e1c17c..cbed6693f0a5d7 100644
--- a/libcxx/docs/FeatureTestMacroTable.rst
+++ b/libcxx/docs/FeatureTestMacroTable.rst
@@ -266,7 +266,7 @@ Status
 -- 
-
 ``__cpp_lib_polymorphic_allocator````201902L``
 -- 
-
-``__cpp_lib_ranges``   ``202207L``
+``__cpp_lib_ranges``   ``202110L``
 -- 
-
 ``__cpp_lib_remove_cvref`` ``201711L``
 -- 
-
diff --git a/libcxx/include/version b/libcxx/include/version
index c8a31f77a915e1..76ab6bedafdd0b 100644
--- a/libcxx/include/version
+++ b/libcxx/include/version
@@ -184,7 +184,7 @@ __cpp_lib_print 
202207L  
 __cpp_lib_ranges202211L  
 
  

-202207L // C++20
+202110L // C++20
 __cpp_lib_ranges_as_const   202207L 
 __cpp_lib_ranges_as_rvalue  202207L 
 __cpp_lib_ranges_chunk  202202L 
@@ -429,7 +429,7 @@ __cpp_lib_void_t
201411L 
 # if _LIBCPP_AVAILABILITY_HAS_PMR
 #   define __cpp_lib_polymorphic_allocator  201902L
 # endif
-# define __cpp_lib_ranges   202207L
+# define __cpp_lib_ranges   202110L
 # define __cpp_lib_remove_cvref 201711L
 # if !defined(_LIBCPP_HAS_NO_THREADS) && _LIBCPP_AVAILABILITY_HAS_SYNC
 #   define __cpp_lib_semaphore  201907L
diff --git 
a/libcxx/test/std/language.support/support.limits/support.limits.general/algorithm.version.compile.pass.cpp
 
b/libcxx/test/std/language.support/support.limits/support.limits.general/algorithm.version.compile.pass.cpp
index 6b756535569f6f..65da07ef029253 100644
--- 
a/libcxx/test/std/language.support/support.limits/support.limits.general/algorithm.version.compile.pass.cpp
+++ 
b/libcxx/test/std/language.support/support.limits/support.limits.general/algorithm.version.compile.pass.cpp
@@ -21,7 +21,7 @@
 __cpp_lib_default_template_type_for_algorithm_values202403L [C++26]
 __cpp_lib_freestanding_algorithm202311L [C++26]
 __cpp_lib_parallel_algorithm201603L [C++17]
-__cpp_lib_ranges202207L [C++20]
+__cpp_lib_ranges202110L [C++20]
 202211L [C++23]
 __cpp_lib_ranges_contains   202207L [C++23]
 __cpp_lib_ranges_find_last  202207L [C++23]
@@ -245,8 +245,8 @@
 # ifndef __cpp_lib_ranges
 #   error "__cpp_lib_ranges should be defined in c++20"
 # endif
-# if __cpp_lib_ranges != 202207L
-#   error "__cpp_lib_ranges should have the value 202207L in c++20"
+# if __cpp_lib_ranges != 202110L
+#   error "__cpp_lib_ranges should have the value 202110L in c++20"
 # endif
 
 # ifdef __cpp_lib_ranges_contains
diff --git 
a/libcxx/test/std/language.support/support.limits/support.limits.general/functional.version.compile.pass.cpp
 
b/libcxx/test/std/language.support/support.limits/support.limits.general/functional.version.compile.pass.cpp
index 3c6a23aadc449b..a9e9a

[llvm-branch-commits] [libcxx] [release/19.x][libc++] Adjust the version of __cpp_lib_ranges in C++20 mode (PR #109324)

2024-10-11 Thread A. Jiang via llvm-branch-commits


frederick-vs-ja wrote:

@ldionne I force-pushed the branch for resolving conflicts with #109291. Please 
double-check the changes.

https://github.com/llvm/llvm-project/pull/109324
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[llvm-branch-commits] [libcxx] [release/19.x][libc++] Adjust the version of __cpp_lib_ranges in C++20 mode (PR #109324)

2024-10-11 Thread A. Jiang via llvm-branch-commits


https://github.com/frederick-vs-ja updated 
https://github.com/llvm/llvm-project/pull/109324

>From 1360969b8125a633a3a8ad734c8a369bd3cf47c2 Mon Sep 17 00:00:00 2001
From: Louis Dionne 
Date: Thu, 19 Sep 2024 15:40:47 -0400
Subject: [PATCH] [libc++] Adjust the version of __cpp_lib_ranges in C++20 mode

This is a (very partial) cherry-pick of #101715 to fix this oversight
in the LLVM 19 release.
---
 libcxx/docs/FeatureTestMacroTable.rst   | 2 +-
 libcxx/include/version  | 4 ++--
 .../algorithm.version.compile.pass.cpp  | 6 +++---
 .../functional.version.compile.pass.cpp | 6 +++---
 .../iterator.version.compile.pass.cpp   | 6 +++---
 .../support.limits.general/memory.version.compile.pass.cpp  | 6 +++---
 .../support.limits.general/ranges.version.compile.pass.cpp  | 6 +++---
 .../support.limits.general/version.version.compile.pass.cpp | 6 +++---
 libcxx/utils/generate_feature_test_macro_components.py  | 2 +-
 9 files changed, 22 insertions(+), 22 deletions(-)

diff --git a/libcxx/docs/FeatureTestMacroTable.rst 
b/libcxx/docs/FeatureTestMacroTable.rst
index 7f95f0f4e1c17c..cbed6693f0a5d7 100644
--- a/libcxx/docs/FeatureTestMacroTable.rst
+++ b/libcxx/docs/FeatureTestMacroTable.rst
@@ -266,7 +266,7 @@ Status
 -- 
-
 ``__cpp_lib_polymorphic_allocator````201902L``
 -- 
-
-``__cpp_lib_ranges``   ``202207L``
+``__cpp_lib_ranges``   ``202110L``
 -- 
-
 ``__cpp_lib_remove_cvref`` ``201711L``
 -- 
-
diff --git a/libcxx/include/version b/libcxx/include/version
index c8a31f77a915e1..76ab6bedafdd0b 100644
--- a/libcxx/include/version
+++ b/libcxx/include/version
@@ -184,7 +184,7 @@ __cpp_lib_print 
202207L  
 __cpp_lib_ranges202211L  
 
  

-202207L // C++20
+202110L // C++20
 __cpp_lib_ranges_as_const   202207L 
 __cpp_lib_ranges_as_rvalue  202207L 
 __cpp_lib_ranges_chunk  202202L 
@@ -429,7 +429,7 @@ __cpp_lib_void_t
201411L 
 # if _LIBCPP_AVAILABILITY_HAS_PMR
 #   define __cpp_lib_polymorphic_allocator  201902L
 # endif
-# define __cpp_lib_ranges   202207L
+# define __cpp_lib_ranges   202110L
 # define __cpp_lib_remove_cvref 201711L
 # if !defined(_LIBCPP_HAS_NO_THREADS) && _LIBCPP_AVAILABILITY_HAS_SYNC
 #   define __cpp_lib_semaphore  201907L
diff --git 
a/libcxx/test/std/language.support/support.limits/support.limits.general/algorithm.version.compile.pass.cpp
 
b/libcxx/test/std/language.support/support.limits/support.limits.general/algorithm.version.compile.pass.cpp
index 6b756535569f6f..65da07ef029253 100644
--- 
a/libcxx/test/std/language.support/support.limits/support.limits.general/algorithm.version.compile.pass.cpp
+++ 
b/libcxx/test/std/language.support/support.limits/support.limits.general/algorithm.version.compile.pass.cpp
@@ -21,7 +21,7 @@
 __cpp_lib_default_template_type_for_algorithm_values202403L [C++26]
 __cpp_lib_freestanding_algorithm202311L [C++26]
 __cpp_lib_parallel_algorithm201603L [C++17]
-__cpp_lib_ranges202207L [C++20]
+__cpp_lib_ranges202110L [C++20]
 202211L [C++23]
 __cpp_lib_ranges_contains   202207L [C++23]
 __cpp_lib_ranges_find_last  202207L [C++23]
@@ -245,8 +245,8 @@
 # ifndef __cpp_lib_ranges
 #   error "__cpp_lib_ranges should be defined in c++20"
 # endif
-# if __cpp_lib_ranges != 202207L
-#   error "__cpp_lib_ranges should have the value 202207L in c++20"
+# if __cpp_lib_ranges != 202110L
+#   error "__cpp_lib_ranges should have the value 202110L in c++20"
 # endif
 
 # ifdef __cpp_lib_ranges_contains
diff --git 
a/libcxx/test/std/language.support/support.limits/support.limits.general/functional.version.compile.pass.cpp
 
b/libcxx/test/std/language.support/support.limits/support.limits.general/functional.version.compile.pass.cpp
index 3c6a23aadc449b..a9e9a

[llvm-branch-commits] [llvm] release/19.x: [x86] combineMUL - when looking for a vector multiply by splat constant, ensure we're only accepting ConstantInt splat scalars. (PR #111246)

2024-10-11 Thread Phoebe Wang via llvm-branch-commits


phoebewang wrote:

LGTM.

https://github.com/llvm/llvm-project/pull/111246
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[llvm-branch-commits] [flang] [flang] Lower omp.workshare to other omp constructs (PR #101446)

2024-10-11 Thread Michael Klemm via llvm-branch-commits


mjklemm wrote:

Is this PR in an acceptable state to be merged?  I went through the other three 
and it seems that the 4 PRs all converging and seem either ready for merge or 
very close.

https://github.com/llvm/llvm-project/pull/101446
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[llvm-branch-commits] [llvm] release/19.x: [VectorCombine] Do not try to operate on OperandBundles. (#111635) (PR #111796)

2024-10-11 Thread Simon Pilgrim via llvm-branch-commits


https://github.com/RKSimon approved this pull request.

LGTM

https://github.com/llvm/llvm-project/pull/111796
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[llvm-branch-commits] [BOLT][NFC] Speedup BAT::writeMaps (PR #112061)

2024-10-11 Thread via llvm-branch-commits


llvmbot wrote:




@llvm/pr-subscribers-bolt

Author: Amir Ayupov (aaupov)


Changes

For a large binary with BAT section of size 38 MB with ~170k maps,
reduces writeMaps time from 70s down to 1s.

The inefficiency was in the use of std::distance with std::map::iterator
which doesn't provide random access. Use sorted vector for lookups.

Test Plan: NFC


---
Full diff: https://github.com/llvm/llvm-project/pull/112061.diff


2 Files Affected:

- (modified) bolt/include/bolt/Profile/BoltAddressTranslation.h (+6-5) 
- (modified) bolt/lib/Profile/BoltAddressTranslation.cpp (+10-12) 


``diff
diff --git a/bolt/include/bolt/Profile/BoltAddressTranslation.h 
b/bolt/include/bolt/Profile/BoltAddressTranslation.h
index 2d920a114fea2e..0b3e41f61b3942 100644
--- a/bolt/include/bolt/Profile/BoltAddressTranslation.h
+++ b/bolt/include/bolt/Profile/BoltAddressTranslation.h
@@ -143,15 +143,13 @@ class BoltAddressTranslation {
   void constructMaps(const BinaryContext &BC);
 
   /// Write the serialized address translation table for a function.
-  template 
-  void writeMaps(std::map &Maps, uint64_t &PrevAddress,
- raw_ostream &OS);
+  template  void writeMaps(uint64_t &PrevAddress, raw_ostream &OS);
 
   /// Read the serialized address translation table for a function.
   /// Return a parse error if failed.
   template 
-  void parseMaps(std::vector &HotFuncs, uint64_t &PrevAddress,
- DataExtractor &DE, uint64_t &Offset, Error &Err);
+  void parseMaps(uint64_t &PrevAddress, DataExtractor &DE, uint64_t &Offset,
+ Error &Err);
 
   /// Returns the bitmask with set bits corresponding to indices of BRANCHENTRY
   /// entries in function address translation map.
@@ -163,6 +161,9 @@ class BoltAddressTranslation {
 
   std::map Maps;
 
+  /// Ordered vector with addresses of hot functions.
+  std::vector HotFuncs;
+
   /// Map a function to its basic blocks count
   std::unordered_map NumBasicBlocksMap;
 
diff --git a/bolt/lib/Profile/BoltAddressTranslation.cpp 
b/bolt/lib/Profile/BoltAddressTranslation.cpp
index 334252cbd36026..c661782174cd75 100644
--- a/bolt/lib/Profile/BoltAddressTranslation.cpp
+++ b/bolt/lib/Profile/BoltAddressTranslation.cpp
@@ -159,8 +159,8 @@ void BoltAddressTranslation::write(const BinaryContext &BC, 
raw_ostream &OS) {
 
   // Output addresses are delta-encoded
   uint64_t PrevAddress = 0;
-  writeMaps(Maps, PrevAddress, OS);
-  writeMaps(Maps, PrevAddress, OS);
+  writeMaps(PrevAddress, OS);
+  writeMaps(PrevAddress, OS);
 
   BC.outs() << "BOLT-INFO: Wrote " << Maps.size() << " BAT maps\n";
   BC.outs() << "BOLT-INFO: Wrote " << FuncHashes.getNumFunctions()
@@ -198,8 +198,7 @@ size_t BoltAddressTranslation::getNumEqualOffsets(const 
MapTy &Map,
 }
 
 template 
-void BoltAddressTranslation::writeMaps(std::map &Maps,
-   uint64_t &PrevAddress, raw_ostream &OS) 
{
+void BoltAddressTranslation::writeMaps(uint64_t &PrevAddress, raw_ostream &OS) 
{
   NamedRegionTimer T("writemaps", "write translation maps", "bat",
  "process BAT", opts::TimeBAT);
   const uint32_t NumFuncs =
@@ -231,9 +230,9 @@ void BoltAddressTranslation::writeMaps(std::map &Maps,
 : 0;
 uint32_t Skew = 0;
 if (Cold) {
-  auto HotEntryIt = Maps.find(ColdPartSource[Address]);
-  assert(HotEntryIt != Maps.end());
-  size_t HotIndex = std::distance(Maps.begin(), HotEntryIt);
+  auto HotEntryIt = llvm::lower_bound(HotFuncs, ColdPartSource[Address]);
+  assert(HotEntryIt != HotFuncs.end());
+  size_t HotIndex = std::distance(HotFuncs.begin(), HotEntryIt);
   encodeULEB128(HotIndex - PrevIndex, OS);
   PrevIndex = HotIndex;
   // Skew of all input offsets for cold fragments is simply the first input
@@ -241,6 +240,7 @@ void BoltAddressTranslation::writeMaps(std::map &Maps,
   Skew = Map.begin()->second >> 1;
   encodeULEB128(Skew, OS);
 } else {
+  HotFuncs.push_back(Address);
   // Function hash
   size_t BFHash = getBFHash(HotInputAddress);
   LLVM_DEBUG(dbgs() << "Hash: " << formatv("{0:x}\n", BFHash));
@@ -329,17 +329,15 @@ std::error_code BoltAddressTranslation::parse(raw_ostream 
&OS, StringRef Buf) {
 return make_error_code(llvm::errc::io_error);
 
   Error Err(Error::success());
-  std::vector HotFuncs;
   uint64_t PrevAddress = 0;
-  parseMaps(HotFuncs, PrevAddress, DE, Offset, Err);
-  parseMaps(HotFuncs, PrevAddress, DE, Offset, Err);
+  parseMaps(PrevAddress, DE, Offset, Err);
+  parseMaps(PrevAddress, DE, Offset, Err);
   OS << "BOLT-INFO: Parsed " << Maps.size() << " BAT entries\n";
   return errorToErrorCode(std::move(Err));
 }
 
 template 
-void BoltAddressTranslation::parseMaps(std::vector &HotFuncs,
-   uint64_t &PrevAddress, DataExtractor 
&DE,
+void BoltAddressTranslation::parseMaps(uint64_t &PrevAddress, DataExtractor 
&DE,
uint64_t &Offset, Error &E

[llvm-branch-commits] [BOLT][NFC] Speedup BAT::writeMaps (PR #112061)

2024-10-11 Thread Amir Ayupov via llvm-branch-commits


https://github.com/aaupov created 
https://github.com/llvm/llvm-project/pull/112061

For a large binary with BAT section of size 38 MB with ~170k maps,
reduces writeMaps time from 70s down to 1s.

The inefficiency was in the use of std::distance with std::map::iterator
which doesn't provide random access. Use sorted vector for lookups.

Test Plan: NFC



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[llvm-branch-commits] [clang] clang: Remove requires system-linux from some driver tests (PR #111976)

2024-10-11 Thread Sean Perry via llvm-branch-commits



@@ -1,4 +1,3 @@
-// REQUIRES: system-linux

perry-ca wrote:

I'm looking into that question.  The first thing I noticed was the temp file is 
being created and read as a binary file.  I also noticed that the output of the 
script is not being redirected into the temp file.  I'll get a PR up to fix 
these problems once I get it solved.

I think that mean the only issue on z/OS is not related to these tests.  Could 
you mark the 3 failing tests as XFAIL for system-zos.  I'll remove that once I 
have the problem fixed.

https://github.com/llvm/llvm-project/pull/111976
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[llvm-branch-commits] [libcxx] [libcxxabi] release/19.x: [libc++] Avoid re-exporting a few specific symbols from libc++abi (#109054) (PR #110677)

2024-10-11 Thread Konstantin Varlamov via llvm-branch-commits


https://github.com/var-const approved this pull request.


https://github.com/llvm/llvm-project/pull/110677
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[llvm-branch-commits] [compiler-rt] release/19.x: [compiler-rt] Remove SHA2 interceptions for NetBSD/FreeBSD. (#110246) (PR #111954)

2024-10-11 Thread Vitaly Buka via llvm-branch-commits


https://github.com/vitalybuka approved this pull request.


https://github.com/llvm/llvm-project/pull/111954
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[llvm-branch-commits] [llvm] Backport "[InstCombine] Drop range attributes in `foldIsPowerOf2` (#111946)" (PR #111984)

2024-10-11 Thread via llvm-branch-commits


llvmbot wrote:




@llvm/pr-subscribers-llvm-transforms

Author: Yingwei Zheng (dtcxzyw)


Changes

Backport 
https://github.com/llvm/llvm-project/commit/6a65e98fa7901dc1de91172d065fafb16ce89d77.

As https://github.com/llvm/llvm-project/pull/100899 exists in 19.x code base, I 
guess 19.x is also a vulnerable version.


---
Full diff: https://github.com/llvm/llvm-project/pull/111984.diff


2 Files Affected:

- (modified) llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp (+13-5) 
- (modified) llvm/test/Transforms/InstCombine/ispow2.ll (+32) 


``diff
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp 
b/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
index f9caa4da44931a..3222e8298c3f0b 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
@@ -926,9 +926,11 @@ static Value *foldIsPowerOf2OrZero(ICmpInst *Cmp0, 
ICmpInst *Cmp1, bool IsAnd,
 }
 
 /// Reduce a pair of compares that check if a value has exactly 1 bit set.
-/// Also used for logical and/or, must be poison safe.
+/// Also used for logical and/or, must be poison safe if range attributes are
+/// dropped.
 static Value *foldIsPowerOf2(ICmpInst *Cmp0, ICmpInst *Cmp1, bool JoinedByAnd,
- InstCombiner::BuilderTy &Builder) {
+ InstCombiner::BuilderTy &Builder,
+ InstCombinerImpl &IC) {
   // Handle 'and' / 'or' commutation: make the equality check the first 
operand.
   if (JoinedByAnd && Cmp1->getPredicate() == ICmpInst::ICMP_NE)
 std::swap(Cmp0, Cmp1);
@@ -942,7 +944,10 @@ static Value *foldIsPowerOf2(ICmpInst *Cmp0, ICmpInst 
*Cmp1, bool JoinedByAnd,
   match(Cmp1, m_ICmp(Pred1, m_Intrinsic(m_Specific(X)),
  m_SpecificInt(2))) &&
   Pred0 == ICmpInst::ICMP_NE && Pred1 == ICmpInst::ICMP_ULT) {
-Value *CtPop = Cmp1->getOperand(0);
+auto *CtPop = cast(Cmp1->getOperand(0));
+// Drop range attributes and re-infer them in the next iteration.
+CtPop->dropPoisonGeneratingAnnotations();
+IC.addToWorklist(CtPop);
 return Builder.CreateICmpEQ(CtPop, ConstantInt::get(CtPop->getType(), 1));
   }
   // (X == 0) || (ctpop(X) u> 1) --> ctpop(X) != 1
@@ -950,7 +955,10 @@ static Value *foldIsPowerOf2(ICmpInst *Cmp0, ICmpInst 
*Cmp1, bool JoinedByAnd,
   match(Cmp1, m_ICmp(Pred1, m_Intrinsic(m_Specific(X)),
  m_SpecificInt(1))) &&
   Pred0 == ICmpInst::ICMP_EQ && Pred1 == ICmpInst::ICMP_UGT) {
-Value *CtPop = Cmp1->getOperand(0);
+auto *CtPop = cast(Cmp1->getOperand(0));
+// Drop range attributes and re-infer them in the next iteration.
+CtPop->dropPoisonGeneratingAnnotations();
+IC.addToWorklist(CtPop);
 return Builder.CreateICmpNE(CtPop, ConstantInt::get(CtPop->getType(), 1));
   }
   return nullptr;
@@ -3347,7 +3355,7 @@ Value *InstCombinerImpl::foldAndOrOfICmps(ICmpInst *LHS, 
ICmpInst *RHS,
 if (Value *V = foldSignedTruncationCheck(LHS, RHS, I, Builder))
   return V;
 
-  if (Value *V = foldIsPowerOf2(LHS, RHS, IsAnd, Builder))
+  if (Value *V = foldIsPowerOf2(LHS, RHS, IsAnd, Builder, *this))
 return V;
 
   if (Value *V = foldPowerOf2AndShiftedMask(LHS, RHS, IsAnd, Builder))
diff --git a/llvm/test/Transforms/InstCombine/ispow2.ll 
b/llvm/test/Transforms/InstCombine/ispow2.ll
index a143b1347ccee5..216ccc5c77257b 100644
--- a/llvm/test/Transforms/InstCombine/ispow2.ll
+++ b/llvm/test/Transforms/InstCombine/ispow2.ll
@@ -1522,3 +1522,35 @@ define <2 x i1> 
@not_pow2_or_z_known_bits_fail_wrong_cmp(<2 x i32> %xin) {
   %r = icmp ugt <2 x i32> %cnt, 
   ret <2 x i1> %r
 }
+
+; Make sure that range attributes on return values are dropped after merging 
these two icmps
+
+define i1 @has_single_bit(i32 %x) {
+; CHECK-LABEL: @has_single_bit(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:[[POPCNT:%.*]] = call range(i32 0, 33) i32 
@llvm.ctpop.i32(i32 [[X:%.*]])
+; CHECK-NEXT:[[SEL:%.*]] = icmp eq i32 [[POPCNT]], 1
+; CHECK-NEXT:ret i1 [[SEL]]
+;
+entry:
+  %cmp1 = icmp ne i32 %x, 0
+  %popcnt = call range(i32 1, 33) i32 @llvm.ctpop.i32(i32 %x)
+  %cmp2 = icmp ult i32 %popcnt, 2
+  %sel = select i1 %cmp1, i1 %cmp2, i1 false
+  ret i1 %sel
+}
+
+define i1 @has_single_bit_inv(i32 %x) {
+; CHECK-LABEL: @has_single_bit_inv(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:[[POPCNT:%.*]] = call range(i32 0, 33) i32 
@llvm.ctpop.i32(i32 [[X:%.*]])
+; CHECK-NEXT:[[SEL:%.*]] = icmp ne i32 [[POPCNT]], 1
+; CHECK-NEXT:ret i1 [[SEL]]
+;
+entry:
+  %cmp1 = icmp eq i32 %x, 0
+  %popcnt = call range(i32 1, 33) i32 @llvm.ctpop.i32(i32 %x)
+  %cmp2 = icmp ugt i32 %popcnt, 1
+  %sel = select i1 %cmp1, i1 true, i1 %cmp2
+  ret i1 %sel
+}

``




https://github.com/llvm/llvm-project/pull/111984
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[llvm-branch-commits] [llvm] Backport "[InstCombine] Drop range attributes in `foldIsPowerOf2` (#111946)" (PR #111984)

2024-10-11 Thread Yingwei Zheng via llvm-branch-commits


https://github.com/dtcxzyw edited 
https://github.com/llvm/llvm-project/pull/111984
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[llvm-branch-commits] [llvm] Backport "[InstCombine] Drop range attributes in `foldIsPowerOf2` (#111946)" (PR #111984)

2024-10-11 Thread Nikita Popov via llvm-branch-commits


https://github.com/nikic approved this pull request.

LGTM

https://github.com/llvm/llvm-project/pull/111984
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[llvm-branch-commits] [libcxx] [libcxxabi] release/19.x: [libc++] Avoid re-exporting a few specific symbols from libc++abi (#109054) (PR #110677)

2024-10-11 Thread Louis Dionne via llvm-branch-commits


ldionne wrote:

I'm not seeing any CI failure anymore, I think this can be merged?

https://github.com/llvm/llvm-project/pull/110677
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[llvm-branch-commits] [NFC][sanitizer] Add Debug utility to print thread history (PR #111948)

2024-10-11 Thread Vitaly Buka via llvm-branch-commits



@@ -0,0 +1,73 @@
+//===-- sanitizer_thread_history.cpp 
--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#include "sanitizer_thread_history.h"
+
+#include "sanitizer_stackdepot.h"
+namespace __sanitizer {
+
+void PrintThreadHistory(ThreadRegistry ®istry, InternalScopedString &out) {
+  ThreadRegistryLock l(®istry);
+  // Stack traces are largest part of printout and they often the same for
+  // multiple threads, so we will deduplicate them.
+  InternalMmapVector stacks;
+
+  registry.RunCallbackForEachThreadLocked(
+  [](ThreadContextBase *context, void *arg) {
+static_cast(arg)->push_back(context);
+  },
+  &stacks);
+
+  Sort(stacks.data(), stacks.size(),
+   [](const ThreadContextBase *a, const ThreadContextBase *b) {
+ if (a->stack_id < b->stack_id)
+   return true;
+ if (a->stack_id > b->stack_id)
+   return false;
+ return a->tid < b->tid;
+   });
+
+  auto describe_thread = [&](const ThreadContextBase *context) {
+if (!context) {
+  out.Append("T-1");
+  return;
+}
+out.AppendF("T%llu/%llu", context->unique_id, context->os_id);
+if (internal_strlen(context->name))
+  out.AppendF(" (%s)", context->name);
+  };
+
+  auto get_parent =
+  [&](const ThreadContextBase *context) -> const ThreadContextBase * {
+if (!context)
+  return nullptr;
+ThreadContextBase *parent = registry.GetThreadLocked(context->parent_tid);
+if (!parent)
+  return nullptr;
+if (parent->unique_id >= context->unique_id)
+  return nullptr;
+return parent;
+  };
+
+  u32 stack_id = 0;
+  for (const ThreadContextBase *context : stacks) {
+if (stack_id != context->stack_id) {
+  StackDepotGet(stack_id).PrintTo(&out);
+  stack_id = context->stack_id;
+}
+out.Append("Thread ");
+describe_thread(context);
+out.Append(" was created by ");
+describe_thread(get_parent(context));
+out.Append("\n");
+  }
+  if (!stacks.empty())
+StackDepotGet(stack_id).PrintTo(&out);

vitalybuka wrote:

It should not. array is sorted by stack_id, and it prints previous stack_id.
The last group is always not printers after the loop

https://github.com/llvm/llvm-project/pull/111948
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[llvm-branch-commits] [lld] release/19.x: [lld][Hexagon] Support predicated-add GOT_16_X mask lookup (#111896) (PR #112040)

2024-10-11 Thread via llvm-branch-commits


llvmbot wrote:




@llvm/pr-subscribers-lld-elf

Author: None (llvmbot)


Changes

Backport 77aa8257acbd773c0c430cd962da1bcfbd5ee94b

Requested by: @androm3da

---
Full diff: https://github.com/llvm/llvm-project/pull/112040.diff


2 Files Affected:

- (modified) lld/ELF/Arch/Hexagon.cpp (+17-3) 
- (modified) lld/test/ELF/hexagon-shared.s (+15-4) 


``diff
diff --git a/lld/ELF/Arch/Hexagon.cpp b/lld/ELF/Arch/Hexagon.cpp
index abde3cd964917e..56cf96fd177042 100644
--- a/lld/ELF/Arch/Hexagon.cpp
+++ b/lld/ELF/Arch/Hexagon.cpp
@@ -181,11 +181,13 @@ static const InstructionMask r6[] = {
 {0xd700, 0x006020e0}, {0xd800, 0x006020e0},
 {0xdb00, 0x006020e0}, {0xdf00, 0x006020e0}};
 
+constexpr uint32_t instParsePacketEnd = 0xc000;
+
 static bool isDuplex(uint32_t insn) {
   // Duplex forms have a fixed mask and parse bits 15:14 are always
   // zero.  Non-duplex insns will always have at least one bit set in the
   // parse field.
-  return (0xC000 & insn) == 0;
+  return (instParsePacketEnd & insn) == 0;
 }
 
 static uint32_t findMaskR6(uint32_t insn) {
@@ -216,6 +218,12 @@ static uint32_t findMaskR11(uint32_t insn) {
 }
 
 static uint32_t findMaskR16(uint32_t insn) {
+  if (isDuplex(insn))
+return 0x03f0;
+
+  // Clear the end-packet-parse bits:
+  insn = insn & ~instParsePacketEnd;
+
   if ((0xff00 & insn) == 0x4800)
 return 0x061f20ff;
   if ((0xff00 & insn) == 0x4900)
@@ -225,8 +233,14 @@ static uint32_t findMaskR16(uint32_t insn) {
   if ((0xff00 & insn) == 0xb000)
 return 0x0fe03fe0;
 
-  if (isDuplex(insn))
-return 0x03f0;
+  if ((0xff802000 & insn) == 0x7400)
+return 0x1fe0;
+  if ((0xff802000 & insn) == 0x74002000)
+return 0x1fe0;
+  if ((0xff802000 & insn) == 0x7480)
+return 0x1fe0;
+  if ((0xff802000 & insn) == 0x74802000)
+return 0x1fe0;
 
   for (InstructionMask i : r6)
 if ((0xff00 & insn) == i.cmpMask)
diff --git a/lld/test/ELF/hexagon-shared.s b/lld/test/ELF/hexagon-shared.s
index 747822039e839a..01f72865847056 100644
--- a/lld/test/ELF/hexagon-shared.s
+++ b/lld/test/ELF/hexagon-shared.s
@@ -42,6 +42,13 @@ r0 = add(r1,##bar@GOT)
 { r0 = add(r0,##bar@GOT)
   memw(r0) = r2 }
 
+# R_HEX_GOT_16_X, pred add
+if (p0) r0 = add(r0,##bar@GOT)
+if (!p0) r0 = add(r0,##bar@GOT)
+{ p0 = cmp.gtu(r0, r1)
+  if (p0.new) r0 = add(r0,##bar@GOT) }
+{ p0 = cmp.gtu(r0, r1)
+  if (!p0.new) r0 = add(r0,##bar@GOT) }
 
 # foo is local so no plt will be generated
 foo:
@@ -78,12 +85,16 @@ pvar:
 # PLT-NEXT: r28 = memw(r14+#0) }
 # PLT-NEXT: jumpr r28 }
 
-# TEXT:  8c 00 01 00 0001008c
-# TEXT: {  call 0x102d0 }
-# TEXT: if (p0) jump:nt 0x102d0
-# TEXT: r0 = #0 ; jump 0x102d0
+# TEXT:  bc 00 01 00 000100bc
+# TEXT: {  call 0x10300 }
+# TEXT: if (p0) jump:nt 0x10300
+# TEXT: r0 = #0 ; jump 0x10300
 # TEXT: r0 = add(r1,##-65548)
 # TEXT: r0 = add(r0,##-65548); memw(r0+#0) = r2 }
+# TEXT: if (p0) r0 = add(r0,##-65548)
+# TEXT: if (!p0) r0 = add(r0,##-65548)
+# TEXT: if (p0.new) r0 = add(r0,##-65548)
+# TEXT: if (!p0.new) r0 = add(r0,##-65548)
 
 # GOT: .got:
 # GOT:  00 00 00 00  

``




https://github.com/llvm/llvm-project/pull/112040
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[llvm-branch-commits] [lld] release/19.x: [lld][Hexagon] Support predicated-add GOT_16_X mask lookup (#111896) (PR #112040)

2024-10-11 Thread via llvm-branch-commits


llvmbot wrote:




@llvm/pr-subscribers-backend-hexagon

Author: None (llvmbot)


Changes

Backport 77aa8257acbd773c0c430cd962da1bcfbd5ee94b

Requested by: @androm3da

---
Full diff: https://github.com/llvm/llvm-project/pull/112040.diff


2 Files Affected:

- (modified) lld/ELF/Arch/Hexagon.cpp (+17-3) 
- (modified) lld/test/ELF/hexagon-shared.s (+15-4) 


``diff
diff --git a/lld/ELF/Arch/Hexagon.cpp b/lld/ELF/Arch/Hexagon.cpp
index abde3cd964917e..56cf96fd177042 100644
--- a/lld/ELF/Arch/Hexagon.cpp
+++ b/lld/ELF/Arch/Hexagon.cpp
@@ -181,11 +181,13 @@ static const InstructionMask r6[] = {
 {0xd700, 0x006020e0}, {0xd800, 0x006020e0},
 {0xdb00, 0x006020e0}, {0xdf00, 0x006020e0}};
 
+constexpr uint32_t instParsePacketEnd = 0xc000;
+
 static bool isDuplex(uint32_t insn) {
   // Duplex forms have a fixed mask and parse bits 15:14 are always
   // zero.  Non-duplex insns will always have at least one bit set in the
   // parse field.
-  return (0xC000 & insn) == 0;
+  return (instParsePacketEnd & insn) == 0;
 }
 
 static uint32_t findMaskR6(uint32_t insn) {
@@ -216,6 +218,12 @@ static uint32_t findMaskR11(uint32_t insn) {
 }
 
 static uint32_t findMaskR16(uint32_t insn) {
+  if (isDuplex(insn))
+return 0x03f0;
+
+  // Clear the end-packet-parse bits:
+  insn = insn & ~instParsePacketEnd;
+
   if ((0xff00 & insn) == 0x4800)
 return 0x061f20ff;
   if ((0xff00 & insn) == 0x4900)
@@ -225,8 +233,14 @@ static uint32_t findMaskR16(uint32_t insn) {
   if ((0xff00 & insn) == 0xb000)
 return 0x0fe03fe0;
 
-  if (isDuplex(insn))
-return 0x03f0;
+  if ((0xff802000 & insn) == 0x7400)
+return 0x1fe0;
+  if ((0xff802000 & insn) == 0x74002000)
+return 0x1fe0;
+  if ((0xff802000 & insn) == 0x7480)
+return 0x1fe0;
+  if ((0xff802000 & insn) == 0x74802000)
+return 0x1fe0;
 
   for (InstructionMask i : r6)
 if ((0xff00 & insn) == i.cmpMask)
diff --git a/lld/test/ELF/hexagon-shared.s b/lld/test/ELF/hexagon-shared.s
index 747822039e839a..01f72865847056 100644
--- a/lld/test/ELF/hexagon-shared.s
+++ b/lld/test/ELF/hexagon-shared.s
@@ -42,6 +42,13 @@ r0 = add(r1,##bar@GOT)
 { r0 = add(r0,##bar@GOT)
   memw(r0) = r2 }
 
+# R_HEX_GOT_16_X, pred add
+if (p0) r0 = add(r0,##bar@GOT)
+if (!p0) r0 = add(r0,##bar@GOT)
+{ p0 = cmp.gtu(r0, r1)
+  if (p0.new) r0 = add(r0,##bar@GOT) }
+{ p0 = cmp.gtu(r0, r1)
+  if (!p0.new) r0 = add(r0,##bar@GOT) }
 
 # foo is local so no plt will be generated
 foo:
@@ -78,12 +85,16 @@ pvar:
 # PLT-NEXT: r28 = memw(r14+#0) }
 # PLT-NEXT: jumpr r28 }
 
-# TEXT:  8c 00 01 00 0001008c
-# TEXT: {  call 0x102d0 }
-# TEXT: if (p0) jump:nt 0x102d0
-# TEXT: r0 = #0 ; jump 0x102d0
+# TEXT:  bc 00 01 00 000100bc
+# TEXT: {  call 0x10300 }
+# TEXT: if (p0) jump:nt 0x10300
+# TEXT: r0 = #0 ; jump 0x10300
 # TEXT: r0 = add(r1,##-65548)
 # TEXT: r0 = add(r0,##-65548); memw(r0+#0) = r2 }
+# TEXT: if (p0) r0 = add(r0,##-65548)
+# TEXT: if (!p0) r0 = add(r0,##-65548)
+# TEXT: if (p0.new) r0 = add(r0,##-65548)
+# TEXT: if (!p0.new) r0 = add(r0,##-65548)
 
 # GOT: .got:
 # GOT:  00 00 00 00  

``




https://github.com/llvm/llvm-project/pull/112040
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[llvm-branch-commits] [lld] release/19.x: [lld][Hexagon] Support predicated-add GOT_16_X mask lookup (#111896) (PR #112040)

2024-10-11 Thread via llvm-branch-commits


llvmbot wrote:




@llvm/pr-subscribers-lld

Author: None (llvmbot)


Changes

Backport 77aa8257acbd773c0c430cd962da1bcfbd5ee94b

Requested by: @androm3da

---
Full diff: https://github.com/llvm/llvm-project/pull/112040.diff


2 Files Affected:

- (modified) lld/ELF/Arch/Hexagon.cpp (+17-3) 
- (modified) lld/test/ELF/hexagon-shared.s (+15-4) 


``diff
diff --git a/lld/ELF/Arch/Hexagon.cpp b/lld/ELF/Arch/Hexagon.cpp
index abde3cd964917e..56cf96fd177042 100644
--- a/lld/ELF/Arch/Hexagon.cpp
+++ b/lld/ELF/Arch/Hexagon.cpp
@@ -181,11 +181,13 @@ static const InstructionMask r6[] = {
 {0xd700, 0x006020e0}, {0xd800, 0x006020e0},
 {0xdb00, 0x006020e0}, {0xdf00, 0x006020e0}};
 
+constexpr uint32_t instParsePacketEnd = 0xc000;
+
 static bool isDuplex(uint32_t insn) {
   // Duplex forms have a fixed mask and parse bits 15:14 are always
   // zero.  Non-duplex insns will always have at least one bit set in the
   // parse field.
-  return (0xC000 & insn) == 0;
+  return (instParsePacketEnd & insn) == 0;
 }
 
 static uint32_t findMaskR6(uint32_t insn) {
@@ -216,6 +218,12 @@ static uint32_t findMaskR11(uint32_t insn) {
 }
 
 static uint32_t findMaskR16(uint32_t insn) {
+  if (isDuplex(insn))
+return 0x03f0;
+
+  // Clear the end-packet-parse bits:
+  insn = insn & ~instParsePacketEnd;
+
   if ((0xff00 & insn) == 0x4800)
 return 0x061f20ff;
   if ((0xff00 & insn) == 0x4900)
@@ -225,8 +233,14 @@ static uint32_t findMaskR16(uint32_t insn) {
   if ((0xff00 & insn) == 0xb000)
 return 0x0fe03fe0;
 
-  if (isDuplex(insn))
-return 0x03f0;
+  if ((0xff802000 & insn) == 0x7400)
+return 0x1fe0;
+  if ((0xff802000 & insn) == 0x74002000)
+return 0x1fe0;
+  if ((0xff802000 & insn) == 0x7480)
+return 0x1fe0;
+  if ((0xff802000 & insn) == 0x74802000)
+return 0x1fe0;
 
   for (InstructionMask i : r6)
 if ((0xff00 & insn) == i.cmpMask)
diff --git a/lld/test/ELF/hexagon-shared.s b/lld/test/ELF/hexagon-shared.s
index 747822039e839a..01f72865847056 100644
--- a/lld/test/ELF/hexagon-shared.s
+++ b/lld/test/ELF/hexagon-shared.s
@@ -42,6 +42,13 @@ r0 = add(r1,##bar@GOT)
 { r0 = add(r0,##bar@GOT)
   memw(r0) = r2 }
 
+# R_HEX_GOT_16_X, pred add
+if (p0) r0 = add(r0,##bar@GOT)
+if (!p0) r0 = add(r0,##bar@GOT)
+{ p0 = cmp.gtu(r0, r1)
+  if (p0.new) r0 = add(r0,##bar@GOT) }
+{ p0 = cmp.gtu(r0, r1)
+  if (!p0.new) r0 = add(r0,##bar@GOT) }
 
 # foo is local so no plt will be generated
 foo:
@@ -78,12 +85,16 @@ pvar:
 # PLT-NEXT: r28 = memw(r14+#0) }
 # PLT-NEXT: jumpr r28 }
 
-# TEXT:  8c 00 01 00 0001008c
-# TEXT: {  call 0x102d0 }
-# TEXT: if (p0) jump:nt 0x102d0
-# TEXT: r0 = #0 ; jump 0x102d0
+# TEXT:  bc 00 01 00 000100bc
+# TEXT: {  call 0x10300 }
+# TEXT: if (p0) jump:nt 0x10300
+# TEXT: r0 = #0 ; jump 0x10300
 # TEXT: r0 = add(r1,##-65548)
 # TEXT: r0 = add(r0,##-65548); memw(r0+#0) = r2 }
+# TEXT: if (p0) r0 = add(r0,##-65548)
+# TEXT: if (!p0) r0 = add(r0,##-65548)
+# TEXT: if (p0.new) r0 = add(r0,##-65548)
+# TEXT: if (!p0.new) r0 = add(r0,##-65548)
 
 # GOT: .got:
 # GOT:  00 00 00 00  

``




https://github.com/llvm/llvm-project/pull/112040
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[llvm-branch-commits] [lsan] Add debug option to "deflake" leaks (PR #112037)

2024-10-11 Thread via llvm-branch-commits


llvmbot wrote:




@llvm/pr-subscribers-compiler-rt-sanitizer

Author: Vitaly Buka (vitalybuka)


Changes

There are hard to debug leaks which look like
false.

In general, repeating leak checking should not
affect set of leaks significantly, especial
`at_exit` leak checking.

But if we see significant discrepancy, it may give
us a clue for investigation.


---
Full diff: https://github.com/llvm/llvm-project/pull/112037.diff


3 Files Affected:

- (modified) compiler-rt/lib/lsan/lsan_common.cpp (+8-1) 
- (modified) compiler-rt/lib/lsan/lsan_flags.inc (+1) 
- (added) compiler-rt/test/lsan/TestCases/flag_retries.c (+23) 


``diff
diff --git a/compiler-rt/lib/lsan/lsan_common.cpp 
b/compiler-rt/lib/lsan/lsan_common.cpp
index b584d1e9723fc8..8ed2cfc63cbae9 100644
--- a/compiler-rt/lib/lsan/lsan_common.cpp
+++ b/compiler-rt/lib/lsan/lsan_common.cpp
@@ -779,7 +779,7 @@ static bool PrintResults(LeakReport &report) {
   return unsuppressed_count;
 }
 
-static bool CheckForLeaks() {
+static bool CheckForLeaksOnce() {
   if (&__lsan_is_turned_off && __lsan_is_turned_off()) {
 VReport(1, "LeakSanitizer is disabled\n");
 return false;
@@ -831,6 +831,13 @@ static bool CheckForLeaks() {
   }
 }
 
+static bool CheckForLeaks() {
+  int with_leaks = 0;
+  for (int i = 0; i < flags()->retries; ++i)
+with_leaks += CheckForLeaksOnce();
+  return with_leaks == flags()->retries;
+}
+
 static bool has_reported_leaks = false;
 bool HasReportedLeaks() { return has_reported_leaks; }
 
diff --git a/compiler-rt/lib/lsan/lsan_flags.inc 
b/compiler-rt/lib/lsan/lsan_flags.inc
index b7f28223b8189b..59edc0baa77d85 100644
--- a/compiler-rt/lib/lsan/lsan_flags.inc
+++ b/compiler-rt/lib/lsan/lsan_flags.inc
@@ -43,6 +43,7 @@ LSAN_FLAG(bool, use_poisoned, false,
   "Consider pointers found in poisoned memory to be valid.")
 LSAN_FLAG(bool, log_pointers, false, "Debug logging")
 LSAN_FLAG(bool, log_threads, false, "Debug logging")
+LSAN_FLAG(int, retries, 1, "Debug option to repeat leak checking multiple 
times")
 LSAN_FLAG(const char *, suppressions, "", "Suppressions file name.")
 LSAN_FLAG(int, thread_suspend_fail, 1,
   "Behaviour if thread suspendion all thread (0 - "
diff --git a/compiler-rt/test/lsan/TestCases/flag_retries.c 
b/compiler-rt/test/lsan/TestCases/flag_retries.c
new file mode 100644
index 00..3891a47bb0a566
--- /dev/null
+++ b/compiler-rt/test/lsan/TestCases/flag_retries.c
@@ -0,0 +1,23 @@
+// Test retries option of lsan.
+// RUN: %clang_lsan %s -o %t
+// RUN: %env_lsan_opts=use_stacks=0:use_registers=0:symbolize=0 %run %t foo 
2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK1
+// RUN: %env_lsan_opts=use_stacks=0:use_registers=0:symbolize=0:retries=12 
%run %t 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK12
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+void *p;
+
+int main(int argc, char *argv[]) {
+  fprintf(stderr, "Test alloc: %p.\n", malloc(1337));
+// CHECK: Test alloc:
+
+  assert(__lsan_do_recoverable_leak_check() == 1);
+// CHECK1-COUNT-1: SUMMARY: {{.*}}Sanitizer: 1337 byte
+// CHECK12-COUNT-12: SUMMARY: {{.*}}Sanitizer: 1337 byte
+
+  _exit(0);
+}

``




https://github.com/llvm/llvm-project/pull/112037
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[llvm-branch-commits] [lsan] Add debug option to "deflake" leaks (PR #112037)

2024-10-11 Thread Vitaly Buka via llvm-branch-commits


https://github.com/vitalybuka created 
https://github.com/llvm/llvm-project/pull/112037

There are hard to debug leaks which look like
false.

In general, repeating leak checking should not
affect set of leaks significantly, especial
`at_exit` leak checking.

But if we see significant discrepancy, it may give
us a clue for investigation.



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[llvm-branch-commits] [lsan] Add debug option to "deflake" leaks (PR #112037)

2024-10-11 Thread via llvm-branch-commits


github-actions[bot] wrote:




:warning: C/C++ code formatter, clang-format found issues in your code. 
:warning:



You can test this locally with the following command:


``bash
git-clang-format --diff 5c25ba3380966ccac5bd0caf2c39bc10c1571e42 
e88d91ffd1358f0c9cbd4fca14fc54a441fe2c36 --extensions inc,c,cpp -- 
compiler-rt/test/lsan/TestCases/flag_retries.c 
compiler-rt/lib/lsan/lsan_common.cpp compiler-rt/lib/lsan/lsan_flags.inc
``





View the diff from clang-format here.


``diff
diff --git a/compiler-rt/lib/lsan/lsan_common.cpp 
b/compiler-rt/lib/lsan/lsan_common.cpp
index 8ed2cfc63c..c53e1e6100 100644
--- a/compiler-rt/lib/lsan/lsan_common.cpp
+++ b/compiler-rt/lib/lsan/lsan_common.cpp
@@ -833,8 +833,7 @@ static bool CheckForLeaksOnce() {
 
 static bool CheckForLeaks() {
   int with_leaks = 0;
-  for (int i = 0; i < flags()->retries; ++i)
-with_leaks += CheckForLeaksOnce();
+  for (int i = 0; i < flags()->retries; ++i) with_leaks += CheckForLeaksOnce();
   return with_leaks == flags()->retries;
 }
 
diff --git a/compiler-rt/lib/lsan/lsan_flags.inc 
b/compiler-rt/lib/lsan/lsan_flags.inc
index 59edc0baa7..ae6057f171 100644
--- a/compiler-rt/lib/lsan/lsan_flags.inc
+++ b/compiler-rt/lib/lsan/lsan_flags.inc
@@ -43,7 +43,8 @@ LSAN_FLAG(bool, use_poisoned, false,
   "Consider pointers found in poisoned memory to be valid.")
 LSAN_FLAG(bool, log_pointers, false, "Debug logging")
 LSAN_FLAG(bool, log_threads, false, "Debug logging")
-LSAN_FLAG(int, retries, 1, "Debug option to repeat leak checking multiple 
times")
+LSAN_FLAG(int, retries, 1,
+  "Debug option to repeat leak checking multiple times")
 LSAN_FLAG(const char *, suppressions, "", "Suppressions file name.")
 LSAN_FLAG(int, thread_suspend_fail, 1,
   "Behaviour if thread suspendion all thread (0 - "
diff --git a/compiler-rt/test/lsan/TestCases/flag_retries.c 
b/compiler-rt/test/lsan/TestCases/flag_retries.c
index 3891a47bb0..de814bcab4 100644
--- a/compiler-rt/test/lsan/TestCases/flag_retries.c
+++ b/compiler-rt/test/lsan/TestCases/flag_retries.c
@@ -4,20 +4,20 @@
 // RUN: %env_lsan_opts=use_stacks=0:use_registers=0:symbolize=0:retries=12 
%run %t 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK12
 
 #include 
+#include 
 #include 
 #include 
 #include 
-#include 
 
 void *p;
 
 int main(int argc, char *argv[]) {
   fprintf(stderr, "Test alloc: %p.\n", malloc(1337));
-// CHECK: Test alloc:
+  // CHECK: Test alloc:
 
   assert(__lsan_do_recoverable_leak_check() == 1);
-// CHECK1-COUNT-1: SUMMARY: {{.*}}Sanitizer: 1337 byte
-// CHECK12-COUNT-12: SUMMARY: {{.*}}Sanitizer: 1337 byte
+  // CHECK1-COUNT-1: SUMMARY: {{.*}}Sanitizer: 1337 byte
+  // CHECK12-COUNT-12: SUMMARY: {{.*}}Sanitizer: 1337 byte
 
   _exit(0);
 }

``




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[llvm-branch-commits] [lld] release/19.x: [lld][Hexagon] Support predicated-add GOT_16_X mask lookup (#111896) (PR #112040)

2024-10-11 Thread via llvm-branch-commits


https://github.com/llvmbot created 
https://github.com/llvm/llvm-project/pull/112040

Backport 77aa8257acbd773c0c430cd962da1bcfbd5ee94b

Requested by: @androm3da

>From 662e1b306be89ed7907cc1e19f24cf9e68ff7f0d Mon Sep 17 00:00:00 2001
From: Brian Cain 
Date: Fri, 11 Oct 2024 14:31:41 -0500
Subject: [PATCH] [lld][Hexagon] Support predicated-add GOT_16_X mask lookup
 (#111896)

When encountering an instruction like `if (p0) r0 = add(r0,##bar@GOT)`,
lld would fail with:
```
ld.lld: error: unrecognized instruction for 16_X type: 0x7400C000
```

This issue was encountered while building libreadline with clang 19.1.0.

Fixes: #111876
(cherry picked from commit 77aa8257acbd773c0c430cd962da1bcfbd5ee94b)
---
 lld/ELF/Arch/Hexagon.cpp  | 20 +---
 lld/test/ELF/hexagon-shared.s | 19 +++
 2 files changed, 32 insertions(+), 7 deletions(-)

diff --git a/lld/ELF/Arch/Hexagon.cpp b/lld/ELF/Arch/Hexagon.cpp
index abde3cd964917e..56cf96fd177042 100644
--- a/lld/ELF/Arch/Hexagon.cpp
+++ b/lld/ELF/Arch/Hexagon.cpp
@@ -181,11 +181,13 @@ static const InstructionMask r6[] = {
 {0xd700, 0x006020e0}, {0xd800, 0x006020e0},
 {0xdb00, 0x006020e0}, {0xdf00, 0x006020e0}};
 
+constexpr uint32_t instParsePacketEnd = 0xc000;
+
 static bool isDuplex(uint32_t insn) {
   // Duplex forms have a fixed mask and parse bits 15:14 are always
   // zero.  Non-duplex insns will always have at least one bit set in the
   // parse field.
-  return (0xC000 & insn) == 0;
+  return (instParsePacketEnd & insn) == 0;
 }
 
 static uint32_t findMaskR6(uint32_t insn) {
@@ -216,6 +218,12 @@ static uint32_t findMaskR11(uint32_t insn) {
 }
 
 static uint32_t findMaskR16(uint32_t insn) {
+  if (isDuplex(insn))
+return 0x03f0;
+
+  // Clear the end-packet-parse bits:
+  insn = insn & ~instParsePacketEnd;
+
   if ((0xff00 & insn) == 0x4800)
 return 0x061f20ff;
   if ((0xff00 & insn) == 0x4900)
@@ -225,8 +233,14 @@ static uint32_t findMaskR16(uint32_t insn) {
   if ((0xff00 & insn) == 0xb000)
 return 0x0fe03fe0;
 
-  if (isDuplex(insn))
-return 0x03f0;
+  if ((0xff802000 & insn) == 0x7400)
+return 0x1fe0;
+  if ((0xff802000 & insn) == 0x74002000)
+return 0x1fe0;
+  if ((0xff802000 & insn) == 0x7480)
+return 0x1fe0;
+  if ((0xff802000 & insn) == 0x74802000)
+return 0x1fe0;
 
   for (InstructionMask i : r6)
 if ((0xff00 & insn) == i.cmpMask)
diff --git a/lld/test/ELF/hexagon-shared.s b/lld/test/ELF/hexagon-shared.s
index 747822039e839a..01f72865847056 100644
--- a/lld/test/ELF/hexagon-shared.s
+++ b/lld/test/ELF/hexagon-shared.s
@@ -42,6 +42,13 @@ r0 = add(r1,##bar@GOT)
 { r0 = add(r0,##bar@GOT)
   memw(r0) = r2 }
 
+# R_HEX_GOT_16_X, pred add
+if (p0) r0 = add(r0,##bar@GOT)
+if (!p0) r0 = add(r0,##bar@GOT)
+{ p0 = cmp.gtu(r0, r1)
+  if (p0.new) r0 = add(r0,##bar@GOT) }
+{ p0 = cmp.gtu(r0, r1)
+  if (!p0.new) r0 = add(r0,##bar@GOT) }
 
 # foo is local so no plt will be generated
 foo:
@@ -78,12 +85,16 @@ pvar:
 # PLT-NEXT: r28 = memw(r14+#0) }
 # PLT-NEXT: jumpr r28 }
 
-# TEXT:  8c 00 01 00 0001008c
-# TEXT: {  call 0x102d0 }
-# TEXT: if (p0) jump:nt 0x102d0
-# TEXT: r0 = #0 ; jump 0x102d0
+# TEXT:  bc 00 01 00 000100bc
+# TEXT: {  call 0x10300 }
+# TEXT: if (p0) jump:nt 0x10300
+# TEXT: r0 = #0 ; jump 0x10300
 # TEXT: r0 = add(r1,##-65548)
 # TEXT: r0 = add(r0,##-65548); memw(r0+#0) = r2 }
+# TEXT: if (p0) r0 = add(r0,##-65548)
+# TEXT: if (!p0) r0 = add(r0,##-65548)
+# TEXT: if (p0.new) r0 = add(r0,##-65548)
+# TEXT: if (!p0.new) r0 = add(r0,##-65548)
 
 # GOT: .got:
 # GOT:  00 00 00 00  

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[llvm-branch-commits] [lld] release/19.x: [lld][Hexagon] Support predicated-add GOT_16_X mask lookup (#111896) (PR #112040)

2024-10-11 Thread via llvm-branch-commits


https://github.com/llvmbot milestoned 
https://github.com/llvm/llvm-project/pull/112040
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[llvm-branch-commits] [lld] release/19.x: [lld][Hexagon] Support predicated-add GOT_16_X mask lookup (#111896) (PR #112040)

2024-10-11 Thread via llvm-branch-commits


llvmbot wrote:

@SidManning What do you think about merging this PR to the release branch?

https://github.com/llvm/llvm-project/pull/112040
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[llvm-branch-commits] [llvm] [RISCV] Add initial support of memcmp expansion (PR #107548)

2024-10-11 Thread Pengcheng Wang via llvm-branch-commits



@@ -1144,42 +2872,116 @@ entry:
 define i32 @memcmp_size_4(ptr %s1, ptr %s2) nounwind {
 ; CHECK-ALIGNED-RV32-LABEL: memcmp_size_4:
 ; CHECK-ALIGNED-RV32:   # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-NEXT:addi sp, sp, -16
-; CHECK-ALIGNED-RV32-NEXT:sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-NEXT:li a2, 4
-; CHECK-ALIGNED-RV32-NEXT:call memcmp
-; CHECK-ALIGNED-RV32-NEXT:lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-NEXT:addi sp, sp, 16
+; CHECK-ALIGNED-RV32-NEXT:lbu a2, 0(a0)
+; CHECK-ALIGNED-RV32-NEXT:lbu a3, 1(a0)
+; CHECK-ALIGNED-RV32-NEXT:lbu a4, 3(a0)
+; CHECK-ALIGNED-RV32-NEXT:lbu a0, 2(a0)
+; CHECK-ALIGNED-RV32-NEXT:lbu a5, 0(a1)
+; CHECK-ALIGNED-RV32-NEXT:lbu a6, 1(a1)
+; CHECK-ALIGNED-RV32-NEXT:lbu a7, 3(a1)
+; CHECK-ALIGNED-RV32-NEXT:lbu a1, 2(a1)
+; CHECK-ALIGNED-RV32-NEXT:slli a0, a0, 8
+; CHECK-ALIGNED-RV32-NEXT:or a0, a0, a4
+; CHECK-ALIGNED-RV32-NEXT:slli a3, a3, 16
+; CHECK-ALIGNED-RV32-NEXT:slli a2, a2, 24
+; CHECK-ALIGNED-RV32-NEXT:or a2, a2, a3
+; CHECK-ALIGNED-RV32-NEXT:or a0, a2, a0
+; CHECK-ALIGNED-RV32-NEXT:slli a1, a1, 8
+; CHECK-ALIGNED-RV32-NEXT:or a1, a1, a7
+; CHECK-ALIGNED-RV32-NEXT:slli a6, a6, 16
+; CHECK-ALIGNED-RV32-NEXT:slli a5, a5, 24
+; CHECK-ALIGNED-RV32-NEXT:or a2, a5, a6
+; CHECK-ALIGNED-RV32-NEXT:or a1, a2, a1
+; CHECK-ALIGNED-RV32-NEXT:sltu a2, a1, a0
+; CHECK-ALIGNED-RV32-NEXT:sltu a0, a0, a1
+; CHECK-ALIGNED-RV32-NEXT:sub a0, a2, a0
 ; CHECK-ALIGNED-RV32-NEXT:ret
 ;
 ; CHECK-ALIGNED-RV64-LABEL: memcmp_size_4:
 ; CHECK-ALIGNED-RV64:   # %bb.0: # %entry
-; CHECK-ALIGNED-RV64-NEXT:addi sp, sp, -16
-; CHECK-ALIGNED-RV64-NEXT:sd ra, 8(sp) # 8-byte Folded Spill
-; CHECK-ALIGNED-RV64-NEXT:li a2, 4
-; CHECK-ALIGNED-RV64-NEXT:call memcmp
-; CHECK-ALIGNED-RV64-NEXT:ld ra, 8(sp) # 8-byte Folded Reload
-; CHECK-ALIGNED-RV64-NEXT:addi sp, sp, 16
+; CHECK-ALIGNED-RV64-NEXT:lbu a2, 0(a0)
+; CHECK-ALIGNED-RV64-NEXT:lbu a3, 1(a0)
+; CHECK-ALIGNED-RV64-NEXT:lbu a4, 2(a0)
+; CHECK-ALIGNED-RV64-NEXT:lb a0, 3(a0)
+; CHECK-ALIGNED-RV64-NEXT:lbu a5, 0(a1)
+; CHECK-ALIGNED-RV64-NEXT:lbu a6, 1(a1)
+; CHECK-ALIGNED-RV64-NEXT:lbu a7, 2(a1)
+; CHECK-ALIGNED-RV64-NEXT:lb a1, 3(a1)
+; CHECK-ALIGNED-RV64-NEXT:andi a0, a0, 255
+; CHECK-ALIGNED-RV64-NEXT:slli a4, a4, 8
+; CHECK-ALIGNED-RV64-NEXT:or a0, a4, a0
+; CHECK-ALIGNED-RV64-NEXT:slli a3, a3, 16
+; CHECK-ALIGNED-RV64-NEXT:slliw a2, a2, 24
+; CHECK-ALIGNED-RV64-NEXT:or a2, a2, a3
+; CHECK-ALIGNED-RV64-NEXT:or a0, a2, a0
+; CHECK-ALIGNED-RV64-NEXT:andi a1, a1, 255
+; CHECK-ALIGNED-RV64-NEXT:slli a7, a7, 8
+; CHECK-ALIGNED-RV64-NEXT:or a1, a7, a1
+; CHECK-ALIGNED-RV64-NEXT:slli a6, a6, 16
+; CHECK-ALIGNED-RV64-NEXT:slliw a2, a5, 24
+; CHECK-ALIGNED-RV64-NEXT:or a2, a2, a6
+; CHECK-ALIGNED-RV64-NEXT:or a1, a2, a1
+; CHECK-ALIGNED-RV64-NEXT:sltu a2, a1, a0
+; CHECK-ALIGNED-RV64-NEXT:sltu a0, a0, a1
+; CHECK-ALIGNED-RV64-NEXT:sub a0, a2, a0
 ; CHECK-ALIGNED-RV64-NEXT:ret
 ;
 ; CHECK-UNALIGNED-RV32-LABEL: memcmp_size_4:
 ; CHECK-UNALIGNED-RV32:   # %bb.0: # %entry
-; CHECK-UNALIGNED-RV32-NEXT:addi sp, sp, -16
-; CHECK-UNALIGNED-RV32-NEXT:sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-UNALIGNED-RV32-NEXT:li a2, 4
-; CHECK-UNALIGNED-RV32-NEXT:call memcmp
-; CHECK-UNALIGNED-RV32-NEXT:lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-UNALIGNED-RV32-NEXT:addi sp, sp, 16
+; CHECK-UNALIGNED-RV32-NEXT:lw a0, 0(a0)

wangpc-pp wrote:

Good question, I don't know the answer, but I think we can be aggressive here 
and enable it for all configurations. If we have some evidences that shows 
inefficiencies, we can go back to here and disable it. WDYT?

https://github.com/llvm/llvm-project/pull/107548
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[llvm-branch-commits] [llvm] [RISCV] Add initial support of memcmp expansion (PR #107548)

2024-10-11 Thread Pengcheng Wang via llvm-branch-commits


https://github.com/wangpc-pp updated 
https://github.com/llvm/llvm-project/pull/107548

>From f21cfcfc90330ee3856746b6315a81a00313b0e0 Mon Sep 17 00:00:00 2001
From: Wang Pengcheng 
Date: Fri, 6 Sep 2024 17:20:51 +0800
Subject: [PATCH 1/5] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20in?=
 =?UTF-8?q?itial=20version?=
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Created using spr 1.3.6-beta.1
---
 .../Target/RISCV/RISCVTargetTransformInfo.cpp |  15 +
 .../Target/RISCV/RISCVTargetTransformInfo.h   |   3 +
 llvm/test/CodeGen/RISCV/memcmp.ll | 932 ++
 3 files changed, 950 insertions(+)
 create mode 100644 llvm/test/CodeGen/RISCV/memcmp.ll

diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp 
b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
index e809e15eacf696..ad532aadc83266 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
@@ -2113,3 +2113,18 @@ bool RISCVTTIImpl::shouldConsiderAddressTypePromotion(
   }
   return Considerable;
 }
+
+RISCVTTIImpl::TTI::MemCmpExpansionOptions
+RISCVTTIImpl::enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const {
+  TTI::MemCmpExpansionOptions Options;
+  // FIXME: Vector haven't been tested.
+  Options.AllowOverlappingLoads =
+  (ST->enableUnalignedScalarMem() || ST->enableUnalignedScalarMem());
+  Options.MaxNumLoads = TLI->getMaxExpandSizeMemcmp(OptSize);
+  Options.NumLoadsPerBlock = Options.MaxNumLoads;
+  if (ST->is64Bit())
+Options.LoadSizes.push_back(8);
+  llvm::append_range(Options.LoadSizes, ArrayRef({4, 2, 1}));
+  Options.AllowedTailExpansions = {3, 5, 6};
+  return Options;
+}
diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h 
b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
index 763b89bfec0a66..ee9bed09df97f3 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
+++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
@@ -404,6 +404,9 @@ class RISCVTTIImpl : public BasicTTIImplBase {
   shouldConsiderAddressTypePromotion(const Instruction &I,
  bool &AllowPromotionWithoutCommonHeader);
   std::optional getMinPageSize() const { return 4096; }
+
+  TTI::MemCmpExpansionOptions enableMemCmpExpansion(bool OptSize,
+bool IsZeroCmp) const;
 };
 
 } // end namespace llvm
diff --git a/llvm/test/CodeGen/RISCV/memcmp.ll 
b/llvm/test/CodeGen/RISCV/memcmp.ll
new file mode 100644
index 00..652cd02e2c750a
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/memcmp.ll
@@ -0,0 +1,932 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 
UTC_ARGS: --version 5
+; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -O2 | FileCheck %s 
--check-prefix=CHECK-ALIGNED-RV32
+; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -O2 | FileCheck %s 
--check-prefix=CHECK-ALIGNED-RV64
+; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 
-mattr=+unaligned-scalar-mem -O2 \
+; RUN:   | FileCheck %s --check-prefix=CHECK-UNALIGNED-RV32
+; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 
-mattr=+unaligned-scalar-mem -O2 \
+; RUN:   | FileCheck %s --check-prefix=CHECK-UNALIGNED-RV64
+
+declare i32 @bcmp(i8*, i8*, iXLen) nounwind readonly
+declare i32 @memcmp(i8*, i8*, iXLen) nounwind readonly
+
+define i1 @bcmp_size_15(i8* %s1, i8* %s2) {
+; CHECK-ALIGNED-RV32-LABEL: bcmp_size_15:
+; CHECK-ALIGNED-RV32:   # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-NEXT:lbu a2, 1(a0)
+; CHECK-ALIGNED-RV32-NEXT:lbu a3, 0(a0)
+; CHECK-ALIGNED-RV32-NEXT:lbu a4, 2(a0)
+; CHECK-ALIGNED-RV32-NEXT:lbu a5, 3(a0)
+; CHECK-ALIGNED-RV32-NEXT:slli a2, a2, 8
+; CHECK-ALIGNED-RV32-NEXT:or a2, a2, a3
+; CHECK-ALIGNED-RV32-NEXT:slli a4, a4, 16
+; CHECK-ALIGNED-RV32-NEXT:slli a5, a5, 24
+; CHECK-ALIGNED-RV32-NEXT:or a4, a5, a4
+; CHECK-ALIGNED-RV32-NEXT:or a2, a4, a2
+; CHECK-ALIGNED-RV32-NEXT:lbu a3, 1(a1)
+; CHECK-ALIGNED-RV32-NEXT:lbu a4, 0(a1)
+; CHECK-ALIGNED-RV32-NEXT:lbu a5, 2(a1)
+; CHECK-ALIGNED-RV32-NEXT:lbu a6, 3(a1)
+; CHECK-ALIGNED-RV32-NEXT:slli a3, a3, 8
+; CHECK-ALIGNED-RV32-NEXT:or a3, a3, a4
+; CHECK-ALIGNED-RV32-NEXT:slli a5, a5, 16
+; CHECK-ALIGNED-RV32-NEXT:slli a6, a6, 24
+; CHECK-ALIGNED-RV32-NEXT:or a4, a6, a5
+; CHECK-ALIGNED-RV32-NEXT:or a3, a4, a3
+; CHECK-ALIGNED-RV32-NEXT:xor a2, a2, a3
+; CHECK-ALIGNED-RV32-NEXT:lbu a3, 5(a0)
+; CHECK-ALIGNED-RV32-NEXT:lbu a4, 4(a0)
+; CHECK-ALIGNED-RV32-NEXT:lbu a5, 6(a0)
+; CHECK-ALIGNED-RV32-NEXT:lbu a6, 7(a0)
+; CHECK-ALIGNED-RV32-NEXT:slli a3, a3, 8
+; CHECK-ALIGNED-RV32-NEXT:or a3, a3, a4
+; CHECK-ALIGNED-RV32-NEXT:slli a5, a5, 16
+; CHECK-ALIGNED-RV32-NEXT:slli a6, a6, 24
+; CHECK-ALIGNED-RV32-NEXT:or a4, a6, a5
+; CHECK-ALIGNED-RV32-NEXT:or a3, a4, a3
+; CHECK-ALIGNED-RV32-NEXT:lbu a4, 5(a1)
+; CHECK-ALIGNED-RV32-NEXT

[llvm-branch-commits] [llvm] [RISCV] Add initial support of memcmp expansion (PR #107548)

2024-10-11 Thread Pengcheng Wang via llvm-branch-commits


https://github.com/wangpc-pp updated 
https://github.com/llvm/llvm-project/pull/107548

>From f21cfcfc90330ee3856746b6315a81a00313b0e0 Mon Sep 17 00:00:00 2001
From: Wang Pengcheng 
Date: Fri, 6 Sep 2024 17:20:51 +0800
Subject: [PATCH 1/5] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20in?=
 =?UTF-8?q?itial=20version?=
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Created using spr 1.3.6-beta.1
---
 .../Target/RISCV/RISCVTargetTransformInfo.cpp |  15 +
 .../Target/RISCV/RISCVTargetTransformInfo.h   |   3 +
 llvm/test/CodeGen/RISCV/memcmp.ll | 932 ++
 3 files changed, 950 insertions(+)
 create mode 100644 llvm/test/CodeGen/RISCV/memcmp.ll

diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp 
b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
index e809e15eacf696..ad532aadc83266 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
@@ -2113,3 +2113,18 @@ bool RISCVTTIImpl::shouldConsiderAddressTypePromotion(
   }
   return Considerable;
 }
+
+RISCVTTIImpl::TTI::MemCmpExpansionOptions
+RISCVTTIImpl::enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const {
+  TTI::MemCmpExpansionOptions Options;
+  // FIXME: Vector haven't been tested.
+  Options.AllowOverlappingLoads =
+  (ST->enableUnalignedScalarMem() || ST->enableUnalignedScalarMem());
+  Options.MaxNumLoads = TLI->getMaxExpandSizeMemcmp(OptSize);
+  Options.NumLoadsPerBlock = Options.MaxNumLoads;
+  if (ST->is64Bit())
+Options.LoadSizes.push_back(8);
+  llvm::append_range(Options.LoadSizes, ArrayRef({4, 2, 1}));
+  Options.AllowedTailExpansions = {3, 5, 6};
+  return Options;
+}
diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h 
b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
index 763b89bfec0a66..ee9bed09df97f3 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
+++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
@@ -404,6 +404,9 @@ class RISCVTTIImpl : public BasicTTIImplBase {
   shouldConsiderAddressTypePromotion(const Instruction &I,
  bool &AllowPromotionWithoutCommonHeader);
   std::optional getMinPageSize() const { return 4096; }
+
+  TTI::MemCmpExpansionOptions enableMemCmpExpansion(bool OptSize,
+bool IsZeroCmp) const;
 };
 
 } // end namespace llvm
diff --git a/llvm/test/CodeGen/RISCV/memcmp.ll 
b/llvm/test/CodeGen/RISCV/memcmp.ll
new file mode 100644
index 00..652cd02e2c750a
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/memcmp.ll
@@ -0,0 +1,932 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 
UTC_ARGS: --version 5
+; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -O2 | FileCheck %s 
--check-prefix=CHECK-ALIGNED-RV32
+; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -O2 | FileCheck %s 
--check-prefix=CHECK-ALIGNED-RV64
+; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 
-mattr=+unaligned-scalar-mem -O2 \
+; RUN:   | FileCheck %s --check-prefix=CHECK-UNALIGNED-RV32
+; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 
-mattr=+unaligned-scalar-mem -O2 \
+; RUN:   | FileCheck %s --check-prefix=CHECK-UNALIGNED-RV64
+
+declare i32 @bcmp(i8*, i8*, iXLen) nounwind readonly
+declare i32 @memcmp(i8*, i8*, iXLen) nounwind readonly
+
+define i1 @bcmp_size_15(i8* %s1, i8* %s2) {
+; CHECK-ALIGNED-RV32-LABEL: bcmp_size_15:
+; CHECK-ALIGNED-RV32:   # %bb.0: # %entry
+; CHECK-ALIGNED-RV32-NEXT:lbu a2, 1(a0)
+; CHECK-ALIGNED-RV32-NEXT:lbu a3, 0(a0)
+; CHECK-ALIGNED-RV32-NEXT:lbu a4, 2(a0)
+; CHECK-ALIGNED-RV32-NEXT:lbu a5, 3(a0)
+; CHECK-ALIGNED-RV32-NEXT:slli a2, a2, 8
+; CHECK-ALIGNED-RV32-NEXT:or a2, a2, a3
+; CHECK-ALIGNED-RV32-NEXT:slli a4, a4, 16
+; CHECK-ALIGNED-RV32-NEXT:slli a5, a5, 24
+; CHECK-ALIGNED-RV32-NEXT:or a4, a5, a4
+; CHECK-ALIGNED-RV32-NEXT:or a2, a4, a2
+; CHECK-ALIGNED-RV32-NEXT:lbu a3, 1(a1)
+; CHECK-ALIGNED-RV32-NEXT:lbu a4, 0(a1)
+; CHECK-ALIGNED-RV32-NEXT:lbu a5, 2(a1)
+; CHECK-ALIGNED-RV32-NEXT:lbu a6, 3(a1)
+; CHECK-ALIGNED-RV32-NEXT:slli a3, a3, 8
+; CHECK-ALIGNED-RV32-NEXT:or a3, a3, a4
+; CHECK-ALIGNED-RV32-NEXT:slli a5, a5, 16
+; CHECK-ALIGNED-RV32-NEXT:slli a6, a6, 24
+; CHECK-ALIGNED-RV32-NEXT:or a4, a6, a5
+; CHECK-ALIGNED-RV32-NEXT:or a3, a4, a3
+; CHECK-ALIGNED-RV32-NEXT:xor a2, a2, a3
+; CHECK-ALIGNED-RV32-NEXT:lbu a3, 5(a0)
+; CHECK-ALIGNED-RV32-NEXT:lbu a4, 4(a0)
+; CHECK-ALIGNED-RV32-NEXT:lbu a5, 6(a0)
+; CHECK-ALIGNED-RV32-NEXT:lbu a6, 7(a0)
+; CHECK-ALIGNED-RV32-NEXT:slli a3, a3, 8
+; CHECK-ALIGNED-RV32-NEXT:or a3, a3, a4
+; CHECK-ALIGNED-RV32-NEXT:slli a5, a5, 16
+; CHECK-ALIGNED-RV32-NEXT:slli a6, a6, 24
+; CHECK-ALIGNED-RV32-NEXT:or a4, a6, a5
+; CHECK-ALIGNED-RV32-NEXT:or a3, a4, a3
+; CHECK-ALIGNED-RV32-NEXT:lbu a4, 5(a1)
+; CHECK-ALIGNED-RV32-NEXT

[llvm-branch-commits] [llvm] release/19.x: [x86] combineMUL - when looking for a vector multiply by splat constant, ensure we're only accepting ConstantInt splat scalars. (PR #111246)

2024-10-11 Thread Nikita Popov via llvm-branch-commits


https://github.com/nikic approved this pull request.


https://github.com/llvm/llvm-project/pull/111246
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[llvm-branch-commits] [llvm] [RISCV] Add initial support of memcmp expansion (PR #107548)

2024-10-11 Thread Pengcheng Wang via llvm-branch-commits



@@ -112,42 +104,46 @@ entry:
 define i32 @bcmp_size_2(ptr %s1, ptr %s2) nounwind optsize {
 ; CHECK-ALIGNED-RV32-LABEL: bcmp_size_2:
 ; CHECK-ALIGNED-RV32:   # %bb.0: # %entry
-; CHECK-ALIGNED-RV32-NEXT:addi sp, sp, -16
-; CHECK-ALIGNED-RV32-NEXT:sw ra, 12(sp) # 4-byte Folded Spill
-; CHECK-ALIGNED-RV32-NEXT:li a2, 2
-; CHECK-ALIGNED-RV32-NEXT:call bcmp
-; CHECK-ALIGNED-RV32-NEXT:lw ra, 12(sp) # 4-byte Folded Reload
-; CHECK-ALIGNED-RV32-NEXT:addi sp, sp, 16
+; CHECK-ALIGNED-RV32-NEXT:lbu a2, 1(a0)

wangpc-pp wrote:

Great! This is an optimization we can do in ExpandMemcmp, I will take a look.

https://github.com/llvm/llvm-project/pull/107548
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[llvm-branch-commits] [clang] clang: Remove requires system-linux from some driver tests (PR #111976)

2024-10-11 Thread Matt Arsenault via llvm-branch-commits


arsenm wrote:

> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is 
> open. Once all requirements are satisfied, merge this PR as a stack  href="https://app.graphite.dev/github/pr/llvm/llvm-project/111976?utm_source=stack-comment-downstack-mergeability-warning";
>  >on Graphite.
> https://graphite.dev/docs/merge-pull-requests";>Learn more

* **#111976** https://app.graphite.dev/github/pr/llvm/llvm-project/111976?utm_source=stack-comment-icon";
 target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" 
width="10px" height="10px"/> 👈
* **#111975** https://app.graphite.dev/github/pr/llvm/llvm-project/111975?utm_source=stack-comment-icon";
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width="10px" height="10px"/>
* `main`

This stack of pull requests is managed by Graphite. https://stacking.dev/?utm_source=stack-comment";>Learn more about 
stacking.


 Join @arsenm and the rest of your teammates on https://graphite.dev?utm-source=stack-comment";>https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" 
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https://github.com/llvm/llvm-project/pull/111976
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[llvm-branch-commits] [clang] clang: Remove requires system-linux from some driver tests (PR #111976)

2024-10-11 Thread Matt Arsenault via llvm-branch-commits


https://github.com/arsenm created 
https://github.com/llvm/llvm-project/pull/111976

Works for me on macos.

>From fee09ae97a755cb38961ba7cbd23e84409eeec9e Mon Sep 17 00:00:00 2001
From: Matt Arsenault 
Date: Fri, 11 Oct 2024 14:33:32 +0400
Subject: [PATCH] clang: Remove requires system-linux from some driver tests

Works for me on macos.
---
 clang/test/Driver/amdgpu-hip-system-arch.c | 1 -
 clang/test/Driver/amdgpu-openmp-system-arch-fail.c | 1 -
 clang/test/Driver/hip-partial-link.hip | 2 +-
 clang/test/Driver/hip-temps-linux.hip  | 1 -
 clang/test/Driver/linker-wrapper.c | 6 ++
 clang/test/Driver/nvptx-cuda-system-arch.c | 1 -
 clang/test/Driver/openmp-system-arch.c | 1 -
 7 files changed, 3 insertions(+), 10 deletions(-)

diff --git a/clang/test/Driver/amdgpu-hip-system-arch.c 
b/clang/test/Driver/amdgpu-hip-system-arch.c
index f25a4087080f6d..7be7b9cad1be02 100644
--- a/clang/test/Driver/amdgpu-hip-system-arch.c
+++ b/clang/test/Driver/amdgpu-hip-system-arch.c
@@ -1,4 +1,3 @@
-// REQUIRES: system-linux
 // REQUIRES: shell
 
 // RUN: mkdir -p %t
diff --git a/clang/test/Driver/amdgpu-openmp-system-arch-fail.c 
b/clang/test/Driver/amdgpu-openmp-system-arch-fail.c
index 85c82e4598cb10..b7e1d0b2c56659 100644
--- a/clang/test/Driver/amdgpu-openmp-system-arch-fail.c
+++ b/clang/test/Driver/amdgpu-openmp-system-arch-fail.c
@@ -1,4 +1,3 @@
-// REQUIRES: system-linux
 // REQUIRES: shell
 
 // RUN: mkdir -p %t
diff --git a/clang/test/Driver/hip-partial-link.hip 
b/clang/test/Driver/hip-partial-link.hip
index c8451ec81ed37e..0bb8a848f80718 100644
--- a/clang/test/Driver/hip-partial-link.hip
+++ b/clang/test/Driver/hip-partial-link.hip
@@ -1,4 +1,4 @@
-// REQUIRES: x86-registered-target, amdgpu-registered-target, lld, system-linux
+// REQUIRES: x86-registered-target, amdgpu-registered-target, lld
 
 // RUN: %clang -x hip --target=x86_64-unknown-linux-gnu 
--no-offload-new-driver \
 // RUN:   --offload-arch=gfx906 -c -nostdinc -nogpuinc -nohipwrapperinc \
diff --git a/clang/test/Driver/hip-temps-linux.hip 
b/clang/test/Driver/hip-temps-linux.hip
index 83a7528dd4560a..3fb8a94a3463c8 100644
--- a/clang/test/Driver/hip-temps-linux.hip
+++ b/clang/test/Driver/hip-temps-linux.hip
@@ -1,6 +1,5 @@
 // REQUIRES: x86-registered-target
 // REQUIRES: amdgpu-registered-target
-// REQUIRES: system-linux
 
 // Check no temporary files or directores are left after compilation.
 // RUN: rm -rf %t/mytmp
diff --git a/clang/test/Driver/linker-wrapper.c 
b/clang/test/Driver/linker-wrapper.c
index 068ea2d7d3c663..976f7c170fdd69 100644
--- a/clang/test/Driver/linker-wrapper.c
+++ b/clang/test/Driver/linker-wrapper.c
@@ -2,8 +2,6 @@
 // REQUIRES: nvptx-registered-target
 // REQUIRES: amdgpu-registered-target
 
-// REQUIRES: system-linux
-
 // An externally visible variable so static libraries extract.
 __attribute__((visibility("protected"), used)) int x;
 
@@ -30,7 +28,7 @@ __attribute__((visibility("protected"), used)) int x;
 // RUN: clang-linker-wrapper --host-triple=x86_64-unknown-linux-gnu --dry-run 
--device-debug -O0 \
 // RUN:   --linker-path=/usr/bin/ld %t.o -o a.out 2>&1 | FileCheck %s 
--check-prefix=NVPTX-LINK-DEBUG
 
-// NVPTX-LINK-DEBUG: clang{{.*}} -o {{.*}}.img --target=nvptx64-nvidia-cuda 
-march=sm_70 -O2 -flto {{.*}}.o {{.*}}.o -g 
+// NVPTX-LINK-DEBUG: clang{{.*}} -o {{.*}}.img --target=nvptx64-nvidia-cuda 
-march=sm_70 -O2 -flto {{.*}}.o {{.*}}.o -g
 
 // RUN: clang-offload-packager -o %t.out \
 // RUN:   
--image=file=%t.elf.o,kind=openmp,triple=amdgcn-amd-amdhsa,arch=gfx908 \
@@ -93,7 +91,7 @@ __attribute__((visibility("protected"), used)) int x;
 
 // CUDA: clang{{.*}} -o [[IMG_SM70:.+]] --target=nvptx64-nvidia-cuda 
-march=sm_70
 // CUDA: clang{{.*}} -o [[IMG_SM52:.+]] --target=nvptx64-nvidia-cuda 
-march=sm_52
-// CUDA: fatbinary{{.*}}-64 --create {{.*}}.fatbin 
--image=profile=sm_70,file=[[IMG_SM70]] --image=profile=sm_52,file=[[IMG_SM52]] 
+// CUDA: fatbinary{{.*}}-64 --create {{.*}}.fatbin 
--image=profile=sm_70,file=[[IMG_SM70]] --image=profile=sm_52,file=[[IMG_SM52]]
 // CUDA: usr/bin/ld{{.*}} {{.*}}.openmp.image.{{.*}}.o 
{{.*}}.cuda.image.{{.*}}.o
 
 // RUN: clang-offload-packager -o %t.out \
diff --git a/clang/test/Driver/nvptx-cuda-system-arch.c 
b/clang/test/Driver/nvptx-cuda-system-arch.c
index 6a8a218406d139..b6a7617930fc19 100644
--- a/clang/test/Driver/nvptx-cuda-system-arch.c
+++ b/clang/test/Driver/nvptx-cuda-system-arch.c
@@ -1,4 +1,3 @@
-// REQUIRES: system-linux
 // REQUIRES: shell
 
 // RUN: mkdir -p %t
diff --git a/clang/test/Driver/openmp-system-arch.c 
b/clang/test/Driver/openmp-system-arch.c
index cd49f460099666..75322dae69de46 100644
--- a/clang/test/Driver/openmp-system-arch.c
+++ b/clang/test/Driver/openmp-system-arch.c
@@ -1,4 +1,3 @@
-// REQUIRES: system-linux
 // REQUIRES: shell
 
 // RUN: mkdir -p %t

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[llvm-branch-commits] [clang] clang: Remove requires system-linux from some driver tests (PR #111976)

2024-10-11 Thread via llvm-branch-commits


llvmbot wrote:




@llvm/pr-subscribers-clang-driver

Author: Matt Arsenault (arsenm)


Changes

Works for me on macos.

---
Full diff: https://github.com/llvm/llvm-project/pull/111976.diff


7 Files Affected:

- (modified) clang/test/Driver/amdgpu-hip-system-arch.c (-1) 
- (modified) clang/test/Driver/amdgpu-openmp-system-arch-fail.c (-1) 
- (modified) clang/test/Driver/hip-partial-link.hip (+1-1) 
- (modified) clang/test/Driver/hip-temps-linux.hip (-1) 
- (modified) clang/test/Driver/linker-wrapper.c (+2-4) 
- (modified) clang/test/Driver/nvptx-cuda-system-arch.c (-1) 
- (modified) clang/test/Driver/openmp-system-arch.c (-1) 


``diff
diff --git a/clang/test/Driver/amdgpu-hip-system-arch.c 
b/clang/test/Driver/amdgpu-hip-system-arch.c
index f25a4087080f6d..7be7b9cad1be02 100644
--- a/clang/test/Driver/amdgpu-hip-system-arch.c
+++ b/clang/test/Driver/amdgpu-hip-system-arch.c
@@ -1,4 +1,3 @@
-// REQUIRES: system-linux
 // REQUIRES: shell
 
 // RUN: mkdir -p %t
diff --git a/clang/test/Driver/amdgpu-openmp-system-arch-fail.c 
b/clang/test/Driver/amdgpu-openmp-system-arch-fail.c
index 85c82e4598cb10..b7e1d0b2c56659 100644
--- a/clang/test/Driver/amdgpu-openmp-system-arch-fail.c
+++ b/clang/test/Driver/amdgpu-openmp-system-arch-fail.c
@@ -1,4 +1,3 @@
-// REQUIRES: system-linux
 // REQUIRES: shell
 
 // RUN: mkdir -p %t
diff --git a/clang/test/Driver/hip-partial-link.hip 
b/clang/test/Driver/hip-partial-link.hip
index c8451ec81ed37e..0bb8a848f80718 100644
--- a/clang/test/Driver/hip-partial-link.hip
+++ b/clang/test/Driver/hip-partial-link.hip
@@ -1,4 +1,4 @@
-// REQUIRES: x86-registered-target, amdgpu-registered-target, lld, system-linux
+// REQUIRES: x86-registered-target, amdgpu-registered-target, lld
 
 // RUN: %clang -x hip --target=x86_64-unknown-linux-gnu 
--no-offload-new-driver \
 // RUN:   --offload-arch=gfx906 -c -nostdinc -nogpuinc -nohipwrapperinc \
diff --git a/clang/test/Driver/hip-temps-linux.hip 
b/clang/test/Driver/hip-temps-linux.hip
index 83a7528dd4560a..3fb8a94a3463c8 100644
--- a/clang/test/Driver/hip-temps-linux.hip
+++ b/clang/test/Driver/hip-temps-linux.hip
@@ -1,6 +1,5 @@
 // REQUIRES: x86-registered-target
 // REQUIRES: amdgpu-registered-target
-// REQUIRES: system-linux
 
 // Check no temporary files or directores are left after compilation.
 // RUN: rm -rf %t/mytmp
diff --git a/clang/test/Driver/linker-wrapper.c 
b/clang/test/Driver/linker-wrapper.c
index 068ea2d7d3c663..976f7c170fdd69 100644
--- a/clang/test/Driver/linker-wrapper.c
+++ b/clang/test/Driver/linker-wrapper.c
@@ -2,8 +2,6 @@
 // REQUIRES: nvptx-registered-target
 // REQUIRES: amdgpu-registered-target
 
-// REQUIRES: system-linux
-
 // An externally visible variable so static libraries extract.
 __attribute__((visibility("protected"), used)) int x;
 
@@ -30,7 +28,7 @@ __attribute__((visibility("protected"), used)) int x;
 // RUN: clang-linker-wrapper --host-triple=x86_64-unknown-linux-gnu --dry-run 
--device-debug -O0 \
 // RUN:   --linker-path=/usr/bin/ld %t.o -o a.out 2>&1 | FileCheck %s 
--check-prefix=NVPTX-LINK-DEBUG
 
-// NVPTX-LINK-DEBUG: clang{{.*}} -o {{.*}}.img --target=nvptx64-nvidia-cuda 
-march=sm_70 -O2 -flto {{.*}}.o {{.*}}.o -g 
+// NVPTX-LINK-DEBUG: clang{{.*}} -o {{.*}}.img --target=nvptx64-nvidia-cuda 
-march=sm_70 -O2 -flto {{.*}}.o {{.*}}.o -g
 
 // RUN: clang-offload-packager -o %t.out \
 // RUN:   
--image=file=%t.elf.o,kind=openmp,triple=amdgcn-amd-amdhsa,arch=gfx908 \
@@ -93,7 +91,7 @@ __attribute__((visibility("protected"), used)) int x;
 
 // CUDA: clang{{.*}} -o [[IMG_SM70:.+]] --target=nvptx64-nvidia-cuda 
-march=sm_70
 // CUDA: clang{{.*}} -o [[IMG_SM52:.+]] --target=nvptx64-nvidia-cuda 
-march=sm_52
-// CUDA: fatbinary{{.*}}-64 --create {{.*}}.fatbin 
--image=profile=sm_70,file=[[IMG_SM70]] --image=profile=sm_52,file=[[IMG_SM52]] 
+// CUDA: fatbinary{{.*}}-64 --create {{.*}}.fatbin 
--image=profile=sm_70,file=[[IMG_SM70]] --image=profile=sm_52,file=[[IMG_SM52]]
 // CUDA: usr/bin/ld{{.*}} {{.*}}.openmp.image.{{.*}}.o 
{{.*}}.cuda.image.{{.*}}.o
 
 // RUN: clang-offload-packager -o %t.out \
diff --git a/clang/test/Driver/nvptx-cuda-system-arch.c 
b/clang/test/Driver/nvptx-cuda-system-arch.c
index 6a8a218406d139..b6a7617930fc19 100644
--- a/clang/test/Driver/nvptx-cuda-system-arch.c
+++ b/clang/test/Driver/nvptx-cuda-system-arch.c
@@ -1,4 +1,3 @@
-// REQUIRES: system-linux
 // REQUIRES: shell
 
 // RUN: mkdir -p %t
diff --git a/clang/test/Driver/openmp-system-arch.c 
b/clang/test/Driver/openmp-system-arch.c
index cd49f460099666..75322dae69de46 100644
--- a/clang/test/Driver/openmp-system-arch.c
+++ b/clang/test/Driver/openmp-system-arch.c
@@ -1,4 +1,3 @@
-// REQUIRES: system-linux
 // REQUIRES: shell
 
 // RUN: mkdir -p %t

``




https://github.com/llvm/llvm-project/pull/111976
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[llvm-branch-commits] [clang] clang: Remove requires system-linux from some driver tests (PR #111976)

2024-10-11 Thread Matt Arsenault via llvm-branch-commits


https://github.com/arsenm ready_for_review 
https://github.com/llvm/llvm-project/pull/111976
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[llvm-branch-commits] [clang] [Clang] Improve type traits recognition in `__has_builtin` (#111516) (PR #111660)

2024-10-11 Thread Aaron Ballman via llvm-branch-commits


AaronBallman wrote:

> @AaronBallman ok to backport?

Yeah, seems reasonable to me.

https://github.com/llvm/llvm-project/pull/111660
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[llvm-branch-commits] [clang] clang: Remove requires system-linux from some driver tests (PR #111976)

2024-10-11 Thread Sean Perry via llvm-branch-commits


https://github.com/perry-ca commented:

Three of these tests will fail on z/OS when the requires is removed.  It would 
be great if they can be fixed so they work on z/OS.  None of these are 
available or supported on z/OS so marking them as unsupported on system-zos is 
also an option.

@daltenty do you want to check AIX too?
Thanks.

https://github.com/llvm/llvm-project/pull/111976
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[llvm-branch-commits] [clang] clang: Remove requires system-linux from some driver tests (PR #111976)

2024-10-11 Thread Sean Perry via llvm-branch-commits


https://github.com/perry-ca edited 
https://github.com/llvm/llvm-project/pull/111976
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[llvm-branch-commits] [clang] clang: Remove requires system-linux from some driver tests (PR #111976)

2024-10-11 Thread Sean Perry via llvm-branch-commits



@@ -1,4 +1,3 @@
-// REQUIRES: system-linux

perry-ca wrote:

This is failing on z/OS on line 33 with the error:
```
clang: error: failed to deduce triple for target architecture 'native'; specify 
the triple using '-fopenmp-targets' and '-Xopenmp-target' instead
```
Not deducing the target gpu causes wrong -target-cpu to be specified.

If it can be fixed great.  If not can you add:
```
UNSUPPORTED: system-zos
```

https://github.com/llvm/llvm-project/pull/111976
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[llvm-branch-commits] [clang] clang: Remove requires system-linux from some driver tests (PR #111976)

2024-10-11 Thread Sean Perry via llvm-branch-commits



@@ -1,4 +1,3 @@
-// REQUIRES: system-linux

perry-ca wrote:

The compile & test on line 47 is failing on z/OS with the following message:
```
clang: error: cannot determine amdgcn architecture: No AMD GPU detected in the 
system; consider passing it via '--offload-arch'; environment variable 
CLANG_TOOLCHAIN_PROGRAM_TIMEOUT specifies the tool timeout (integer secs, <=0 
is infinite)
```
I'm not sure if there is a way to fix this (eg. wildcard in the expected output 
or a compiler option).  If there isn't can you add:
```
UNSUPPORTED: system-zos
```

https://github.com/llvm/llvm-project/pull/111976
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[llvm-branch-commits] [clang] clang: Remove requires system-linux from some driver tests (PR #111976)

2024-10-11 Thread Sean Perry via llvm-branch-commits



@@ -1,4 +1,3 @@
-// REQUIRES: system-linux

perry-ca wrote:

This is failing on z/OS on line 28 (ARCH_sm70 check).  The actual cc1 line is:
```
clang: warning: CUDA version is newer than the latest partially supported 
version 12.5 [-Wunknown-cuda-version]
clang: error: cannot determine nvptx64 architecture: No NVIDIA GPU detected in 
the system; consider passing it via '--offload-arch'; environment variable 
CLANG_TOOLCHAIN_PROGRAM_TIMEOUT specifies the tool timeout (integer secs, <=0 
is infinite)
 "/plex/perry/llvm/Woz/build/bin/clang-20" "-cc1" "-triple" 
"nvptx64-nvidia-cuda" "-aux-triple" "x86_64-unknown-linux-gnu" "-S" "-dumpdir" 
"a-" "-disable-free" "-clear-ast-before-backend" "-disable-llvm-verifier" 
"-discard-value-names" "-main-file-name" "nvptx-cuda-system-arch.c" 
"-mrelocation-model" "static" "-mframe-pointer=all" "-fno-rounding-math" 
"-no-integrated-as" "-aux-target-cpu" "x86-64" "-fcuda-is-device" "-mllvm" 
"-enable-memcpyopt-without-libcalls" "-fcuda-allow-variadic-functions" 
"-target-cpu" "sm_52" "-target-feature" "+ptx85" "-debugger-tuning=gdb" 
"-fno-dwarf-directory-asm" 
"-fdebug-compilation-dir=/plex/perry/llvm/Woz/llvm-project/clang/test/Driver" 
"-resource-dir" "/plex/perry/llvm/Woz/build/lib/clang/20" "-internal-isystem" 
"/plex/perry/llvm/Woz/build/lib/clang/20/include/cuda_wrappers" "-include" 
"__clang_cuda_runtime_wrapper.h" "-internal-isystem" 
"/plex/perry/llvm/Woz/build/lib/clang/20/include" "-internal-isystem" 
"/usr/local/include" "-internal-externc-isystem" "/include" 
"-internal-externc-isystem" "/usr/include" "-internal-isystem" 
"/plex/perry/llvm/Woz/llvm-project/clang/test/Driver/Inputs/CUDA_102/usr/local/cuda/include"
 "-internal-isystem" "/plex/perry/llvm/Woz/build/lib/clang/20/include" 
"-internal-isystem" "/usr/local/include" "-internal-externc-isystem" "/include" 
"-internal-externc-isystem" "/usr/include" "-fdeprecated-macro" "-fno-autolink" 
"-ferror-limit" "19" "-nogpulib" "-fgnuc-version=4.2.1" "-mno-csect" 
"-fskip-odr-check-in-gmf" "-fcxx-exceptions" "-fexceptions" "-fexec-charset" 
"UTF-8" "-fcolor-diagnostics" "-cuid=15151f95f8ae4b17" 
"-D__GCC_HAVE_DWARF2_CFI_ASM=1" "-o" 
"/plex/perry/tmp/nvptx-cuda-system-arch-sm_52-77f5c9.s" "-x" "cuda" 
"/plex/perry/llvm/Woz/llvm-project/clang/test/Driver/nvptx-cuda-system-arch.c"
```
This has sm_52 as the target_gpu instead of sm_70.  Can you either fix it or 
add:
```
UNSUPPORTED: system-zos
```

https://github.com/llvm/llvm-project/pull/111976
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[llvm-branch-commits] [llvm] release/19.x: [VectorCombine] Do not try to operate on OperandBundles. (#111635) (PR #111796)

2024-10-11 Thread Mosè Giordano via llvm-branch-commits

giordano wrote:

> and I had assumed from https://github.com/JuliaPackaging/Yggdrasil/pull/9204 
> that this was related to pulling clang-19 into Julia.

LLVM, rather than Clang specifically, but yes, we're updating it to v19 for 
Julia.  Maybe @Zentrik can comment about how they got into #110382, if 
necessary.

https://github.com/llvm/llvm-project/pull/111796
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[llvm-branch-commits] [clang] release/19.x: [SystemZ] Fix codegen for _[u]128 intrinsics (PR #111376)

2024-10-11 Thread Ulrich Weigand via llvm-branch-commits

uweigand wrote:

> @uweigand (or anyone else). If you would like to add a note about this fix in 
> the release notes (completely optional). Please reply to this comment with a 
> one or two sentence description of the fix. When you are done, please add the 
> release:note label to this PR.

Fix a regression introduced with the LLVM 18 release, which caused incorrect 
code to be generated by the following SystemZ vector intrinsics: vec_add_u128, 
vec_addc_u128, vec_adde_u128, vec_addec_u128, vec_sub_u128, vec_subc_u128, 
vec_sube_u128, vec_subec_u128, vec_sum_u128, vec_msum_u128, vec_gfmsum_128, 
vec_gfmsum_accum_128.

https://github.com/llvm/llvm-project/pull/111376
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[llvm-branch-commits] [clang] clang: Remove requires system-linux from some driver tests (PR #111976)

2024-10-11 Thread Matt Arsenault via llvm-branch-commits



@@ -1,4 +1,3 @@
-// REQUIRES: system-linux

arsenm wrote:

This can't really be a property of zos or any other system. It works for me on 
systems without AMDGPUs and other OSes. You are seeing the error after the 
environment variable parse error, so why did this proceed beyond that point? 

https://github.com/llvm/llvm-project/pull/111976
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[llvm-branch-commits] [NFC][sanitizer] Add Debug utility to print thread history (PR #111948)

2024-10-11 Thread Florian Mayer via llvm-branch-commits



@@ -0,0 +1,73 @@
+//===-- sanitizer_thread_history.cpp 
--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#include "sanitizer_thread_history.h"
+
+#include "sanitizer_stackdepot.h"
+namespace __sanitizer {
+
+void PrintThreadHistory(ThreadRegistry ®istry, InternalScopedString &out) {
+  ThreadRegistryLock l(®istry);
+  // Stack traces are largest part of printout and they often the same for
+  // multiple threads, so we will deduplicate them.
+  InternalMmapVector stacks;
+
+  registry.RunCallbackForEachThreadLocked(
+  [](ThreadContextBase *context, void *arg) {
+static_cast(arg)->push_back(context);
+  },
+  &stacks);
+
+  Sort(stacks.data(), stacks.size(),
+   [](const ThreadContextBase *a, const ThreadContextBase *b) {
+ if (a->stack_id < b->stack_id)
+   return true;
+ if (a->stack_id > b->stack_id)
+   return false;
+ return a->tid < b->tid;
+   });
+
+  auto describe_thread = [&](const ThreadContextBase *context) {
+if (!context) {
+  out.Append("T-1");
+  return;
+}
+out.AppendF("T%llu/%llu", context->unique_id, context->os_id);
+if (internal_strlen(context->name))
+  out.AppendF(" (%s)", context->name);
+  };
+
+  auto get_parent =
+  [&](const ThreadContextBase *context) -> const ThreadContextBase * {
+if (!context)
+  return nullptr;
+ThreadContextBase *parent = registry.GetThreadLocked(context->parent_tid);
+if (!parent)
+  return nullptr;
+if (parent->unique_id >= context->unique_id)
+  return nullptr;
+return parent;
+  };
+
+  u32 stack_id = 0;
+  for (const ThreadContextBase *context : stacks) {
+if (stack_id != context->stack_id) {
+  StackDepotGet(stack_id).PrintTo(&out);
+  stack_id = context->stack_id;
+}
+out.Append("Thread ");
+describe_thread(context);
+out.Append(" was created by ");
+describe_thread(get_parent(context));
+out.Append("\n");
+  }
+  if (!stacks.empty())
+StackDepotGet(stack_id).PrintTo(&out);

fmayer wrote:

Doesn't this potentially double print?

https://github.com/llvm/llvm-project/pull/111948
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[llvm-branch-commits] [clang] clang: Remove requires system-linux from some driver tests (PR #111976)

2024-10-11 Thread Sean Perry via llvm-branch-commits



@@ -1,4 +1,3 @@
-// REQUIRES: system-linux

perry-ca wrote:

I agree.  By fixing it, I was referring to the code in clang that determines 
this value.  If it's easy to make the test pass on z/OS great.  If not marking 
it as unsupported works too.  This applies to my other comment too.


https://github.com/llvm/llvm-project/pull/111976
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[llvm-branch-commits] [libcxx] [release/19.x][libc++] Adjust the version of __cpp_lib_ranges in C++20 mode (PR #109324)

2024-10-11 Thread Louis Dionne via llvm-branch-commits


https://github.com/ldionne commented:

LGTM thanks!

https://github.com/llvm/llvm-project/pull/109324
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[llvm-branch-commits] [clang] clang: Remove requires system-linux from some driver tests (PR #111976)

2024-10-11 Thread Matt Arsenault via llvm-branch-commits



@@ -1,4 +1,3 @@
-// REQUIRES: system-linux

arsenm wrote:

The result should definitely be sm_70, that's what the provided script produces 

https://github.com/llvm/llvm-project/pull/111976
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[llvm-branch-commits] [llvm] ebfd295 - Revert "[AMDGPU] Avoid resource propagation for recursion through multiple fu…"

2024-10-11 Thread via llvm-branch-commits


Author: Janek van Oirschot
Date: 2024-10-11T17:01:32+01:00
New Revision: ebfd2950a25f5e8ff89e63c8c2cb7825a5a2d162

URL: 
https://github.com/llvm/llvm-project/commit/ebfd2950a25f5e8ff89e63c8c2cb7825a5a2d162
DIFF: 
https://github.com/llvm/llvm-project/commit/ebfd2950a25f5e8ff89e63c8c2cb7825a5a2d162.diff

LOG: Revert "[AMDGPU] Avoid resource propagation for recursion through multiple 
fu…"

This reverts commit 67160c5ab5f5b7fd5fa7851abcfde367c8a9f91b.

Added: 


Modified: 
llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.cpp
llvm/test/CodeGen/AMDGPU/function-resource-usage.ll

Removed: 
llvm/test/CodeGen/AMDGPU/recursive-resource-usage-mcexpr.ll



diff  --git a/llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.cpp 
b/llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.cpp
index 62caec4d6dd716..da0397fa20bd1b 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.cpp
@@ -91,69 +91,6 @@ MCSymbol *MCResourceInfo::getMaxSGPRSymbol(MCContext 
&OutContext) {
   return OutContext.getOrCreateSymbol("amdgpu.max_num_sgpr");
 }
 
-// The (partially complete) expression should have no recursion in it. After
-// all, we're trying to avoid recursion using this codepath. Returns true if
-// Sym is found within Expr without recursing on Expr, false otherwise.
-static bool findSymbolInExpr(MCSymbol *Sym, const MCExpr *Expr,
- SmallVectorImpl &Exprs,
- SmallPtrSetImpl &Visited) {
-  // Assert if any of the expressions is already visited (i.e., there is
-  // existing recursion).
-  if (!Visited.insert(Expr).second)
-llvm_unreachable("already visited expression");
-
-  switch (Expr->getKind()) {
-  default:
-return false;
-  case MCExpr::ExprKind::SymbolRef: {
-const MCSymbolRefExpr *SymRefExpr = cast(Expr);
-const MCSymbol &SymRef = SymRefExpr->getSymbol();
-if (Sym == &SymRef)
-  return true;
-if (SymRef.isVariable())
-  Exprs.push_back(SymRef.getVariableValue(/*isUsed=*/false));
-return false;
-  }
-  case MCExpr::ExprKind::Binary: {
-const MCBinaryExpr *BExpr = cast(Expr);
-Exprs.push_back(BExpr->getLHS());
-Exprs.push_back(BExpr->getRHS());
-return false;
-  }
-  case MCExpr::ExprKind::Unary: {
-const MCUnaryExpr *UExpr = cast(Expr);
-Exprs.push_back(UExpr->getSubExpr());
-return false;
-  }
-  case MCExpr::ExprKind::Target: {
-const AMDGPUMCExpr *AGVK = cast(Expr);
-for (const MCExpr *E : AGVK->getArgs())
-  Exprs.push_back(E);
-return false;
-  }
-  }
-}
-
-// Symbols whose values eventually are used through their defines (i.e.,
-// recursive) must be avoided. Do a walk over Expr to see if Sym will occur in
-// it. The Expr is an MCExpr given through a callee's equivalent MCSymbol so if
-// no recursion is found Sym can be safely assigned to a (sub-)expr which
-// contains the symbol Expr is associated with. Returns true if Sym exists
-// in Expr or its sub-expressions, false otherwise.
-static bool foundRecursiveSymbolDef(MCSymbol *Sym, const MCExpr *Expr) {
-  SmallVector WorkList;
-  SmallPtrSet Visited;
-  WorkList.push_back(Expr);
-
-  while (!WorkList.empty()) {
-const MCExpr *CurExpr = WorkList.pop_back_val();
-if (findSymbolInExpr(Sym, CurExpr, WorkList, Visited))
-  return true;
-  }
-
-  return false;
-}
-
 void MCResourceInfo::assignResourceInfoExpr(
 int64_t LocalValue, ResourceInfoKind RIK, AMDGPUMCExpr::VariantKind Kind,
 const MachineFunction &MF, const SmallVectorImpl 
&Callees,
@@ -161,7 +98,6 @@ void MCResourceInfo::assignResourceInfoExpr(
   const MCConstantExpr *LocalConstExpr =
   MCConstantExpr::create(LocalValue, OutContext);
   const MCExpr *SymVal = LocalConstExpr;
-  MCSymbol *Sym = getSymbol(MF.getName(), RIK, OutContext);
   if (!Callees.empty()) {
 SmallVector ArgExprs;
 // Avoid recursive symbol assignment.
@@ -174,17 +110,11 @@ void MCResourceInfo::assignResourceInfoExpr(
   if (!Seen.insert(Callee).second)
 continue;
   MCSymbol *CalleeValSym = getSymbol(Callee->getName(), RIK, OutContext);
-  bool CalleeIsVar = CalleeValSym->isVariable();
-  if (!CalleeIsVar ||
-  (CalleeIsVar &&
-   !foundRecursiveSymbolDef(
-   Sym, CalleeValSym->getVariableValue(/*IsUsed=*/false {
-ArgExprs.push_back(MCSymbolRefExpr::create(CalleeValSym, OutContext));
-  }
+  ArgExprs.push_back(MCSymbolRefExpr::create(CalleeValSym, OutContext));
 }
-if (ArgExprs.size() > 1)
-  SymVal = AMDGPUMCExpr::create(Kind, ArgExprs, OutContext);
+SymVal = AMDGPUMCExpr::create(Kind, ArgExprs, OutContext);
   }
+  MCSymbol *Sym = getSymbol(MF.getName(), RIK, OutContext);
   Sym->setVariableValue(SymVal);
 }
 
@@ -225,7 +155,6 @@ void MCResourceInfo::gatherResourceInfo(
 // The expression for private segment size should be: 
FRI.PrivateSegmentSi

[llvm-branch-commits] [clang] release/19.x: [clang-repl] [codegen] Reduce the state in TBAA. NFC for static compilation. (#98138) (PR #111953)

2024-10-11 Thread Eli Friedman via llvm-branch-commits


https://github.com/efriedma-quic approved this pull request.

LGTM

I'm a little concerned about messing with datastructures in headers, but I 
think, since the headers in question aren't exposed in clang/include, this 
doesn't have any visible ABI effect.

Otherwise this is a pretty safe refactoring.

https://github.com/llvm/llvm-project/pull/111953
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[llvm-branch-commits] [BOLT][NFC] Speedup BAT::writeMaps (PR #112061)

2024-10-11 Thread Amir Ayupov via llvm-branch-commits


https://github.com/aaupov updated 
https://github.com/llvm/llvm-project/pull/112061


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[llvm-branch-commits] [BOLT][NFC] Speedup BAT::writeMaps (PR #112061)

2024-10-11 Thread Amir Ayupov via llvm-branch-commits


https://github.com/aaupov updated 
https://github.com/llvm/llvm-project/pull/112061


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[llvm-branch-commits] [clang] release/19.x: [clang-format] Handle template closer followed by braces (#110971) (PR #111958)

2024-10-11 Thread Owen Pan via llvm-branch-commits


https://github.com/owenca approved this pull request.


https://github.com/llvm/llvm-project/pull/111958
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[llvm-branch-commits] [llvm] FastISel: Fix incorrectly using getPointerTy (#110465) (PR #110827)

2024-10-11 Thread Nikita Popov via llvm-branch-commits


https://github.com/nikic approved this pull request.

LGTM

https://github.com/llvm/llvm-project/pull/110827
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[llvm-branch-commits] [llvm] AArch64: Remove incorrect REQUIRES arm-registered-target from test (PR #111983)

2024-10-11 Thread Matt Arsenault via llvm-branch-commits


https://github.com/arsenm created 
https://github.com/llvm/llvm-project/pull/111983

The test only depends on AArch64 as it should.

>From b0146e190daaea20a9e5bae9f358590541729d6a Mon Sep 17 00:00:00 2001
From: Matt Arsenault 
Date: Fri, 11 Oct 2024 15:16:30 +0400
Subject: [PATCH] AArch64: Remove incorrect REQUIRES arm-registered-target from
 test

The test only depends on AArch64 as it should.
---
 llvm/test/CodeGen/AArch64/vecreduce-propagate-sd-flags.ll | 1 -
 1 file changed, 1 deletion(-)

diff --git a/llvm/test/CodeGen/AArch64/vecreduce-propagate-sd-flags.ll 
b/llvm/test/CodeGen/AArch64/vecreduce-propagate-sd-flags.ll
index 823fdfb4809768..830f1efbdf67f6 100644
--- a/llvm/test/CodeGen/AArch64/vecreduce-propagate-sd-flags.ll
+++ b/llvm/test/CodeGen/AArch64/vecreduce-propagate-sd-flags.ll
@@ -1,4 +1,3 @@
-; REQUIRES: arm-registered-target
 ; REQUIRES: asserts
 ; RUN: llc -o /dev/null %s -debug-only=legalize-types 2>&1 | FileCheck %s
 

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[llvm-branch-commits] [llvm] AArch64: Remove incorrect REQUIRES arm-registered-target from test (PR #111983)

2024-10-11 Thread Matt Arsenault via llvm-branch-commits


arsenm wrote:

> [!WARNING]
> This pull request is not mergeable via GitHub because a downstack PR is 
> open. Once all requirements are satisfied, merge this PR as a stack  href="https://app.graphite.dev/github/pr/llvm/llvm-project/111983?utm_source=stack-comment-downstack-mergeability-warning";
>  >on Graphite.
> https://graphite.dev/docs/merge-pull-requests";>Learn more

* **#111983** https://app.graphite.dev/github/pr/llvm/llvm-project/111983?utm_source=stack-comment-icon";
 target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" 
width="10px" height="10px"/> 👈
* **#111982** https://app.graphite.dev/github/pr/llvm/llvm-project/111982?utm_source=stack-comment-icon";
 target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" 
width="10px" height="10px"/>
* `main`

This stack of pull requests is managed by Graphite. https://stacking.dev/?utm_source=stack-comment";>Learn more about 
stacking.


 Join @arsenm and the rest of your teammates on https://graphite.dev?utm-source=stack-comment";>https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" 
width="11px" height="11px"/> Graphite
  

https://github.com/llvm/llvm-project/pull/111983
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[llvm-branch-commits] [llvm] AArch64: Remove incorrect REQUIRES arm-registered-target from test (PR #111983)

2024-10-11 Thread via llvm-branch-commits


llvmbot wrote:




@llvm/pr-subscribers-backend-aarch64

Author: Matt Arsenault (arsenm)


Changes

The test only depends on AArch64 as it should.

---
Full diff: https://github.com/llvm/llvm-project/pull/111983.diff


1 Files Affected:

- (modified) llvm/test/CodeGen/AArch64/vecreduce-propagate-sd-flags.ll (-1) 


``diff
diff --git a/llvm/test/CodeGen/AArch64/vecreduce-propagate-sd-flags.ll 
b/llvm/test/CodeGen/AArch64/vecreduce-propagate-sd-flags.ll
index 823fdfb4809768..830f1efbdf67f6 100644
--- a/llvm/test/CodeGen/AArch64/vecreduce-propagate-sd-flags.ll
+++ b/llvm/test/CodeGen/AArch64/vecreduce-propagate-sd-flags.ll
@@ -1,4 +1,3 @@
-; REQUIRES: arm-registered-target
 ; REQUIRES: asserts
 ; RUN: llc -o /dev/null %s -debug-only=legalize-types 2>&1 | FileCheck %s
 

``




https://github.com/llvm/llvm-project/pull/111983
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[llvm-branch-commits] [llvm] AArch64: Remove incorrect REQUIRES arm-registered-target from test (PR #111983)

2024-10-11 Thread Matt Arsenault via llvm-branch-commits


https://github.com/arsenm ready_for_review 
https://github.com/llvm/llvm-project/pull/111983
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[llvm-branch-commits] [llvm] Backport "[InstCombine] Drop range attributes in `foldIsPowerOf2` (#111946)" (PR #111984)

2024-10-11 Thread Yingwei Zheng via llvm-branch-commits


https://github.com/dtcxzyw milestoned 
https://github.com/llvm/llvm-project/pull/111984
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[llvm-branch-commits] [llvm] Backport "[InstCombine] Drop range attributes in `foldIsPowerOf2` (#111946)" (PR #111984)

2024-10-11 Thread Yingwei Zheng via llvm-branch-commits


https://github.com/dtcxzyw created 
https://github.com/llvm/llvm-project/pull/111984

Backport 
https://github.com/llvm/llvm-project/commit/6a65e98fa7901dc1de91172d065fafb16ce89d77.

As https://github.com/llvm/llvm-project/pull/100899 exists in 19.x code base, I 
guess 19.x is also a vulnerable version.


>From aaa8b792a82e29e8e5931a3c7705f623a1bb7e50 Mon Sep 17 00:00:00 2001
From: Yingwei Zheng 
Date: Fri, 11 Oct 2024 18:19:21 +0800
Subject: [PATCH] [InstCombine] Drop range attributes in `foldIsPowerOf2`
 (#111946)

Fixes https://github.com/llvm/llvm-project/issues/111934.
---
 .../InstCombine/InstCombineAndOrXor.cpp   | 18 ---
 llvm/test/Transforms/InstCombine/ispow2.ll| 32 +++
 2 files changed, 45 insertions(+), 5 deletions(-)

diff --git a/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp 
b/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
index f9caa4da44931a..3222e8298c3f0b 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
@@ -926,9 +926,11 @@ static Value *foldIsPowerOf2OrZero(ICmpInst *Cmp0, 
ICmpInst *Cmp1, bool IsAnd,
 }
 
 /// Reduce a pair of compares that check if a value has exactly 1 bit set.
-/// Also used for logical and/or, must be poison safe.
+/// Also used for logical and/or, must be poison safe if range attributes are
+/// dropped.
 static Value *foldIsPowerOf2(ICmpInst *Cmp0, ICmpInst *Cmp1, bool JoinedByAnd,
- InstCombiner::BuilderTy &Builder) {
+ InstCombiner::BuilderTy &Builder,
+ InstCombinerImpl &IC) {
   // Handle 'and' / 'or' commutation: make the equality check the first 
operand.
   if (JoinedByAnd && Cmp1->getPredicate() == ICmpInst::ICMP_NE)
 std::swap(Cmp0, Cmp1);
@@ -942,7 +944,10 @@ static Value *foldIsPowerOf2(ICmpInst *Cmp0, ICmpInst 
*Cmp1, bool JoinedByAnd,
   match(Cmp1, m_ICmp(Pred1, m_Intrinsic(m_Specific(X)),
  m_SpecificInt(2))) &&
   Pred0 == ICmpInst::ICMP_NE && Pred1 == ICmpInst::ICMP_ULT) {
-Value *CtPop = Cmp1->getOperand(0);
+auto *CtPop = cast(Cmp1->getOperand(0));
+// Drop range attributes and re-infer them in the next iteration.
+CtPop->dropPoisonGeneratingAnnotations();
+IC.addToWorklist(CtPop);
 return Builder.CreateICmpEQ(CtPop, ConstantInt::get(CtPop->getType(), 1));
   }
   // (X == 0) || (ctpop(X) u> 1) --> ctpop(X) != 1
@@ -950,7 +955,10 @@ static Value *foldIsPowerOf2(ICmpInst *Cmp0, ICmpInst 
*Cmp1, bool JoinedByAnd,
   match(Cmp1, m_ICmp(Pred1, m_Intrinsic(m_Specific(X)),
  m_SpecificInt(1))) &&
   Pred0 == ICmpInst::ICMP_EQ && Pred1 == ICmpInst::ICMP_UGT) {
-Value *CtPop = Cmp1->getOperand(0);
+auto *CtPop = cast(Cmp1->getOperand(0));
+// Drop range attributes and re-infer them in the next iteration.
+CtPop->dropPoisonGeneratingAnnotations();
+IC.addToWorklist(CtPop);
 return Builder.CreateICmpNE(CtPop, ConstantInt::get(CtPop->getType(), 1));
   }
   return nullptr;
@@ -3347,7 +3355,7 @@ Value *InstCombinerImpl::foldAndOrOfICmps(ICmpInst *LHS, 
ICmpInst *RHS,
 if (Value *V = foldSignedTruncationCheck(LHS, RHS, I, Builder))
   return V;
 
-  if (Value *V = foldIsPowerOf2(LHS, RHS, IsAnd, Builder))
+  if (Value *V = foldIsPowerOf2(LHS, RHS, IsAnd, Builder, *this))
 return V;
 
   if (Value *V = foldPowerOf2AndShiftedMask(LHS, RHS, IsAnd, Builder))
diff --git a/llvm/test/Transforms/InstCombine/ispow2.ll 
b/llvm/test/Transforms/InstCombine/ispow2.ll
index a143b1347ccee5..216ccc5c77257b 100644
--- a/llvm/test/Transforms/InstCombine/ispow2.ll
+++ b/llvm/test/Transforms/InstCombine/ispow2.ll
@@ -1522,3 +1522,35 @@ define <2 x i1> 
@not_pow2_or_z_known_bits_fail_wrong_cmp(<2 x i32> %xin) {
   %r = icmp ugt <2 x i32> %cnt, 
   ret <2 x i1> %r
 }
+
+; Make sure that range attributes on return values are dropped after merging 
these two icmps
+
+define i1 @has_single_bit(i32 %x) {
+; CHECK-LABEL: @has_single_bit(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:[[POPCNT:%.*]] = call range(i32 0, 33) i32 
@llvm.ctpop.i32(i32 [[X:%.*]])
+; CHECK-NEXT:[[SEL:%.*]] = icmp eq i32 [[POPCNT]], 1
+; CHECK-NEXT:ret i1 [[SEL]]
+;
+entry:
+  %cmp1 = icmp ne i32 %x, 0
+  %popcnt = call range(i32 1, 33) i32 @llvm.ctpop.i32(i32 %x)
+  %cmp2 = icmp ult i32 %popcnt, 2
+  %sel = select i1 %cmp1, i1 %cmp2, i1 false
+  ret i1 %sel
+}
+
+define i1 @has_single_bit_inv(i32 %x) {
+; CHECK-LABEL: @has_single_bit_inv(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:[[POPCNT:%.*]] = call range(i32 0, 33) i32 
@llvm.ctpop.i32(i32 [[X:%.*]])
+; CHECK-NEXT:[[SEL:%.*]] = icmp ne i32 [[POPCNT]], 1
+; CHECK-NEXT:ret i1 [[SEL]]
+;
+entry:
+  %cmp1 = icmp eq i32 %x, 0
+  %popcnt = call range(i32 1, 33) i32 @llvm.ctpop.i32(i32 %x)
+  %cmp2 = icmp ugt i32 %popcnt, 1
+  %sel = select i1 %cmp1, i1 true, i1 %cmp2
+  ret i1 %sel
+}

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