date:20240916

[llvm-branch-commits] [llvm] [X86] Avoid generating nested CALLSEQ for TLS pointer function arguments (PR #106965)

2024-09-16 Thread Fabian Ritter via llvm-branch-commits


https://github.com/ritter-x2a updated 
https://github.com/llvm/llvm-project/pull/106965

>From 1bd72c4ba6c98ced84b3d7d372dc8a3bc7aee7e9 Mon Sep 17 00:00:00 2001
From: Fabian Ritter 
Date: Mon, 2 Sep 2024 05:37:33 -0400
Subject: [PATCH] [X86] Avoid generating nested CALLSEQ for TLS pointer
 function arguments

When a pointer to thread-local storage is passed in a function call,
ISel first lowers the call and wraps the resulting code in CALLSEQ
markers. Afterwards, to compute the pointer to TLS, a call to retrieve
the TLS base address is generated and then wrapped in a set of CALLSEQ
markers. If the latter call is inserted into the call sequence of the
former call, this leads to nested call frames, which are illegal and
lead to errors in the machine verifier.

This patch avoids surrounding the call to compute the TLS base address
in CALLSEQ markers if it is already surrounded by such markers. It
relies on zero-sized call frames being represented in the call frame
size info stored in the MachineBBs.

Fixes #45574 and #98042.
---
 llvm/lib/CodeGen/FinalizeISel.cpp |  6 
 llvm/lib/Target/X86/X86ISelLowering.cpp   |  9 ++
 .../test/CodeGen/X86/tls-function-argument.ll | 30 +++
 3 files changed, 45 insertions(+)
 create mode 100644 llvm/test/CodeGen/X86/tls-function-argument.ll

diff --git a/llvm/lib/CodeGen/FinalizeISel.cpp 
b/llvm/lib/CodeGen/FinalizeISel.cpp
index 477512dc6b0320..a04e0af86cddd5 100644
--- a/llvm/lib/CodeGen/FinalizeISel.cpp
+++ b/llvm/lib/CodeGen/FinalizeISel.cpp
@@ -47,6 +47,12 @@ static std::pair runImpl(MachineFunction &MF) {
   const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();
   const TargetLowering *TLI = MF.getSubtarget().getTargetLowering();
 
+  // Pseudo-Lowering might require the sizes of call frames, so compute them
+  // (lazily). The MachineFrameSizeInfo registers itself in MF's
+  // MachineFrameInfo for the SizeInfo's lifetime and does not need to be 
passed
+  // explicitly.
+  const MachineFrameSizeInfo MFSI(MF);
+
   // Iterate through each instruction in the function, looking for pseudos.
   for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) {
 MachineBasicBlock *MBB = &*I;
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp 
b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 8a1e79fa8a7b75..cecff8682b8d8a 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -35588,6 +35588,15 @@ X86TargetLowering::EmitLoweredTLSAddr(MachineInstr &MI,
   // inside MC, therefore without the two markers shrink-wrapping
   // may push the prologue/epilogue pass them.
   const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
+
+  // Do not introduce CALLSEQ markers if we are already in a call sequence.
+  // Nested call sequences are not allowed and cause errors in the machine
+  // verifier.
+  MachineFrameSizeInfo *MFSI = MI.getMF()->getFrameInfo().getSizeInfo();
+  assert(MFSI && "Call frame size information needs to be available!");
+  if (MFSI->getCallFrameSizeAt(MI).has_value())
+return BB;
+
   const MIMetadata MIMD(MI);
   MachineFunction &MF = *BB->getParent();
 
diff --git a/llvm/test/CodeGen/X86/tls-function-argument.ll 
b/llvm/test/CodeGen/X86/tls-function-argument.ll
new file mode 100644
index 00..9b6ab529db3ea3
--- /dev/null
+++ b/llvm/test/CodeGen/X86/tls-function-argument.ll
@@ -0,0 +1,30 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 
UTC_ARGS: --version 5
+; RUN: llc -mtriple=x86_64 -verify-machineinstrs -relocation-model=pic < %s | 
FileCheck %s
+
+; Passing a pointer to thread-local storage to a function can be problematic
+; since computing such addresses requires a function call that is introduced
+; very late in instruction selection. We need to ensure that we don't introduce
+; nested call sequence markers if this function call happens in a call 
sequence.
+
+@TLS = internal thread_local global i64 zeroinitializer, align 8
+declare void @bar(ptr)
+define internal void @foo() {
+; CHECK-LABEL: foo:
+; CHECK:   # %bb.0:
+; CHECK-NEXT:pushq %rbx
+; CHECK-NEXT:.cfi_def_cfa_offset 16
+; CHECK-NEXT:.cfi_offset %rbx, -16
+; CHECK-NEXT:leaq TLS@TLSLD(%rip), %rdi
+; CHECK-NEXT:callq __tls_get_addr@PLT
+; CHECK-NEXT:leaq TLS@DTPOFF(%rax), %rbx
+; CHECK-NEXT:movq %rbx, %rdi
+; CHECK-NEXT:callq bar@PLT
+; CHECK-NEXT:movq %rbx, %rdi
+; CHECK-NEXT:callq bar@PLT
+; CHECK-NEXT:popq %rbx
+; CHECK-NEXT:.cfi_def_cfa_offset 8
+; CHECK-NEXT:retq
+  call void @bar(ptr @TLS)
+  call void @bar(ptr @TLS)
+  ret void
+}

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[llvm-branch-commits] [NFC][sanitizer] Use RTLD_DEFAULT for _dl_get_tls_static_info (PR #108723)

2024-09-16 Thread Fangrui Song via llvm-branch-commits


https://github.com/MaskRay approved this pull request.


https://github.com/llvm/llvm-project/pull/108723
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[llvm-branch-commits] [clang] 50d3543 - Revert "[clang][codegen] Fix possible crash when setting TBAA metadata on FP …"

2024-09-16 Thread via llvm-branch-commits


Author: Benjamin Maxwell
Date: 2024-09-16T09:44:37+01:00
New Revision: 50d35439b78bc8fdd46d67424f281e2b9440e745

URL: 
https://github.com/llvm/llvm-project/commit/50d35439b78bc8fdd46d67424f281e2b9440e745
DIFF: 
https://github.com/llvm/llvm-project/commit/50d35439b78bc8fdd46d67424f281e2b9440e745.diff

LOG: Revert "[clang][codegen] Fix possible crash when setting TBAA metadata on 
FP …"

This reverts commit a56ca1a0fb248c6f38b5841323a74673748f43ea.

Added: 


Modified: 
clang/lib/CodeGen/CGBuiltin.cpp

Removed: 




diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index a76cd5f9a6f47d..a52e880a764252 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -690,10 +690,8 @@ static RValue emitLibraryCall(CodeGenFunction &CGF, const 
FunctionDecl *FD,
   const CallExpr *E, llvm::Constant *calleeValue) {
   CodeGenFunction::CGFPOptionsRAII FPOptsRAII(CGF, E);
   CGCallee callee = CGCallee::forDirect(calleeValue, GlobalDecl(FD));
-  llvm::CallBase *callOrInvoke = nullptr;
   RValue Call =
-  CGF.EmitCall(E->getCallee()->getType(), callee, E, ReturnValueSlot(),
-   /*Chain=*/nullptr, &callOrInvoke);
+  CGF.EmitCall(E->getCallee()->getType(), callee, E, ReturnValueSlot());
 
   if (unsigned BuiltinID = FD->getBuiltinID()) {
 // Check whether a FP math builtin function, such as BI__builtin_expf
@@ -707,7 +705,8 @@ static RValue emitLibraryCall(CodeGenFunction &CGF, const 
FunctionDecl *FD,
   // Emit "int" TBAA metadata on FP math libcalls.
   clang::QualType IntTy = Context.IntTy;
   TBAAAccessInfo TBAAInfo = CGF.CGM.getTBAAAccessInfo(IntTy);
-  CGF.CGM.DecorateInstructionWithTBAA(callOrInvoke, TBAAInfo);
+  Instruction *Inst = cast(Call.getScalarVal());
+  CGF.CGM.DecorateInstructionWithTBAA(Inst, TBAAInfo);
 }
   }
   return Call;



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[llvm-branch-commits] [compiler-rt] [TySan] Fix struct access with different bases (PR #108385)

2024-09-16 Thread via llvm-branch-commits


gbMattN wrote:

! Oh wow! ... Should the commented out line cause a type violation too? Or is 
everything in the case above (commented line fine, memcpy not) really the 
correct behaviour?

https://github.com/llvm/llvm-project/pull/108385
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[llvm-branch-commits] [clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #108816)

2024-09-16 Thread via llvm-branch-commits


llvmbot wrote:



@llvm/pr-subscribers-backend-x86

@llvm/pr-subscribers-clang

Author: Ganesh (ganeshgit)


Changes

Enables AMD Zen5 family of architectures. The models covered are 

Models 00h-0Fh (Breithorn).
Models 10h-1Fh (Breithorn-Dense).
Models 20h-2Fh (Strix 1).
Models 30h-37h (Strix 2).
Models 38h-3Fh (Strix 3).
Models 40h-4Fh (Granite Ridge).
Models 50h-5Fh (Weisshorn).
Models 60h-6Fh (Krackan1).
Models 70h-77h (Sarlak).

---

Patch is 39.10 KiB, truncated to 20.00 KiB below, full version: 
https://github.com/llvm/llvm-project/pull/108816.diff


30 Files Affected:

- (modified) clang/lib/Basic/Targets/X86.cpp (+4) 
- (modified) clang/test/CodeGen/target-builtin-noerror.c (+1) 
- (modified) clang/test/Driver/x86-march.c (+4) 
- (modified) clang/test/Frontend/x86-target-cpu.c (+1) 
- (modified) clang/test/Misc/target-invalid-cpu-note.c (+4-4) 
- (modified) clang/test/Preprocessor/predefined-arch-macros.c (+142) 
- (modified) compiler-rt/lib/builtins/cpu_model/x86.c (+20) 
- (modified) llvm/include/llvm/TargetParser/X86TargetParser.def (+3) 
- (modified) llvm/include/llvm/TargetParser/X86TargetParser.h (+1) 
- (modified) llvm/lib/Target/X86/X86.td (+15) 
- (modified) llvm/lib/Target/X86/X86PfmCounters.td (+1) 
- (modified) llvm/lib/TargetParser/Host.cpp (+19) 
- (modified) llvm/lib/TargetParser/X86TargetParser.cpp (+5) 
- (modified) llvm/test/CodeGen/X86/bypass-slow-division-64.ll (+1) 
- (modified) llvm/test/CodeGen/X86/cmp16.ll (+1) 
- (modified) llvm/test/CodeGen/X86/cpus-amd.ll (+1) 
- (modified) llvm/test/CodeGen/X86/rdpru.ll (+1) 
- (modified) llvm/test/CodeGen/X86/shuffle-as-shifts.ll (+1) 
- (modified) llvm/test/CodeGen/X86/slow-unaligned-mem.ll (+1) 
- (modified) llvm/test/CodeGen/X86/sqrt-fastmath-tune.ll (+1) 
- (modified) llvm/test/CodeGen/X86/tuning-shuffle-permilpd-avx512.ll (+1) 
- (modified) llvm/test/CodeGen/X86/tuning-shuffle-permilps-avx512.ll (+1) 
- (modified) llvm/test/CodeGen/X86/tuning-shuffle-unpckpd-avx512.ll (+1) 
- (modified) llvm/test/CodeGen/X86/tuning-shuffle-unpckps-avx512.ll (+1) 
- (modified) llvm/test/CodeGen/X86/vector-shuffle-fast-per-lane.ll (+1) 
- (modified) llvm/test/CodeGen/X86/vpdpwssd.ll (+1) 
- (modified) llvm/test/CodeGen/X86/x86-64-double-shifts-var.ll (+1) 
- (modified) llvm/test/MC/X86/x86_long_nop.s (+2) 
- (modified) llvm/test/Transforms/LoopUnroll/X86/call-remark.ll (+1) 
- (modified) llvm/test/Transforms/SLPVectorizer/X86/pr63668.ll (+1) 


``diff
diff --git a/clang/lib/Basic/Targets/X86.cpp b/clang/lib/Basic/Targets/X86.cpp
index 18e6dbf03e00db..072c97e6c8c6e0 100644
--- a/clang/lib/Basic/Targets/X86.cpp
+++ b/clang/lib/Basic/Targets/X86.cpp
@@ -723,6 +723,9 @@ void X86TargetInfo::getTargetDefines(const LangOptions 
&Opts,
   case CK_ZNVER4:
 defineCPUMacros(Builder, "znver4");
 break;
+  case CK_ZNVER5:
+defineCPUMacros(Builder, "znver5");
+break;
   case CK_Geode:
 defineCPUMacros(Builder, "geode");
 break;
@@ -1613,6 +1616,7 @@ std::optional 
X86TargetInfo::getCPUCacheLineSize() const {
 case CK_ZNVER2:
 case CK_ZNVER3:
 case CK_ZNVER4:
+case CK_ZNVER5:
 // Deprecated
 case CK_x86_64:
 case CK_x86_64_v2:
diff --git a/clang/test/CodeGen/target-builtin-noerror.c 
b/clang/test/CodeGen/target-builtin-noerror.c
index 2e16fd8b9fe4d8..d681dcd3a13e8f 100644
--- a/clang/test/CodeGen/target-builtin-noerror.c
+++ b/clang/test/CodeGen/target-builtin-noerror.c
@@ -205,4 +205,5 @@ void verifycpustrings(void) {
   (void)__builtin_cpu_is("znver2");
   (void)__builtin_cpu_is("znver3");
   (void)__builtin_cpu_is("znver4");
+  (void)__builtin_cpu_is("znver5");
 }
diff --git a/clang/test/Driver/x86-march.c b/clang/test/Driver/x86-march.c
index cc993b53937c17..3bc2a82ae778d6 100644
--- a/clang/test/Driver/x86-march.c
+++ b/clang/test/Driver/x86-march.c
@@ -242,6 +242,10 @@
 // RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=znver4 2>&1 \
 // RUN:   | FileCheck %s -check-prefix=znver4
 // znver4: "-target-cpu" "znver4"
+//
+// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=znver5 2>&1 \
+// RUN:   | FileCheck %s -check-prefix=znver5
+// znver5: "-target-cpu" "znver5"
 
 // RUN: %clang -target x86_64 -c -### %s -march=x86-64 2>&1 | FileCheck %s 
--check-prefix=x86-64
 // x86-64: "-target-cpu" "x86-64"
diff --git a/clang/test/Frontend/x86-target-cpu.c 
b/clang/test/Frontend/x86-target-cpu.c
index 6c8502ac2c21ee..f2885a040c3701 100644
--- a/clang/test/Frontend/x86-target-cpu.c
+++ b/clang/test/Frontend/x86-target-cpu.c
@@ -38,5 +38,6 @@
 // RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu znver2 -verify %s
 // RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu znver3 -verify %s
 // RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu znver4 -verify %s
+// RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu znver5 -verify %s
 //
 // expected-no-diagnostics
diff --git a/clang/test/Misc/target-invalid-cpu-note.c 
b/clang/test/Misc/target-invalid-cpu-no

[llvm-branch-commits] [clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #108816)

2024-09-16 Thread via llvm-branch-commits


https://github.com/ganeshgit created 
https://github.com/llvm/llvm-project/pull/108816

Enables AMD Zen5 family of architectures. The models covered are 

Models 00h-0Fh (Breithorn).
Models 10h-1Fh (Breithorn-Dense).
Models 20h-2Fh (Strix 1).
Models 30h-37h (Strix 2).
Models 38h-3Fh (Strix 3).
Models 40h-4Fh (Granite Ridge).
Models 50h-5Fh (Weisshorn).
Models 60h-6Fh (Krackan1).
Models 70h-77h (Sarlak).

>From 6b5fe4ed02c8172772c2e765ccd220adbfabe4cc Mon Sep 17 00:00:00 2001
From: Ganesh Gopalasubramanian 
Date: Mon, 16 Sep 2024 11:16:14 +
Subject: [PATCH] [X86] AMD Zen 5 Initial enablement

---
 clang/lib/Basic/Targets/X86.cpp   |   4 +
 clang/test/CodeGen/target-builtin-noerror.c   |   1 +
 clang/test/Driver/x86-march.c |   4 +
 clang/test/Frontend/x86-target-cpu.c  |   1 +
 clang/test/Misc/target-invalid-cpu-note.c |   8 +-
 .../Preprocessor/predefined-arch-macros.c | 142 ++
 compiler-rt/lib/builtins/cpu_model/x86.c  |  20 +++
 .../llvm/TargetParser/X86TargetParser.def |   3 +
 .../llvm/TargetParser/X86TargetParser.h   |   1 +
 llvm/lib/Target/X86/X86.td|  15 ++
 llvm/lib/Target/X86/X86PfmCounters.td |   1 +
 llvm/lib/TargetParser/Host.cpp|  19 +++
 llvm/lib/TargetParser/X86TargetParser.cpp |   5 +
 .../CodeGen/X86/bypass-slow-division-64.ll|   1 +
 llvm/test/CodeGen/X86/cmp16.ll|   1 +
 llvm/test/CodeGen/X86/cpus-amd.ll |   1 +
 llvm/test/CodeGen/X86/rdpru.ll|   1 +
 llvm/test/CodeGen/X86/shuffle-as-shifts.ll|   1 +
 llvm/test/CodeGen/X86/slow-unaligned-mem.ll   |   1 +
 llvm/test/CodeGen/X86/sqrt-fastmath-tune.ll   |   1 +
 .../X86/tuning-shuffle-permilpd-avx512.ll |   1 +
 .../X86/tuning-shuffle-permilps-avx512.ll |   1 +
 .../X86/tuning-shuffle-unpckpd-avx512.ll  |   1 +
 .../X86/tuning-shuffle-unpckps-avx512.ll  |   1 +
 .../X86/vector-shuffle-fast-per-lane.ll   |   1 +
 llvm/test/CodeGen/X86/vpdpwssd.ll |   1 +
 .../CodeGen/X86/x86-64-double-shifts-var.ll   |   1 +
 llvm/test/MC/X86/x86_long_nop.s   |   2 +
 .../Transforms/LoopUnroll/X86/call-remark.ll  |   1 +
 .../Transforms/SLPVectorizer/X86/pr63668.ll   |   1 +
 30 files changed, 238 insertions(+), 4 deletions(-)

diff --git a/clang/lib/Basic/Targets/X86.cpp b/clang/lib/Basic/Targets/X86.cpp
index 18e6dbf03e00db..072c97e6c8c6e0 100644
--- a/clang/lib/Basic/Targets/X86.cpp
+++ b/clang/lib/Basic/Targets/X86.cpp
@@ -723,6 +723,9 @@ void X86TargetInfo::getTargetDefines(const LangOptions 
&Opts,
   case CK_ZNVER4:
 defineCPUMacros(Builder, "znver4");
 break;
+  case CK_ZNVER5:
+defineCPUMacros(Builder, "znver5");
+break;
   case CK_Geode:
 defineCPUMacros(Builder, "geode");
 break;
@@ -1613,6 +1616,7 @@ std::optional 
X86TargetInfo::getCPUCacheLineSize() const {
 case CK_ZNVER2:
 case CK_ZNVER3:
 case CK_ZNVER4:
+case CK_ZNVER5:
 // Deprecated
 case CK_x86_64:
 case CK_x86_64_v2:
diff --git a/clang/test/CodeGen/target-builtin-noerror.c 
b/clang/test/CodeGen/target-builtin-noerror.c
index 2e16fd8b9fe4d8..d681dcd3a13e8f 100644
--- a/clang/test/CodeGen/target-builtin-noerror.c
+++ b/clang/test/CodeGen/target-builtin-noerror.c
@@ -205,4 +205,5 @@ void verifycpustrings(void) {
   (void)__builtin_cpu_is("znver2");
   (void)__builtin_cpu_is("znver3");
   (void)__builtin_cpu_is("znver4");
+  (void)__builtin_cpu_is("znver5");
 }
diff --git a/clang/test/Driver/x86-march.c b/clang/test/Driver/x86-march.c
index cc993b53937c17..3bc2a82ae778d6 100644
--- a/clang/test/Driver/x86-march.c
+++ b/clang/test/Driver/x86-march.c
@@ -242,6 +242,10 @@
 // RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=znver4 2>&1 \
 // RUN:   | FileCheck %s -check-prefix=znver4
 // znver4: "-target-cpu" "znver4"
+//
+// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=znver5 2>&1 \
+// RUN:   | FileCheck %s -check-prefix=znver5
+// znver5: "-target-cpu" "znver5"
 
 // RUN: %clang -target x86_64 -c -### %s -march=x86-64 2>&1 | FileCheck %s 
--check-prefix=x86-64
 // x86-64: "-target-cpu" "x86-64"
diff --git a/clang/test/Frontend/x86-target-cpu.c 
b/clang/test/Frontend/x86-target-cpu.c
index 6c8502ac2c21ee..f2885a040c3701 100644
--- a/clang/test/Frontend/x86-target-cpu.c
+++ b/clang/test/Frontend/x86-target-cpu.c
@@ -38,5 +38,6 @@
 // RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu znver2 -verify %s
 // RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu znver3 -verify %s
 // RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu znver4 -verify %s
+// RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu znver5 -verify %s
 //
 // expected-no-diagnostics
diff --git a/clang/test/Misc/target-invalid-cpu-note.c 
b/clang/test/Misc/target-invalid-cpu-note.c
index 4d6759dd81537a..6fd71bb82381ae 100644
--- a/clang/test/Misc/target-invalid-cpu-note.c
+++ b/clang/test/Misc/target-

[llvm-branch-commits] [clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #108816)

2024-09-16 Thread via llvm-branch-commits


ganeshgit wrote:

@RKSimon @tru There was a conflict with 
[#104601](https://github.com/llvm/llvm-project/commit/39e3085a55880dbbc5aeddc3661342980d5e1467)
 while cherry-picking the earlier commit from main. So, I had to update this 
change. The change to X86TargetParser.h 
(https://github.com/llvm/llvm-project/pull/108816/commits/6b5fe4ed02c8172772c2e765ccd220adbfabe4cc#diff-8d5f0e99f0c2484c205b0dc27e029e9b39e06820e0b78a83a77cb1bfd5a158be)
 is done so as to fix the ABI issues where CK_ZNVER5 is pushed to the end of 
enum list. 

https://github.com/llvm/llvm-project/pull/108816
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[llvm-branch-commits] [clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #108816)

2024-09-16 Thread Tobias Hieta via llvm-branch-commits


tru wrote:

@nikic @AaronBallman 

https://github.com/llvm/llvm-project/pull/108816
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[llvm-branch-commits] [clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #108816)

2024-09-16 Thread Nikita Popov via llvm-branch-commits


https://github.com/nikic approved this pull request.

Looks reasonable to me.

https://github.com/llvm/llvm-project/pull/108816
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[llvm-branch-commits] [clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #108816)

2024-09-16 Thread via llvm-branch-commits


ganeshgit wrote:

> Looks reasonable to me.

Thank you @tru @RKSimon. @nikic I will make sure that the delay between GCC 
patches are llvm patches are avoided. Thanks a lot!

https://github.com/llvm/llvm-project/pull/108816
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[llvm-branch-commits] [llvm] release/19.x: [X86] Fix missing check of rotate <-> shift equivilence (Issue 108722) (PR #108783)

2024-09-16 Thread Nikita Popov via llvm-branch-commits


https://github.com/nikic approved this pull request.


https://github.com/llvm/llvm-project/pull/108783
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[llvm-branch-commits] [clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #108816)

2024-09-16 Thread Tobias Hieta via llvm-branch-commits


https://github.com/tru milestoned 
https://github.com/llvm/llvm-project/pull/108816
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[llvm-branch-commits] [clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #108816)

2024-09-16 Thread Simon Pilgrim via llvm-branch-commits


https://github.com/RKSimon approved this pull request.


https://github.com/llvm/llvm-project/pull/108816
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[llvm-branch-commits] [compiler-rt] [TySan] Fix struct access with different bases (PR #108385)

2024-09-16 Thread Tavian Barnes via llvm-branch-commits


tavianator wrote:

> ! Oh wow! ... Should the commented out line cause a type violation too?

No, `out->i = out->i->n;` is fine because the type of the expression 
`out->i->n` is just `struct inner *`, so that's the type that will be given to 
the storage for `out->i`.  (Because `out` is dynamically allocated, it has no 
declared type and writes will set the effective type.)

But `memcpy(&out->i, &out->i->n, sizeof(out->i))` is specified to exactly copy 
the effective type from the source to the destination (again because `out` is 
dynamically allocated).  The type that gets copied includes knowledge of 
exactly which struct field it is (`struct inner::n`), and TySan is faithfully 
copying that over.  The later access with type `struct outer::i` doesn't match.

There are more details in this paper, for example: 
https://web.archive.org/web/20190219170809/https://trust-in-soft.com/wp-content/uploads/2017/01/vmcai.pdf

https://github.com/llvm/llvm-project/pull/108385
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[llvm-branch-commits] [llvm] release/19.x: [PowerPC] Fix assert exposed by PR 95931 in LowerBITCAST (#108062) (PR #108834)

2024-09-16 Thread via llvm-branch-commits


llvmbot wrote:

@amy-kwan What do you think about merging this PR to the release branch?

https://github.com/llvm/llvm-project/pull/108834
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[llvm-branch-commits] [llvm] release/19.x: [PowerPC] Fix assert exposed by PR 95931 in LowerBITCAST (#108062) (PR #108834)

2024-09-16 Thread via llvm-branch-commits


llvmbot wrote:




@llvm/pr-subscribers-backend-powerpc

Author: None (llvmbot)


Changes

Backport 22067a8eb43a7194e65913b47a9c724fde3ed68f

Requested by: @syzaara

---
Full diff: https://github.com/llvm/llvm-project/pull/108834.diff


2 Files Affected:

- (modified) llvm/lib/Target/PowerPC/PPCISelLowering.cpp (+5-4) 
- (modified) llvm/test/CodeGen/PowerPC/f128-bitcast.ll (+22) 


``diff
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp 
b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index 21cf4d9eeac173..758de9d732fa7e 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -9338,12 +9338,13 @@ SDValue PPCTargetLowering::LowerBITCAST(SDValue Op, 
SelectionDAG &DAG) const {
   SDLoc dl(Op);
   SDValue Op0 = Op->getOperand(0);
 
+  if (!Subtarget.isPPC64() || (Op0.getOpcode() != ISD::BUILD_PAIR) ||
+  (Op.getValueType() != MVT::f128))
+return SDValue();
+
   SDValue Lo = Op0.getOperand(0);
   SDValue Hi = Op0.getOperand(1);
-
-  if ((Op.getValueType() != MVT::f128) ||
-  (Op0.getOpcode() != ISD::BUILD_PAIR) || (Lo.getValueType() != MVT::i64) 
||
-  (Hi.getValueType() != MVT::i64) || !Subtarget.isPPC64())
+  if ((Lo.getValueType() != MVT::i64) || (Hi.getValueType() != MVT::i64))
 return SDValue();
 
   if (!Subtarget.isLittleEndian())
diff --git a/llvm/test/CodeGen/PowerPC/f128-bitcast.ll 
b/llvm/test/CodeGen/PowerPC/f128-bitcast.ll
index ffbfbd0c64ff3f..55ba3cb1e05387 100644
--- a/llvm/test/CodeGen/PowerPC/f128-bitcast.ll
+++ b/llvm/test/CodeGen/PowerPC/f128-bitcast.ll
@@ -86,3 +86,25 @@ entry:
   ret i64 %1
 }
 
+define <4 x i32> @truncBitcast(i512 %a) {
+; CHECK-LABEL: truncBitcast:
+; CHECK:   # %bb.0: # %entry
+; CHECK-NEXT:mtvsrdd v2, r4, r3
+; CHECK-NEXT:blr
+;
+; CHECK-BE-LABEL: truncBitcast:
+; CHECK-BE:   # %bb.0: # %entry
+; CHECK-BE-NEXT:mtvsrdd v2, r9, r10
+; CHECK-BE-NEXT:blr
+;
+; CHECK-P8-LABEL: truncBitcast:
+; CHECK-P8:   # %bb.0: # %entry
+; CHECK-P8-NEXT:mtfprd f0, r3
+; CHECK-P8-NEXT:mtfprd f1, r4
+; CHECK-P8-NEXT:xxmrghd v2, vs1, vs0
+; CHECK-P8-NEXT:blr
+entry:
+  %0 = trunc i512 %a to i128
+  %1 = bitcast i128 %0 to <4 x i32>
+  ret <4 x i32> %1
+}

``




https://github.com/llvm/llvm-project/pull/108834
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[llvm-branch-commits] [llvm] release/19.x: [PowerPC] Fix assert exposed by PR 95931 in LowerBITCAST (#108062) (PR #108834)

2024-09-16 Thread via llvm-branch-commits


https://github.com/llvmbot milestoned 
https://github.com/llvm/llvm-project/pull/108834
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[llvm-branch-commits] [llvm] release/19.x: [PowerPC] Fix assert exposed by PR 95931 in LowerBITCAST (#108062) (PR #108834)

2024-09-16 Thread via llvm-branch-commits


https://github.com/llvmbot created 
https://github.com/llvm/llvm-project/pull/108834

Backport 22067a8eb43a7194e65913b47a9c724fde3ed68f

Requested by: @syzaara

>From ca7d9da237478ccee15e52d35162e97bcb22dd13 Mon Sep 17 00:00:00 2001
From: Zaara Syeda 
Date: Tue, 10 Sep 2024 14:14:01 -0400
Subject: [PATCH] [PowerPC] Fix assert exposed by PR 95931 in LowerBITCAST
 (#108062)

Hit Assertion failed: Num < NumOperands && "Invalid child # of SDNode!"
Fix by checking opcode and value type before calling getOperand.

(cherry picked from commit 22067a8eb43a7194e65913b47a9c724fde3ed68f)
---
 llvm/lib/Target/PowerPC/PPCISelLowering.cpp |  9 +
 llvm/test/CodeGen/PowerPC/f128-bitcast.ll   | 22 +
 2 files changed, 27 insertions(+), 4 deletions(-)

diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp 
b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index 21cf4d9eeac173..758de9d732fa7e 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -9338,12 +9338,13 @@ SDValue PPCTargetLowering::LowerBITCAST(SDValue Op, 
SelectionDAG &DAG) const {
   SDLoc dl(Op);
   SDValue Op0 = Op->getOperand(0);
 
+  if (!Subtarget.isPPC64() || (Op0.getOpcode() != ISD::BUILD_PAIR) ||
+  (Op.getValueType() != MVT::f128))
+return SDValue();
+
   SDValue Lo = Op0.getOperand(0);
   SDValue Hi = Op0.getOperand(1);
-
-  if ((Op.getValueType() != MVT::f128) ||
-  (Op0.getOpcode() != ISD::BUILD_PAIR) || (Lo.getValueType() != MVT::i64) 
||
-  (Hi.getValueType() != MVT::i64) || !Subtarget.isPPC64())
+  if ((Lo.getValueType() != MVT::i64) || (Hi.getValueType() != MVT::i64))
 return SDValue();
 
   if (!Subtarget.isLittleEndian())
diff --git a/llvm/test/CodeGen/PowerPC/f128-bitcast.ll 
b/llvm/test/CodeGen/PowerPC/f128-bitcast.ll
index ffbfbd0c64ff3f..55ba3cb1e05387 100644
--- a/llvm/test/CodeGen/PowerPC/f128-bitcast.ll
+++ b/llvm/test/CodeGen/PowerPC/f128-bitcast.ll
@@ -86,3 +86,25 @@ entry:
   ret i64 %1
 }
 
+define <4 x i32> @truncBitcast(i512 %a) {
+; CHECK-LABEL: truncBitcast:
+; CHECK:   # %bb.0: # %entry
+; CHECK-NEXT:mtvsrdd v2, r4, r3
+; CHECK-NEXT:blr
+;
+; CHECK-BE-LABEL: truncBitcast:
+; CHECK-BE:   # %bb.0: # %entry
+; CHECK-BE-NEXT:mtvsrdd v2, r9, r10
+; CHECK-BE-NEXT:blr
+;
+; CHECK-P8-LABEL: truncBitcast:
+; CHECK-P8:   # %bb.0: # %entry
+; CHECK-P8-NEXT:mtfprd f0, r3
+; CHECK-P8-NEXT:mtfprd f1, r4
+; CHECK-P8-NEXT:xxmrghd v2, vs1, vs0
+; CHECK-P8-NEXT:blr
+entry:
+  %0 = trunc i512 %a to i128
+  %1 = bitcast i128 %0 to <4 x i32>
+  ret <4 x i32> %1
+}

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[llvm-branch-commits] [clang] dee0044 - Revert "Fix OOM in FormatDiagnostic (#108187)"

2024-09-16 Thread via llvm-branch-commits


Author: Aaron Ballman
Date: 2024-09-16T10:48:26-04:00
New Revision: dee00441ed4f5d2b872dca9cd0c925e2e5e04107

URL: 
https://github.com/llvm/llvm-project/commit/dee00441ed4f5d2b872dca9cd0c925e2e5e04107
DIFF: 
https://github.com/llvm/llvm-project/commit/dee00441ed4f5d2b872dca9cd0c925e2e5e04107.diff

LOG: Revert "Fix OOM in FormatDiagnostic (#108187)"

This reverts commit e5d255607d200f59c5f7474b8dde6fe72d53e348.

Added: 


Modified: 
clang-tools-extra/clang-tidy/ClangTidyDiagnosticConsumer.cpp
clang/include/clang/Basic/Diagnostic.h
clang/include/clang/Basic/DiagnosticIDs.h
clang/include/clang/Basic/PartialDiagnostic.h
clang/include/clang/Sema/Sema.h
clang/lib/Basic/Diagnostic.cpp
clang/lib/Basic/DiagnosticIDs.cpp
clang/lib/Basic/SourceManager.cpp
clang/lib/Frontend/Rewrite/FixItRewriter.cpp
clang/lib/Frontend/TextDiagnosticPrinter.cpp
clang/lib/Sema/Sema.cpp
clang/lib/Sema/SemaBase.cpp
clang/lib/Serialization/ASTReader.cpp
clang/unittests/Basic/DiagnosticTest.cpp
clang/unittests/Driver/DXCModeTest.cpp

Removed: 
clang/test/PCH/race-condition.cpp



diff  --git a/clang-tools-extra/clang-tidy/ClangTidyDiagnosticConsumer.cpp 
b/clang-tools-extra/clang-tidy/ClangTidyDiagnosticConsumer.cpp
index 4c75b422701148..200bb87a5ac3cb 100644
--- a/clang-tools-extra/clang-tidy/ClangTidyDiagnosticConsumer.cpp
+++ b/clang-tools-extra/clang-tidy/ClangTidyDiagnosticConsumer.cpp
@@ -380,6 +380,7 @@ void ClangTidyDiagnosticConsumer::HandleDiagnostic(
 ++Context.Stats.ErrorsIgnoredNOLINT;
 // Ignored a warning, should ignore related notes as well
 LastErrorWasIgnored = true;
+Context.DiagEngine->Clear();
 for (const auto &Error : SuppressionErrors)
   Context.diag(Error);
 return;
@@ -456,6 +457,7 @@ void ClangTidyDiagnosticConsumer::HandleDiagnostic(
   if (Info.hasSourceManager())
 checkFilters(Info.getLocation(), Info.getSourceManager());
 
+  Context.DiagEngine->Clear();
   for (const auto &Error : SuppressionErrors)
 Context.diag(Error);
 }

diff  --git a/clang/include/clang/Basic/Diagnostic.h 
b/clang/include/clang/Basic/Diagnostic.h
index e17ed8f98afa9a..54b69e98540239 100644
--- a/clang/include/clang/Basic/Diagnostic.h
+++ b/clang/include/clang/Basic/Diagnostic.h
@@ -183,41 +183,6 @@ struct DiagnosticStorage {
   DiagnosticStorage() = default;
 };
 
-/// An allocator for DiagnosticStorage objects, which uses a small cache to
-/// objects, used to reduce malloc()/free() traffic for partial diagnostics.
-class DiagStorageAllocator {
-  static const unsigned NumCached = 16;
-  DiagnosticStorage Cached[NumCached];
-  DiagnosticStorage *FreeList[NumCached];
-  unsigned NumFreeListEntries;
-
-public:
-  DiagStorageAllocator();
-  ~DiagStorageAllocator();
-
-  /// Allocate new storage.
-  DiagnosticStorage *Allocate() {
-if (NumFreeListEntries == 0)
-  return new DiagnosticStorage;
-
-DiagnosticStorage *Result = FreeList[--NumFreeListEntries];
-Result->NumDiagArgs = 0;
-Result->DiagRanges.clear();
-Result->FixItHints.clear();
-return Result;
-  }
-
-  /// Free the given storage object.
-  void Deallocate(DiagnosticStorage *S) {
-if (S >= Cached && S <= Cached + NumCached) {
-  FreeList[NumFreeListEntries++] = S;
-  return;
-}
-
-delete S;
-  }
-};
-
 /// Concrete class used by the front-end to report problems and issues.
 ///
 /// This massages the diagnostics (e.g. handling things like "report warnings
@@ -557,6 +522,27 @@ class DiagnosticsEngine : public 
RefCountedBase {
   void *ArgToStringCookie = nullptr;
   ArgToStringFnTy ArgToStringFn;
 
+  /// ID of the "delayed" diagnostic, which is a (typically
+  /// fatal) diagnostic that had to be delayed because it was found
+  /// while emitting another diagnostic.
+  unsigned DelayedDiagID;
+
+  /// First string argument for the delayed diagnostic.
+  std::string DelayedDiagArg1;
+
+  /// Second string argument for the delayed diagnostic.
+  std::string DelayedDiagArg2;
+
+  /// Third string argument for the delayed diagnostic.
+  std::string DelayedDiagArg3;
+
+  /// Optional flag value.
+  ///
+  /// Some flags accept values, for instance: -Wframe-larger-than= and
+  /// -Rpass=. The content of this string is emitted after the flag name
+  /// and '='.
+  std::string FlagValue;
+
 public:
   explicit DiagnosticsEngine(IntrusiveRefCntPtr Diags,
  IntrusiveRefCntPtr DiagOpts,
@@ -963,18 +949,70 @@ class DiagnosticsEngine : public 
RefCountedBase {
 
   void Report(const StoredDiagnostic &storedDiag);
 
+  /// Determine whethere there is already a diagnostic in flight.
+  bool isDiagnosticInFlight() const {
+return CurDiagID != std::numeric_limits::max();
+  }
+
+  /// Set the "delayed" diagnostic that will be emitted once
+  /// the current diagnostic completes.
+  ///
+  ///  If a diagnostic is already in-flight but

[llvm-branch-commits] [llvm] release/19.x: [PowerPC] Fix assert exposed by PR 95931 in LowerBITCAST (#108062) (PR #108834)

2024-09-16 Thread Stefan Pintilie via llvm-branch-commits


https://github.com/stefanp-ibm approved this pull request.

LGTM.

https://github.com/llvm/llvm-project/pull/108834
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[llvm-branch-commits] [llvm] release/19.x: [PowerPC] Fix assert exposed by PR 95931 in LowerBITCAST (#108062) (PR #108834)

2024-09-16 Thread Zaara Syeda via llvm-branch-commits


syzaara wrote:

@tru hi Tobias, can you please help to merge this PR? Thank you!

https://github.com/llvm/llvm-project/pull/108834
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[llvm-branch-commits] [NFC][sanitizer] Switch to `gnu_get_libc_version` (PR #108724)

2024-09-16 Thread Vitaly Buka via llvm-branch-commits


https://github.com/vitalybuka updated 
https://github.com/llvm/llvm-project/pull/108724


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[llvm-branch-commits] [NFC][sanitizer] Switch to `gnu_get_libc_version` (PR #108724)

2024-09-16 Thread Vitaly Buka via llvm-branch-commits


https://github.com/vitalybuka updated 
https://github.com/llvm/llvm-project/pull/108724


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[llvm-branch-commits] [clang] Fix evaluation of the unsigned enumeration values, #108766 (PR #108768)

2024-09-16 Thread Dmitry Fursov via llvm-branch-commits


https://github.com/fursov closed 
https://github.com/llvm/llvm-project/pull/108768
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[llvm-branch-commits] [NFC][sanitizer] Use RTLD_DEFAULT for _dl_get_tls_static_info (PR #108723)

2024-09-16 Thread Vitaly Buka via llvm-branch-commits


https://github.com/vitalybuka updated 
https://github.com/llvm/llvm-project/pull/108723


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[llvm-branch-commits] [NFC][sanitizer] Use RTLD_DEFAULT for _dl_get_tls_static_info (PR #108723)

2024-09-16 Thread Vitaly Buka via llvm-branch-commits


https://github.com/vitalybuka updated 
https://github.com/llvm/llvm-project/pull/108723


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[llvm-branch-commits] [sanitizer] Add CHECK that static TLS info is ready (PR #108684)

2024-09-16 Thread Vitaly Buka via llvm-branch-commits


https://github.com/vitalybuka updated 
https://github.com/llvm/llvm-project/pull/108684


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[llvm-branch-commits] [sanitizer] Add CHECK that static TLS info is ready (PR #108684)

2024-09-16 Thread Vitaly Buka via llvm-branch-commits


https://github.com/vitalybuka updated 
https://github.com/llvm/llvm-project/pull/108684


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[llvm-branch-commits] [sanitizer] Fix partially initialized static TLS range (PR #108685)

2024-09-16 Thread Vitaly Buka via llvm-branch-commits


https://github.com/vitalybuka updated 
https://github.com/llvm/llvm-project/pull/108685


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[llvm-branch-commits] [sanitizer] Fix partially initialized static TLS range (PR #108685)

2024-09-16 Thread Vitaly Buka via llvm-branch-commits


https://github.com/vitalybuka updated 
https://github.com/llvm/llvm-project/pull/108685


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[llvm-branch-commits] [clang] Backport "[Clang][CodeGen] Fix type for atomic float incdec operators (#107075)" (PR #107184)

2024-09-16 Thread Tobias Hieta via llvm-branch-commits


tru wrote:

@RKSimon ?

https://github.com/llvm/llvm-project/pull/107184
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[llvm-branch-commits] [llvm] release/19.x: [LoongArch][ISel] Check the number of sign bits in `PatGprGpr_32` (#107432) (PR #107945)

2024-09-16 Thread Tobias Hieta via llvm-branch-commits


https://github.com/tru updated https://github.com/llvm/llvm-project/pull/107945

>From 78654faa0c6d9dc2f72b81953b9cffbb7675755b Mon Sep 17 00:00:00 2001
From: Yingwei Zheng 
Date: Tue, 10 Sep 2024 09:19:39 +0800
Subject: [PATCH]  [LoongArch][ISel] Check the number of sign bits in
 `PatGprGpr_32` (#107432)

After https://github.com/llvm/llvm-project/pull/92205, LoongArch ISel
selects `div.w` for `trunc i64 (sdiv i64 3202030857, (sext i32 X to
i64)) to i32`. It is incorrect since `3202030857` is not a signed 32-bit
constant. It will produce wrong result when `X == 2`:
https://alive2.llvm.org/ce/z/pzfGZZ

This patch adds additional `sexti32` checks to operands of
`PatGprGpr_32`.
Alive2 proof: https://alive2.llvm.org/ce/z/AkH5Mp

Fix #107414.

(cherry picked from commit a111f9119a5ec77c19a514ec09454218f739454f)
---
 .../Target/LoongArch/LoongArchInstrInfo.td|  5 +-
 .../ir-instruction/sdiv-udiv-srem-urem.ll | 67 ++-
 2 files changed, 69 insertions(+), 3 deletions(-)

diff --git a/llvm/lib/Target/LoongArch/LoongArchInstrInfo.td 
b/llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
index ef647a42778737..339d50bd819217 100644
--- a/llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
+++ b/llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
@@ -1065,10 +1065,13 @@ def RDTIME_D : RDTIME_2R<0x6800>;
 
 /// Generic pattern classes
 
+def assertsexti32 : PatFrag<(ops node:$src), (assertsext node:$src), [{
+  return cast(N->getOperand(1))->getVT().bitsLE(MVT::i32);
+}]>;
 class PatGprGpr
 : Pat<(OpNode GPR:$rj, GPR:$rk), (Inst GPR:$rj, GPR:$rk)>;
 class PatGprGpr_32
-: Pat<(sext_inreg (OpNode GPR:$rj, GPR:$rk), i32), (Inst GPR:$rj, 
GPR:$rk)>;
+: Pat<(sext_inreg (OpNode (assertsexti32 GPR:$rj), (assertsexti32 
GPR:$rk)), i32), (Inst GPR:$rj, GPR:$rk)>;
 class PatGpr
 : Pat<(OpNode GPR:$rj), (Inst GPR:$rj)>;
 
diff --git a/llvm/test/CodeGen/LoongArch/ir-instruction/sdiv-udiv-srem-urem.ll 
b/llvm/test/CodeGen/LoongArch/ir-instruction/sdiv-udiv-srem-urem.ll
index ab3eec240db3c1..c22acdb4969071 100644
--- a/llvm/test/CodeGen/LoongArch/ir-instruction/sdiv-udiv-srem-urem.ll
+++ b/llvm/test/CodeGen/LoongArch/ir-instruction/sdiv-udiv-srem-urem.ll
@@ -191,7 +191,8 @@ define signext i32 @sdiv_si32_ui32_ui32(i32 %a, i32 %b) {
 ; LA64:   # %bb.0: # %entry
 ; LA64-NEXT:addi.w $a1, $a1, 0
 ; LA64-NEXT:addi.w $a0, $a0, 0
-; LA64-NEXT:div.w $a0, $a0, $a1
+; LA64-NEXT:div.d $a0, $a0, $a1
+; LA64-NEXT:addi.w $a0, $a0, 0
 ; LA64-NEXT:ret
 ;
 ; LA32-TRAP-LABEL: sdiv_si32_ui32_ui32:
@@ -207,11 +208,12 @@ define signext i32 @sdiv_si32_ui32_ui32(i32 %a, i32 %b) {
 ; LA64-TRAP:   # %bb.0: # %entry
 ; LA64-TRAP-NEXT:addi.w $a1, $a1, 0
 ; LA64-TRAP-NEXT:addi.w $a0, $a0, 0
-; LA64-TRAP-NEXT:div.w $a0, $a0, $a1
+; LA64-TRAP-NEXT:div.d $a0, $a0, $a1
 ; LA64-TRAP-NEXT:bnez $a1, .LBB5_2
 ; LA64-TRAP-NEXT:  # %bb.1: # %entry
 ; LA64-TRAP-NEXT:break 7
 ; LA64-TRAP-NEXT:  .LBB5_2: # %entry
+; LA64-TRAP-NEXT:addi.w $a0, $a0, 0
 ; LA64-TRAP-NEXT:ret
 entry:
   %r = sdiv i32 %a, %b
@@ -1151,3 +1153,64 @@ entry:
   %r = urem i64 %a, %b
   ret i64 %r
 }
+
+define signext i32 @pr107414(i32 signext %x) {
+; LA32-LABEL: pr107414:
+; LA32:   # %bb.0: # %entry
+; LA32-NEXT:addi.w $sp, $sp, -16
+; LA32-NEXT:.cfi_def_cfa_offset 16
+; LA32-NEXT:st.w $ra, $sp, 12 # 4-byte Folded Spill
+; LA32-NEXT:.cfi_offset 1, -4
+; LA32-NEXT:move $a2, $a0
+; LA32-NEXT:srai.w $a3, $a0, 31
+; LA32-NEXT:lu12i.w $a0, -266831
+; LA32-NEXT:ori $a0, $a0, 3337
+; LA32-NEXT:move $a1, $zero
+; LA32-NEXT:bl %plt(__divdi3)
+; LA32-NEXT:ld.w $ra, $sp, 12 # 4-byte Folded Reload
+; LA32-NEXT:addi.w $sp, $sp, 16
+; LA32-NEXT:ret
+;
+; LA64-LABEL: pr107414:
+; LA64:   # %bb.0: # %entry
+; LA64-NEXT:lu12i.w $a1, -266831
+; LA64-NEXT:ori $a1, $a1, 3337
+; LA64-NEXT:lu32i.d $a1, 0
+; LA64-NEXT:div.d $a0, $a1, $a0
+; LA64-NEXT:addi.w $a0, $a0, 0
+; LA64-NEXT:ret
+;
+; LA32-TRAP-LABEL: pr107414:
+; LA32-TRAP:   # %bb.0: # %entry
+; LA32-TRAP-NEXT:addi.w $sp, $sp, -16
+; LA32-TRAP-NEXT:.cfi_def_cfa_offset 16
+; LA32-TRAP-NEXT:st.w $ra, $sp, 12 # 4-byte Folded Spill
+; LA32-TRAP-NEXT:.cfi_offset 1, -4
+; LA32-TRAP-NEXT:move $a2, $a0
+; LA32-TRAP-NEXT:srai.w $a3, $a0, 31
+; LA32-TRAP-NEXT:lu12i.w $a0, -266831
+; LA32-TRAP-NEXT:ori $a0, $a0, 3337
+; LA32-TRAP-NEXT:move $a1, $zero
+; LA32-TRAP-NEXT:bl %plt(__divdi3)
+; LA32-TRAP-NEXT:ld.w $ra, $sp, 12 # 4-byte Folded Reload
+; LA32-TRAP-NEXT:addi.w $sp, $sp, 16
+; LA32-TRAP-NEXT:ret
+;
+; LA64-TRAP-LABEL: pr107414:
+; LA64-TRAP:   # %bb.0: # %entry
+; LA64-TRAP-NEXT:lu12i.w $a1, -266831
+; LA64-TRAP-NEXT:ori $a1, $a1, 3337
+; LA64-TRAP-NEXT:lu32i.d $a1, 0
+; LA64-TRAP-NEXT:div.d $a1, $a1, $a0
+; LA64-TRAP-NEXT:bnez $a0, .LBB32_2
+; LA64-TRAP-NEXT:  # %bb.1: # %entry
+; LA64-TRAP-NEXT:break 7
+;

[llvm-branch-commits] [llvm] 78654fa - [LoongArch][ISel] Check the number of sign bits in `PatGprGpr_32` (#107432)

2024-09-16 Thread Tobias Hieta via llvm-branch-commits


Author: Yingwei Zheng
Date: 2024-09-16T20:29:19+02:00
New Revision: 78654faa0c6d9dc2f72b81953b9cffbb7675755b

URL: 
https://github.com/llvm/llvm-project/commit/78654faa0c6d9dc2f72b81953b9cffbb7675755b
DIFF: 
https://github.com/llvm/llvm-project/commit/78654faa0c6d9dc2f72b81953b9cffbb7675755b.diff

LOG:  [LoongArch][ISel] Check the number of sign bits in `PatGprGpr_32` 
(#107432)

After https://github.com/llvm/llvm-project/pull/92205, LoongArch ISel
selects `div.w` for `trunc i64 (sdiv i64 3202030857, (sext i32 X to
i64)) to i32`. It is incorrect since `3202030857` is not a signed 32-bit
constant. It will produce wrong result when `X == 2`:
https://alive2.llvm.org/ce/z/pzfGZZ

This patch adds additional `sexti32` checks to operands of
`PatGprGpr_32`.
Alive2 proof: https://alive2.llvm.org/ce/z/AkH5Mp

Fix #107414.

(cherry picked from commit a111f9119a5ec77c19a514ec09454218f739454f)

Added: 


Modified: 
llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
llvm/test/CodeGen/LoongArch/ir-instruction/sdiv-udiv-srem-urem.ll

Removed: 




diff  --git a/llvm/lib/Target/LoongArch/LoongArchInstrInfo.td 
b/llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
index ef647a42778737..339d50bd819217 100644
--- a/llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
+++ b/llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
@@ -1065,10 +1065,13 @@ def RDTIME_D : RDTIME_2R<0x6800>;
 
 /// Generic pattern classes
 
+def assertsexti32 : PatFrag<(ops node:$src), (assertsext node:$src), [{
+  return cast(N->getOperand(1))->getVT().bitsLE(MVT::i32);
+}]>;
 class PatGprGpr
 : Pat<(OpNode GPR:$rj, GPR:$rk), (Inst GPR:$rj, GPR:$rk)>;
 class PatGprGpr_32
-: Pat<(sext_inreg (OpNode GPR:$rj, GPR:$rk), i32), (Inst GPR:$rj, 
GPR:$rk)>;
+: Pat<(sext_inreg (OpNode (assertsexti32 GPR:$rj), (assertsexti32 
GPR:$rk)), i32), (Inst GPR:$rj, GPR:$rk)>;
 class PatGpr
 : Pat<(OpNode GPR:$rj), (Inst GPR:$rj)>;
 

diff  --git a/llvm/test/CodeGen/LoongArch/ir-instruction/sdiv-udiv-srem-urem.ll 
b/llvm/test/CodeGen/LoongArch/ir-instruction/sdiv-udiv-srem-urem.ll
index ab3eec240db3c1..c22acdb4969071 100644
--- a/llvm/test/CodeGen/LoongArch/ir-instruction/sdiv-udiv-srem-urem.ll
+++ b/llvm/test/CodeGen/LoongArch/ir-instruction/sdiv-udiv-srem-urem.ll
@@ -191,7 +191,8 @@ define signext i32 @sdiv_si32_ui32_ui32(i32 %a, i32 %b) {
 ; LA64:   # %bb.0: # %entry
 ; LA64-NEXT:addi.w $a1, $a1, 0
 ; LA64-NEXT:addi.w $a0, $a0, 0
-; LA64-NEXT:div.w $a0, $a0, $a1
+; LA64-NEXT:div.d $a0, $a0, $a1
+; LA64-NEXT:addi.w $a0, $a0, 0
 ; LA64-NEXT:ret
 ;
 ; LA32-TRAP-LABEL: sdiv_si32_ui32_ui32:
@@ -207,11 +208,12 @@ define signext i32 @sdiv_si32_ui32_ui32(i32 %a, i32 %b) {
 ; LA64-TRAP:   # %bb.0: # %entry
 ; LA64-TRAP-NEXT:addi.w $a1, $a1, 0
 ; LA64-TRAP-NEXT:addi.w $a0, $a0, 0
-; LA64-TRAP-NEXT:div.w $a0, $a0, $a1
+; LA64-TRAP-NEXT:div.d $a0, $a0, $a1
 ; LA64-TRAP-NEXT:bnez $a1, .LBB5_2
 ; LA64-TRAP-NEXT:  # %bb.1: # %entry
 ; LA64-TRAP-NEXT:break 7
 ; LA64-TRAP-NEXT:  .LBB5_2: # %entry
+; LA64-TRAP-NEXT:addi.w $a0, $a0, 0
 ; LA64-TRAP-NEXT:ret
 entry:
   %r = sdiv i32 %a, %b
@@ -1151,3 +1153,64 @@ entry:
   %r = urem i64 %a, %b
   ret i64 %r
 }
+
+define signext i32 @pr107414(i32 signext %x) {
+; LA32-LABEL: pr107414:
+; LA32:   # %bb.0: # %entry
+; LA32-NEXT:addi.w $sp, $sp, -16
+; LA32-NEXT:.cfi_def_cfa_offset 16
+; LA32-NEXT:st.w $ra, $sp, 12 # 4-byte Folded Spill
+; LA32-NEXT:.cfi_offset 1, -4
+; LA32-NEXT:move $a2, $a0
+; LA32-NEXT:srai.w $a3, $a0, 31
+; LA32-NEXT:lu12i.w $a0, -266831
+; LA32-NEXT:ori $a0, $a0, 3337
+; LA32-NEXT:move $a1, $zero
+; LA32-NEXT:bl %plt(__divdi3)
+; LA32-NEXT:ld.w $ra, $sp, 12 # 4-byte Folded Reload
+; LA32-NEXT:addi.w $sp, $sp, 16
+; LA32-NEXT:ret
+;
+; LA64-LABEL: pr107414:
+; LA64:   # %bb.0: # %entry
+; LA64-NEXT:lu12i.w $a1, -266831
+; LA64-NEXT:ori $a1, $a1, 3337
+; LA64-NEXT:lu32i.d $a1, 0
+; LA64-NEXT:div.d $a0, $a1, $a0
+; LA64-NEXT:addi.w $a0, $a0, 0
+; LA64-NEXT:ret
+;
+; LA32-TRAP-LABEL: pr107414:
+; LA32-TRAP:   # %bb.0: # %entry
+; LA32-TRAP-NEXT:addi.w $sp, $sp, -16
+; LA32-TRAP-NEXT:.cfi_def_cfa_offset 16
+; LA32-TRAP-NEXT:st.w $ra, $sp, 12 # 4-byte Folded Spill
+; LA32-TRAP-NEXT:.cfi_offset 1, -4
+; LA32-TRAP-NEXT:move $a2, $a0
+; LA32-TRAP-NEXT:srai.w $a3, $a0, 31
+; LA32-TRAP-NEXT:lu12i.w $a0, -266831
+; LA32-TRAP-NEXT:ori $a0, $a0, 3337
+; LA32-TRAP-NEXT:move $a1, $zero
+; LA32-TRAP-NEXT:bl %plt(__divdi3)
+; LA32-TRAP-NEXT:ld.w $ra, $sp, 12 # 4-byte Folded Reload
+; LA32-TRAP-NEXT:addi.w $sp, $sp, 16
+; LA32-TRAP-NEXT:ret
+;
+; LA64-TRAP-LABEL: pr107414:
+; LA64-TRAP:   # %bb.0: # %entry
+; LA64-TRAP-NEXT:lu12i.w $a1, -266831
+; LA64-TRAP-NEXT:ori $a1, $a1, 3337
+; LA64-TRAP-NEXT:lu32i.d $a1, 0
+; LA64-TRAP

[llvm-branch-commits] [llvm] release/19.x: [LoongArch][ISel] Check the number of sign bits in `PatGprGpr_32` (#107432) (PR #107945)

2024-09-16 Thread Tobias Hieta via llvm-branch-commits


https://github.com/tru closed https://github.com/llvm/llvm-project/pull/107945
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[llvm-branch-commits] [llvm] release/19.x: [LoongArch] Eliminate the redundant sign extension of division (#107971) (PR #107990)

2024-09-16 Thread Tobias Hieta via llvm-branch-commits


https://github.com/tru updated https://github.com/llvm/llvm-project/pull/107990

>From d752f29fb333d47724484e08b32d6499cc1e460e Mon Sep 17 00:00:00 2001
From: hev 
Date: Tue, 10 Sep 2024 16:52:21 +0800
Subject: [PATCH] [LoongArch] Eliminate the redundant sign extension of
 division (#107971)

If all incoming values of `div.d` are sign-extended and all users only
use the lower 32 bits, then convert them to W versions.

Fixes: #107946
(cherry picked from commit 0f47e3aebdd2a4a938468a272ea4224552dbf176)
---
 llvm/lib/Target/LoongArch/LoongArchOptWInstrs.cpp | 15 +++
 1 file changed, 15 insertions(+)

diff --git a/llvm/lib/Target/LoongArch/LoongArchOptWInstrs.cpp 
b/llvm/lib/Target/LoongArch/LoongArchOptWInstrs.cpp
index abac69054f3b91..ab90409fdf47d0 100644
--- a/llvm/lib/Target/LoongArch/LoongArchOptWInstrs.cpp
+++ b/llvm/lib/Target/LoongArch/LoongArchOptWInstrs.cpp
@@ -637,6 +637,19 @@ static bool isSignExtendedW(Register SrcReg, const 
LoongArchSubtarget &ST,
 break;
   }
   return false;
+// If all incoming values are sign-extended and all users only use
+// the lower 32 bits, then convert them to W versions.
+case LoongArch::DIV_D: {
+  if (!AddRegToWorkList(MI->getOperand(1).getReg()))
+return false;
+  if (!AddRegToWorkList(MI->getOperand(2).getReg()))
+return false;
+  if (hasAllWUsers(*MI, ST, MRI)) {
+FixableDef.insert(MI);
+break;
+  }
+  return false;
+}
 }
   }
 
@@ -651,6 +664,8 @@ static unsigned getWOp(unsigned Opcode) {
 return LoongArch::ADDI_W;
   case LoongArch::ADD_D:
 return LoongArch::ADD_W;
+  case LoongArch::DIV_D:
+return LoongArch::DIV_W;
   case LoongArch::LD_D:
   case LoongArch::LD_WU:
 return LoongArch::LD_W;

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[llvm-branch-commits] [llvm] d752f29 - [LoongArch] Eliminate the redundant sign extension of division (#107971)

2024-09-16 Thread Tobias Hieta via llvm-branch-commits


Author: hev
Date: 2024-09-16T20:29:52+02:00
New Revision: d752f29fb333d47724484e08b32d6499cc1e460e

URL: 
https://github.com/llvm/llvm-project/commit/d752f29fb333d47724484e08b32d6499cc1e460e
DIFF: 
https://github.com/llvm/llvm-project/commit/d752f29fb333d47724484e08b32d6499cc1e460e.diff

LOG: [LoongArch] Eliminate the redundant sign extension of division (#107971)

If all incoming values of `div.d` are sign-extended and all users only
use the lower 32 bits, then convert them to W versions.

Fixes: #107946
(cherry picked from commit 0f47e3aebdd2a4a938468a272ea4224552dbf176)

Added: 


Modified: 
llvm/lib/Target/LoongArch/LoongArchOptWInstrs.cpp

Removed: 




diff  --git a/llvm/lib/Target/LoongArch/LoongArchOptWInstrs.cpp 
b/llvm/lib/Target/LoongArch/LoongArchOptWInstrs.cpp
index abac69054f3b91..ab90409fdf47d0 100644
--- a/llvm/lib/Target/LoongArch/LoongArchOptWInstrs.cpp
+++ b/llvm/lib/Target/LoongArch/LoongArchOptWInstrs.cpp
@@ -637,6 +637,19 @@ static bool isSignExtendedW(Register SrcReg, const 
LoongArchSubtarget &ST,
 break;
   }
   return false;
+// If all incoming values are sign-extended and all users only use
+// the lower 32 bits, then convert them to W versions.
+case LoongArch::DIV_D: {
+  if (!AddRegToWorkList(MI->getOperand(1).getReg()))
+return false;
+  if (!AddRegToWorkList(MI->getOperand(2).getReg()))
+return false;
+  if (hasAllWUsers(*MI, ST, MRI)) {
+FixableDef.insert(MI);
+break;
+  }
+  return false;
+}
 }
   }
 
@@ -651,6 +664,8 @@ static unsigned getWOp(unsigned Opcode) {
 return LoongArch::ADDI_W;
   case LoongArch::ADD_D:
 return LoongArch::ADD_W;
+  case LoongArch::DIV_D:
+return LoongArch::DIV_W;
   case LoongArch::LD_D:
   case LoongArch::LD_WU:
 return LoongArch::LD_W;



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[llvm-branch-commits] [llvm] release/19.x: [LoongArch] Eliminate the redundant sign extension of division (#107971) (PR #107990)

2024-09-16 Thread Tobias Hieta via llvm-branch-commits


https://github.com/tru closed https://github.com/llvm/llvm-project/pull/107990
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[llvm-branch-commits] [llvm] release/19.x: [LoongArch][ISel] Check the number of sign bits in `PatGprGpr_32` (#107432) (PR #107945)

2024-09-16 Thread via llvm-branch-commits


github-actions[bot] wrote:

@dtcxzyw (or anyone else). If you would like to add a note about this fix in 
the release notes (completely optional). Please reply to this comment with a 
one or two sentence description of the fix.  When you are done, please add the 
release:note label to this PR. 

https://github.com/llvm/llvm-project/pull/107945
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[llvm-branch-commits] [clang] release/19.x: [Clang] Fix crash due to invalid source location in __is_trivially_equality_comparable (#107815) (PR #108147)

2024-09-16 Thread Tobias Hieta via llvm-branch-commits


https://github.com/tru updated https://github.com/llvm/llvm-project/pull/108147

>From 6278084bc69a427cf7a610076817c420e3dc8594 Mon Sep 17 00:00:00 2001
From: Nikolas Klauser 
Date: Wed, 11 Sep 2024 08:47:24 +0200
Subject: [PATCH] [Clang] Fix crash due to invalid source location in
 __is_trivially_equality_comparable (#107815)

Fixes #10

(cherry picked from commit 6dbdb8430b492959c399a7809247424c6962902f)
---
 clang/lib/Sema/SemaExprCXX.cpp |  3 ++-
 clang/test/SemaCXX/type-traits.cpp | 18 ++
 2 files changed, 20 insertions(+), 1 deletion(-)

diff --git a/clang/lib/Sema/SemaExprCXX.cpp b/clang/lib/Sema/SemaExprCXX.cpp
index 14d1f395af90e3..de50786f4d6c07 100644
--- a/clang/lib/Sema/SemaExprCXX.cpp
+++ b/clang/lib/Sema/SemaExprCXX.cpp
@@ -5140,7 +5140,8 @@ static bool HasNonDeletedDefaultedEqualityComparison(Sema 
&S,
 
 // const ClassT& obj;
 OpaqueValueExpr Operand(
-{}, Decl->getTypeForDecl()->getCanonicalTypeUnqualified().withConst(),
+KeyLoc,
+Decl->getTypeForDecl()->getCanonicalTypeUnqualified().withConst(),
 ExprValueKind::VK_LValue);
 UnresolvedSet<16> Functions;
 // obj == obj;
diff --git a/clang/test/SemaCXX/type-traits.cpp 
b/clang/test/SemaCXX/type-traits.cpp
index 7c5be2ab374a75..608852da703312 100644
--- a/clang/test/SemaCXX/type-traits.cpp
+++ b/clang/test/SemaCXX/type-traits.cpp
@@ -3958,6 +3958,24 @@ class Template {};
 // Make sure we don't crash when instantiating a type
 static_assert(!__is_trivially_equality_comparable(Template>));
 
+
+struct S operator==(S, S);
+
+template  struct basic_string_view {};
+
+struct basic_string {
+  operator basic_string_view() const;
+};
+
+template 
+const bool is_trivially_equality_comparable = 
__is_trivially_equality_comparable(T);
+
+template  >
+void find();
+
+void func() { find(); }
+
+
 namespace hidden_friend {
 
 struct TriviallyEqualityComparable {

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[llvm-branch-commits] [clang] 6278084 - [Clang] Fix crash due to invalid source location in __is_trivially_equality_comparable (#107815)

2024-09-16 Thread Tobias Hieta via llvm-branch-commits


Author: Nikolas Klauser
Date: 2024-09-16T20:30:33+02:00
New Revision: 6278084bc69a427cf7a610076817c420e3dc8594

URL: 
https://github.com/llvm/llvm-project/commit/6278084bc69a427cf7a610076817c420e3dc8594
DIFF: 
https://github.com/llvm/llvm-project/commit/6278084bc69a427cf7a610076817c420e3dc8594.diff

LOG: [Clang] Fix crash due to invalid source location in 
__is_trivially_equality_comparable (#107815)

Fixes #10

(cherry picked from commit 6dbdb8430b492959c399a7809247424c6962902f)

Added: 


Modified: 
clang/lib/Sema/SemaExprCXX.cpp
clang/test/SemaCXX/type-traits.cpp

Removed: 




diff  --git a/clang/lib/Sema/SemaExprCXX.cpp b/clang/lib/Sema/SemaExprCXX.cpp
index 14d1f395af90e3..de50786f4d6c07 100644
--- a/clang/lib/Sema/SemaExprCXX.cpp
+++ b/clang/lib/Sema/SemaExprCXX.cpp
@@ -5140,7 +5140,8 @@ static bool HasNonDeletedDefaultedEqualityComparison(Sema 
&S,
 
 // const ClassT& obj;
 OpaqueValueExpr Operand(
-{}, Decl->getTypeForDecl()->getCanonicalTypeUnqualified().withConst(),
+KeyLoc,
+Decl->getTypeForDecl()->getCanonicalTypeUnqualified().withConst(),
 ExprValueKind::VK_LValue);
 UnresolvedSet<16> Functions;
 // obj == obj;

diff  --git a/clang/test/SemaCXX/type-traits.cpp 
b/clang/test/SemaCXX/type-traits.cpp
index 7c5be2ab374a75..608852da703312 100644
--- a/clang/test/SemaCXX/type-traits.cpp
+++ b/clang/test/SemaCXX/type-traits.cpp
@@ -3958,6 +3958,24 @@ class Template {};
 // Make sure we don't crash when instantiating a type
 static_assert(!__is_trivially_equality_comparable(Template>));
 
+
+struct S operator==(S, S);
+
+template  struct basic_string_view {};
+
+struct basic_string {
+  operator basic_string_view() const;
+};
+
+template 
+const bool is_trivially_equality_comparable = 
__is_trivially_equality_comparable(T);
+
+template  >
+void find();
+
+void func() { find(); }
+
+
 namespace hidden_friend {
 
 struct TriviallyEqualityComparable {



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[llvm-branch-commits] [llvm] release/19.x: [LoongArch] Eliminate the redundant sign extension of division (#107971) (PR #107990)

2024-09-16 Thread via llvm-branch-commits


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[llvm-branch-commits] [clang] release/19.x: [Clang] Fix crash due to invalid source location in __is_trivially_equality_comparable (#107815) (PR #108147)

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https://github.com/tru closed https://github.com/llvm/llvm-project/pull/108147
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[llvm-branch-commits] [llvm] release/19.x: [RISCV] Don't outline pcrel_lo when the function has a section prefix (#107943) (PR #108288)

2024-09-16 Thread Tobias Hieta via llvm-branch-commits


https://github.com/tru updated https://github.com/llvm/llvm-project/pull/108288

>From a847b66a750291f8b63c03b9f355c6f4d09cdfe3 Mon Sep 17 00:00:00 2001
From: Jonathon Penix 
Date: Wed, 11 Sep 2024 09:53:11 -0700
Subject: [PATCH] [RISCV] Don't outline pcrel_lo when the function has a
 section prefix (#107943)

GNU ld will error when encountering a pcrel_lo whose corresponding
pcrel_hi is in a different section. [1] introduced a check to help
prevent this issue by preventing outlining in a few circumstances.
However, we can also hit this same issue when outlining from functions
with prefixes ("hot"/"unlikely"/"unknown" from profile information, for
example) as the outlined function might not have the same prefix,
possibly resulting in a "paired" pcrel_lo and pcrel_hi ending up in
different sections.

To prevent this issue, take a similar approach as [1] and additionally
prevent outlining when we see a pcrel_lo and the function has a prefix.

[1]
https://github.com/llvm/llvm-project/commit/96c85f80f0d615ffde0f85d8270e0a8c9f4e5430

Fixes #107520

(cherry picked from commit 866b93e6b33fac9a4bc62bbc32199bd98f434784)
---
 llvm/lib/Target/RISCV/RISCVInstrInfo.cpp  |   2 +-
 .../RISCV/machineoutliner-pcrel-lo.mir| 104 +-
 2 files changed, 99 insertions(+), 7 deletions(-)

diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp 
b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
index ba3b4bd701d634..6c0cbeadebf431 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
@@ -2902,7 +2902,7 @@ 
RISCVInstrInfo::getOutliningTypeImpl(MachineBasicBlock::iterator &MBBI,
 // if any possible.
 if (MO.getTargetFlags() == RISCVII::MO_PCREL_LO &&
 (MI.getMF()->getTarget().getFunctionSections() || F.hasComdat() ||
- F.hasSection()))
+ F.hasSection() || F.getSectionPrefix()))
   return outliner::InstrType::Illegal;
   }
 
diff --git a/llvm/test/CodeGen/RISCV/machineoutliner-pcrel-lo.mir 
b/llvm/test/CodeGen/RISCV/machineoutliner-pcrel-lo.mir
index 8a83543b0280fd..fd3630bcfad256 100644
--- a/llvm/test/CodeGen/RISCV/machineoutliner-pcrel-lo.mir
+++ b/llvm/test/CodeGen/RISCV/machineoutliner-pcrel-lo.mir
@@ -18,6 +18,9 @@
   define i32 @foo2(i32 %a, i32 %b) comdat { ret i32 0 }
 
   define i32 @foo3(i32 %a, i32 %b) section ".abc" { ret i32 0 }
+
+  define i32 @foo4(i32 %a, i32 %b) !section_prefix !0 { ret i32 0 }
+  !0 = !{!"function_section_prefix", !"myprefix"}
 ...
 ---
 name:foo
@@ -27,23 +30,24 @@ body: |
   ; CHECK: bb.0:
   ; CHECK-NEXT:   liveins: $x10, $x11, $x13
   ; CHECK-NEXT: {{  $}}
-  ; CHECK-NEXT:   $x5 = PseudoCALLReg target-flags(riscv-call) 
@OUTLINED_FUNCTION_0, implicit-def $x5, implicit-def $x10, implicit-def $x11, 
implicit-def $x12, implicit $x10, implicit $x11, implicit $x13
+  ; CHECK-NEXT:   $x5 = PseudoCALLReg target-flags(riscv-call) 
@OUTLINED_FUNCTION_1, implicit-def $x5, implicit-def $x10, implicit-def $x11, 
implicit-def $x12, implicit $x10, implicit $x11, implicit $x13
   ; CHECK-NEXT:   PseudoBR %bb.3
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.1:
   ; CHECK-NEXT:   liveins: $x10, $x11, $x13
   ; CHECK-NEXT: {{  $}}
-  ; CHECK-NEXT:   $x5 = PseudoCALLReg target-flags(riscv-call) 
@OUTLINED_FUNCTION_0, implicit-def $x5, implicit-def $x10, implicit-def $x11, 
implicit-def $x12, implicit $x10, implicit $x11, implicit $x13
+  ; CHECK-NEXT:   $x5 = PseudoCALLReg target-flags(riscv-call) 
@OUTLINED_FUNCTION_1, implicit-def $x5, implicit-def $x10, implicit-def $x11, 
implicit-def $x12, implicit $x10, implicit $x11, implicit $x13
   ; CHECK-NEXT:   PseudoBR %bb.3
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.2:
   ; CHECK-NEXT:   liveins: $x10, $x11, $x13
   ; CHECK-NEXT: {{  $}}
-  ; CHECK-NEXT:   $x5 = PseudoCALLReg target-flags(riscv-call) 
@OUTLINED_FUNCTION_0, implicit-def $x5, implicit-def $x10, implicit-def $x11, 
implicit-def $x12, implicit $x10, implicit $x11, implicit $x13
+  ; CHECK-NEXT:   $x5 = PseudoCALLReg target-flags(riscv-call) 
@OUTLINED_FUNCTION_1, implicit-def $x5, implicit-def $x10, implicit-def $x11, 
implicit-def $x12, implicit $x10, implicit $x11, implicit $x13
   ; CHECK-NEXT:   PseudoBR %bb.3
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.3:
   ; CHECK-NEXT:   PseudoRET
+  ;
   ; CHECK-FS-LABEL: name: foo
   ; CHECK-FS: bb.0:
   ; CHECK-FS-NEXT:   liveins: $x10, $x11, $x13
@@ -109,26 +113,27 @@ body: |
   ; CHECK: bb.0:
   ; CHECK-NEXT:   liveins: $x10, $x11, $x13
   ; CHECK-NEXT: {{  $}}
-  ; CHECK-NEXT:   $x5 = PseudoCALLReg target-flags(riscv-call) 
@OUTLINED_FUNCTION_1, implicit-def $x5, implicit-def $x10, implicit-def $x11, 
implicit-def $x12, implicit $x10, implicit $x11
+  ; CHECK-NEXT:   $x5 = PseudoCALLReg target-flags(riscv-call) 
@OUTLINED_FUNCTION_0, implicit-def $x5, implicit-def $x10, implicit-def $x11, 
implicit-def $x12, implicit $x10, implicit $x11
   ; CHECK-NEXT:   $x11 = LW killed renamable $x13, 
target-flags(riscv-pcrel-lo)  :

[llvm-branch-commits] [llvm] a847b66 - [RISCV] Don't outline pcrel_lo when the function has a section prefix (#107943)

2024-09-16 Thread Tobias Hieta via llvm-branch-commits


Author: Jonathon Penix
Date: 2024-09-16T20:31:06+02:00
New Revision: a847b66a750291f8b63c03b9f355c6f4d09cdfe3

URL: 
https://github.com/llvm/llvm-project/commit/a847b66a750291f8b63c03b9f355c6f4d09cdfe3
DIFF: 
https://github.com/llvm/llvm-project/commit/a847b66a750291f8b63c03b9f355c6f4d09cdfe3.diff

LOG: [RISCV] Don't outline pcrel_lo when the function has a section prefix 
(#107943)

GNU ld will error when encountering a pcrel_lo whose corresponding
pcrel_hi is in a different section. [1] introduced a check to help
prevent this issue by preventing outlining in a few circumstances.
However, we can also hit this same issue when outlining from functions
with prefixes ("hot"/"unlikely"/"unknown" from profile information, for
example) as the outlined function might not have the same prefix,
possibly resulting in a "paired" pcrel_lo and pcrel_hi ending up in
different sections.

To prevent this issue, take a similar approach as [1] and additionally
prevent outlining when we see a pcrel_lo and the function has a prefix.

[1]
https://github.com/llvm/llvm-project/commit/96c85f80f0d615ffde0f85d8270e0a8c9f4e5430

Fixes #107520

(cherry picked from commit 866b93e6b33fac9a4bc62bbc32199bd98f434784)

Added: 


Modified: 
llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
llvm/test/CodeGen/RISCV/machineoutliner-pcrel-lo.mir

Removed: 




diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp 
b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
index ba3b4bd701d634..6c0cbeadebf431 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
@@ -2902,7 +2902,7 @@ 
RISCVInstrInfo::getOutliningTypeImpl(MachineBasicBlock::iterator &MBBI,
 // if any possible.
 if (MO.getTargetFlags() == RISCVII::MO_PCREL_LO &&
 (MI.getMF()->getTarget().getFunctionSections() || F.hasComdat() ||
- F.hasSection()))
+ F.hasSection() || F.getSectionPrefix()))
   return outliner::InstrType::Illegal;
   }
 

diff  --git a/llvm/test/CodeGen/RISCV/machineoutliner-pcrel-lo.mir 
b/llvm/test/CodeGen/RISCV/machineoutliner-pcrel-lo.mir
index 8a83543b0280fd..fd3630bcfad256 100644
--- a/llvm/test/CodeGen/RISCV/machineoutliner-pcrel-lo.mir
+++ b/llvm/test/CodeGen/RISCV/machineoutliner-pcrel-lo.mir
@@ -18,6 +18,9 @@
   define i32 @foo2(i32 %a, i32 %b) comdat { ret i32 0 }
 
   define i32 @foo3(i32 %a, i32 %b) section ".abc" { ret i32 0 }
+
+  define i32 @foo4(i32 %a, i32 %b) !section_prefix !0 { ret i32 0 }
+  !0 = !{!"function_section_prefix", !"myprefix"}
 ...
 ---
 name:foo
@@ -27,23 +30,24 @@ body: |
   ; CHECK: bb.0:
   ; CHECK-NEXT:   liveins: $x10, $x11, $x13
   ; CHECK-NEXT: {{  $}}
-  ; CHECK-NEXT:   $x5 = PseudoCALLReg target-flags(riscv-call) 
@OUTLINED_FUNCTION_0, implicit-def $x5, implicit-def $x10, implicit-def $x11, 
implicit-def $x12, implicit $x10, implicit $x11, implicit $x13
+  ; CHECK-NEXT:   $x5 = PseudoCALLReg target-flags(riscv-call) 
@OUTLINED_FUNCTION_1, implicit-def $x5, implicit-def $x10, implicit-def $x11, 
implicit-def $x12, implicit $x10, implicit $x11, implicit $x13
   ; CHECK-NEXT:   PseudoBR %bb.3
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.1:
   ; CHECK-NEXT:   liveins: $x10, $x11, $x13
   ; CHECK-NEXT: {{  $}}
-  ; CHECK-NEXT:   $x5 = PseudoCALLReg target-flags(riscv-call) 
@OUTLINED_FUNCTION_0, implicit-def $x5, implicit-def $x10, implicit-def $x11, 
implicit-def $x12, implicit $x10, implicit $x11, implicit $x13
+  ; CHECK-NEXT:   $x5 = PseudoCALLReg target-flags(riscv-call) 
@OUTLINED_FUNCTION_1, implicit-def $x5, implicit-def $x10, implicit-def $x11, 
implicit-def $x12, implicit $x10, implicit $x11, implicit $x13
   ; CHECK-NEXT:   PseudoBR %bb.3
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.2:
   ; CHECK-NEXT:   liveins: $x10, $x11, $x13
   ; CHECK-NEXT: {{  $}}
-  ; CHECK-NEXT:   $x5 = PseudoCALLReg target-flags(riscv-call) 
@OUTLINED_FUNCTION_0, implicit-def $x5, implicit-def $x10, implicit-def $x11, 
implicit-def $x12, implicit $x10, implicit $x11, implicit $x13
+  ; CHECK-NEXT:   $x5 = PseudoCALLReg target-flags(riscv-call) 
@OUTLINED_FUNCTION_1, implicit-def $x5, implicit-def $x10, implicit-def $x11, 
implicit-def $x12, implicit $x10, implicit $x11, implicit $x13
   ; CHECK-NEXT:   PseudoBR %bb.3
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT: bb.3:
   ; CHECK-NEXT:   PseudoRET
+  ;
   ; CHECK-FS-LABEL: name: foo
   ; CHECK-FS: bb.0:
   ; CHECK-FS-NEXT:   liveins: $x10, $x11, $x13
@@ -109,26 +113,27 @@ body: |
   ; CHECK: bb.0:
   ; CHECK-NEXT:   liveins: $x10, $x11, $x13
   ; CHECK-NEXT: {{  $}}
-  ; CHECK-NEXT:   $x5 = PseudoCALLReg target-flags(riscv-call) 
@OUTLINED_FUNCTION_1, implicit-def $x5, implicit-def $x10, implicit-def $x11, 
implicit-def $x12, implicit $x10, implicit $x11
+  ; CHECK-NEXT:   $x5 = PseudoCALLReg target-flags(riscv-call) 
@OUTLINED_FUNCTION_0, implicit-def $x5, implicit-def $x10, implicit-def $x11, 
implicit-de

[llvm-branch-commits] [llvm] release/19.x: [RISCV] Don't outline pcrel_lo when the function has a section prefix (#107943) (PR #108288)

2024-09-16 Thread Tobias Hieta via llvm-branch-commits


https://github.com/tru closed https://github.com/llvm/llvm-project/pull/108288
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[llvm-branch-commits] [clang] release/19.x: [Clang] Fix crash due to invalid source location in __is_trivially_equality_comparable (#107815) (PR #108147)

2024-09-16 Thread via llvm-branch-commits


github-actions[bot] wrote:

@philnik777 (or anyone else). If you would like to add a note about this fix in 
the release notes (completely optional). Please reply to this comment with a 
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https://github.com/llvm/llvm-project/pull/108147
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[llvm-branch-commits] [llvm] release/19.x: [DAGCombiner] cache negative result from getMergeStoreCandidates() (#106949) (PR #108397)

2024-09-16 Thread Tobias Hieta via llvm-branch-commits


https://github.com/tru closed https://github.com/llvm/llvm-project/pull/108397
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[llvm-branch-commits] [llvm] release/19.x: [RISCV] Don't outline pcrel_lo when the function has a section prefix (#107943) (PR #108288)

2024-09-16 Thread via llvm-branch-commits


github-actions[bot] wrote:

@jonathonpenix (or anyone else). If you would like to add a note about this fix 
in the release notes (completely optional). Please reply to this comment with a 
one or two sentence description of the fix.  When you are done, please add the 
release:note label to this PR. 

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[llvm-branch-commits] [libcxx] release/19.x: Guard an include of `` in `` with availability macro (#108429) (PR #108515)

2024-09-16 Thread Tobias Hieta via llvm-branch-commits


https://github.com/tru updated https://github.com/llvm/llvm-project/pull/108515

>From 82f3a4a32d2500ab1e6c51e0d749ffbac9afb1fa Mon Sep 17 00:00:00 2001
From: Konstantin Varlamov 
Date: Fri, 13 Sep 2024 01:26:57 -0700
Subject: [PATCH] Guard an include of `` in `` with
 availability macro (#108429)

This fixes a regression introduced in
https://github.com/llvm/llvm-project/pull/96035.

(cherry picked from commit 127c34948bd54e92ef2ee544e8bc42acecf321ad)
---
 libcxx/include/chrono | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/libcxx/include/chrono b/libcxx/include/chrono
index 990c415ec2e972..7bec5e5a26ef4a 100644
--- a/libcxx/include/chrono
+++ b/libcxx/include/chrono
@@ -1015,8 +1015,8 @@ constexpr chrono::year  
operator ""y(unsigned lo
 #  include 
 #  if !defined(_LIBCPP_HAS_NO_LOCALIZATION)
 #include 
+#include 
 #  endif
-#  include 
 #endif
 
 #endif // _LIBCPP_CHRONO

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[llvm-branch-commits] [libcxx] 82f3a4a - Guard an include of `` in `` with availability macro (#108429)

2024-09-16 Thread Tobias Hieta via llvm-branch-commits


Author: Konstantin Varlamov
Date: 2024-09-16T20:31:52+02:00
New Revision: 82f3a4a32d2500ab1e6c51e0d749ffbac9afb1fa

URL: 
https://github.com/llvm/llvm-project/commit/82f3a4a32d2500ab1e6c51e0d749ffbac9afb1fa
DIFF: 
https://github.com/llvm/llvm-project/commit/82f3a4a32d2500ab1e6c51e0d749ffbac9afb1fa.diff

LOG: Guard an include of `` in `` with availability macro 
(#108429)

This fixes a regression introduced in
https://github.com/llvm/llvm-project/pull/96035.

(cherry picked from commit 127c34948bd54e92ef2ee544e8bc42acecf321ad)

Added: 


Modified: 
libcxx/include/chrono

Removed: 




diff  --git a/libcxx/include/chrono b/libcxx/include/chrono
index 990c415ec2e972..7bec5e5a26ef4a 100644
--- a/libcxx/include/chrono
+++ b/libcxx/include/chrono
@@ -1015,8 +1015,8 @@ constexpr chrono::year  
operator ""y(unsigned lo
 #  include 
 #  if !defined(_LIBCPP_HAS_NO_LOCALIZATION)
 #include 
+#include 
 #  endif
-#  include 
 #endif
 
 #endif // _LIBCPP_CHRONO



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[llvm-branch-commits] [libcxx] release/19.x: Guard an include of `` in `` with availability macro (#108429) (PR #108515)

2024-09-16 Thread Tobias Hieta via llvm-branch-commits


https://github.com/tru closed https://github.com/llvm/llvm-project/pull/108515
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[llvm-branch-commits] [lld] release/19.x: [lld] select a default eflags for hexagon (#108431) (PR #108661)

2024-09-16 Thread Tobias Hieta via llvm-branch-commits


https://github.com/tru updated https://github.com/llvm/llvm-project/pull/108661

>From 82e85b62da3f62759ab94aecd0ebac61f3856719 Mon Sep 17 00:00:00 2001
From: Brian Cain 
Date: Fri, 13 Sep 2024 17:10:03 -0500
Subject: [PATCH] [lld] select a default eflags for hexagon (#108431)

Empty archives are apparently routine in linux kernel builds, so instead
of asserting, we should handle this case with a sane default value.

(cherry picked from commit d1ba432533aafc52fc59158350af937a8b6b9538)
---
 lld/ELF/Arch/Hexagon.cpp | 8 +++-
 lld/test/ELF/hexagon-eflag.s | 5 +
 2 files changed, 8 insertions(+), 5 deletions(-)

diff --git a/lld/ELF/Arch/Hexagon.cpp b/lld/ELF/Arch/Hexagon.cpp
index 54821c299bde9e..abde3cd964917e 100644
--- a/lld/ELF/Arch/Hexagon.cpp
+++ b/lld/ELF/Arch/Hexagon.cpp
@@ -60,17 +60,15 @@ Hexagon::Hexagon() {
 }
 
 uint32_t Hexagon::calcEFlags() const {
-  assert(!ctx.objectFiles.empty());
-
   // The architecture revision must always be equal to or greater than
   // greatest revision in the list of inputs.
-  uint32_t ret = 0;
+  std::optional ret;
   for (InputFile *f : ctx.objectFiles) {
 uint32_t eflags = cast>(f)->getObj().getHeader().e_flags;
-if (eflags > ret)
+if (!ret || eflags > *ret)
   ret = eflags;
   }
-  return ret;
+  return ret.value_or(/* Default Arch Rev: */ 0x60);
 }
 
 static uint32_t applyMask(uint32_t mask, uint32_t data) {
diff --git a/lld/test/ELF/hexagon-eflag.s b/lld/test/ELF/hexagon-eflag.s
index 01cb5e5b0f2935..dbe8604f69fda3 100644
--- a/lld/test/ELF/hexagon-eflag.s
+++ b/lld/test/ELF/hexagon-eflag.s
@@ -5,3 +5,8 @@
 # RUN: llvm-readelf -h  %t3 | FileCheck %s
 # Verify that the largest arch in the input list is selected.
 # CHECK: Flags: 0x62
+
+# RUN: llvm-ar rcsD %t4
+# RUN: ld.lld -m hexagonelf %t4 -o %t5
+# RUN: llvm-readelf -h  %t5 | FileCheck --check-prefix=CHECK-EMPTYARCHIVE %s
+# CHECK-EMPTYARCHIVE: Flags: 0x60

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[llvm-branch-commits] [lld] 82e85b6 - [lld] select a default eflags for hexagon (#108431)

2024-09-16 Thread Tobias Hieta via llvm-branch-commits


Author: Brian Cain
Date: 2024-09-16T20:32:14+02:00
New Revision: 82e85b62da3f62759ab94aecd0ebac61f3856719

URL: 
https://github.com/llvm/llvm-project/commit/82e85b62da3f62759ab94aecd0ebac61f3856719
DIFF: 
https://github.com/llvm/llvm-project/commit/82e85b62da3f62759ab94aecd0ebac61f3856719.diff

LOG: [lld] select a default eflags for hexagon (#108431)

Empty archives are apparently routine in linux kernel builds, so instead
of asserting, we should handle this case with a sane default value.

(cherry picked from commit d1ba432533aafc52fc59158350af937a8b6b9538)

Added: 


Modified: 
lld/ELF/Arch/Hexagon.cpp
lld/test/ELF/hexagon-eflag.s

Removed: 




diff  --git a/lld/ELF/Arch/Hexagon.cpp b/lld/ELF/Arch/Hexagon.cpp
index 54821c299bde9e..abde3cd964917e 100644
--- a/lld/ELF/Arch/Hexagon.cpp
+++ b/lld/ELF/Arch/Hexagon.cpp
@@ -60,17 +60,15 @@ Hexagon::Hexagon() {
 }
 
 uint32_t Hexagon::calcEFlags() const {
-  assert(!ctx.objectFiles.empty());
-
   // The architecture revision must always be equal to or greater than
   // greatest revision in the list of inputs.
-  uint32_t ret = 0;
+  std::optional ret;
   for (InputFile *f : ctx.objectFiles) {
 uint32_t eflags = cast>(f)->getObj().getHeader().e_flags;
-if (eflags > ret)
+if (!ret || eflags > *ret)
   ret = eflags;
   }
-  return ret;
+  return ret.value_or(/* Default Arch Rev: */ 0x60);
 }
 
 static uint32_t applyMask(uint32_t mask, uint32_t data) {

diff  --git a/lld/test/ELF/hexagon-eflag.s b/lld/test/ELF/hexagon-eflag.s
index 01cb5e5b0f2935..dbe8604f69fda3 100644
--- a/lld/test/ELF/hexagon-eflag.s
+++ b/lld/test/ELF/hexagon-eflag.s
@@ -5,3 +5,8 @@
 # RUN: llvm-readelf -h  %t3 | FileCheck %s
 # Verify that the largest arch in the input list is selected.
 # CHECK: Flags: 0x62
+
+# RUN: llvm-ar rcsD %t4
+# RUN: ld.lld -m hexagonelf %t4 -o %t5
+# RUN: llvm-readelf -h  %t5 | FileCheck --check-prefix=CHECK-EMPTYARCHIVE %s
+# CHECK-EMPTYARCHIVE: Flags: 0x60



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[llvm-branch-commits] [lld] release/19.x: [lld] select a default eflags for hexagon (#108431) (PR #108661)

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https://github.com/tru closed https://github.com/llvm/llvm-project/pull/108661
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[llvm-branch-commits] [libcxx] release/19.x: Guard an include of `` in `` with availability macro (#108429) (PR #108515)

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[llvm-branch-commits] [clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #108816)

2024-09-16 Thread Tobias Hieta via llvm-branch-commits


https://github.com/tru updated https://github.com/llvm/llvm-project/pull/108816

>From 149a150b50c112e26fc5acbdd58250c44ccd777f Mon Sep 17 00:00:00 2001
From: Ganesh Gopalasubramanian 
Date: Mon, 16 Sep 2024 11:16:14 +
Subject: [PATCH] [X86] AMD Zen 5 Initial enablement

---
 clang/lib/Basic/Targets/X86.cpp   |   4 +
 clang/test/CodeGen/target-builtin-noerror.c   |   1 +
 clang/test/Driver/x86-march.c |   4 +
 clang/test/Frontend/x86-target-cpu.c  |   1 +
 clang/test/Misc/target-invalid-cpu-note.c |   8 +-
 .../Preprocessor/predefined-arch-macros.c | 142 ++
 compiler-rt/lib/builtins/cpu_model/x86.c  |  20 +++
 .../llvm/TargetParser/X86TargetParser.def |   3 +
 .../llvm/TargetParser/X86TargetParser.h   |   1 +
 llvm/lib/Target/X86/X86.td|  15 ++
 llvm/lib/Target/X86/X86PfmCounters.td |   1 +
 llvm/lib/TargetParser/Host.cpp|  19 +++
 llvm/lib/TargetParser/X86TargetParser.cpp |   5 +
 .../CodeGen/X86/bypass-slow-division-64.ll|   1 +
 llvm/test/CodeGen/X86/cmp16.ll|   1 +
 llvm/test/CodeGen/X86/cpus-amd.ll |   1 +
 llvm/test/CodeGen/X86/rdpru.ll|   1 +
 llvm/test/CodeGen/X86/shuffle-as-shifts.ll|   1 +
 llvm/test/CodeGen/X86/slow-unaligned-mem.ll   |   1 +
 llvm/test/CodeGen/X86/sqrt-fastmath-tune.ll   |   1 +
 .../X86/tuning-shuffle-permilpd-avx512.ll |   1 +
 .../X86/tuning-shuffle-permilps-avx512.ll |   1 +
 .../X86/tuning-shuffle-unpckpd-avx512.ll  |   1 +
 .../X86/tuning-shuffle-unpckps-avx512.ll  |   1 +
 .../X86/vector-shuffle-fast-per-lane.ll   |   1 +
 llvm/test/CodeGen/X86/vpdpwssd.ll |   1 +
 .../CodeGen/X86/x86-64-double-shifts-var.ll   |   1 +
 llvm/test/MC/X86/x86_long_nop.s   |   2 +
 .../Transforms/LoopUnroll/X86/call-remark.ll  |   1 +
 .../Transforms/SLPVectorizer/X86/pr63668.ll   |   1 +
 30 files changed, 238 insertions(+), 4 deletions(-)

diff --git a/clang/lib/Basic/Targets/X86.cpp b/clang/lib/Basic/Targets/X86.cpp
index 18e6dbf03e00db..072c97e6c8c6e0 100644
--- a/clang/lib/Basic/Targets/X86.cpp
+++ b/clang/lib/Basic/Targets/X86.cpp
@@ -723,6 +723,9 @@ void X86TargetInfo::getTargetDefines(const LangOptions 
&Opts,
   case CK_ZNVER4:
 defineCPUMacros(Builder, "znver4");
 break;
+  case CK_ZNVER5:
+defineCPUMacros(Builder, "znver5");
+break;
   case CK_Geode:
 defineCPUMacros(Builder, "geode");
 break;
@@ -1613,6 +1616,7 @@ std::optional 
X86TargetInfo::getCPUCacheLineSize() const {
 case CK_ZNVER2:
 case CK_ZNVER3:
 case CK_ZNVER4:
+case CK_ZNVER5:
 // Deprecated
 case CK_x86_64:
 case CK_x86_64_v2:
diff --git a/clang/test/CodeGen/target-builtin-noerror.c 
b/clang/test/CodeGen/target-builtin-noerror.c
index 2e16fd8b9fe4d8..d681dcd3a13e8f 100644
--- a/clang/test/CodeGen/target-builtin-noerror.c
+++ b/clang/test/CodeGen/target-builtin-noerror.c
@@ -205,4 +205,5 @@ void verifycpustrings(void) {
   (void)__builtin_cpu_is("znver2");
   (void)__builtin_cpu_is("znver3");
   (void)__builtin_cpu_is("znver4");
+  (void)__builtin_cpu_is("znver5");
 }
diff --git a/clang/test/Driver/x86-march.c b/clang/test/Driver/x86-march.c
index cc993b53937c17..3bc2a82ae778d6 100644
--- a/clang/test/Driver/x86-march.c
+++ b/clang/test/Driver/x86-march.c
@@ -242,6 +242,10 @@
 // RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=znver4 2>&1 \
 // RUN:   | FileCheck %s -check-prefix=znver4
 // znver4: "-target-cpu" "znver4"
+//
+// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=znver5 2>&1 \
+// RUN:   | FileCheck %s -check-prefix=znver5
+// znver5: "-target-cpu" "znver5"
 
 // RUN: %clang -target x86_64 -c -### %s -march=x86-64 2>&1 | FileCheck %s 
--check-prefix=x86-64
 // x86-64: "-target-cpu" "x86-64"
diff --git a/clang/test/Frontend/x86-target-cpu.c 
b/clang/test/Frontend/x86-target-cpu.c
index 6c8502ac2c21ee..f2885a040c3701 100644
--- a/clang/test/Frontend/x86-target-cpu.c
+++ b/clang/test/Frontend/x86-target-cpu.c
@@ -38,5 +38,6 @@
 // RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu znver2 -verify %s
 // RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu znver3 -verify %s
 // RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu znver4 -verify %s
+// RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu znver5 -verify %s
 //
 // expected-no-diagnostics
diff --git a/clang/test/Misc/target-invalid-cpu-note.c 
b/clang/test/Misc/target-invalid-cpu-note.c
index 4d6759dd81537a..6fd71bb82381ae 100644
--- a/clang/test/Misc/target-invalid-cpu-note.c
+++ b/clang/test/Misc/target-invalid-cpu-note.c
@@ -13,19 +13,19 @@
 
 // RUN: not %clang_cc1 -triple i386--- -target-cpu not-a-cpu -fsyntax-only %s 
2>&1 | FileCheck %s --check-prefix X86
 // X86: error: unknown target CPU 'not-a-cpu'
-// X86-NEXT: note: valid target CPU values are: i386, i486, winchip-c6, 
winchip2, c3, i586, pentium, pentium-mmx, pent

[llvm-branch-commits] [clang] 149a150 - [X86] AMD Zen 5 Initial enablement

2024-09-16 Thread Tobias Hieta via llvm-branch-commits


Author: Ganesh Gopalasubramanian
Date: 2024-09-16T20:33:17+02:00
New Revision: 149a150b50c112e26fc5acbdd58250c44ccd777f

URL: 
https://github.com/llvm/llvm-project/commit/149a150b50c112e26fc5acbdd58250c44ccd777f
DIFF: 
https://github.com/llvm/llvm-project/commit/149a150b50c112e26fc5acbdd58250c44ccd777f.diff

LOG: [X86] AMD Zen 5 Initial enablement

Added: 


Modified: 
clang/lib/Basic/Targets/X86.cpp
clang/test/CodeGen/target-builtin-noerror.c
clang/test/Driver/x86-march.c
clang/test/Frontend/x86-target-cpu.c
clang/test/Misc/target-invalid-cpu-note.c
clang/test/Preprocessor/predefined-arch-macros.c
compiler-rt/lib/builtins/cpu_model/x86.c
llvm/include/llvm/TargetParser/X86TargetParser.def
llvm/include/llvm/TargetParser/X86TargetParser.h
llvm/lib/Target/X86/X86.td
llvm/lib/Target/X86/X86PfmCounters.td
llvm/lib/TargetParser/Host.cpp
llvm/lib/TargetParser/X86TargetParser.cpp
llvm/test/CodeGen/X86/bypass-slow-division-64.ll
llvm/test/CodeGen/X86/cmp16.ll
llvm/test/CodeGen/X86/cpus-amd.ll
llvm/test/CodeGen/X86/rdpru.ll
llvm/test/CodeGen/X86/shuffle-as-shifts.ll
llvm/test/CodeGen/X86/slow-unaligned-mem.ll
llvm/test/CodeGen/X86/sqrt-fastmath-tune.ll
llvm/test/CodeGen/X86/tuning-shuffle-permilpd-avx512.ll
llvm/test/CodeGen/X86/tuning-shuffle-permilps-avx512.ll
llvm/test/CodeGen/X86/tuning-shuffle-unpckpd-avx512.ll
llvm/test/CodeGen/X86/tuning-shuffle-unpckps-avx512.ll
llvm/test/CodeGen/X86/vector-shuffle-fast-per-lane.ll
llvm/test/CodeGen/X86/vpdpwssd.ll
llvm/test/CodeGen/X86/x86-64-double-shifts-var.ll
llvm/test/MC/X86/x86_long_nop.s
llvm/test/Transforms/LoopUnroll/X86/call-remark.ll
llvm/test/Transforms/SLPVectorizer/X86/pr63668.ll

Removed: 




diff  --git a/clang/lib/Basic/Targets/X86.cpp b/clang/lib/Basic/Targets/X86.cpp
index 18e6dbf03e00db..072c97e6c8c6e0 100644
--- a/clang/lib/Basic/Targets/X86.cpp
+++ b/clang/lib/Basic/Targets/X86.cpp
@@ -723,6 +723,9 @@ void X86TargetInfo::getTargetDefines(const LangOptions 
&Opts,
   case CK_ZNVER4:
 defineCPUMacros(Builder, "znver4");
 break;
+  case CK_ZNVER5:
+defineCPUMacros(Builder, "znver5");
+break;
   case CK_Geode:
 defineCPUMacros(Builder, "geode");
 break;
@@ -1613,6 +1616,7 @@ std::optional 
X86TargetInfo::getCPUCacheLineSize() const {
 case CK_ZNVER2:
 case CK_ZNVER3:
 case CK_ZNVER4:
+case CK_ZNVER5:
 // Deprecated
 case CK_x86_64:
 case CK_x86_64_v2:

diff  --git a/clang/test/CodeGen/target-builtin-noerror.c 
b/clang/test/CodeGen/target-builtin-noerror.c
index 2e16fd8b9fe4d8..d681dcd3a13e8f 100644
--- a/clang/test/CodeGen/target-builtin-noerror.c
+++ b/clang/test/CodeGen/target-builtin-noerror.c
@@ -205,4 +205,5 @@ void verifycpustrings(void) {
   (void)__builtin_cpu_is("znver2");
   (void)__builtin_cpu_is("znver3");
   (void)__builtin_cpu_is("znver4");
+  (void)__builtin_cpu_is("znver5");
 }

diff  --git a/clang/test/Driver/x86-march.c b/clang/test/Driver/x86-march.c
index cc993b53937c17..3bc2a82ae778d6 100644
--- a/clang/test/Driver/x86-march.c
+++ b/clang/test/Driver/x86-march.c
@@ -242,6 +242,10 @@
 // RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=znver4 2>&1 \
 // RUN:   | FileCheck %s -check-prefix=znver4
 // znver4: "-target-cpu" "znver4"
+//
+// RUN: %clang -target x86_64-unknown-unknown -c -### %s -march=znver5 2>&1 \
+// RUN:   | FileCheck %s -check-prefix=znver5
+// znver5: "-target-cpu" "znver5"
 
 // RUN: %clang -target x86_64 -c -### %s -march=x86-64 2>&1 | FileCheck %s 
--check-prefix=x86-64
 // x86-64: "-target-cpu" "x86-64"

diff  --git a/clang/test/Frontend/x86-target-cpu.c 
b/clang/test/Frontend/x86-target-cpu.c
index 6c8502ac2c21ee..f2885a040c3701 100644
--- a/clang/test/Frontend/x86-target-cpu.c
+++ b/clang/test/Frontend/x86-target-cpu.c
@@ -38,5 +38,6 @@
 // RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu znver2 -verify %s
 // RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu znver3 -verify %s
 // RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu znver4 -verify %s
+// RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-cpu znver5 -verify %s
 //
 // expected-no-diagnostics

diff  --git a/clang/test/Misc/target-invalid-cpu-note.c 
b/clang/test/Misc/target-invalid-cpu-note.c
index 4d6759dd81537a..6fd71bb82381ae 100644
--- a/clang/test/Misc/target-invalid-cpu-note.c
+++ b/clang/test/Misc/target-invalid-cpu-note.c
@@ -13,19 +13,19 @@
 
 // RUN: not %clang_cc1 -triple i386--- -target-cpu not-a-cpu -fsyntax-only %s 
2>&1 | FileCheck %s --check-prefix X86
 // X86: error: unknown target CPU 'not-a-cpu'
-// X86-NEXT: note: valid target CPU values are: i386, i486, winchip-c6, 
winchip2, c3, i586, pentium, pentium-mmx, pentiumpro, i686, pentium2, pentium3, 
pentium3m, pentium-m, c3-2, yonah, pentium4, pentium4m, prescott, nocona, 
core2, penr

[llvm-branch-commits] [clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #108816)

2024-09-16 Thread Tobias Hieta via llvm-branch-commits


https://github.com/tru closed https://github.com/llvm/llvm-project/pull/108816
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[llvm-branch-commits] [llvm] release/19.x: [PowerPC] Fix assert exposed by PR 95931 in LowerBITCAST (#108062) (PR #108834)

2024-09-16 Thread Tobias Hieta via llvm-branch-commits


https://github.com/tru updated https://github.com/llvm/llvm-project/pull/108834

>From bdae3c487cbb2b4161e7fbb54a855f0ba55da61a Mon Sep 17 00:00:00 2001
From: Zaara Syeda 
Date: Tue, 10 Sep 2024 14:14:01 -0400
Subject: [PATCH] [PowerPC] Fix assert exposed by PR 95931 in LowerBITCAST
 (#108062)

Hit Assertion failed: Num < NumOperands && "Invalid child # of SDNode!"
Fix by checking opcode and value type before calling getOperand.

(cherry picked from commit 22067a8eb43a7194e65913b47a9c724fde3ed68f)
---
 llvm/lib/Target/PowerPC/PPCISelLowering.cpp |  9 +
 llvm/test/CodeGen/PowerPC/f128-bitcast.ll   | 22 +
 2 files changed, 27 insertions(+), 4 deletions(-)

diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp 
b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index 21cf4d9eeac173..758de9d732fa7e 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -9338,12 +9338,13 @@ SDValue PPCTargetLowering::LowerBITCAST(SDValue Op, 
SelectionDAG &DAG) const {
   SDLoc dl(Op);
   SDValue Op0 = Op->getOperand(0);
 
+  if (!Subtarget.isPPC64() || (Op0.getOpcode() != ISD::BUILD_PAIR) ||
+  (Op.getValueType() != MVT::f128))
+return SDValue();
+
   SDValue Lo = Op0.getOperand(0);
   SDValue Hi = Op0.getOperand(1);
-
-  if ((Op.getValueType() != MVT::f128) ||
-  (Op0.getOpcode() != ISD::BUILD_PAIR) || (Lo.getValueType() != MVT::i64) 
||
-  (Hi.getValueType() != MVT::i64) || !Subtarget.isPPC64())
+  if ((Lo.getValueType() != MVT::i64) || (Hi.getValueType() != MVT::i64))
 return SDValue();
 
   if (!Subtarget.isLittleEndian())
diff --git a/llvm/test/CodeGen/PowerPC/f128-bitcast.ll 
b/llvm/test/CodeGen/PowerPC/f128-bitcast.ll
index ffbfbd0c64ff3f..55ba3cb1e05387 100644
--- a/llvm/test/CodeGen/PowerPC/f128-bitcast.ll
+++ b/llvm/test/CodeGen/PowerPC/f128-bitcast.ll
@@ -86,3 +86,25 @@ entry:
   ret i64 %1
 }
 
+define <4 x i32> @truncBitcast(i512 %a) {
+; CHECK-LABEL: truncBitcast:
+; CHECK:   # %bb.0: # %entry
+; CHECK-NEXT:mtvsrdd v2, r4, r3
+; CHECK-NEXT:blr
+;
+; CHECK-BE-LABEL: truncBitcast:
+; CHECK-BE:   # %bb.0: # %entry
+; CHECK-BE-NEXT:mtvsrdd v2, r9, r10
+; CHECK-BE-NEXT:blr
+;
+; CHECK-P8-LABEL: truncBitcast:
+; CHECK-P8:   # %bb.0: # %entry
+; CHECK-P8-NEXT:mtfprd f0, r3
+; CHECK-P8-NEXT:mtfprd f1, r4
+; CHECK-P8-NEXT:xxmrghd v2, vs1, vs0
+; CHECK-P8-NEXT:blr
+entry:
+  %0 = trunc i512 %a to i128
+  %1 = bitcast i128 %0 to <4 x i32>
+  ret <4 x i32> %1
+}

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[llvm-branch-commits] [clang] [compiler-rt] [llvm] [X86] AMD Zen 5 Initial enablement (PR #108816)

2024-09-16 Thread via llvm-branch-commits


github-actions[bot] wrote:

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[llvm-branch-commits] [llvm] bdae3c4 - [PowerPC] Fix assert exposed by PR 95931 in LowerBITCAST (#108062)

2024-09-16 Thread Tobias Hieta via llvm-branch-commits


Author: Zaara Syeda
Date: 2024-09-16T20:33:55+02:00
New Revision: bdae3c487cbb2b4161e7fbb54a855f0ba55da61a

URL: 
https://github.com/llvm/llvm-project/commit/bdae3c487cbb2b4161e7fbb54a855f0ba55da61a
DIFF: 
https://github.com/llvm/llvm-project/commit/bdae3c487cbb2b4161e7fbb54a855f0ba55da61a.diff

LOG: [PowerPC] Fix assert exposed by PR 95931 in LowerBITCAST (#108062)

Hit Assertion failed: Num < NumOperands && "Invalid child # of SDNode!"
Fix by checking opcode and value type before calling getOperand.

(cherry picked from commit 22067a8eb43a7194e65913b47a9c724fde3ed68f)

Added: 


Modified: 
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
llvm/test/CodeGen/PowerPC/f128-bitcast.ll

Removed: 




diff  --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp 
b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index 21cf4d9eeac173..758de9d732fa7e 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -9338,12 +9338,13 @@ SDValue PPCTargetLowering::LowerBITCAST(SDValue Op, 
SelectionDAG &DAG) const {
   SDLoc dl(Op);
   SDValue Op0 = Op->getOperand(0);
 
+  if (!Subtarget.isPPC64() || (Op0.getOpcode() != ISD::BUILD_PAIR) ||
+  (Op.getValueType() != MVT::f128))
+return SDValue();
+
   SDValue Lo = Op0.getOperand(0);
   SDValue Hi = Op0.getOperand(1);
-
-  if ((Op.getValueType() != MVT::f128) ||
-  (Op0.getOpcode() != ISD::BUILD_PAIR) || (Lo.getValueType() != MVT::i64) 
||
-  (Hi.getValueType() != MVT::i64) || !Subtarget.isPPC64())
+  if ((Lo.getValueType() != MVT::i64) || (Hi.getValueType() != MVT::i64))
 return SDValue();
 
   if (!Subtarget.isLittleEndian())

diff  --git a/llvm/test/CodeGen/PowerPC/f128-bitcast.ll 
b/llvm/test/CodeGen/PowerPC/f128-bitcast.ll
index ffbfbd0c64ff3f..55ba3cb1e05387 100644
--- a/llvm/test/CodeGen/PowerPC/f128-bitcast.ll
+++ b/llvm/test/CodeGen/PowerPC/f128-bitcast.ll
@@ -86,3 +86,25 @@ entry:
   ret i64 %1
 }
 
+define <4 x i32> @truncBitcast(i512 %a) {
+; CHECK-LABEL: truncBitcast:
+; CHECK:   # %bb.0: # %entry
+; CHECK-NEXT:mtvsrdd v2, r4, r3
+; CHECK-NEXT:blr
+;
+; CHECK-BE-LABEL: truncBitcast:
+; CHECK-BE:   # %bb.0: # %entry
+; CHECK-BE-NEXT:mtvsrdd v2, r9, r10
+; CHECK-BE-NEXT:blr
+;
+; CHECK-P8-LABEL: truncBitcast:
+; CHECK-P8:   # %bb.0: # %entry
+; CHECK-P8-NEXT:mtfprd f0, r3
+; CHECK-P8-NEXT:mtfprd f1, r4
+; CHECK-P8-NEXT:xxmrghd v2, vs1, vs0
+; CHECK-P8-NEXT:blr
+entry:
+  %0 = trunc i512 %a to i128
+  %1 = bitcast i128 %0 to <4 x i32>
+  ret <4 x i32> %1
+}



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[llvm-branch-commits] [llvm] release/19.x: [PowerPC] Fix assert exposed by PR 95931 in LowerBITCAST (#108062) (PR #108834)

2024-09-16 Thread Tobias Hieta via llvm-branch-commits


https://github.com/tru closed https://github.com/llvm/llvm-project/pull/108834
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[llvm-branch-commits] [llvm] release/19.x: [PowerPC] Fix assert exposed by PR 95931 in LowerBITCAST (#108062) (PR #108834)

2024-09-16 Thread via llvm-branch-commits


github-actions[bot] wrote:

@syzaara (or anyone else). If you would like to add a note about this fix in 
the release notes (completely optional). Please reply to this comment with a 
one or two sentence description of the fix.  When you are done, please add the 
release:note label to this PR. 

https://github.com/llvm/llvm-project/pull/108834
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[llvm-branch-commits] [llvm] release/19.x: [AVR] Fix 16-bit LDDs with immediate overflows (#104923) (PR #106993)

2024-09-16 Thread Tobias Hieta via llvm-branch-commits


tru wrote:

This needs to be approved - can someone approve it and I'll merge it before 
final.

https://github.com/llvm/llvm-project/pull/106993
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[llvm-branch-commits] [compiler-rt] [profile] Change __llvm_profile_counter_bias type to match llvm (PR #107362)

2024-09-16 Thread Tobias Hieta via llvm-branch-commits


https://github.com/tru closed https://github.com/llvm/llvm-project/pull/107362
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[llvm-branch-commits] [clang] release/19.x: [Clang][Concepts] Fix the constraint equivalence checking involving parameter packs (#102131) (PR #106043)

2024-09-16 Thread Tobias Hieta via llvm-branch-commits


tru wrote:

Can someone approve this and I'll merge it after final.

https://github.com/llvm/llvm-project/pull/106043
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[llvm-branch-commits] [clang] release/19.x: [Clang][Sema] Use the correct lookup context when building overloaded 'operator->' in the current instantiation (#104458) (PR #107886)

2024-09-16 Thread Tobias Hieta via llvm-branch-commits


tru wrote:

Should we drop this then? Or will the fix be fixed? 

https://github.com/llvm/llvm-project/pull/107886
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[llvm-branch-commits] [lldb] release/19.x: [lldb] Fix some tests that fail with system libstdc++ (#106885) (PR #107938)

2024-09-16 Thread Tobias Hieta via llvm-branch-commits


tru wrote:

Will / should this still be fixed for 19?

https://github.com/llvm/llvm-project/pull/107938
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[llvm-branch-commits] [llvm] release/19.x: [AVR] Fix 16-bit LDDs with immediate overflows (#104923) (PR #106993)

2024-09-16 Thread Patryk Wychowaniec via llvm-branch-commits


Patryk27 wrote:

cc @benshi001 / @aykevl 🙂 

https://github.com/llvm/llvm-project/pull/106993
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[llvm-branch-commits] [lldb] release/19.x: [lldb] Fix some tests that fail with system libstdc++ (#106885) (PR #107938)

2024-09-16 Thread Michael Buch via llvm-branch-commits


Michael137 wrote:

If you cherry-pick `2bcab9ba7139cfa96c85433fa85b29c8a6d7008b` alongside it, 
then we should be fine.

https://github.com/llvm/llvm-project/pull/107938
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[llvm-branch-commits] [clang] release/19.x: [Clang][Sema] Use the correct lookup context when building overloaded 'operator->' in the current instantiation (#104458) (PR #107886)

2024-09-16 Thread via llvm-branch-commits


cor3ntin wrote:

we should (unfortunately) drop this.
maybe we can reconsider for .2. either way, not this week!

https://github.com/llvm/llvm-project/pull/107886
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[llvm-branch-commits] [llvm] release/19.x: [DAGCombiner] cache negative result from getMergeStoreCandidates() (#106949) (PR #108397)

2024-09-16 Thread Nikita Popov via llvm-branch-commits


nikic wrote:

Maybe I misunderstood the question, but I think this should still go into 
19.1.x, just doesn't need to be part of the 19.1.0 release.

https://github.com/llvm/llvm-project/pull/108397
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[llvm-branch-commits] [clang] release/19.x: [Clang][Sema] Use the correct lookup context when building overloaded 'operator->' in the current instantiation (#104458) (PR #107886)

2024-09-16 Thread Tobias Hieta via llvm-branch-commits


tru wrote:

Alright - reopen a new PR if/when a fix is ready.

https://github.com/llvm/llvm-project/pull/107886
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[llvm-branch-commits] [clang] release/19.x: [Clang][Sema] Use the correct lookup context when building overloaded 'operator->' in the current instantiation (#104458) (PR #107886)

2024-09-16 Thread Tobias Hieta via llvm-branch-commits


https://github.com/tru closed https://github.com/llvm/llvm-project/pull/107886
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[llvm-branch-commits] [llvm] release/19.x: [DAGCombiner] cache negative result from getMergeStoreCandidates() (#106949) (PR #108397)

2024-09-16 Thread Tobias Hieta via llvm-branch-commits


https://github.com/tru reopened https://github.com/llvm/llvm-project/pull/108397
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[llvm-branch-commits] [llvm] release/19.x: [DAGCombiner] cache negative result from getMergeStoreCandidates() (#106949) (PR #108397)

2024-09-16 Thread Tobias Hieta via llvm-branch-commits


tru wrote:

> Maybe I misunderstood the question, but I think this should still go into 
> 19.1.x, just doesn't need to be part of the 19.1.0 release.

Alright - that's probably me misunderstanding your comment as it shouldn't go 
into 19. at all. But I'll keep it for 19.1.1 then!

https://github.com/llvm/llvm-project/pull/108397
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[llvm-branch-commits] [lldb] release/19.x: [lldb] Fix some tests that fail with system libstdc++ (#106885) (PR #107938)

2024-09-16 Thread via llvm-branch-commits


https://github.com/llvmbot updated 
https://github.com/llvm/llvm-project/pull/107938

>From 99e654ba444ff4ff22e94b7b3ebcbf42fbbcbe78 Mon Sep 17 00:00:00 2001
From: Tom Stellard 
Date: Fri, 6 Sep 2024 17:05:32 -0700
Subject: [PATCH 1/2] [lldb] Fix some tests that fail with system libstdc++
 (#106885)

This is a revert of b1fcc1840c312472cb9ccb8c4e5e02ca13b31113.

These tests weren't working on Ubuntu 22.04 or Fedora 37-40. I'm not
sure exactly why, but it seems like they may be incompatible with
libstdc++. Also, despite the fact that the tests were using the system
libstdc++, the tests were only run when libcxx was enabled.

I tested this with a RelWithDebInfo build and the tests passed.

Fixes #106475

(cherry picked from commit adf44d5c3ea03569f019740e1140c3205810b3fa)
---
 .../import-std-module/deque-dbg-info-content/Makefile | 4 +---
 .../import-std-module/list-dbg-info-content/Makefile  | 4 +---
 .../import-std-module/vector-dbg-info-content/Makefile| 4 +---
 3 files changed, 3 insertions(+), 9 deletions(-)

diff --git 
a/lldb/test/API/commands/expression/import-std-module/deque-dbg-info-content/Makefile
 
b/lldb/test/API/commands/expression/import-std-module/deque-dbg-info-content/Makefile
index 98638c56f0b98f..f938f7428468ab 100644
--- 
a/lldb/test/API/commands/expression/import-std-module/deque-dbg-info-content/Makefile
+++ 
b/lldb/test/API/commands/expression/import-std-module/deque-dbg-info-content/Makefile
@@ -1,5 +1,3 @@
-# FIXME: once the expression evaluator can handle std libraries with debug
-# info, change this to USE_LIBCPP=1
-USE_SYSTEM_STDLIB := 1
+USE_LIBCPP := 1
 CXX_SOURCES := main.cpp
 include Makefile.rules
diff --git 
a/lldb/test/API/commands/expression/import-std-module/list-dbg-info-content/Makefile
 
b/lldb/test/API/commands/expression/import-std-module/list-dbg-info-content/Makefile
index 98638c56f0b98f..f938f7428468ab 100644
--- 
a/lldb/test/API/commands/expression/import-std-module/list-dbg-info-content/Makefile
+++ 
b/lldb/test/API/commands/expression/import-std-module/list-dbg-info-content/Makefile
@@ -1,5 +1,3 @@
-# FIXME: once the expression evaluator can handle std libraries with debug
-# info, change this to USE_LIBCPP=1
-USE_SYSTEM_STDLIB := 1
+USE_LIBCPP := 1
 CXX_SOURCES := main.cpp
 include Makefile.rules
diff --git 
a/lldb/test/API/commands/expression/import-std-module/vector-dbg-info-content/Makefile
 
b/lldb/test/API/commands/expression/import-std-module/vector-dbg-info-content/Makefile
index 98638c56f0b98f..f938f7428468ab 100644
--- 
a/lldb/test/API/commands/expression/import-std-module/vector-dbg-info-content/Makefile
+++ 
b/lldb/test/API/commands/expression/import-std-module/vector-dbg-info-content/Makefile
@@ -1,5 +1,3 @@
-# FIXME: once the expression evaluator can handle std libraries with debug
-# info, change this to USE_LIBCPP=1
-USE_SYSTEM_STDLIB := 1
+USE_LIBCPP := 1
 CXX_SOURCES := main.cpp
 include Makefile.rules

>From fa76940ba0c246212bcd4a543a90ef4215ee39a9 Mon Sep 17 00:00:00 2001
From: Michael Buch 
Date: Tue, 10 Sep 2024 16:00:40 +0100
Subject: [PATCH 2/2] [lldb][test] TestDbgInfoContentVectorFromStdModule.py:
 skip test on Darwin (#108003)

This started failing on the macOS CI after
https://github.com/llvm/llvm-project/pull/106885:

```
  lldb-api :: 
commands/expression/import-std-module/vector-dbg-info-content/TestDbgInfoContentVectorFromStdModule.py

"/Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/lldb-build/bin/clang" 
 -std=c++11 -g -O0 -isysroot 
"/Applications/Xcode-beta.app/Contents/Developer/Platforms/MacOSX.platform/Developer/SDKs/MacOSX14.2.sdk"
 -arch arm64  
-I/Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/llvm-project/lldb/packages/Python/lldbsuite/test/make/../../../../..//include
 
-I/Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/lldb-build/tools/lldb/include
 
-I/Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/llvm-project/lldb/test/API/commands/expression/import-std-module/vector-dbg-info-content
 
-I/Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/llvm-project/lldb/packages/Python/lldbsuite/test/make
 -include 
/Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/llvm-project/lldb/packages/Python/lldbsuite/test/make/test_common.h
  -fno-limit-debug-info-nostdlib++ -nostdinc++ -cxx-isystem 
/Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/lldb-build/include/c++/v1
  --driver-mode=g++ -MT main.o -MD -MP -MF main.d -c -o main.o 
/Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/llvm-project/lldb/test/API/commands/expression/import-std-module/vector-dbg-info-content/main.cpp
"/Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/lldb-build/bin/clang" 
 main.o -g -O0 -isysroot 
"/Applications/Xcode-beta.app/Contents/Developer/Platforms/MacOSX.platform/Developer/SDKs/MacOSX14.2.sdk"
 -arch arm64  
-I/Users/ec2-user/jenkins/workspace/llvm.org/as-lldb-cmake/llvm-project/lldb/packages/Python/lldbsuite/test/make/../../../../..//include
 
-I

[llvm-branch-commits] [clang] Backport "[Clang][CodeGen] Fix type for atomic float incdec operators (#107075)" (PR #107184)

2024-09-16 Thread Simon Pilgrim via llvm-branch-commits


https://github.com/RKSimon approved this pull request.


https://github.com/llvm/llvm-project/pull/107184
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[llvm-branch-commits] [compiler-rt] 328f696 - Revert "[sanitizer] Fix partially initialized static TLS range (#108685)"

2024-09-16 Thread via llvm-branch-commits


Author: Vitaly Buka
Date: 2024-09-16T13:50:22-07:00
New Revision: 328f6968ea3f40321537f83a1d7ee2b79e0fc50e

URL: 
https://github.com/llvm/llvm-project/commit/328f6968ea3f40321537f83a1d7ee2b79e0fc50e
DIFF: 
https://github.com/llvm/llvm-project/commit/328f6968ea3f40321537f83a1d7ee2b79e0fc50e.diff

LOG: Revert "[sanitizer] Fix partially initialized static TLS range (#108685)"

This reverts commit b7c9ebe4ece556aa10cb592b59fe3793f4d9e6c2.

Added: 


Modified: 
compiler-rt/lib/asan/asan_posix.cpp
compiler-rt/lib/asan/asan_rtl.cpp
compiler-rt/lib/asan/asan_thread.cpp
compiler-rt/lib/dfsan/dfsan_thread.cpp
compiler-rt/lib/hwasan/hwasan_linux.cpp
compiler-rt/lib/lsan/lsan_posix.cpp
compiler-rt/lib/memprof/memprof_thread.cpp
compiler-rt/lib/msan/msan_thread.cpp
compiler-rt/lib/nsan/nsan_thread.cpp
compiler-rt/lib/sanitizer_common/sanitizer_common.h
compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp
compiler-rt/lib/sanitizer_common/sanitizer_mac.cpp
compiler-rt/lib/sanitizer_common/sanitizer_win.cpp
compiler-rt/lib/sanitizer_common/tests/sanitizer_common_test.cpp
compiler-rt/lib/tsan/rtl/tsan_rtl_thread.cpp
compiler-rt/test/sanitizer_common/TestCases/Linux/tls_malloc_hook.c

Removed: 




diff  --git a/compiler-rt/lib/asan/asan_posix.cpp 
b/compiler-rt/lib/asan/asan_posix.cpp
index 4ee8d7d399e95c..c42c0472592b78 100644
--- a/compiler-rt/lib/asan/asan_posix.cpp
+++ b/compiler-rt/lib/asan/asan_posix.cpp
@@ -59,10 +59,10 @@ bool PlatformUnpoisonStacks() {
 
   // Since we're on the signal alternate stack, we cannot find the DEFAULT
   // stack bottom using a local variable.
-  uptr stack_begin, stack_end, tls_begin, tls_end;
-  GetThreadStackAndTls(/*main=*/false, &stack_begin, &stack_end, &tls_begin,
-   &tls_end);
-  UnpoisonStack(stack_begin, stack_end, "default");
+  uptr default_bottom, tls_addr, tls_size, stack_size;
+  GetThreadStackAndTls(/*main=*/false, &default_bottom, &stack_size, &tls_addr,
+   &tls_size);
+  UnpoisonStack(default_bottom, default_bottom + stack_size, "default");
   return true;
 }
 

diff  --git a/compiler-rt/lib/asan/asan_rtl.cpp 
b/compiler-rt/lib/asan/asan_rtl.cpp
index a390802af28d09..d42a75e9e5211a 100644
--- a/compiler-rt/lib/asan/asan_rtl.cpp
+++ b/compiler-rt/lib/asan/asan_rtl.cpp
@@ -580,8 +580,10 @@ static void UnpoisonDefaultStack() {
   } else {
 CHECK(!SANITIZER_FUCHSIA);
 // If we haven't seen this thread, try asking the OS for stack bounds.
-uptr tls_begin, tls_end;
-GetThreadStackAndTls(/*main=*/false, &bottom, &top, &tls_begin, &tls_end);
+uptr tls_addr, tls_size, stack_size;
+GetThreadStackAndTls(/*main=*/false, &bottom, &stack_size, &tls_addr,
+ &tls_size);
+top = bottom + stack_size;
   }
 
   UnpoisonStack(bottom, top, "default");

diff  --git a/compiler-rt/lib/asan/asan_thread.cpp 
b/compiler-rt/lib/asan/asan_thread.cpp
index c1a804b9fcccd3..c79c33ab01342f 100644
--- a/compiler-rt/lib/asan/asan_thread.cpp
+++ b/compiler-rt/lib/asan/asan_thread.cpp
@@ -306,10 +306,13 @@ AsanThread *CreateMainThread() {
 // OS-specific implementations that need more information passed through.
 void AsanThread::SetThreadStackAndTls(const InitOptions *options) {
   DCHECK_EQ(options, nullptr);
-  GetThreadStackAndTls(tid() == kMainTid, &stack_bottom_, &stack_top_,
-   &tls_begin_, &tls_end_);
-  stack_top_ = RoundDownTo(stack_top_, ASAN_SHADOW_GRANULARITY);
+  uptr tls_size = 0;
+  uptr stack_size = 0;
+  GetThreadStackAndTls(tid() == kMainTid, &stack_bottom_, &stack_size,
+   &tls_begin_, &tls_size);
+  stack_top_ = RoundDownTo(stack_bottom_ + stack_size, 
ASAN_SHADOW_GRANULARITY);
   stack_bottom_ = RoundDownTo(stack_bottom_, ASAN_SHADOW_GRANULARITY);
+  tls_end_ = tls_begin_ + tls_size;
   dtls_ = DTLS_Get();
 
   if (stack_top_ != stack_bottom_) {

diff  --git a/compiler-rt/lib/dfsan/dfsan_thread.cpp 
b/compiler-rt/lib/dfsan/dfsan_thread.cpp
index 55d38916ead9e0..c1d47514f4bd99 100644
--- a/compiler-rt/lib/dfsan/dfsan_thread.cpp
+++ b/compiler-rt/lib/dfsan/dfsan_thread.cpp
@@ -21,8 +21,13 @@ DFsanThread *DFsanThread::Create(thread_callback_t 
start_routine, void *arg,
 }
 
 void DFsanThread::SetThreadStackAndTls() {
-  GetThreadStackAndTls(IsMainThread(), &stack_.bottom, &stack_.top, 
&tls_begin_,
-   &tls_end_);
+  uptr tls_size = 0;
+  uptr stack_size = 0;
+  GetThreadStackAndTls(IsMainThread(), &stack_.bottom, &stack_size, 
&tls_begin_,
+   &tls_size);
+  stack_.top = stack_.bottom + stack_size;
+  tls_end_ = tls_begin_ + tls_size;
+
   int local;
   CHECK(AddrIsInStack((uptr)&local));
 }

diff  --git a/compiler-rt/lib/hwasan/hwasan_linux.cpp 
b/compiler-rt/lib/hwasan/hwasan_linux.cpp
index d174fb882ca483..68294b5962569f 100644
--- a/compiler-rt/lib/hwa

[llvm-branch-commits] [clang] release/19.x: [Clang][Concepts] Fix the constraint equivalence checking involving parameter packs (#102131) (PR #106043)

2024-09-16 Thread Matheus Izvekov via llvm-branch-commits


https://github.com/mizvekov approved this pull request.


https://github.com/llvm/llvm-project/pull/106043
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[llvm-branch-commits] [compiler-rt] 7709f4a - Revert "Revert "[sanitizer] Fix partially initialized static TLS range" (#108…"

2024-09-16 Thread via llvm-branch-commits


Author: Vitaly Buka
Date: 2024-09-16T13:51:55-07:00
New Revision: 7709f4adb0edba7d9abd3f80415dcfcbe880a719

URL: 
https://github.com/llvm/llvm-project/commit/7709f4adb0edba7d9abd3f80415dcfcbe880a719
DIFF: 
https://github.com/llvm/llvm-project/commit/7709f4adb0edba7d9abd3f80415dcfcbe880a719.diff

LOG: Revert "Revert "[sanitizer] Fix partially initialized static TLS range" 
(#108…"

This reverts commit 9a1d0744ed851ee927f32f6b06777d93e9e32561.

Added: 


Modified: 
compiler-rt/lib/asan/asan_posix.cpp
compiler-rt/lib/asan/asan_rtl.cpp
compiler-rt/lib/asan/asan_thread.cpp
compiler-rt/lib/dfsan/dfsan_thread.cpp
compiler-rt/lib/hwasan/hwasan_linux.cpp
compiler-rt/lib/lsan/lsan_posix.cpp
compiler-rt/lib/memprof/memprof_thread.cpp
compiler-rt/lib/msan/msan_thread.cpp
compiler-rt/lib/nsan/nsan_thread.cpp
compiler-rt/lib/sanitizer_common/sanitizer_common.h
compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp
compiler-rt/lib/sanitizer_common/sanitizer_mac.cpp
compiler-rt/lib/sanitizer_common/sanitizer_win.cpp
compiler-rt/lib/sanitizer_common/tests/sanitizer_common_test.cpp
compiler-rt/lib/tsan/rtl/tsan_rtl_thread.cpp
compiler-rt/test/sanitizer_common/TestCases/Linux/tls_malloc_hook.c

Removed: 




diff  --git a/compiler-rt/lib/asan/asan_posix.cpp 
b/compiler-rt/lib/asan/asan_posix.cpp
index c42c0472592b78..4ee8d7d399e95c 100644
--- a/compiler-rt/lib/asan/asan_posix.cpp
+++ b/compiler-rt/lib/asan/asan_posix.cpp
@@ -59,10 +59,10 @@ bool PlatformUnpoisonStacks() {
 
   // Since we're on the signal alternate stack, we cannot find the DEFAULT
   // stack bottom using a local variable.
-  uptr default_bottom, tls_addr, tls_size, stack_size;
-  GetThreadStackAndTls(/*main=*/false, &default_bottom, &stack_size, &tls_addr,
-   &tls_size);
-  UnpoisonStack(default_bottom, default_bottom + stack_size, "default");
+  uptr stack_begin, stack_end, tls_begin, tls_end;
+  GetThreadStackAndTls(/*main=*/false, &stack_begin, &stack_end, &tls_begin,
+   &tls_end);
+  UnpoisonStack(stack_begin, stack_end, "default");
   return true;
 }
 

diff  --git a/compiler-rt/lib/asan/asan_rtl.cpp 
b/compiler-rt/lib/asan/asan_rtl.cpp
index d42a75e9e5211a..a390802af28d09 100644
--- a/compiler-rt/lib/asan/asan_rtl.cpp
+++ b/compiler-rt/lib/asan/asan_rtl.cpp
@@ -580,10 +580,8 @@ static void UnpoisonDefaultStack() {
   } else {
 CHECK(!SANITIZER_FUCHSIA);
 // If we haven't seen this thread, try asking the OS for stack bounds.
-uptr tls_addr, tls_size, stack_size;
-GetThreadStackAndTls(/*main=*/false, &bottom, &stack_size, &tls_addr,
- &tls_size);
-top = bottom + stack_size;
+uptr tls_begin, tls_end;
+GetThreadStackAndTls(/*main=*/false, &bottom, &top, &tls_begin, &tls_end);
   }
 
   UnpoisonStack(bottom, top, "default");

diff  --git a/compiler-rt/lib/asan/asan_thread.cpp 
b/compiler-rt/lib/asan/asan_thread.cpp
index c79c33ab01342f..c1a804b9fcccd3 100644
--- a/compiler-rt/lib/asan/asan_thread.cpp
+++ b/compiler-rt/lib/asan/asan_thread.cpp
@@ -306,13 +306,10 @@ AsanThread *CreateMainThread() {
 // OS-specific implementations that need more information passed through.
 void AsanThread::SetThreadStackAndTls(const InitOptions *options) {
   DCHECK_EQ(options, nullptr);
-  uptr tls_size = 0;
-  uptr stack_size = 0;
-  GetThreadStackAndTls(tid() == kMainTid, &stack_bottom_, &stack_size,
-   &tls_begin_, &tls_size);
-  stack_top_ = RoundDownTo(stack_bottom_ + stack_size, 
ASAN_SHADOW_GRANULARITY);
+  GetThreadStackAndTls(tid() == kMainTid, &stack_bottom_, &stack_top_,
+   &tls_begin_, &tls_end_);
+  stack_top_ = RoundDownTo(stack_top_, ASAN_SHADOW_GRANULARITY);
   stack_bottom_ = RoundDownTo(stack_bottom_, ASAN_SHADOW_GRANULARITY);
-  tls_end_ = tls_begin_ + tls_size;
   dtls_ = DTLS_Get();
 
   if (stack_top_ != stack_bottom_) {

diff  --git a/compiler-rt/lib/dfsan/dfsan_thread.cpp 
b/compiler-rt/lib/dfsan/dfsan_thread.cpp
index c1d47514f4bd99..55d38916ead9e0 100644
--- a/compiler-rt/lib/dfsan/dfsan_thread.cpp
+++ b/compiler-rt/lib/dfsan/dfsan_thread.cpp
@@ -21,13 +21,8 @@ DFsanThread *DFsanThread::Create(thread_callback_t 
start_routine, void *arg,
 }
 
 void DFsanThread::SetThreadStackAndTls() {
-  uptr tls_size = 0;
-  uptr stack_size = 0;
-  GetThreadStackAndTls(IsMainThread(), &stack_.bottom, &stack_size, 
&tls_begin_,
-   &tls_size);
-  stack_.top = stack_.bottom + stack_size;
-  tls_end_ = tls_begin_ + tls_size;
-
+  GetThreadStackAndTls(IsMainThread(), &stack_.bottom, &stack_.top, 
&tls_begin_,
+   &tls_end_);
   int local;
   CHECK(AddrIsInStack((uptr)&local));
 }

diff  --git a/compiler-rt/lib/hwasan/hwasan_linux.cpp 
b/compiler-rt/lib/hwasan/hwasan_linux.cpp
index 68294b5962569f..d174fb882ca483 100644
--- a/compiler-rt/

[llvm-branch-commits] [llvm] release/19.x: [AVR] Fix 16-bit LDDs with immediate overflows (#104923) (PR #106993)

2024-09-16 Thread Ben Shi via llvm-branch-commits


https://github.com/benshi001 approved this pull request.

LGTM

https://github.com/llvm/llvm-project/pull/106993
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[llvm-branch-commits] [NFC][sanitizer] Remove `else if` from ThreadDescriptorSizeFallback (PR #108909)

2024-09-16 Thread Vitaly Buka via llvm-branch-commits


https://github.com/vitalybuka created 
https://github.com/llvm/llvm-project/pull/108909

None


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[llvm-branch-commits] [NFC][sanitizer] Remove `else if` from ThreadDescriptorSizeFallback (PR #108909)

2024-09-16 Thread via llvm-branch-commits


llvmbot wrote:




@llvm/pr-subscribers-compiler-rt-sanitizer

Author: Vitaly Buka (vitalybuka)


Changes



---
Full diff: https://github.com/llvm/llvm-project/pull/108909.diff


1 Files Affected:

- (modified) compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp 
(+13-14) 


``diff
diff --git a/compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp 
b/compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp
index 8983ae5b6a69b7..a5101291904430 100644
--- a/compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp
+++ b/compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp
@@ -259,26 +259,26 @@ static uptr ThreadDescriptorSizeFallback() {
 if (SANITIZER_X32)
   return 1728;  // Assume only one particular version for x32.
 // For ARM sizeof(struct pthread) changed in Glibc 2.23.
-else if (SANITIZER_ARM)
+if (SANITIZER_ARM)
   return minor <= 22 ? 1120 : 1216;
-else if (minor <= 3)
+if (minor <= 3)
   return FIRST_32_SECOND_64(1104, 1696);
-else if (minor == 4)
+if (minor == 4)
   return FIRST_32_SECOND_64(1120, 1728);
-else if (minor == 5)
+if (minor == 5)
   return FIRST_32_SECOND_64(1136, 1728);
-else if (minor <= 9)
+if (minor <= 9)
   return FIRST_32_SECOND_64(1136, 1712);
-else if (minor == 10)
+if (minor == 10)
   return FIRST_32_SECOND_64(1168, 1776);
-else if (minor == 11 || (minor == 12 && patch == 1))
+if (minor == 11 || (minor == 12 && patch == 1))
   return FIRST_32_SECOND_64(1168, 2288);
-else if (minor <= 14)
+if (minor <= 14)
   return FIRST_32_SECOND_64(1168, 2304);
-else if (minor < 32)  // Unknown version
+if (minor < 32)  // Unknown version
   return FIRST_32_SECOND_64(1216, 2304);
-else  // minor == 32
-  return FIRST_32_SECOND_64(1344, 2496);
+// minor == 32
+return FIRST_32_SECOND_64(1344, 2496);
   }
   return 0;
 #elif defined(__s390__) || defined(__sparc__)
@@ -302,10 +302,9 @@ static uptr ThreadDescriptorSizeFallback() {
 // glibc version
 if (minor <= 28)  // WARNING: the highest tested version is 2.29
   return 1772;// no guarantees for this one
-else if (minor <= 31)
+if (minor <= 31)
   return 1772;  // tested against glibc 2.29, 2.31
-else
-  return 1936;  // tested against glibc 2.32
+return 1936;// tested against glibc 2.32
   }
   return 0;
 #elif defined(__aarch64__)

``




https://github.com/llvm/llvm-project/pull/108909
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[llvm-branch-commits] [NFC][sanitizer] Remove `else if` from ThreadDescriptorSizeFallback (PR #108909)

2024-09-16 Thread Thurston Dang via llvm-branch-commits


https://github.com/thurstond approved this pull request.


https://github.com/llvm/llvm-project/pull/108909
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[llvm-branch-commits] [NFC][sanitizer] Remove #elif to simplify ThreadDescriptorSizeFallback (PR #108911)

2024-09-16 Thread Vitaly Buka via llvm-branch-commits


https://github.com/vitalybuka created 
https://github.com/llvm/llvm-project/pull/108911

None


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[llvm-branch-commits] [NFC][sanitizer] Move ThreadDescriptorSize into GLIBC/FREEBSD block (PR #108913)

2024-09-16 Thread Vitaly Buka via llvm-branch-commits


https://github.com/vitalybuka created 
https://github.com/llvm/llvm-project/pull/108913

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[llvm-branch-commits] [NFC][sanitizer] Consolidate version checking branches of ThreadDescriptorSizeFallback (PR #108912)

2024-09-16 Thread Vitaly Buka via llvm-branch-commits


https://github.com/vitalybuka created 
https://github.com/llvm/llvm-project/pull/108912

None


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[llvm-branch-commits] [NFC][sanitizer] Remove #elif to simplify ThreadDescriptorSizeFallback (PR #108911)

2024-09-16 Thread via llvm-branch-commits


llvmbot wrote:




@llvm/pr-subscribers-compiler-rt-sanitizer

Author: Vitaly Buka (vitalybuka)


Changes



---
Full diff: https://github.com/llvm/llvm-project/pull/108911.diff


1 Files Affected:

- (modified) compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp 
(+18-6) 


``diff
diff --git a/compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp 
b/compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp
index a5101291904430..4ed8b4f0825bba 100644
--- a/compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp
+++ b/compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp
@@ -281,19 +281,27 @@ static uptr ThreadDescriptorSizeFallback() {
 return FIRST_32_SECOND_64(1344, 2496);
   }
   return 0;
-#elif defined(__s390__) || defined(__sparc__)
+#endif
+
+#if defined(__s390__) || defined(__sparc__)
   // The size of a prefix of TCB including 
pthread::{specific_1stblock,specific}
   // suffices. Just return offsetof(struct pthread, specific_used), which 
hasn't
   // changed since 2007-05. Technically this applies to i386/x86_64 as well but
   // we call _dl_get_tls_static_info and need the precise size of struct
   // pthread.
   return FIRST_32_SECOND_64(524, 1552);
-#elif defined(__mips__)
+#endif
+
+#if defined(__mips__)
   // TODO(sagarthakur): add more values as per different glibc versions.
   return FIRST_32_SECOND_64(1152, 1776);
-#elif SANITIZER_LOONGARCH64
+#endif
+
+#if SANITIZER_LOONGARCH64
   return 1856;  // from glibc 2.36
-#elif SANITIZER_RISCV64
+#endif
+
+#if SANITIZER_RISCV64
   int major;
   int minor;
   int patch;
@@ -307,10 +315,14 @@ static uptr ThreadDescriptorSizeFallback() {
 return 1936;// tested against glibc 2.32
   }
   return 0;
-#elif defined(__aarch64__)
+#endif
+
+#if defined(__aarch64__)
   // The sizeof (struct pthread) is the same from GLIBC 2.17 to 2.22.
   return 1776;
-#elif defined(__powerpc64__)
+#endif
+
+#if defined(__powerpc64__)
   return 1776;  // from glibc.ppc64le 2.20-8.fc21
 #endif
 }

``




https://github.com/llvm/llvm-project/pull/108911
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[llvm-branch-commits] [NFC][sanitizer] Consolidate version checking branches of ThreadDescriptorSizeFallback (PR #108912)

2024-09-16 Thread via llvm-branch-commits


llvmbot wrote:




@llvm/pr-subscribers-compiler-rt-sanitizer

Author: Vitaly Buka (vitalybuka)


Changes



---
Full diff: https://github.com/llvm/llvm-project/pull/108912.diff


1 Files Affected:

- (modified) compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp 
(+16-16) 


``diff
diff --git a/compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp 
b/compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp
index 4ed8b4f0825bba..2c64509d578b94 100644
--- a/compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp
+++ b/compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp
@@ -283,6 +283,22 @@ static uptr ThreadDescriptorSizeFallback() {
   return 0;
 #endif
 
+#if SANITIZER_RISCV64
+  int major;
+  int minor;
+  int patch;
+  if (GetLibcVersion(&major, &minor, &patch) && major == 2) {
+// TODO: consider adding an optional runtime check for an unknown 
(untested)
+// glibc version
+if (minor <= 28)  // WARNING: the highest tested version is 2.29
+  return 1772;// no guarantees for this one
+if (minor <= 31)
+  return 1772;  // tested against glibc 2.29, 2.31
+return 1936;// tested against glibc 2.32
+  }
+  return 0;
+#endif
+
 #if defined(__s390__) || defined(__sparc__)
   // The size of a prefix of TCB including 
pthread::{specific_1stblock,specific}
   // suffices. Just return offsetof(struct pthread, specific_used), which 
hasn't
@@ -301,22 +317,6 @@ static uptr ThreadDescriptorSizeFallback() {
   return 1856;  // from glibc 2.36
 #endif
 
-#if SANITIZER_RISCV64
-  int major;
-  int minor;
-  int patch;
-  if (GetLibcVersion(&major, &minor, &patch) && major == 2) {
-// TODO: consider adding an optional runtime check for an unknown 
(untested)
-// glibc version
-if (minor <= 28)  // WARNING: the highest tested version is 2.29
-  return 1772;// no guarantees for this one
-if (minor <= 31)
-  return 1772;  // tested against glibc 2.29, 2.31
-return 1936;// tested against glibc 2.32
-  }
-  return 0;
-#endif
-
 #if defined(__aarch64__)
   // The sizeof (struct pthread) is the same from GLIBC 2.17 to 2.22.
   return 1776;

``




https://github.com/llvm/llvm-project/pull/108912
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[llvm-branch-commits] [NFC][sanitizer] Remove #elif to simplify ThreadDescriptorSizeFallback (PR #108911)

2024-09-16 Thread Vitaly Buka via llvm-branch-commits


https://github.com/vitalybuka updated 
https://github.com/llvm/llvm-project/pull/108911


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[llvm-branch-commits] [NFC][sanitizer] Move ThreadDescriptorSize into GLIBC/FREEBSD block (PR #108913)

2024-09-16 Thread via llvm-branch-commits


llvmbot wrote:




@llvm/pr-subscribers-compiler-rt-sanitizer

Author: Vitaly Buka (vitalybuka)


Changes



---
Full diff: https://github.com/llvm/llvm-project/pull/108913.diff


1 Files Affected:

- (modified) compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp 
(+6-2) 


``diff
diff --git a/compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp 
b/compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp
index 2c64509d578b94..5829692531e8d0 100644
--- a/compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp
+++ b/compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp
@@ -244,11 +244,11 @@ void InitTlsSize() {}
 // On glibc x86_64, ThreadDescriptorSize() needs to be precise due to the usage
 // of g_tls_size. On other targets, ThreadDescriptorSize() is only used by lsan
 // to get the pointer to thread-specific data keys in the thread control block.
-#  if (SANITIZER_FREEBSD || SANITIZER_LINUX || SANITIZER_SOLARIS) && \
-  !SANITIZER_ANDROID && !SANITIZER_GO
+#  if (SANITIZER_FREEBSD || SANITIZER_GLIBC) && !SANITIZER_GO
 // sizeof(struct pthread) from glibc.
 static atomic_uintptr_t thread_descriptor_size;
 
+// FIXME: Implementation is very GLIBC specific, but it's used by FREEBSD.
 static uptr ThreadDescriptorSizeFallback() {
 #if defined(__x86_64__) || defined(__i386__) || defined(__arm__)
   int major;
@@ -363,6 +363,10 @@ static uptr TlsPreTcbSize() {
 }
 #endif
 
+#  endif
+
+#  if (SANITIZER_FREEBSD || SANITIZER_LINUX || SANITIZER_SOLARIS) && \
+  !SANITIZER_ANDROID && !SANITIZER_GO
 namespace {
 struct TlsBlock {
   uptr begin, end, align;

``




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[llvm-branch-commits] [NFC][sanitizer] Consolidate version checking branches of ThreadDescriptorSizeFallback (PR #108912)

2024-09-16 Thread Vitaly Buka via llvm-branch-commits


https://github.com/vitalybuka updated 
https://github.com/llvm/llvm-project/pull/108912


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[llvm-branch-commits] [NFC][sanitizer] Consolidate version checking branches of ThreadDescriptorSizeFallback (PR #108912)

2024-09-16 Thread Vitaly Buka via llvm-branch-commits


https://github.com/vitalybuka updated 
https://github.com/llvm/llvm-project/pull/108912


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[llvm-branch-commits] [NFC][sanitizer] Remove #elif to simplify ThreadDescriptorSizeFallback (PR #108911)

2024-09-16 Thread Vitaly Buka via llvm-branch-commits


https://github.com/vitalybuka updated 
https://github.com/llvm/llvm-project/pull/108911


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[llvm-branch-commits] [NFC][sanitizer] Move ThreadDescriptorSize into GLIBC/FREEBSD block (PR #108913)

2024-09-16 Thread Vitaly Buka via llvm-branch-commits


https://github.com/vitalybuka updated 
https://github.com/llvm/llvm-project/pull/108913


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[llvm-branch-commits] [NFC][sanitizer] Move ThreadDescriptorSize into GLIBC/FREEBSD block (PR #108913)

2024-09-16 Thread Vitaly Buka via llvm-branch-commits


https://github.com/vitalybuka updated 
https://github.com/llvm/llvm-project/pull/108913


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[llvm-branch-commits] [llvm] release/19.x: [PowerPC] Fix assert exposed by PR 95931 in LowerBITCAST (#108062) (PR #108834)

2024-09-16 Thread via llvm-branch-commits


dyung wrote:

@syzaara, not sure if you were notified, but the cherry-pick of this change to 
the release branch seems to be causing a test failure. Can you take a look?

- https://lab.llvm.org/buildbot/#/builders/102/builds/44
- https://lab.llvm.org/buildbot/#/builders/62/builds/37
- https://lab.llvm.org/buildbot/#/builders/31/builds/40
- https://lab.llvm.org/buildbot/#/builders/100/builds/40

https://github.com/llvm/llvm-project/pull/108834
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[llvm-branch-commits] [NFC][sanitizer] Move ThreadDescriptorSize into GLIBC/FREEBSD block (PR #108913)

2024-09-16 Thread Thurston Dang via llvm-branch-commits


https://github.com/thurstond approved this pull request.


https://github.com/llvm/llvm-project/pull/108913
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