[llvm-branch-commits] [llvm] [EarlyIfCvt] Take branch probablities into consideration (PR #97808)
wangpc-pp wrote: > > [EarlyIfCvt] Take branch probablities into consideration > > It looks like this MR is only adding a target hook, so this title doesn't > make sense to me I was planning to add support to RISCV target, but it depends on your early if-conversion patch. I will hold this PR until RISC-V has got its early if-conversion support. https://github.com/llvm/llvm-project/pull/97808 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [EarlyIfCvt] Take branch probablities into consideration (PR #97808)
@@ -913,6 +913,10 @@ class TargetInstrInfo : public MCInstrInfo {
return false;
}
+ /// Return true if the target will always try to convert predictable branches
+ /// to selects.
+ virtual bool shouldConvertPredictableBranches() const { return true; }
+
wangpc-pp wrote:
I think the current behavior is we will convert predictable branches. To not
touch too much targets, I leave it to be true here.
https://github.com/llvm/llvm-project/pull/97808
___
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[llvm-branch-commits] [llvm] [BOLT][AArch64] Fix static binary patching for ELF. (PR #97710)
https://github.com/paschalis-mpeis edited https://github.com/llvm/llvm-project/pull/97710 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [BOLT][AArch64] Fix static binary patching for ELF. (PR #97710)
https://github.com/paschalis-mpeis edited https://github.com/llvm/llvm-project/pull/97710 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [BOLT][AArch64] Fix static binary patching for ELF. (PR #97710)
https://github.com/paschalis-mpeis edited https://github.com/llvm/llvm-project/pull/97710 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [BOLT][AArch64] Fix static binary patching for ELF. (PR #97710)
https://github.com/paschalis-mpeis edited https://github.com/llvm/llvm-project/pull/97710 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] 74eff4d - Revert "[llvm][ARM][AArch64] Add attributes to synthetic functions. (#83153)"
Author: Daniel Kiss
Date: 2024-07-10T10:21:33+02:00
New Revision: 74eff4df1d9a050718ebdbce5a71a119282035ae
URL:
https://github.com/llvm/llvm-project/commit/74eff4df1d9a050718ebdbce5a71a119282035ae
DIFF:
https://github.com/llvm/llvm-project/commit/74eff4df1d9a050718ebdbce5a71a119282035ae.diff
LOG: Revert "[llvm][ARM][AArch64] Add attributes to synthetic functions.
(#83153)"
This reverts commit 4c7fd7eec04da86f5453969b19ad55122b281211.
Added:
Modified:
llvm/lib/IR/Function.cpp
Removed:
llvm/test/Instrumentation/AddressSanitizer/module-flags-aarch64.ll
llvm/test/Instrumentation/MemorySanitizer/AArch64/module-flags-aarch64.ll
diff --git a/llvm/lib/IR/Function.cpp b/llvm/lib/IR/Function.cpp
index 20871982afb06..5fb348a8bbcd4 100644
--- a/llvm/lib/IR/Function.cpp
+++ b/llvm/lib/IR/Function.cpp
@@ -407,35 +407,6 @@ Function *Function::createWithDefaultAttr(FunctionType *Ty,
StringRef DefaultFeatures = F->getContext().getDefaultTargetFeatures();
if (!DefaultFeatures.empty())
B.addAttribute("target-features", DefaultFeatures);
-
- // Check if the module attribute is present and not zero.
- auto isModuleAttributeSet = [&](const StringRef &ModAttr) -> bool {
-const auto *Attr =
-mdconst::extract_or_null(M->getModuleFlag(ModAttr));
-return Attr && !Attr->isZero();
- };
-
- auto AddAttributeIfSet = [&](const StringRef &ModAttr) {
-if (isModuleAttributeSet(ModAttr))
- B.addAttribute(ModAttr);
- };
-
- StringRef SignType = "none";
- if (isModuleAttributeSet("sign-return-address"))
-SignType = "non-leaf";
- if (isModuleAttributeSet("sign-return-address-all"))
-SignType = "all";
- if (SignType != "none") {
-B.addAttribute("sign-return-address", SignType);
-B.addAttribute("sign-return-address-key",
- isModuleAttributeSet("sign-return-address-with-bkey")
- ? "b_key"
- : "a_key");
- }
- AddAttributeIfSet("branch-target-enforcement");
- AddAttributeIfSet("branch-protection-pauth-lr");
- AddAttributeIfSet("guarded-control-stack");
-
F->addFnAttrs(B);
return F;
}
diff --git
a/llvm/test/Instrumentation/AddressSanitizer/module-flags-aarch64.ll
b/llvm/test/Instrumentation/AddressSanitizer/module-flags-aarch64.ll
deleted file mode 100644
index 91eaa360d18df..0
--- a/llvm/test/Instrumentation/AddressSanitizer/module-flags-aarch64.ll
+++ /dev/null
@@ -1,33 +0,0 @@
-;; Verify that the synthetic functions inherit their flags from the
corresponding
-;; BTE and return address signing module flags.
-; RUN: opt < %s -passes=asan -S | FileCheck %s
-; REQUIRES: aarch64-registered-target
-
-target triple = "aarch64-unknown-linux-gnu"
-
-@g = dso_local global i32 0, align 4
-
-define i32 @test_load() sanitize_address {
-entry:
- %tmp = load i32, ptr @g, align 4
- ret i32 %tmp
-}
-
-!llvm.module.flags = !{!0, !1}
-
-;; Due to -fasynchronous-unwind-tables.
-!0 = !{i32 7, !"uwtable", i32 2}
-
-;; Due to -fno-omit-frame-pointer.
-!1 = !{i32 7, !"frame-pointer", i32 2}
-
-!llvm.module.flags = !{!2, !3, !4}
-
-!2 = !{i32 8, !"branch-target-enforcement", i32 1}
-!3 = !{i32 8, !"sign-return-address", i32 1}
-!4 = !{i32 8, !"sign-return-address-all", i32 0}
-
-;; Set the uwtable attribute on ctor/dtor.
-; CHECK: define internal void @asan.module_ctor() #[[#ATTR:]]
-; CHECK: define internal void @asan.module_dtor() #[[#ATTR]]
-; CHECK: attributes #[[#ATTR]] = { nounwind uwtable
"branch-target-enforcement" "frame-pointer"="all"
"sign-return-address"="non-leaf" "sign-return-address-key"="a_key" }
diff --git
a/llvm/test/Instrumentation/MemorySanitizer/AArch64/module-flags-aarch64.ll
b/llvm/test/Instrumentation/MemorySanitizer/AArch64/module-flags-aarch64.ll
deleted file mode 100644
index f6a1009c932a0..0
--- a/llvm/test/Instrumentation/MemorySanitizer/AArch64/module-flags-aarch64.ll
+++ /dev/null
@@ -1,33 +0,0 @@
-;; Verify that the synthetic functions inherit their flags from the
corresponding
-;; BTE and return address signing module flags.
-; RUN: opt < %s -passes=asan -S | FileCheck %s
-; REQUIRES: aarch64-registered-target
-
-target triple = "aarch64-unknown-linux-gnu"
-
-@g = dso_local global i32 0, align 4
-
-define i32 @test_load() sanitize_memory {
-entry:
- %tmp = load i32, ptr @g, align 4
- ret i32 %tmp
-}
-
-!llvm.module.flags = !{!0, !1}
-
-;; Due to -fasynchronous-unwind-tables.
-!0 = !{i32 7, !"uwtable", i32 2}
-
-;; Due to -fno-omit-frame-pointer.
-!1 = !{i32 7, !"frame-pointer", i32 2}
-
-!llvm.module.flags = !{!2, !3, !4}
-
-!2 = !{i32 8, !"branch-target-enforcement", i32 1}
-!3 = !{i32 8, !"sign-return-address", i32 1}
-!4 = !{i32 8, !"sign-return-address-all", i32 0}
-
-;; Set the uwtable attribute on ctor/dtor.
-; CHECK: define internal void @asan.module_ctor() #[[#ATTR:]]
-; CHECK: define internal void @asan.module_dtor() #[[#ATTR]]
-; CHECK: attributes
[llvm-branch-commits] [llvm] 74e9e20 - Revert "[Clang][ARM][AArch64] Alway emit protection attributes for functions.…"
Author: Daniel Kiss
Date: 2024-07-10T10:21:36+02:00
New Revision: 74e9e20f0338824eecea0f27d9c1336676a60d3d
URL:
https://github.com/llvm/llvm-project/commit/74e9e20f0338824eecea0f27d9c1336676a60d3d
DIFF:
https://github.com/llvm/llvm-project/commit/74e9e20f0338824eecea0f27d9c1336676a60d3d.diff
LOG: Revert "[Clang][ARM][AArch64] Alway emit protection attributes for
functions.…"
This reverts commit e15d67cfc2e5775cc79281aa860f3ad3be628f39.
Added:
Modified:
clang/include/clang/Basic/TargetInfo.h
clang/lib/CodeGen/Targets/AArch64.cpp
clang/lib/CodeGen/Targets/ARM.cpp
clang/test/CodeGen/aarch64-branch-protection-attr.c
clang/test/CodeGen/aarch64-sign-return-address.c
clang/test/CodeGen/arm-branch-protection-attr-1.c
clang/test/CodeGen/arm-branch-protection-attr-2.c
llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
llvm/lib/IR/Verifier.cpp
llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.cpp
llvm/lib/Target/ARM/ARMMachineFunctionInfo.cpp
llvm/lib/Transforms/IPO/LowerTypeTests.cpp
llvm/test/CodeGen/AArch64/branch-target-enforcement-indirect-calls.ll
llvm/test/CodeGen/AArch64/bti-branch-relaxation.ll
llvm/test/CodeGen/AArch64/kcfi-bti.ll
llvm/test/CodeGen/AArch64/machine-outliner-2fixup-blr-terminator.mir
llvm/test/CodeGen/AArch64/machine-outliner-bti.mir
llvm/test/CodeGen/AArch64/machine-outliner-outline-bti.ll
llvm/test/CodeGen/AArch64/note-gnu-property-pac-bti-0.ll
llvm/test/CodeGen/AArch64/note-gnu-property-pac-bti-4.ll
llvm/test/CodeGen/AArch64/pacbti-llvm-generated-funcs-1.ll
llvm/test/CodeGen/AArch64/pacbti-llvm-generated-funcs-2.ll
llvm/test/CodeGen/AArch64/pacbti-module-attrs.ll
llvm/test/CodeGen/AArch64/patchable-function-entry-bti.ll
llvm/test/CodeGen/AArch64/setjmp-bti-outliner.ll
llvm/test/CodeGen/AArch64/setjmp-bti.ll
llvm/test/CodeGen/AArch64/sign-return-address-pauth-lr.ll
llvm/test/CodeGen/AArch64/sign-return-address.ll
llvm/test/CodeGen/AArch64/wineh-bti.ll
llvm/test/CodeGen/AArch64/wineh-pac.ll
llvm/test/CodeGen/ARM/setjmp-bti-basic.ll
llvm/test/CodeGen/ARM/setjmp-bti-outliner.ll
llvm/test/CodeGen/Thumb2/bti-entry-blocks.ll
llvm/test/CodeGen/Thumb2/bti-indirect-branches.ll
llvm/test/CodeGen/Thumb2/bti-outliner-1.ll
llvm/test/CodeGen/Thumb2/bti-outliner-2.ll
llvm/test/CodeGen/Thumb2/bti-outliner-cost-2.ll
llvm/test/CodeGen/Thumb2/bti-pac-replace-1.mir
llvm/test/CodeGen/Thumb2/bti-pac-replace-2.ll
llvm/test/CodeGen/Thumb2/jump-table-bti.ll
llvm/test/CodeGen/Thumb2/pacbti-m-basic.ll
llvm/test/CodeGen/Thumb2/pacbti-m-indirect-tail-call.ll
llvm/test/CodeGen/Thumb2/pacbti-m-outliner-1.ll
llvm/test/CodeGen/Thumb2/pacbti-m-outliner-3.ll
llvm/test/CodeGen/Thumb2/pacbti-m-outliner-4.ll
llvm/test/CodeGen/Thumb2/pacbti-m-outliner-5.ll
llvm/test/CodeGen/Thumb2/pacbti-m-overalign.ll
llvm/test/CodeGen/Thumb2/pacbti-m-stack-arg.ll
llvm/test/CodeGen/Thumb2/pacbti-m-unsupported-arch.ll
llvm/test/CodeGen/Thumb2/pacbti-m-varargs-1.ll
llvm/test/CodeGen/Thumb2/pacbti-m-varargs-2.ll
llvm/test/CodeGen/Thumb2/pacbti-m-vla.ll
llvm/test/LTO/AArch64/link-branch-target-enforcement.ll
llvm/test/Transforms/Inline/inline-sign-return-address.ll
llvm/test/Transforms/LowerTypeTests/function-arm-thumb.ll
llvm/test/Transforms/LowerTypeTests/function-thumb-bti.ll
llvm/test/Transforms/LowerTypeTests/function.ll
llvm/test/Verifier/branch-prot-attrs.ll
Removed:
clang/test/Frontend/arm-branch-protection-lto.c
diff --git a/clang/include/clang/Basic/TargetInfo.h
b/clang/include/clang/Basic/TargetInfo.h
index 1f208b40f92cb..9b0ae2102e098 100644
--- a/clang/include/clang/Basic/TargetInfo.h
+++ b/clang/include/clang/Basic/TargetInfo.h
@@ -32,9 +32,7 @@
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/StringSet.h"
#include "llvm/Frontend/OpenMP/OMPGridValues.h"
-#include "llvm/IR/Attributes.h"
#include "llvm/IR/DerivedTypes.h"
-#include "llvm/IR/Function.h"
#include "llvm/Support/DataTypes.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/VersionTuple.h"
@@ -1402,15 +1400,15 @@ class TargetInfo : public TransferrableTargetInfo,
return true;
}
- class BranchProtectionInfo {
- public:
+ struct BranchProtectionInfo {
LangOptions::SignReturnAddressScopeKind SignReturnAddr;
LangOptions::SignReturnAddressKeyKind SignKey;
bool BranchTargetEnforcement;
bool BranchProtectionPAuthLR;
bool GuardedControlStack;
- protected:
+BranchProtectionInfo() = default;
+
const char *getSignReturnAddrStr() const {
switch (SignReturnAddr) {
case LangOptions::SignReturnAddressScopeKind::None:
@@ -1432,42 +1430,6 @@ class TargetInfo : public TransferrableTargetInfo,
}
llvm_unreachable("Unex
[llvm-branch-commits] [flang] [Flang][OpenMP] Derived type explicit allocatable member mapping (PR #96266)
agozillon wrote: Small ping for some reviewer attention on this PR stack if at all possible, it would be greatly appreciated! https://github.com/llvm/llvm-project/pull/96266 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [Serialization] Introduce OnDiskHashTable for specializations (PR #83233)
https://github.com/ChuanqiXu9 updated
https://github.com/llvm/llvm-project/pull/83233
>From 2bf5a6ca8bde003b7acf0a9ab7c6e69cc3109e02 Mon Sep 17 00:00:00 2001
From: Chuanqi Xu
Date: Wed, 28 Feb 2024 11:41:53 +0800
Subject: [PATCH] [Serialization] Introduce OnDiskHashTable for specializations
Following up for https://github.com/llvm/llvm-project/pull/83108
This follows the suggestion literally from
https://github.com/llvm/llvm-project/pull/76774#issuecomment-1951172457
which introduces OnDiskHashTable for specializations based on
D41416.
Note that I didn't polish this patch to reduce the diff from D41416
to it easier to review. I'll make the polishing patch later. So that we
can focus what we're doing in this patch and focus on the style in the
next patch.
---
clang/include/clang/AST/ExternalASTSource.h | 11 +
.../clang/Sema/MultiplexExternalSemaSource.h | 6 +
.../include/clang/Serialization/ASTBitCodes.h | 9 +
clang/include/clang/Serialization/ASTReader.h | 34 ++-
clang/include/clang/Serialization/ASTWriter.h | 15 +
clang/lib/AST/DeclTemplate.cpp| 17 ++
clang/lib/AST/ExternalASTSource.cpp | 5 +
.../lib/Sema/MultiplexExternalSemaSource.cpp | 12 +
clang/lib/Serialization/ASTReader.cpp | 145 +-
clang/lib/Serialization/ASTReaderDecl.cpp | 27 ++
clang/lib/Serialization/ASTReaderInternals.h | 124 +
clang/lib/Serialization/ASTWriter.cpp | 174 +++-
clang/lib/Serialization/ASTWriterDecl.cpp | 32 ++-
clang/unittests/Serialization/CMakeLists.txt | 1 +
.../Serialization/LoadSpecLazilyTest.cpp | 260 ++
15 files changed, 859 insertions(+), 13 deletions(-)
create mode 100644 clang/unittests/Serialization/LoadSpecLazilyTest.cpp
diff --git a/clang/include/clang/AST/ExternalASTSource.h
b/clang/include/clang/AST/ExternalASTSource.h
index 385c32edbae0f..24c4490d160f3 100644
--- a/clang/include/clang/AST/ExternalASTSource.h
+++ b/clang/include/clang/AST/ExternalASTSource.h
@@ -150,6 +150,17 @@ class ExternalASTSource : public
RefCountedBase {
virtual bool
FindExternalVisibleDeclsByName(const DeclContext *DC, DeclarationName Name);
+ /// Load all the external specializations for the Decl \param D if \param
+ /// OnlyPartial is false. Otherwise, load all the external **partial**
+ /// specializations for the \param D.
+ virtual void LoadExternalSpecializations(const Decl *D, bool OnlyPartial);
+
+ /// Load all the specializations for the Decl \param D with the same template
+ /// args specified by \param TemplateArgs.
+ virtual void
+ LoadExternalSpecializations(const Decl *D,
+ ArrayRef TemplateArgs);
+
/// Ensures that the table of all visible declarations inside this
/// context is up to date.
///
diff --git a/clang/include/clang/Sema/MultiplexExternalSemaSource.h
b/clang/include/clang/Sema/MultiplexExternalSemaSource.h
index 238fb398b7d12..f81b70daa4b3d 100644
--- a/clang/include/clang/Sema/MultiplexExternalSemaSource.h
+++ b/clang/include/clang/Sema/MultiplexExternalSemaSource.h
@@ -97,6 +97,12 @@ class MultiplexExternalSemaSource : public
ExternalSemaSource {
bool FindExternalVisibleDeclsByName(const DeclContext *DC,
DeclarationName Name) override;
+ void LoadExternalSpecializations(const Decl *D, bool OnlyPartial) override;
+
+ void
+ LoadExternalSpecializations(const Decl *D,
+ ArrayRef TemplateArgs)
override;
+
/// Ensures that the table of all visible declarations inside this
/// context is up to date.
void completeVisibleDeclsMap(const DeclContext *DC) override;
diff --git a/clang/include/clang/Serialization/ASTBitCodes.h
b/clang/include/clang/Serialization/ASTBitCodes.h
index 488994c05dc12..eefc0e5218d7d 100644
--- a/clang/include/clang/Serialization/ASTBitCodes.h
+++ b/clang/include/clang/Serialization/ASTBitCodes.h
@@ -721,6 +721,12 @@ enum ASTRecordTypes {
/// Record code for \#pragma clang unsafe_buffer_usage begin/end
PP_UNSAFE_BUFFER_USAGE = 69,
+
+ /// Record code for vtables to emit.
+ VTABLES_TO_EMIT = 70,
+
+ /// Record code for updated specialization
+ UPDATE_SPECIALIZATION = 71,
};
/// Record types used within a source manager block.
@@ -1484,6 +1490,9 @@ enum DeclCode {
/// A HLSLBufferDecl record.
DECL_HLSL_BUFFER,
+ // A decls specilization record.
+ DECL_SPECIALIZATIONS,
+
/// An ImplicitConceptSpecializationDecl record.
DECL_IMPLICIT_CONCEPT_SPECIALIZATION,
diff --git a/clang/include/clang/Serialization/ASTReader.h
b/clang/include/clang/Serialization/ASTReader.h
index 76e51ac7ab979..0356fd14d9fd6 100644
--- a/clang/include/clang/Serialization/ASTReader.h
+++ b/clang/include/clang/Serialization/ASTReader.h
@@ -340,6 +340,9 @@ class ASTIdentifierLookupTrait;
/// The on-disk hash table(s) used for DeclContext name lookup.
struct DeclContextLookupTable;
+/// The on-disk hash table(s) u
[llvm-branch-commits] [clang] [Serialization] Code cleanups and polish 83233 (PR #83237)
https://github.com/ChuanqiXu9 updated
https://github.com/llvm/llvm-project/pull/83237
>From f2e53e44eebab4720a1dbade24fcb14d698fb03f Mon Sep 17 00:00:00 2001
From: Chuanqi Xu
Date: Wed, 28 Feb 2024 11:41:53 +0800
Subject: [PATCH] [Serialization] Code cleanups and polish 83233
---
clang/include/clang/AST/DeclTemplate.h| 39 +-
clang/include/clang/AST/ExternalASTSource.h | 8 +-
.../clang/Sema/MultiplexExternalSemaSource.h | 4 +-
.../include/clang/Serialization/ASTBitCodes.h | 2 +-
clang/include/clang/Serialization/ASTReader.h | 4 +-
clang/lib/AST/DeclTemplate.cpp| 85 ++--
clang/lib/AST/ExternalASTSource.cpp | 10 +-
clang/lib/AST/ODRHash.cpp | 10 -
.../lib/Sema/MultiplexExternalSemaSource.cpp | 13 +-
clang/lib/Serialization/ASTCommon.h | 1 -
clang/lib/Serialization/ASTReader.cpp | 42 +-
clang/lib/Serialization/ASTReaderDecl.cpp | 76 +---
clang/lib/Serialization/ASTReaderInternals.h | 1 -
clang/lib/Serialization/ASTWriter.cpp | 27 +-
clang/lib/Serialization/ASTWriterDecl.cpp | 52 +--
clang/lib/Serialization/CMakeLists.txt| 1 +
.../Serialization/TemplateArgumentHasher.cpp | 423 ++
.../Serialization/TemplateArgumentHasher.h| 34 ++
clang/test/Modules/cxx-templates.cpp | 8 +-
.../Modules/recursive-instantiations.cppm | 40 ++
.../test/OpenMP/target_parallel_ast_print.cpp | 4 -
clang/test/OpenMP/target_teams_ast_print.cpp | 4 -
clang/test/OpenMP/task_ast_print.cpp | 4 -
clang/test/OpenMP/teams_ast_print.cpp | 4 -
24 files changed, 610 insertions(+), 286 deletions(-)
create mode 100644 clang/lib/Serialization/TemplateArgumentHasher.cpp
create mode 100644 clang/lib/Serialization/TemplateArgumentHasher.h
create mode 100644 clang/test/Modules/recursive-instantiations.cppm
diff --git a/clang/include/clang/AST/DeclTemplate.h
b/clang/include/clang/AST/DeclTemplate.h
index 44f840d297465..7406252363d22 100644
--- a/clang/include/clang/AST/DeclTemplate.h
+++ b/clang/include/clang/AST/DeclTemplate.h
@@ -256,9 +256,6 @@ class TemplateArgumentList final
TemplateArgumentList(const TemplateArgumentList &) = delete;
TemplateArgumentList &operator=(const TemplateArgumentList &) = delete;
- /// Create hash for the given arguments.
- static unsigned ComputeODRHash(ArrayRef Args);
-
/// Create a new template argument list that copies the given set of
/// template arguments.
static TemplateArgumentList *CreateCopy(ASTContext &Context,
@@ -732,25 +729,6 @@ class RedeclarableTemplateDecl : public TemplateDecl,
}
void anchor() override;
- struct LazySpecializationInfo {
-GlobalDeclID DeclID = GlobalDeclID();
-unsigned ODRHash = ~0U;
-bool IsPartial = false;
-LazySpecializationInfo(GlobalDeclID ID, unsigned Hash = ~0U,
- bool Partial = false)
-: DeclID(ID), ODRHash(Hash), IsPartial(Partial) {}
-LazySpecializationInfo() {}
-bool operator<(const LazySpecializationInfo &Other) const {
- return DeclID < Other.DeclID;
-}
-bool operator==(const LazySpecializationInfo &Other) const {
- assert((DeclID != Other.DeclID || ODRHash == Other.ODRHash) &&
- "Hashes differ!");
- assert((DeclID != Other.DeclID || IsPartial == Other.IsPartial) &&
- "Both must be the same kinds!");
- return DeclID == Other.DeclID;
-}
- };
protected:
template struct SpecEntryTraits {
@@ -794,16 +772,20 @@ class RedeclarableTemplateDecl : public TemplateDecl,
void loadLazySpecializationsImpl(bool OnlyPartial = false) const;
- void loadLazySpecializationsImpl(llvm::ArrayRef Args,
+ bool loadLazySpecializationsImpl(llvm::ArrayRef Args,
TemplateParameterList *TPL = nullptr) const;
- Decl *loadLazySpecializationImpl(LazySpecializationInfo &LazySpecInfo) const;
-
template
typename SpecEntryTraits::DeclType*
findSpecializationImpl(llvm::FoldingSetVector &Specs,
void *&InsertPos, ProfileArguments &&...ProfileArgs);
+ template
+ typename SpecEntryTraits::DeclType *
+ findSpecializationLocally(llvm::FoldingSetVector &Specs,
+void *&InsertPos,
+ProfileArguments &&...ProfileArgs);
+
template
void addSpecializationImpl(llvm::FoldingSetVector &Specs,
EntryType *Entry, void *InsertPos);
@@ -819,13 +801,6 @@ class RedeclarableTemplateDecl : public TemplateDecl,
llvm::PointerIntPair
InstantiatedFromMember;
-/// If non-null, points to an array of specializations (including
-/// partial specializations) known only by their external declaration IDs.
-///
-/// The first value in the array is the number of specializations/partial
-/// specializations that follow.
-LazySpecializationInfo *LazySpecializations = nullptr
[llvm-branch-commits] [clang] [Serialization] Code cleanups and polish 83233 (PR #83237)
ChuanqiXu9 wrote: @ilya-biryukov I've fixed the crash occured in the reproducer. The root reason is that, previously, I wouldn't load all the specializations for paritial specializations. But this is not safe. I think you can test it again. https://github.com/llvm/llvm-project/pull/83237 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [Serialization] Code cleanups and polish 83233 (PR #83237)
ChuanqiXu9 wrote: @vgvassilev In the newest version, I introduced a new hasher TemplateArgumentHasher and use this new hasher to calculate the hash value for template arguments. We thought this may be harder. But I just realized, we don't have to provide a very precise results at first. Since we are only required to give the same hash value for the same template arguments, but not required to give different hash value for different template arguments. So technically, it will still be a correct implementation if we return the same value for all template arguments. So I introduced a bail out mechanism in the new hasher: https://github.com/llvm/llvm-project/pull/83237/files#diff-211ba0dca7d2f4bd0555dcfe173edd4658b9b4e045c49cb851b47654891c1627R32-R33 which will return the default value when it encounters the cases it can't handle. It is safer and it is easier to maintain. We don't need to worry about the changes in ODRHash breaks the LazySpecializations. And we can improve it step by step. Although the performance, **theoretically**, may not be good as your first patch, I don't feel this is a problem. We can improve it later. https://github.com/llvm/llvm-project/pull/83237 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [Serialization] Code cleanups and polish 83233 (PR #83237)
https://github.com/ChuanqiXu9 updated
https://github.com/llvm/llvm-project/pull/83237
>From f2e53e44eebab4720a1dbade24fcb14d698fb03f Mon Sep 17 00:00:00 2001
From: Chuanqi Xu
Date: Wed, 28 Feb 2024 11:41:53 +0800
Subject: [PATCH 1/2] [Serialization] Code cleanups and polish 83233
---
clang/include/clang/AST/DeclTemplate.h| 39 +-
clang/include/clang/AST/ExternalASTSource.h | 8 +-
.../clang/Sema/MultiplexExternalSemaSource.h | 4 +-
.../include/clang/Serialization/ASTBitCodes.h | 2 +-
clang/include/clang/Serialization/ASTReader.h | 4 +-
clang/lib/AST/DeclTemplate.cpp| 85 ++--
clang/lib/AST/ExternalASTSource.cpp | 10 +-
clang/lib/AST/ODRHash.cpp | 10 -
.../lib/Sema/MultiplexExternalSemaSource.cpp | 13 +-
clang/lib/Serialization/ASTCommon.h | 1 -
clang/lib/Serialization/ASTReader.cpp | 42 +-
clang/lib/Serialization/ASTReaderDecl.cpp | 76 +---
clang/lib/Serialization/ASTReaderInternals.h | 1 -
clang/lib/Serialization/ASTWriter.cpp | 27 +-
clang/lib/Serialization/ASTWriterDecl.cpp | 52 +--
clang/lib/Serialization/CMakeLists.txt| 1 +
.../Serialization/TemplateArgumentHasher.cpp | 423 ++
.../Serialization/TemplateArgumentHasher.h| 34 ++
clang/test/Modules/cxx-templates.cpp | 8 +-
.../Modules/recursive-instantiations.cppm | 40 ++
.../test/OpenMP/target_parallel_ast_print.cpp | 4 -
clang/test/OpenMP/target_teams_ast_print.cpp | 4 -
clang/test/OpenMP/task_ast_print.cpp | 4 -
clang/test/OpenMP/teams_ast_print.cpp | 4 -
24 files changed, 610 insertions(+), 286 deletions(-)
create mode 100644 clang/lib/Serialization/TemplateArgumentHasher.cpp
create mode 100644 clang/lib/Serialization/TemplateArgumentHasher.h
create mode 100644 clang/test/Modules/recursive-instantiations.cppm
diff --git a/clang/include/clang/AST/DeclTemplate.h
b/clang/include/clang/AST/DeclTemplate.h
index 44f840d297465..7406252363d22 100644
--- a/clang/include/clang/AST/DeclTemplate.h
+++ b/clang/include/clang/AST/DeclTemplate.h
@@ -256,9 +256,6 @@ class TemplateArgumentList final
TemplateArgumentList(const TemplateArgumentList &) = delete;
TemplateArgumentList &operator=(const TemplateArgumentList &) = delete;
- /// Create hash for the given arguments.
- static unsigned ComputeODRHash(ArrayRef Args);
-
/// Create a new template argument list that copies the given set of
/// template arguments.
static TemplateArgumentList *CreateCopy(ASTContext &Context,
@@ -732,25 +729,6 @@ class RedeclarableTemplateDecl : public TemplateDecl,
}
void anchor() override;
- struct LazySpecializationInfo {
-GlobalDeclID DeclID = GlobalDeclID();
-unsigned ODRHash = ~0U;
-bool IsPartial = false;
-LazySpecializationInfo(GlobalDeclID ID, unsigned Hash = ~0U,
- bool Partial = false)
-: DeclID(ID), ODRHash(Hash), IsPartial(Partial) {}
-LazySpecializationInfo() {}
-bool operator<(const LazySpecializationInfo &Other) const {
- return DeclID < Other.DeclID;
-}
-bool operator==(const LazySpecializationInfo &Other) const {
- assert((DeclID != Other.DeclID || ODRHash == Other.ODRHash) &&
- "Hashes differ!");
- assert((DeclID != Other.DeclID || IsPartial == Other.IsPartial) &&
- "Both must be the same kinds!");
- return DeclID == Other.DeclID;
-}
- };
protected:
template struct SpecEntryTraits {
@@ -794,16 +772,20 @@ class RedeclarableTemplateDecl : public TemplateDecl,
void loadLazySpecializationsImpl(bool OnlyPartial = false) const;
- void loadLazySpecializationsImpl(llvm::ArrayRef Args,
+ bool loadLazySpecializationsImpl(llvm::ArrayRef Args,
TemplateParameterList *TPL = nullptr) const;
- Decl *loadLazySpecializationImpl(LazySpecializationInfo &LazySpecInfo) const;
-
template
typename SpecEntryTraits::DeclType*
findSpecializationImpl(llvm::FoldingSetVector &Specs,
void *&InsertPos, ProfileArguments &&...ProfileArgs);
+ template
+ typename SpecEntryTraits::DeclType *
+ findSpecializationLocally(llvm::FoldingSetVector &Specs,
+void *&InsertPos,
+ProfileArguments &&...ProfileArgs);
+
template
void addSpecializationImpl(llvm::FoldingSetVector &Specs,
EntryType *Entry, void *InsertPos);
@@ -819,13 +801,6 @@ class RedeclarableTemplateDecl : public TemplateDecl,
llvm::PointerIntPair
InstantiatedFromMember;
-/// If non-null, points to an array of specializations (including
-/// partial specializations) known only by their external declaration IDs.
-///
-/// The first value in the array is the number of specializations/partial
-/// specializations that follow.
-LazySpecializationInfo *LazySpecializations = nul
[llvm-branch-commits] [llvm] 2b9ea35 - Revert "[LowerMemIntrinsics] Use correct alignment in residual loop for varia…"
Author: Fabian Ritter
Date: 2024-07-10T12:12:19+02:00
New Revision: 2b9ea3555e7f5996393e304d3810e704ea5feeeb
URL:
https://github.com/llvm/llvm-project/commit/2b9ea3555e7f5996393e304d3810e704ea5feeeb
DIFF:
https://github.com/llvm/llvm-project/commit/2b9ea3555e7f5996393e304d3810e704ea5feeeb.diff
LOG: Revert "[LowerMemIntrinsics] Use correct alignment in residual loop for
varia…"
This reverts commit 6c84bba218f7b64f2257405ac30a3c6948df8373.
Added:
Modified:
llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
llvm/test/CodeGen/AMDGPU/lower-mem-intrinsics.ll
Removed:
diff --git a/llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
b/llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
index b38db412f786a..d2814f07530d8 100644
--- a/llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
+++ b/llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
@@ -262,9 +262,6 @@ void llvm::createMemCpyLoopUnknownSize(
assert((ResLoopOpSize == AtomicElementSize ? *AtomicElementSize : 1) &&
"Store size is expected to match type size");
-Align ResSrcAlign(commonAlignment(PartSrcAlign, ResLoopOpSize));
-Align ResDstAlign(commonAlignment(PartDstAlign, ResLoopOpSize));
-
Value *RuntimeResidual = getRuntimeLoopRemainder(DL, PLBuilder, CopyLen,
CILoopOpSize, LoopOpSize);
Value *RuntimeBytesCopied = PLBuilder.CreateSub(CopyLen, RuntimeResidual);
@@ -306,7 +303,7 @@ void llvm::createMemCpyLoopUnknownSize(
Value *SrcGEP =
ResBuilder.CreateInBoundsGEP(ResLoopOpType, SrcAddr, FullOffset);
LoadInst *Load = ResBuilder.CreateAlignedLoad(ResLoopOpType, SrcGEP,
- ResSrcAlign, SrcIsVolatile);
+ PartSrcAlign, SrcIsVolatile);
if (!CanOverlap) {
// Set alias scope for loads.
Load->setMetadata(LLVMContext::MD_alias_scope,
@@ -314,8 +311,8 @@ void llvm::createMemCpyLoopUnknownSize(
}
Value *DstGEP =
ResBuilder.CreateInBoundsGEP(ResLoopOpType, DstAddr, FullOffset);
-StoreInst *Store =
-ResBuilder.CreateAlignedStore(Load, DstGEP, ResDstAlign,
DstIsVolatile);
+StoreInst *Store = ResBuilder.CreateAlignedStore(Load, DstGEP,
PartDstAlign,
+ DstIsVolatile);
if (!CanOverlap) {
// Indicate that stores don't overlap loads.
Store->setMetadata(LLVMContext::MD_noalias, MDNode::get(Ctx, NewScope));
diff --git a/llvm/test/CodeGen/AMDGPU/lower-mem-intrinsics.ll
b/llvm/test/CodeGen/AMDGPU/lower-mem-intrinsics.ll
index 5cb57ee112b3a..d53db69f9f2e0 100644
--- a/llvm/test/CodeGen/AMDGPU/lower-mem-intrinsics.ll
+++ b/llvm/test/CodeGen/AMDGPU/lower-mem-intrinsics.ll
@@ -930,9 +930,9 @@ define amdgpu_kernel void
@memcpy_global_align4_global_align4_variable(ptr addrs
; OPT-NEXT:[[RESIDUAL_LOOP_INDEX:%.*]] = phi i64 [ 0,
[[LOOP_MEMCPY_RESIDUAL_HEADER]] ], [ [[TMP14:%.*]],
[[LOOP_MEMCPY_RESIDUAL:%.*]] ]
; OPT-NEXT:[[TMP10:%.*]] = add i64 [[TMP3]], [[RESIDUAL_LOOP_INDEX]]
; OPT-NEXT:[[TMP11:%.*]] = getelementptr inbounds i8, ptr addrspace(1)
[[SRC]], i64 [[TMP10]]
-; OPT-NEXT:[[TMP12:%.*]] = load i8, ptr addrspace(1) [[TMP11]], align 1
+; OPT-NEXT:[[TMP12:%.*]] = load i8, ptr addrspace(1) [[TMP11]], align 4
; OPT-NEXT:[[TMP13:%.*]] = getelementptr inbounds i8, ptr addrspace(1)
[[DST]], i64 [[TMP10]]
-; OPT-NEXT:store i8 [[TMP12]], ptr addrspace(1) [[TMP13]], align 1
+; OPT-NEXT:store i8 [[TMP12]], ptr addrspace(1) [[TMP13]], align 4
; OPT-NEXT:[[TMP14]] = add i64 [[RESIDUAL_LOOP_INDEX]], 1
; OPT-NEXT:[[TMP15:%.*]] = icmp ult i64 [[TMP14]], [[TMP2]]
; OPT-NEXT:br i1 [[TMP15]], label [[LOOP_MEMCPY_RESIDUAL]], label
[[POST_LOOP_MEMCPY_EXPANSION:%.*]]
@@ -966,9 +966,9 @@ define amdgpu_kernel void
@memcpy_global_align2_global_align2_variable(ptr addrs
; OPT-NEXT:[[RESIDUAL_LOOP_INDEX:%.*]] = phi i64 [ 0,
[[LOOP_MEMCPY_RESIDUAL_HEADER]] ], [ [[TMP14:%.*]],
[[LOOP_MEMCPY_RESIDUAL:%.*]] ]
; OPT-NEXT:[[TMP10:%.*]] = add i64 [[TMP3]], [[RESIDUAL_LOOP_INDEX]]
; OPT-NEXT:[[TMP11:%.*]] = getelementptr inbounds i8, ptr addrspace(1)
[[SRC]], i64 [[TMP10]]
-; OPT-NEXT:[[TMP12:%.*]] = load i8, ptr addrspace(1) [[TMP11]], align 1
+; OPT-NEXT:[[TMP12:%.*]] = load i8, ptr addrspace(1) [[TMP11]], align 2
; OPT-NEXT:[[TMP13:%.*]] = getelementptr inbounds i8, ptr addrspace(1)
[[DST]], i64 [[TMP10]]
-; OPT-NEXT:store i8 [[TMP12]], ptr addrspace(1) [[TMP13]], align 1
+; OPT-NEXT:store i8 [[TMP12]], ptr addrspace(1) [[TMP13]], align 2
; OPT-NEXT:[[TMP14]] = add i64 [[RESIDUAL_LOOP_INDEX]], 1
; OPT-NEXT:[[TMP15:%.*]] = icmp ult i64 [[TMP14]], [[TMP2]]
; OPT-NEXT:br i1 [[TMP15]], label [[LOOP_MEMCPY_RESIDUAL]], label
[[POST_LOOP_MEMCPY_EXPANSION:%.*]]
@@ -1038,9 +103
[llvm-branch-commits] [llvm] [EarlyIfCvt] Take branch probablities into consideration (PR #97808)
arsenm wrote: Needs target + test? https://github.com/llvm/llvm-project/pull/97808 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [llvm] AMDGPU: Handle remote/fine-grained memory in atomicrmw fmin/fmax lowering (PR #96759)
arsenm wrote: ping https://github.com/llvm/llvm-project/pull/96759 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] AMDGPU: Add subtarget feature for global atomic fadd denormal support (PR #96443)
arsenm wrote: ### Merge activity * **Jul 10, 8:37 AM EDT**: @arsenm started a stack merge that includes this pull request via [Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/96443). https://github.com/llvm/llvm-project/pull/96443 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] AMDGPU: Add subtarget feature for memory atomic fadd f64 (PR #96444)
arsenm wrote: ### Merge activity * **Jul 10, 8:37 AM EDT**: @arsenm started a stack merge that includes this pull request via [Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/96444). https://github.com/llvm/llvm-project/pull/96444 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (PR #96162)
cdevadas wrote: Ping https://github.com/llvm/llvm-project/pull/96162 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [AMDGPU] Codegen support for constrained multi-dword sloads (PR #96163)
cdevadas wrote: Ping https://github.com/llvm/llvm-project/pull/96163 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (PR #96162)
@@ -658,17 +658,17 @@ define amdgpu_kernel void @image_bvh_intersect_ray_nsa_reassign(ptr %p_node_ptr, ; ; GFX1013-LABEL: image_bvh_intersect_ray_nsa_reassign: ; GFX1013: ; %bb.0: -; GFX1013-NEXT:s_load_dwordx8 s[0:7], s[0:1], 0x24 +; GFX1013-NEXT:s_load_dwordx8 s[4:11], s[0:1], 0x24 jayfoad wrote: I guess this code changes because xnack is enabled by default for GFX10.1? Is there anything we could do to add known alignment info here, to avoid the code pessimization? https://github.com/llvm/llvm-project/pull/96162 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (PR #96162)
@@ -1212,8 +1228,14 @@ void SILoadStoreOptimizer::copyToDestRegs( // Copy to the old destination registers. const MCInstrDesc &CopyDesc = TII->get(TargetOpcode::COPY); - const auto *Dest0 = TII->getNamedOperand(*CI.I, OpName); - const auto *Dest1 = TII->getNamedOperand(*Paired.I, OpName); + auto *Dest0 = TII->getNamedOperand(*CI.I, OpName); + auto *Dest1 = TII->getNamedOperand(*Paired.I, OpName); + + // The constrained sload instructions in S_LOAD_IMM class will have + // `early-clobber` flag in the dst operand. Remove the flag before using the + // MOs in copies. + Dest0->setIsEarlyClobber(false); + Dest1->setIsEarlyClobber(false); jayfoad wrote: It's a bit ugly to modify in-place the operands of `CI.I` and `Paired.I`. But I guess it is harmless since they will be erased soon, when the merged load instruction is created. https://github.com/llvm/llvm-project/pull/96162 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [AMDGPU] Codegen support for constrained multi-dword sloads (PR #96163)
@@ -866,13 +866,61 @@ def SMRDBufferImm : ComplexPattern;
def SMRDBufferImm32 : ComplexPattern;
def SMRDBufferSgprImm : ComplexPattern;
+class SMRDAlignedLoadPat : PatFrag <(ops node:$ptr), (Op
node:$ptr), [{
+ // Ignore the alignment check if XNACK support is disabled.
+ if (!Subtarget->isXNACKEnabled())
+return true;
+
+ // Returns true if it is a single dword load or naturally aligned
multi-dword load.
+ LoadSDNode *Ld = cast(N);
+ unsigned Size = Ld->getMemoryVT().getStoreSize();
+ return Size <= 4 || Ld->getAlign().value() >= Size;
+}]> {
+ let GISelPredicateCode = [{
+ if (!Subtarget->isXNACKEnabled())
+return true;
+
+ auto &Ld = cast(MI);
+ TypeSize Size = Ld.getMMO().getSize().getValue();
+ return Size <= 4 || Ld.getMMO().getAlign().value() >= Size;
+ }];
+}
+
+class SMRDUnalignedLoadPat : PatFrag <(ops node:$ptr), (Op
node:$ptr), [{
jayfoad wrote:
I don't think you need this class at all, since the _ec forms should work in
all cases. It's just an optimization to prefer the non-_ec forms when the load
is suitable aligned, and you can handle that with DAG pattern priority (maybe
by setting AddedComplexity).
https://github.com/llvm/llvm-project/pull/96163
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[llvm-branch-commits] [llvm] [AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (PR #96162)
@@ -658,17 +658,17 @@ define amdgpu_kernel void @image_bvh_intersect_ray_nsa_reassign(ptr %p_node_ptr, ; ; GFX1013-LABEL: image_bvh_intersect_ray_nsa_reassign: ; GFX1013: ; %bb.0: -; GFX1013-NEXT:s_load_dwordx8 s[0:7], s[0:1], 0x24 +; GFX1013-NEXT:s_load_dwordx8 s[4:11], s[0:1], 0x24 cdevadas wrote: > I guess this code changes because xnack is enabled by default for GFX10.1? Yes. > Is there anything we could do to add known alignment info here, to avoid the > code pessimization? I'm not sure what can be done for it. https://github.com/llvm/llvm-project/pull/96162 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (PR #96162)
https://github.com/cdevadas edited https://github.com/llvm/llvm-project/pull/96162 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] f1f8d87 - Revert "[RISCV] Enable TTI::shouldDropLSRSolutionIfLessProfitable by default …"
Author: Alex Bradbury
Date: 2024-07-10T15:28:18+01:00
New Revision: f1f8d8789af2627fd04a0e98203189f6da14a261
URL:
https://github.com/llvm/llvm-project/commit/f1f8d8789af2627fd04a0e98203189f6da14a261
DIFF:
https://github.com/llvm/llvm-project/commit/f1f8d8789af2627fd04a0e98203189f6da14a261.diff
LOG: Revert "[RISCV] Enable TTI::shouldDropLSRSolutionIfLessProfitable by
default …"
This reverts commit af47a4ec503fe3efc6ade8cad4882881a202ed41.
Added:
Modified:
llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
llvm/test/CodeGen/RISCV/rvv/dont-sink-splat-operands.ll
llvm/test/CodeGen/RISCV/rvv/pr95865.ll
llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll
llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
llvm/test/Transforms/LoopStrengthReduce/RISCV/icmp-zero.ll
llvm/test/Transforms/LoopStrengthReduce/RISCV/lsr-cost-compare.ll
llvm/test/Transforms/LoopStrengthReduce/RISCV/lsr-drop-solution-dbg-msg.ll
llvm/test/Transforms/LoopStrengthReduce/RISCV/many-geps.ll
Removed:
diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
index 7b239b8fc17a3..9c37a4f6ec2d0 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
+++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
@@ -398,8 +398,6 @@ class RISCVTTIImpl : public BasicTTIImplBase {
return true;
}
- bool shouldDropLSRSolutionIfLessProfitable() const { return true; }
-
std::optional getMinPageSize() const { return 4096; }
};
diff --git a/llvm/test/CodeGen/RISCV/rvv/dont-sink-splat-operands.ll
b/llvm/test/CodeGen/RISCV/rvv/dont-sink-splat-operands.ll
index 92639be0017e8..2b4b8e979f3d7 100644
--- a/llvm/test/CodeGen/RISCV/rvv/dont-sink-splat-operands.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/dont-sink-splat-operands.ll
@@ -86,29 +86,30 @@ declare i64 @llvm.vscale.i64()
define void @sink_splat_add_scalable(ptr nocapture %a, i32 signext %x) {
; NO-SINK-LABEL: sink_splat_add_scalable:
; NO-SINK: # %bb.0: # %entry
-; NO-SINK-NEXT:csrr a2, vlenb
-; NO-SINK-NEXT:srli a2, a2, 1
+; NO-SINK-NEXT:csrr a5, vlenb
+; NO-SINK-NEXT:srli a2, a5, 1
; NO-SINK-NEXT:li a3, 1024
; NO-SINK-NEXT:bgeu a3, a2, .LBB1_2
; NO-SINK-NEXT: # %bb.1:
; NO-SINK-NEXT:li a3, 0
; NO-SINK-NEXT:j .LBB1_5
; NO-SINK-NEXT: .LBB1_2: # %vector.ph
-; NO-SINK-NEXT:li a5, 0
; NO-SINK-NEXT:addi a3, a2, -1
; NO-SINK-NEXT:andi a4, a3, 1024
; NO-SINK-NEXT:xori a3, a4, 1024
; NO-SINK-NEXT:vsetvli a6, zero, e32, m2, ta, ma
; NO-SINK-NEXT:vmv.v.x v8, a1
+; NO-SINK-NEXT:slli a5, a5, 1
+; NO-SINK-NEXT:mv a6, a0
+; NO-SINK-NEXT:mv a7, a3
; NO-SINK-NEXT: .LBB1_3: # %vector.body
; NO-SINK-NEXT:# =>This Inner Loop Header: Depth=1
-; NO-SINK-NEXT:slli a6, a5, 2
-; NO-SINK-NEXT:add a6, a0, a6
; NO-SINK-NEXT:vl2re32.v v10, (a6)
; NO-SINK-NEXT:vadd.vv v10, v10, v8
-; NO-SINK-NEXT:add a5, a5, a2
; NO-SINK-NEXT:vs2r.v v10, (a6)
-; NO-SINK-NEXT:bne a5, a3, .LBB1_3
+; NO-SINK-NEXT:sub a7, a7, a2
+; NO-SINK-NEXT:add a6, a6, a5
+; NO-SINK-NEXT:bnez a7, .LBB1_3
; NO-SINK-NEXT: # %bb.4: # %middle.block
; NO-SINK-NEXT:beqz a4, .LBB1_7
; NO-SINK-NEXT: .LBB1_5: # %for.body.preheader
@@ -128,28 +129,29 @@ define void @sink_splat_add_scalable(ptr nocapture %a,
i32 signext %x) {
;
; SINK-LABEL: sink_splat_add_scalable:
; SINK: # %bb.0: # %entry
-; SINK-NEXT:csrr a2, vlenb
-; SINK-NEXT:srli a2, a2, 1
+; SINK-NEXT:csrr a5, vlenb
+; SINK-NEXT:srli a2, a5, 1
; SINK-NEXT:li a3, 1024
; SINK-NEXT:bgeu a3, a2, .LBB1_2
; SINK-NEXT: # %bb.1:
; SINK-NEXT:li a3, 0
; SINK-NEXT:j .LBB1_5
; SINK-NEXT: .LBB1_2: # %vector.ph
-; SINK-NEXT:li a5, 0
; SINK-NEXT:addi a3, a2, -1
; SINK-NEXT:andi a4, a3, 1024
; SINK-NEXT:xori a3, a4, 1024
-; SINK-NEXT:vsetvli a6, zero, e32, m2, ta, ma
+; SINK-NEXT:slli a5, a5, 1
+; SINK-NEXT:mv a6, a0
+; SINK-NEXT:mv a7, a3
+; SINK-NEXT:vsetvli t0, zero, e32, m2, ta, ma
; SINK-NEXT: .LBB1_3: # %vector.body
; SINK-NEXT:# =>This Inner Loop Header: Depth=1
-; SINK-NEXT:slli a6, a5, 2
-; SINK-NEXT:add a6, a0, a6
; SINK-NEXT:vl2re32.v v8, (a6)
; SINK-NEXT:vadd.vx v8, v8, a1
-; SINK-NEXT:add a5, a5, a2
; SINK-NEXT:vs2r.v v8, (a6)
-; SINK-NEXT:bne a5, a3, .LBB1_3
+; SINK-NEXT:sub a7, a7, a2
+; SINK-NEXT:add a6, a6, a5
+; SINK-NEXT:bnez a7, .LBB1_3
; SINK-NEXT: # %bb.4: # %middle.block
; SINK-NEXT:beqz a4, .LBB1_7
; SINK-NEXT: .LBB1_5: # %for.body.preheader
@@ -169,28 +171,29 @@ define void @sink_splat_add_scalable(ptr nocapture %a,
i32 signext %x) {
;
; DEFAULT-LABEL: sink_splat_add_scalable:
; DEFAULT: # %bb.0: # %entry
-; DEFAULT-NEXT:csrr a2, vlenb
-; DEFAULT-NEXT:srli a2, a2, 1
+; DEFAULT-NEXT:csrr a5, vl
[llvm-branch-commits] [llvm] [SPARC][IAS] Reject unknown/unavailable mnemonics early in ParseInstruction (PR #96021)
https://github.com/koachan updated
https://github.com/llvm/llvm-project/pull/96021
>From dbd8f1f421b397a4907af3811937a7815900876a Mon Sep 17 00:00:00 2001
From: Koakuma
Date: Wed, 10 Jul 2024 23:57:01 +0700
Subject: [PATCH] Don't use ParseForAllFeatures, validate all mnemonics up
front instead
Created using spr 1.3.5
---
.../Target/Sparc/AsmParser/SparcAsmParser.cpp | 78 ---
llvm/test/MC/Sparc/sparc-asm-errors.s | 4 +-
llvm/test/MC/Sparc/sparc-cas-instructions.s | 6 +-
llvm/test/MC/Sparc/sparcv9-instructions.s | 26 +++
4 files changed, 84 insertions(+), 30 deletions(-)
diff --git a/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
b/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
index e6728d0aae4e9..37f8a72bd4421 100644
--- a/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
+++ b/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
@@ -116,6 +116,9 @@ class SparcAsmParser : public MCTargetAsmParser {
// Helper function to see if current token can start an expression.
bool isPossibleExpression(const AsmToken &Token);
+ // Check if mnemonic is valid.
+ MatchResultTy mnemonicIsValid(StringRef Mnemonic, unsigned VariantID);
+
// returns true if Tok is matched to a register and returns register in
RegNo.
MCRegister matchRegisterName(const AsmToken &Tok, unsigned &RegKind);
@@ -601,6 +604,45 @@ class SparcOperand : public MCParsedAsmOperand {
} // end anonymous namespace
+#define GET_MATCHER_IMPLEMENTATION
+#define GET_REGISTER_MATCHER
+#define GET_MNEMONIC_SPELL_CHECKER
+#include "SparcGenAsmMatcher.inc"
+
+// Use a custom function instead of the one from SparcGenAsmMatcher
+// so we can differentiate between unavailable and unknown instructions.
+SparcAsmParser::MatchResultTy
+SparcAsmParser::mnemonicIsValid(StringRef Mnemonic, unsigned VariantID) {
+ // Process all MnemonicAliases to remap the mnemonic.
+ applyMnemonicAliases(Mnemonic, getAvailableFeatures(), VariantID);
+
+ // Find the appropriate table for this asm variant.
+ const MatchEntry *Start, *End;
+ switch (VariantID) {
+ default:
+llvm_unreachable("invalid variant!");
+ case 0:
+Start = std::begin(MatchTable0);
+End = std::end(MatchTable0);
+break;
+ }
+
+ // Search the table.
+ auto MnemonicRange = std::equal_range(Start, End, Mnemonic, LessOpcode());
+
+ if (MnemonicRange.first == MnemonicRange.second)
+return Match_MnemonicFail;
+
+ for (const MatchEntry *it = MnemonicRange.first, *ie = MnemonicRange.second;
+ it != ie; ++it) {
+const FeatureBitset &RequiredFeatures =
+FeatureBitsets[it->RequiredFeaturesIdx];
+if ((getAvailableFeatures() & RequiredFeatures) == RequiredFeatures)
+ return Match_Success;
+ }
+ return Match_MissingFeature;
+}
+
bool SparcAsmParser::expandSET(MCInst &Inst, SMLoc IDLoc,
SmallVectorImpl &Instructions) {
MCOperand MCRegOp = Inst.getOperand(0);
@@ -829,13 +871,32 @@ ParseStatus SparcAsmParser::tryParseRegister(MCRegister
&Reg, SMLoc &StartLoc,
return ParseStatus::NoMatch;
}
-static void applyMnemonicAliases(StringRef &Mnemonic,
- const FeatureBitset &Features,
- unsigned VariantID);
-
bool SparcAsmParser::ParseInstruction(ParseInstructionInfo &Info,
StringRef Name, SMLoc NameLoc,
OperandVector &Operands) {
+ // Validate and reject unavailable mnemonics early before
+ // running any operand parsing.
+ // This is needed because some operands (mainly memory ones)
+ // differ between V8 and V9 ISA and so any operand parsing errors
+ // will cause IAS to bail out before it reaches MatchAndEmitInstruction
+ // (where the instruction as a whole, including the mnemonic, is validated
+ // once again just before emission).
+ // As a nice side effect this also allows us to reject unknown
+ // instructions and suggest replacements.
+ MatchResultTy MS = mnemonicIsValid(Name, 0);
+ switch (MS) {
+ case Match_Success:
+break;
+ case Match_MissingFeature:
+return Error(NameLoc,
+ "instruction requires a CPU feature not currently enabled");
+ case Match_MnemonicFail:
+return Error(NameLoc,
+ "unknown instruction" +
+ SparcMnemonicSpellCheck(Name, getAvailableFeatures(), 0));
+ default:
+llvm_unreachable("invalid return status!");
+ }
// First operand in MCInst is instruction mnemonic.
Operands.push_back(SparcOperand::CreateToken(Name, NameLoc));
@@ -1188,8 +1249,7 @@ ParseStatus SparcAsmParser::parseCallTarget(OperandVector
&Operands) {
ParseStatus SparcAsmParser::parseOperand(OperandVector &Operands,
StringRef Mnemonic) {
- ParseStatus Res =
- MatchOperandParserImpl(Operands, Mnemonic, /*ParseForAllFeatures=*/true);
+ ParseStatus Res = MatchOperandParserImpl(Operands, Mnemon
[llvm-branch-commits] [llvm] [SPARC][IAS] Reject unknown/unavailable mnemonics early in ParseInstruction (PR #96021)
https://github.com/koachan edited https://github.com/llvm/llvm-project/pull/96021 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [SPARC][IAS] Reject unknown/unavailable mnemonics early in ParseInstruction (PR #96021)
koachan wrote: Hmmm, so, change of approach - I decided to follow what the MIPS backend does and validate all mnemonics early in ParseInstruction, before any operand parsing is done. This gets IAS to emit the correct error message for missing instructions. The misuse of ParseStatus returns still needs to be addressed, but at least I think with this approach it should no longer be a blocker for this particular issue? https://github.com/llvm/llvm-project/pull/96021 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [SPARC][IAS] Reject unknown/unavailable mnemonics early in ParseInstruction (PR #96021)
https://github.com/koachan updated
https://github.com/llvm/llvm-project/pull/96021
>From dbd8f1f421b397a4907af3811937a7815900876a Mon Sep 17 00:00:00 2001
From: Koakuma
Date: Wed, 10 Jul 2024 23:57:01 +0700
Subject: [PATCH 1/2] Don't use ParseForAllFeatures, validate all mnemonics up
front instead
Created using spr 1.3.5
---
.../Target/Sparc/AsmParser/SparcAsmParser.cpp | 78 ---
llvm/test/MC/Sparc/sparc-asm-errors.s | 4 +-
llvm/test/MC/Sparc/sparc-cas-instructions.s | 6 +-
llvm/test/MC/Sparc/sparcv9-instructions.s | 26 +++
4 files changed, 84 insertions(+), 30 deletions(-)
diff --git a/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
b/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
index e6728d0aae4e9..37f8a72bd4421 100644
--- a/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
+++ b/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
@@ -116,6 +116,9 @@ class SparcAsmParser : public MCTargetAsmParser {
// Helper function to see if current token can start an expression.
bool isPossibleExpression(const AsmToken &Token);
+ // Check if mnemonic is valid.
+ MatchResultTy mnemonicIsValid(StringRef Mnemonic, unsigned VariantID);
+
// returns true if Tok is matched to a register and returns register in
RegNo.
MCRegister matchRegisterName(const AsmToken &Tok, unsigned &RegKind);
@@ -601,6 +604,45 @@ class SparcOperand : public MCParsedAsmOperand {
} // end anonymous namespace
+#define GET_MATCHER_IMPLEMENTATION
+#define GET_REGISTER_MATCHER
+#define GET_MNEMONIC_SPELL_CHECKER
+#include "SparcGenAsmMatcher.inc"
+
+// Use a custom function instead of the one from SparcGenAsmMatcher
+// so we can differentiate between unavailable and unknown instructions.
+SparcAsmParser::MatchResultTy
+SparcAsmParser::mnemonicIsValid(StringRef Mnemonic, unsigned VariantID) {
+ // Process all MnemonicAliases to remap the mnemonic.
+ applyMnemonicAliases(Mnemonic, getAvailableFeatures(), VariantID);
+
+ // Find the appropriate table for this asm variant.
+ const MatchEntry *Start, *End;
+ switch (VariantID) {
+ default:
+llvm_unreachable("invalid variant!");
+ case 0:
+Start = std::begin(MatchTable0);
+End = std::end(MatchTable0);
+break;
+ }
+
+ // Search the table.
+ auto MnemonicRange = std::equal_range(Start, End, Mnemonic, LessOpcode());
+
+ if (MnemonicRange.first == MnemonicRange.second)
+return Match_MnemonicFail;
+
+ for (const MatchEntry *it = MnemonicRange.first, *ie = MnemonicRange.second;
+ it != ie; ++it) {
+const FeatureBitset &RequiredFeatures =
+FeatureBitsets[it->RequiredFeaturesIdx];
+if ((getAvailableFeatures() & RequiredFeatures) == RequiredFeatures)
+ return Match_Success;
+ }
+ return Match_MissingFeature;
+}
+
bool SparcAsmParser::expandSET(MCInst &Inst, SMLoc IDLoc,
SmallVectorImpl &Instructions) {
MCOperand MCRegOp = Inst.getOperand(0);
@@ -829,13 +871,32 @@ ParseStatus SparcAsmParser::tryParseRegister(MCRegister
&Reg, SMLoc &StartLoc,
return ParseStatus::NoMatch;
}
-static void applyMnemonicAliases(StringRef &Mnemonic,
- const FeatureBitset &Features,
- unsigned VariantID);
-
bool SparcAsmParser::ParseInstruction(ParseInstructionInfo &Info,
StringRef Name, SMLoc NameLoc,
OperandVector &Operands) {
+ // Validate and reject unavailable mnemonics early before
+ // running any operand parsing.
+ // This is needed because some operands (mainly memory ones)
+ // differ between V8 and V9 ISA and so any operand parsing errors
+ // will cause IAS to bail out before it reaches MatchAndEmitInstruction
+ // (where the instruction as a whole, including the mnemonic, is validated
+ // once again just before emission).
+ // As a nice side effect this also allows us to reject unknown
+ // instructions and suggest replacements.
+ MatchResultTy MS = mnemonicIsValid(Name, 0);
+ switch (MS) {
+ case Match_Success:
+break;
+ case Match_MissingFeature:
+return Error(NameLoc,
+ "instruction requires a CPU feature not currently enabled");
+ case Match_MnemonicFail:
+return Error(NameLoc,
+ "unknown instruction" +
+ SparcMnemonicSpellCheck(Name, getAvailableFeatures(), 0));
+ default:
+llvm_unreachable("invalid return status!");
+ }
// First operand in MCInst is instruction mnemonic.
Operands.push_back(SparcOperand::CreateToken(Name, NameLoc));
@@ -1188,8 +1249,7 @@ ParseStatus SparcAsmParser::parseCallTarget(OperandVector
&Operands) {
ParseStatus SparcAsmParser::parseOperand(OperandVector &Operands,
StringRef Mnemonic) {
- ParseStatus Res =
- MatchOperandParserImpl(Operands, Mnemonic, /*ParseForAllFeatures=*/true);
+ ParseStatus Res = MatchOperandParserImpl(Operands, Mn
[llvm-branch-commits] [llvm] [SPARC][IAS] Reject unknown/unavailable mnemonics early in ParseInstruction (PR #96021)
https://github.com/s-barannikov approved this pull request. The downside of this approach is that you lose the ability to report the missing features (unless you implement it yourself, which would be a code duplication), that would allow to produce instead better diagnostics like "instruction requires: LeonCASA". Also, sometimes a mnemonic is valid in both modes, but certain operand combinations are only allowed in V9, e.g. swapa with r+i addressing mode. In this case you still rely on MatchOperandParserImpl & MatchInstructionImpl, which can produce different / broken diagnostics. I'd still vote for ParseForAllFeatures, but I don't insist since people are unlikely to see these diagnostics anyway. https://github.com/llvm/llvm-project/pull/96021 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [SPARC][IAS] Reject unknown/unavailable mnemonics early in ParseInstruction (PR #96021)
https://github.com/s-barannikov edited https://github.com/llvm/llvm-project/pull/96021 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [BOLT] Match blocks with calls as anchors (PR #96596)
https://github.com/shawbyoung updated
https://github.com/llvm/llvm-project/pull/96596
>From 05d59574d6260b98a469921eb2fccf5398bfafb6 Mon Sep 17 00:00:00 2001
From: shawbyoung
Date: Mon, 24 Jun 2024 23:00:59 -0700
Subject: [PATCH 01/18] Added call to matchWithCallsAsAnchors
Created using spr 1.3.4
---
bolt/lib/Profile/YAMLProfileReader.cpp | 3 +++
1 file changed, 3 insertions(+)
diff --git a/bolt/lib/Profile/YAMLProfileReader.cpp
b/bolt/lib/Profile/YAMLProfileReader.cpp
index aafffac3d4b1c..1a0e5d239d252 100644
--- a/bolt/lib/Profile/YAMLProfileReader.cpp
+++ b/bolt/lib/Profile/YAMLProfileReader.cpp
@@ -479,6 +479,9 @@ Error YAMLProfileReader::readProfile(BinaryContext &BC) {
if (!YamlBF.Used && BF && !ProfiledFunctions.count(BF))
matchProfileToFunction(YamlBF, *BF);
+ uint64_t MatchedWithCallsAsAnchors = 0;
+ matchWithCallsAsAnchors(BC, MatchedWithCallsAsAnchors);
+
for (yaml::bolt::BinaryFunctionProfile &YamlBF : YamlBP.Functions)
if (!YamlBF.Used && opts::Verbosity >= 1)
errs() << "BOLT-WARNING: profile ignored for function " << YamlBF.Name
>From 77ef0008f4f5987719555e6cc3e32da812ae0f31 Mon Sep 17 00:00:00 2001
From: shawbyoung
Date: Mon, 24 Jun 2024 23:11:43 -0700
Subject: [PATCH 02/18] Changed CallHashToBF representation
Created using spr 1.3.4
---
bolt/lib/Profile/YAMLProfileReader.cpp | 15 ++-
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a/bolt/lib/Profile/YAMLProfileReader.cpp
b/bolt/lib/Profile/YAMLProfileReader.cpp
index 1a0e5d239d252..91b01a99c7485 100644
--- a/bolt/lib/Profile/YAMLProfileReader.cpp
+++ b/bolt/lib/Profile/YAMLProfileReader.cpp
@@ -29,6 +29,10 @@ static llvm::cl::opt
cl::desc("ignore hash while reading function profile"),
cl::Hidden, cl::cat(BoltOptCategory));
+llvm::cl::opt MatchWithCallsAsAnchors("match-with-calls-as-anchors",
+ cl::desc("Matches with calls as anchors"),
+ cl::Hidden, cl::cat(BoltOptCategory));
+
llvm::cl::opt ProfileUseDFS("profile-use-dfs",
cl::desc("use DFS order for YAML profile"),
cl::Hidden, cl::cat(BoltOptCategory));
@@ -353,7 +357,7 @@ void YAMLProfileReader::matchWithCallsAsAnchors(
llvm_unreachable("Unhandled HashFunction");
};
- std::unordered_map CallHashToBF;
+ std::unordered_map CallHashToBF;
for (BinaryFunction *BF : BC.getAllBinaryFunctions()) {
if (ProfiledFunctions.count(BF))
@@ -375,12 +379,12 @@ void YAMLProfileReader::matchWithCallsAsAnchors(
for (const std::string &FunctionName : FunctionNames)
HashString.append(FunctionName);
}
-CallHashToBF.emplace(ComputeCallHash(HashString), BF);
+CallHashToBF[ComputeCallHash(HashString)] = BF;
}
std::unordered_map ProfiledFunctionIdToName;
- for (const yaml::bolt::BinaryFunctionProfile YamlBF : YamlBP.Functions)
+ for (const yaml::bolt::BinaryFunctionProfile &YamlBF : YamlBP.Functions)
ProfiledFunctionIdToName[YamlBF.Id] = YamlBF.Name;
for (yaml::bolt::BinaryFunctionProfile &YamlBF : YamlBP.Functions) {
@@ -401,7 +405,7 @@ void YAMLProfileReader::matchWithCallsAsAnchors(
auto It = CallHashToBF.find(Hash);
if (It == CallHashToBF.end())
continue;
-matchProfileToFunction(YamlBF, It->second);
+matchProfileToFunction(YamlBF, *It->second);
++MatchedWithCallsAsAnchors;
}
}
@@ -480,7 +484,8 @@ Error YAMLProfileReader::readProfile(BinaryContext &BC) {
matchProfileToFunction(YamlBF, *BF);
uint64_t MatchedWithCallsAsAnchors = 0;
- matchWithCallsAsAnchors(BC, MatchedWithCallsAsAnchors);
+ if (opts::MatchWithCallsAsAnchors)
+matchWithCallsAsAnchors(BC, MatchedWithCallsAsAnchors);
for (yaml::bolt::BinaryFunctionProfile &YamlBF : YamlBP.Functions)
if (!YamlBF.Used && opts::Verbosity >= 1)
>From ea7cb68ab9e8e158412c2e752986968968a60d93 Mon Sep 17 00:00:00 2001
From: shawbyoung
Date: Tue, 25 Jun 2024 09:28:39 -0700
Subject: [PATCH 03/18] Changed BF called FunctionNames to multiset
Created using spr 1.3.4
---
bolt/lib/Profile/YAMLProfileReader.cpp | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/bolt/lib/Profile/YAMLProfileReader.cpp
b/bolt/lib/Profile/YAMLProfileReader.cpp
index 91b01a99c7485..3b3d73f7af023 100644
--- a/bolt/lib/Profile/YAMLProfileReader.cpp
+++ b/bolt/lib/Profile/YAMLProfileReader.cpp
@@ -365,7 +365,7 @@ void YAMLProfileReader::matchWithCallsAsAnchors(
std::string HashString;
for (const auto &BB : BF->blocks()) {
- std::set FunctionNames;
+ std::multiset FunctionNames;
for (const MCInst &Instr : BB) {
// Skip non-call instructions.
if (!BC.MIB->isCall(Instr))
@@ -397,9 +397,8 @@ void YAMLProfileReader::matchWithCallsAsAnchors(
std::string &FunctionName = ProfiledFunctionIdToName[CallSite.DestId];
FunctionNames.insert(FunctionName);
[llvm-branch-commits] [llvm] [BOLT] Match blocks with calls as anchors (PR #96596)
https://github.com/aaupov edited https://github.com/llvm/llvm-project/pull/96596 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [BOLT] Match blocks with calls as anchors (PR #96596)
@@ -63,8 +63,8 @@ class NameResolver {
}
// Removes a suffix from a function name.
- static StringRef removeSuffix(StringRef Name, StringRef Suffix) {
-const size_t Pos = Name.find(Suffix);
+ static StringRef unify(StringRef Name) {
aaupov wrote:
Let's use a self-descriptive name e.g. `dropNumNames`.
This would follow the convention used in BinaryFunction.h `getPrintName`.
https://github.com/llvm/llvm-project/pull/96596
___
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llvm-branch-commits@lists.llvm.org
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[llvm-branch-commits] [llvm] [BOLT] Match blocks with calls as anchors (PR #96596)
https://github.com/aaupov commented: Thanks, LG with one nit. https://github.com/llvm/llvm-project/pull/96596 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [clang][OpenMP] Remove compound directives from `checkNestingOfRegions` (PR #98387)
https://github.com/kparzysz created
https://github.com/llvm/llvm-project/pull/98387
Express the constraints via constituent directives.
>From 263c2357cd686e63b5b78985d3c8c6f3635e69cc Mon Sep 17 00:00:00 2001
From: Krzysztof Parzyszek
Date: Wed, 10 Jul 2024 09:35:56 -0500
Subject: [PATCH] [clang][OpenMP] Remove compound directives from
`checkNestingOfRegions`
Express the constraints via constituent directives.
---
clang/lib/Sema/SemaOpenMP.cpp | 107 +-
1 file changed, 53 insertions(+), 54 deletions(-)
diff --git a/clang/lib/Sema/SemaOpenMP.cpp b/clang/lib/Sema/SemaOpenMP.cpp
index ef09e53077f47..5861923582eb1 100644
--- a/clang/lib/Sema/SemaOpenMP.cpp
+++ b/clang/lib/Sema/SemaOpenMP.cpp
@@ -4797,6 +4797,12 @@ static bool checkNestingOfRegions(Sema &SemaRef, const
DSAStackTy *Stack,
ShouldBeInTeamsRegion,
ShouldBeInLoopSimdRegion,
} Recommend = NoRecommend;
+
+ SmallVector LeafOrComposite;
+ ArrayRef ParentLOC =
+ getLeafOrCompositeConstructs(ParentRegion, LeafOrComposite);
+ OpenMPDirectiveKind EnclosingConstruct = ParentLOC.back();
+
if (SemaRef.LangOpts.OpenMP >= 51 && Stack->isParentOrderConcurrent() &&
CurrentRegion != OMPD_simd && CurrentRegion != OMPD_loop &&
CurrentRegion != OMPD_parallel &&
@@ -4805,6 +4811,7 @@ static bool checkNestingOfRegions(Sema &SemaRef, const
DSAStackTy *Stack,
<< getOpenMPDirectiveName(CurrentRegion);
return true;
}
+
if (isOpenMPSimdDirective(ParentRegion) &&
((SemaRef.LangOpts.OpenMP <= 45 && CurrentRegion != OMPD_ordered) ||
(SemaRef.LangOpts.OpenMP >= 50 && CurrentRegion != OMPD_ordered &&
@@ -4828,19 +4835,20 @@ static bool checkNestingOfRegions(Sema &SemaRef, const
DSAStackTy *Stack,
<< (SemaRef.LangOpts.OpenMP >= 50 ? 1 : 0);
return CurrentRegion != OMPD_simd;
}
- if (ParentRegion == OMPD_atomic) {
+
+ if (EnclosingConstruct == OMPD_atomic) {
// OpenMP [2.16, Nesting of Regions]
// OpenMP constructs may not be nested inside an atomic region.
SemaRef.Diag(StartLoc, diag::err_omp_prohibited_region_atomic);
return true;
}
+
if (CurrentRegion == OMPD_section) {
// OpenMP [2.7.2, sections Construct, Restrictions]
// Orphaned section directives are prohibited. That is, the section
// directives must appear within the sections construct and must not be
// encountered elsewhere in the sections region.
-if (ParentRegion != OMPD_sections &&
-ParentRegion != OMPD_parallel_sections) {
+if (EnclosingConstruct != OMPD_sections) {
SemaRef.Diag(StartLoc, diag::err_omp_orphaned_section_directive)
<< (ParentRegion != OMPD_unknown)
<< getOpenMPDirectiveName(ParentRegion);
@@ -4848,6 +4856,7 @@ static bool checkNestingOfRegions(Sema &SemaRef, const
DSAStackTy *Stack,
}
return false;
}
+
// Allow some constructs (except teams and cancellation constructs) to be
// orphaned (they could be used in functions, called from OpenMP regions
// with the required preconditions).
@@ -4856,18 +4865,20 @@ static bool checkNestingOfRegions(Sema &SemaRef, const
DSAStackTy *Stack,
CurrentRegion != OMPD_cancellation_point &&
CurrentRegion != OMPD_cancel && CurrentRegion != OMPD_scan)
return false;
+
// Checks needed for mapping "loop" construct. Please check mapLoopConstruct
// for a detailed explanation
if (SemaRef.LangOpts.OpenMP >= 50 && CurrentRegion == OMPD_loop &&
(BindKind == OMPC_BIND_parallel || BindKind == OMPC_BIND_teams) &&
(isOpenMPWorksharingDirective(ParentRegion) ||
- ParentRegion == OMPD_loop)) {
+ EnclosingConstruct == OMPD_loop)) {
int ErrorMsgNumber = (BindKind == OMPC_BIND_parallel) ? 1 : 4;
SemaRef.Diag(StartLoc, diag::err_omp_prohibited_region)
<< true << getOpenMPDirectiveName(ParentRegion) << ErrorMsgNumber
<< getOpenMPDirectiveName(CurrentRegion);
return true;
}
+
if (CurrentRegion == OMPD_cancellation_point ||
CurrentRegion == OMPD_cancel) {
// OpenMP [2.16, Nesting of Regions]
@@ -4881,27 +4892,17 @@ static bool checkNestingOfRegions(Sema &SemaRef, const
DSAStackTy *Stack,
// construct-type-clause is not taskgroup must be closely nested inside an
// OpenMP construct that matches the type specified in
// construct-type-clause.
-NestingProhibited =
-!((CancelRegion == OMPD_parallel &&
- (ParentRegion == OMPD_parallel ||
-ParentRegion == OMPD_target_parallel)) ||
- (CancelRegion == OMPD_for &&
- (ParentRegion == OMPD_for || ParentRegion == OMPD_parallel_for ||
-ParentRegion == OMPD_target_parallel_for ||
-ParentRegion == OMPD_distribute_parallel_for ||
-ParentRegion == OMPD_teams_distribute_parallel_for ||
-ParentRegion == OMPD_target_teams_distribute_parallel_for)) ||
- (CancelRegion == OMPD_taskgroup &&
-
[llvm-branch-commits] [clang] [clang][OpenMP] Remove compound directives from `checkNestingOfRegions` (PR #98387)
llvmbot wrote:
@llvm/pr-subscribers-clang
Author: Krzysztof Parzyszek (kparzysz)
Changes
Express the constraints via constituent directives.
---
Full diff: https://github.com/llvm/llvm-project/pull/98387.diff
1 Files Affected:
- (modified) clang/lib/Sema/SemaOpenMP.cpp (+53-54)
``diff
diff --git a/clang/lib/Sema/SemaOpenMP.cpp b/clang/lib/Sema/SemaOpenMP.cpp
index ef09e53077f47..5861923582eb1 100644
--- a/clang/lib/Sema/SemaOpenMP.cpp
+++ b/clang/lib/Sema/SemaOpenMP.cpp
@@ -4797,6 +4797,12 @@ static bool checkNestingOfRegions(Sema &SemaRef, const
DSAStackTy *Stack,
ShouldBeInTeamsRegion,
ShouldBeInLoopSimdRegion,
} Recommend = NoRecommend;
+
+ SmallVector LeafOrComposite;
+ ArrayRef ParentLOC =
+ getLeafOrCompositeConstructs(ParentRegion, LeafOrComposite);
+ OpenMPDirectiveKind EnclosingConstruct = ParentLOC.back();
+
if (SemaRef.LangOpts.OpenMP >= 51 && Stack->isParentOrderConcurrent() &&
CurrentRegion != OMPD_simd && CurrentRegion != OMPD_loop &&
CurrentRegion != OMPD_parallel &&
@@ -4805,6 +4811,7 @@ static bool checkNestingOfRegions(Sema &SemaRef, const
DSAStackTy *Stack,
<< getOpenMPDirectiveName(CurrentRegion);
return true;
}
+
if (isOpenMPSimdDirective(ParentRegion) &&
((SemaRef.LangOpts.OpenMP <= 45 && CurrentRegion != OMPD_ordered) ||
(SemaRef.LangOpts.OpenMP >= 50 && CurrentRegion != OMPD_ordered &&
@@ -4828,19 +4835,20 @@ static bool checkNestingOfRegions(Sema &SemaRef, const
DSAStackTy *Stack,
<< (SemaRef.LangOpts.OpenMP >= 50 ? 1 : 0);
return CurrentRegion != OMPD_simd;
}
- if (ParentRegion == OMPD_atomic) {
+
+ if (EnclosingConstruct == OMPD_atomic) {
// OpenMP [2.16, Nesting of Regions]
// OpenMP constructs may not be nested inside an atomic region.
SemaRef.Diag(StartLoc, diag::err_omp_prohibited_region_atomic);
return true;
}
+
if (CurrentRegion == OMPD_section) {
// OpenMP [2.7.2, sections Construct, Restrictions]
// Orphaned section directives are prohibited. That is, the section
// directives must appear within the sections construct and must not be
// encountered elsewhere in the sections region.
-if (ParentRegion != OMPD_sections &&
-ParentRegion != OMPD_parallel_sections) {
+if (EnclosingConstruct != OMPD_sections) {
SemaRef.Diag(StartLoc, diag::err_omp_orphaned_section_directive)
<< (ParentRegion != OMPD_unknown)
<< getOpenMPDirectiveName(ParentRegion);
@@ -4848,6 +4856,7 @@ static bool checkNestingOfRegions(Sema &SemaRef, const
DSAStackTy *Stack,
}
return false;
}
+
// Allow some constructs (except teams and cancellation constructs) to be
// orphaned (they could be used in functions, called from OpenMP regions
// with the required preconditions).
@@ -4856,18 +4865,20 @@ static bool checkNestingOfRegions(Sema &SemaRef, const
DSAStackTy *Stack,
CurrentRegion != OMPD_cancellation_point &&
CurrentRegion != OMPD_cancel && CurrentRegion != OMPD_scan)
return false;
+
// Checks needed for mapping "loop" construct. Please check mapLoopConstruct
// for a detailed explanation
if (SemaRef.LangOpts.OpenMP >= 50 && CurrentRegion == OMPD_loop &&
(BindKind == OMPC_BIND_parallel || BindKind == OMPC_BIND_teams) &&
(isOpenMPWorksharingDirective(ParentRegion) ||
- ParentRegion == OMPD_loop)) {
+ EnclosingConstruct == OMPD_loop)) {
int ErrorMsgNumber = (BindKind == OMPC_BIND_parallel) ? 1 : 4;
SemaRef.Diag(StartLoc, diag::err_omp_prohibited_region)
<< true << getOpenMPDirectiveName(ParentRegion) << ErrorMsgNumber
<< getOpenMPDirectiveName(CurrentRegion);
return true;
}
+
if (CurrentRegion == OMPD_cancellation_point ||
CurrentRegion == OMPD_cancel) {
// OpenMP [2.16, Nesting of Regions]
@@ -4881,27 +4892,17 @@ static bool checkNestingOfRegions(Sema &SemaRef, const
DSAStackTy *Stack,
// construct-type-clause is not taskgroup must be closely nested inside an
// OpenMP construct that matches the type specified in
// construct-type-clause.
-NestingProhibited =
-!((CancelRegion == OMPD_parallel &&
- (ParentRegion == OMPD_parallel ||
-ParentRegion == OMPD_target_parallel)) ||
- (CancelRegion == OMPD_for &&
- (ParentRegion == OMPD_for || ParentRegion == OMPD_parallel_for ||
-ParentRegion == OMPD_target_parallel_for ||
-ParentRegion == OMPD_distribute_parallel_for ||
-ParentRegion == OMPD_teams_distribute_parallel_for ||
-ParentRegion == OMPD_target_teams_distribute_parallel_for)) ||
- (CancelRegion == OMPD_taskgroup &&
- (ParentRegion == OMPD_task ||
-(SemaRef.getLangOpts().OpenMP >= 50 &&
- (ParentRegion == OMPD_taskloop ||
- ParentRegion == OMPD_master_taskloop ||
- ParentRegion == OMPD_masked_
[llvm-branch-commits] [BOLT] Match blocks with calls as anchors (PR #98390)
https://github.com/shawbyoung created https://github.com/llvm/llvm-project/pull/98390 Expands the scope of possible block matches by hashing blocks by their lexicographically ordered function names to provide a looser level of matching past opcode hash matching in StaleProfileMatching. Test Plan: added match-functions-with-calls-as-anchors.test. ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [BOLT] Match blocks with calls as anchors (PR #98390)
https://github.com/shawbyoung closed https://github.com/llvm/llvm-project/pull/98390 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [BOLT] Match blocks with calls as anchors (PR #98390)
llvmbot wrote:
@llvm/pr-subscribers-bolt
Author: Shaw Young (shawbyoung)
Changes
Expands the scope of possible block matches by hashing blocks by their
lexicographically ordered function names to provide a looser level of
matching past opcode hash matching in StaleProfileMatching.
Test Plan: added match-functions-with-calls-as-anchors.test.
---
Full diff: https://github.com/llvm/llvm-project/pull/98390.diff
7 Files Affected:
- (modified) bolt/include/bolt/Core/HashUtilities.h (+8)
- (modified) bolt/include/bolt/Profile/YAMLProfileReader.h (+6)
- (modified) bolt/include/bolt/Utils/NameResolver.h (+6)
- (modified) bolt/lib/Core/HashUtilities.cpp (+47)
- (modified) bolt/lib/Profile/StaleProfileMatching.cpp (+80-17)
- (modified) bolt/lib/Profile/YAMLProfileReader.cpp (+4)
- (added) bolt/test/X86/match-functions-with-calls-as-anchors.test (+162)
``diff
diff --git a/bolt/include/bolt/Core/HashUtilities.h
b/bolt/include/bolt/Core/HashUtilities.h
index 53ea110aa683b..d12ecbe72f652 100644
--- a/bolt/include/bolt/Core/HashUtilities.h
+++ b/bolt/include/bolt/Core/HashUtilities.h
@@ -16,6 +16,7 @@
#include "bolt/Core/BinaryBasicBlock.h"
#include "bolt/Core/BinaryContext.h"
+#include "bolt/Profile/ProfileYAMLMapping.h"
namespace llvm {
namespace bolt {
@@ -35,6 +36,13 @@ std::string hashBlock(BinaryContext &BC, const
BinaryBasicBlock &BB,
std::string hashBlockLoose(BinaryContext &BC, const BinaryBasicBlock &BB);
+std::string hashBlockCalls(BinaryContext &BC, const BinaryBasicBlock &BB);
+
+std::string
+hashBlockCalls(const DenseMap
+ &IdToYamlFunction,
+ const yaml::bolt::BinaryBasicBlockProfile &YamlBB);
+
} // namespace bolt
} // namespace llvm
diff --git a/bolt/include/bolt/Profile/YAMLProfileReader.h
b/bolt/include/bolt/Profile/YAMLProfileReader.h
index 582546a7e3b5e..ada54a8f424c7 100644
--- a/bolt/include/bolt/Profile/YAMLProfileReader.h
+++ b/bolt/include/bolt/Profile/YAMLProfileReader.h
@@ -40,6 +40,8 @@ class YAMLProfileReader : public ProfileReaderBase {
/// Check if the file contains YAML.
static bool isYAML(StringRef Filename);
+ using ProfileLookupMap = DenseMap;
+
private:
/// Adjustments for basic samples profiles (without LBR).
bool NormalizeByInsnCount{false};
@@ -56,6 +58,10 @@ class YAMLProfileReader : public ProfileReaderBase {
/// is attributed.
FunctionSet ProfiledFunctions;
+ /// Maps profiled function id to function, for function matching with calls
as
+ /// anchors.
+ ProfileLookupMap IdToYamLBF;
+
/// For LTO symbol resolution.
/// Map a common LTO prefix to a list of YAML profiles matching the prefix.
StringMap> LTOCommonNameMap;
diff --git a/bolt/include/bolt/Utils/NameResolver.h
b/bolt/include/bolt/Utils/NameResolver.h
index ccffa5633245c..9719ce1297a7f 100644
--- a/bolt/include/bolt/Utils/NameResolver.h
+++ b/bolt/include/bolt/Utils/NameResolver.h
@@ -61,6 +61,12 @@ class NameResolver {
std::tie(LHS, RHS) = UniqueName.split(Sep);
return (LHS + Suffix + Twine(Sep) + RHS).str();
}
+
+ // Drops the suffix that describes the function's number of names.
+ static StringRef dropNumNames(StringRef Name) {
+const size_t Pos = Name.find("(*");
+return Pos != StringRef::npos ? Name.substr(0, Pos) : Name;
+ }
};
} // namespace bolt
diff --git a/bolt/lib/Core/HashUtilities.cpp b/bolt/lib/Core/HashUtilities.cpp
index c4c67bd68198b..3bf2fb9ac7d39 100644
--- a/bolt/lib/Core/HashUtilities.cpp
+++ b/bolt/lib/Core/HashUtilities.cpp
@@ -12,6 +12,7 @@
#include "bolt/Core/HashUtilities.h"
#include "bolt/Core/BinaryContext.h"
+#include "bolt/Utils/NameResolver.h"
#include "llvm/MC/MCInstPrinter.h"
namespace llvm {
@@ -155,5 +156,51 @@ std::string hashBlockLoose(BinaryContext &BC, const
BinaryBasicBlock &BB) {
return HashString;
}
+/// An even looser hash level relative to $ hashBlockLoose to use with stale
+/// profile matching, composed of the names of a block's called functions in
+/// lexicographic order.
+std::string hashBlockCalls(BinaryContext &BC, const BinaryBasicBlock &BB) {
+ // The hash is computed by creating a string of all lexicographically ordered
+ // called function names.
+ std::vector FunctionNames;
+ for (const MCInst &Instr : BB) {
+// Skip non-call instructions.
+if (!BC.MIB->isCall(Instr))
+ continue;
+const MCSymbol *CallSymbol = BC.MIB->getTargetSymbol(Instr);
+if (!CallSymbol)
+ continue;
+FunctionNames.push_back(std::string(CallSymbol->getName()));
+ }
+ std::sort(FunctionNames.begin(), FunctionNames.end());
+ std::string HashString;
+ for (const std::string &FunctionName : FunctionNames)
+HashString.append(FunctionName);
+
+ return HashString;
+}
+
+/// The same as the $hashBlockCalls function, but for profiled functions.
+std::string
+hashBlockCalls(const DenseMap
+ &IdToYamlFunction,
+ const yaml::bolt::BinaryBasicBlockProfile &YamlBB) {
+ std::v
[llvm-branch-commits] [llvm] [BOLT] Match blocks with calls as anchors (PR #96596)
https://github.com/shawbyoung updated
https://github.com/llvm/llvm-project/pull/96596
>From 05d59574d6260b98a469921eb2fccf5398bfafb6 Mon Sep 17 00:00:00 2001
From: shawbyoung
Date: Mon, 24 Jun 2024 23:00:59 -0700
Subject: [PATCH 01/19] Added call to matchWithCallsAsAnchors
Created using spr 1.3.4
---
bolt/lib/Profile/YAMLProfileReader.cpp | 3 +++
1 file changed, 3 insertions(+)
diff --git a/bolt/lib/Profile/YAMLProfileReader.cpp
b/bolt/lib/Profile/YAMLProfileReader.cpp
index aafffac3d4b1c..1a0e5d239d252 100644
--- a/bolt/lib/Profile/YAMLProfileReader.cpp
+++ b/bolt/lib/Profile/YAMLProfileReader.cpp
@@ -479,6 +479,9 @@ Error YAMLProfileReader::readProfile(BinaryContext &BC) {
if (!YamlBF.Used && BF && !ProfiledFunctions.count(BF))
matchProfileToFunction(YamlBF, *BF);
+ uint64_t MatchedWithCallsAsAnchors = 0;
+ matchWithCallsAsAnchors(BC, MatchedWithCallsAsAnchors);
+
for (yaml::bolt::BinaryFunctionProfile &YamlBF : YamlBP.Functions)
if (!YamlBF.Used && opts::Verbosity >= 1)
errs() << "BOLT-WARNING: profile ignored for function " << YamlBF.Name
>From 77ef0008f4f5987719555e6cc3e32da812ae0f31 Mon Sep 17 00:00:00 2001
From: shawbyoung
Date: Mon, 24 Jun 2024 23:11:43 -0700
Subject: [PATCH 02/19] Changed CallHashToBF representation
Created using spr 1.3.4
---
bolt/lib/Profile/YAMLProfileReader.cpp | 15 ++-
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a/bolt/lib/Profile/YAMLProfileReader.cpp
b/bolt/lib/Profile/YAMLProfileReader.cpp
index 1a0e5d239d252..91b01a99c7485 100644
--- a/bolt/lib/Profile/YAMLProfileReader.cpp
+++ b/bolt/lib/Profile/YAMLProfileReader.cpp
@@ -29,6 +29,10 @@ static llvm::cl::opt
cl::desc("ignore hash while reading function profile"),
cl::Hidden, cl::cat(BoltOptCategory));
+llvm::cl::opt MatchWithCallsAsAnchors("match-with-calls-as-anchors",
+ cl::desc("Matches with calls as anchors"),
+ cl::Hidden, cl::cat(BoltOptCategory));
+
llvm::cl::opt ProfileUseDFS("profile-use-dfs",
cl::desc("use DFS order for YAML profile"),
cl::Hidden, cl::cat(BoltOptCategory));
@@ -353,7 +357,7 @@ void YAMLProfileReader::matchWithCallsAsAnchors(
llvm_unreachable("Unhandled HashFunction");
};
- std::unordered_map CallHashToBF;
+ std::unordered_map CallHashToBF;
for (BinaryFunction *BF : BC.getAllBinaryFunctions()) {
if (ProfiledFunctions.count(BF))
@@ -375,12 +379,12 @@ void YAMLProfileReader::matchWithCallsAsAnchors(
for (const std::string &FunctionName : FunctionNames)
HashString.append(FunctionName);
}
-CallHashToBF.emplace(ComputeCallHash(HashString), BF);
+CallHashToBF[ComputeCallHash(HashString)] = BF;
}
std::unordered_map ProfiledFunctionIdToName;
- for (const yaml::bolt::BinaryFunctionProfile YamlBF : YamlBP.Functions)
+ for (const yaml::bolt::BinaryFunctionProfile &YamlBF : YamlBP.Functions)
ProfiledFunctionIdToName[YamlBF.Id] = YamlBF.Name;
for (yaml::bolt::BinaryFunctionProfile &YamlBF : YamlBP.Functions) {
@@ -401,7 +405,7 @@ void YAMLProfileReader::matchWithCallsAsAnchors(
auto It = CallHashToBF.find(Hash);
if (It == CallHashToBF.end())
continue;
-matchProfileToFunction(YamlBF, It->second);
+matchProfileToFunction(YamlBF, *It->second);
++MatchedWithCallsAsAnchors;
}
}
@@ -480,7 +484,8 @@ Error YAMLProfileReader::readProfile(BinaryContext &BC) {
matchProfileToFunction(YamlBF, *BF);
uint64_t MatchedWithCallsAsAnchors = 0;
- matchWithCallsAsAnchors(BC, MatchedWithCallsAsAnchors);
+ if (opts::MatchWithCallsAsAnchors)
+matchWithCallsAsAnchors(BC, MatchedWithCallsAsAnchors);
for (yaml::bolt::BinaryFunctionProfile &YamlBF : YamlBP.Functions)
if (!YamlBF.Used && opts::Verbosity >= 1)
>From ea7cb68ab9e8e158412c2e752986968968a60d93 Mon Sep 17 00:00:00 2001
From: shawbyoung
Date: Tue, 25 Jun 2024 09:28:39 -0700
Subject: [PATCH 03/19] Changed BF called FunctionNames to multiset
Created using spr 1.3.4
---
bolt/lib/Profile/YAMLProfileReader.cpp | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/bolt/lib/Profile/YAMLProfileReader.cpp
b/bolt/lib/Profile/YAMLProfileReader.cpp
index 91b01a99c7485..3b3d73f7af023 100644
--- a/bolt/lib/Profile/YAMLProfileReader.cpp
+++ b/bolt/lib/Profile/YAMLProfileReader.cpp
@@ -365,7 +365,7 @@ void YAMLProfileReader::matchWithCallsAsAnchors(
std::string HashString;
for (const auto &BB : BF->blocks()) {
- std::set FunctionNames;
+ std::multiset FunctionNames;
for (const MCInst &Instr : BB) {
// Skip non-call instructions.
if (!BC.MIB->isCall(Instr))
@@ -397,9 +397,8 @@ void YAMLProfileReader::matchWithCallsAsAnchors(
std::string &FunctionName = ProfiledFunctionIdToName[CallSite.DestId];
FunctionNames.insert(FunctionName);
[llvm-branch-commits] [clang] [clang][OpenMP] Remove compound directives from `checkNestingOfRegions` (PR #98387)
@@ -4828,26 +4835,28 @@ static bool checkNestingOfRegions(Sema &SemaRef, const
DSAStackTy *Stack,
<< (SemaRef.LangOpts.OpenMP >= 50 ? 1 : 0);
return CurrentRegion != OMPD_simd;
}
- if (ParentRegion == OMPD_atomic) {
+
+ if (EnclosingConstruct == OMPD_atomic) {
alexey-bataev wrote:
Remove extra empty line here and in other places
https://github.com/llvm/llvm-project/pull/98387
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [clang][OpenMP] Remove compound directives from `checkNestingOfRegions` (PR #98387)
@@ -4805,6 +4811,7 @@ static bool checkNestingOfRegions(Sema &SemaRef, const DSAStackTy *Stack, << getOpenMPDirectiveName(CurrentRegion); return true; } + alexey-bataev wrote: Remove this extra line https://github.com/llvm/llvm-project/pull/98387 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [compiler-rt] ccefcec - Revert "Revert "[compiler-rt] Remove redundant COMPILER_RT_HAS_*SAN checks" (…"
Author: Vitaly Buka
Date: 2024-07-10T14:33:59-07:00
New Revision: ccefcec4403ec838a62dd944a2a7bd51e061dddf
URL:
https://github.com/llvm/llvm-project/commit/ccefcec4403ec838a62dd944a2a7bd51e061dddf
DIFF:
https://github.com/llvm/llvm-project/commit/ccefcec4403ec838a62dd944a2a7bd51e061dddf.diff
LOG: Revert "Revert "[compiler-rt] Remove redundant COMPILER_RT_HAS_*SAN
checks" (…"
This reverts commit 145ae81fa4ee55ccb31928109d72166b7c71b831.
Added:
Modified:
compiler-rt/lib/CMakeLists.txt
compiler-rt/lib/gwp_asan/CMakeLists.txt
compiler-rt/lib/lsan/CMakeLists.txt
compiler-rt/lib/nsan/CMakeLists.txt
compiler-rt/lib/scudo/standalone/CMakeLists.txt
compiler-rt/lib/scudo/standalone/tests/CMakeLists.txt
compiler-rt/lib/ubsan/CMakeLists.txt
compiler-rt/lib/ubsan_minimal/CMakeLists.txt
compiler-rt/test/cfi/CMakeLists.txt
compiler-rt/test/gwp_asan/CMakeLists.txt
compiler-rt/test/orc/CMakeLists.txt
compiler-rt/test/rtsan/CMakeLists.txt
compiler-rt/test/scudo/standalone/CMakeLists.txt
compiler-rt/test/xray/CMakeLists.txt
Removed:
diff --git a/compiler-rt/lib/CMakeLists.txt b/compiler-rt/lib/CMakeLists.txt
index f9e96563b8809..73a2ee46291ee 100644
--- a/compiler-rt/lib/CMakeLists.txt
+++ b/compiler-rt/lib/CMakeLists.txt
@@ -47,11 +47,11 @@ if(COMPILER_RT_BUILD_SANITIZERS)
endforeach()
endif()
-if(COMPILER_RT_BUILD_PROFILE AND COMPILER_RT_HAS_PROFILE)
+if(COMPILER_RT_BUILD_PROFILE)
compiler_rt_build_runtime(profile)
endif()
-if(COMPILER_RT_BUILD_CTX_PROFILE AND COMPILER_RT_HAS_CTX_PROFILE)
+if(COMPILER_RT_BUILD_CTX_PROFILE)
compiler_rt_build_runtime(ctx_profile)
endif()
diff --git a/compiler-rt/lib/gwp_asan/CMakeLists.txt
b/compiler-rt/lib/gwp_asan/CMakeLists.txt
index bb5b2902f99db..fdb6a95fe1404 100644
--- a/compiler-rt/lib/gwp_asan/CMakeLists.txt
+++ b/compiler-rt/lib/gwp_asan/CMakeLists.txt
@@ -65,48 +65,46 @@ set(GWP_ASAN_SEGV_HANDLER_HEADERS
set(GWP_ASAN_OPTIONS_PARSER_CFLAGS
${GWP_ASAN_CFLAGS})
-if (COMPILER_RT_HAS_GWP_ASAN)
- foreach(arch ${GWP_ASAN_SUPPORTED_ARCH})
-add_compiler_rt_runtime(
- clang_rt.gwp_asan
- STATIC
- ARCHS ${arch}
- SOURCES ${GWP_ASAN_SOURCES}
- ADDITIONAL_HEADERS ${GWP_ASAN_HEADERS}
- CFLAGS ${GWP_ASAN_CFLAGS}
- PARENT_TARGET gwp_asan
-)
- endforeach()
+foreach(arch ${GWP_ASAN_SUPPORTED_ARCH})
+ add_compiler_rt_runtime(
+clang_rt.gwp_asan
+STATIC
+ARCHS ${arch}
+SOURCES ${GWP_ASAN_SOURCES}
+ADDITIONAL_HEADERS ${GWP_ASAN_HEADERS}
+CFLAGS ${GWP_ASAN_CFLAGS}
+PARENT_TARGET gwp_asan
+ )
+endforeach()
- add_compiler_rt_object_libraries(RTGwpAsan
- ARCHS ${GWP_ASAN_SUPPORTED_ARCH}
- SOURCES ${GWP_ASAN_SOURCES}
- ADDITIONAL_HEADERS ${GWP_ASAN_HEADERS}
- CFLAGS ${GWP_ASAN_CFLAGS})
+add_compiler_rt_object_libraries(RTGwpAsan
+ARCHS ${GWP_ASAN_SUPPORTED_ARCH}
+SOURCES ${GWP_ASAN_SOURCES}
+ADDITIONAL_HEADERS ${GWP_ASAN_HEADERS}
+CFLAGS ${GWP_ASAN_CFLAGS})
- add_compiler_rt_object_libraries(RTGwpAsanOptionsParser
- ARCHS ${GWP_ASAN_SUPPORTED_ARCH}
- SOURCES ${GWP_ASAN_OPTIONS_PARSER_SOURCES}
- ADDITIONAL_HEADERS ${GWP_ASAN_OPTIONS_PARSER_HEADERS}
- CFLAGS ${GWP_ASAN_OPTIONS_PARSER_CFLAGS})
+add_compiler_rt_object_libraries(RTGwpAsanOptionsParser
+ARCHS ${GWP_ASAN_SUPPORTED_ARCH}
+SOURCES ${GWP_ASAN_OPTIONS_PARSER_SOURCES}
+ADDITIONAL_HEADERS ${GWP_ASAN_OPTIONS_PARSER_HEADERS}
+CFLAGS ${GWP_ASAN_OPTIONS_PARSER_CFLAGS})
- # As above, build the pre-implemented optional backtrace support libraries.
- add_compiler_rt_object_libraries(RTGwpAsanBacktraceLibc
- ARCHS ${GWP_ASAN_SUPPORTED_ARCH}
- SOURCES optional/backtrace_linux_libc.cpp
- ADDITIONAL_HEADERS ${GWP_ASAN_BACKTRACE_HEADERS}
- CFLAGS ${GWP_ASAN_CFLAGS})
- add_compiler_rt_object_libraries(RTGwpAsanSegvHandler
- ARCHS ${GWP_ASAN_SUPPORTED_ARCH}
- SOURCES optional/segv_handler_posix.cpp
- ADDITIONAL_HEADERS ${GWP_ASAN_SEGV_HANDLER_HEADERS}
- CFLAGS ${GWP_ASAN_CFLAGS})
- add_compiler_rt_object_libraries(RTGwpAsanBacktraceSanitizerCommon
- ARCHS ${GWP_ASAN_SUPPORTED_ARCH}
- SOURCES optional/backtrace_sanitizer_common.cpp
- ADDITIONAL_HEADERS ${GWP_ASAN_BACKTRACE_HEADERS}
- CFLAGS ${GWP_ASAN_CFLAGS} ${SANITIZER_COMMON_CFLAGS})
-endif()
+# As above, build the pre-implemented optional backtrace support libraries.
+add_compiler_rt_object_libraries(RTGwpAsanBacktraceLibc
+ARCHS ${GWP_ASAN_SUPPORTED_ARCH}
+SOURCES optional/backtrace_linux_libc.cpp
+ADDITIONAL_HEADERS ${GWP_ASAN_BACKTRACE_HEADERS}
+CFLAGS ${GWP_ASAN_CFLAGS})
+add_compiler_rt_object_libraries(RTGwpAsanSegvHandler
+ARCHS ${GWP_ASAN_SUPPORTED_ARCH}
+SOURCES optional/segv_handler_posix.cpp
+ADDITIONAL_HEADERS ${GWP_ASAN_SEGV_HANDLER_HEADERS}
+CFLAGS ${GWP_ASAN_CFLAG
[llvm-branch-commits] [llvm] [BOLT] Match blocks with calls as anchors (PR #96596)
https://github.com/aaupov approved this pull request. https://github.com/llvm/llvm-project/pull/96596 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] 88144b6 - Revert "[RISCV] Expand vp.stride.load to splat of a scalar load. (#98140)"
Author: Nico Weber
Date: 2024-07-10T20:54:15-04:00
New Revision: 88144b639d4c256e0540ae2754321a487528c77c
URL:
https://github.com/llvm/llvm-project/commit/88144b639d4c256e0540ae2754321a487528c77c
DIFF:
https://github.com/llvm/llvm-project/commit/88144b639d4c256e0540ae2754321a487528c77c.diff
LOG: Revert "[RISCV] Expand vp.stride.load to splat of a scalar load. (#98140)"
This reverts commit cda245a339da2857406e288e0a11e8f9794ca4c4.
Added:
Modified:
llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-vpload.ll
llvm/test/CodeGen/RISCV/rvv/strided-vpload.ll
Removed:
diff --git a/llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp
b/llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp
index 10e0496f16d4f..6e0f429c34b2f 100644
--- a/llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp
+++ b/llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp
@@ -18,11 +18,9 @@
#include "llvm/ADT/Statistic.h"
#include "llvm/Analysis/ValueTracking.h"
#include "llvm/CodeGen/TargetPassConfig.h"
-#include "llvm/IR/Dominators.h"
#include "llvm/IR/IRBuilder.h"
#include "llvm/IR/InstVisitor.h"
#include "llvm/IR/Intrinsics.h"
-#include "llvm/IR/IntrinsicsRISCV.h"
#include "llvm/IR/PatternMatch.h"
#include "llvm/InitializePasses.h"
#include "llvm/Pass.h"
@@ -37,7 +35,6 @@ namespace {
class RISCVCodeGenPrepare : public FunctionPass,
public InstVisitor {
const DataLayout *DL;
- const DominatorTree *DT;
const RISCVSubtarget *ST;
public:
@@ -51,14 +48,12 @@ class RISCVCodeGenPrepare : public FunctionPass,
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesCFG();
-AU.addRequired();
AU.addRequired();
}
bool visitInstruction(Instruction &I) { return false; }
bool visitAnd(BinaryOperator &BO);
bool visitIntrinsicInst(IntrinsicInst &I);
- bool expandVPStrideLoad(IntrinsicInst &I);
};
} // end anonymous namespace
@@ -133,9 +128,6 @@ bool RISCVCodeGenPrepare::visitAnd(BinaryOperator &BO) {
// Which eliminates the scalar -> vector -> scalar crossing during instruction
// selection.
bool RISCVCodeGenPrepare::visitIntrinsicInst(IntrinsicInst &I) {
- if (expandVPStrideLoad(I))
-return true;
-
if (I.getIntrinsicID() != Intrinsic::vector_reduce_fadd)
return false;
@@ -163,47 +155,6 @@ bool RISCVCodeGenPrepare::visitIntrinsicInst(IntrinsicInst
&I) {
return true;
}
-bool RISCVCodeGenPrepare::expandVPStrideLoad(IntrinsicInst &II) {
- if (ST->hasOptimizedZeroStrideLoad())
-return false;
-
- Value *BasePtr, *VL;
- using namespace PatternMatch;
- if (!match(&II, m_Intrinsic(
- m_Value(BasePtr), m_Zero(), m_AllOnes(), m_Value(VL
-return false;
-
- if (!isKnownNonZero(VL, {*DL, DT, nullptr, &II}))
-return false;
-
- auto *VTy = cast(II.getType());
-
- IRBuilder<> Builder(&II);
-
- // Extend VL from i32 to XLen if needed.
- if (ST->is64Bit())
-VL = Builder.CreateZExt(VL, Builder.getInt64Ty());
-
- Type *STy = VTy->getElementType();
- Value *Val = Builder.CreateLoad(STy, BasePtr);
- const auto &TLI = *ST->getTargetLowering();
- Value *Res;
-
- // TODO: Also support fixed/illegal vector types to splat with evl = vl.
- if (isa(VTy) && TLI.isTypeLegal(EVT::getEVT(VTy))) {
-unsigned VMVOp = STy->isFloatingPointTy() ? Intrinsic::riscv_vfmv_v_f
- : Intrinsic::riscv_vmv_v_x;
-Res = Builder.CreateIntrinsic(VMVOp, {VTy, VL->getType()},
- {PoisonValue::get(VTy), Val, VL});
- } else {
-Res = Builder.CreateVectorSplat(VTy->getElementCount(), Val);
- }
-
- II.replaceAllUsesWith(Res);
- II.eraseFromParent();
- return true;
-}
-
bool RISCVCodeGenPrepare::runOnFunction(Function &F) {
if (skipFunction(F))
return false;
@@ -213,7 +164,6 @@ bool RISCVCodeGenPrepare::runOnFunction(Function &F) {
ST = &TM.getSubtarget(F);
DL = &F.getDataLayout();
- DT = &getAnalysis().getDomTree();
bool MadeChange = false;
for (auto &BB : F)
diff --git a/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-vpload.ll
b/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-vpload.ll
index 86359043a90d9..5e64e9fbc1a2f 100644
--- a/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-vpload.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-vpload.ll
@@ -1,16 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv32 -mattr=+m,+d,+zfh,+v,+zvfh \
-; RUN: -verify-machineinstrs < %s | FileCheck %s \
-; RUN: -check-prefixes=CHECK,CHECK-RV32
+; RUN: -verify-machineinstrs < %s \
+; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-RV32
; RUN: llc -mtriple=riscv64 -mattr=+m,+d,+zfh,+v,+zvfh \
-; RUN: -verify-machineinstrs < %s | FileCheck %s \
-; RUN: -check-prefixes=CHECK,CHECK-RV64,CHECK-OPT
-;
[llvm-branch-commits] [llvm] [SPARC][IAS] Reject unknown/unavailable mnemonics early in ParseInstruction (PR #96021)
koachan wrote: Merging this for now, but to clarify a little: > The downside of this approach is that you lose the ability to report the > missing features (unless you implement it yourself, which would be a code > duplication), that would allow to produce better diagnostics like > "instruction requires: LeonCASA". It seems that there are no autogenerated and/or common functions that can report what is exactly the missing feature. A quick look at the other backends also shows that the ones that do support reporting that implements it by themselves (unless I'm missing something here?). > Also, sometimes a mnemonic is valid in both modes, but certain operand > combinations are only allowed in V9, e.g. swapa with r+i addressing mode. In > this case you still rely on MatchOperandParserImpl & MatchInstructionImpl, > which can produce different / broken diagnostics. Yeah, this is what is bugging me too. As far as I understand it, MatchInstructionImpl is only called at the very end of the process, after all the operands have been parsed. On the other hand, since some operand combinations are only allowed in V9, operand parsing can fail early. So this is what will happen when parsing, say, a prefetcha with r+i addressing mode when targeting V8 (e.g. `prefetcha [%i1+1] %asi, 2`, invalid instruction with invalid operand): 1. MatchOperandParserImpl is called. This will return a NoMatch[1], which will cause IAS to continue to the generic matcher in parseOperand... 2. Which then fails because the `%asi` token in the r+i addressing isn't recognized in V8 mode. In the end the error that will go out is one from the operand check, instead of the mnemonic check - since IAS haven't gotten far enough to reach MatchInstructionImpl yet - unless there is a way to defer the error from the operand check until just after MatchInstructionImpl is done (is it possible?). Rejecting the mnemonic early should be okay since by the time IAS reaches MatchOperandParserImpl/MatchInstructionImpl we are already sure that we have a valid mnemonic, and any other errors that is going to be raised won't be related to mnemonics. On cases like `swapa` the mnemonic check will succeed either way, so it is up to the operand checks to decide whether the full instruction makes sense for a given ISA or not. [1] MatchOperandParserImpl return value does not differentiate between unavailable mnemonic, unknown mnemonic, or not being able to find a custom parser, so in all three cases parseOperand will just fall through to the generic matcher, so at least in this particular case there is no difference between ParseForAllFeatures being enabled or not. https://github.com/llvm/llvm-project/pull/96021 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] 9a74d06 - Revert "[NFC][Clang] Move functions of BranchProtectionInfo out of line (#98329)"
Author: Daniel Kiss
Date: 2024-07-11T08:37:25+02:00
New Revision: 9a74d0613287e7ae86c305b0250e188e3c3de6c3
URL:
https://github.com/llvm/llvm-project/commit/9a74d0613287e7ae86c305b0250e188e3c3de6c3
DIFF:
https://github.com/llvm/llvm-project/commit/9a74d0613287e7ae86c305b0250e188e3c3de6c3.diff
LOG: Revert "[NFC][Clang] Move functions of BranchProtectionInfo out of line
(#98329)"
This reverts commit 4710e0f498cb661ca17c99cb174616102fcad923.
Added:
Modified:
clang/include/clang/Basic/TargetInfo.h
clang/lib/Basic/TargetInfo.cpp
Removed:
diff --git a/clang/include/clang/Basic/TargetInfo.h
b/clang/include/clang/Basic/TargetInfo.h
index 6afa354353e3c..cf7628553647c 100644
--- a/clang/include/clang/Basic/TargetInfo.h
+++ b/clang/include/clang/Basic/TargetInfo.h
@@ -32,7 +32,9 @@
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/StringSet.h"
#include "llvm/Frontend/OpenMP/OMPGridValues.h"
+#include "llvm/IR/Attributes.h"
#include "llvm/IR/DerivedTypes.h"
+#include "llvm/IR/Function.h"
#include "llvm/Support/DataTypes.h"
#include "llvm/Support/Error.h"
#include "llvm/Support/VersionTuple.h"
@@ -45,8 +47,6 @@
namespace llvm {
struct fltSemantics;
-class Function;
-class AttrBuilder;
}
namespace clang {
@@ -1455,9 +1455,24 @@ class TargetInfo : public TransferrableTargetInfo,
GuardedControlStack = LangOpts.GuardedControlStack;
}
-void setFnAttributes(llvm::Function &F) const;
+void setFnAttributes(llvm::Function &F) {
+ llvm::AttrBuilder FuncAttrs(F.getContext());
+ setFnAttributes(FuncAttrs);
+ F.addFnAttrs(FuncAttrs);
+}
-void setFnAttributes(llvm::AttrBuilder &FuncAttrs) const;
+void setFnAttributes(llvm::AttrBuilder &FuncAttrs) {
+ if (SignReturnAddr != LangOptions::SignReturnAddressScopeKind::None) {
+FuncAttrs.addAttribute("sign-return-address", getSignReturnAddrStr());
+FuncAttrs.addAttribute("sign-return-address-key", getSignKeyStr());
+ }
+ if (BranchTargetEnforcement)
+FuncAttrs.addAttribute("branch-target-enforcement");
+ if (BranchProtectionPAuthLR)
+FuncAttrs.addAttribute("branch-protection-pauth-lr");
+ if (GuardedControlStack)
+FuncAttrs.addAttribute("guarded-control-stack");
+}
};
/// Determine if the Architecture in this TargetInfo supports branch
diff --git a/clang/lib/Basic/TargetInfo.cpp b/clang/lib/Basic/TargetInfo.cpp
index cc4b79b4334af..29f5cd14e46e1 100644
--- a/clang/lib/Basic/TargetInfo.cpp
+++ b/clang/lib/Basic/TargetInfo.cpp
@@ -18,7 +18,6 @@
#include "clang/Basic/LangOptions.h"
#include "llvm/ADT/APFloat.h"
#include "llvm/ADT/STLExtras.h"
-#include "llvm/IR/Function.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/TargetParser/TargetParser.h"
#include
@@ -1006,24 +1005,3 @@ void TargetInfo::copyAuxTarget(const TargetInfo *Aux) {
auto *Src = static_cast(Aux);
*Target = *Src;
}
-
-void TargetInfo::BranchProtectionInfo::setFnAttributes(
-llvm::Function &F) const {
- llvm::AttrBuilder FuncAttrs(F.getContext());
- setFnAttributes(FuncAttrs);
- F.addFnAttrs(FuncAttrs);
-}
-
-void TargetInfo::BranchProtectionInfo::setFnAttributes(
-llvm::AttrBuilder &FuncAttrs) const {
- if (SignReturnAddr != LangOptions::SignReturnAddressScopeKind::None) {
-FuncAttrs.addAttribute("sign-return-address", getSignReturnAddrStr());
-FuncAttrs.addAttribute("sign-return-address-key", getSignKeyStr());
- }
- if (BranchTargetEnforcement)
-FuncAttrs.addAttribute("branch-target-enforcement");
- if (BranchProtectionPAuthLR)
-FuncAttrs.addAttribute("branch-protection-pauth-lr");
- if (GuardedControlStack)
-FuncAttrs.addAttribute("guarded-control-stack");
-}
___
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