[llvm-branch-commits] [llvm] a95397a - Revert "Revert "[ThinLTO][Bitcode] Generate import type in bitcode (#87600)" …"
Author: Mingming Liu
Date: 2024-06-30T13:58:08-07:00
New Revision: a95397ae79dac4e2af79356b2089e279a899e493
URL:
https://github.com/llvm/llvm-project/commit/a95397ae79dac4e2af79356b2089e279a899e493
DIFF:
https://github.com/llvm/llvm-project/commit/a95397ae79dac4e2af79356b2089e279a899e493.diff
LOG: Revert "Revert "[ThinLTO][Bitcode] Generate import type in bitcode
(#87600)" …"
This reverts commit 53061eecdbd9ffc77a43f85b6c4e145a242a27a4.
Added:
Modified:
llvm/include/llvm/Bitcode/BitcodeWriter.h
llvm/include/llvm/LTO/legacy/ThinLTOCodeGenerator.h
llvm/include/llvm/Transforms/IPO/FunctionImport.h
llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
llvm/lib/LTO/LTO.cpp
llvm/lib/LTO/ThinLTOCodeGenerator.cpp
llvm/lib/Transforms/IPO/FunctionImport.cpp
llvm/test/ThinLTO/X86/import_callee_declaration.ll
llvm/tools/llvm-lto/llvm-lto.cpp
Removed:
diff --git a/llvm/include/llvm/Bitcode/BitcodeWriter.h
b/llvm/include/llvm/Bitcode/BitcodeWriter.h
index 57551b6937f32..770e249290c3c 100644
--- a/llvm/include/llvm/Bitcode/BitcodeWriter.h
+++ b/llvm/include/llvm/Bitcode/BitcodeWriter.h
@@ -102,7 +102,8 @@ class BitcodeWriter {
void writeIndex(
const ModuleSummaryIndex *Index,
- const std::map *ModuleToSummariesForIndex);
+ const std::map *ModuleToSummariesForIndex,
+ const GVSummaryPtrSet *DecSummaries);
};
/// Write the specified module to the specified raw output stream.
@@ -147,10 +148,12 @@ void writeThinLinkBitcodeToFile(const Module &M,
raw_ostream &Out,
/// where it will be written in a new bitcode block. This is used when
/// writing the combined index file for ThinLTO. When writing a subset of the
/// index for a distributed backend, provide the \p ModuleToSummariesForIndex
-/// map.
+/// map. \p DecSummaries specifies the set of summaries for which the
+/// corresponding value should be imported as a declaration (prototype).
void writeIndexToFile(const ModuleSummaryIndex &Index, raw_ostream &Out,
const std::map
- *ModuleToSummariesForIndex = nullptr);
+ *ModuleToSummariesForIndex = nullptr,
+ const GVSummaryPtrSet *DecSummaries = nullptr);
/// If EmbedBitcode is set, save a copy of the llvm IR as data in the
/// __LLVM,__bitcode section (.llvmbc on non-MacOS).
diff --git a/llvm/include/llvm/LTO/legacy/ThinLTOCodeGenerator.h
b/llvm/include/llvm/LTO/legacy/ThinLTOCodeGenerator.h
index c450acda82ad0..f1337e82485c9 100644
--- a/llvm/include/llvm/LTO/legacy/ThinLTOCodeGenerator.h
+++ b/llvm/include/llvm/LTO/legacy/ThinLTOCodeGenerator.h
@@ -271,12 +271,13 @@ class ThinLTOCodeGenerator {
const lto::InputFile &File);
/**
- * Compute the list of summaries needed for importing into module.
+ * Compute the list of summaries and the subset of declaration summaries
+ * needed for importing into module.
*/
void gatherImportedSummariesForModule(
Module &Module, ModuleSummaryIndex &Index,
std::map &ModuleToSummariesForIndex,
- const lto::InputFile &File);
+ GVSummaryPtrSet &DecSummaries, const lto::InputFile &File);
/**
* Perform internalization. Index is updated to reflect linkage changes.
diff --git a/llvm/include/llvm/Transforms/IPO/FunctionImport.h
b/llvm/include/llvm/Transforms/IPO/FunctionImport.h
index d8c142ec89d82..419d75c7afb16 100644
--- a/llvm/include/llvm/Transforms/IPO/FunctionImport.h
+++ b/llvm/include/llvm/Transforms/IPO/FunctionImport.h
@@ -217,11 +217,15 @@ bool convertToDeclaration(GlobalValue &GV);
/// \p ModuleToSummariesForIndex will be populated with the needed summaries
/// from each required module path. Use a std::map instead of StringMap to get
/// stable order for bitcode emission.
+///
+/// \p DecSummaries will be popluated with the subset of of summary pointers
+/// that have 'declaration' import type among all summaries the module need.
void gatherImportedSummariesForModule(
StringRef ModulePath,
const DenseMap &ModuleToDefinedGVSummaries,
const FunctionImporter::ImportMapTy &ImportList,
-std::map &ModuleToSummariesForIndex);
+std::map &ModuleToSummariesForIndex,
+GVSummaryPtrSet &DecSummaries);
/// Emit into \p OutputFilename the files module \p ModulePath will import
from.
std::error_code EmitImportsFiles(
diff --git a/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
b/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
index 7a228fb6c08b9..e6c27af4e79c8 100644
--- a/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
+++ b/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
@@ -425,6 +425,11 @@ class IndexBitcodeWriter : public BitcodeWriterBase {
/// The combined index to write to bitcode.
const ModuleSummaryIndex &Index;
+ /// When writing combined summaries, provides the set of global value
+ /// summaries for which the value (functi
[llvm-branch-commits] [llvm] DAG: Call SimplifyDemandedBits on copysign value operand (PR #97180)
https://github.com/RKSimon approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/97180 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] 4beed3f - Revert "[MachinePipeliner] Fix constraints aren't considered in certain cases…"
Author: Ryotaro KASUGA
Date: 2024-07-01T10:13:35+09:00
New Revision: 4beed3ff573e195033450f4082868d95859c3d3c
URL:
https://github.com/llvm/llvm-project/commit/4beed3ff573e195033450f4082868d95859c3d3c
DIFF:
https://github.com/llvm/llvm-project/commit/4beed3ff573e195033450f4082868d95859c3d3c.diff
LOG: Revert "[MachinePipeliner] Fix constraints aren't considered in certain
cases…"
This reverts commit e19ac0dcfd7357161210f157ed0559836e88155f.
Added:
Modified:
llvm/include/llvm/CodeGen/MachinePipeliner.h
llvm/lib/CodeGen/MachinePipeliner.cpp
Removed:
llvm/test/CodeGen/AArch64/sms-instruction-scheduled-at-correct-cycle.mir
diff --git a/llvm/include/llvm/CodeGen/MachinePipeliner.h
b/llvm/include/llvm/CodeGen/MachinePipeliner.h
index 7fe5581faa183..94913f534fb77 100644
--- a/llvm/include/llvm/CodeGen/MachinePipeliner.h
+++ b/llvm/include/llvm/CodeGen/MachinePipeliner.h
@@ -599,8 +599,8 @@ class SMSchedule {
/// chain.
int latestCycleInChain(const SDep &Dep);
- void computeStart(SUnit *SU, int *MaxEarlyStart, int *MinLateStart, int II,
-SwingSchedulerDAG *DAG);
+ void computeStart(SUnit *SU, int *MaxEarlyStart, int *MinLateStart,
+int *MinEnd, int *MaxStart, int II, SwingSchedulerDAG
*DAG);
bool insert(SUnit *SU, int StartCycle, int EndCycle, int II);
/// Iterators for the cycle to instruction map.
@@ -658,9 +658,6 @@ class SMSchedule {
bool isLoopCarried(const SwingSchedulerDAG *SSD, MachineInstr &Phi) const;
bool isLoopCarriedDefOfUse(const SwingSchedulerDAG *SSD, MachineInstr *Def,
MachineOperand &MO) const;
-
- bool onlyHasLoopCarriedOutputOrOrderPreds(SUnit *SU,
-SwingSchedulerDAG *DAG) const;
void print(raw_ostream &os) const;
void dump() const;
};
diff --git a/llvm/lib/CodeGen/MachinePipeliner.cpp
b/llvm/lib/CodeGen/MachinePipeliner.cpp
index 515c7f89b4bed..7ff14a6cf36bf 100644
--- a/llvm/lib/CodeGen/MachinePipeliner.cpp
+++ b/llvm/lib/CodeGen/MachinePipeliner.cpp
@@ -2461,43 +2461,47 @@ bool SwingSchedulerDAG::schedulePipeline(SMSchedule
&Schedule) {
// upon the scheduled time for any predecessors/successors.
int EarlyStart = INT_MIN;
int LateStart = INT_MAX;
- Schedule.computeStart(SU, &EarlyStart, &LateStart, II, this);
+ // These values are set when the size of the schedule window is limited
+ // due to chain dependences.
+ int SchedEnd = INT_MAX;
+ int SchedStart = INT_MIN;
+ Schedule.computeStart(SU, &EarlyStart, &LateStart, &SchedEnd,
&SchedStart,
+II, this);
LLVM_DEBUG({
dbgs() << "\n";
dbgs() << "Inst (" << SU->NodeNum << ") ";
SU->getInstr()->dump();
dbgs() << "\n";
});
- LLVM_DEBUG(
- dbgs() << format("\tes: %8x ls: %8x\n", EarlyStart, LateStart));
+ LLVM_DEBUG({
+dbgs() << format("\tes: %8x ls: %8x me: %8x ms: %8x\n", EarlyStart,
+ LateStart, SchedEnd, SchedStart);
+ });
- if (EarlyStart > LateStart)
+ if (EarlyStart > LateStart || SchedEnd < EarlyStart ||
+ SchedStart > LateStart)
scheduleFound = false;
- else if (EarlyStart != INT_MIN && LateStart == INT_MAX)
-scheduleFound =
-Schedule.insert(SU, EarlyStart, EarlyStart + (int)II - 1, II);
- else if (EarlyStart == INT_MIN && LateStart != INT_MAX)
-scheduleFound =
-Schedule.insert(SU, LateStart, LateStart - (int)II + 1, II);
- else if (EarlyStart != INT_MIN && LateStart != INT_MAX) {
-LateStart = std::min(LateStart, EarlyStart + (int)II - 1);
-// When scheduling a Phi it is better to start at the late cycle and
-// go backwards. The default order may insert the Phi too far away
-// from its first dependence.
-// Also, do backward search when all scheduled predecessors are
-// loop-carried output/order dependencies. Empirically, there are also
-// cases where scheduling becomes possible with backward search.
-if (SU->getInstr()->isPHI() ||
-Schedule.onlyHasLoopCarriedOutputOrOrderPreds(SU, this))
- scheduleFound = Schedule.insert(SU, LateStart, EarlyStart, II);
+ else if (EarlyStart != INT_MIN && LateStart == INT_MAX) {
+SchedEnd = std::min(SchedEnd, EarlyStart + (int)II - 1);
+scheduleFound = Schedule.insert(SU, EarlyStart, SchedEnd, II);
+ } else if (EarlyStart == INT_MIN && LateStart != INT_MAX) {
+SchedStart = std::max(SchedStart, LateStart - (int)II + 1);
+scheduleFound = Schedule.insert(SU, LateStart, SchedStart, II);
+ } else if (EarlyStart != INT_MIN && LateStart != INT_MAX) {
+SchedEnd =
+std::min(SchedEnd, std::min(LateStart, EarlyStart + (int)II - 1));
+
[llvm-branch-commits] [lldb] 7e4a2ec - Revert "[lldb] Parse and display register field enums (#95768)"
Author: David Spickett
Date: 2024-07-01T07:45:18+01:00
New Revision: 7e4a2ec169290640c2f16811bae9e1ad82ba2c5f
URL:
https://github.com/llvm/llvm-project/commit/7e4a2ec169290640c2f16811bae9e1ad82ba2c5f
DIFF:
https://github.com/llvm/llvm-project/commit/7e4a2ec169290640c2f16811bae9e1ad82ba2c5f.diff
LOG: Revert "[lldb] Parse and display register field enums (#95768)"
This reverts commit ba60d8a11af2cdd7e80e2fd968cdf52adcabf5a1.
Added:
Modified:
lldb/include/lldb/Target/RegisterFlags.h
lldb/source/Core/DumpRegisterInfo.cpp
lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h
lldb/source/Plugins/RegisterTypeBuilder/RegisterTypeBuilderClang.cpp
lldb/source/Target/RegisterFlags.cpp
lldb/test/API/functionalities/gdb_remote_client/TestXMLRegisterFlags.py
lldb/unittests/Core/DumpRegisterInfoTest.cpp
Removed:
diff --git a/lldb/include/lldb/Target/RegisterFlags.h
b/lldb/include/lldb/Target/RegisterFlags.h
index 1250fd0330958..1112972cf72e1 100644
--- a/lldb/include/lldb/Target/RegisterFlags.h
+++ b/lldb/include/lldb/Target/RegisterFlags.h
@@ -32,15 +32,10 @@ class FieldEnum {
: m_value(value), m_name(std::move(name)) {}
void ToXML(Stream &strm) const;
-
-void DumpToLog(Log *log) const;
};
typedef std::vector Enumerators;
- // GDB also includes a "size" that is the size of the underlying register.
- // We will not store that here but instead use the size of the register
- // this gets attached to when emitting XML.
FieldEnum(std::string id, const Enumerators &enumerators);
const Enumerators &GetEnumerators() const { return m_enumerators; }
@@ -49,8 +44,6 @@ class FieldEnum {
void ToXML(Stream &strm, unsigned size) const;
- void DumpToLog(Log *log) const;
-
private:
std::string m_id;
Enumerators m_enumerators;
diff --git a/lldb/source/Core/DumpRegisterInfo.cpp
b/lldb/source/Core/DumpRegisterInfo.cpp
index eccc6784cd497..8334795416902 100644
--- a/lldb/source/Core/DumpRegisterInfo.cpp
+++ b/lldb/source/Core/DumpRegisterInfo.cpp
@@ -111,11 +111,6 @@ void lldb_private::DoDumpRegisterInfo(
};
DumpList(strm, "In sets: ", in_sets, emit_set);
- if (flags_type) {
+ if (flags_type)
strm.Printf("\n\n%s", flags_type->AsTable(terminal_width).c_str());
-
-std::string enumerators = flags_type->DumpEnums(terminal_width);
-if (enumerators.size())
- strm << "\n\n" << enumerators;
- }
}
diff --git a/lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
b/lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
index 604c92369e9a2..060a30abee83e 100644
--- a/lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
+++ b/lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
@@ -4179,134 +4179,21 @@ struct GdbServerTargetInfo {
RegisterSetMap reg_set_map;
};
-static FieldEnum::Enumerators ParseEnumEvalues(const XMLNode &enum_node) {
- Log *log(GetLog(GDBRLog::Process));
- // We will use the last instance of each value. Also we preserve the order
- // of declaration in the XML, as it may not be numerical.
- // For example, hardware may intially release with two states that softwware
- // can read from a register field:
- // 0 = startup, 1 = running
- // If in a future hardware release, the designers added a pre-startup state:
- // 0 = startup, 1 = running, 2 = pre-startup
- // Now it makes more sense to list them in this logical order as opposed to
- // numerical order:
- // 2 = pre-startup, 1 = startup, 0 = startup
- // This only matters for "register info" but let's trust what the server
- // chose regardless.
- std::map enumerators;
-
- enum_node.ForEachChildElementWithName(
- "evalue", [&enumerators, &log](const XMLNode &enumerator_node) {
-std::optional name;
-std::optional value;
-
-enumerator_node.ForEachAttribute(
-[&name, &value, &log](const llvm::StringRef &attr_name,
- const llvm::StringRef &attr_value) {
- if (attr_name == "name") {
-if (attr_value.size())
- name = attr_value;
-else
- LLDB_LOG(log, "ProcessGDBRemote::ParseEnumEvalues "
-"Ignoring empty name in evalue");
- } else if (attr_name == "value") {
-uint64_t parsed_value = 0;
-if (llvm::to_integer(attr_value, parsed_value))
- value = parsed_value;
-else
- LLDB_LOG(log,
- "ProcessGDBRemote::ParseEnumEvalues "
- "Invalid value \"{0}\" in "
- "evalue",
- attr_value.data());
- } else
-LLDB_LOG(log,
- "ProcessGDBRemot
