[llvm-branch-commits] [clang] release/18.x: [clang-format] Don't always break before << between str… (PR #94091)
https://github.com/mydeveloperday approved this pull request. https://github.com/llvm/llvm-project/pull/94091 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] release/18.x: [clang-format] Don't always break before << between str… (PR #94091)
owenca wrote: @tstellar can we also get this one into 18.1.7? https://github.com/llvm/llvm-project/pull/94091 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [clang] Implement pointer authentication for C++ virtual functions, v-tables, and VTTs (PR #94056)
https://github.com/ojhunt ready_for_review https://github.com/llvm/llvm-project/pull/94056 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [clang] Implement pointer authentication for C++ virtual functions, v-tables, and VTTs (PR #94056)
llvmbot wrote: @llvm/pr-subscribers-clang-codegen Author: Oliver Hunt (ojhunt) Changes --- Patch is 245.54 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/94056.diff 53 Files Affected: - (modified) clang/include/clang/AST/ASTContext.h (+13) - (modified) clang/include/clang/AST/GlobalDecl.h (+4) - (modified) clang/include/clang/AST/Mangle.h (+5-6) - (modified) clang/include/clang/AST/VTableBuilder.h (+29) - (modified) clang/include/clang/Basic/Attr.td (+29) - (modified) clang/include/clang/Basic/DiagnosticSemaKinds.td (+31) - (modified) clang/include/clang/Basic/PointerAuthOptions.h (+25) - (modified) clang/include/clang/Basic/Thunk.h (+10-3) - (modified) clang/include/clang/CodeGen/CodeGenABITypes.h (+4) - (modified) clang/include/clang/CodeGen/ConstantInitBuilder.h (+15-1) - (modified) clang/include/clang/InstallAPI/Visitor.h (+2-2) - (modified) clang/include/clang/Sema/Sema.h (+4) - (modified) clang/lib/AST/ASTContext.cpp (+86) - (modified) clang/lib/AST/ItaniumMangle.cpp (+70-7) - (modified) clang/lib/AST/Mangle.cpp (+17-6) - (modified) clang/lib/AST/MicrosoftMangle.cpp (+16-7) - (modified) clang/lib/AST/VTableBuilder.cpp (+101-6) - (modified) clang/lib/CodeGen/CGCXX.cpp (+10-1) - (modified) clang/lib/CodeGen/CGCXXABI.h (+8-6) - (modified) clang/lib/CodeGen/CGClass.cpp (+30-1) - (modified) clang/lib/CodeGen/CGExpr.cpp (+5-2) - (modified) clang/lib/CodeGen/CGExprConstant.cpp (+76-1) - (modified) clang/lib/CodeGen/CGPointerAuth.cpp (+239) - (modified) clang/lib/CodeGen/CGVTT.cpp (+5) - (modified) clang/lib/CodeGen/CGVTables.cpp (+38-10) - (modified) clang/lib/CodeGen/CodeGenFunction.cpp (+27) - (modified) clang/lib/CodeGen/CodeGenFunction.h (+18-2) - (modified) clang/lib/CodeGen/CodeGenModule.h (+19) - (modified) clang/lib/CodeGen/ConstantEmitter.h (+3) - (modified) clang/lib/CodeGen/ItaniumCXXABI.cpp (+53-19) - (modified) clang/lib/CodeGen/MicrosoftCXXABI.cpp (+7-2) - (modified) clang/lib/Frontend/CompilerInvocation.cpp (+12) - (modified) clang/lib/Headers/ptrauth.h (+14) - (modified) clang/lib/InstallAPI/Visitor.cpp (+7-6) - (modified) clang/lib/Parse/ParseDecl.cpp (+29-1) - (modified) clang/lib/Sema/SemaDeclAttr.cpp (+116) - (modified) clang/lib/Sema/SemaDeclCXX.cpp (+46) - (modified) clang/lib/Sema/SemaExpr.cpp (+33) - (added) clang/test/CodeGen/ptrauth-ubsan-vptr.cpp (+30) - (modified) clang/test/CodeGenCXX/catch-undef-behavior.cpp (+4-3) - (added) clang/test/CodeGenCXX/ptrauth-apple-kext-indirect-call-2.cpp (+105) - (added) clang/test/CodeGenCXX/ptrauth-apple-kext-indirect-call.cpp (+42) - (added) clang/test/CodeGenCXX/ptrauth-apple-kext-indirect-virtual-dtor-call.cpp (+50) - (added) clang/test/CodeGenCXX/ptrauth-explicit-vtable-pointer-control.cpp (+652) - (added) clang/test/CodeGenCXX/ptrauth-rtti-layout.cpp (+10) - (added) clang/test/CodeGenCXX/ptrauth-thunks.cpp (+28) - (added) clang/test/CodeGenCXX/ptrauth-virtual-function.cpp (+581) - (added) clang/test/CodeGenCXX/ptrauth-vtable-virtual-inheritance-thunk.cpp (+309) - (modified) clang/test/CodeGenCXX/ubsan-vtable-checks.cpp (+46-2) - (modified) clang/test/Misc/pragma-attribute-supported-attributes-list.test (+1) - (added) clang/test/SemaCXX/ptrauth-incomplete-virtual-member-function-return-arg-type.cpp (+50) - (added) clang/test/SemaCXX/vtable_pointer_authentication_attribute.cpp (+225) - (modified) clang/utils/TableGen/ClangAttrEmitter.cpp (+27) ``diff diff --git a/clang/include/clang/AST/ASTContext.h b/clang/include/clang/AST/ASTContext.h index a1d1d1c51cd41..e601face9c2b6 100644 --- a/clang/include/clang/AST/ASTContext.h +++ b/clang/include/clang/AST/ASTContext.h @@ -37,6 +37,7 @@ #include "llvm/ADT/SmallVector.h" #include "llvm/ADT/StringMap.h" #include "llvm/ADT/StringRef.h" +#include "llvm/ADT/StringSet.h" #include "llvm/ADT/TinyPtrVector.h" #include "llvm/Support/TypeSize.h" #include @@ -1261,6 +1262,10 @@ class ASTContext : public RefCountedBase { /// space. QualType removeAddrSpaceQualType(QualType T) const; + /// Return the "other" type-specific discriminator for the given type. + uint16_t + getPointerAuthVTablePointerDiscriminator(const CXXRecordDecl *record); + /// Apply Objective-C protocol qualifiers to the given type. /// \param allowOnPointerType specifies if we can apply protocol /// qualifiers on ObjCObjectPointerType. It can be set to true when @@ -3418,12 +3423,20 @@ OPT_LIST(V) /// Whether a C++ static variable or CUDA/HIP kernel should be externalized. bool shouldExternalize(const Decl *D) const; + /// Resolve the root record to be used to derive the vtable pointer + /// authentication policy for the specified record. + const CXXRecordDecl *baseForVTableAuthentication(const CXXRecordDecl *); + bool useAbbreviatedThunkName(GlobalDecl virtualMethodDecl, + StringRef mangledName); + StringRef getCUIDHash() const; private: /
[llvm-branch-commits] [llvm] release/18.x: [DAGCombiner] In mergeTruncStore, make sure we aren't storing shifted in bits. (#90939) (PR #91038)
https://github.com/AtariDreams closed https://github.com/llvm/llvm-project/pull/91038 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/18.x: [DAGCombiner] In mergeTruncStore, make sure we aren't storing shifted in bits. (#90939) (PR #91038)
https://github.com/AtariDreams reopened https://github.com/llvm/llvm-project/pull/91038 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/18.x: [DAGCombiner] In mergeTruncStore, make sure we aren't storing shifted in bits. (#90939) (PR #91038)
https://github.com/AtariDreams updated https://github.com/llvm/llvm-project/pull/91038 >From 094e4fbb65a5f24474cbe556f895ee784f6bdffb Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Fri, 3 May 2024 09:59:33 -0700 Subject: [PATCH 1/2] [DAGCombiner] In mergeTruncStore, make sure we aren't storing shifted in bits. (#90939) When looking through a right shift, we need to make sure that all of the bits we are using from the shift come from the shift input and not the sign or zero bits that are shifted in. Fixes #90936. (cherry picked from commit 3563af6c06ebc92bcaacef0e33285148ef0f75bd) --- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 4 llvm/test/CodeGen/AArch64/pr90936.ll | 20 +++ 2 files changed, 24 insertions(+) create mode 100644 llvm/test/CodeGen/AArch64/pr90936.ll diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 5038f8a1fc156..4951e45edb9ed 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -8952,6 +8952,10 @@ SDValue DAGCombiner::mergeTruncStores(StoreSDNode *N) { if (ShiftAmtC % NarrowNumBits != 0) return SDValue(); + // Make sure we aren't reading bits that are shifted in. + if (ShiftAmtC > WideVal.getScalarValueSizeInBits() - NarrowNumBits) +return SDValue(); + Offset = ShiftAmtC / NarrowNumBits; WideVal = WideVal.getOperand(0); } diff --git a/llvm/test/CodeGen/AArch64/pr90936.ll b/llvm/test/CodeGen/AArch64/pr90936.ll new file mode 100644 index 0..38cda8d388945 --- /dev/null +++ b/llvm/test/CodeGen/AArch64/pr90936.ll @@ -0,0 +1,20 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4 +; RUN: llc < %s -mtriple=aarch64 | FileCheck %s + +define void @f(i16 %arg, ptr %arg1) { +; CHECK-LABEL: f: +; CHECK: // %bb.0: +; CHECK-NEXT:ubfx w8, w0, #8, #6 +; CHECK-NEXT:strb w0, [x1] +; CHECK-NEXT:strb w8, [x1, #1] +; CHECK-NEXT:ret +bb: + %i = trunc i16 %arg to i8 + %i2 = trunc i16 %arg to i14 + %i3 = lshr i14 %i2, 8 + store i8 %i, ptr %arg1, align 1 + %i4 = getelementptr i8, ptr %arg1, i64 1 + %i5 = trunc i14 %i3 to i8 + store i8 %i5, ptr %i4, align 1 + ret void +} >From fa3758ab061aaf545bfbbd611992c9cd23a80390 Mon Sep 17 00:00:00 2001 From: AtariDreams Date: Sat, 1 Jun 2024 21:54:37 -0400 Subject: [PATCH 2/2] Update DAGCombiner.cpp --- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 4951e45edb9ed..c8f7a0bfbd4b3 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -8952,7 +8952,7 @@ SDValue DAGCombiner::mergeTruncStores(StoreSDNode *N) { if (ShiftAmtC % NarrowNumBits != 0) return SDValue(); - // Make sure we aren't reading bits that are shifted in. + // Make sure we aren't reading the bits that are shifted in. if (ShiftAmtC > WideVal.getScalarValueSizeInBits() - NarrowNumBits) return SDValue(); ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/18.x: [DAGCombiner] In mergeTruncStore, make sure we aren't storing shifted in bits. (#90939) (PR #91038)
https://github.com/AtariDreams updated https://github.com/llvm/llvm-project/pull/91038 >From 094e4fbb65a5f24474cbe556f895ee784f6bdffb Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Fri, 3 May 2024 09:59:33 -0700 Subject: [PATCH 1/3] [DAGCombiner] In mergeTruncStore, make sure we aren't storing shifted in bits. (#90939) When looking through a right shift, we need to make sure that all of the bits we are using from the shift come from the shift input and not the sign or zero bits that are shifted in. Fixes #90936. (cherry picked from commit 3563af6c06ebc92bcaacef0e33285148ef0f75bd) --- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 4 llvm/test/CodeGen/AArch64/pr90936.ll | 20 +++ 2 files changed, 24 insertions(+) create mode 100644 llvm/test/CodeGen/AArch64/pr90936.ll diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 5038f8a1fc156..4951e45edb9ed 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -8952,6 +8952,10 @@ SDValue DAGCombiner::mergeTruncStores(StoreSDNode *N) { if (ShiftAmtC % NarrowNumBits != 0) return SDValue(); + // Make sure we aren't reading bits that are shifted in. + if (ShiftAmtC > WideVal.getScalarValueSizeInBits() - NarrowNumBits) +return SDValue(); + Offset = ShiftAmtC / NarrowNumBits; WideVal = WideVal.getOperand(0); } diff --git a/llvm/test/CodeGen/AArch64/pr90936.ll b/llvm/test/CodeGen/AArch64/pr90936.ll new file mode 100644 index 0..38cda8d388945 --- /dev/null +++ b/llvm/test/CodeGen/AArch64/pr90936.ll @@ -0,0 +1,20 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4 +; RUN: llc < %s -mtriple=aarch64 | FileCheck %s + +define void @f(i16 %arg, ptr %arg1) { +; CHECK-LABEL: f: +; CHECK: // %bb.0: +; CHECK-NEXT:ubfx w8, w0, #8, #6 +; CHECK-NEXT:strb w0, [x1] +; CHECK-NEXT:strb w8, [x1, #1] +; CHECK-NEXT:ret +bb: + %i = trunc i16 %arg to i8 + %i2 = trunc i16 %arg to i14 + %i3 = lshr i14 %i2, 8 + store i8 %i, ptr %arg1, align 1 + %i4 = getelementptr i8, ptr %arg1, i64 1 + %i5 = trunc i14 %i3 to i8 + store i8 %i5, ptr %i4, align 1 + ret void +} >From fa3758ab061aaf545bfbbd611992c9cd23a80390 Mon Sep 17 00:00:00 2001 From: AtariDreams Date: Sat, 1 Jun 2024 21:54:37 -0400 Subject: [PATCH 2/3] Update DAGCombiner.cpp --- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 4951e45edb9ed..c8f7a0bfbd4b3 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -8952,7 +8952,7 @@ SDValue DAGCombiner::mergeTruncStores(StoreSDNode *N) { if (ShiftAmtC % NarrowNumBits != 0) return SDValue(); - // Make sure we aren't reading bits that are shifted in. + // Make sure we aren't reading the bits that are shifted in. if (ShiftAmtC > WideVal.getScalarValueSizeInBits() - NarrowNumBits) return SDValue(); >From 2eb8863a43c88b63433f91580a83862e60702c99 Mon Sep 17 00:00:00 2001 From: AtariDreams Date: Sat, 1 Jun 2024 21:55:02 -0400 Subject: [PATCH 3/3] Update DAGCombiner.cpp --- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index c8f7a0bfbd4b3..4951e45edb9ed 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -8952,7 +8952,7 @@ SDValue DAGCombiner::mergeTruncStores(StoreSDNode *N) { if (ShiftAmtC % NarrowNumBits != 0) return SDValue(); - // Make sure we aren't reading the bits that are shifted in. + // Make sure we aren't reading bits that are shifted in. if (ShiftAmtC > WideVal.getScalarValueSizeInBits() - NarrowNumBits) return SDValue(); ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits