[llvm-branch-commits] [llvm][NFC] Document cl::opt variable and fix typo (PR #90670)
https://github.com/fhahn approved this pull request. LGTM, thanks! For the title, it might be clearer to explicitly mention the variable this is documenting, commit title size permitting https://github.com/llvm/llvm-project/pull/90670 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [AMDGPU] Enhance s_waitcnt insertion before barrier for gfx12 (#90595) (PR #90719)
https://github.com/jayfoad created
https://github.com/llvm/llvm-project/pull/90719
Code to determine if a waitcnt is required before a barrier instruction
only
considered S_BARRIER.
gfx12 adds barrier_signal/wait so need to enhance the existing code to
look for
a barrier start (which is just an S_BARRIER for earlier architectures).
>From e31113098e4669850f3ff924bead9e0fb9618f20 Mon Sep 17 00:00:00 2001
From: David Stuttard
Date: Wed, 1 May 2024 11:37:13 +0100
Subject: [PATCH] [AMDGPU] Enhance s_waitcnt insertion before barrier for gfx12
(#90595)
Code to determine if a waitcnt is required before a barrier instruction
only
considered S_BARRIER.
gfx12 adds barrier_signal/wait so need to enhance the existing code to
look for
a barrier start (which is just an S_BARRIER for earlier architectures).
---
llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp | 2 +-
llvm/lib/Target/AMDGPU/SIInstrInfo.h | 11 ++
.../CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll | 2 ++
.../AMDGPU/llvm.amdgcn.s.barrier.wait.ll | 22 +++
4 files changed, 36 insertions(+), 1 deletion(-)
diff --git a/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
b/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
index 6ecb1c8bf6e1db..7a3198612f86fc 100644
--- a/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
@@ -1832,7 +1832,7 @@ bool
SIInsertWaitcnts::generateWaitcntInstBefore(MachineInstr &MI,
// not, we need to ensure the subtarget is capable of backing off barrier
// instructions in case there are any outstanding memory operations that may
// cause an exception. Otherwise, insert an explicit S_WAITCNT 0 here.
- if (MI.getOpcode() == AMDGPU::S_BARRIER &&
+ if (TII->isBarrierStart(MI.getOpcode()) &&
!ST->hasAutoWaitcntBeforeBarrier() && !ST->supportsBackOffBarrier()) {
Wait = Wait.combined(
AMDGPU::Waitcnt::allZero(ST->hasExtendedWaitCounts(), ST->hasVscnt()));
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.h
b/llvm/lib/Target/AMDGPU/SIInstrInfo.h
index 1c9dacc09f8154..626d903c0c6958 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.h
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.h
@@ -908,6 +908,17 @@ class SIInstrInfo final : public AMDGPUGenInstrInfo {
return MI.getDesc().TSFlags & SIInstrFlags::IsNeverUniform;
}
+ // Check to see if opcode is for a barrier start. Pre gfx12 this is just the
+ // S_BARRIER, but after support for S_BARRIER_SIGNAL* / S_BARRIER_WAIT we
want
+ // to check for the barrier start (S_BARRIER_SIGNAL*)
+ bool isBarrierStart(unsigned Opcode) const {
+return Opcode == AMDGPU::S_BARRIER ||
+ Opcode == AMDGPU::S_BARRIER_SIGNAL_M0 ||
+ Opcode == AMDGPU::S_BARRIER_SIGNAL_ISFIRST_M0 ||
+ Opcode == AMDGPU::S_BARRIER_SIGNAL_IMM ||
+ Opcode == AMDGPU::S_BARRIER_SIGNAL_ISFIRST_IMM;
+ }
+
static bool doesNotReadTiedSource(const MachineInstr &MI) {
return MI.getDesc().TSFlags & SIInstrFlags::TiedSourceNotRead;
}
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll
b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll
index a7d3115af29bff..47c021769aa56f 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll
@@ -96,6 +96,7 @@ define amdgpu_kernel void @test_barrier(ptr addrspace(1)
%out, i32 %size) #0 {
; VARIANT4-NEXT:s_wait_kmcnt 0x0
; VARIANT4-NEXT:v_xad_u32 v1, v0, -1, s2
; VARIANT4-NEXT:global_store_b32 v3, v0, s[0:1]
+; VARIANT4-NEXT:s_wait_storecnt 0x0
; VARIANT4-NEXT:s_barrier_signal -1
; VARIANT4-NEXT:s_barrier_wait -1
; VARIANT4-NEXT:v_ashrrev_i32_e32 v2, 31, v1
@@ -142,6 +143,7 @@ define amdgpu_kernel void @test_barrier(ptr addrspace(1)
%out, i32 %size) #0 {
; VARIANT6-NEXT:v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v3, s0
; VARIANT6-NEXT:v_sub_nc_u32_e32 v1, s2, v0
; VARIANT6-NEXT:global_store_b32 v5, v0, s[0:1]
+; VARIANT6-NEXT:s_wait_storecnt 0x0
; VARIANT6-NEXT:s_barrier_signal -1
; VARIANT6-NEXT:s_barrier_wait -1
; VARIANT6-NEXT:v_ashrrev_i32_e32 v2, 31, v1
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.wait.ll
b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.wait.ll
index 4ab5e97964a857..38a34ec6daf73c 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.wait.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.wait.ll
@@ -12,6 +12,7 @@ define amdgpu_kernel void @test1_s_barrier_signal(ptr
addrspace(1) %out) #0 {
; GCN-NEXT:v_sub_nc_u32_e32 v0, v1, v0
; GCN-NEXT:s_wait_kmcnt 0x0
; GCN-NEXT:global_store_b32 v3, v2, s[0:1]
+; GCN-NEXT:s_wait_storecnt 0x0
; GCN-NEXT:s_barrier_signal -1
; GCN-NEXT:s_barrier_wait -1
; GCN-NEXT:global_store_b32 v3, v0, s[0:1]
@@ -28,6 +29,7 @@ define amdgpu_kernel void @test1_s_barrier_signal(ptr
addrspace(1) %out) #0 {
; GLOBAL-ISEL-NEXT:v_sub_nc_u32_e32 v0, v1, v0
; GLOBAL-ISEL-NEXT:s_wait_kmcnt 0x0
; GLOBAL-ISEL-N
[llvm-branch-commits] [llvm] [AMDGPU] Enhance s_waitcnt insertion before barrier for gfx12 (#90595) (PR #90719)
https://github.com/jayfoad milestoned https://github.com/llvm/llvm-project/pull/90719 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [AMDGPU] Enhance s_waitcnt insertion before barrier for gfx12 (#90595) (PR #90719)
llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Jay Foad (jayfoad)
Changes
Code to determine if a waitcnt is required before a barrier instruction
only
considered S_BARRIER.
gfx12 adds barrier_signal/wait so need to enhance the existing code to
look for
a barrier start (which is just an S_BARRIER for earlier architectures).
---
Full diff: https://github.com/llvm/llvm-project/pull/90719.diff
4 Files Affected:
- (modified) llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp (+1-1)
- (modified) llvm/lib/Target/AMDGPU/SIInstrInfo.h (+11)
- (modified) llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll (+2)
- (modified) llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.wait.ll (+22)
``diff
diff --git a/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
b/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
index 6ecb1c8bf6e1db..7a3198612f86fc 100644
--- a/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
@@ -1832,7 +1832,7 @@ bool
SIInsertWaitcnts::generateWaitcntInstBefore(MachineInstr &MI,
// not, we need to ensure the subtarget is capable of backing off barrier
// instructions in case there are any outstanding memory operations that may
// cause an exception. Otherwise, insert an explicit S_WAITCNT 0 here.
- if (MI.getOpcode() == AMDGPU::S_BARRIER &&
+ if (TII->isBarrierStart(MI.getOpcode()) &&
!ST->hasAutoWaitcntBeforeBarrier() && !ST->supportsBackOffBarrier()) {
Wait = Wait.combined(
AMDGPU::Waitcnt::allZero(ST->hasExtendedWaitCounts(), ST->hasVscnt()));
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.h
b/llvm/lib/Target/AMDGPU/SIInstrInfo.h
index 1c9dacc09f8154..626d903c0c6958 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.h
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.h
@@ -908,6 +908,17 @@ class SIInstrInfo final : public AMDGPUGenInstrInfo {
return MI.getDesc().TSFlags & SIInstrFlags::IsNeverUniform;
}
+ // Check to see if opcode is for a barrier start. Pre gfx12 this is just the
+ // S_BARRIER, but after support for S_BARRIER_SIGNAL* / S_BARRIER_WAIT we
want
+ // to check for the barrier start (S_BARRIER_SIGNAL*)
+ bool isBarrierStart(unsigned Opcode) const {
+return Opcode == AMDGPU::S_BARRIER ||
+ Opcode == AMDGPU::S_BARRIER_SIGNAL_M0 ||
+ Opcode == AMDGPU::S_BARRIER_SIGNAL_ISFIRST_M0 ||
+ Opcode == AMDGPU::S_BARRIER_SIGNAL_IMM ||
+ Opcode == AMDGPU::S_BARRIER_SIGNAL_ISFIRST_IMM;
+ }
+
static bool doesNotReadTiedSource(const MachineInstr &MI) {
return MI.getDesc().TSFlags & SIInstrFlags::TiedSourceNotRead;
}
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll
b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll
index a7d3115af29bff..47c021769aa56f 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll
@@ -96,6 +96,7 @@ define amdgpu_kernel void @test_barrier(ptr addrspace(1)
%out, i32 %size) #0 {
; VARIANT4-NEXT:s_wait_kmcnt 0x0
; VARIANT4-NEXT:v_xad_u32 v1, v0, -1, s2
; VARIANT4-NEXT:global_store_b32 v3, v0, s[0:1]
+; VARIANT4-NEXT:s_wait_storecnt 0x0
; VARIANT4-NEXT:s_barrier_signal -1
; VARIANT4-NEXT:s_barrier_wait -1
; VARIANT4-NEXT:v_ashrrev_i32_e32 v2, 31, v1
@@ -142,6 +143,7 @@ define amdgpu_kernel void @test_barrier(ptr addrspace(1)
%out, i32 %size) #0 {
; VARIANT6-NEXT:v_dual_mov_b32 v4, s1 :: v_dual_mov_b32 v3, s0
; VARIANT6-NEXT:v_sub_nc_u32_e32 v1, s2, v0
; VARIANT6-NEXT:global_store_b32 v5, v0, s[0:1]
+; VARIANT6-NEXT:s_wait_storecnt 0x0
; VARIANT6-NEXT:s_barrier_signal -1
; VARIANT6-NEXT:s_barrier_wait -1
; VARIANT6-NEXT:v_ashrrev_i32_e32 v2, 31, v1
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.wait.ll
b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.wait.ll
index 4ab5e97964a857..38a34ec6daf73c 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.wait.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.wait.ll
@@ -12,6 +12,7 @@ define amdgpu_kernel void @test1_s_barrier_signal(ptr
addrspace(1) %out) #0 {
; GCN-NEXT:v_sub_nc_u32_e32 v0, v1, v0
; GCN-NEXT:s_wait_kmcnt 0x0
; GCN-NEXT:global_store_b32 v3, v2, s[0:1]
+; GCN-NEXT:s_wait_storecnt 0x0
; GCN-NEXT:s_barrier_signal -1
; GCN-NEXT:s_barrier_wait -1
; GCN-NEXT:global_store_b32 v3, v0, s[0:1]
@@ -28,6 +29,7 @@ define amdgpu_kernel void @test1_s_barrier_signal(ptr
addrspace(1) %out) #0 {
; GLOBAL-ISEL-NEXT:v_sub_nc_u32_e32 v0, v1, v0
; GLOBAL-ISEL-NEXT:s_wait_kmcnt 0x0
; GLOBAL-ISEL-NEXT:global_store_b32 v3, v2, s[0:1]
+; GLOBAL-ISEL-NEXT:s_wait_storecnt 0x0
; GLOBAL-ISEL-NEXT:s_barrier_signal -1
; GLOBAL-ISEL-NEXT:s_barrier_wait -1
; GLOBAL-ISEL-NEXT:global_store_b32 v3, v0, s[0:1]
@@ -56,6 +58,7 @@ define amdgpu_kernel void @test2_s_barrier_signal(ptr
addrspace(1) %out) #0 {
; GCN-NEXT:v_sub_nc_u32_e32 v0, v1, v0
; GCN-NEXT:s_wait_k
[llvm-branch-commits] [llvm] [AMDGPU] Fix gfx12 waitcnt type for image_msaa_load (#90201) (PR #90582)
https://github.com/jayfoad updated
https://github.com/llvm/llvm-project/pull/90582
>From 17b75a9517891d662e677a357713c920bb79c43c Mon Sep 17 00:00:00 2001
From: David Stuttard
Date: Tue, 30 Apr 2024 10:41:51 +0100
Subject: [PATCH 1/2] [AMDGPU] Fix gfx12 waitcnt type for image_msaa_load
(#90201)
image_msaa_load is actually encoded as a VSAMPLE instruction and
requires the appropriate waitcnt variant.
---
llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp | 8 --
.../AMDGPU/llvm.amdgcn.image.msaa.load.ll | 26 +--
2 files changed, 19 insertions(+), 15 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
b/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
index 6ecb1c8bf6e1db..97c55e4d9e41c2 100644
--- a/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
@@ -187,8 +187,12 @@ VmemType getVmemType(const MachineInstr &Inst) {
const AMDGPU::MIMGInfo *Info = AMDGPU::getMIMGInfo(Inst.getOpcode());
const AMDGPU::MIMGBaseOpcodeInfo *BaseInfo =
AMDGPU::getMIMGBaseOpcodeInfo(Info->BaseOpcode);
- return BaseInfo->BVH ? VMEM_BVH
- : BaseInfo->Sampler ? VMEM_SAMPLER : VMEM_NOSAMPLER;
+ // The test for MSAA here is because gfx12+ image_msaa_load is actually
+ // encoded as VSAMPLE and requires the appropriate s_waitcnt variant for
that.
+ // Pre-gfx12 doesn't care since all vmem types result in the same s_waitcnt.
+ return BaseInfo->BVH ? VMEM_BVH
+ : BaseInfo->Sampler || BaseInfo->MSAA ? VMEM_SAMPLER
+ : VMEM_NOSAMPLER;
}
unsigned &getCounterRef(AMDGPU::Waitcnt &Wait, InstCounterType T) {
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.msaa.load.ll
b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.msaa.load.ll
index 1348315e72e7bc..8da48551855570 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.msaa.load.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.msaa.load.ll
@@ -12,7 +12,7 @@ define amdgpu_ps <4 x float> @load_2dmsaa(<8 x i32> inreg
%rsrc, i32 %s, i32 %t,
; GFX12-LABEL: load_2dmsaa:
; GFX12: ; %bb.0: ; %main_body
; GFX12-NEXT:image_msaa_load v[0:3], [v0, v1, v2], s[0:7] dmask:0x1
dim:SQ_RSRC_IMG_2D_MSAA unorm ; encoding:
[0x06,0x20,0x46,0xe4,0x00,0x00,0x00,0x00,0x00,0x01,0x02,0x00]
-; GFX12-NEXT:s_wait_loadcnt 0x0 ; encoding: [0x00,0x00,0xc0,0xbf]
+; GFX12-NEXT:s_wait_samplecnt 0x0 ; encoding: [0x00,0x00,0xc2,0xbf]
; GFX12-NEXT:; return to shader part epilog
main_body:
%v = call <4 x float> @llvm.amdgcn.image.msaa.load.2dmsaa.v4f32.i32(i32 1,
i32 %s, i32 %t, i32 %fragid, <8 x i32> %rsrc, i32 0, i32 0)
@@ -32,7 +32,7 @@ define amdgpu_ps <4 x float> @load_2dmsaa_both(<8 x i32>
inreg %rsrc, ptr addrsp
; GFX12: ; %bb.0: ; %main_body
; GFX12-NEXT:image_msaa_load v[0:4], [v0, v1, v2], s[0:7] dmask:0x2
dim:SQ_RSRC_IMG_2D_MSAA unorm tfe lwe ; encoding:
[0x0e,0x20,0x86,0xe4,0x00,0x01,0x00,0x00,0x00,0x01,0x02,0x00]
; GFX12-NEXT:v_mov_b32_e32 v5, 0 ; encoding: [0x80,0x02,0x0a,0x7e]
-; GFX12-NEXT:s_wait_loadcnt 0x0 ; encoding: [0x00,0x00,0xc0,0xbf]
+; GFX12-NEXT:s_wait_samplecnt 0x0 ; encoding: [0x00,0x00,0xc2,0xbf]
; GFX12-NEXT:global_store_b32 v5, v4, s[8:9] ; encoding:
[0x08,0x80,0x06,0xee,0x00,0x00,0x00,0x02,0x05,0x00,0x00,0x00]
; GFX12-NEXT:; return to shader part epilog
main_body:
@@ -53,7 +53,7 @@ define amdgpu_ps <4 x float> @load_2darraymsaa(<8 x i32>
inreg %rsrc, i32 %s, i3
; GFX12-LABEL: load_2darraymsaa:
; GFX12: ; %bb.0: ; %main_body
; GFX12-NEXT:image_msaa_load v[0:3], [v0, v1, v2, v3], s[0:7] dmask:0x4
dim:SQ_RSRC_IMG_2D_MSAA_ARRAY unorm ; encoding:
[0x07,0x20,0x06,0xe5,0x00,0x00,0x00,0x00,0x00,0x01,0x02,0x03]
-; GFX12-NEXT:s_wait_loadcnt 0x0 ; encoding: [0x00,0x00,0xc0,0xbf]
+; GFX12-NEXT:s_wait_samplecnt 0x0 ; encoding: [0x00,0x00,0xc2,0xbf]
; GFX12-NEXT:; return to shader part epilog
main_body:
%v = call <4 x float> @llvm.amdgcn.image.msaa.load.2darraymsaa.v4f32.i32(i32
4, i32 %s, i32 %t, i32 %slice, i32 %fragid, <8 x i32> %rsrc, i32 0, i32 0)
@@ -73,7 +73,7 @@ define amdgpu_ps <4 x float> @load_2darraymsaa_tfe(<8 x i32>
inreg %rsrc, ptr ad
; GFX12: ; %bb.0: ; %main_body
; GFX12-NEXT:image_msaa_load v[0:4], [v0, v1, v2, v3], s[0:7] dmask:0x8
dim:SQ_RSRC_IMG_2D_MSAA_ARRAY unorm tfe ; encoding:
[0x0f,0x20,0x06,0xe6,0x00,0x00,0x00,0x00,0x00,0x01,0x02,0x03]
; GFX12-NEXT:v_mov_b32_e32 v5, 0 ; encoding: [0x80,0x02,0x0a,0x7e]
-; GFX12-NEXT:s_wait_loadcnt 0x0 ; encoding: [0x00,0x00,0xc0,0xbf]
+; GFX12-NEXT:s_wait_samplecnt 0x0 ; encoding: [0x00,0x00,0xc2,0xbf]
; GFX12-NEXT:global_store_b32 v5, v4, s[8:9] ; encoding:
[0x08,0x80,0x06,0xee,0x00,0x00,0x00,0x02,0x05,0x00,0x00,0x00]
; GFX12-NEXT:; return to shader part epilog
main_body:
@@ -94,7 +94,7 @@ define amdgpu_ps <4 x float> @load_2dmsaa_glc(<8 x i32> inreg
%rsrc, i32 %s, i32
; GFX12-LABEL: load_2dmsaa
[llvm-branch-commits] [llvm] [AMDGPU] Fix gfx12 waitcnt type for image_msaa_load (#90201) (PR #90582)
https://github.com/jayfoad ready_for_review https://github.com/llvm/llvm-project/pull/90582 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [AMDGPU] Fix gfx12 waitcnt type for image_msaa_load (#90201) (PR #90582)
jayfoad wrote: > Let's not backport this yet since @pendingchaos has pointed out a problem > with #90201. Fixed by #90710 which I have added to this PR. https://github.com/llvm/llvm-project/pull/90582 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [libcxx] [libc++][TZDB] Implements time_zone::to_sys. (PR #90394)
https://github.com/mordante updated
https://github.com/llvm/llvm-project/pull/90394
>From fe9a4ce7f13e981d1ebcdfb088e16da686e22ea1 Mon Sep 17 00:00:00 2001
From: Mark de Wever
Date: Wed, 17 Apr 2024 21:00:22 +0200
Subject: [PATCH] [libc++][TZDB] Implements time_zone::to_sys.
This implements the throwing overload and the exception classes throw by
this overload.
Implements parts of:
- P0355 Extending chrono to Calendars and Time Zones
---
libcxx/include/CMakeLists.txt | 1 +
libcxx/include/__chrono/exception.h | 129 ++
libcxx/include/__chrono/time_zone.h | 26 ++
libcxx/include/chrono | 9 +
libcxx/include/module.modulemap | 6 +-
libcxx/modules/std/chrono.inc | 2 -
libcxx/src/CMakeLists.txt | 3 +
libcxx/src/chrono_exception.cpp | 20 ++
.../assert.ctor.pass.cpp | 53
.../assert.ctor.pass.cpp | 53
.../time.zone.members/assert.to_sys.pass.cpp | 39 +++
.../test/libcxx/transitive_includes/cxx03.csv | 3 -
.../test/libcxx/transitive_includes/cxx11.csv | 3 -
.../test/libcxx/transitive_includes/cxx14.csv | 3 -
.../test/libcxx/transitive_includes/cxx17.csv | 3 -
.../test/libcxx/transitive_includes/cxx20.csv | 8 +-
.../test/libcxx/transitive_includes/cxx23.csv | 12 +-
.../test/libcxx/transitive_includes/cxx26.csv | 12 +-
.../time.zone.exception.ambig/ctor.pass.cpp | 171 +
.../types.compile.pass.cpp| 32 +++
.../ctor.pass.cpp | 172 +
.../types.compile.pass.cpp| 32 +++
.../time.zone.members/to_sys.pass.cpp | 237 ++
23 files changed, 985 insertions(+), 44 deletions(-)
create mode 100644 libcxx/include/__chrono/exception.h
create mode 100644 libcxx/src/chrono_exception.cpp
create mode 100644
libcxx/test/libcxx/time/time.zone/time.zone.exception/time.zone.exception.ambig/assert.ctor.pass.cpp
create mode 100644
libcxx/test/libcxx/time/time.zone/time.zone.exception/time.zone.exception.nonexist/assert.ctor.pass.cpp
create mode 100644
libcxx/test/libcxx/time/time.zone/time.zone.timezone/time.zone.members/assert.to_sys.pass.cpp
create mode 100644
libcxx/test/std/time/time.zone/time.zone.exception/time.zone.exception.ambig/ctor.pass.cpp
create mode 100644
libcxx/test/std/time/time.zone/time.zone.exception/time.zone.exception.ambig/types.compile.pass.cpp
create mode 100644
libcxx/test/std/time/time.zone/time.zone.exception/time.zone.exception.nonexist/ctor.pass.cpp
create mode 100644
libcxx/test/std/time/time.zone/time.zone.exception/time.zone.exception.nonexist/types.compile.pass.cpp
create mode 100644
libcxx/test/std/time/time.zone/time.zone.timezone/time.zone.members/to_sys.pass.cpp
diff --git a/libcxx/include/CMakeLists.txt b/libcxx/include/CMakeLists.txt
index 1296c536bc882c..386bd967eed7ab 100644
--- a/libcxx/include/CMakeLists.txt
+++ b/libcxx/include/CMakeLists.txt
@@ -264,6 +264,7 @@ set(files
__chrono/convert_to_tm.h
__chrono/day.h
__chrono/duration.h
+ __chrono/exception.h
__chrono/file_clock.h
__chrono/formatter.h
__chrono/hh_mm_ss.h
diff --git a/libcxx/include/__chrono/exception.h
b/libcxx/include/__chrono/exception.h
new file mode 100644
index 00..9a7fca74fd369c
--- /dev/null
+++ b/libcxx/include/__chrono/exception.h
@@ -0,0 +1,129 @@
+// -*- C++ -*-
+//===--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+// For information see https://libcxx.llvm.org/DesignDocs/TimeZone.html
+
+#ifndef _LIBCPP___CHRONO_EXCEPTION_H
+#define _LIBCPP___CHRONO_EXCEPTION_H
+
+#include
+// Enable the contents of the header only when libc++ was built with
experimental features enabled.
+#if !defined(_LIBCPP_HAS_NO_EXPERIMENTAL_TZDB)
+
+# include <__availability>
+# include <__chrono/calendar.h>
+# include <__chrono/local_info.h>
+# include <__chrono/time_point.h>
+# include <__config>
+# include <__verbose_abort>
+# include
+# include
+# include
+
+# if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER)
+#pragma GCC system_header
+# endif
+
+_LIBCPP_BEGIN_NAMESPACE_STD
+
+# if _LIBCPP_STD_VER >= 20
+
+namespace chrono {
+
+class nonexistent_local_time : public runtime_error {
+public:
+ template
+ _LIBCPP_HIDE_FROM_ABI nonexistent_local_time(const local_time<_Duration>&
__time, const local_info& __info)
+ : runtime_error{__create_message(__time, __info)} {
+// [time.zone.exception.nonexist]/2
+// Preconditions: i.result == local_info::nonexistent is true.
+// The value of __info.res
[llvm-branch-commits] [GSYM] Include end_sequence debug_line rows in Dwarf transform (PR #90535)
https://github.com/clayborg edited https://github.com/llvm/llvm-project/pull/90535 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [GSYM] Include end_sequence debug_line rows in Dwarf transform (PR #90535)
@@ -424,19 +439,13 @@ static void convertFunctionLineTable(OutputAggregator
&Out, CUInfo &CUI,
auto LastLE = FI.OptLineTable->last();
if (LastLE && LastLE->File == FileIdx && LastLE->Line == Row.Line)
continue;
+
// Only push a row if it isn't an end sequence. End sequence markers are
// included for the last address in a function or the last contiguous
// address in a sequence.
-if (Row.EndSequence) {
clayborg wrote:
We used to not break out on Row.EndSequence as it allows functions to have
discontiguous ranges. Not sure if that happens. I was assuming that if we asked
for the rows for a given address range we wouldn't get all entries if two
merged functions with different line table entries were found, but that
assumption might not be correct?
https://github.com/llvm/llvm-project/pull/90535
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[llvm-branch-commits] [GSYM] Include end_sequence debug_line rows in Dwarf transform (PR #90535)
@@ -354,6 +357,18 @@ static void convertFunctionLineTable(OutputAggregator
&Out, CUInfo &CUI,
for (uint32_t RowIndex : RowVector) {
// Take file number and line/column from the row.
const DWARFDebugLine::Row &Row = CUI.LineTable->Rows[RowIndex];
+
+// TODO(avillega): With this conditional, functions folded by `icf`
+// optimizations will only include 1 of all the folded functions. There is
+// not a clear path forward to have the information of all folded functions
+// in gsym.
+if (Row.EndSequence) {
+ // End sequence markers are included for the last address
+ // in a function or the last contiguos address in a sequence.
+ break;
+}
+
+
clayborg wrote:
What if a function is split into two discontiguous ranges? This will lose the
line table information for any subsequent discontiguous ranges since we break
out of the loop here.
https://github.com/llvm/llvm-project/pull/90535
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[llvm-branch-commits] [GSYM] Include end_sequence debug_line rows in Dwarf transform (PR #90535)
@@ -321,7 +321,10 @@ static void convertFunctionLineTable(OutputAggregator
&Out, CUInfo &CUI,
StartAddress, object::SectionedAddress::UndefSection};
- if (!CUI.LineTable->lookupAddressRange(SecAddress, RangeSize, RowVector)) {
+ // end_sequence markers can be located at RangeSize position,
+ // lookupAddressRange search up to RangeSize not inclusive, to include
+ // end_sequence markers it is necessary to lookup until RangeSize+1
+ if (!CUI.LineTable->lookupAddressRange(SecAddress, RangeSize + 1,
RowVector)) {
clayborg wrote:
If a line table has two functions that share the same address range within the
same line table, this call currently will return only matches from the first
sequence that contains an address. So we won't get all rows from all sequences
that match. I checked the
`DWARFDebugLine::LineTable::lookupAddressRangeImpl(...)` function to verify.
https://github.com/llvm/llvm-project/pull/90535
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[llvm-branch-commits] [GSYM] Include end_sequence debug_line rows in Dwarf transform (PR #90535)
https://github.com/clayborg commented: Not sure this makes sense after checking the code for `DWARFDebugLine::LineTable::lookupAddressRangeImpl(...)`. If a line table has multiple sequences that contain an address, it will find the first sequence that contains the address and then return the rows for the function. What is the effect of this change on the test case? Does it change the final line table in the GSYM file? https://github.com/llvm/llvm-project/pull/90535 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [libcxx] [libc++][chrono] implements UTC clock. (PR #90393)
@@ -0,0 +1,155 @@
+// -*- C++ -*-
+//===--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef _LIBCPP___CHRONO_UTC_CLOCK_H
+#define _LIBCPP___CHRONO_UTC_CLOCK_H
+
+#include
+// Enable the contents of the header only when libc++ was built with
experimental features enabled.
+#if !defined(_LIBCPP_HAS_NO_INCOMPLETE_TZDB)
+
+# include <__chrono/duration.h>
+# include <__chrono/system_clock.h>
+# include <__chrono/time_point.h>
+# include <__chrono/tzdb.h>
+# include <__chrono/tzdb_list.h>
+# include <__config>
+# include <__type_traits/common_type.h>
+
+# if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER)
+#pragma GCC system_header
+# endif
+
+_LIBCPP_BEGIN_NAMESPACE_STD
+
+# if _LIBCPP_STD_VER >= 20 && !defined(_LIBCPP_HAS_NO_TIME_ZONE_DATABASE) &&
!defined(_LIBCPP_HAS_NO_FILESYSTEM) && \
+ !defined(_LIBCPP_HAS_NO_LOCALIZATION)
+
+namespace chrono {
+
+class utc_clock;
+
+template
+using utc_time= time_point;
+using utc_seconds = utc_time;
+
+class utc_clock {
+public:
+ using rep = system_clock::rep;
+ using period= system_clock::period;
+ using duration = chrono::duration;
+ using time_point= chrono::time_point;
+ static constexpr bool is_steady = false; // The system_clock is not steady.
+
+ [[nodiscard]] _LIBCPP_HIDE_FROM_ABI static time_point now() { return
from_sys(system_clock::now()); }
+
+ template
+ [[nodiscard]] _LIBCPP_HIDE_FROM_ABI static sys_time>
+ to_sys(const utc_time<_Duration>& __time);
+
+ template
+ [[nodiscard]] _LIBCPP_HIDE_FROM_ABI static utc_time>
+ from_sys(const sys_time<_Duration>& __time) {
+using _Rp = utc_time>;
+// TODO TZDB investigate optimizations.
+//
+// The leap second database stores all transitions, this mean to calculate
+// the current number of leap seconds the code needs to iterate over all
+// leap seconds to accumulate the sum. Then the sum can be used to
determine
+// the sys_time. Accessing the database involves acquiring a mutex.
+//
+// The historic entries in the database are immutable. Hard-coding these
+// values in a table would allow:
+// - To store the sum, allowing a binary search on the data.
+// - Avoid acquiring a mutex.
+// The disadvantage are:
+// - A slightly larger code size.
+//
+// There are two optimization directions
+// - hard-code the database and do a linear search for future entries. This
+// search can start at the back, and should probably contain very few
+// entries. (Adding leap seconds is quite rare and new release of libc++
+// can add the new entries; they are announced half a year before they
are
+// added.)
+// - During parsing the leap seconds store an additional database in the
+// dylib with the list of the sum of the leap seconds. In that case there
+// can be a private function __get_utc_to_sys_table that returns the
+// table.
+//
+// Note for to_sys there are no optimizations to be done; it uses
+// get_leap_second_info. The function get_leap_second_info could benefit
+// from optimizations as described above; again both options apply.
+
+// Both UTC and the system clock use the same epoch. The Standard
+// specifies from 1970-01-01 even when UTC starts at
+// 1972-01-01 00:00:10 TAI. So when the sys_time is before epoch we can be
+// sure there both clocks return the same value.
+
+const tzdb& __tzdb = chrono::get_tzdb();
+_Rp __result{__time.time_since_epoch()};
+for (const auto& __leap_second : __tzdb.leap_seconds) {
+ if (__time < __leap_second)
+return __result;
+
+ __result += __leap_second.value();
+}
+return __result;
+ }
+};
+
+struct leap_second_info {
+ bool is_leap_second;
+ seconds elapsed;
+};
+
+template
+[[nodiscard]] _LIBCPP_HIDE_FROM_ABI leap_second_info
get_leap_second_info(const utc_time<_Duration>& __time) {
+ const tzdb& __tzdb = chrono::get_tzdb();
+ if (__tzdb.leap_seconds.empty())
+return {false, chrono::seconds{0}};
+
+ sys_seconds __sys{chrono::floor(__time).time_since_epoch()};
+ seconds __elapsed{0};
+ for (const auto& __leap_second : __tzdb.leap_seconds) {
+if (__sys == __leap_second.date() + __elapsed)
+ return {__leap_second.value() > 0s, // only positive leap seconds are
considered leap seconds
+ __elapsed + __leap_second.value()};
+
+if (__sys < __leap_second.date() + __elapsed)
+ return {false, __elapsed};
+
+__elapsed += __leap_second.value();
+ }
+
+ return {false, __elapsed};
+}
+
+template
+[[n
[llvm-branch-commits] [libcxx] [libc++][chrono] implements UTC clock. (PR #90393)
https://github.com/mordante commented: Thanks for your review comments. https://github.com/llvm/llvm-project/pull/90393 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [libcxx] [libc++][chrono] implements UTC clock. (PR #90393)
@@ -0,0 +1,124 @@
+//===--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+// UNSUPPORTED: c++03, c++11, c++14, c++17
+// UNSUPPORTED: no-filesystem, no-localization, no-tzdb
+
+// XFAIL: libcpp-has-no-incomplete-tzdb
+// XFAIL: availability-tzdb-missing
+
+//
+//
+// class utc_clock;
+
+// template
+// leap_second_info get_leap_second_info(const utc_time& ut);
+
+#include
+#include
+#include
+#include
+#include
+
+#include "test_macros.h"
+#include "assert_macros.h"
+#include "concat_macros.h"
+#include "filesystem_test_helper.h"
+#include "test_tzdb.h"
+
+scoped_test_env env;
+[[maybe_unused]] const std::filesystem::path dir = env.create_dir("zoneinfo");
+const std::filesystem::path tzdata =
env.create_file("zoneinfo/tzdata.zi");
+const std::filesystem::path leap_seconds =
env.create_file("zoneinfo/leap-seconds.list");
+
+std::string_view std::chrono::__libcpp_tzdb_directory() {
+ static std::string result = dir.string();
+ return result;
+}
+
+static void write(std::string_view input) {
+ static int version = 0;
+
+ std::ofstream f{tzdata};
+ f << "# version " << version++ << '\n';
+ std::ofstream{leap_seconds}.write(input.data(), input.size());
+}
+
+template
+static void test_leap_second_info(
+std::chrono::time_point time, bool
is_leap_second, std::chrono::seconds elapsed) {
+ std::chrono::leap_second_info result =
std::chrono::get_leap_second_info(time);
+ TEST_REQUIRE(
+ result.is_leap_second == is_leap_second && result.elapsed == elapsed,
+ TEST_WRITE_CONCATENATED(
+ "\nExpected output [",
+ is_leap_second,
+ ", ",
+ elapsed,
+ "]\nActual output [",
+ result.is_leap_second,
+ ", ",
+ result.elapsed,
+ "]\n"));
+}
+
+// Note at the time of writing all leap seconds are positive. This test uses
+// fake data to test the behaviour of negative leap seconds.
+int main(int, const char**) {
+ using namespace std::literals::chrono_literals;
+
+ // Use small values for simplicity. The dates are seconds since 1.1.1900.
+ write(
+ R"(
+1 10
+60 11
+120 12
+180 11
+240 12
+300 13
+360 12
+)");
+
+ // Transitions from the start of UTC.
+ auto test_transition = [](std::chrono::utc_seconds time,
std::chrono::seconds elapsed, bool positive) {
+if (positive) {
+ // Every transition has the following tests
+ // - 1ns before the start of the transition is_leap_second -> false,
elapsed -> elapsed
+ // - at the start of the transition is_leap_second -> true,
elapsed -> elapsed + 1
+ // - 1ns after the start of the transition is_leap_second -> true,
elapsed -> elapsed + 1
+ // - 1ns before the end of the transition is_leap_second -> true,
elapsed -> elapsed + 1
+ // - at the end of the transition is_leap_second -> false,
elapsed -> elapsed + 1
+
+ test_leap_second_info(time - 1ns, false, elapsed);
+ test_leap_second_info(time, true, elapsed + 1s);
+ test_leap_second_info(time + 1ns, true, elapsed + 1s);
+ test_leap_second_info(time + 1s - 1ns, true, elapsed + 1s);
+ test_leap_second_info(time + 1s, false, elapsed + 1s);
+} else {
+ // Every transition has the following tests
+ // - 1ns before the transition is_leap_second -> false, elapsed ->
elapsed
+ // - at the transition is_leap_second -> false elapsed ->
elapsed - 1
+ // - 1ns after the transition is_leap_second -> false, elapsed ->
elapsed - 1
+ test_leap_second_info(time - 1ns, false, elapsed);
+ test_leap_second_info(time, false, elapsed - 1s);
+ test_leap_second_info(time + 1ns, false, elapsed - 1s);
+}
+ };
+
+ std::chrono::utc_seconds epoch{std::chrono::sys_days{std::chrono::January /
1 / 1900}.time_since_epoch()};
+ test_leap_second_info(epoch, false, 0s);
+
+ // The UTC times are:
+ // epoch + transition time in the database + leap seconds before the
transition.
+ test_transition(epoch + 60s + 0s, 0s, true);
+ test_transition(epoch + 120s + 1s, 1s, true);
+ test_transition(epoch + 180s + 2s, 2s, false);
mordante wrote:
Not having negative leap seconds indeed makes it hard to determine their proper
behaviour. The Standard also is quite silent on them; I can imagine why. I'll
consider your point and maybe search for other references.
https://github.com/llvm/llvm-project/pull/90393
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[llvm-branch-commits] [libcxx] [libc++][chrono] implements UTC clock. (PR #90393)
https://github.com/mordante edited https://github.com/llvm/llvm-project/pull/90393 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [OpenMP][MLIR] Add new arguments to map_info to help support record type maps (PR #82851)
https://github.com/agozillon updated https://github.com/llvm/llvm-project/pull/82851 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [OpenMP][MLIR] Add new arguments to map_info to help support record type maps (PR #82851)
https://github.com/agozillon updated https://github.com/llvm/llvm-project/pull/82851 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [OpenMP][MLIR] Extend record member map support for omp dialect to LLVM-IR (PR #82852)
https://github.com/agozillon updated https://github.com/llvm/llvm-project/pull/82852 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [OpenMP][MLIR] Extend record member map support for omp dialect to LLVM-IR (PR #82852)
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[llvm-branch-commits] [flang] [Flang][OpenMP][MLIR] Initial derived type member map support (PR #82853)
https://github.com/agozillon updated
https://github.com/llvm/llvm-project/pull/82853
>From 21b05eee943e4f1ad20fcd8f30bd14a0a3317db6 Mon Sep 17 00:00:00 2001
From: Andrew Gozillon
Date: Fri, 15 Mar 2024 14:13:30 -0500
Subject: [PATCH] update with minor tidying up
Created using spr 1.3.4
---
flang/lib/Lower/OpenMP/Utils.cpp | 2 +-
flang/lib/Lower/OpenMP/Utils.h| 2 --
flang/lib/Optimizer/Transforms/CMakeLists.txt | 2 +-
3 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/flang/lib/Lower/OpenMP/Utils.cpp b/flang/lib/Lower/OpenMP/Utils.cpp
index 60aea9f5b70aba..18728e2c4c1b06 100644
--- a/flang/lib/Lower/OpenMP/Utils.cpp
+++ b/flang/lib/Lower/OpenMP/Utils.cpp
@@ -13,7 +13,6 @@
#include "Utils.h"
#include "Clauses.h"
-#include
#include
#include
#include
@@ -22,6 +21,7 @@
#include
#include
+#include
#include
llvm::cl::opt treatIndexAsSection(
diff --git a/flang/lib/Lower/OpenMP/Utils.h b/flang/lib/Lower/OpenMP/Utils.h
index f45e4490c2abe7..942dd4c12d87b6 100644
--- a/flang/lib/Lower/OpenMP/Utils.h
+++ b/flang/lib/Lower/OpenMP/Utils.h
@@ -14,7 +14,6 @@
#include "mlir/IR/Location.h"
#include "mlir/IR/Value.h"
#include "llvm/Support/CommandLine.h"
-#include
extern llvm::cl::opt treatIndexAsSection;
extern llvm::cl::opt enableDelayedPrivatization;
@@ -36,7 +35,6 @@ class Symbol;
namespace parser {
struct OmpObject;
struct OmpObjectList;
-struct Designator;
} // namespace parser
namespace lower {
diff --git a/flang/lib/Optimizer/Transforms/CMakeLists.txt
b/flang/lib/Optimizer/Transforms/CMakeLists.txt
index ce5ce3ed1bc48d..63fbe2a0658d83 100644
--- a/flang/lib/Optimizer/Transforms/CMakeLists.txt
+++ b/flang/lib/Optimizer/Transforms/CMakeLists.txt
@@ -17,8 +17,8 @@ add_flang_library(FIRTransforms
AddDebugFoundation.cpp
PolymorphicOpConversion.cpp
LoopVersioning.cpp
- OMPMapInfoFinalization.cpp
OMPFunctionFiltering.cpp
+ OMPMapInfoFinalization.cpp
OMPMarkDeclareTarget.cpp
VScaleAttr.cpp
FunctionAttr.cpp
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[llvm-branch-commits] [flang] [Flang][OpenMP][MLIR] Initial derived type member map support (PR #82853)
https://github.com/agozillon updated
https://github.com/llvm/llvm-project/pull/82853
>From 21b05eee943e4f1ad20fcd8f30bd14a0a3317db6 Mon Sep 17 00:00:00 2001
From: Andrew Gozillon
Date: Fri, 15 Mar 2024 14:13:30 -0500
Subject: [PATCH] update with minor tidying up
Created using spr 1.3.4
---
flang/lib/Lower/OpenMP/Utils.cpp | 2 +-
flang/lib/Lower/OpenMP/Utils.h| 2 --
flang/lib/Optimizer/Transforms/CMakeLists.txt | 2 +-
3 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/flang/lib/Lower/OpenMP/Utils.cpp b/flang/lib/Lower/OpenMP/Utils.cpp
index 60aea9f5b70aba..18728e2c4c1b06 100644
--- a/flang/lib/Lower/OpenMP/Utils.cpp
+++ b/flang/lib/Lower/OpenMP/Utils.cpp
@@ -13,7 +13,6 @@
#include "Utils.h"
#include "Clauses.h"
-#include
#include
#include
#include
@@ -22,6 +21,7 @@
#include
#include
+#include
#include
llvm::cl::opt treatIndexAsSection(
diff --git a/flang/lib/Lower/OpenMP/Utils.h b/flang/lib/Lower/OpenMP/Utils.h
index f45e4490c2abe7..942dd4c12d87b6 100644
--- a/flang/lib/Lower/OpenMP/Utils.h
+++ b/flang/lib/Lower/OpenMP/Utils.h
@@ -14,7 +14,6 @@
#include "mlir/IR/Location.h"
#include "mlir/IR/Value.h"
#include "llvm/Support/CommandLine.h"
-#include
extern llvm::cl::opt treatIndexAsSection;
extern llvm::cl::opt enableDelayedPrivatization;
@@ -36,7 +35,6 @@ class Symbol;
namespace parser {
struct OmpObject;
struct OmpObjectList;
-struct Designator;
} // namespace parser
namespace lower {
diff --git a/flang/lib/Optimizer/Transforms/CMakeLists.txt
b/flang/lib/Optimizer/Transforms/CMakeLists.txt
index ce5ce3ed1bc48d..63fbe2a0658d83 100644
--- a/flang/lib/Optimizer/Transforms/CMakeLists.txt
+++ b/flang/lib/Optimizer/Transforms/CMakeLists.txt
@@ -17,8 +17,8 @@ add_flang_library(FIRTransforms
AddDebugFoundation.cpp
PolymorphicOpConversion.cpp
LoopVersioning.cpp
- OMPMapInfoFinalization.cpp
OMPFunctionFiltering.cpp
+ OMPMapInfoFinalization.cpp
OMPMarkDeclareTarget.cpp
VScaleAttr.cpp
FunctionAttr.cpp
___
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llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [flang] [Flang][OpenMP][MLIR] Initial derived type member map support (PR #82853)
agozillon wrote: Thanks for the review @jsjodin and @skatrak I've attempted to address both of your comments in recent updates. https://github.com/llvm/llvm-project/pull/82853 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [GSYM] Include end_sequence debug_line rows in Dwarf transform (PR #90535)
@@ -424,19 +439,13 @@ static void convertFunctionLineTable(OutputAggregator
&Out, CUInfo &CUI,
auto LastLE = FI.OptLineTable->last();
if (LastLE && LastLE->File == FileIdx && LastLE->Line == Row.Line)
continue;
+
// Only push a row if it isn't an end sequence. End sequence markers are
// included for the last address in a function or the last contiguous
// address in a sequence.
-if (Row.EndSequence) {
pogo59 wrote:
> allows functions to have discontiguous ranges. Not sure if that happens.
I think it can, Bolt and/or Propeller put each basic block in its own section
IIRC.
https://github.com/llvm/llvm-project/pull/90535
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[llvm-branch-commits] [llvm] release/18.x: [RISCV][ISel] Fix types in `tryFoldSelectIntoOp` (#90659) (PR #90682)
https://github.com/topperc approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/90682 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/18.x: [X86] Enable EVEX512 when host CPU has AVX512 (#90479) (PR #90545)
https://github.com/topperc approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/90545 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [libcxx] [libc++][chrono] implements UTC clock. (PR #90393)
@@ -0,0 +1,124 @@
+//===--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+// UNSUPPORTED: c++03, c++11, c++14, c++17
+// UNSUPPORTED: no-filesystem, no-localization, no-tzdb
+
+// XFAIL: libcpp-has-no-incomplete-tzdb
+// XFAIL: availability-tzdb-missing
+
+//
+//
+// class utc_clock;
+
+// template
+// leap_second_info get_leap_second_info(const utc_time& ut);
+
+#include
+#include
+#include
+#include
+#include
+
+#include "test_macros.h"
+#include "assert_macros.h"
+#include "concat_macros.h"
+#include "filesystem_test_helper.h"
+#include "test_tzdb.h"
+
+scoped_test_env env;
+[[maybe_unused]] const std::filesystem::path dir = env.create_dir("zoneinfo");
+const std::filesystem::path tzdata =
env.create_file("zoneinfo/tzdata.zi");
+const std::filesystem::path leap_seconds =
env.create_file("zoneinfo/leap-seconds.list");
+
+std::string_view std::chrono::__libcpp_tzdb_directory() {
+ static std::string result = dir.string();
+ return result;
+}
+
+static void write(std::string_view input) {
+ static int version = 0;
+
+ std::ofstream f{tzdata};
+ f << "# version " << version++ << '\n';
+ std::ofstream{leap_seconds}.write(input.data(), input.size());
+}
+
+template
+static void test_leap_second_info(
+std::chrono::time_point time, bool
is_leap_second, std::chrono::seconds elapsed) {
+ std::chrono::leap_second_info result =
std::chrono::get_leap_second_info(time);
+ TEST_REQUIRE(
+ result.is_leap_second == is_leap_second && result.elapsed == elapsed,
+ TEST_WRITE_CONCATENATED(
+ "\nExpected output [",
+ is_leap_second,
+ ", ",
+ elapsed,
+ "]\nActual output [",
+ result.is_leap_second,
+ ", ",
+ result.elapsed,
+ "]\n"));
+}
+
+// Note at the time of writing all leap seconds are positive. This test uses
+// fake data to test the behaviour of negative leap seconds.
+int main(int, const char**) {
+ using namespace std::literals::chrono_literals;
+
+ // Use small values for simplicity. The dates are seconds since 1.1.1900.
+ write(
+ R"(
+1 10
+60 11
+120 12
+180 11
+240 12
+300 13
+360 12
+)");
+
+ // Transitions from the start of UTC.
+ auto test_transition = [](std::chrono::utc_seconds time,
std::chrono::seconds elapsed, bool positive) {
+if (positive) {
+ // Every transition has the following tests
+ // - 1ns before the start of the transition is_leap_second -> false,
elapsed -> elapsed
+ // - at the start of the transition is_leap_second -> true,
elapsed -> elapsed + 1
+ // - 1ns after the start of the transition is_leap_second -> true,
elapsed -> elapsed + 1
+ // - 1ns before the end of the transition is_leap_second -> true,
elapsed -> elapsed + 1
+ // - at the end of the transition is_leap_second -> false,
elapsed -> elapsed + 1
+
+ test_leap_second_info(time - 1ns, false, elapsed);
+ test_leap_second_info(time, true, elapsed + 1s);
+ test_leap_second_info(time + 1ns, true, elapsed + 1s);
+ test_leap_second_info(time + 1s - 1ns, true, elapsed + 1s);
+ test_leap_second_info(time + 1s, false, elapsed + 1s);
+} else {
+ // Every transition has the following tests
+ // - 1ns before the transition is_leap_second -> false, elapsed ->
elapsed
+ // - at the transition is_leap_second -> false elapsed ->
elapsed - 1
+ // - 1ns after the transition is_leap_second -> false, elapsed ->
elapsed - 1
+ test_leap_second_info(time - 1ns, false, elapsed);
+ test_leap_second_info(time, false, elapsed - 1s);
+ test_leap_second_info(time + 1ns, false, elapsed - 1s);
+}
+ };
+
+ std::chrono::utc_seconds epoch{std::chrono::sys_days{std::chrono::January /
1 / 1900}.time_since_epoch()};
+ test_leap_second_info(epoch, false, 0s);
+
+ // The UTC times are:
+ // epoch + transition time in the database + leap seconds before the
transition.
+ test_transition(epoch + 60s + 0s, 0s, true);
+ test_transition(epoch + 120s + 1s, 1s, true);
+ test_transition(epoch + 180s + 2s, 2s, false);
MattStephanson wrote:
Paul Eggert, currently one of the official TZ Coordinators, has [this
message](https://mm.icann.org/pipermail/tz/2021-September/030385.html) on the
tz mailing list concerning negative leap seconds. It contains a sample
leap-seconds.list file. You can see that the NTP timestamps all end in "00",
suggesting they refer to 00:00:00, and indeed they are all multiples of 86,400.
https://github.com/llvm/llvm-project/pull/90393
___
llvm-branch-c
[llvm-branch-commits] [llvm] release/18.x: [GlobalISel] Don't form anyextending atomic loads. (PR #90435)
https://github.com/tstellar updated
https://github.com/llvm/llvm-project/pull/90435
>From 4da5b14174938bc69b8e729bc8b5bb393bd70b9e Mon Sep 17 00:00:00 2001
From: Amara Emerson
Date: Fri, 5 Apr 2024 10:49:19 -0700
Subject: [PATCH] [GlobalISel] Don't form anyextending atomic loads.
Until we can reliably check the legality and improve our selection of these,
don't form them at all.
(cherry picked from commit 60fc4ac67a613e4e36cef019fb2d13d70a06cfe8)
---
.../lib/CodeGen/GlobalISel/CombinerHelper.cpp | 4 +-
.../Atomics/aarch64-atomic-load-rcpc_immo.ll | 55 +-
.../AArch64/GlobalISel/arm64-atomic.ll| 56 +--
.../AArch64/GlobalISel/arm64-pcsections.ll| 28 +-
.../atomic-anyextending-load-crash.ll | 47
5 files changed, 131 insertions(+), 59 deletions(-)
create mode 100644
llvm/test/CodeGen/AArch64/GlobalISel/atomic-anyextending-load-crash.ll
diff --git a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
index 772229215e798d..61ddc858ba44c7 100644
--- a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
@@ -591,8 +591,8 @@ bool
CombinerHelper::matchCombineExtendingLoads(MachineInstr &MI,
UseMI.getOpcode() == TargetOpcode::G_ZEXT ||
(UseMI.getOpcode() == TargetOpcode::G_ANYEXT)) {
const auto &MMO = LoadMI->getMMO();
- // For atomics, only form anyextending loads.
- if (MMO.isAtomic() && UseMI.getOpcode() != TargetOpcode::G_ANYEXT)
+ // Don't do anything for atomics.
+ if (MMO.isAtomic())
continue;
// Check for legality.
if (!isPreLegalize()) {
diff --git a/llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-load-rcpc_immo.ll
b/llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-load-rcpc_immo.ll
index b0507e9d075fab..9687ba683fb7e6 100644
--- a/llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-load-rcpc_immo.ll
+++ b/llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-load-rcpc_immo.ll
@@ -35,16 +35,24 @@ define i8 @load_atomic_i8_aligned_monotonic_const(ptr
readonly %ptr) {
}
define i8 @load_atomic_i8_aligned_acquire(ptr %ptr) {
-; CHECK-LABEL: load_atomic_i8_aligned_acquire:
-; CHECK:ldapurb w0, [x0, #4]
+; GISEL-LABEL: load_atomic_i8_aligned_acquire:
+; GISEL:add x8, x0, #4
+; GISEL:ldaprb w0, [x8]
+;
+; SDAG-LABEL: load_atomic_i8_aligned_acquire:
+; SDAG:ldapurb w0, [x0, #4]
%gep = getelementptr inbounds i8, ptr %ptr, i32 4
%r = load atomic i8, ptr %gep acquire, align 1
ret i8 %r
}
define i8 @load_atomic_i8_aligned_acquire_const(ptr readonly %ptr) {
-; CHECK-LABEL: load_atomic_i8_aligned_acquire_const:
-; CHECK:ldapurb w0, [x0, #4]
+; GISEL-LABEL: load_atomic_i8_aligned_acquire_const:
+; GISEL:add x8, x0, #4
+; GISEL:ldaprb w0, [x8]
+;
+; SDAG-LABEL: load_atomic_i8_aligned_acquire_const:
+; SDAG:ldapurb w0, [x0, #4]
%gep = getelementptr inbounds i8, ptr %ptr, i32 4
%r = load atomic i8, ptr %gep acquire, align 1
ret i8 %r
@@ -101,16 +109,24 @@ define i16 @load_atomic_i16_aligned_monotonic_const(ptr
readonly %ptr) {
}
define i16 @load_atomic_i16_aligned_acquire(ptr %ptr) {
-; CHECK-LABEL: load_atomic_i16_aligned_acquire:
-; CHECK:ldapurh w0, [x0, #8]
+; GISEL-LABEL: load_atomic_i16_aligned_acquire:
+; GISEL:add x8, x0, #8
+; GISEL:ldaprh w0, [x8]
+;
+; SDAG-LABEL: load_atomic_i16_aligned_acquire:
+; SDAG:ldapurh w0, [x0, #8]
%gep = getelementptr inbounds i16, ptr %ptr, i32 4
%r = load atomic i16, ptr %gep acquire, align 2
ret i16 %r
}
define i16 @load_atomic_i16_aligned_acquire_const(ptr readonly %ptr) {
-; CHECK-LABEL: load_atomic_i16_aligned_acquire_const:
-; CHECK:ldapurh w0, [x0, #8]
+; GISEL-LABEL: load_atomic_i16_aligned_acquire_const:
+; GISEL:add x8, x0, #8
+; GISEL:ldaprh w0, [x8]
+;
+; SDAG-LABEL: load_atomic_i16_aligned_acquire_const:
+; SDAG:ldapurh w0, [x0, #8]
%gep = getelementptr inbounds i16, ptr %ptr, i32 4
%r = load atomic i16, ptr %gep acquire, align 2
ret i16 %r
@@ -367,16 +383,24 @@ define i8 @load_atomic_i8_unaligned_monotonic_const(ptr
readonly %ptr) {
}
define i8 @load_atomic_i8_unaligned_acquire(ptr %ptr) {
-; CHECK-LABEL: load_atomic_i8_unaligned_acquire:
-; CHECK:ldapurb w0, [x0, #4]
+; GISEL-LABEL: load_atomic_i8_unaligned_acquire:
+; GISEL:add x8, x0, #4
+; GISEL:ldaprb w0, [x8]
+;
+; SDAG-LABEL: load_atomic_i8_unaligned_acquire:
+; SDAG:ldapurb w0, [x0, #4]
%gep = getelementptr inbounds i8, ptr %ptr, i32 4
%r = load atomic i8, ptr %gep acquire, align 1
ret i8 %r
}
define i8 @load_atomic_i8_unaligned_acquire_const(ptr readonly %ptr) {
-; CHECK-LABEL: load_atomic_i8_unaligned_acquire_const:
-; CHECK:ldapurb w0, [x0, #4]
+; GISEL-LABEL: load_atomic_i8_unaligned_acquire_const:
+; GISEL:add x8, x0, #4
+; GISEL:ldaprb w0, [x8]
+;
+; SDAG-LABEL: load_atomic_i
[llvm-branch-commits] [llvm] 4da5b14 - [GlobalISel] Don't form anyextending atomic loads.
Author: Amara Emerson
Date: 2024-05-01T11:30:12-07:00
New Revision: 4da5b14174938bc69b8e729bc8b5bb393bd70b9e
URL:
https://github.com/llvm/llvm-project/commit/4da5b14174938bc69b8e729bc8b5bb393bd70b9e
DIFF:
https://github.com/llvm/llvm-project/commit/4da5b14174938bc69b8e729bc8b5bb393bd70b9e.diff
LOG: [GlobalISel] Don't form anyextending atomic loads.
Until we can reliably check the legality and improve our selection of these,
don't form them at all.
(cherry picked from commit 60fc4ac67a613e4e36cef019fb2d13d70a06cfe8)
Added:
llvm/test/CodeGen/AArch64/GlobalISel/atomic-anyextending-load-crash.ll
Modified:
llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-load-rcpc_immo.ll
llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic.ll
llvm/test/CodeGen/AArch64/GlobalISel/arm64-pcsections.ll
Removed:
diff --git a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
index 772229215e798d..61ddc858ba44c7 100644
--- a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
@@ -591,8 +591,8 @@ bool
CombinerHelper::matchCombineExtendingLoads(MachineInstr &MI,
UseMI.getOpcode() == TargetOpcode::G_ZEXT ||
(UseMI.getOpcode() == TargetOpcode::G_ANYEXT)) {
const auto &MMO = LoadMI->getMMO();
- // For atomics, only form anyextending loads.
- if (MMO.isAtomic() && UseMI.getOpcode() != TargetOpcode::G_ANYEXT)
+ // Don't do anything for atomics.
+ if (MMO.isAtomic())
continue;
// Check for legality.
if (!isPreLegalize()) {
diff --git
a/llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-load-rcpc_immo.ll
b/llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-load-rcpc_immo.ll
index b0507e9d075fab..9687ba683fb7e6 100644
--- a/llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-load-rcpc_immo.ll
+++ b/llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-load-rcpc_immo.ll
@@ -35,16 +35,24 @@ define i8 @load_atomic_i8_aligned_monotonic_const(ptr
readonly %ptr) {
}
define i8 @load_atomic_i8_aligned_acquire(ptr %ptr) {
-; CHECK-LABEL: load_atomic_i8_aligned_acquire:
-; CHECK:ldapurb w0, [x0, #4]
+; GISEL-LABEL: load_atomic_i8_aligned_acquire:
+; GISEL:add x8, x0, #4
+; GISEL:ldaprb w0, [x8]
+;
+; SDAG-LABEL: load_atomic_i8_aligned_acquire:
+; SDAG:ldapurb w0, [x0, #4]
%gep = getelementptr inbounds i8, ptr %ptr, i32 4
%r = load atomic i8, ptr %gep acquire, align 1
ret i8 %r
}
define i8 @load_atomic_i8_aligned_acquire_const(ptr readonly %ptr) {
-; CHECK-LABEL: load_atomic_i8_aligned_acquire_const:
-; CHECK:ldapurb w0, [x0, #4]
+; GISEL-LABEL: load_atomic_i8_aligned_acquire_const:
+; GISEL:add x8, x0, #4
+; GISEL:ldaprb w0, [x8]
+;
+; SDAG-LABEL: load_atomic_i8_aligned_acquire_const:
+; SDAG:ldapurb w0, [x0, #4]
%gep = getelementptr inbounds i8, ptr %ptr, i32 4
%r = load atomic i8, ptr %gep acquire, align 1
ret i8 %r
@@ -101,16 +109,24 @@ define i16 @load_atomic_i16_aligned_monotonic_const(ptr
readonly %ptr) {
}
define i16 @load_atomic_i16_aligned_acquire(ptr %ptr) {
-; CHECK-LABEL: load_atomic_i16_aligned_acquire:
-; CHECK:ldapurh w0, [x0, #8]
+; GISEL-LABEL: load_atomic_i16_aligned_acquire:
+; GISEL:add x8, x0, #8
+; GISEL:ldaprh w0, [x8]
+;
+; SDAG-LABEL: load_atomic_i16_aligned_acquire:
+; SDAG:ldapurh w0, [x0, #8]
%gep = getelementptr inbounds i16, ptr %ptr, i32 4
%r = load atomic i16, ptr %gep acquire, align 2
ret i16 %r
}
define i16 @load_atomic_i16_aligned_acquire_const(ptr readonly %ptr) {
-; CHECK-LABEL: load_atomic_i16_aligned_acquire_const:
-; CHECK:ldapurh w0, [x0, #8]
+; GISEL-LABEL: load_atomic_i16_aligned_acquire_const:
+; GISEL:add x8, x0, #8
+; GISEL:ldaprh w0, [x8]
+;
+; SDAG-LABEL: load_atomic_i16_aligned_acquire_const:
+; SDAG:ldapurh w0, [x0, #8]
%gep = getelementptr inbounds i16, ptr %ptr, i32 4
%r = load atomic i16, ptr %gep acquire, align 2
ret i16 %r
@@ -367,16 +383,24 @@ define i8 @load_atomic_i8_unaligned_monotonic_const(ptr
readonly %ptr) {
}
define i8 @load_atomic_i8_unaligned_acquire(ptr %ptr) {
-; CHECK-LABEL: load_atomic_i8_unaligned_acquire:
-; CHECK:ldapurb w0, [x0, #4]
+; GISEL-LABEL: load_atomic_i8_unaligned_acquire:
+; GISEL:add x8, x0, #4
+; GISEL:ldaprb w0, [x8]
+;
+; SDAG-LABEL: load_atomic_i8_unaligned_acquire:
+; SDAG:ldapurb w0, [x0, #4]
%gep = getelementptr inbounds i8, ptr %ptr, i32 4
%r = load atomic i8, ptr %gep acquire, align 1
ret i8 %r
}
define i8 @load_atomic_i8_unaligned_acquire_const(ptr readonly %ptr) {
-; CHECK-LABEL: load_atomic_i8_unaligned_acquire_const:
-; CHECK:ldapurb w0, [x0, #4]
+; GISEL-LABEL: load_atomic_i8_unaligned_acquire_const:
+; GISEL:add x8, x0, #4
+; GISEL:ldaprb w0, [x8]
+
[llvm-branch-commits] [llvm] release/18.x: [GlobalISel] Don't form anyextending atomic loads. (PR #90435)
https://github.com/tstellar closed https://github.com/llvm/llvm-project/pull/90435 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/18.x: [X86] Enable EVEX512 when host CPU has AVX512 (#90479) (PR #90545)
https://github.com/tstellar updated
https://github.com/llvm/llvm-project/pull/90545
>From a7b8b890600a33e0c88d639f311f1d73ccb1c8d2 Mon Sep 17 00:00:00 2001
From: Phoebe Wang
Date: Tue, 30 Apr 2024 10:09:41 +0800
Subject: [PATCH] [X86] Enable EVEX512 when host CPU has AVX512 (#90479)
This is used when -march=native run on an unknown CPU to old version of
LLVM.
(cherry picked from commit b3291793f11924a3b62601aabebebdcfbb12a9a1)
---
llvm/lib/TargetParser/Host.cpp | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/llvm/lib/TargetParser/Host.cpp b/llvm/lib/TargetParser/Host.cpp
index 4466d50458e198..1adef15771fa17 100644
--- a/llvm/lib/TargetParser/Host.cpp
+++ b/llvm/lib/TargetParser/Host.cpp
@@ -1266,8 +1266,10 @@ static void getAvailableFeatures(unsigned ECX, unsigned
EDX, unsigned MaxLeaf,
setFeature(X86::FEATURE_AVX2);
if (HasLeaf7 && ((EBX >> 8) & 1))
setFeature(X86::FEATURE_BMI2);
- if (HasLeaf7 && ((EBX >> 16) & 1) && HasAVX512Save)
+ if (HasLeaf7 && ((EBX >> 16) & 1) && HasAVX512Save) {
setFeature(X86::FEATURE_AVX512F);
+setFeature(X86::FEATURE_EVEX512);
+ }
if (HasLeaf7 && ((EBX >> 17) & 1) && HasAVX512Save)
setFeature(X86::FEATURE_AVX512DQ);
if (HasLeaf7 && ((EBX >> 19) & 1))
@@ -1772,6 +1774,7 @@ bool sys::getHostCPUFeatures(StringMap &Features) {
Features["rtm"]= HasLeaf7 && ((EBX >> 11) & 1);
// AVX512 is only supported if the OS supports the context save for it.
Features["avx512f"]= HasLeaf7 && ((EBX >> 16) & 1) && HasAVX512Save;
+ Features["evex512"]= Features["avx512f"];
Features["avx512dq"] = HasLeaf7 && ((EBX >> 17) & 1) && HasAVX512Save;
Features["rdseed"] = HasLeaf7 && ((EBX >> 18) & 1);
Features["adx"]= HasLeaf7 && ((EBX >> 19) & 1);
___
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[llvm-branch-commits] [llvm] a7b8b89 - [X86] Enable EVEX512 when host CPU has AVX512 (#90479)
Author: Phoebe Wang
Date: 2024-05-01T11:32:03-07:00
New Revision: a7b8b890600a33e0c88d639f311f1d73ccb1c8d2
URL:
https://github.com/llvm/llvm-project/commit/a7b8b890600a33e0c88d639f311f1d73ccb1c8d2
DIFF:
https://github.com/llvm/llvm-project/commit/a7b8b890600a33e0c88d639f311f1d73ccb1c8d2.diff
LOG: [X86] Enable EVEX512 when host CPU has AVX512 (#90479)
This is used when -march=native run on an unknown CPU to old version of
LLVM.
(cherry picked from commit b3291793f11924a3b62601aabebebdcfbb12a9a1)
Added:
Modified:
llvm/lib/TargetParser/Host.cpp
Removed:
diff --git a/llvm/lib/TargetParser/Host.cpp b/llvm/lib/TargetParser/Host.cpp
index 4466d50458e198..1adef15771fa17 100644
--- a/llvm/lib/TargetParser/Host.cpp
+++ b/llvm/lib/TargetParser/Host.cpp
@@ -1266,8 +1266,10 @@ static void getAvailableFeatures(unsigned ECX, unsigned
EDX, unsigned MaxLeaf,
setFeature(X86::FEATURE_AVX2);
if (HasLeaf7 && ((EBX >> 8) & 1))
setFeature(X86::FEATURE_BMI2);
- if (HasLeaf7 && ((EBX >> 16) & 1) && HasAVX512Save)
+ if (HasLeaf7 && ((EBX >> 16) & 1) && HasAVX512Save) {
setFeature(X86::FEATURE_AVX512F);
+setFeature(X86::FEATURE_EVEX512);
+ }
if (HasLeaf7 && ((EBX >> 17) & 1) && HasAVX512Save)
setFeature(X86::FEATURE_AVX512DQ);
if (HasLeaf7 && ((EBX >> 19) & 1))
@@ -1772,6 +1774,7 @@ bool sys::getHostCPUFeatures(StringMap &Features) {
Features["rtm"]= HasLeaf7 && ((EBX >> 11) & 1);
// AVX512 is only supported if the OS supports the context save for it.
Features["avx512f"]= HasLeaf7 && ((EBX >> 16) & 1) && HasAVX512Save;
+ Features["evex512"]= Features["avx512f"];
Features["avx512dq"] = HasLeaf7 && ((EBX >> 17) & 1) && HasAVX512Save;
Features["rdseed"] = HasLeaf7 && ((EBX >> 18) & 1);
Features["adx"]= HasLeaf7 && ((EBX >> 19) & 1);
___
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[llvm-branch-commits] [llvm] release/18.x: [X86] Enable EVEX512 when host CPU has AVX512 (#90479) (PR #90545)
https://github.com/tstellar closed https://github.com/llvm/llvm-project/pull/90545 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/18.x: [GlobalISel] Fix store merging incorrectly classifying an unknown index expr as 0. (#90375) (PR #90673)
https://github.com/tstellar updated
https://github.com/llvm/llvm-project/pull/90673
>From ece9d35f1a705ab8d66895c6d985907f2b9a2c0c Mon Sep 17 00:00:00 2001
From: Amara Emerson
Date: Wed, 1 May 2024 05:42:14 +0800
Subject: [PATCH] [GlobalISel] Fix store merging incorrectly classifying an
unknown index expr as 0. (#90375)
During analysis, we incorrectly leave the offset part of an address info
struct
as zero, when in actual fact we failed to decompose it into base +
offset.
This results in incorrectly assuming that the address is adjacent to
another store
addr. To fix this we wrap the offset in an optional<> so we can
distinguish between
real zero and unknown.
Fixes issue #90242
(cherry picked from commit 19f4d68252b70c81ebb1686a5a31069eda5373de)
---
.../llvm/CodeGen/GlobalISel/LoadStoreOpt.h| 20 --
llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp | 48 --
.../AArch64/GlobalISel/store-merging.ll | 19 ++
.../AArch64/GlobalISel/store-merging.mir | 62 ---
4 files changed, 115 insertions(+), 34 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/GlobalISel/LoadStoreOpt.h
b/llvm/include/llvm/CodeGen/GlobalISel/LoadStoreOpt.h
index 0f20a33f3a755c..7990997835d019 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/LoadStoreOpt.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/LoadStoreOpt.h
@@ -35,11 +35,23 @@ struct LegalityQuery;
class MachineRegisterInfo;
namespace GISelAddressing {
/// Helper struct to store a base, index and offset that forms an address
-struct BaseIndexOffset {
+class BaseIndexOffset {
+private:
Register BaseReg;
Register IndexReg;
- int64_t Offset = 0;
- bool IsIndexSignExt = false;
+ std::optional Offset;
+
+public:
+ BaseIndexOffset() = default;
+ Register getBase() { return BaseReg; }
+ Register getBase() const { return BaseReg; }
+ Register getIndex() { return IndexReg; }
+ Register getIndex() const { return IndexReg; }
+ void setBase(Register NewBase) { BaseReg = NewBase; }
+ void setIndex(Register NewIndex) { IndexReg = NewIndex; }
+ void setOffset(std::optional NewOff) { Offset = NewOff; }
+ bool hasValidOffset() const { return Offset.has_value(); }
+ int64_t getOffset() const { return *Offset; }
};
/// Returns a BaseIndexOffset which describes the pointer in \p Ptr.
@@ -89,7 +101,7 @@ class LoadStoreOpt : public MachineFunctionPass {
// order stores are writing to incremeneting consecutive addresses. So when
// we walk the block in reverse order, the next eligible store must write
to
// an offset one store width lower than CurrentLowestOffset.
-uint64_t CurrentLowestOffset;
+int64_t CurrentLowestOffset;
SmallVector Stores;
// A vector of MachineInstr/unsigned pairs to denote potential aliases that
// need to be checked before the candidate is considered safe to merge. The
diff --git a/llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp
b/llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp
index 246aa88b09acf6..ee499c41c558c3 100644
--- a/llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp
@@ -84,21 +84,20 @@ BaseIndexOffset GISelAddressing::getPointerInfo(Register
Ptr,
MachineRegisterInfo &MRI) {
BaseIndexOffset Info;
Register PtrAddRHS;
- if (!mi_match(Ptr, MRI, m_GPtrAdd(m_Reg(Info.BaseReg), m_Reg(PtrAddRHS {
-Info.BaseReg = Ptr;
-Info.IndexReg = Register();
-Info.IsIndexSignExt = false;
+ Register BaseReg;
+ if (!mi_match(Ptr, MRI, m_GPtrAdd(m_Reg(BaseReg), m_Reg(PtrAddRHS {
+Info.setBase(Ptr);
+Info.setOffset(0);
return Info;
}
-
+ Info.setBase(BaseReg);
auto RHSCst = getIConstantVRegValWithLookThrough(PtrAddRHS, MRI);
if (RHSCst)
-Info.Offset = RHSCst->Value.getSExtValue();
+Info.setOffset(RHSCst->Value.getSExtValue());
// Just recognize a simple case for now. In future we'll need to match
// indexing patterns for base + index + constant.
- Info.IndexReg = PtrAddRHS;
- Info.IsIndexSignExt = false;
+ Info.setIndex(PtrAddRHS);
return Info;
}
@@ -114,15 +113,16 @@ bool GISelAddressing::aliasIsKnownForLoadStore(const
MachineInstr &MI1,
BaseIndexOffset BasePtr0 = getPointerInfo(LdSt1->getPointerReg(), MRI);
BaseIndexOffset BasePtr1 = getPointerInfo(LdSt2->getPointerReg(), MRI);
- if (!BasePtr0.BaseReg.isValid() || !BasePtr1.BaseReg.isValid())
+ if (!BasePtr0.getBase().isValid() || !BasePtr1.getBase().isValid())
return false;
int64_t Size1 = LdSt1->getMemSize();
int64_t Size2 = LdSt2->getMemSize();
int64_t PtrDiff;
- if (BasePtr0.BaseReg == BasePtr1.BaseReg) {
-PtrDiff = BasePtr1.Offset - BasePtr0.Offset;
+ if (BasePtr0.getBase() == BasePtr1.getBase() && BasePtr0.hasValidOffset() &&
+ BasePtr1.hasValidOffset()) {
+PtrDiff = BasePtr1.getOffset() - BasePtr0.getOffset();
// If the size of memory access is unknown, do not use it to do analysis.
// One example of
[llvm-branch-commits] [llvm] ece9d35 - [GlobalISel] Fix store merging incorrectly classifying an unknown index expr as 0. (#90375)
Author: Amara Emerson
Date: 2024-05-01T11:35:12-07:00
New Revision: ece9d35f1a705ab8d66895c6d985907f2b9a2c0c
URL:
https://github.com/llvm/llvm-project/commit/ece9d35f1a705ab8d66895c6d985907f2b9a2c0c
DIFF:
https://github.com/llvm/llvm-project/commit/ece9d35f1a705ab8d66895c6d985907f2b9a2c0c.diff
LOG: [GlobalISel] Fix store merging incorrectly classifying an unknown index
expr as 0. (#90375)
During analysis, we incorrectly leave the offset part of an address info
struct
as zero, when in actual fact we failed to decompose it into base +
offset.
This results in incorrectly assuming that the address is adjacent to
another store
addr. To fix this we wrap the offset in an optional<> so we can
distinguish between
real zero and unknown.
Fixes issue #90242
(cherry picked from commit 19f4d68252b70c81ebb1686a5a31069eda5373de)
Added:
Modified:
llvm/include/llvm/CodeGen/GlobalISel/LoadStoreOpt.h
llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp
llvm/test/CodeGen/AArch64/GlobalISel/store-merging.ll
llvm/test/CodeGen/AArch64/GlobalISel/store-merging.mir
Removed:
diff --git a/llvm/include/llvm/CodeGen/GlobalISel/LoadStoreOpt.h
b/llvm/include/llvm/CodeGen/GlobalISel/LoadStoreOpt.h
index 0f20a33f3a755c..7990997835d019 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/LoadStoreOpt.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/LoadStoreOpt.h
@@ -35,11 +35,23 @@ struct LegalityQuery;
class MachineRegisterInfo;
namespace GISelAddressing {
/// Helper struct to store a base, index and offset that forms an address
-struct BaseIndexOffset {
+class BaseIndexOffset {
+private:
Register BaseReg;
Register IndexReg;
- int64_t Offset = 0;
- bool IsIndexSignExt = false;
+ std::optional Offset;
+
+public:
+ BaseIndexOffset() = default;
+ Register getBase() { return BaseReg; }
+ Register getBase() const { return BaseReg; }
+ Register getIndex() { return IndexReg; }
+ Register getIndex() const { return IndexReg; }
+ void setBase(Register NewBase) { BaseReg = NewBase; }
+ void setIndex(Register NewIndex) { IndexReg = NewIndex; }
+ void setOffset(std::optional NewOff) { Offset = NewOff; }
+ bool hasValidOffset() const { return Offset.has_value(); }
+ int64_t getOffset() const { return *Offset; }
};
/// Returns a BaseIndexOffset which describes the pointer in \p Ptr.
@@ -89,7 +101,7 @@ class LoadStoreOpt : public MachineFunctionPass {
// order stores are writing to incremeneting consecutive addresses. So when
// we walk the block in reverse order, the next eligible store must write
to
// an offset one store width lower than CurrentLowestOffset.
-uint64_t CurrentLowestOffset;
+int64_t CurrentLowestOffset;
SmallVector Stores;
// A vector of MachineInstr/unsigned pairs to denote potential aliases that
// need to be checked before the candidate is considered safe to merge. The
diff --git a/llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp
b/llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp
index 246aa88b09acf6..ee499c41c558c3 100644
--- a/llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp
@@ -84,21 +84,20 @@ BaseIndexOffset GISelAddressing::getPointerInfo(Register
Ptr,
MachineRegisterInfo &MRI) {
BaseIndexOffset Info;
Register PtrAddRHS;
- if (!mi_match(Ptr, MRI, m_GPtrAdd(m_Reg(Info.BaseReg), m_Reg(PtrAddRHS {
-Info.BaseReg = Ptr;
-Info.IndexReg = Register();
-Info.IsIndexSignExt = false;
+ Register BaseReg;
+ if (!mi_match(Ptr, MRI, m_GPtrAdd(m_Reg(BaseReg), m_Reg(PtrAddRHS {
+Info.setBase(Ptr);
+Info.setOffset(0);
return Info;
}
-
+ Info.setBase(BaseReg);
auto RHSCst = getIConstantVRegValWithLookThrough(PtrAddRHS, MRI);
if (RHSCst)
-Info.Offset = RHSCst->Value.getSExtValue();
+Info.setOffset(RHSCst->Value.getSExtValue());
// Just recognize a simple case for now. In future we'll need to match
// indexing patterns for base + index + constant.
- Info.IndexReg = PtrAddRHS;
- Info.IsIndexSignExt = false;
+ Info.setIndex(PtrAddRHS);
return Info;
}
@@ -114,15 +113,16 @@ bool GISelAddressing::aliasIsKnownForLoadStore(const
MachineInstr &MI1,
BaseIndexOffset BasePtr0 = getPointerInfo(LdSt1->getPointerReg(), MRI);
BaseIndexOffset BasePtr1 = getPointerInfo(LdSt2->getPointerReg(), MRI);
- if (!BasePtr0.BaseReg.isValid() || !BasePtr1.BaseReg.isValid())
+ if (!BasePtr0.getBase().isValid() || !BasePtr1.getBase().isValid())
return false;
int64_t Size1 = LdSt1->getMemSize();
int64_t Size2 = LdSt2->getMemSize();
int64_t PtrDiff;
- if (BasePtr0.BaseReg == BasePtr1.BaseReg) {
-PtrDiff = BasePtr1.Offset - BasePtr0.Offset;
+ if (BasePtr0.getBase() == BasePtr1.getBase() && BasePtr0.hasValidOffset() &&
+ BasePtr1.hasValidOffset()) {
+PtrDiff = BasePtr1.getOffset() - BasePtr0.getOffset
[llvm-branch-commits] [llvm] release/18.x: [GlobalISel] Fix store merging incorrectly classifying an unknown index expr as 0. (#90375) (PR #90673)
https://github.com/tstellar closed https://github.com/llvm/llvm-project/pull/90673 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/18.x: [RISCV][ISel] Fix types in `tryFoldSelectIntoOp` (#90659) (PR #90682)
https://github.com/tstellar updated
https://github.com/llvm/llvm-project/pull/90682
>From 20b9ed64ea074f03057e1d775a1d9d0f067ab0b0 Mon Sep 17 00:00:00 2001
From: Yingwei Zheng
Date: Wed, 1 May 2024 06:51:36 +0800
Subject: [PATCH] [RISCV][ISel] Fix types in `tryFoldSelectIntoOp` (#90659)
```
SelectionDAG has 17 nodes:
t0: ch,glue = EntryToken
t6: i64,ch = CopyFromReg t0, Register:i64 %2
t8: i1 = truncate t6
t4: i64,ch = CopyFromReg t0, Register:i64 %1
t7: i1 = truncate t4
t2: i64,ch = CopyFromReg t0, Register:i64 %0
t10: i64,i1 = saddo t2, Constant:i64<1>
t11: i1 = or t8, t10:1
t12: i1 = select t7, t8, t11
t13: i64 = any_extend t12
t15: ch,glue = CopyToReg t0, Register:i64 $x10, t13
t16: ch = RISCVISD::RET_GLUE t15, Register:i64 $x10, t15:1
```
`OtherOpVT` should be i1, but `OtherOp->getValueType(0)` returns `i64`,
which ignores `ResNo` in `SDValue`.
Fix https://github.com/llvm/llvm-project/issues/90652.
(cherry picked from commit 2647bd73696ae987addd0e74774a44108accb1e6)
---
llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 2 +-
llvm/test/CodeGen/RISCV/pr90652.ll | 19 +++
2 files changed, 20 insertions(+), 1 deletion(-)
create mode 100644 llvm/test/CodeGen/RISCV/pr90652.ll
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index a0cec426002b6f..d46093b9e260a2 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -14559,7 +14559,7 @@ static SDValue tryFoldSelectIntoOp(SDNode *N,
SelectionDAG &DAG,
EVT VT = N->getValueType(0);
SDLoc DL(N);
SDValue OtherOp = TrueVal.getOperand(1 - OpToFold);
- EVT OtherOpVT = OtherOp->getValueType(0);
+ EVT OtherOpVT = OtherOp.getValueType();
SDValue IdentityOperand =
DAG.getNeutralElement(Opc, DL, OtherOpVT, N->getFlags());
if (!Commutative)
diff --git a/llvm/test/CodeGen/RISCV/pr90652.ll
b/llvm/test/CodeGen/RISCV/pr90652.ll
new file mode 100644
index 00..2162395b92ac3c
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/pr90652.ll
@@ -0,0 +1,19 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
UTC_ARGS: --version 4
+; RUN: llc < %s -mtriple=riscv64 | FileCheck %s
+
+define i1 @test(i64 %x, i1 %cond1, i1 %cond2) {
+; CHECK-LABEL: test:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT:addi a3, a0, 1
+; CHECK-NEXT:slt a0, a3, a0
+; CHECK-NEXT:not a1, a1
+; CHECK-NEXT:and a0, a1, a0
+; CHECK-NEXT:or a0, a2, a0
+; CHECK-NEXT:ret
+entry:
+ %sadd = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %x, i64 1)
+ %ov = extractvalue { i64, i1 } %sadd, 1
+ %or = or i1 %cond2, %ov
+ %sel = select i1 %cond1, i1 %cond2, i1 %or
+ ret i1 %sel
+}
___
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[llvm-branch-commits] [llvm] 20b9ed6 - [RISCV][ISel] Fix types in `tryFoldSelectIntoOp` (#90659)
Author: Yingwei Zheng
Date: 2024-05-01T11:39:11-07:00
New Revision: 20b9ed64ea074f03057e1d775a1d9d0f067ab0b0
URL:
https://github.com/llvm/llvm-project/commit/20b9ed64ea074f03057e1d775a1d9d0f067ab0b0
DIFF:
https://github.com/llvm/llvm-project/commit/20b9ed64ea074f03057e1d775a1d9d0f067ab0b0.diff
LOG: [RISCV][ISel] Fix types in `tryFoldSelectIntoOp` (#90659)
```
SelectionDAG has 17 nodes:
t0: ch,glue = EntryToken
t6: i64,ch = CopyFromReg t0, Register:i64 %2
t8: i1 = truncate t6
t4: i64,ch = CopyFromReg t0, Register:i64 %1
t7: i1 = truncate t4
t2: i64,ch = CopyFromReg t0, Register:i64 %0
t10: i64,i1 = saddo t2, Constant:i64<1>
t11: i1 = or t8, t10:1
t12: i1 = select t7, t8, t11
t13: i64 = any_extend t12
t15: ch,glue = CopyToReg t0, Register:i64 $x10, t13
t16: ch = RISCVISD::RET_GLUE t15, Register:i64 $x10, t15:1
```
`OtherOpVT` should be i1, but `OtherOp->getValueType(0)` returns `i64`,
which ignores `ResNo` in `SDValue`.
Fix https://github.com/llvm/llvm-project/issues/90652.
(cherry picked from commit 2647bd73696ae987addd0e74774a44108accb1e6)
Added:
llvm/test/CodeGen/RISCV/pr90652.ll
Modified:
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Removed:
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index a0cec426002b6f..d46093b9e260a2 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -14559,7 +14559,7 @@ static SDValue tryFoldSelectIntoOp(SDNode *N,
SelectionDAG &DAG,
EVT VT = N->getValueType(0);
SDLoc DL(N);
SDValue OtherOp = TrueVal.getOperand(1 - OpToFold);
- EVT OtherOpVT = OtherOp->getValueType(0);
+ EVT OtherOpVT = OtherOp.getValueType();
SDValue IdentityOperand =
DAG.getNeutralElement(Opc, DL, OtherOpVT, N->getFlags());
if (!Commutative)
diff --git a/llvm/test/CodeGen/RISCV/pr90652.ll
b/llvm/test/CodeGen/RISCV/pr90652.ll
new file mode 100644
index 00..2162395b92ac3c
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/pr90652.ll
@@ -0,0 +1,19 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
UTC_ARGS: --version 4
+; RUN: llc < %s -mtriple=riscv64 | FileCheck %s
+
+define i1 @test(i64 %x, i1 %cond1, i1 %cond2) {
+; CHECK-LABEL: test:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT:addi a3, a0, 1
+; CHECK-NEXT:slt a0, a3, a0
+; CHECK-NEXT:not a1, a1
+; CHECK-NEXT:and a0, a1, a0
+; CHECK-NEXT:or a0, a2, a0
+; CHECK-NEXT:ret
+entry:
+ %sadd = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %x, i64 1)
+ %ov = extractvalue { i64, i1 } %sadd, 1
+ %or = or i1 %cond2, %ov
+ %sel = select i1 %cond1, i1 %cond2, i1 %or
+ ret i1 %sel
+}
___
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[llvm-branch-commits] [llvm] release/18.x: [RISCV][ISel] Fix types in `tryFoldSelectIntoOp` (#90659) (PR #90682)
https://github.com/tstellar closed https://github.com/llvm/llvm-project/pull/90682 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [libcxx] [libc++][chrono] implements UTC clock. (PR #90393)
@@ -0,0 +1,1004 @@
+//===--===//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+// UNSUPPORTED: c++03, c++11, c++14, c++17
+// UNSUPPORTED: no-filesystem, no-localization, no-tzdb
+// UNSUPPORTED: GCC-ALWAYS_INLINE-FIXME
+
+// TODO FMT This test should not require std::to_chars(floating-point)
+// XFAIL: availability-fp_to_chars-missing
+
+// XFAIL: libcpp-has-no-incomplete-tzdb
+// XFAIL: availability-tzdb-missing
+
+// REQUIRES: locale.fr_FR.UTF-8
+// REQUIRES: locale.ja_JP.UTF-8
+
+//
+
+// template
+// struct formatter, charT>;
+
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+
+#include "formatter_tests.h"
+#include "make_string.h"
+#include "platform_support.h" // locale name macros
+#include "test_macros.h"
+
+template
+static void test_no_chrono_specs() {
+ using namespace std::literals::chrono_literals;
+
+ std::locale::global(std::locale(LOCALE_fr_FR_UTF_8));
+
+ // Non localized output
+
+ // [time.syn]
+ // using nanoseconds = duration;
+ // using microseconds = duration;
+ // using milliseconds = duration;
+ // using seconds = duration;
+ // using minutes = duration>;
+ // using hours= duration>;
+ check(SV("1425-08-04 22:06:56"), SV("{}"),
std::chrono::utc_seconds(-17'179'869'184s)); // Minimum value for 35 bits.
+ check(SV("1901-12-13 20:45:52"), SV("{}"),
std::chrono::utc_seconds(-2'147'483'648s));
+
+ check(SV("1969-12-31 00:00:00"), SV("{}"), std::chrono::utc_seconds(-24h));
+ check(SV("1969-12-31 06:00:00"), SV("{}"), std::chrono::utc_seconds(-18h));
+ check(SV("1969-12-31 12:00:00"), SV("{}"), std::chrono::utc_seconds(-12h));
+ check(SV("1969-12-31 18:00:00"), SV("{}"), std::chrono::utc_seconds(-6h));
+ check(SV("1969-12-31 23:59:59"), SV("{}"), std::chrono::utc_seconds(-1s));
+
+ check(SV("1970-01-01 00:00:00"), SV("{}"), std::chrono::utc_seconds(0s));
+ check(SV("2000-01-01 00:00:00"), SV("{}"),
std::chrono::utc_seconds(946'684'800s + 22s));
+ check(SV("2000-01-01 01:02:03"), SV("{}"),
std::chrono::utc_seconds(946'688'523s + 22s));
+
+ check(SV("2038-01-19 03:14:07"), SV("{}"),
std::chrono::utc_seconds(2'147'483'647s + 27s));
+ check(SV("2514-05-30 01:53:03"),
+SV("{}"),
+std::chrono::utc_seconds(17'179'869'183s + 27s)); // Maximum value for
35 bits.
+
+ check(SV("2000-01-01 01:02:03.123"),
+SV("{}"),
+std::chrono::utc_time(946'688'523'123ms +
22s));
+
+ std::locale::global(std::locale::classic());
+}
+
+template
+static void test_valid_values_year() {
+ using namespace std::literals::chrono_literals;
+
+ constexpr std::basic_string_view fmt =
+
SV("{:%%C='%C'%t%%EC='%EC'%t%%y='%y'%t%%Oy='%Oy'%t%%Ey='%Ey'%t%%Y='%Y'%t%%EY='%EY'%n}");
+ constexpr std::basic_string_view lfmt =
+
SV("{:L%%C='%C'%t%%EC='%EC'%t%%y='%y'%t%%Oy='%Oy'%t%%Ey='%Ey'%t%%Y='%Y'%t%%EY='%EY'%n}");
+
+ const std::locale loc(LOCALE_ja_JP_UTF_8);
+ std::locale::global(std::locale(LOCALE_fr_FR_UTF_8));
+
+ // Non localized output using C-locale
+
check(SV("%C='19'\t%EC='19'\t%y='70'\t%Oy='70'\t%Ey='70'\t%Y='1970'\t%EY='1970'\n"),
+fmt,
+std::chrono::utc_seconds(0s)); // 00:00:00 UTC Thursday, 1 January 1970
+
+
check(SV("%C='20'\t%EC='20'\t%y='09'\t%Oy='09'\t%Ey='09'\t%Y='2009'\t%EY='2009'\n"),
+fmt,
+std::chrono::utc_seconds(1'234'567'890s)); // 23:31:30 UTC on Friday,
13 February 2009
+
+ // Use the global locale (fr_FR)
+
check(SV("%C='19'\t%EC='19'\t%y='70'\t%Oy='70'\t%Ey='70'\t%Y='1970'\t%EY='1970'\n"),
+lfmt,
+std::chrono::utc_seconds(0s)); // 00:00:00 UTC Thursday, 1 January 1970
+
+
check(SV("%C='20'\t%EC='20'\t%y='09'\t%Oy='09'\t%Ey='09'\t%Y='2009'\t%EY='2009'\n"),
+lfmt,
+std::chrono::utc_seconds(1'234'567'890s)); // 23:31:30 UTC on Friday,
13 February 2009
+
+ // Use supplied locale (ja_JP). This locale has a different alternate.
+#if defined(_WIN32) || defined(__APPLE__) || defined(_AIX) ||
defined(__FreeBSD__)
+ check(loc,
+
SV("%C='19'\t%EC='19'\t%y='70'\t%Oy='70'\t%Ey='70'\t%Y='1970'\t%EY='1970'\n"),
+lfmt,
+std::chrono::utc_seconds(0s)); // 00:00:00 UTC Thursday, 1 January 1970
+
+ check(loc,
+
SV("%C='20'\t%EC='20'\t%y='09'\t%Oy='09'\t%Ey='09'\t%Y='2009'\t%EY='2009'\n"),
+lfmt,
+std::chrono::utc_seconds(1'234'567'890s)); // 23:31:30 UTC on Friday,
13 February 2009
+#else // defined(_WIN32) || defined(__APPLE__) ||
defined(_AIX)||defined(__FreeBSD__)
+ check(loc,
+
SV("%C='19'\t%EC='昭和'\t%y='70'\t%Oy='七十'\t%Ey='45'\t%Y='1970'\t%EY='昭和45年'\n"),
+lfmt,
+std::chrono::utc_seconds(0s));
[llvm-branch-commits] [clang] release/18.x: [clang codegen] Fix MS ABI detection of user-provided constructors. (#90151) (PR #90639)
rnk wrote: I should point out that it is an ABI break, but it aligns with MSVC, and the benefit of the fix outweighs the cost, so we should merge it. https://github.com/llvm/llvm-project/pull/90639 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] release/18.x: [clang codegen] Fix MS ABI detection of user-provided constructors. (#90151) (PR #90639)
https://github.com/rnk approved this pull request. There's the approve button https://github.com/llvm/llvm-project/pull/90639 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/18.x: [RISCV][ISel] Fix types in `tryFoldSelectIntoOp` (#90659) (PR #90682)
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[llvm-branch-commits] [llvm] release/18.x: [GlobalISel] Fix store merging incorrectly classifying an unknown index expr as 0. (#90375) (PR #90673)
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[llvm-branch-commits] [llvm] release/18.x: [RISCV][ISel] Fix types in `tryFoldSelectIntoOp` (#90659) (PR #90682)
dtcxzyw wrote: Fixed an incorrect type inference during RISC-V instruction selection, which causes an assertion failure when trying to fold selects into their operands. https://github.com/llvm/llvm-project/pull/90682 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/18.x: [X86] Enable EVEX512 when host CPU has AVX512 (#90479) (PR #90545)
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[llvm-branch-commits] [llvm] release/18.x: [GlobalISel] Don't form anyextending atomic loads. (PR #90435)
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[llvm-branch-commits] [llvm] release/18.x: [AArch64] Remove invalid uabdl patterns. (#89272) (PR #89380)
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[llvm-branch-commits] [clang] release/18.x: [clang][CoverageMapping] do not emit a gap region when either end doesn't have valid source locations (#89564) (PR #90369)
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[llvm-branch-commits] [llvm] release/18.x: [X86][EVEX512] Check hasEVEX512 for canExtendTo512DQ (#90390) (PR #90422)
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[llvm-branch-commits] [llvm] release/18.x: [CGP] Drop poison-generating flags after hoisting (#90382) (PR #90437)
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[llvm-branch-commits] [clang] [Clang] Handle structs with inner structs and no fields (#89126) (PR #90133)
tstellar wrote: Hi @bwendling (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. When you are done, please add the release:note label to this PR. https://github.com/llvm/llvm-project/pull/90133 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/18.x: [IRCE] Skip icmp ptr in `InductiveRangeCheck::parseRangeCheckICmp` (#89967) (PR #90182)
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[llvm-branch-commits] [llvm] Backport ARM64EC variadic args fixes to LLVM 18 (PR #81800)
tstellar wrote: Hi @dpaoliello (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. When you are done, please add the release:note label to this PR. https://github.com/llvm/llvm-project/pull/81800 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] release/18.x: [clang-format] Fix a regression in ContinuationIndenter (#88414) (PR #89412)
tstellar wrote: Hi @owenca (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. When you are done, please add the release:note label to this PR. https://github.com/llvm/llvm-project/pull/89412 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] release/18.x: [clang-format] Fix a regression in annotating TrailingReturnArrow (#86624) (PR #89415)
tstellar wrote: Hi @owenca (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. When you are done, please add the release:note label to this PR. https://github.com/llvm/llvm-project/pull/89415 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [AMDGPU] Fix setting nontemporal in memory legalizer (#83815) (PR #90204)
tstellar wrote: Hi @jayfoad (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. When you are done, please add the release:note label to this PR. https://github.com/llvm/llvm-project/pull/90204 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/18.x: [DAGCombiner] Fix miscompile bug in combineShiftOfShiftedLogic (#89616) (PR #89766)
=?utf-8?q?Björn?= Pettersson Message-ID: In-Reply-To: tstellar wrote: @AtariDreams (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. When you are done, please add the release:note label to this PR. https://github.com/llvm/llvm-project/pull/89766 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [polly] release/18.x: [clang-format] Correctly annotate braces in macros (#87… (PR #89491)
tstellar wrote: @owenca (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. When you are done, please add the release:note label to this PR. https://github.com/llvm/llvm-project/pull/89491 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [libcxx] release/18.x: [libcxx] [modules] Add _LIBCPP_USING_IF_EXISTS on aligned_alloc (#89827) (PR #89894)
tstellar wrote: @mstorsjo (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. When you are done, please add the release:note label to this PR. https://github.com/llvm/llvm-project/pull/89894 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [analyzer] Backport performace regression fix (PR #89725)
tstellar wrote: Hi @steakhal (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. When you are done, please add the release:note label to this PR. https://github.com/llvm/llvm-project/pull/89725 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/18.x: [X86] Fix miscompile in combineShiftRightArithmetic (PR #86728)
tstellar wrote: Hi @AtariDreams (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. When you are done, please add the release:note label to this PR. https://github.com/llvm/llvm-project/pull/86728 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/18.x: [GlobalISel] Fix fewerElementsVectorPhi to insert after G_PHIs (#87927) (PR #89240)
tstellar wrote: Hi @AtariDreams (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. When you are done, please add the release:note label to this PR. https://github.com/llvm/llvm-project/pull/89240 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/18.x: [InstCombine] Fix unexpected overwriting in `foldSelectWithSRem` (#89539) (PR #89546)
tstellar wrote: Hi @dtcxzyw (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. When you are done, please add the release:note label to this PR. https://github.com/llvm/llvm-project/pull/89546 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] Backport fix for crash reported in #88181 (PR #89022)
tstellar wrote: Hi @steakhal (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. When you are done, please add the release:note label to this PR. https://github.com/llvm/llvm-project/pull/89022 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/18.x: [X86] Always use 64-bit relocations in no-PIC large code model (#89101) (PR #89124)
tstellar wrote: Hi @aeubanks (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. When you are done, please add the release:note label to this PR. https://github.com/llvm/llvm-project/pull/89124 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] release/18.x: [clang][CoverageMapping] do not emit a gap region when either end doesn't have valid source locations (#89564) (PR #90369)
whentojump wrote: > Hi @whentojump (or anyone else). If you would like to add a note about this > fix in the release notes (completely optional). Please reply to this comment > with a one or two sentence description of the fix. When you are done, please > add the release:note label to this PR. Fixes a Clang assertion failure caused by emitting gap coverage mapping regions between statements with . https://github.com/llvm/llvm-project/pull/90369 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [CallGraphSection] Add call graph section options and documentation (PR #87572)
https://github.com/Prabhuk updated https://github.com/llvm/llvm-project/pull/87572 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [CallGraphSection] Add call graph section options and documentation (PR #87572)
https://github.com/Prabhuk updated https://github.com/llvm/llvm-project/pull/87572 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [clang][CallGraphSection] Add type id metadata to indirect call and targets (PR #87573)
https://github.com/Prabhuk updated
https://github.com/llvm/llvm-project/pull/87573
>From a8a5848885e12c771f12cfa33b4dbc6a0272e925 Mon Sep 17 00:00:00 2001
From: Prabhuk
Date: Mon, 22 Apr 2024 11:34:04 -0700
Subject: [PATCH 1/3] Update clang/lib/CodeGen/CodeGenModule.cpp
Cleaner if checks.
Co-authored-by: Matt Arsenault
---
clang/lib/CodeGen/CodeGenModule.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/clang/lib/CodeGen/CodeGenModule.cpp
b/clang/lib/CodeGen/CodeGenModule.cpp
index e19bbee996f582..ff1586d2fa8abe 100644
--- a/clang/lib/CodeGen/CodeGenModule.cpp
+++ b/clang/lib/CodeGen/CodeGenModule.cpp
@@ -2711,7 +2711,7 @@ void
CodeGenModule::CreateFunctionTypeMetadataForIcall(const FunctionDecl *FD,
void CodeGenModule::CreateFunctionTypeMetadataForIcall(const QualType &QT,
llvm::CallBase *CB) {
// Only if needed for call graph section and only for indirect calls.
- if (!(CodeGenOpts.CallGraphSection && CB && CB->isIndirectCall()))
+ if (!CodeGenOpts.CallGraphSection || !CB || !CB->isIndirectCall())
return;
auto *MD = CreateMetadataIdentifierGeneralized(QT);
>From 019b2ca5e1c263183ed114e0b967b4e77b4a17a8 Mon Sep 17 00:00:00 2001
From: Prabhuk
Date: Mon, 22 Apr 2024 11:34:31 -0700
Subject: [PATCH 2/3] Update clang/lib/CodeGen/CodeGenModule.cpp
Update the comments as suggested.
Co-authored-by: Matt Arsenault
---
clang/lib/CodeGen/CodeGenModule.cpp | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/clang/lib/CodeGen/CodeGenModule.cpp
b/clang/lib/CodeGen/CodeGenModule.cpp
index ff1586d2fa8abe..5635a87d2358a7 100644
--- a/clang/lib/CodeGen/CodeGenModule.cpp
+++ b/clang/lib/CodeGen/CodeGenModule.cpp
@@ -2680,9 +2680,9 @@ void
CodeGenModule::CreateFunctionTypeMetadataForIcall(const FunctionDecl *FD,
bool EmittedMDIdGeneralized = false;
if (CodeGenOpts.CallGraphSection &&
(!F->hasLocalLinkage() ||
- F->getFunction().hasAddressTaken(nullptr, /* IgnoreCallbackUses */ true,
-/* IgnoreAssumeLikeCalls */ true,
-/* IgnoreLLVMUsed */ false))) {
+ F->getFunction().hasAddressTaken(nullptr, /*IgnoreCallbackUses=*/ true,
+/*IgnoreAssumeLikeCalls=*/ true,
+/*IgnoreLLVMUsed=*/ false))) {
F->addTypeMetadata(0, CreateMetadataIdentifierGeneralized(FD->getType()));
EmittedMDIdGeneralized = true;
}
>From 99242900c51778abd4b7e7f4361b09202b7abcda Mon Sep 17 00:00:00 2001
From: Prabhuk
Date: Mon, 29 Apr 2024 11:53:40 -0700
Subject: [PATCH 3/3] dyn_cast to isa
Created using spr 1.3.6-beta.1
---
clang/lib/CodeGen/CGCall.cpp | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/clang/lib/CodeGen/CGCall.cpp b/clang/lib/CodeGen/CGCall.cpp
index 526a63b24ff834..45033ced1d8344 100644
--- a/clang/lib/CodeGen/CGCall.cpp
+++ b/clang/lib/CodeGen/CGCall.cpp
@@ -5713,8 +5713,8 @@ RValue CodeGenFunction::EmitCall(const CGFunctionInfo
&CallInfo,
if (callOrInvoke && *callOrInvoke && (*callOrInvoke)->isIndirectCall()) {
if (const FunctionDecl *FD = dyn_cast_or_null(TargetDecl))
{
// Type id metadata is set only for C/C++ contexts.
-if (dyn_cast(FD) || dyn_cast(FD) ||
-dyn_cast(FD)) {
+if (isa(FD) || isa(FD) ||
+isa(FD)) {
CGM.CreateFunctionTypeMetadataForIcall(FD->getType(), *callOrInvoke);
}
}
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[llvm-branch-commits] [clang] [clang][CallGraphSection] Add type id metadata to indirect call and targets (PR #87573)
https://github.com/Prabhuk updated
https://github.com/llvm/llvm-project/pull/87573
>From a8a5848885e12c771f12cfa33b4dbc6a0272e925 Mon Sep 17 00:00:00 2001
From: Prabhuk
Date: Mon, 22 Apr 2024 11:34:04 -0700
Subject: [PATCH 1/3] Update clang/lib/CodeGen/CodeGenModule.cpp
Cleaner if checks.
Co-authored-by: Matt Arsenault
---
clang/lib/CodeGen/CodeGenModule.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/clang/lib/CodeGen/CodeGenModule.cpp
b/clang/lib/CodeGen/CodeGenModule.cpp
index e19bbee996f582..ff1586d2fa8abe 100644
--- a/clang/lib/CodeGen/CodeGenModule.cpp
+++ b/clang/lib/CodeGen/CodeGenModule.cpp
@@ -2711,7 +2711,7 @@ void
CodeGenModule::CreateFunctionTypeMetadataForIcall(const FunctionDecl *FD,
void CodeGenModule::CreateFunctionTypeMetadataForIcall(const QualType &QT,
llvm::CallBase *CB) {
// Only if needed for call graph section and only for indirect calls.
- if (!(CodeGenOpts.CallGraphSection && CB && CB->isIndirectCall()))
+ if (!CodeGenOpts.CallGraphSection || !CB || !CB->isIndirectCall())
return;
auto *MD = CreateMetadataIdentifierGeneralized(QT);
>From 019b2ca5e1c263183ed114e0b967b4e77b4a17a8 Mon Sep 17 00:00:00 2001
From: Prabhuk
Date: Mon, 22 Apr 2024 11:34:31 -0700
Subject: [PATCH 2/3] Update clang/lib/CodeGen/CodeGenModule.cpp
Update the comments as suggested.
Co-authored-by: Matt Arsenault
---
clang/lib/CodeGen/CodeGenModule.cpp | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/clang/lib/CodeGen/CodeGenModule.cpp
b/clang/lib/CodeGen/CodeGenModule.cpp
index ff1586d2fa8abe..5635a87d2358a7 100644
--- a/clang/lib/CodeGen/CodeGenModule.cpp
+++ b/clang/lib/CodeGen/CodeGenModule.cpp
@@ -2680,9 +2680,9 @@ void
CodeGenModule::CreateFunctionTypeMetadataForIcall(const FunctionDecl *FD,
bool EmittedMDIdGeneralized = false;
if (CodeGenOpts.CallGraphSection &&
(!F->hasLocalLinkage() ||
- F->getFunction().hasAddressTaken(nullptr, /* IgnoreCallbackUses */ true,
-/* IgnoreAssumeLikeCalls */ true,
-/* IgnoreLLVMUsed */ false))) {
+ F->getFunction().hasAddressTaken(nullptr, /*IgnoreCallbackUses=*/ true,
+/*IgnoreAssumeLikeCalls=*/ true,
+/*IgnoreLLVMUsed=*/ false))) {
F->addTypeMetadata(0, CreateMetadataIdentifierGeneralized(FD->getType()));
EmittedMDIdGeneralized = true;
}
>From 99242900c51778abd4b7e7f4361b09202b7abcda Mon Sep 17 00:00:00 2001
From: Prabhuk
Date: Mon, 29 Apr 2024 11:53:40 -0700
Subject: [PATCH 3/3] dyn_cast to isa
Created using spr 1.3.6-beta.1
---
clang/lib/CodeGen/CGCall.cpp | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/clang/lib/CodeGen/CGCall.cpp b/clang/lib/CodeGen/CGCall.cpp
index 526a63b24ff834..45033ced1d8344 100644
--- a/clang/lib/CodeGen/CGCall.cpp
+++ b/clang/lib/CodeGen/CGCall.cpp
@@ -5713,8 +5713,8 @@ RValue CodeGenFunction::EmitCall(const CGFunctionInfo
&CallInfo,
if (callOrInvoke && *callOrInvoke && (*callOrInvoke)->isIndirectCall()) {
if (const FunctionDecl *FD = dyn_cast_or_null(TargetDecl))
{
// Type id metadata is set only for C/C++ contexts.
-if (dyn_cast(FD) || dyn_cast(FD) ||
-dyn_cast(FD)) {
+if (isa(FD) || isa(FD) ||
+isa(FD)) {
CGM.CreateFunctionTypeMetadataForIcall(FD->getType(), *callOrInvoke);
}
}
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[llvm-branch-commits] [CallSiteInfo][CallGraphSection] Extend CallSiteInfo with TypeId (PR #87574)
https://github.com/Prabhuk updated https://github.com/llvm/llvm-project/pull/87574 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [CallSiteInfo][CallGraphSection] Extend CallSiteInfo with TypeId (PR #87574)
https://github.com/Prabhuk updated https://github.com/llvm/llvm-project/pull/87574 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [CallSiteInfo][CallGraphSection] Extract and propagate indirect call type ids (PR #87575)
https://github.com/Prabhuk updated https://github.com/llvm/llvm-project/pull/87575 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [CallSiteInfo][CallGraphSection] Extract and propagate indirect call type ids (PR #87575)
https://github.com/Prabhuk updated https://github.com/llvm/llvm-project/pull/87575 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [AsmPrinter][CallGraphSection] Emit call graph section (PR #87576)
https://github.com/Prabhuk updated https://github.com/llvm/llvm-project/pull/87576 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [AsmPrinter][CallGraphSection] Emit call graph section (PR #87576)
https://github.com/Prabhuk updated https://github.com/llvm/llvm-project/pull/87576 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [clang][CallGraphSection] Add type id metadata to indirect call and targets (PR #87573)
@@ -6003,6 +6003,11 @@ RValue CodeGenFunction::EmitCall(QualType CalleeType, const CGCallee &OrigCallee } } + // Set type identifier metadata of indirect calls for call graph section. + if (CGM.getCodeGenOpts().CallGraphSection && CallOrInvoke && + CallOrInvoke->isIndirectCall()) Prabhuk wrote: Verified that it is in scope. https://github.com/llvm/llvm-project/pull/87573 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [clang][CallGraphSection] Add type id metadata to indirect call and targets (PR #87573)
@@ -5687,6 +5688,39 @@ RValue CodeGenFunction::EmitCall(const CGFunctionInfo
&CallInfo,
AllocAlignAttrEmitter AllocAlignAttrEmitter(*this, TargetDecl, CallArgs);
Attrs = AllocAlignAttrEmitter.TryEmitAsCallSiteAttribute(Attrs);
+ if (CGM.getCodeGenOpts().CallGraphSection) {
+// FIXME: create operand bundle only for indirect calls, not for all
+
+assert((TargetDecl && TargetDecl->getFunctionType() ||
+Callee.getAbstractInfo().getCalleeFunctionProtoType()) &&
+ "cannot find callsite type");
+
+QualType CST;
+if (TargetDecl && TargetDecl->getFunctionType())
+ CST = QualType(TargetDecl->getFunctionType(), 0);
+else if (const auto *FPT =
+ Callee.getAbstractInfo().getCalleeFunctionProtoType())
+ CST = QualType(FPT, 0);
+
+if (!CST.isNull()) {
+ auto *TypeIdMD = CGM.CreateMetadataIdentifierGeneralized(CST);
+ auto *TypeIdMDVal =
+ llvm::MetadataAsValue::get(getLLVMContext(), TypeIdMD);
+ BundleList.emplace_back("type", TypeIdMDVal);
+}
+
+// Set type identifier metadata of indirect calls for call graph section.
+if (callOrInvoke && *callOrInvoke && (*callOrInvoke)->isIndirectCall()) {
+ if (const FunctionDecl *FD = dyn_cast_or_null(TargetDecl))
{
+// Type id metadata is set only for C/C++ contexts.
+if (isa(FD) || isa(FD) ||
+isa(FD)) {
Prabhuk wrote:
Done. PTAL
https://github.com/llvm/llvm-project/pull/87573
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[llvm-branch-commits] [CallSiteInfo][CallGraphSection] Extract and propagate indirect call type ids (PR #87575)
@@ -488,6 +490,38 @@ class LLVM_EXTERNAL_VISIBILITY MachineFunction {
/// Callee type id.
ConstantInt *TypeId = nullptr;
+
+CallSiteInfo() {}
+
+/// Extracts the numeric type id from the CallBase's type operand bundle,
+/// and sets TypeId. This is used as type id for the indirect call in the
+/// call graph section.
+CallSiteInfo(const CallBase &CB) {
+ // Call graph section needs numeric type id only for indirect calls.
+ if (!CB.isIndirectCall())
+return;
+
+ auto Opt = CB.getOperandBundle(LLVMContext::OB_type);
+ if (!Opt.has_value()) {
+errs() << "warning: cannot find indirect call type operand bundle for
"
+ "call graph section\n";
+return;
Prabhuk wrote:
Thank you. Removed the WARNING message here.
https://github.com/llvm/llvm-project/pull/87575
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[llvm-branch-commits] [CallSiteInfo][CallGraphSection] Extract and propagate indirect call type ids (PR #87575)
@@ -0,0 +1,39 @@ +; Tests that call site type ids can be extracted and set from type operand +; bundles. + +; Verify the exact typeId value to ensure it is not garbage but the value +; computed as the type id from the type operand bundle. +; RUN: llc --call-graph-section -mtriple arm-linux-gnu %s -stop-before=finalize-isel -o - | FileCheck %s + +; ModuleID = 'test.c' +source_filename = "test.c" +target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64" +target triple = "armv4t-unknown-linux-gnu" Prabhuk wrote: Done. https://github.com/llvm/llvm-project/pull/87575 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [CallSiteInfo][CallGraphSection] Extract and propagate indirect call type ids (PR #87575)
@@ -0,0 +1,39 @@
+; Tests that call site type ids can be extracted and set from type operand
+; bundles.
+
+; Verify the exact typeId value to ensure it is not garbage but the value
+; computed as the type id from the type operand bundle.
+; RUN: llc --call-graph-section -mtriple arm-linux-gnu %s
-stop-before=finalize-isel -o - | FileCheck %s
+
+; ModuleID = 'test.c'
+source_filename = "test.c"
+target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
+target triple = "armv4t-unknown-linux-gnu"
+
+define dso_local void @foo(i8 signext %a) !type !3 {
+entry:
+ ret void
+}
+
+; CHECK: name: main
+define dso_local i32 @main() !type !4 {
+entry:
+ %retval = alloca i32, align 4
+ %fp = alloca void (i8)*, align 8
+ store i32 0, i32* %retval, align 4
+ store void (i8)* @foo, void (i8)** %fp, align 8
+ %0 = load void (i8)*, void (i8)** %fp, align 8
Prabhuk wrote:
Done.
https://github.com/llvm/llvm-project/pull/87575
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[llvm-branch-commits] [clang] release/18.x: [clang codegen] Fix MS ABI detection of user-provided constructors. (#90151) (PR #90639)
tstellar wrote: @efriedma-quic (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. When you are done, please add the release:note label to this PR. https://github.com/llvm/llvm-project/pull/90639 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] release/18.x: [clang codegen] Fix MS ABI detection of user-provided constructors. (#90151) (PR #90639)
https://github.com/tstellar updated
https://github.com/llvm/llvm-project/pull/90639
>From 617a15a9eac96088ae5e9134248d8236e34b91b1 Mon Sep 17 00:00:00 2001
From: Eli Friedman
Date: Mon, 29 Apr 2024 12:00:12 -0700
Subject: [PATCH] [clang codegen] Fix MS ABI detection of user-provided
constructors. (#90151)
In the context of determining whether a class counts as an "aggregate",
a constructor template counts as a user-provided constructor.
Fixes #86384
(cherry picked from commit 3ab4ae9e58c09dfd8203547ba8916f3458a0a481)
---
clang/docs/ReleaseNotes.rst | 6 ++
clang/lib/CodeGen/MicrosoftCXXABI.cpp| 12 +---
clang/test/CodeGen/arm64-microsoft-arguments.cpp | 15 +++
3 files changed, 30 insertions(+), 3 deletions(-)
diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index 1e88b58725bd95..e533ecfd5aeba5 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -149,6 +149,12 @@ ABI Changes in This Version
- Following the SystemV ABI for x86-64, ``__int128`` arguments will no longer
be split between a register and a stack slot.
+- Fixed Microsoft calling convention for returning certain classes with a
+ templated constructor. If a class has a templated constructor, it should
+ be returned indirectly even if it meets all the other requirements for
+ returning a class in a register. This affects some uses of std::pair.
+ (#GH86384).
+
AST Dumping Potentially Breaking Changes
- When dumping a sugared type, Clang will no longer print the desugared type if
diff --git a/clang/lib/CodeGen/MicrosoftCXXABI.cpp
b/clang/lib/CodeGen/MicrosoftCXXABI.cpp
index 172c4c937b9728..4d0f4c63f843b8 100644
--- a/clang/lib/CodeGen/MicrosoftCXXABI.cpp
+++ b/clang/lib/CodeGen/MicrosoftCXXABI.cpp
@@ -1135,9 +1135,15 @@ static bool isTrivialForMSVC(const CXXRecordDecl *RD,
QualType Ty,
return false;
if (RD->hasNonTrivialCopyAssignment())
return false;
- for (const CXXConstructorDecl *Ctor : RD->ctors())
-if (Ctor->isUserProvided())
- return false;
+ for (const Decl *D : RD->decls()) {
+if (auto *Ctor = dyn_cast(D)) {
+ if (Ctor->isUserProvided())
+return false;
+} else if (auto *Template = dyn_cast(D)) {
+ if (isa(Template->getTemplatedDecl()))
+return false;
+}
+ }
if (RD->hasNonTrivialDestructor())
return false;
return true;
diff --git a/clang/test/CodeGen/arm64-microsoft-arguments.cpp
b/clang/test/CodeGen/arm64-microsoft-arguments.cpp
index e8309888dcfe21..85472645acb3b3 100644
--- a/clang/test/CodeGen/arm64-microsoft-arguments.cpp
+++ b/clang/test/CodeGen/arm64-microsoft-arguments.cpp
@@ -201,3 +201,18 @@ S11 f11() {
S11 x;
return func11(x);
}
+
+// GH86384
+// Pass and return object with template constructor (pass directly,
+// return indirectly).
+// CHECK: define dso_local void @"?f12@@YA?AUS12@@XZ"(ptr dead_on_unwind inreg
noalias writable sret(%struct.S12) align 4 {{.*}})
+// CHECK: call void @"?func12@@YA?AUS12@@U1@@Z"(ptr dead_on_unwind inreg
writable sret(%struct.S12) align 4 {{.*}}, i64 {{.*}})
+struct S12 {
+ template S12(T*) {}
+ int x;
+};
+S12 func12(S12 x);
+S12 f12() {
+ S12 x((int*)0);
+ return func12(x);
+}
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[llvm-branch-commits] [clang] 617a15a - [clang codegen] Fix MS ABI detection of user-provided constructors. (#90151)
Author: Eli Friedman
Date: 2024-05-01T15:56:33-07:00
New Revision: 617a15a9eac96088ae5e9134248d8236e34b91b1
URL:
https://github.com/llvm/llvm-project/commit/617a15a9eac96088ae5e9134248d8236e34b91b1
DIFF:
https://github.com/llvm/llvm-project/commit/617a15a9eac96088ae5e9134248d8236e34b91b1.diff
LOG: [clang codegen] Fix MS ABI detection of user-provided constructors.
(#90151)
In the context of determining whether a class counts as an "aggregate",
a constructor template counts as a user-provided constructor.
Fixes #86384
(cherry picked from commit 3ab4ae9e58c09dfd8203547ba8916f3458a0a481)
Added:
Modified:
clang/docs/ReleaseNotes.rst
clang/lib/CodeGen/MicrosoftCXXABI.cpp
clang/test/CodeGen/arm64-microsoft-arguments.cpp
Removed:
diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index 1e88b58725bd95..e533ecfd5aeba5 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -149,6 +149,12 @@ ABI Changes in This Version
- Following the SystemV ABI for x86-64, ``__int128`` arguments will no longer
be split between a register and a stack slot.
+- Fixed Microsoft calling convention for returning certain classes with a
+ templated constructor. If a class has a templated constructor, it should
+ be returned indirectly even if it meets all the other requirements for
+ returning a class in a register. This affects some uses of std::pair.
+ (#GH86384).
+
AST Dumping Potentially Breaking Changes
- When dumping a sugared type, Clang will no longer print the desugared type if
diff --git a/clang/lib/CodeGen/MicrosoftCXXABI.cpp
b/clang/lib/CodeGen/MicrosoftCXXABI.cpp
index 172c4c937b9728..4d0f4c63f843b8 100644
--- a/clang/lib/CodeGen/MicrosoftCXXABI.cpp
+++ b/clang/lib/CodeGen/MicrosoftCXXABI.cpp
@@ -1135,9 +1135,15 @@ static bool isTrivialForMSVC(const CXXRecordDecl *RD,
QualType Ty,
return false;
if (RD->hasNonTrivialCopyAssignment())
return false;
- for (const CXXConstructorDecl *Ctor : RD->ctors())
-if (Ctor->isUserProvided())
- return false;
+ for (const Decl *D : RD->decls()) {
+if (auto *Ctor = dyn_cast(D)) {
+ if (Ctor->isUserProvided())
+return false;
+} else if (auto *Template = dyn_cast(D)) {
+ if (isa(Template->getTemplatedDecl()))
+return false;
+}
+ }
if (RD->hasNonTrivialDestructor())
return false;
return true;
diff --git a/clang/test/CodeGen/arm64-microsoft-arguments.cpp
b/clang/test/CodeGen/arm64-microsoft-arguments.cpp
index e8309888dcfe21..85472645acb3b3 100644
--- a/clang/test/CodeGen/arm64-microsoft-arguments.cpp
+++ b/clang/test/CodeGen/arm64-microsoft-arguments.cpp
@@ -201,3 +201,18 @@ S11 f11() {
S11 x;
return func11(x);
}
+
+// GH86384
+// Pass and return object with template constructor (pass directly,
+// return indirectly).
+// CHECK: define dso_local void @"?f12@@YA?AUS12@@XZ"(ptr dead_on_unwind inreg
noalias writable sret(%struct.S12) align 4 {{.*}})
+// CHECK: call void @"?func12@@YA?AUS12@@U1@@Z"(ptr dead_on_unwind inreg
writable sret(%struct.S12) align 4 {{.*}}, i64 {{.*}})
+struct S12 {
+ template S12(T*) {}
+ int x;
+};
+S12 func12(S12 x);
+S12 f12() {
+ S12 x((int*)0);
+ return func12(x);
+}
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[llvm-branch-commits] [clang] release/18.x: [clang codegen] Fix MS ABI detection of user-provided constructors. (#90151) (PR #90639)
https://github.com/tstellar closed https://github.com/llvm/llvm-project/pull/90639 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm][NFC] Document cl::opt variable and fix typo (PR #90670)
ilovepi wrote: > LGTM, thanks! > > For the title, it might be clearer to explicitly mention the variable this is > documenting, commit title size permitting Ah, good suggestion. I'll take care of that tomorrow, when I'm in front of my computer again. https://github.com/llvm/llvm-project/pull/90670 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/18.x: [InterleavedLoadCombine] Bail out on non-byte-sized vector element type (#90705) (PR #90805)
https://github.com/llvmbot created
https://github.com/llvm/llvm-project/pull/90805
Backport d484c4d3501a7ff3d00a6e0cfad026a3b01d320c
Requested by: @nikic
>From 8bbe1d7601f2f805ff0b9d108c640b068033a01d Mon Sep 17 00:00:00 2001
From: Nikita Popov
Date: Thu, 2 May 2024 09:38:09 +0900
Subject: [PATCH] [InterleavedLoadCombine] Bail out on non-byte-sized vector
element type (#90705)
Vectors are always tightly packed, and elements of non-byte-sized
usually do not have a well-defined (byte) offset.
Fixes https://github.com/llvm/llvm-project/issues/90695.
(cherry picked from commit d484c4d3501a7ff3d00a6e0cfad026a3b01d320c)
---
.../CodeGen/InterleavedLoadCombinePass.cpp| 3 +++
.../interleaved-load-combine-pr90695.ll | 19 +++
2 files changed, 22 insertions(+)
create mode 100644
llvm/test/CodeGen/AArch64/interleaved-load-combine-pr90695.ll
diff --git a/llvm/lib/CodeGen/InterleavedLoadCombinePass.cpp
b/llvm/lib/CodeGen/InterleavedLoadCombinePass.cpp
index f2d5c3c867c2dd..bbb0b654dc67ba 100644
--- a/llvm/lib/CodeGen/InterleavedLoadCombinePass.cpp
+++ b/llvm/lib/CodeGen/InterleavedLoadCombinePass.cpp
@@ -877,6 +877,9 @@ struct VectorInfo {
if (LI->isAtomic())
return false;
+if (!DL.typeSizeEqualsStoreSize(Result.VTy->getElementType()))
+ return false;
+
// Get the base polynomial
computePolynomialFromPointer(*LI->getPointerOperand(), Offset, BasePtr,
DL);
diff --git a/llvm/test/CodeGen/AArch64/interleaved-load-combine-pr90695.ll
b/llvm/test/CodeGen/AArch64/interleaved-load-combine-pr90695.ll
new file mode 100644
index 00..ee75b3a083f713
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/interleaved-load-combine-pr90695.ll
@@ -0,0 +1,19 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
UTC_ARGS: --version 4
+; RUN: opt -S -passes=interleaved-load-combine < %s | FileCheck %s
+
+target triple = "aarch64-unknown-windows-gnu"
+
+; Make sure we don't crash on loads of vectors of non-byte-sized types.
+define <4 x i1> @test(ptr %p) {
+; CHECK-LABEL: define <4 x i1> @test(
+; CHECK-SAME: ptr [[P:%.*]]) {
+; CHECK-NEXT: entry:
+; CHECK-NEXT:[[LOAD:%.*]] = load <2 x i1>, ptr [[P]], align 1
+; CHECK-NEXT:[[SHUF:%.*]] = shufflevector <2 x i1> [[LOAD]], <2 x i1>
zeroinitializer, <4 x i32>
+; CHECK-NEXT:ret <4 x i1> [[SHUF]]
+;
+entry:
+ %load = load <2 x i1>, ptr %p, align 1
+ %shuf = shufflevector <2 x i1> %load, <2 x i1> zeroinitializer, <4 x i32>
+ ret <4 x i1> %shuf
+}
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[llvm-branch-commits] [llvm] release/18.x: [InterleavedLoadCombine] Bail out on non-byte-sized vector element type (#90705) (PR #90805)
https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/90805 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/18.x: [InterleavedLoadCombine] Bail out on non-byte-sized vector element type (#90705) (PR #90805)
llvmbot wrote: @andrewrk What do you think about merging this PR to the release branch? https://github.com/llvm/llvm-project/pull/90805 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/18.x: [InterleavedLoadCombine] Bail out on non-byte-sized vector element type (#90705) (PR #90805)
llvmbot wrote:
@llvm/pr-subscribers-backend-aarch64
Author: None (llvmbot)
Changes
Backport d484c4d3501a7ff3d00a6e0cfad026a3b01d320c
Requested by: @nikic
---
Full diff: https://github.com/llvm/llvm-project/pull/90805.diff
2 Files Affected:
- (modified) llvm/lib/CodeGen/InterleavedLoadCombinePass.cpp (+3)
- (added) llvm/test/CodeGen/AArch64/interleaved-load-combine-pr90695.ll (+19)
``diff
diff --git a/llvm/lib/CodeGen/InterleavedLoadCombinePass.cpp
b/llvm/lib/CodeGen/InterleavedLoadCombinePass.cpp
index f2d5c3c867c2dd..bbb0b654dc67ba 100644
--- a/llvm/lib/CodeGen/InterleavedLoadCombinePass.cpp
+++ b/llvm/lib/CodeGen/InterleavedLoadCombinePass.cpp
@@ -877,6 +877,9 @@ struct VectorInfo {
if (LI->isAtomic())
return false;
+if (!DL.typeSizeEqualsStoreSize(Result.VTy->getElementType()))
+ return false;
+
// Get the base polynomial
computePolynomialFromPointer(*LI->getPointerOperand(), Offset, BasePtr,
DL);
diff --git a/llvm/test/CodeGen/AArch64/interleaved-load-combine-pr90695.ll
b/llvm/test/CodeGen/AArch64/interleaved-load-combine-pr90695.ll
new file mode 100644
index 00..ee75b3a083f713
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/interleaved-load-combine-pr90695.ll
@@ -0,0 +1,19 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
UTC_ARGS: --version 4
+; RUN: opt -S -passes=interleaved-load-combine < %s | FileCheck %s
+
+target triple = "aarch64-unknown-windows-gnu"
+
+; Make sure we don't crash on loads of vectors of non-byte-sized types.
+define <4 x i1> @test(ptr %p) {
+; CHECK-LABEL: define <4 x i1> @test(
+; CHECK-SAME: ptr [[P:%.*]]) {
+; CHECK-NEXT: entry:
+; CHECK-NEXT:[[LOAD:%.*]] = load <2 x i1>, ptr [[P]], align 1
+; CHECK-NEXT:[[SHUF:%.*]] = shufflevector <2 x i1> [[LOAD]], <2 x i1>
zeroinitializer, <4 x i32>
+; CHECK-NEXT:ret <4 x i1> [[SHUF]]
+;
+entry:
+ %load = load <2 x i1>, ptr %p, align 1
+ %shuf = shufflevector <2 x i1> %load, <2 x i1> zeroinitializer, <4 x i32>
+ ret <4 x i1> %shuf
+}
``
https://github.com/llvm/llvm-project/pull/90805
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