[llvm-branch-commits] [clang] Fix override keyword being print to the left side (PR #88453)
Sirraide wrote: > The branch is marked as `Changes requested` but no change was pointed in the > code. Is everything correct? That’s just because Aaron didn’t submit another review, so github still marks it as ‘changes requested’; seeing as it has been approved, the rest is now up to the release manager. https://github.com/llvm/llvm-project/pull/88453 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/18.x [SelectionDAG] Prevent combination on inconsistent type in 'carryDiamond' (PR #86697)
https://github.com/arsenm approved this pull request. https://github.com/llvm/llvm-project/pull/86697 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/18.x: [X86] Fix miscompile in combineShiftRightArithmetic (PR #86728)
phoebewang wrote: > @phoebewang What do you think about backporting this? I didn't review on it. Maybe @topperc can evaluate it. https://github.com/llvm/llvm-project/pull/86728 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] release/18.x [X86_64] fix SSE type error in vaarg (PR #86698)
phoebewang wrote: > @phoebewang What do you think about backporting this? I think the patch doesn't fix all problem in #86371, suggest to reevaluate it. @efriedma-quic may take another look. https://github.com/llvm/llvm-project/pull/86698 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] release/18.x [X86_64] fix SSE type error in vaarg (PR #86698)
RKSimon wrote: What are the current rules on cherry picks for old bugs? AFAICT this patch wasn't fixing a bug introduced in the 17.x-18.x development region. https://github.com/llvm/llvm-project/pull/86698 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] release/18.x [X86_64] fix SSE type error in vaarg (PR #86698)
AaronBallman wrote: > What are the current rules on cherry picks for old bugs? AFAICT this patch > wasn't fixing a bug introduced in the 17.x-18.x development region. https://releases.llvm.org/17.0.1/docs/HowToReleaseLLVM.html#release-patch-rules has the documented rules. https://github.com/llvm/llvm-project/pull/86698 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] Fix override keyword being print to the left side (PR #88453)
https://github.com/AaronBallman approved this pull request. Sorry about leaving it in a "requests changes" state, LGTM! https://github.com/llvm/llvm-project/pull/88453 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [flang] [Flang][OpenMP][MLIR] Initial derived type member map support (PR #82853)
agozillon wrote: Back from vacation, would very much love if a kind reviewer or two could please allocate some time to review this PR stack so I can hopefully move it further along in the next few weeks :-) Thank you ahead of time! https://github.com/llvm/llvm-project/pull/82853 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lld] [llvm] release/18.x: [LoongArch] Use R_LARCH_ALIGN with section symbol (#84741) (PR #88891)
https://github.com/llvmbot created
https://github.com/llvm/llvm-project/pull/88891
Backport 01f79899ba349a0200586c8d05f5e22cca2ced31
Requested by: @SixWeining
>From 1041f4e7ea510a014cf63a13861365806851f8d9 Mon Sep 17 00:00:00 2001
From: Jinyang He
Date: Tue, 16 Apr 2024 18:31:03 +0800
Subject: [PATCH] [LoongArch] Use R_LARCH_ALIGN with section symbol (#84741)
In LoongArch psABI v2.30, the R_LARCH_ALIGN requires symbol index to
support the third parameter of alignment directive. Create symbol for
each section is redundant because they have section symbol which can
also be used as symbol index. So use section symbol directly for
R_LARCH_ALIGN.
(cherry picked from commit 01f79899ba349a0200586c8d05f5e22cca2ced31)
---
lld/ELF/InputSection.cpp | 6 +++-
lld/test/ELF/loongarch-relax-align-ldr.s | 28 +++
lld/test/ELF/loongarch-relax-emit-relocs.s| 5 ++--
.../MCTargetDesc/LoongArchAsmBackend.cpp | 7 ++---
.../MC/LoongArch/Relocations/relax-addsub.s | 2 +-
.../MC/LoongArch/Relocations/relax-align.s| 14 ++
6 files changed, 47 insertions(+), 15 deletions(-)
create mode 100644 lld/test/ELF/loongarch-relax-align-ldr.s
diff --git a/lld/ELF/InputSection.cpp b/lld/ELF/InputSection.cpp
index e033a715b59214..313a19426a5e20 100644
--- a/lld/ELF/InputSection.cpp
+++ b/lld/ELF/InputSection.cpp
@@ -462,7 +462,11 @@ void InputSection::copyRelocations(uint8_t *buf,
addend += sec->getFile()->mipsGp0;
}
- if (RelTy::IsRela)
+ if (config->emachine == EM_LOONGARCH && type == R_LARCH_ALIGN)
+// LoongArch psABI v2.30, the R_LARCH_ALIGN requires symbol index.
+// If it use the section symbol, the addend should not be changed.
+p->r_addend = addend;
+ else if (RelTy::IsRela)
p->r_addend = sym.getVA(addend) - section->getOutputSection()->addr;
// For SHF_ALLOC sections relocated by REL, append a relocation to
// sec->relocations so that relocateAlloc transitively called by
diff --git a/lld/test/ELF/loongarch-relax-align-ldr.s
b/lld/test/ELF/loongarch-relax-align-ldr.s
new file mode 100644
index 00..6534dc906cfd02
--- /dev/null
+++ b/lld/test/ELF/loongarch-relax-align-ldr.s
@@ -0,0 +1,28 @@
+# REQUIRES: loongarch
+## Test `ld -r` not changes the addend of R_LARCH_ALIGN.
+
+# RUN: llvm-mc --filetype=obj --triple=loongarch64 --mattr=+relax %s -o %t.64.o
+# RUN: ld.lld -r %t.64.o %t.64.o -o %t.64.r
+# RUN: llvm-objdump -dr --no-show-raw-insn %t.64.r | FileCheck %s
+
+# CHECK: <.text>:
+# CHECK-NEXT: break 1
+# CHECK-NEXT: nop
+# CHECK-NEXT: {{0*}}04: R_LARCH_ALIGN.text+0x804
+# CHECK-NEXT: nop
+# CHECK-NEXT: nop
+# CHECK-NEXT: break 2
+# CHECK-NEXT: break 0
+# CHECK-NEXT: break 0
+# CHECK-NEXT: break 0
+# CHECK-NEXT: break 1
+# CHECK-NEXT: nop
+# CHECK-NEXT: {{0*}}24: R_LARCH_ALIGN.text+0x804
+# CHECK-NEXT: nop
+# CHECK-NEXT: nop
+# CHECK-NEXT: break 2
+
+.text
+break 1
+.p2align 4, , 8
+break 2
diff --git a/lld/test/ELF/loongarch-relax-emit-relocs.s
b/lld/test/ELF/loongarch-relax-emit-relocs.s
index 581fce8c95caa4..9007f8fcc114f0 100644
--- a/lld/test/ELF/loongarch-relax-emit-relocs.s
+++ b/lld/test/ELF/loongarch-relax-emit-relocs.s
@@ -25,7 +25,7 @@
# CHECK-NEXT: R_LARCH_PCALA_LO12 _start
# CHECK-NEXT: R_LARCH_RELAX *ABS*
# CHECK-NEXT: nop
-# CHECK-NEXT: R_LARCH_ALIGN .Lla-relax-align0+0x4
+# CHECK-NEXT: R_LARCH_ALIGN .text+0x4
# CHECK-NEXT: nop
# CHECK-NEXT: ret
@@ -37,11 +37,12 @@
# CHECKR-NEXT: R_LARCH_PCALA_LO12 _start
# CHECKR-NEXT: R_LARCH_RELAX *ABS*
# CHECKR-NEXT: nop
-# CHECKR-NEXT: R_LARCH_ALIGN .Lla-relax-align0+0x4
+# CHECKR-NEXT: R_LARCH_ALIGN .text+0x4
# CHECKR-NEXT: nop
# CHECKR-NEXT: nop
# CHECKR-NEXT: ret
+.text
.global _start
_start:
la.pcrel $a0, _start
diff --git a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
index de492f2b1f0a4f..98f5014a34b1de 100644
--- a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
+++ b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
@@ -226,11 +226,8 @@ bool LoongArchAsmBackend::shouldInsertFixupForCodeAlign(
MCFixup::create(0, Dummy, MCFixupKind(LoongArch::fixup_loongarch_align));
const MCSymbolRefExpr *MCSym = getSecToAlignSym()[Sec];
if (MCSym == nullptr) {
-// Create a symbol and make the value of symbol is zero.
-MCSymbol *Sym = Ctx.createNamedTempSymbol("la-relax-align");
-Sym->setFragment(&*Sec->getBeginSymbol()->getFragment());
-Asm.registerSymbol(*Sym);
-MCSym = MCSymbolRefExpr::create(Sym, Ctx);
+// Use section symbol directly.
+MCSym = MCSymbolRefExpr::create(Sec->getBeginSymbol(), Ctx);
getSecToAlignSym()[Sec] = MCSym;
}
diff --git a/llvm/test/MC/LoongArch/Relocations/relax-addsub.s
b/llvm/test/MC/LoongArch/Relocations/relax-adds
[llvm-branch-commits] [lld] [llvm] release/18.x: [LoongArch] Use R_LARCH_ALIGN with section symbol (#84741) (PR #88891)
https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/88891 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lld] [llvm] release/18.x: [LoongArch] Use R_LARCH_ALIGN with section symbol (#84741) (PR #88891)
llvmbot wrote: @SixWeining What do you think about merging this PR to the release branch? https://github.com/llvm/llvm-project/pull/88891 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lld] [llvm] release/18.x: [LoongArch] Use R_LARCH_ALIGN with section symbol (#84741) (PR #88891)
llvmbot wrote:
@llvm/pr-subscribers-lld-elf
Author: None (llvmbot)
Changes
Backport 01f79899ba349a0200586c8d05f5e22cca2ced31
Requested by: @SixWeining
---
Full diff: https://github.com/llvm/llvm-project/pull/88891.diff
6 Files Affected:
- (modified) lld/ELF/InputSection.cpp (+5-1)
- (added) lld/test/ELF/loongarch-relax-align-ldr.s (+28)
- (modified) lld/test/ELF/loongarch-relax-emit-relocs.s (+3-2)
- (modified) llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
(+2-5)
- (modified) llvm/test/MC/LoongArch/Relocations/relax-addsub.s (+1-1)
- (modified) llvm/test/MC/LoongArch/Relocations/relax-align.s (+8-6)
``diff
diff --git a/lld/ELF/InputSection.cpp b/lld/ELF/InputSection.cpp
index e033a715b59214..313a19426a5e20 100644
--- a/lld/ELF/InputSection.cpp
+++ b/lld/ELF/InputSection.cpp
@@ -462,7 +462,11 @@ void InputSection::copyRelocations(uint8_t *buf,
addend += sec->getFile()->mipsGp0;
}
- if (RelTy::IsRela)
+ if (config->emachine == EM_LOONGARCH && type == R_LARCH_ALIGN)
+// LoongArch psABI v2.30, the R_LARCH_ALIGN requires symbol index.
+// If it use the section symbol, the addend should not be changed.
+p->r_addend = addend;
+ else if (RelTy::IsRela)
p->r_addend = sym.getVA(addend) - section->getOutputSection()->addr;
// For SHF_ALLOC sections relocated by REL, append a relocation to
// sec->relocations so that relocateAlloc transitively called by
diff --git a/lld/test/ELF/loongarch-relax-align-ldr.s
b/lld/test/ELF/loongarch-relax-align-ldr.s
new file mode 100644
index 00..6534dc906cfd02
--- /dev/null
+++ b/lld/test/ELF/loongarch-relax-align-ldr.s
@@ -0,0 +1,28 @@
+# REQUIRES: loongarch
+## Test `ld -r` not changes the addend of R_LARCH_ALIGN.
+
+# RUN: llvm-mc --filetype=obj --triple=loongarch64 --mattr=+relax %s -o %t.64.o
+# RUN: ld.lld -r %t.64.o %t.64.o -o %t.64.r
+# RUN: llvm-objdump -dr --no-show-raw-insn %t.64.r | FileCheck %s
+
+# CHECK: <.text>:
+# CHECK-NEXT: break 1
+# CHECK-NEXT: nop
+# CHECK-NEXT: {{0*}}04: R_LARCH_ALIGN.text+0x804
+# CHECK-NEXT: nop
+# CHECK-NEXT: nop
+# CHECK-NEXT: break 2
+# CHECK-NEXT: break 0
+# CHECK-NEXT: break 0
+# CHECK-NEXT: break 0
+# CHECK-NEXT: break 1
+# CHECK-NEXT: nop
+# CHECK-NEXT: {{0*}}24: R_LARCH_ALIGN.text+0x804
+# CHECK-NEXT: nop
+# CHECK-NEXT: nop
+# CHECK-NEXT: break 2
+
+.text
+break 1
+.p2align 4, , 8
+break 2
diff --git a/lld/test/ELF/loongarch-relax-emit-relocs.s
b/lld/test/ELF/loongarch-relax-emit-relocs.s
index 581fce8c95caa4..9007f8fcc114f0 100644
--- a/lld/test/ELF/loongarch-relax-emit-relocs.s
+++ b/lld/test/ELF/loongarch-relax-emit-relocs.s
@@ -25,7 +25,7 @@
# CHECK-NEXT: R_LARCH_PCALA_LO12 _start
# CHECK-NEXT: R_LARCH_RELAX *ABS*
# CHECK-NEXT: nop
-# CHECK-NEXT: R_LARCH_ALIGN .Lla-relax-align0+0x4
+# CHECK-NEXT: R_LARCH_ALIGN .text+0x4
# CHECK-NEXT: nop
# CHECK-NEXT: ret
@@ -37,11 +37,12 @@
# CHECKR-NEXT: R_LARCH_PCALA_LO12 _start
# CHECKR-NEXT: R_LARCH_RELAX *ABS*
# CHECKR-NEXT: nop
-# CHECKR-NEXT: R_LARCH_ALIGN .Lla-relax-align0+0x4
+# CHECKR-NEXT: R_LARCH_ALIGN .text+0x4
# CHECKR-NEXT: nop
# CHECKR-NEXT: nop
# CHECKR-NEXT: ret
+.text
.global _start
_start:
la.pcrel $a0, _start
diff --git a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
index de492f2b1f0a4f..98f5014a34b1de 100644
--- a/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
+++ b/llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
@@ -226,11 +226,8 @@ bool LoongArchAsmBackend::shouldInsertFixupForCodeAlign(
MCFixup::create(0, Dummy, MCFixupKind(LoongArch::fixup_loongarch_align));
const MCSymbolRefExpr *MCSym = getSecToAlignSym()[Sec];
if (MCSym == nullptr) {
-// Create a symbol and make the value of symbol is zero.
-MCSymbol *Sym = Ctx.createNamedTempSymbol("la-relax-align");
-Sym->setFragment(&*Sec->getBeginSymbol()->getFragment());
-Asm.registerSymbol(*Sym);
-MCSym = MCSymbolRefExpr::create(Sym, Ctx);
+// Use section symbol directly.
+MCSym = MCSymbolRefExpr::create(Sec->getBeginSymbol(), Ctx);
getSecToAlignSym()[Sec] = MCSym;
}
diff --git a/llvm/test/MC/LoongArch/Relocations/relax-addsub.s
b/llvm/test/MC/LoongArch/Relocations/relax-addsub.s
index 18e0ede5e29375..0e27d6301bb3cd 100644
--- a/llvm/test/MC/LoongArch/Relocations/relax-addsub.s
+++ b/llvm/test/MC/LoongArch/Relocations/relax-addsub.s
@@ -28,7 +28,7 @@
# RELAX: Relocations [
# RELAX-NEXT:Section ({{.*}}) .rela.text {
-# RELAX-NEXT: 0x4 R_LARCH_ALIGN {{.*}} 0x4
+# RELAX-NEXT: 0x4 R_LARCH_ALIGN .text 0x4
# RELAX-NEXT: 0x10 R_LARCH_PCALA_HI20 .L1 0x0
# RELAX-NEXT: 0x10 R_LARCH_RELAX - 0x0
# RELAX-NEXT: 0x14 R_LARCH_PCALA_LO12 .L1 0x0
diff --git a/llvm/test/MC/LoongArch/Relo
[llvm-branch-commits] [llvm] 1c26a83 - Revert "[JumpThreading] Thread over BB with only an unconditional branch (#86…"
Author: XChy
Date: 2024-04-16T22:46:36+08:00
New Revision: 1c26a83219692265b73b661b2bb4cce74178b1e5
URL:
https://github.com/llvm/llvm-project/commit/1c26a83219692265b73b661b2bb4cce74178b1e5
DIFF:
https://github.com/llvm/llvm-project/commit/1c26a83219692265b73b661b2bb4cce74178b1e5.diff
LOG: Revert "[JumpThreading] Thread over BB with only an unconditional branch
(#86…"
This reverts commit 36b3c26451bf9a42f0b6b415993d3942bb73abdd.
Added:
Modified:
llvm/lib/Transforms/Utils/Local.cpp
llvm/test/CodeGen/AArch64/and-sink.ll
llvm/test/CodeGen/AArch64/combine-comparisons-by-cse.ll
llvm/test/CodeGen/Hexagon/vect/zext-v4i1.ll
llvm/test/Transforms/JumpThreading/pr79175.ll
llvm/test/Transforms/JumpThreading/select.ll
llvm/test/Transforms/JumpThreading/thread-prob-7.ll
Removed:
llvm/test/Transforms/JumpThreading/uncond-no-phi.ll
llvm/test/Transforms/PhaseOrdering/thread-uncond-bb.ll
diff --git a/llvm/lib/Transforms/Utils/Local.cpp
b/llvm/lib/Transforms/Utils/Local.cpp
index baec51a07fcbfc..a42ef0c4e6ae9e 100644
--- a/llvm/lib/Transforms/Utils/Local.cpp
+++ b/llvm/lib/Transforms/Utils/Local.cpp
@@ -1019,14 +1019,12 @@ CanRedirectPredsOfEmptyBBToSucc(BasicBlock *BB,
BasicBlock *Succ,
const SmallPtrSetImpl &SuccPreds,
BasicBlock *&CommonPred) {
- // When Succ has no phis, BB may be merged into Succ directly. We don't need
- // to redirect the predecessors of BB in this case.
- if (Succ->phis().empty())
+ // There must be phis in BB, otherwise BB will be merged into Succ directly
+ if (BB->phis().empty() || Succ->phis().empty())
return false;
- // BB must have multiple
diff erent predecessors, so that at least one of
- // predecessors can be redirected to Succ, except the common predecessor.
- if (BB->getUniquePredecessor() || pred_empty(BB))
+ // BB must have predecessors not shared that can be redirected to Succ
+ if (!BB->hasNPredecessorsOrMore(2))
return false;
// Get single common predecessors of both BB and Succ
diff --git a/llvm/test/CodeGen/AArch64/and-sink.ll
b/llvm/test/CodeGen/AArch64/and-sink.ll
index a57e9d54f3078e..f298a55dab721e 100644
--- a/llvm/test/CodeGen/AArch64/and-sink.ll
+++ b/llvm/test/CodeGen/AArch64/and-sink.ll
@@ -11,14 +11,15 @@
define dso_local i32 @and_sink1(i32 %a, i1 %c) {
; CHECK-LABEL: and_sink1:
; CHECK: // %bb.0:
-; CHECK-NEXT:tbz w1, #0, .LBB0_2
+; CHECK-NEXT:tbz w1, #0, .LBB0_3
; CHECK-NEXT: // %bb.1: // %bb0
-; CHECK-NEXT:tst w0, #0x4
; CHECK-NEXT:adrp x8, A
-; CHECK-NEXT:cset w0, eq
; CHECK-NEXT:str wzr, [x8, :lo12:A]
+; CHECK-NEXT:tbnz w0, #2, .LBB0_3
+; CHECK-NEXT: // %bb.2:
+; CHECK-NEXT:mov w0, #1 // =0x1
; CHECK-NEXT:ret
-; CHECK-NEXT: .LBB0_2:
+; CHECK-NEXT: .LBB0_3: // %bb2
; CHECK-NEXT:mov w0, wzr
; CHECK-NEXT:ret
diff --git a/llvm/test/CodeGen/AArch64/combine-comparisons-by-cse.ll
b/llvm/test/CodeGen/AArch64/combine-comparisons-by-cse.ll
index dde3e81833a63d..6449c3e11d6672 100644
--- a/llvm/test/CodeGen/AArch64/combine-comparisons-by-cse.ll
+++ b/llvm/test/CodeGen/AArch64/combine-comparisons-by-cse.ll
@@ -13,10 +13,10 @@ define i32 @combine_gt_ge_10() #0 {
; CHECK: // %bb.0: // %entry
; CHECK-NEXT:adrp x8, :got:a
; CHECK-NEXT:ldr x8, [x8, :got_lo12:a]
-; CHECK-NEXT:ldr w9, [x8]
+; CHECK-NEXT:ldr w8, [x8]
+; CHECK-NEXT:cmp w8, #10
; CHECK-NEXT:adrp x8, :got:b
; CHECK-NEXT:ldr x8, [x8, :got_lo12:b]
-; CHECK-NEXT:cmp w9, #10
; CHECK-NEXT:b.le .LBB0_3
; CHECK-NEXT: // %bb.1: // %land.lhs.true
; CHECK-NEXT:adrp x9, :got:c
@@ -29,17 +29,18 @@ define i32 @combine_gt_ge_10() #0 {
; CHECK-NEXT:mov w0, #1 // =0x1
; CHECK-NEXT:ret
; CHECK-NEXT: .LBB0_3: // %lor.lhs.false
-; CHECK-NEXT:cmp w9, #10
-; CHECK-NEXT:b.lt .LBB0_5
+; CHECK-NEXT:b.lt .LBB0_6
; CHECK-NEXT: .LBB0_4: // %land.lhs.true3
; CHECK-NEXT:adrp x9, :got:d
; CHECK-NEXT:ldr x9, [x9, :got_lo12:d]
; CHECK-NEXT:ldr w8, [x8]
; CHECK-NEXT:ldr w9, [x9]
; CHECK-NEXT:cmp w8, w9
-; CHECK-NEXT:cset w0, eq
+; CHECK-NEXT:b.ne .LBB0_6
+; CHECK-NEXT: // %bb.5:
+; CHECK-NEXT:mov w0, #1 // =0x1
; CHECK-NEXT:ret
-; CHECK-NEXT: .LBB0_5:
+; CHECK-NEXT: .LBB0_6: // %if.end
; CHECK-NEXT:mov w0, wzr
; CHECK-NEXT:ret
entry:
@@ -144,10 +145,10 @@ define i32 @combine_lt_ge_5() #0 {
; CHECK: // %bb.0: // %entry
; CHECK-NEXT:adrp x8, :got:a
; CHECK-NEXT:ldr x8, [x8, :got_lo12:a]
-; CHECK-NEXT:ldr w9, [x8]
+; CHECK-NEXT:ldr w8, [x8]
+; CHECK-NEXT:cmp w8, #5
; CHECK-NEXT:adrp x8, :got:b
; CHECK-NEXT:ldr x8, [x8, :got_lo12:b]
-; CHECK-NEXT:cmp w9, #5
; CHECK-NEXT:b.ge .LBB2_3
; CHECK-NEXT: // %bb.1: // %land.lhs.true
; CHECK-NEXT:adrp x9, :got:c
@@ -160,17 +161,1
[llvm-branch-commits] [flang] [mlir] [MLIR][Flang][OpenMP] Make omp.wsloop into a loop wrapper (PR #88403)
skatrak wrote: I'm planning to split this into a PR stack after landing #87365, since it's too large to review. However, only the last commit of the stack will compile and pass tests, so they all would have to land simultaneously. I'm open to suggestions on how to best achieve this. https://github.com/llvm/llvm-project/pull/88403 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [mlir] [MLIR][OpenMP] NFC: Remove LoopControl parsing/printing code (PR #88909)
https://github.com/skatrak created
https://github.com/llvm/llvm-project/pull/88909
This patch removes the LoopControl parsing/printing functions that are no
longer used after transitioning `omp.simdloop` and `omp.taskloop` into loop
wrapper operations.
>From 68514f2aed8d0144060008d01e6af2d9d30d1322 Mon Sep 17 00:00:00 2001
From: Sergio Afonso
Date: Tue, 16 Apr 2024 16:05:26 +0100
Subject: [PATCH] [MLIR][OpenMP] NFC: Remove LoopControl parsing/printing code
This patch removes the LoopControl parsing/printing functions that are no
longer used after transitioning `omp.simdloop` and `omp.taskloop` into loop
wrapper operations.
---
mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp | 52
1 file changed, 52 deletions(-)
diff --git a/mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
b/mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
index caf0ac3f860172..5d2281ce6094fd 100644
--- a/mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
+++ b/mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
@@ -1548,58 +1548,6 @@ void printWsloop(OpAsmPrinter &p, Operation *op, Region
®ion,
p.printRegion(region, /*printEntryBlockArgs=*/false);
}
-/// loop-control ::= `(` ssa-id-list `)` `:` type `=` loop-bounds
-/// loop-bounds := `(` ssa-id-list `)` to `(` ssa-id-list `)` inclusive? steps
-/// steps := `step` `(`ssa-id-list`)`
-ParseResult
-parseLoopControl(OpAsmParser &parser, Region ®ion,
- SmallVectorImpl &lowerBound,
- SmallVectorImpl &upperBound,
- SmallVectorImpl &steps,
- SmallVectorImpl &loopVarTypes, UnitAttr &inclusive) {
- // Parse an opening `(` followed by induction variables followed by `)`
- SmallVector ivs;
- Type loopVarType;
- if (parser.parseArgumentList(ivs, OpAsmParser::Delimiter::Paren) ||
- parser.parseColonType(loopVarType) ||
- // Parse loop bounds.
- parser.parseEqual() ||
- parser.parseOperandList(lowerBound, ivs.size(),
- OpAsmParser::Delimiter::Paren) ||
- parser.parseKeyword("to") ||
- parser.parseOperandList(upperBound, ivs.size(),
- OpAsmParser::Delimiter::Paren))
-return failure();
-
- if (succeeded(parser.parseOptionalKeyword("inclusive")))
-inclusive = UnitAttr::get(parser.getBuilder().getContext());
-
- // Parse step values.
- if (parser.parseKeyword("step") ||
- parser.parseOperandList(steps, ivs.size(),
OpAsmParser::Delimiter::Paren))
-return failure();
-
- // Now parse the body.
- loopVarTypes = SmallVector(ivs.size(), loopVarType);
- for (auto &iv : ivs)
-iv.type = loopVarType;
-
- return parser.parseRegion(region, ivs);
-}
-
-void printLoopControl(OpAsmPrinter &p, Operation *op, Region ®ion,
- ValueRange lowerBound, ValueRange upperBound,
- ValueRange steps, TypeRange loopVarTypes,
- UnitAttr inclusive) {
- auto args = region.front().getArguments();
- p << " (" << args << ") : " << args[0].getType() << " = (" << lowerBound
-<< ") to (" << upperBound << ") ";
- if (inclusive)
-p << "inclusive ";
- p << "step (" << steps << ") ";
- p.printRegion(region, /*printEntryBlockArgs=*/false);
-}
-
//===--===//
// Simd construct [2.9.3.1]
//===--===//
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[llvm-branch-commits] [mlir] [MLIR][OpenMP] NFC: Remove LoopControl parsing/printing code (PR #88909)
llvmbot wrote:
@llvm/pr-subscribers-mlir-openmp
Author: Sergio Afonso (skatrak)
Changes
This patch removes the LoopControl parsing/printing functions that are no
longer used after transitioning `omp.simdloop` and `omp.taskloop` into loop
wrapper operations.
---
Full diff: https://github.com/llvm/llvm-project/pull/88909.diff
1 Files Affected:
- (modified) mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp (-52)
``diff
diff --git a/mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
b/mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
index caf0ac3f860172..5d2281ce6094fd 100644
--- a/mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
+++ b/mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
@@ -1548,58 +1548,6 @@ void printWsloop(OpAsmPrinter &p, Operation *op, Region
®ion,
p.printRegion(region, /*printEntryBlockArgs=*/false);
}
-/// loop-control ::= `(` ssa-id-list `)` `:` type `=` loop-bounds
-/// loop-bounds := `(` ssa-id-list `)` to `(` ssa-id-list `)` inclusive? steps
-/// steps := `step` `(`ssa-id-list`)`
-ParseResult
-parseLoopControl(OpAsmParser &parser, Region ®ion,
- SmallVectorImpl &lowerBound,
- SmallVectorImpl &upperBound,
- SmallVectorImpl &steps,
- SmallVectorImpl &loopVarTypes, UnitAttr &inclusive) {
- // Parse an opening `(` followed by induction variables followed by `)`
- SmallVector ivs;
- Type loopVarType;
- if (parser.parseArgumentList(ivs, OpAsmParser::Delimiter::Paren) ||
- parser.parseColonType(loopVarType) ||
- // Parse loop bounds.
- parser.parseEqual() ||
- parser.parseOperandList(lowerBound, ivs.size(),
- OpAsmParser::Delimiter::Paren) ||
- parser.parseKeyword("to") ||
- parser.parseOperandList(upperBound, ivs.size(),
- OpAsmParser::Delimiter::Paren))
-return failure();
-
- if (succeeded(parser.parseOptionalKeyword("inclusive")))
-inclusive = UnitAttr::get(parser.getBuilder().getContext());
-
- // Parse step values.
- if (parser.parseKeyword("step") ||
- parser.parseOperandList(steps, ivs.size(),
OpAsmParser::Delimiter::Paren))
-return failure();
-
- // Now parse the body.
- loopVarTypes = SmallVector(ivs.size(), loopVarType);
- for (auto &iv : ivs)
-iv.type = loopVarType;
-
- return parser.parseRegion(region, ivs);
-}
-
-void printLoopControl(OpAsmPrinter &p, Operation *op, Region ®ion,
- ValueRange lowerBound, ValueRange upperBound,
- ValueRange steps, TypeRange loopVarTypes,
- UnitAttr inclusive) {
- auto args = region.front().getArguments();
- p << " (" << args << ") : " << args[0].getType() << " = (" << lowerBound
-<< ") to (" << upperBound << ") ";
- if (inclusive)
-p << "inclusive ";
- p << "step (" << steps << ") ";
- p.printRegion(region, /*printEntryBlockArgs=*/false);
-}
-
//===--===//
// Simd construct [2.9.3.1]
//===--===//
``
https://github.com/llvm/llvm-project/pull/88909
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[llvm-branch-commits] [compiler-rt] release/18.x: [RISCV] Support rv{32, 64}e in the compiler builtins (#88252) (PR #88525)
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[llvm-branch-commits] [llvm] release/18.x: [Codegen][X86] Fix /HOTPATCH with clang-cl and inline asm (#87639) (PR #88388)
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[llvm-branch-commits] [llvm] release/18.x: [SLP]Fix a crash if the argument of call was affected by minbitwidth analysis (PR #86731)
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[llvm-branch-commits] [libcxx] release/18.x: [libc++] Simplify the implementation of (#86843) (PR #87374)
tstellar wrote: Hi @ian-twilightcoder (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. https://github.com/llvm/llvm-project/pull/87374 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [polly] release/18.x: [clang-format] Correctly annotate braces of empty ctors/dtors (#82097) (PR #87735)
tstellar wrote: Hi @owenca (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. https://github.com/llvm/llvm-project/pull/87735 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] release/18.x: [Headers] Don't declare unreachable() from stddef.h in C++ (#86748) (PR #87696)
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[llvm-branch-commits] [llvm] release/18.x: [ConstantRange] Fix off by 1 bugs in UIToFP and SIToFP handling. (#86041) (PR #86153)
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[llvm-branch-commits] [mlir] [MLIR][OpenMP] NFC: Remove LoopControl parsing/printing code (PR #88909)
https://github.com/kiranchandramohan approved this pull request. LG. https://github.com/llvm/llvm-project/pull/88909 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lld] [llvm] release/18.x: [LoongArch] Use R_LARCH_ALIGN with section symbol (#84741) (PR #88891)
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[llvm-branch-commits] [libcxx] [libc++][TZDB] Improves time zone format specifiers. (PR #85797)
https://github.com/ldionne approved this pull request. LGTM with minor comments. Thanks! https://github.com/llvm/llvm-project/pull/85797 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [libcxx] [libc++][TZDB] Improves time zone format specifiers. (PR #85797)
@@ -170,10 +171,45 @@ _LIBCPP_HIDE_FROM_ABI void
__format_century(basic_stringstream<_CharT>& __sstr,
__sstr << std::format(_LIBCPP_STATICALLY_WIDEN(_CharT, "{:02}"), __century);
}
+// Implements the %z format specifier according to [tab:time.format.spec],
where
+// '__modifier' signals %Oz or %Ez were used. (Both modifiers behave the same,
+// so there is no need to distinguish between them.)
+template
+_LIBCPP_HIDE_FROM_ABI void
+__format_zone_offset(basic_stringstream<_CharT>& __sstr, chrono::seconds
__offset, bool __modifier) {
+ if (__offset < 0s) {
+__sstr << _CharT('-');
+__offset = -__offset;
+ } else
+__sstr << _CharT('+');
+
+ chrono::hh_mm_ss __hms{__offset};
+ std::ostreambuf_iterator<_CharT> __out_it{__sstr};
+ if (__modifier)
+std::format_to(__out_it, _LIBCPP_STATICALLY_WIDEN(_CharT, "{:%H:%M}"),
__hms);
+ else
+std::format_to(__out_it, _LIBCPP_STATICALLY_WIDEN(_CharT, "{:%H%M}"),
__hms);
+}
+
+// Helper to store the time zone information needed for formatting.
+struct _LIBCPP_HIDE_FROM_ABI __time_zone {
+ // Typically these abbreviations as short and fit in the string's internal
+ // buffer.
+ string __abbrev{"UTC"};
+ chrono::seconds __offset{0};
ldionne wrote:
It feels weird to me to have these as default initializers. Instead I would not
provide any defaults here, but I would initialize the result in
`__convert_to_time_zone` below using `{"UTC", 0}`.
https://github.com/llvm/llvm-project/pull/85797
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[llvm-branch-commits] [libcxx] [libc++][TZDB] Improves time zone format specifiers. (PR #85797)
@@ -170,10 +171,45 @@ _LIBCPP_HIDE_FROM_ABI void
__format_century(basic_stringstream<_CharT>& __sstr,
__sstr << std::format(_LIBCPP_STATICALLY_WIDEN(_CharT, "{:02}"), __century);
}
+// Implements the %z format specifier according to [tab:time.format.spec],
where
+// '__modifier' signals %Oz or %Ez were used. (Both modifiers behave the same,
+// so there is no need to distinguish between them.)
+template
+_LIBCPP_HIDE_FROM_ABI void
+__format_zone_offset(basic_stringstream<_CharT>& __sstr, chrono::seconds
__offset, bool __modifier) {
+ if (__offset < 0s) {
+__sstr << _CharT('-');
+__offset = -__offset;
+ } else
+__sstr << _CharT('+');
+
+ chrono::hh_mm_ss __hms{__offset};
+ std::ostreambuf_iterator<_CharT> __out_it{__sstr};
+ if (__modifier)
+std::format_to(__out_it, _LIBCPP_STATICALLY_WIDEN(_CharT, "{:%H:%M}"),
__hms);
+ else
+std::format_to(__out_it, _LIBCPP_STATICALLY_WIDEN(_CharT, "{:%H%M}"),
__hms);
+}
+
+// Helper to store the time zone information needed for formatting.
+struct _LIBCPP_HIDE_FROM_ABI __time_zone {
+ // Typically these abbreviations as short and fit in the string's internal
ldionne wrote:
```suggestion
// Typically these abbreviations are short and fit in the string's internal
```
https://github.com/llvm/llvm-project/pull/85797
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[llvm-branch-commits] [libcxx] [libc++][TZDB] Improves time zone format specifiers. (PR #85797)
https://github.com/ldionne edited https://github.com/llvm/llvm-project/pull/85797 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [libcxx] [libc++][TZDB] Improves time zone format specifiers. (PR #85797)
@@ -170,10 +171,45 @@ _LIBCPP_HIDE_FROM_ABI void
__format_century(basic_stringstream<_CharT>& __sstr,
__sstr << std::format(_LIBCPP_STATICALLY_WIDEN(_CharT, "{:02}"), __century);
}
+// Implements the %z format specifier according to [tab:time.format.spec],
where
+// '__modifier' signals %Oz or %Ez were used. (Both modifiers behave the same,
+// so there is no need to distinguish between them.)
+template
+_LIBCPP_HIDE_FROM_ABI void
+__format_zone_offset(basic_stringstream<_CharT>& __sstr, chrono::seconds
__offset, bool __modifier) {
+ if (__offset < 0s) {
+__sstr << _CharT('-');
+__offset = -__offset;
+ } else
ldionne wrote:
Minor style nit but it looks really weird to me without braces, since the block
above has braces.
https://github.com/llvm/llvm-project/pull/85797
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[llvm-branch-commits] [libcxx] [libc++][TZDB] Improves time zone format specifiers. (PR #85797)
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[llvm-branch-commits] [libcxx] [libc++][chrono] Improves date formatting. (PR #86127)
https://github.com/ldionne edited https://github.com/llvm/llvm-project/pull/86127 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [mlir] [MLIR][OpenMP] NFC: Remove LoopControl parsing/printing code (PR #88909)
https://github.com/Meinersbur approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/88909 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [libcxx] [libc++][chrono] Improves date formatting. (PR #86127)
@@ -322,15 +322,13 @@ _LIBCPP_HIDE_FROM_ABI void
__format_chrono_using_chrono_specs(
__formatter::__format_year(__sstr, __t.tm_year + 1900);
break;
- case _CharT('F'): {
-int __year = __t.tm_year + 1900;
-if (__year < 1000) {
- __formatter::__format_year(__sstr, __year);
- __sstr << std::format(_LIBCPP_STATICALLY_WIDEN(_CharT,
"-{:02}-{:02}"), __t.tm_mon + 1, __t.tm_mday);
-} else
- __facet.put(
- {__sstr}, __sstr, _CharT(' '), std::addressof(__t),
std::to_address(__s), std::to_address(__it + 1));
- } break;
+ case _CharT('F'):
+// Depending on the platform's libc the range of supported years is
+// limited. Intead of of testing all conditions use the internal
ldionne wrote:
```suggestion
// limited. Instead of testing all conditions, use the internal
```
https://github.com/llvm/llvm-project/pull/86127
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https://github.com/ldionne approved this pull request. https://github.com/llvm/llvm-project/pull/86127 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [libcxx] [libc++][chrono] Improves date formatting. (PR #86127)
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[llvm-branch-commits] [clang] [polly] release/18.x: [clang-format] Correctly annotate braces of empty ctors/dtors (#82097) (PR #87735)
owenca wrote: This is just a bug fix [requested](https://github.com/llvm/llvm-project/issues/79834#issuecomment-2030179647) to be cherry picked, so I don't think we need to add a note about it in the release note. https://github.com/llvm/llvm-project/pull/87735 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [compiler-rt] release/18.x: [RISCV] Support rv{32, 64}e in the compiler builtins (#88252) (PR #88525)
wangpc-pp wrote: > Hi @wangpc-pp (or anyone else). If you would like to add a note about this > fix in the release notes (completely optional). Please reply to this comment > with a one or two sentence description of the fix. Yeah, the description can be: ``` Save/restore routines for RV32E/RV64E are added to compiler-rt. ``` https://github.com/llvm/llvm-project/pull/88525 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/18.x: Prepend all library intrinsics with `#` when building for Arm64EC (PR #88016)
dpaoliello wrote: > Hi @dpaoliello (or anyone else). If you would like to add a note about this > fix in the release notes (completely optional). Please reply to this comment > with a one or two sentence description of the fix. Fixes an issue with Arm64EC code generation where calls to some intrinsics implemented in `compiler-rt` used the wrong name mangling, eventually resulting in unresolved symbol errors during linking. https://github.com/llvm/llvm-project/pull/88016 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [libcxx] release/18.x: [libc++] Simplify the implementation of (#86843) (PR #87374)
ian-twilightcoder wrote: I don't think this needs a release note, it's a pretty minor change. https://github.com/llvm/llvm-project/pull/87374 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] release/18.x: [Headers] Don't declare unreachable() from stddef.h in C++ (#86748) (PR #87696)
ian-twilightcoder wrote: I don't think we need to release note this one, it's just restoring LLVM 17 behavior. https://github.com/llvm/llvm-project/pull/87696 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [InstrProf] Add vtables with type metadata into symtab to look it up with GUID (PR #81051)
https://github.com/minglotus-6 converted_to_draft https://github.com/llvm/llvm-project/pull/81051 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [libcxx] [libc++][TZDB] Adds sys_info formatter. (PR #85896)
https://github.com/ldionne approved this pull request. https://github.com/llvm/llvm-project/pull/85896 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [libcxx] [libc++][TZDB] Adds local_info formatter. (PR #86256)
https://github.com/ldionne edited https://github.com/llvm/llvm-project/pull/86256 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [libcxx] [libc++][TZDB] Adds local_info formatter. (PR #86256)
https://github.com/ldionne approved this pull request. LGTM with small comments. https://github.com/llvm/llvm-project/pull/86256 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [libcxx] [libc++][TZDB] Adds local_info formatter. (PR #86256)
@@ -0,0 +1,50 @@ +// -*- C++ -*- ldionne wrote: Maybe update the commit message since this patch actually introduces `local_info`, not only the formatter for it. https://github.com/llvm/llvm-project/pull/86256 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [libcxx] [libc++][TZDB] Adds local_info formatter. (PR #86256)
@@ -0,0 +1,50 @@
+// -*- C++ -*-
+//===--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+// For information see https://libcxx.llvm.org/DesignDocs/TimeZone.html
+
+#ifndef _LIBCPP___CHRONO_LOCAL_INFO_H
+#define _LIBCPP___CHRONO_LOCAL_INFO_H
+
+#include
+// Enable the contents of the header only when libc++ was built with
experimental features enabled.
+#if !defined(_LIBCPP_HAS_NO_INCOMPLETE_TZDB)
+
+# include <__chrono/sys_info.h>
+# include <__config>
+
+# if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER)
+#pragma GCC system_header
+# endif
+
+_LIBCPP_BEGIN_NAMESPACE_STD
+
+# if _LIBCPP_STD_VER >= 20
+
+namespace chrono {
+
+struct local_info {
ldionne wrote:
We should have a test for this class, its data members and static data members,
etc.
https://github.com/llvm/llvm-project/pull/86256
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[llvm-branch-commits] [libcxx] [libc++][TZDB] Adds local_info formatter. (PR #86256)
@@ -0,0 +1,114 @@
+//===--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+// UNSUPPORTED: c++03, c++11, c++14, c++17
+// UNSUPPORTED: no-localization
+
+// TODO FMT This test should not require std::to_chars(floating-point)
+// XFAIL: availability-fp_to_chars-missing
+
+// XFAIL: libcpp-has-no-incomplete-tzdb
+
+//
+
+// template
+// basic_ostream&
+// operator<<(basic_ostream& os, const local_info& r);
+
+// [time.zone.info.local]
+// 7 Effects: Streams out the local_info object r in an unspecified format.
+// 8 Returns: os.
+//
+// Tests the output produced by this function.
+
+#include
+#include
+#include
+#include
+
+#include "assert_macros.h"
+#include "test_macros.h"
+#include "make_string.h"
+#include "concat_macros.h"
+
+#define SV(S) MAKE_STRING_VIEW(CharT, S)
+
+template
+static void test(std::basic_string_view expected,
std::chrono::local_info&& info) {
+ std::basic_stringstream sstr;
+ sstr << info;
+ std::basic_string output = sstr.str();
+
+ TEST_REQUIRE(expected == output,
+ TEST_WRITE_CONCATENATED("\nExpected output ", expected,
"\nActual output ", output, '\n'));
+}
+
+template
+static void test() {
+ using namespace std::literals::chrono_literals;
+ namespace tz = std::chrono;
+ // result values matching the "known" results
+ test(SV("unique: "
+ "{[-10484-10-16 15:30:08, 14423-03-17 15:30:07) 00:00:00 0min TZ, "
+ "[1970-01-01 00:00:00, 1970-01-01 00:00:00) 00:00:00 0min }"),
ldionne wrote:
IMO formatting a `sys_info` without a time zone should not have a trailing
whitespace, this looks like a small bug to me.
https://github.com/llvm/llvm-project/pull/86256
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[llvm-branch-commits] [llvm] release/18.x: [InstSimplify] Make sure the simplified value doesn't generate poison in threadBinOpOverSelect (#87075) (PR #88353)
dtcxzyw wrote: > Hi @dtcxzyw (or anyone else). If you would like to add a note about this fix > in the release notes (completely optional). Please reply to this comment with > a one or two sentence description of the fix. Fixed an incorrect poison-generating flag preservation in InstSimplify. It will fix a miscompilation on RISCV, which turns the incorrect `or disjoint` into an `add`. Is that OK? https://github.com/llvm/llvm-project/pull/88353 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [compiler-rt] [llvm] [InstrProf] Add vtables with type metadata into symtab to look it up with GUID (PR #81051)
https://github.com/minglotus-6 updated https://github.com/llvm/llvm-project/pull/81051 error: too big or took too long to generate ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [Sparc] Fix instr desc of special register stores (PR #88971)
https://github.com/darkbuck created https://github.com/llvm/llvm-project/pull/88971 - Those special register stores are STORE and their memory operands are input operands instead of output ones. ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [TableGen][InstrInfoEmitter] Count sub-operands on def operands (PR #88972)
https://github.com/darkbuck created https://github.com/llvm/llvm-project/pull/88972 - If a def operand include multiple sub-operands, count them as def operands. ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [Sparc] Fix instr desc of special register stores (PR #88971)
llvmbot wrote:
@llvm/pr-subscribers-backend-sparc
Author: None (darkbuck)
Changes
- Those special register stores are STORE and their memory operands are
input operands instead of output ones.
---
Full diff: https://github.com/llvm/llvm-project/pull/88971.diff
1 Files Affected:
- (modified) llvm/lib/Target/Sparc/SparcInstrInfo.td (+15-15)
``diff
diff --git a/llvm/lib/Target/Sparc/SparcInstrInfo.td
b/llvm/lib/Target/Sparc/SparcInstrInfo.td
index 5e792427cca282..4d68f93efeac17 100644
--- a/llvm/lib/Target/Sparc/SparcInstrInfo.td
+++ b/llvm/lib/Target/Sparc/SparcInstrInfo.td
@@ -693,38 +693,38 @@ let DecoderNamespace = "SparcV8", Predicates = [HasNoV9]
in {
}
let rd = 0 in {
- let Defs = [CPSR] in {
-def STCSRrr : F3_1<3, 0b110101, (outs (MEMrr $rs1, $rs2):$addr), (ins),
+ let mayStore = 1, Uses = [CPSR] in {
+def STCSRrr : F3_1<3, 0b110101, (outs), (ins (MEMrr $rs1, $rs2):$addr),
"st %csr, [$addr]", [], IIC_st>;
-def STCSRri : F3_2<3, 0b110101, (outs (MEMri $rs1, $simm13):$addr), (ins),
+def STCSRri : F3_2<3, 0b110101, (outs), (ins (MEMri $rs1, $simm13):$addr),
"st %csr, [$addr]", [], IIC_st>;
}
- let Defs = [CPQ] in {
-def STDCQrr : F3_1<3, 0b110110, (outs (MEMrr $rs1, $rs2):$addr), (ins),
+ let mayStore = 1, Uses = [CPQ] in {
+def STDCQrr : F3_1<3, 0b110110, (outs), (ins (MEMrr $rs1, $rs2):$addr),
"std %cq, [$addr]", [], IIC_std>;
-def STDCQri : F3_2<3, 0b110110, (outs (MEMri $rs1, $simm13):$addr), (ins),
+def STDCQri : F3_2<3, 0b110110, (outs), (ins (MEMri $rs1, $simm13):$addr),
"std %cq, [$addr]", [], IIC_std>;
}
}
let rd = 0 in {
- let Defs = [FSR] in {
-def STFSRrr : F3_1<3, 0b100101, (outs (MEMrr $rs1, $rs2):$addr), (ins),
+ let mayStore = 1, Uses = [FSR] in {
+def STFSRrr : F3_1<3, 0b100101, (outs), (ins (MEMrr $rs1, $rs2):$addr),
"st %fsr, [$addr]", [], IIC_st>;
-def STFSRri : F3_2<3, 0b100101, (outs (MEMri $rs1, $simm13):$addr), (ins),
+def STFSRri : F3_2<3, 0b100101, (outs), (ins (MEMri $rs1, $simm13):$addr),
"st %fsr, [$addr]", [], IIC_st>;
}
- let Defs = [FQ] in {
-def STDFQrr : F3_1<3, 0b100110, (outs (MEMrr $rs1, $rs2):$addr), (ins),
+ let mayStore = 1, Defs = [FQ] in {
+def STDFQrr : F3_1<3, 0b100110, (outs), (ins (MEMrr $rs1, $rs2):$addr),
"std %fq, [$addr]", [], IIC_std>;
-def STDFQri : F3_2<3, 0b100110, (outs (MEMri $rs1, $simm13):$addr), (ins),
+def STDFQri : F3_2<3, 0b100110, (outs), (ins (MEMri $rs1, $simm13):$addr),
"std %fq, [$addr]", [], IIC_std>;
}
}
-let rd = 1, Defs = [FSR] in {
- def STXFSRrr : F3_1<3, 0b100101, (outs (MEMrr $rs1, $rs2):$addr), (ins),
+let rd = 1, mayStore = 1, Uses = [FSR] in {
+ def STXFSRrr : F3_1<3, 0b100101, (outs), (ins (MEMrr $rs1, $rs2):$addr),
"stx %fsr, [$addr]", []>, Requires<[HasV9]>;
- def STXFSRri : F3_2<3, 0b100101, (outs (MEMri $rs1, $simm13):$addr), (ins),
+ def STXFSRri : F3_2<3, 0b100101, (outs), (ins (MEMri $rs1, $simm13):$addr),
"stx %fsr, [$addr]", []>, Requires<[HasV9]>;
}
``
https://github.com/llvm/llvm-project/pull/88971
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[llvm-branch-commits] [mlir] [MLIR][XeGPU] Add dpas and named barrier ops (PR #88439)
chencha3 wrote: @adam-smnk @joker-eph Merged #86594, and recreate it againt the main branch. #88973 https://github.com/llvm/llvm-project/pull/88439 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [Sparc] Fix instr desc of special register stores (PR #88971)
https://github.com/darkbuck updated https://github.com/llvm/llvm-project/pull/88971 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [Sparc] Fix instr desc of special register stores (PR #88971)
https://github.com/darkbuck updated https://github.com/llvm/llvm-project/pull/88971 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [Sparc] Fix instr desc of special register stores (PR #88971)
darkbuck wrote: I separated this change from the original one https://github.com/llvm/llvm-project/pull/88837 so that that tablegen change is clean. https://github.com/llvm/llvm-project/pull/88971 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [TableGen][InstrInfoEmitter] Count sub-operands on def operands (PR #88972)
https://github.com/darkbuck updated https://github.com/llvm/llvm-project/pull/88972 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [TableGen][InstrInfoEmitter] Count sub-operands on def operands (PR #88972)
https://github.com/darkbuck edited https://github.com/llvm/llvm-project/pull/88972 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [TableGen][InstrInfoEmitter] Count sub-operands on def operands (PR #88972)
https://github.com/darkbuck updated https://github.com/llvm/llvm-project/pull/88972 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/18.x [SelectionDAG] Prevent combination on inconsistent type in 'carryDiamond' (PR #86697)
https://github.com/tstellar updated
https://github.com/llvm/llvm-project/pull/86697
>From 647fbc710840d87698d9dbc016a90c3aa634f532 Mon Sep 17 00:00:00 2001
From: XChy
Date: Fri, 22 Mar 2024 18:35:20 +0800
Subject: [PATCH] [SelectionDAG] Prevent combination on inconsistent type in
`combineCarryDiamond` (#84888)
Fixes #84831
When matching carry pattern with `getAsCarry`, it may produce different
type of carryout. This patch checks such case and does early exit.
I'm new to DAG, any suggestion is appreciated.
(cherry picked from commit cb4453dc69d75064c9a82e9a6a9bf0d0ded4b204)
---
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 7 +-
llvm/test/CodeGen/X86/addcarry.ll | 23 +++
2 files changed, 29 insertions(+), 1 deletion(-)
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 3135ec73a99e76..e806e0f0731f23 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -3575,6 +3575,11 @@ static SDValue combineCarryDiamond(SelectionDAG &DAG,
const TargetLowering &TLI,
return SDValue();
if (Opcode != ISD::UADDO && Opcode != ISD::USUBO)
return SDValue();
+ // Guarantee identical type of CarryOut
+ EVT CarryOutType = N->getValueType(0);
+ if (CarryOutType != Carry0.getValue(1).getValueType() ||
+ CarryOutType != Carry1.getValue(1).getValueType())
+return SDValue();
// Canonicalize the add/sub of A and B (the top node in the above ASCII art)
// as Carry0 and the add/sub of the carry in as Carry1 (the middle node).
@@ -3622,7 +3627,7 @@ static SDValue combineCarryDiamond(SelectionDAG &DAG,
const TargetLowering &TLI,
// TODO: match other operations that can merge flags (ADD, etc)
DAG.ReplaceAllUsesOfValueWith(Carry1.getValue(0), Merged.getValue(0));
if (N->getOpcode() == ISD::AND)
-return DAG.getConstant(0, DL, MVT::i1);
+return DAG.getConstant(0, DL, CarryOutType);
return Merged.getValue(1);
}
diff --git a/llvm/test/CodeGen/X86/addcarry.ll
b/llvm/test/CodeGen/X86/addcarry.ll
index 3fc4ed99fad0fa..f8d32fc2d29252 100644
--- a/llvm/test/CodeGen/X86/addcarry.ll
+++ b/llvm/test/CodeGen/X86/addcarry.ll
@@ -1490,3 +1490,26 @@ define { i64, i64 } @addcarry_commutative_2(i64 %x0, i64
%x1, i64 %y0, i64 %y1)
%r1 = insertvalue { i64, i64 } %r0, i64 %b1s, 1
ret { i64, i64 } %r1
}
+
+define i1 @pr84831(i64 %arg) {
+; CHECK-LABEL: pr84831:
+; CHECK: # %bb.0:
+; CHECK-NEXT:testq %rdi, %rdi
+; CHECK-NEXT:setne %al
+; CHECK-NEXT:xorl %ecx, %ecx
+; CHECK-NEXT:addb $-1, %al
+; CHECK-NEXT:adcq $1, %rcx
+; CHECK-NEXT:setb %al
+; CHECK-NEXT:retq
+ %a = icmp ult i64 0, %arg
+ %add1 = add i64 0, 1
+ %carryout1 = icmp ult i64 %add1, 0
+ %b = zext i1 %a to i64
+ %add2 = add i64 %add1, %b
+ %carryout2 = icmp ult i64 %add2, %add1
+ %zc1 = zext i1 %carryout1 to i63
+ %zc2 = zext i1 %carryout2 to i63
+ %or = or i63 %zc1, %zc2
+ %trunc = trunc i63 %or to i1
+ ret i1 %trunc
+}
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[llvm-branch-commits] [Sparc] Fix instr desc of special register stores (PR #88971)
https://github.com/arsenm approved this pull request. Knowing nothing about SPARC, I don't see how having the address to a store in the output made sense https://github.com/llvm/llvm-project/pull/88971 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [Sparc] Fix instr desc of special register stores (PR #88971)
https://github.com/darkbuck updated https://github.com/llvm/llvm-project/pull/88971 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [Sparc] Fix instr desc of special register stores (PR #88971)
https://github.com/darkbuck updated https://github.com/llvm/llvm-project/pull/88971 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [TableGen][InstrInfoEmitter] Count sub-operands on def operands (PR #88972)
https://github.com/darkbuck updated https://github.com/llvm/llvm-project/pull/88972 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [TableGen][InstrInfoEmitter] Count sub-operands on def operands (PR #88972)
https://github.com/darkbuck updated https://github.com/llvm/llvm-project/pull/88972 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [TableGen][InstrInfoEmitter] Count sub-operands on def operands (PR #88972)
https://github.com/arsenm approved this pull request. https://github.com/llvm/llvm-project/pull/88972 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [TableGen][InstrInfoEmitter] Count sub-operands on def operands (PR #88972)
@@ -1181,9 +1181,15 @@ void InstrInfoEmitter::emitRecord(
// Each logical operand can be multiple MI operands.
MinOperands =
Inst.Operands.back().MIOperandNo + Inst.Operands.back().MINumOperands;
+ // Even the logical output operand may be multiple MI operands.
+ int DefOperands = 0;
+ if (Inst.Operands.NumDefs) {
+auto &Opnd = Inst.Operands[Inst.Operands.NumDefs - 1];
+DefOperands = Opnd.MIOperandNo + Opnd.MINumOperands;
+ }
arsenm wrote:
We probably should have some better helpers for dealing with these compound
operands
https://github.com/llvm/llvm-project/pull/88972
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[llvm-branch-commits] [libcxx] release/18.x: [libc++] Fix -Wgnu-include-next in stddef.h (#88214) (PR #88419)
https://github.com/tstellar updated https://github.com/llvm/llvm-project/pull/88419 >From db67e6fb9ad150f18cf9941405746a8400b60545 Mon Sep 17 00:00:00 2001 From: Louis Dionne Date: Thu, 11 Apr 2024 12:36:56 -0400 Subject: [PATCH] [libc++] Fix -Wgnu-include-next in stddef.h (#88214) As reported in #86843, we must have #pragma GCC system_header before we use #include_next, otherwise the compiler may not understand that we're in a system header and may issue a diagnostic for our usage of (cherry picked from commit 3c4b673af05f53e8a4d1a382b5c86367ea512c9e) --- libcxx/include/stddef.h | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/libcxx/include/stddef.h b/libcxx/include/stddef.h index 470b5408336c6d..1583e78e3739ba 100644 --- a/libcxx/include/stddef.h +++ b/libcxx/include/stddef.h @@ -26,6 +26,10 @@ #include <__config> +#if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER) +# pragma GCC system_header +#endif + // Note: This include is outside of header guards because we sometimes get included multiple times // with different defines and the underlying will know how to deal with that. #include_next @@ -33,10 +37,6 @@ #ifndef _LIBCPP_STDDEF_H # define _LIBCPP_STDDEF_H -# if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER) -#pragma GCC system_header -# endif - # ifdef __cplusplus typedef decltype(nullptr) nullptr_t; # endif ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [libcxx] release/18.x: [libc++] Fix -Wgnu-include-next in stddef.h (#88214) (PR #88419)
https://github.com/tstellar closed https://github.com/llvm/llvm-project/pull/88419 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [libcxx] db67e6f - [libc++] Fix -Wgnu-include-next in stddef.h (#88214)
Author: Louis Dionne Date: 2024-04-16T14:36:31-07:00 New Revision: db67e6fb9ad150f18cf9941405746a8400b60545 URL: https://github.com/llvm/llvm-project/commit/db67e6fb9ad150f18cf9941405746a8400b60545 DIFF: https://github.com/llvm/llvm-project/commit/db67e6fb9ad150f18cf9941405746a8400b60545.diff LOG: [libc++] Fix -Wgnu-include-next in stddef.h (#88214) As reported in #86843, we must have #pragma GCC system_header before we use #include_next, otherwise the compiler may not understand that we're in a system header and may issue a diagnostic for our usage of (cherry picked from commit 3c4b673af05f53e8a4d1a382b5c86367ea512c9e) Added: Modified: libcxx/include/stddef.h Removed: diff --git a/libcxx/include/stddef.h b/libcxx/include/stddef.h index 470b5408336c6d..1583e78e3739ba 100644 --- a/libcxx/include/stddef.h +++ b/libcxx/include/stddef.h @@ -26,6 +26,10 @@ #include <__config> +#if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER) +# pragma GCC system_header +#endif + // Note: This include is outside of header guards because we sometimes get included multiple times // with diff erent defines and the underlying will know how to deal with that. #include_next @@ -33,10 +37,6 @@ #ifndef _LIBCPP_STDDEF_H # define _LIBCPP_STDDEF_H -# if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER) -#pragma GCC system_header -# endif - # ifdef __cplusplus typedef decltype(nullptr) nullptr_t; # endif ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [libcxx] release/18.x: [libc++] Fix -Wgnu-include-next in stddef.h (#88214) (PR #88419)
tstellar wrote: Hi @ldionne (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. https://github.com/llvm/llvm-project/pull/88419 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] Fix override keyword being print to the left side (PR #88453)
https://github.com/tstellar updated
https://github.com/llvm/llvm-project/pull/88453
>From 2b395dc3cf38839f4a9218897f2997746dae1b31 Mon Sep 17 00:00:00 2001
From: Giuliano Belinassi
Date: Thu, 11 Apr 2024 20:09:49 -0300
Subject: [PATCH] Fix override keyword being print to the left side
Previously, the `override` keyword in C++ was being print in the left
side of a method decl, which is unsupported by C++ standard. This commit
fixes that by setting the `CanPrintOnLeft` field to 0, forcing it to be
print on the right side of the decl.
Signed-off-by: Giuliano Belinassi
---
clang/include/clang/Basic/Attr.td | 2 ++
clang/test/AST/ast-dump-override-final.cpp | 20
2 files changed, 22 insertions(+)
create mode 100644 clang/test/AST/ast-dump-override-final.cpp
diff --git a/clang/include/clang/Basic/Attr.td
b/clang/include/clang/Basic/Attr.td
index 58838b01b4fd7c..dbf2dd2120fb69 100644
--- a/clang/include/clang/Basic/Attr.td
+++ b/clang/include/clang/Basic/Attr.td
@@ -1590,6 +1590,7 @@ def RegCall : DeclOrTypeAttr {
}
def Final : InheritableAttr {
+ let CanPrintOnLeft = 0;
let Spellings = [CustomKeyword<"final">, CustomKeyword<"sealed">];
let Accessors = [Accessor<"isSpelledAsSealed", [CustomKeyword<"sealed">]>];
let SemaHandler = 0;
@@ -2472,6 +2473,7 @@ def Overloadable : Attr {
}
def Override : InheritableAttr {
+ let CanPrintOnLeft = 0;
let Spellings = [CustomKeyword<"override">];
let SemaHandler = 0;
// Omitted from docs, since this is language syntax, not an attribute, as far
diff --git a/clang/test/AST/ast-dump-override-final.cpp
b/clang/test/AST/ast-dump-override-final.cpp
new file mode 100644
index 00..c1cee6b01565f6
--- /dev/null
+++ b/clang/test/AST/ast-dump-override-final.cpp
@@ -0,0 +1,20 @@
+// This file contain tests to check if override and final are dumped in the
+// correct positions.
+
+// RUN: %clang_cc1 -ast-print -x c++ %s -o - | FileCheck %s
+
+// CHECK: class A {
+class A {
+ // CHECK-NEXT: virtual void f();
+ virtual void f();
+
+ // CHECK-NEXT: virtual void g() final;
+ virtual void g() final;
+} AA;
+
+// CHECK: class B : public A {
+class B : public A {
+ // CHECK-NEXT: virtual void f() override {
+ virtual void f() override {
+ };
+} B;
___
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[llvm-branch-commits] [lld] release/18.x: [LLD] [COFF] Don't add pseudo relocs for dangling references (#88487) (PR #88759)
https://github.com/tstellar updated
https://github.com/llvm/llvm-project/pull/88759
>From 995539ce05ba27f5ed1115c13bbe9a32a035f709 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Martin=20Storsj=C3=B6?=
Date: Mon, 15 Apr 2024 20:14:07 +0300
Subject: [PATCH] [LLD] [COFF] Don't add pseudo relocs for dangling references
(#88487)
When doing GC, we normally won't have dangling references, because such
a reference would keep the other section alive, keeping it from being
eliminated.
However, references within DWARF sections are ignored for the purposes
of GC (because otherwise, they would essentially keep everything alive,
defeating the point of the GC), see
c579a5b1d92a9bc2046d00ee2d427832e0f5ddec for more context.
Therefore, dangling relocations against discarded symbols are ignored
within DWARF sections (see maybeReportRelocationToDiscarded in
Chunks.cpp). Consequently, we also shouldn't create any pseudo
relocations for these cases, as we run into a null pointer dereference
when trying to generate the pseudo relocation info for it.
This fixes the downstream bug
https://github.com/mstorsjo/llvm-mingw/issues/418, fixing crashes on
combinations with -ffunction-sections, -fdata-sections,
-Wl,--gc-sections and debug info.
(cherry picked from commit 9c970d5ecd6a85188cd2b0a941fcd4d60063ef81)
---
lld/COFF/Chunks.cpp | 7 ++
lld/test/COFF/autoimport-gc.s | 41 +++
2 files changed, 48 insertions(+)
create mode 100644 lld/test/COFF/autoimport-gc.s
diff --git a/lld/COFF/Chunks.cpp b/lld/COFF/Chunks.cpp
index 39f4575031be54..e2074932bc466e 100644
--- a/lld/COFF/Chunks.cpp
+++ b/lld/COFF/Chunks.cpp
@@ -652,6 +652,13 @@ void SectionChunk::getRuntimePseudoRelocs(
dyn_cast_or_null(file->getSymbol(rel.SymbolTableIndex));
if (!target || !target->isRuntimePseudoReloc)
continue;
+// If the target doesn't have a chunk allocated, it may be a
+// DefinedImportData symbol which ended up unnecessary after GC.
+// Normally we wouldn't eliminate section chunks that are referenced, but
+// references within DWARF sections don't count for keeping section chunks
+// alive. Thus such dangling references in DWARF sections are expected.
+if (!target->getChunk())
+ continue;
int sizeInBits =
getRuntimePseudoRelocSize(rel.Type, file->ctx.config.machine);
if (sizeInBits == 0) {
diff --git a/lld/test/COFF/autoimport-gc.s b/lld/test/COFF/autoimport-gc.s
new file mode 100644
index 00..fef6c02eba82f9
--- /dev/null
+++ b/lld/test/COFF/autoimport-gc.s
@@ -0,0 +1,41 @@
+# REQUIRES: x86
+# RUN: split-file %s %t.dir
+
+# RUN: llvm-mc -triple=x86_64-windows-gnu %t.dir/lib.s -filetype=obj -o
%t.dir/lib.obj
+# RUN: lld-link -out:%t.dir/lib.dll -dll -entry:DllMainCRTStartup
%t.dir/lib.obj -lldmingw -implib:%t.dir/lib.lib
+
+# RUN: llvm-mc -triple=x86_64-windows-gnu %t.dir/main.s -filetype=obj -o
%t.dir/main.obj
+# RUN: lld-link -lldmingw -out:%t.dir/main.exe -entry:main %t.dir/main.obj
%t.dir/lib.lib -opt:ref -debug:dwarf
+
+#--- main.s
+.global main
+.section .text$main,"xr",one_only,main
+main:
+ret
+
+.global other
+.section .text$other,"xr",one_only,other
+other:
+movq .refptr.variable(%rip), %rax
+movl (%rax), %eax
+ret
+
+.section .rdata$.refptr.variable,"dr",discard,.refptr.variable
+.global .refptr.variable
+.refptr.variable:
+.quad variable
+
+.section .debug_info
+.long 1
+.quad variable
+.long 2
+
+#--- lib.s
+.global variable
+.global DllMainCRTStartup
+.text
+DllMainCRTStartup:
+ret
+.data
+variable:
+.long 42
___
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[llvm-branch-commits] [lld] release/18.x: [LLD] [COFF] Don't add pseudo relocs for dangling references (#88487) (PR #88759)
https://github.com/tstellar closed https://github.com/llvm/llvm-project/pull/88759 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lld] 995539c - [LLD] [COFF] Don't add pseudo relocs for dangling references (#88487)
Author: Martin Storsjö
Date: 2024-04-16T14:40:47-07:00
New Revision: 995539ce05ba27f5ed1115c13bbe9a32a035f709
URL:
https://github.com/llvm/llvm-project/commit/995539ce05ba27f5ed1115c13bbe9a32a035f709
DIFF:
https://github.com/llvm/llvm-project/commit/995539ce05ba27f5ed1115c13bbe9a32a035f709.diff
LOG: [LLD] [COFF] Don't add pseudo relocs for dangling references (#88487)
When doing GC, we normally won't have dangling references, because such
a reference would keep the other section alive, keeping it from being
eliminated.
However, references within DWARF sections are ignored for the purposes
of GC (because otherwise, they would essentially keep everything alive,
defeating the point of the GC), see
c579a5b1d92a9bc2046d00ee2d427832e0f5ddec for more context.
Therefore, dangling relocations against discarded symbols are ignored
within DWARF sections (see maybeReportRelocationToDiscarded in
Chunks.cpp). Consequently, we also shouldn't create any pseudo
relocations for these cases, as we run into a null pointer dereference
when trying to generate the pseudo relocation info for it.
This fixes the downstream bug
https://github.com/mstorsjo/llvm-mingw/issues/418, fixing crashes on
combinations with -ffunction-sections, -fdata-sections,
-Wl,--gc-sections and debug info.
(cherry picked from commit 9c970d5ecd6a85188cd2b0a941fcd4d60063ef81)
Added:
lld/test/COFF/autoimport-gc.s
Modified:
lld/COFF/Chunks.cpp
Removed:
diff --git a/lld/COFF/Chunks.cpp b/lld/COFF/Chunks.cpp
index 39f4575031be54..e2074932bc466e 100644
--- a/lld/COFF/Chunks.cpp
+++ b/lld/COFF/Chunks.cpp
@@ -652,6 +652,13 @@ void SectionChunk::getRuntimePseudoRelocs(
dyn_cast_or_null(file->getSymbol(rel.SymbolTableIndex));
if (!target || !target->isRuntimePseudoReloc)
continue;
+// If the target doesn't have a chunk allocated, it may be a
+// DefinedImportData symbol which ended up unnecessary after GC.
+// Normally we wouldn't eliminate section chunks that are referenced, but
+// references within DWARF sections don't count for keeping section chunks
+// alive. Thus such dangling references in DWARF sections are expected.
+if (!target->getChunk())
+ continue;
int sizeInBits =
getRuntimePseudoRelocSize(rel.Type, file->ctx.config.machine);
if (sizeInBits == 0) {
diff --git a/lld/test/COFF/autoimport-gc.s b/lld/test/COFF/autoimport-gc.s
new file mode 100644
index 00..fef6c02eba82f9
--- /dev/null
+++ b/lld/test/COFF/autoimport-gc.s
@@ -0,0 +1,41 @@
+# REQUIRES: x86
+# RUN: split-file %s %t.dir
+
+# RUN: llvm-mc -triple=x86_64-windows-gnu %t.dir/lib.s -filetype=obj -o
%t.dir/lib.obj
+# RUN: lld-link -out:%t.dir/lib.dll -dll -entry:DllMainCRTStartup
%t.dir/lib.obj -lldmingw -implib:%t.dir/lib.lib
+
+# RUN: llvm-mc -triple=x86_64-windows-gnu %t.dir/main.s -filetype=obj -o
%t.dir/main.obj
+# RUN: lld-link -lldmingw -out:%t.dir/main.exe -entry:main %t.dir/main.obj
%t.dir/lib.lib -opt:ref -debug:dwarf
+
+#--- main.s
+.global main
+.section .text$main,"xr",one_only,main
+main:
+ret
+
+.global other
+.section .text$other,"xr",one_only,other
+other:
+movq .refptr.variable(%rip), %rax
+movl (%rax), %eax
+ret
+
+.section .rdata$.refptr.variable,"dr",discard,.refptr.variable
+.global .refptr.variable
+.refptr.variable:
+.quad variable
+
+.section .debug_info
+.long 1
+.quad variable
+.long 2
+
+#--- lib.s
+.global variable
+.global DllMainCRTStartup
+.text
+DllMainCRTStartup:
+ret
+.data
+variable:
+.long 42
___
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[llvm-branch-commits] [lld] release/18.x: [LLD] [COFF] Don't add pseudo relocs for dangling references (#88487) (PR #88759)
tstellar wrote: Hi @mstorsjo (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. https://github.com/llvm/llvm-project/pull/88759 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] Revert "[Mips] Fix missing sign extension in expansion of sub-word atomic max (#77072)" (PR #88818)
https://github.com/tstellar updated
https://github.com/llvm/llvm-project/pull/88818
>From 1d3f5da4f323e0e5b33688450dc066e9651b Mon Sep 17 00:00:00 2001
From: Nikita Popov
Date: Tue, 16 Apr 2024 09:10:46 +0900
Subject: [PATCH] Revert "[Mips] Fix missing sign extension in expansion of
sub-word atomic max (#77072)"
These changes caused correctness regressions observed in Rust,
see
https://github.com/llvm/llvm-project/pull/77072#issuecomment-2049009507.
This reverts commit 0e501dbd932ef1c6f4e747c83bf33beef0a09ecf.
This reverts commit fbb27d16fa12aa595cbd20a1fb5f1c5b80748fa4.
---
llvm/lib/Target/Mips/MipsExpandPseudo.cpp | 60 +--
llvm/test/CodeGen/Mips/atomic-min-max.ll | 615 +++---
2 files changed, 81 insertions(+), 594 deletions(-)
diff --git a/llvm/lib/Target/Mips/MipsExpandPseudo.cpp
b/llvm/lib/Target/Mips/MipsExpandPseudo.cpp
index c30129743a9626..2c2554b5b4bc3b 100644
--- a/llvm/lib/Target/Mips/MipsExpandPseudo.cpp
+++ b/llvm/lib/Target/Mips/MipsExpandPseudo.cpp
@@ -388,32 +388,18 @@ bool MipsExpandPseudo::expandAtomicBinOpSubword(
Opcode = Mips::XOR;
break;
case Mips::ATOMIC_LOAD_UMIN_I8_POSTRA:
-IsUnsigned = true;
-IsMin = true;
-break;
case Mips::ATOMIC_LOAD_UMIN_I16_POSTRA:
IsUnsigned = true;
-IsMin = true;
-break;
+[[fallthrough]];
case Mips::ATOMIC_LOAD_MIN_I8_POSTRA:
-SEOp = Mips::SEB;
-IsMin = true;
-break;
case Mips::ATOMIC_LOAD_MIN_I16_POSTRA:
IsMin = true;
break;
case Mips::ATOMIC_LOAD_UMAX_I8_POSTRA:
-IsUnsigned = true;
-IsMax = true;
-break;
case Mips::ATOMIC_LOAD_UMAX_I16_POSTRA:
IsUnsigned = true;
-IsMax = true;
-break;
+[[fallthrough]];
case Mips::ATOMIC_LOAD_MAX_I8_POSTRA:
-SEOp = Mips::SEB;
-IsMax = true;
-break;
case Mips::ATOMIC_LOAD_MAX_I16_POSTRA:
IsMax = true;
break;
@@ -475,42 +461,14 @@ bool MipsExpandPseudo::expandAtomicBinOpSubword(
// For little endian we need to clear uninterested bits.
if (STI->isLittle()) {
- if (!IsUnsigned) {
-BuildMI(loopMBB, DL, TII->get(Mips::SRAV), OldVal)
-.addReg(OldVal)
-.addReg(ShiftAmnt);
-BuildMI(loopMBB, DL, TII->get(Mips::SRAV), Incr)
-.addReg(Incr)
-.addReg(ShiftAmnt);
-if (STI->hasMips32r2()) {
- BuildMI(loopMBB, DL, TII->get(SEOp), OldVal).addReg(OldVal);
- BuildMI(loopMBB, DL, TII->get(SEOp), Incr).addReg(Incr);
-} else {
- const unsigned ShiftImm = SEOp == Mips::SEH ? 16 : 24;
- BuildMI(loopMBB, DL, TII->get(Mips::SLL), OldVal)
- .addReg(OldVal, RegState::Kill)
- .addImm(ShiftImm);
- BuildMI(loopMBB, DL, TII->get(Mips::SRA), OldVal)
- .addReg(OldVal, RegState::Kill)
- .addImm(ShiftImm);
- BuildMI(loopMBB, DL, TII->get(Mips::SLL), Incr)
- .addReg(Incr, RegState::Kill)
- .addImm(ShiftImm);
- BuildMI(loopMBB, DL, TII->get(Mips::SRA), Incr)
- .addReg(Incr, RegState::Kill)
- .addImm(ShiftImm);
-}
- } else {
-// and OldVal, OldVal, Mask
-// and Incr, Incr, Mask
-BuildMI(loopMBB, DL, TII->get(Mips::AND), OldVal)
-.addReg(OldVal)
-.addReg(Mask);
-BuildMI(loopMBB, DL, TII->get(Mips::AND), Incr)
-.addReg(Incr)
-.addReg(Mask);
- }
+ // and OldVal, OldVal, Mask
+ // and Incr, Incr, Mask
+ BuildMI(loopMBB, DL, TII->get(Mips::AND), OldVal)
+ .addReg(OldVal)
+ .addReg(Mask);
+ BuildMI(loopMBB, DL, TII->get(Mips::AND),
Incr).addReg(Incr).addReg(Mask);
}
+
// unsigned: sltu Scratch4, oldVal, Incr
// signed: slt Scratch4, oldVal, Incr
BuildMI(loopMBB, DL, TII->get(SLTScratch4), Scratch4)
diff --git a/llvm/test/CodeGen/Mips/atomic-min-max.ll
b/llvm/test/CodeGen/Mips/atomic-min-max.ll
index a96581bdb39a4c..f953c885ea7345 100644
--- a/llvm/test/CodeGen/Mips/atomic-min-max.ll
+++ b/llvm/test/CodeGen/Mips/atomic-min-max.ll
@@ -3,7 +3,6 @@
; RUN: llc -march=mips -O0 -mcpu=mips32r6 -verify-machineinstrs %s -o - |
FileCheck %s --check-prefix=MIPSR6
; RUN: llc -march=mips -O0 -mcpu=mips32r2 -mattr=+micromips
-verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MM
; RUN: llc -march=mips -O0 -mcpu=mips32r6 -mattr=+micromips
-verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MMR6
-; RUN: llc -march=mipsel -O0 -mcpu=mips32 -verify-machineinstrs %s -o - |
FileCheck %s --check-prefix=MIPS32
; RUN: llc -march=mipsel -O0 -mcpu=mips32r2 -verify-machineinstrs %s -o - |
FileCheck %s --check-prefix=MIPSEL
; RUN: llc -march=mipsel -O0 -mcpu=mips32r6 -verify-machineinstrs %s -o - |
FileCheck %s --check-prefix=MIPSELR6
; RUN: llc -march=mipsel -O0 -mcpu=mips32r2 -mattr=+micromips
-verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MMEL
@@ -78,23 +77,6 @@ define
[llvm-branch-commits] [llvm] 1deeee3 - Revert "[Mips] Fix missing sign extension in expansion of sub-word atomic max (#77072)"
Author: Nikita Popov
Date: 2024-04-16T14:42:59-07:00
New Revision: 1d3f5da4f323e0e5b33688450dc066e9651b
URL:
https://github.com/llvm/llvm-project/commit/1d3f5da4f323e0e5b33688450dc066e9651b
DIFF:
https://github.com/llvm/llvm-project/commit/1d3f5da4f323e0e5b33688450dc066e9651b.diff
LOG: Revert "[Mips] Fix missing sign extension in expansion of sub-word atomic
max (#77072)"
These changes caused correctness regressions observed in Rust,
see
https://github.com/llvm/llvm-project/pull/77072#issuecomment-2049009507.
This reverts commit 0e501dbd932ef1c6f4e747c83bf33beef0a09ecf.
This reverts commit fbb27d16fa12aa595cbd20a1fb5f1c5b80748fa4.
Added:
Modified:
llvm/lib/Target/Mips/MipsExpandPseudo.cpp
llvm/test/CodeGen/Mips/atomic-min-max.ll
Removed:
diff --git a/llvm/lib/Target/Mips/MipsExpandPseudo.cpp
b/llvm/lib/Target/Mips/MipsExpandPseudo.cpp
index c30129743a9626..2c2554b5b4bc3b 100644
--- a/llvm/lib/Target/Mips/MipsExpandPseudo.cpp
+++ b/llvm/lib/Target/Mips/MipsExpandPseudo.cpp
@@ -388,32 +388,18 @@ bool MipsExpandPseudo::expandAtomicBinOpSubword(
Opcode = Mips::XOR;
break;
case Mips::ATOMIC_LOAD_UMIN_I8_POSTRA:
-IsUnsigned = true;
-IsMin = true;
-break;
case Mips::ATOMIC_LOAD_UMIN_I16_POSTRA:
IsUnsigned = true;
-IsMin = true;
-break;
+[[fallthrough]];
case Mips::ATOMIC_LOAD_MIN_I8_POSTRA:
-SEOp = Mips::SEB;
-IsMin = true;
-break;
case Mips::ATOMIC_LOAD_MIN_I16_POSTRA:
IsMin = true;
break;
case Mips::ATOMIC_LOAD_UMAX_I8_POSTRA:
-IsUnsigned = true;
-IsMax = true;
-break;
case Mips::ATOMIC_LOAD_UMAX_I16_POSTRA:
IsUnsigned = true;
-IsMax = true;
-break;
+[[fallthrough]];
case Mips::ATOMIC_LOAD_MAX_I8_POSTRA:
-SEOp = Mips::SEB;
-IsMax = true;
-break;
case Mips::ATOMIC_LOAD_MAX_I16_POSTRA:
IsMax = true;
break;
@@ -475,42 +461,14 @@ bool MipsExpandPseudo::expandAtomicBinOpSubword(
// For little endian we need to clear uninterested bits.
if (STI->isLittle()) {
- if (!IsUnsigned) {
-BuildMI(loopMBB, DL, TII->get(Mips::SRAV), OldVal)
-.addReg(OldVal)
-.addReg(ShiftAmnt);
-BuildMI(loopMBB, DL, TII->get(Mips::SRAV), Incr)
-.addReg(Incr)
-.addReg(ShiftAmnt);
-if (STI->hasMips32r2()) {
- BuildMI(loopMBB, DL, TII->get(SEOp), OldVal).addReg(OldVal);
- BuildMI(loopMBB, DL, TII->get(SEOp), Incr).addReg(Incr);
-} else {
- const unsigned ShiftImm = SEOp == Mips::SEH ? 16 : 24;
- BuildMI(loopMBB, DL, TII->get(Mips::SLL), OldVal)
- .addReg(OldVal, RegState::Kill)
- .addImm(ShiftImm);
- BuildMI(loopMBB, DL, TII->get(Mips::SRA), OldVal)
- .addReg(OldVal, RegState::Kill)
- .addImm(ShiftImm);
- BuildMI(loopMBB, DL, TII->get(Mips::SLL), Incr)
- .addReg(Incr, RegState::Kill)
- .addImm(ShiftImm);
- BuildMI(loopMBB, DL, TII->get(Mips::SRA), Incr)
- .addReg(Incr, RegState::Kill)
- .addImm(ShiftImm);
-}
- } else {
-// and OldVal, OldVal, Mask
-// and Incr, Incr, Mask
-BuildMI(loopMBB, DL, TII->get(Mips::AND), OldVal)
-.addReg(OldVal)
-.addReg(Mask);
-BuildMI(loopMBB, DL, TII->get(Mips::AND), Incr)
-.addReg(Incr)
-.addReg(Mask);
- }
+ // and OldVal, OldVal, Mask
+ // and Incr, Incr, Mask
+ BuildMI(loopMBB, DL, TII->get(Mips::AND), OldVal)
+ .addReg(OldVal)
+ .addReg(Mask);
+ BuildMI(loopMBB, DL, TII->get(Mips::AND),
Incr).addReg(Incr).addReg(Mask);
}
+
// unsigned: sltu Scratch4, oldVal, Incr
// signed: slt Scratch4, oldVal, Incr
BuildMI(loopMBB, DL, TII->get(SLTScratch4), Scratch4)
diff --git a/llvm/test/CodeGen/Mips/atomic-min-max.ll
b/llvm/test/CodeGen/Mips/atomic-min-max.ll
index a96581bdb39a4c..f953c885ea7345 100644
--- a/llvm/test/CodeGen/Mips/atomic-min-max.ll
+++ b/llvm/test/CodeGen/Mips/atomic-min-max.ll
@@ -3,7 +3,6 @@
; RUN: llc -march=mips -O0 -mcpu=mips32r6 -verify-machineinstrs %s -o - |
FileCheck %s --check-prefix=MIPSR6
; RUN: llc -march=mips -O0 -mcpu=mips32r2 -mattr=+micromips
-verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MM
; RUN: llc -march=mips -O0 -mcpu=mips32r6 -mattr=+micromips
-verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MMR6
-; RUN: llc -march=mipsel -O0 -mcpu=mips32 -verify-machineinstrs %s -o - |
FileCheck %s --check-prefix=MIPS32
; RUN: llc -march=mipsel -O0 -mcpu=mips32r2 -verify-machineinstrs %s -o - |
FileCheck %s --check-prefix=MIPSEL
; RUN: llc -march=mipsel -O0 -mcpu=mips32r6 -verify-machineinstrs %s -o - |
FileCheck %s --check-prefix=MIPSELR6
; RUN: llc -march=mipsel -O0 -mcpu=mips32r2 -mat
[llvm-branch-commits] [clang] release/18.x [X86_64] fix SSE type error in vaarg (PR #86698)
efriedma-quic wrote: Right, the policy doesn't say we can only take regression fixes. We just need to weight the impact vs. the risk. Looking at the latest conversation on the bug report this case is pretty clearly still broken. It's improved in the sense that after the va_arg of the struct, subsequent va_arg calls produce the right value. But the va_arg iteslf doesn't produce the right value (probably we aren't copying the struct correctly). So that would be a regression for some cases. Given that, we probably don't want to pull this into 18.x as-is. Also, given that we're making other fixes to the surrounding code, pulling any one fix into 18.x seems risky to me. And probably low-impact, given the testcases appear to be generated by a fuzzer. https://github.com/llvm/llvm-project/pull/86698 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] Revert "[Mips] Fix missing sign extension in expansion of sub-word atomic max (#77072)" (PR #88818)
tstellar wrote: Hi @nikic (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. https://github.com/llvm/llvm-project/pull/88818 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] Revert "[Mips] Fix missing sign extension in expansion of sub-word atomic max (#77072)" (PR #88818)
https://github.com/tstellar closed https://github.com/llvm/llvm-project/pull/88818 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [lld] [llvm] release/18.x: [LoongArch] Use R_LARCH_ALIGN with section symbol (#84741) (PR #88891)
tstellar wrote: @MaskRay Is this OK to backport? https://github.com/llvm/llvm-project/pull/88891 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/18.x: [MIPS] Fix the opcode of max.fmt and mina.fmt (#85609) (PR #88337)
tstellar wrote: @wzssyqa What do you think about backporting this? https://github.com/llvm/llvm-project/pull/88337 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] Fix override keyword being print to the left side (PR #88453)
https://github.com/tstellar updated
https://github.com/llvm/llvm-project/pull/88453
>From e3c832b37b0a7b97eb16eaff2dda747093a858e2 Mon Sep 17 00:00:00 2001
From: Giuliano Belinassi
Date: Thu, 11 Apr 2024 20:09:49 -0300
Subject: [PATCH] Fix override keyword being print to the left side
Previously, the `override` keyword in C++ was being print in the left
side of a method decl, which is unsupported by C++ standard. This commit
fixes that by setting the `CanPrintOnLeft` field to 0, forcing it to be
print on the right side of the decl.
Signed-off-by: Giuliano Belinassi
---
clang/include/clang/Basic/Attr.td | 2 ++
clang/test/AST/ast-dump-override-final.cpp | 20
2 files changed, 22 insertions(+)
create mode 100644 clang/test/AST/ast-dump-override-final.cpp
diff --git a/clang/include/clang/Basic/Attr.td
b/clang/include/clang/Basic/Attr.td
index 58838b01b4fd7c..dbf2dd2120fb69 100644
--- a/clang/include/clang/Basic/Attr.td
+++ b/clang/include/clang/Basic/Attr.td
@@ -1590,6 +1590,7 @@ def RegCall : DeclOrTypeAttr {
}
def Final : InheritableAttr {
+ let CanPrintOnLeft = 0;
let Spellings = [CustomKeyword<"final">, CustomKeyword<"sealed">];
let Accessors = [Accessor<"isSpelledAsSealed", [CustomKeyword<"sealed">]>];
let SemaHandler = 0;
@@ -2472,6 +2473,7 @@ def Overloadable : Attr {
}
def Override : InheritableAttr {
+ let CanPrintOnLeft = 0;
let Spellings = [CustomKeyword<"override">];
let SemaHandler = 0;
// Omitted from docs, since this is language syntax, not an attribute, as far
diff --git a/clang/test/AST/ast-dump-override-final.cpp
b/clang/test/AST/ast-dump-override-final.cpp
new file mode 100644
index 00..c1cee6b01565f6
--- /dev/null
+++ b/clang/test/AST/ast-dump-override-final.cpp
@@ -0,0 +1,20 @@
+// This file contain tests to check if override and final are dumped in the
+// correct positions.
+
+// RUN: %clang_cc1 -ast-print -x c++ %s -o - | FileCheck %s
+
+// CHECK: class A {
+class A {
+ // CHECK-NEXT: virtual void f();
+ virtual void f();
+
+ // CHECK-NEXT: virtual void g() final;
+ virtual void g() final;
+} AA;
+
+// CHECK: class B : public A {
+class B : public A {
+ // CHECK-NEXT: virtual void f() override {
+ virtual void f() override {
+ };
+} B;
___
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[llvm-branch-commits] [clang] [libc] [lldb] [llvm] [mlir] [Sparc] Fix instr desc of special register stores (PR #88971)
https://github.com/darkbuck updated
https://github.com/llvm/llvm-project/pull/88971
>From d19bd05c79ad3b1a2c3cb439c3fc60825f66bed7 Mon Sep 17 00:00:00 2001
From: Hubert Tong
Date: Tue, 16 Apr 2024 17:26:55 -0400
Subject: [PATCH 1/7] Clang Release Notes: Fix reST formatting
Fix a use of inline code markup to have a non-word character after the ending
delimiter as required by reST.
---
clang/docs/ReleaseNotes.rst | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index e6c345a2f5c0f5..4aedfafcb26aea 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -68,7 +68,7 @@ AST Dumping Potentially Breaking Changes
Clang Frontend Potentially Breaking Changes
---
-- Removed support for constructing on-stack ``TemplateArgumentList``s;
interfaces should instead
+- Removed support for constructing on-stack ``TemplateArgumentList``\ s;
interfaces should instead
use ``ArrayRef`` to pass template arguments. Transitioning
internal uses to
``ArrayRef`` reduces AST memory usage by 0.4% when
compiling clang, and is
expected to show similar improvements on other workloads.
>From 3074060d6a1d7d2e74cb767876bd9e5192d12007 Mon Sep 17 00:00:00 2001
From: Kazu Hirata
Date: Tue, 16 Apr 2024 14:28:45 -0700
Subject: [PATCH 2/7] [memprof] Use SizeIs (NFC) (#88984)
---
llvm/unittests/ProfileData/MemProfTest.cpp | 30 +++---
1 file changed, 15 insertions(+), 15 deletions(-)
diff --git a/llvm/unittests/ProfileData/MemProfTest.cpp
b/llvm/unittests/ProfileData/MemProfTest.cpp
index f596919ed039a8..7e00a80cacf933 100644
--- a/llvm/unittests/ProfileData/MemProfTest.cpp
+++ b/llvm/unittests/ProfileData/MemProfTest.cpp
@@ -183,13 +183,13 @@ TEST(MemProf, FillsValue) {
// We expect 4 records. We attach alloc site data to foo and bar, i.e.
// all frames bottom up until we find a non-inline frame. We attach call site
// data to bar, xyz and abc.
- ASSERT_EQ(Records.size(), 4U);
+ ASSERT_THAT(Records, SizeIs(4));
// Check the memprof record for foo.
const llvm::GlobalValue::GUID FooId = IndexedMemProfRecord::getGUID("foo");
ASSERT_EQ(Records.count(FooId), 1U);
const MemProfRecord &Foo = Records[FooId];
- ASSERT_EQ(Foo.AllocSites.size(), 1U);
+ ASSERT_THAT(Foo.AllocSites, SizeIs(1));
EXPECT_EQ(Foo.AllocSites[0].Info.getAllocCount(), 1U);
EXPECT_THAT(Foo.AllocSites[0].CallStack[0],
FrameContains("foo", 5U, 30U, true));
@@ -205,7 +205,7 @@ TEST(MemProf, FillsValue) {
const llvm::GlobalValue::GUID BarId = IndexedMemProfRecord::getGUID("bar");
ASSERT_EQ(Records.count(BarId), 1U);
const MemProfRecord &Bar = Records[BarId];
- ASSERT_EQ(Bar.AllocSites.size(), 1U);
+ ASSERT_THAT(Bar.AllocSites, SizeIs(1));
EXPECT_EQ(Bar.AllocSites[0].Info.getAllocCount(), 1U);
EXPECT_THAT(Bar.AllocSites[0].CallStack[0],
FrameContains("foo", 5U, 30U, true));
@@ -216,8 +216,8 @@ TEST(MemProf, FillsValue) {
EXPECT_THAT(Bar.AllocSites[0].CallStack[3],
FrameContains("abc", 5U, 30U, false));
- ASSERT_EQ(Bar.CallSites.size(), 1U);
- ASSERT_EQ(Bar.CallSites[0].size(), 2U);
+ ASSERT_THAT(Bar.CallSites, SizeIs(1));
+ ASSERT_THAT(Bar.CallSites[0], SizeIs(2));
EXPECT_THAT(Bar.CallSites[0][0], FrameContains("foo", 5U, 30U, true));
EXPECT_THAT(Bar.CallSites[0][1], FrameContains("bar", 51U, 20U, false));
@@ -225,8 +225,8 @@ TEST(MemProf, FillsValue) {
const llvm::GlobalValue::GUID XyzId = IndexedMemProfRecord::getGUID("xyz");
ASSERT_EQ(Records.count(XyzId), 1U);
const MemProfRecord &Xyz = Records[XyzId];
- ASSERT_EQ(Xyz.CallSites.size(), 1U);
- ASSERT_EQ(Xyz.CallSites[0].size(), 2U);
+ ASSERT_THAT(Xyz.CallSites, SizeIs(1));
+ ASSERT_THAT(Xyz.CallSites[0], SizeIs(2));
// Expect the entire frame even though in practice we only need the first
// entry here.
EXPECT_THAT(Xyz.CallSites[0][0], FrameContains("xyz", 5U, 30U, true));
@@ -237,8 +237,8 @@ TEST(MemProf, FillsValue) {
ASSERT_EQ(Records.count(AbcId), 1U);
const MemProfRecord &Abc = Records[AbcId];
EXPECT_TRUE(Abc.AllocSites.empty());
- ASSERT_EQ(Abc.CallSites.size(), 1U);
- ASSERT_EQ(Abc.CallSites[0].size(), 2U);
+ ASSERT_THAT(Abc.CallSites, SizeIs(1));
+ ASSERT_THAT(Abc.CallSites[0], SizeIs(2));
EXPECT_THAT(Abc.CallSites[0][0], FrameContains("xyz", 5U, 30U, true));
EXPECT_THAT(Abc.CallSites[0][1], FrameContains("abc", 5U, 30U, false));
}
@@ -393,9 +393,9 @@ TEST(MemProf, SymbolizationFilter) {
Records.push_back(KeyRecordPair.second);
}
- ASSERT_EQ(Records.size(), 1U);
- ASSERT_EQ(Records[0].AllocSites.size(), 1U);
- ASSERT_EQ(Records[0].AllocSites[0].CallStack.size(), 1U);
+ ASSERT_THAT(Records, SizeIs(1));
+ ASSERT_THAT(Records[0].AllocSites, SizeIs(1));
+ ASSERT_THAT(Records[0].AllocSites[0].CallStack, SizeIs(1));
EXPECT_THAT(Records[0].AllocSites[0].CallStack[0],
Frame
[llvm-branch-commits] [TableGen][InstrInfoEmitter] Count sub-operands on def operands (PR #88972)
https://github.com/darkbuck updated https://github.com/llvm/llvm-project/pull/88972 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [TableGen][InstrInfoEmitter] Count sub-operands on def operands (PR #88972)
https://github.com/darkbuck updated https://github.com/llvm/llvm-project/pull/88972 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] e3c832b - Fix override keyword being print to the left side
Author: Giuliano Belinassi
Date: 2024-04-16T16:09:49-07:00
New Revision: e3c832b37b0a7b97eb16eaff2dda747093a858e2
URL:
https://github.com/llvm/llvm-project/commit/e3c832b37b0a7b97eb16eaff2dda747093a858e2
DIFF:
https://github.com/llvm/llvm-project/commit/e3c832b37b0a7b97eb16eaff2dda747093a858e2.diff
LOG: Fix override keyword being print to the left side
Previously, the `override` keyword in C++ was being print in the left
side of a method decl, which is unsupported by C++ standard. This commit
fixes that by setting the `CanPrintOnLeft` field to 0, forcing it to be
print on the right side of the decl.
Signed-off-by: Giuliano Belinassi
Added:
clang/test/AST/ast-dump-override-final.cpp
Modified:
clang/include/clang/Basic/Attr.td
Removed:
diff --git a/clang/include/clang/Basic/Attr.td
b/clang/include/clang/Basic/Attr.td
index 58838b01b4fd7c..dbf2dd2120fb69 100644
--- a/clang/include/clang/Basic/Attr.td
+++ b/clang/include/clang/Basic/Attr.td
@@ -1590,6 +1590,7 @@ def RegCall : DeclOrTypeAttr {
}
def Final : InheritableAttr {
+ let CanPrintOnLeft = 0;
let Spellings = [CustomKeyword<"final">, CustomKeyword<"sealed">];
let Accessors = [Accessor<"isSpelledAsSealed", [CustomKeyword<"sealed">]>];
let SemaHandler = 0;
@@ -2472,6 +2473,7 @@ def Overloadable : Attr {
}
def Override : InheritableAttr {
+ let CanPrintOnLeft = 0;
let Spellings = [CustomKeyword<"override">];
let SemaHandler = 0;
// Omitted from docs, since this is language syntax, not an attribute, as far
diff --git a/clang/test/AST/ast-dump-override-final.cpp
b/clang/test/AST/ast-dump-override-final.cpp
new file mode 100644
index 00..c1cee6b01565f6
--- /dev/null
+++ b/clang/test/AST/ast-dump-override-final.cpp
@@ -0,0 +1,20 @@
+// This file contain tests to check if override and final are dumped in the
+// correct positions.
+
+// RUN: %clang_cc1 -ast-print -x c++ %s -o - | FileCheck %s
+
+// CHECK: class A {
+class A {
+ // CHECK-NEXT: virtual void f();
+ virtual void f();
+
+ // CHECK-NEXT: virtual void g() final;
+ virtual void g() final;
+} AA;
+
+// CHECK: class B : public A {
+class B : public A {
+ // CHECK-NEXT: virtual void f() override {
+ virtual void f() override {
+ };
+} B;
___
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[llvm-branch-commits] [clang] Fix override keyword being print to the left side (PR #88453)
https://github.com/tstellar closed https://github.com/llvm/llvm-project/pull/88453 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] Fix override keyword being print to the left side (PR #88453)
tstellar wrote: Hi @giulianobelinassi (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. https://github.com/llvm/llvm-project/pull/88453 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [CMake][Release] Disable PGO (#88465) (PR #89000)
https://github.com/tstellar created https://github.com/llvm/llvm-project/pull/89000 Running the test-release.sh script with PGO enabled causes build errors like: ld.lld: error: Function Import: link error: linking module flags 'ProfileSummary': IDs have conflicting values I believe this a build system bug due to the PGO profile data being generated unconditionally. If you run `ninja check-all` and then `ninja install` like we do in test-release.sh, then the profile data is regenerated during `ninja install` and some of the clang tools which are not test dependencies get build during the ninja install step with different profile data. When these tools link against the LLVM libraries, like libSupport, we end up with these errors. (cherry picked from commit 0d2bb7f017f13ceae793fab7d83d3e67e8d8d8f8) >From 715f7249949778c20de5e15d8ba58103610d6a16 Mon Sep 17 00:00:00 2001 From: Tom Stellard Date: Fri, 12 Apr 2024 15:10:04 -0700 Subject: [PATCH] [CMake][Release] Disable PGO (#88465) Running the test-release.sh script with PGO enabled causes build errors like: ld.lld: error: Function Import: link error: linking module flags 'ProfileSummary': IDs have conflicting values I believe this a build system bug due to the PGO profile data being generated unconditionally. If you run `ninja check-all` and then `ninja install` like we do in test-release.sh, then the profile data is regenerated during `ninja install` and some of the clang tools which are not test dependencies get build during the ninja install step with different profile data. When these tools link against the LLVM libraries, like libSupport, we end up with these errors. (cherry picked from commit 0d2bb7f017f13ceae793fab7d83d3e67e8d8d8f8) --- clang/cmake/caches/Release.cmake | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/clang/cmake/caches/Release.cmake b/clang/cmake/caches/Release.cmake index 1ca9138b980731..bd1f688d61a7ea 100644 --- a/clang/cmake/caches/Release.cmake +++ b/clang/cmake/caches/Release.cmake @@ -4,7 +4,7 @@ # General Options set(LLVM_RELEASE_ENABLE_LTO THIN CACHE STRING "") -set(LLVM_RELEASE_ENABLE_PGO ON CACHE BOOL "") +set(LLVM_RELEASE_ENABLE_PGO OFF CACHE BOOL "") set(CMAKE_BUILD_TYPE RELEASE CACHE STRING "") ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [CMake][Release] Disable PGO (#88465) (PR #89000)
llvmbot wrote: @llvm/pr-subscribers-clang Author: Tom Stellard (tstellar) Changes Running the test-release.sh script with PGO enabled causes build errors like: ld.lld: error: Function Import: link error: linking module flags 'ProfileSummary': IDs have conflicting values I believe this a build system bug due to the PGO profile data being generated unconditionally. If you run `ninja check-all` and then `ninja install` like we do in test-release.sh, then the profile data is regenerated during `ninja install` and some of the clang tools which are not test dependencies get build during the ninja install step with different profile data. When these tools link against the LLVM libraries, like libSupport, we end up with these errors. (cherry picked from commit 0d2bb7f017f13ceae793fab7d83d3e67e8d8d8f8) --- Full diff: https://github.com/llvm/llvm-project/pull/89000.diff 1 Files Affected: - (modified) clang/cmake/caches/Release.cmake (+1-1) ``diff diff --git a/clang/cmake/caches/Release.cmake b/clang/cmake/caches/Release.cmake index 1ca9138b980731..bd1f688d61a7ea 100644 --- a/clang/cmake/caches/Release.cmake +++ b/clang/cmake/caches/Release.cmake @@ -4,7 +4,7 @@ # General Options set(LLVM_RELEASE_ENABLE_LTO THIN CACHE STRING "") -set(LLVM_RELEASE_ENABLE_PGO ON CACHE BOOL "") +set(LLVM_RELEASE_ENABLE_PGO OFF CACHE BOOL "") set(CMAKE_BUILD_TYPE RELEASE CACHE STRING "") `` https://github.com/llvm/llvm-project/pull/89000 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [Sparc] Fix instr desc of special register stores (PR #88971)
https://github.com/darkbuck updated https://github.com/llvm/llvm-project/pull/88971 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [Sparc] Fix instr desc of special register stores (PR #88971)
https://github.com/darkbuck updated https://github.com/llvm/llvm-project/pull/88971 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [TableGen][InstrInfoEmitter] Count sub-operands on def operands (PR #88972)
https://github.com/darkbuck updated https://github.com/llvm/llvm-project/pull/88972 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
