[llvm-branch-commits] [clang] [Clang][Driver] Add special-casing for including libc++ in C++03 (PR #83723)
https://github.com/philnik777 edited https://github.com/llvm/llvm-project/pull/83723 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [clang] [Clang][Driver] Add special-casing for including libc++ in C++03 (PR #83723)
github-actions[bot] wrote:
:warning: C/C++ code formatter, clang-format found issues in your code.
:warning:
You can test this locally with the following command:
``bash
git-clang-format --diff b873847a53ae638e2146e3657fe33efe30c2afe1
a4b3917ae30620d3dd4fdb6b0fd92f7563314145 --
clang/include/clang/Driver/ToolChain.h clang/lib/Driver/ToolChain.cpp
clang/lib/Driver/ToolChains/AIX.cpp clang/lib/Driver/ToolChains/BareMetal.cpp
clang/lib/Driver/ToolChains/CrossWindows.cpp
clang/lib/Driver/ToolChains/Darwin.cpp clang/lib/Driver/ToolChains/FreeBSD.cpp
clang/lib/Driver/ToolChains/Fuchsia.cpp clang/lib/Driver/ToolChains/Gnu.cpp
clang/lib/Driver/ToolChains/Haiku.cpp clang/lib/Driver/ToolChains/Hexagon.cpp
clang/lib/Driver/ToolChains/MinGW.cpp clang/lib/Driver/ToolChains/MipsLinux.cpp
clang/lib/Driver/ToolChains/NaCl.cpp clang/lib/Driver/ToolChains/NetBSD.cpp
clang/lib/Driver/ToolChains/OHOS.cpp clang/lib/Driver/ToolChains/OpenBSD.cpp
clang/lib/Driver/ToolChains/WebAssembly.cpp clang/lib/Driver/ToolChains/ZOS.cpp
clang/lib/Driver/ToolChains/ZOS.h clang/test/Driver/linux-header-search.cpp
``
View the diff from clang-format here.
``diff
diff --git a/clang/lib/Driver/ToolChain.cpp b/clang/lib/Driver/ToolChain.cpp
index 1e94a53f8a..e35359faaa 100644
--- a/clang/lib/Driver/ToolChain.cpp
+++ b/clang/lib/Driver/ToolChain.cpp
@@ -40,9 +40,9 @@
#include "llvm/Support/FileSystem.h"
#include "llvm/Support/FileUtilities.h"
#include "llvm/Support/Path.h"
-#include "llvm/Support/WithColor.h"
#include "llvm/Support/VersionTuple.h"
#include "llvm/Support/VirtualFileSystem.h"
+#include "llvm/Support/WithColor.h"
#include "llvm/TargetParser/AArch64TargetParser.h"
#include "llvm/TargetParser/TargetParser.h"
#include "llvm/TargetParser/Triple.h"
diff --git a/clang/lib/Driver/ToolChains/Hexagon.cpp
b/clang/lib/Driver/ToolChains/Hexagon.cpp
index 7358c2a121..7f13c0745d 100644
--- a/clang/lib/Driver/ToolChains/Hexagon.cpp
+++ b/clang/lib/Driver/ToolChains/Hexagon.cpp
@@ -743,8 +743,7 @@ void HexagonToolChain::addLibCxxIncludePaths(
// FIXME: Is this actually expected? (Same below)
addSystemInclude(DriverArgs, CC1Args,
D.SysRoot + "/usr/include/c++/v1/backward");
- }
- else if (getTriple().isMusl()) {
+ } else if (getTriple().isMusl()) {
ToolChain::AddLibcxxInclude(DriverArgs, CC1Args, "/usr/include",
IncludeStrategy::AssumeAvailable);
addSystemInclude(DriverArgs, CC1Args, "/usr/include/c++/v1/backward");
diff --git a/clang/lib/Driver/ToolChains/NetBSD.cpp
b/clang/lib/Driver/ToolChains/NetBSD.cpp
index f6ccde40b0..7508323906 100644
--- a/clang/lib/Driver/ToolChains/NetBSD.cpp
+++ b/clang/lib/Driver/ToolChains/NetBSD.cpp
@@ -494,10 +494,10 @@ void NetBSD::AddClangSystemIncludeArgs(
void NetBSD::addLibCxxIncludePaths(const llvm::opt::ArgList &DriverArgs,
llvm::opt::ArgStringList &CC1Args) const {
const std::string Candidates[] = {
-// directory relative to build tree
-concat(getDriver().Dir, "/../include"),
-// system install with full upstream path
-concat(getDriver().SysRoot, "/usr/include"),
+ // directory relative to build tree
+ concat(getDriver().Dir, "/../include"),
+ // system install with full upstream path
+ concat(getDriver().SysRoot, "/usr/include"),
};
for (const auto &IncludePath : Candidates) {
``
https://github.com/llvm/llvm-project/pull/83723
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[llvm-branch-commits] [mlir] [mlir][Transforms] Add listener support to dialect conversion (PR #83425)
https://github.com/jpienaar approved this pull request.
> *[Reviewable](https://reviewable.io/reviews/llvm/llvm-project/83425)* status:
> 0 of 4 files reviewed, 1 unresolved discussion (waiting on @ftynse,
> @joker-eph, and @matthias-springer)
___
*[`mlir/lib/Transforms/Utils/DialectConversion.cpp` line 363 at
r1](https://reviewable.io/reviews/llvm/llvm-project/83425#-Ns3aO9h2L3R0Ul-IX4T:-Ns3aO9h2L3R0Ul-IX4U:blphauh)
([raw
file](https://github.com/llvm/llvm-project/blob/22e8d5ea80b74d687c3e792c512f50b9de81f489/mlir/lib/Transforms/Utils/DialectConversion.cpp#L363)):*
> ```cpp
> // notification and iterators into past IR state cannot be represented.
> listener->notifyBlockInserted(block, /*previous=*/region,
> /*previousIt=*/{});
> ```
And this is expected in the consumer that it may get not previousIt?
https://github.com/llvm/llvm-project/pull/83425
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[llvm-branch-commits] [compiler-rt] Remove llvm_gtest dependency from unit tests (PR #83649)
https://github.com/arichardson updated https://github.com/llvm/llvm-project/pull/83649 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [compiler-rt] Remove llvm_gtest dependency from unit tests (PR #83649)
https://github.com/arichardson updated https://github.com/llvm/llvm-project/pull/83649 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [compiler-rt] Fix build race with COMPILER_RT_TEST_STANDALONE_BUILD_LIBS (PR #83650)
https://github.com/arichardson updated https://github.com/llvm/llvm-project/pull/83650 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [compiler-rt] Fix build race with COMPILER_RT_TEST_STANDALONE_BUILD_LIBS (PR #83650)
https://github.com/arichardson updated https://github.com/llvm/llvm-project/pull/83650 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [compiler-rt] Don't check COMPILER_RT_STANDALONE_BUILD for test deps (PR #83651)
https://github.com/arichardson updated https://github.com/llvm/llvm-project/pull/83651 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [compiler-rt] Don't check COMPILER_RT_STANDALONE_BUILD for test deps (PR #83651)
https://github.com/arichardson updated https://github.com/llvm/llvm-project/pull/83651 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [MSan] Pass -fsanitize-ignorelist to the instrumented libcxxabi (PR #83652)
https://github.com/arichardson updated https://github.com/llvm/llvm-project/pull/83652 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [MSan] Pass -fsanitize-ignorelist to the instrumented libcxxabi (PR #83652)
https://github.com/arichardson updated https://github.com/llvm/llvm-project/pull/83652 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [compiler-rt] [compiler-rt] Allow running tests without installing first (PR #83088)
https://github.com/arichardson updated
https://github.com/llvm/llvm-project/pull/83088
>From 3c41df9f8fd00d86fe500d9b67e51d15a690209b Mon Sep 17 00:00:00 2001
From: Alex Richardson
Date: Mon, 26 Feb 2024 16:59:08 -0800
Subject: [PATCH] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20change?=
=?UTF-8?q?s=20to=20main=20this=20commit=20is=20based=20on?=
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Created using spr 1.3.4
[skip ci]
---
compiler-rt/cmake/Modules/CompilerRTCompile.cmake | 7 ++-
compiler-rt/test/dfsan/reaches_function.c | 4 ++--
2 files changed, 8 insertions(+), 3 deletions(-)
diff --git a/compiler-rt/cmake/Modules/CompilerRTCompile.cmake
b/compiler-rt/cmake/Modules/CompilerRTCompile.cmake
index 64e7acb9afd833..8c804acb44ae4d 100644
--- a/compiler-rt/cmake/Modules/CompilerRTCompile.cmake
+++ b/compiler-rt/cmake/Modules/CompilerRTCompile.cmake
@@ -70,9 +70,14 @@ function(clang_compile object_file source)
if (TARGET CompilerRTUnitTestCheckCxx)
list(APPEND SOURCE_DEPS CompilerRTUnitTestCheckCxx)
endif()
+ string(REGEX MATCH "[.](cc|cpp)$" is_cxx ${source_rpath})
+ if (is_cxx)
+set(compiler ${COMPILER_RT_TEST_COMPILER})
+ else()
+set(compiler ${COMPILER_RT_TEST_CXX_COMPILER})
+ endif()
if(COMPILER_RT_STANDALONE_BUILD)
# Only add global flags in standalone build.
-string(REGEX MATCH "[.](cc|cpp)$" is_cxx ${source_rpath})
if(is_cxx)
string(REPLACE " " ";" global_flags "${CMAKE_CXX_FLAGS}")
else()
diff --git a/compiler-rt/test/dfsan/reaches_function.c
b/compiler-rt/test/dfsan/reaches_function.c
index 9e2bcee935b2ac..afcd08cee76a0e 100644
--- a/compiler-rt/test/dfsan/reaches_function.c
+++ b/compiler-rt/test/dfsan/reaches_function.c
@@ -32,7 +32,7 @@ void my_dfsan_reaches_function_callback(dfsan_label label,
dfsan_origin origin,
__attribute__((noinline)) uint64_t add(uint64_t *a, uint64_t *b) {
return *a + *b;
- // CHECK: {{.*}}compiler-rt/test/dfsan/reaches_function.c:[[# @LINE - 1]]
add.dfsan
+ // CHECK: test/dfsan/reaches_function.c:[[# @LINE - 1]] add.dfsan
// CHECK-ORIGIN-TRACKING: Origin value: 0x1002, Taint value was stored
to memory at
// CHECK-ORIGIN-TRACKING: #0 {{.*}} in add.dfsan
{{.*}}compiler-rt/test/dfsan/reaches_function.c:[[# @LINE - 3]]:{{.*}}
// CHECK-ORIGIN-TRACKING: Origin value: 0x1, Taint value was created at
@@ -54,7 +54,7 @@ int main(int argc, char *argv[]) {
dfsan_set_label(8, &a, sizeof(a));
uint64_t c = add(&a, &b);
- // CHECK: {{.*}}compiler-rt/test/dfsan/reaches_function.c:[[# @LINE - 1]]
main
+ // CHECK: test/dfsan/reaches_function.c:[[# @LINE - 1]] main
// CHECK-ORIGIN-TRACKING: Origin value: 0x1002, Taint value was stored
to memory at
// CHECK-ORIGIN-TRACKING: #0 {{.*}} in add.dfsan
{{.*}}compiler-rt/test/dfsan/reaches_function.c:{{.*}}
// CHECK-ORIGIN-TRACKING: Origin value: 0x1, Taint value was created at
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[llvm-branch-commits] [compiler-rt] [compiler-rt] Allow running tests without installing first (PR #83088)
https://github.com/arichardson edited https://github.com/llvm/llvm-project/pull/83088 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/18.x: [RISCV] Fix crash when unrolling loop containing vector instructions (#83384) (PR #83744)
https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/83744 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/18.x: [RISCV] Fix crash when unrolling loop containing vector instructions (#83384) (PR #83744)
llvmbot wrote: @arcbbb What do you think about merging this PR to the release branch? https://github.com/llvm/llvm-project/pull/83744 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/18.x: [RISCV] Fix crash when unrolling loop containing vector instructions (#83384) (PR #83744)
https://github.com/llvmbot created
https://github.com/llvm/llvm-project/pull/83744
Backport fb67dce1cb87e279593c27bd4122fe63bad75f04
Requested by: @frasercrmck
>From 5af0305ca3ff78a7e12ea94cc50498e2380155ea Mon Sep 17 00:00:00 2001
From: Shih-Po Hung
Date: Sat, 2 Mar 2024 12:33:55 +0800
Subject: [PATCH] [RISCV] Fix crash when unrolling loop containing vector
instructions (#83384)
When MVT is not a vector type, TCK_CodeSize should return an invalid
cost. This patch adds a check in the beginning to make sure all cost
kinds return invalid costs consistently.
Before this patch, TCK_CodeSize returns a valid cost on scalar MVT but
other cost kinds doesn't.
This fixes the issue #83294 where a loop contains vector instructions
and MVT is scalar after type legalization when the vector extension is
not enabled,
(cherry picked from commit fb67dce1cb87e279593c27bd4122fe63bad75f04)
---
.../Target/RISCV/RISCVTargetTransformInfo.cpp | 3 ++
.../CostModel/RISCV/vector-cost-without-v.ll | 53 +++
2 files changed, 56 insertions(+)
create mode 100644 llvm/test/Analysis/CostModel/RISCV/vector-cost-without-v.ll
diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
index 866d5cf340e68b..66dab70d455ff4 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
@@ -37,6 +37,9 @@ static cl::opt SLPMaxVF(
InstructionCost
RISCVTTIImpl::getRISCVInstructionCost(ArrayRef OpCodes, MVT VT,
TTI::TargetCostKind CostKind) {
+ // Check if the type is valid for all CostKind
+ if (!VT.isVector())
+return InstructionCost::getInvalid();
size_t NumInstr = OpCodes.size();
if (CostKind == TTI::TCK_CodeSize)
return NumInstr;
diff --git a/llvm/test/Analysis/CostModel/RISCV/vector-cost-without-v.ll
b/llvm/test/Analysis/CostModel/RISCV/vector-cost-without-v.ll
new file mode 100644
index 00..cd99065f0285cd
--- /dev/null
+++ b/llvm/test/Analysis/CostModel/RISCV/vector-cost-without-v.ll
@@ -0,0 +1,53 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
UTC_ARGS: --version 4
+; RUN: opt < %s -mtriple=riscv64 -mattr=+f,+d --passes=loop-unroll-full -S |
FileCheck %s
+
+; Check it doesn't crash when the vector extension is not enabled.
+define void @foo() {
+; CHECK-LABEL: define void @foo(
+; CHECK-SAME: ) #[[ATTR0:[0-9]+]] {
+; CHECK-NEXT: entry:
+; CHECK-NEXT:br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT:[[INDVARS_IV1:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]],
[[FOR_BODY]] ], [ 0, [[ENTRY:%.*]] ]
+; CHECK-NEXT:[[TMP0:%.*]] = load float, ptr null, align 4
+; CHECK-NEXT:[[SPLAT_SPLAT_I_I_I:%.*]] = shufflevector <2 x float>
zeroinitializer, <2 x float> zeroinitializer, <2 x i32> zeroinitializer
+; CHECK-NEXT:[[CMP1_I_I_I:%.*]] = fcmp ogt <2 x float> zeroinitializer,
zeroinitializer
+; CHECK-NEXT:[[SPLAT_SPLAT3_I_I_I:%.*]] = shufflevector <2 x i32>
zeroinitializer, <2 x i32> zeroinitializer, <2 x i32> zeroinitializer
+; CHECK-NEXT:[[XOR3_I_I_I_I_I:%.*]] = select <2 x i1> zeroinitializer, <2
x i32> zeroinitializer, <2 x i32> zeroinitializer
+; CHECK-NEXT:[[TMP1:%.*]] = load float, ptr null, align 4
+; CHECK-NEXT:[[SPLAT_SPLAT8_I_I_I:%.*]] = shufflevector <2 x float>
zeroinitializer, <2 x float> zeroinitializer, <2 x i32> zeroinitializer
+; CHECK-NEXT:[[SUB_I_I_I:%.*]] = fsub <2 x float> zeroinitializer,
zeroinitializer
+; CHECK-NEXT:[[MUL_I_I_I:%.*]] = shl i64 0, 0
+; CHECK-NEXT:[[TMP2:%.*]] = load float, ptr null, align 4
+; CHECK-NEXT:[[SPLAT_SPLAT_I_I_I_I:%.*]] = shufflevector <2 x float>
zeroinitializer, <2 x float> zeroinitializer, <2 x i32> zeroinitializer
+; CHECK-NEXT:[[XOR3_I_I_I_V_I_I:%.*]] = select <2 x i1> zeroinitializer,
<2 x float> zeroinitializer, <2 x float> zeroinitializer
+; CHECK-NEXT:[[INDVARS_IV_NEXT]] = add i64 [[INDVARS_IV1]], 1
+; CHECK-NEXT:[[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV1]], 8
+; CHECK-NEXT:br i1 [[EXITCOND]], label [[FOR_BODY]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT:ret void
+;
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %indvars.iv1 = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
+ %0 = load float, ptr null, align 4
+ %splat.splat.i.i.i = shufflevector <2 x float> zeroinitializer, <2 x float>
zeroinitializer, <2 x i32> zeroinitializer
+ %cmp1.i.i.i = fcmp ogt <2 x float> zeroinitializer, zeroinitializer
+ %splat.splat3.i.i.i = shufflevector <2 x i32> zeroinitializer, <2 x i32>
zeroinitializer, <2 x i32> zeroinitializer
+ %xor3.i.i.i.i.i = select <2 x i1> zeroinitializer, <2 x i32>
zeroinitializer, <2 x i32> zeroinitializer
+ %1 = load float, ptr null, align 4
+ %splat.splat8.i.i.i = shufflevector <2 x float> zeroinitializer, <2 x float>
zeroinitializer, <2 x i32> z
[llvm-branch-commits] [llvm] release/18.x: [RISCV] Fix crash when unrolling loop containing vector instructions (#83384) (PR #83744)
llvmbot wrote:
@llvm/pr-subscribers-backend-risc-v
Author: None (llvmbot)
Changes
Backport fb67dce1cb87e279593c27bd4122fe63bad75f04
Requested by: @frasercrmck
---
Full diff: https://github.com/llvm/llvm-project/pull/83744.diff
2 Files Affected:
- (modified) llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp (+3)
- (added) llvm/test/Analysis/CostModel/RISCV/vector-cost-without-v.ll (+53)
``diff
diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
index 866d5cf340e68b..66dab70d455ff4 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
@@ -37,6 +37,9 @@ static cl::opt SLPMaxVF(
InstructionCost
RISCVTTIImpl::getRISCVInstructionCost(ArrayRef OpCodes, MVT VT,
TTI::TargetCostKind CostKind) {
+ // Check if the type is valid for all CostKind
+ if (!VT.isVector())
+return InstructionCost::getInvalid();
size_t NumInstr = OpCodes.size();
if (CostKind == TTI::TCK_CodeSize)
return NumInstr;
diff --git a/llvm/test/Analysis/CostModel/RISCV/vector-cost-without-v.ll
b/llvm/test/Analysis/CostModel/RISCV/vector-cost-without-v.ll
new file mode 100644
index 00..cd99065f0285cd
--- /dev/null
+++ b/llvm/test/Analysis/CostModel/RISCV/vector-cost-without-v.ll
@@ -0,0 +1,53 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
UTC_ARGS: --version 4
+; RUN: opt < %s -mtriple=riscv64 -mattr=+f,+d --passes=loop-unroll-full -S |
FileCheck %s
+
+; Check it doesn't crash when the vector extension is not enabled.
+define void @foo() {
+; CHECK-LABEL: define void @foo(
+; CHECK-SAME: ) #[[ATTR0:[0-9]+]] {
+; CHECK-NEXT: entry:
+; CHECK-NEXT:br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT:[[INDVARS_IV1:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]],
[[FOR_BODY]] ], [ 0, [[ENTRY:%.*]] ]
+; CHECK-NEXT:[[TMP0:%.*]] = load float, ptr null, align 4
+; CHECK-NEXT:[[SPLAT_SPLAT_I_I_I:%.*]] = shufflevector <2 x float>
zeroinitializer, <2 x float> zeroinitializer, <2 x i32> zeroinitializer
+; CHECK-NEXT:[[CMP1_I_I_I:%.*]] = fcmp ogt <2 x float> zeroinitializer,
zeroinitializer
+; CHECK-NEXT:[[SPLAT_SPLAT3_I_I_I:%.*]] = shufflevector <2 x i32>
zeroinitializer, <2 x i32> zeroinitializer, <2 x i32> zeroinitializer
+; CHECK-NEXT:[[XOR3_I_I_I_I_I:%.*]] = select <2 x i1> zeroinitializer, <2
x i32> zeroinitializer, <2 x i32> zeroinitializer
+; CHECK-NEXT:[[TMP1:%.*]] = load float, ptr null, align 4
+; CHECK-NEXT:[[SPLAT_SPLAT8_I_I_I:%.*]] = shufflevector <2 x float>
zeroinitializer, <2 x float> zeroinitializer, <2 x i32> zeroinitializer
+; CHECK-NEXT:[[SUB_I_I_I:%.*]] = fsub <2 x float> zeroinitializer,
zeroinitializer
+; CHECK-NEXT:[[MUL_I_I_I:%.*]] = shl i64 0, 0
+; CHECK-NEXT:[[TMP2:%.*]] = load float, ptr null, align 4
+; CHECK-NEXT:[[SPLAT_SPLAT_I_I_I_I:%.*]] = shufflevector <2 x float>
zeroinitializer, <2 x float> zeroinitializer, <2 x i32> zeroinitializer
+; CHECK-NEXT:[[XOR3_I_I_I_V_I_I:%.*]] = select <2 x i1> zeroinitializer,
<2 x float> zeroinitializer, <2 x float> zeroinitializer
+; CHECK-NEXT:[[INDVARS_IV_NEXT]] = add i64 [[INDVARS_IV1]], 1
+; CHECK-NEXT:[[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV1]], 8
+; CHECK-NEXT:br i1 [[EXITCOND]], label [[FOR_BODY]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT:ret void
+;
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %indvars.iv1 = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
+ %0 = load float, ptr null, align 4
+ %splat.splat.i.i.i = shufflevector <2 x float> zeroinitializer, <2 x float>
zeroinitializer, <2 x i32> zeroinitializer
+ %cmp1.i.i.i = fcmp ogt <2 x float> zeroinitializer, zeroinitializer
+ %splat.splat3.i.i.i = shufflevector <2 x i32> zeroinitializer, <2 x i32>
zeroinitializer, <2 x i32> zeroinitializer
+ %xor3.i.i.i.i.i = select <2 x i1> zeroinitializer, <2 x i32>
zeroinitializer, <2 x i32> zeroinitializer
+ %1 = load float, ptr null, align 4
+ %splat.splat8.i.i.i = shufflevector <2 x float> zeroinitializer, <2 x float>
zeroinitializer, <2 x i32> zeroinitializer
+ %sub.i.i.i = fsub <2 x float> zeroinitializer, zeroinitializer
+ %mul.i.i.i = shl i64 0, 0
+ %2 = load float, ptr null, align 4
+ %splat.splat.i.i.i.i = shufflevector <2 x float> zeroinitializer, <2 x
float> zeroinitializer, <2 x i32> zeroinitializer
+ %xor3.i.i.i.v.i.i = select <2 x i1> zeroinitializer, <2 x float>
zeroinitializer, <2 x float> zeroinitializer
+ %indvars.iv.next = add i64 %indvars.iv1, 1
+ %exitcond = icmp ne i64 %indvars.iv1, 8
+ br i1 %exitcond, label %for.body, label %exit
+
+exit: ; preds = %for.body
+ ret void
+}
``
https://github.com/llvm/llvm-project/pull/83744
[llvm-branch-commits] [compiler-rt] [compiler-rt] Allow running tests without installing first (PR #83088)
https://github.com/arichardson updated
https://github.com/llvm/llvm-project/pull/83088
>From 3c41df9f8fd00d86fe500d9b67e51d15a690209b Mon Sep 17 00:00:00 2001
From: Alex Richardson
Date: Mon, 26 Feb 2024 16:59:08 -0800
Subject: [PATCH 1/2] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20ch?=
=?UTF-8?q?anges=20to=20main=20this=20commit=20is=20based=20on?=
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Created using spr 1.3.4
[skip ci]
---
compiler-rt/cmake/Modules/CompilerRTCompile.cmake | 7 ++-
compiler-rt/test/dfsan/reaches_function.c | 4 ++--
2 files changed, 8 insertions(+), 3 deletions(-)
diff --git a/compiler-rt/cmake/Modules/CompilerRTCompile.cmake
b/compiler-rt/cmake/Modules/CompilerRTCompile.cmake
index 64e7acb9afd833..8c804acb44ae4d 100644
--- a/compiler-rt/cmake/Modules/CompilerRTCompile.cmake
+++ b/compiler-rt/cmake/Modules/CompilerRTCompile.cmake
@@ -70,9 +70,14 @@ function(clang_compile object_file source)
if (TARGET CompilerRTUnitTestCheckCxx)
list(APPEND SOURCE_DEPS CompilerRTUnitTestCheckCxx)
endif()
+ string(REGEX MATCH "[.](cc|cpp)$" is_cxx ${source_rpath})
+ if (is_cxx)
+set(compiler ${COMPILER_RT_TEST_COMPILER})
+ else()
+set(compiler ${COMPILER_RT_TEST_CXX_COMPILER})
+ endif()
if(COMPILER_RT_STANDALONE_BUILD)
# Only add global flags in standalone build.
-string(REGEX MATCH "[.](cc|cpp)$" is_cxx ${source_rpath})
if(is_cxx)
string(REPLACE " " ";" global_flags "${CMAKE_CXX_FLAGS}")
else()
diff --git a/compiler-rt/test/dfsan/reaches_function.c
b/compiler-rt/test/dfsan/reaches_function.c
index 9e2bcee935b2ac..afcd08cee76a0e 100644
--- a/compiler-rt/test/dfsan/reaches_function.c
+++ b/compiler-rt/test/dfsan/reaches_function.c
@@ -32,7 +32,7 @@ void my_dfsan_reaches_function_callback(dfsan_label label,
dfsan_origin origin,
__attribute__((noinline)) uint64_t add(uint64_t *a, uint64_t *b) {
return *a + *b;
- // CHECK: {{.*}}compiler-rt/test/dfsan/reaches_function.c:[[# @LINE - 1]]
add.dfsan
+ // CHECK: test/dfsan/reaches_function.c:[[# @LINE - 1]] add.dfsan
// CHECK-ORIGIN-TRACKING: Origin value: 0x1002, Taint value was stored
to memory at
// CHECK-ORIGIN-TRACKING: #0 {{.*}} in add.dfsan
{{.*}}compiler-rt/test/dfsan/reaches_function.c:[[# @LINE - 3]]:{{.*}}
// CHECK-ORIGIN-TRACKING: Origin value: 0x1, Taint value was created at
@@ -54,7 +54,7 @@ int main(int argc, char *argv[]) {
dfsan_set_label(8, &a, sizeof(a));
uint64_t c = add(&a, &b);
- // CHECK: {{.*}}compiler-rt/test/dfsan/reaches_function.c:[[# @LINE - 1]]
main
+ // CHECK: test/dfsan/reaches_function.c:[[# @LINE - 1]] main
// CHECK-ORIGIN-TRACKING: Origin value: 0x1002, Taint value was stored
to memory at
// CHECK-ORIGIN-TRACKING: #0 {{.*}} in add.dfsan
{{.*}}compiler-rt/test/dfsan/reaches_function.c:{{.*}}
// CHECK-ORIGIN-TRACKING: Origin value: 0x1, Taint value was created at
>From c4cb96509ce30182f4fecdd21bf36f6dd94e8d68 Mon Sep 17 00:00:00 2001
From: Alex Richardson
Date: Sun, 3 Mar 2024 14:09:59 -0800
Subject: [PATCH 2/2] fix python formatting
Created using spr 1.3.6-beta.1
---
compiler-rt/test/lit.common.cfg.py| 7 +--
compiler-rt/test/safestack/lit.cfg.py | 10 --
2 files changed, 13 insertions(+), 4 deletions(-)
diff --git a/compiler-rt/test/lit.common.cfg.py
b/compiler-rt/test/lit.common.cfg.py
index 5d96bf7e1a58a7..aef07427acf2e4 100644
--- a/compiler-rt/test/lit.common.cfg.py
+++ b/compiler-rt/test/lit.common.cfg.py
@@ -34,6 +34,7 @@ def get_path_from_clang(args, allow_failure):
lit_config.fatal(msg)
return path, clang_cmd
+
def find_compiler_libdir():
"""
Returns the path to library resource directory used
@@ -186,8 +187,10 @@ def push_dynamic_library_lookup_path(config, new_path):
if test_cc_resource_dir != local_build_resource_dir:
if config.test_standalone_build_libs and config.compiler_id == "Clang":
if lit_config.debug:
-lit_config.note(f'Overriding test compiler resource dir to use '
-f'libraries in "{config.compiler_rt_libdir}"')
+lit_config.note(
+f"Overriding test compiler resource dir to use "
+f'libraries in "{config.compiler_rt_libdir}"'
+)
# Ensure that we use the just-built static libraries when linking by
# overriding the Clang resource directory. Additionally, we want to use
# the builtin headers shipped with clang (e.g. stdint.h), so we
diff --git a/compiler-rt/test/safestack/lit.cfg.py
b/compiler-rt/test/safestack/lit.cfg.py
index bdc316e2f6bc74..aadb8bf0d5c77b 100644
--- a/compiler-rt/test/safestack/lit.cfg.py
+++ b/compiler-rt/test/safestack/lit.cfg.py
@@ -13,10 +13,16 @@
# Add clang substitutions.
config.substitutions.append(
-("%clang_nosafestack ", config.clang + config.target_cflags + " -O0
-fno-sanitize=safe-stack ")
+(
+
[llvm-branch-commits] [llvm] release/18.x: [LoongArch] Override LoongArchTargetLowering::getExtendForAtomicCmpSwapArg (#83656) (PR #83750)
https://github.com/llvmbot created
https://github.com/llvm/llvm-project/pull/83750
Backport 5f058aa21199
Requested by: @SixWeining
>From be4e20b8386df794e9082f81f0e74cf53e66ee1c Mon Sep 17 00:00:00 2001
From: Lu Weining
Date: Mon, 4 Mar 2024 08:38:52 +0800
Subject: [PATCH] [LoongArch] Override
LoongArchTargetLowering::getExtendForAtomicCmpSwapArg (#83656)
This patch aims to solve Firefox issue:
https://bugzilla.mozilla.org/show_bug.cgi?id=1882301
Similar to 616289ed2922. Currently LoongArch uses an ll.[wd]/sc.[wd]
loop for ATOMIC_CMP_XCHG. Because the comparison in the loop is
full-width (i.e. the `bne` instruction), we must sign extend the input
comparsion argument.
Note that LoongArch ISA manual V1.1 has introduced compare-and-swap
instructions. We would change the implementation (return `ANY_EXTEND`)
when we support them.
(cherry picked from commit 5f058aa211995d2f0df2a0e063532832569cb7a8)
---
.../LoongArch/LoongArchISelLowering.cpp | 5 +
.../Target/LoongArch/LoongArchISelLowering.h | 2 +
.../LoongArch/atomicrmw-uinc-udec-wrap.ll | 120 +++--
.../ir-instruction/atomic-cmpxchg.ll | 25 +--
.../LoongArch/ir-instruction/atomicrmw-fp.ll | 160 +-
5 files changed, 159 insertions(+), 153 deletions(-)
diff --git a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
index 76c1a14fe0156c..b161c5434ca13e 100644
--- a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+++ b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
@@ -4940,3 +4940,8 @@ bool LoongArchTargetLowering::hasAndNotCompare(SDValue Y)
const {
return !isa(Y);
}
+
+ISD::NodeType LoongArchTargetLowering::getExtendForAtomicCmpSwapArg() const {
+ // TODO: LAMCAS will use amcas{_DB,}.[bhwd] which does not require extension.
+ return ISD::SIGN_EXTEND;
+}
diff --git a/llvm/lib/Target/LoongArch/LoongArchISelLowering.h
b/llvm/lib/Target/LoongArch/LoongArchISelLowering.h
index 72182623b2c3dd..9e9ac0b8269291 100644
--- a/llvm/lib/Target/LoongArch/LoongArchISelLowering.h
+++ b/llvm/lib/Target/LoongArch/LoongArchISelLowering.h
@@ -206,6 +206,8 @@ class LoongArchTargetLowering : public TargetLowering {
return ISD::SIGN_EXTEND;
}
+ ISD::NodeType getExtendForAtomicCmpSwapArg() const override;
+
Register getRegisterByName(const char *RegName, LLT VT,
const MachineFunction &MF) const override;
bool mayBeEmittedAsTailCall(const CallInst *CI) const override;
diff --git a/llvm/test/CodeGen/LoongArch/atomicrmw-uinc-udec-wrap.ll
b/llvm/test/CodeGen/LoongArch/atomicrmw-uinc-udec-wrap.ll
index b0f29ee790885d..b84c1093eb75f2 100644
--- a/llvm/test/CodeGen/LoongArch/atomicrmw-uinc-udec-wrap.ll
+++ b/llvm/test/CodeGen/LoongArch/atomicrmw-uinc-udec-wrap.ll
@@ -25,15 +25,16 @@ define i8 @atomicrmw_uinc_wrap_i8(ptr %ptr, i8 %val) {
; LA64-NEXT:andi $a5, $a5, 255
; LA64-NEXT:sll.w $a5, $a5, $a3
; LA64-NEXT:and $a6, $a2, $a4
-; LA64-NEXT:or $a6, $a6, $a5
+; LA64-NEXT:or $a5, $a6, $a5
+; LA64-NEXT:addi.w $a6, $a2, 0
; LA64-NEXT: .LBB0_3: # %atomicrmw.start
; LA64-NEXT:# Parent Loop BB0_1 Depth=1
; LA64-NEXT:# => This Inner Loop Header: Depth=2
-; LA64-NEXT:ll.w $a5, $a0, 0
-; LA64-NEXT:bne $a5, $a2, .LBB0_5
+; LA64-NEXT:ll.w $a2, $a0, 0
+; LA64-NEXT:bne $a2, $a6, .LBB0_5
; LA64-NEXT: # %bb.4: # %atomicrmw.start
; LA64-NEXT:# in Loop: Header=BB0_3 Depth=2
-; LA64-NEXT:move $a7, $a6
+; LA64-NEXT:move $a7, $a5
; LA64-NEXT:sc.w $a7, $a0, 0
; LA64-NEXT:beqz $a7, .LBB0_3
; LA64-NEXT:b .LBB0_6
@@ -42,11 +43,9 @@ define i8 @atomicrmw_uinc_wrap_i8(ptr %ptr, i8 %val) {
; LA64-NEXT:dbar 20
; LA64-NEXT: .LBB0_6: # %atomicrmw.start
; LA64-NEXT:# in Loop: Header=BB0_1 Depth=1
-; LA64-NEXT:addi.w $a6, $a2, 0
-; LA64-NEXT:move $a2, $a5
-; LA64-NEXT:bne $a5, $a6, .LBB0_1
+; LA64-NEXT:bne $a2, $a6, .LBB0_1
; LA64-NEXT: # %bb.2: # %atomicrmw.end
-; LA64-NEXT:srl.w $a0, $a5, $a3
+; LA64-NEXT:srl.w $a0, $a2, $a3
; LA64-NEXT:ret
%result = atomicrmw uinc_wrap ptr %ptr, i8 %val seq_cst
ret i8 %result
@@ -77,15 +76,16 @@ define i16 @atomicrmw_uinc_wrap_i16(ptr %ptr, i16 %val) {
; LA64-NEXT:bstrpick.d $a5, $a5, 15, 0
; LA64-NEXT:sll.w $a5, $a5, $a3
; LA64-NEXT:and $a6, $a2, $a4
-; LA64-NEXT:or $a6, $a6, $a5
+; LA64-NEXT:or $a5, $a6, $a5
+; LA64-NEXT:addi.w $a6, $a2, 0
; LA64-NEXT: .LBB1_3: # %atomicrmw.start
; LA64-NEXT:# Parent Loop BB1_1 Depth=1
; LA64-NEXT:# => This Inner Loop Header: Depth=2
-; LA64-NEXT:ll.w $a5, $a0, 0
-; LA64-NEXT:bne $a5, $a2, .LBB1_5
+; LA64-NEXT:ll.w $a2, $a0, 0
+; LA64-NEXT:bne $a2, $a6, .LBB1_5
; LA64-NEXT: # %bb.4: # %atomicrmw.start
; LA64-NEXT:# in Loop: Header=BB1_3 Depth=2
-; LA64-NEXT:move $a7, $a6
+; LA64-NEXT:move $a7, $a5
; LA64-NEXT:sc.w $a7, $a0, 0
; LA64-NEXT:beqz $a7, .LBB1_3
;
[llvm-branch-commits] [llvm] release/18.x: [LoongArch] Override LoongArchTargetLowering::getExtendForAtomicCmpSwapArg (#83656) (PR #83750)
llvmbot wrote: @xen0n What do you think about merging this PR to the release branch? https://github.com/llvm/llvm-project/pull/83750 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/18.x: [LoongArch] Override LoongArchTargetLowering::getExtendForAtomicCmpSwapArg (#83656) (PR #83750)
https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/83750 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/18.x: [LoongArch] Override LoongArchTargetLowering::getExtendForAtomicCmpSwapArg (#83656) (PR #83750)
llvmbot wrote:
@llvm/pr-subscribers-backend-loongarch
Author: None (llvmbot)
Changes
Backport 5f058aa21199
Requested by: @SixWeining
---
Patch is 47.64 KiB, truncated to 20.00 KiB below, full version:
https://github.com/llvm/llvm-project/pull/83750.diff
5 Files Affected:
- (modified) llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp (+5)
- (modified) llvm/lib/Target/LoongArch/LoongArchISelLowering.h (+2)
- (modified) llvm/test/CodeGen/LoongArch/atomicrmw-uinc-udec-wrap.ll (+57-63)
- (modified) llvm/test/CodeGen/LoongArch/ir-instruction/atomic-cmpxchg.ll
(+15-10)
- (modified) llvm/test/CodeGen/LoongArch/ir-instruction/atomicrmw-fp.ll
(+80-80)
``diff
diff --git a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
index 76c1a14fe0156c..b161c5434ca13e 100644
--- a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+++ b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
@@ -4940,3 +4940,8 @@ bool LoongArchTargetLowering::hasAndNotCompare(SDValue Y)
const {
return !isa(Y);
}
+
+ISD::NodeType LoongArchTargetLowering::getExtendForAtomicCmpSwapArg() const {
+ // TODO: LAMCAS will use amcas{_DB,}.[bhwd] which does not require extension.
+ return ISD::SIGN_EXTEND;
+}
diff --git a/llvm/lib/Target/LoongArch/LoongArchISelLowering.h
b/llvm/lib/Target/LoongArch/LoongArchISelLowering.h
index 72182623b2c3dd..9e9ac0b8269291 100644
--- a/llvm/lib/Target/LoongArch/LoongArchISelLowering.h
+++ b/llvm/lib/Target/LoongArch/LoongArchISelLowering.h
@@ -206,6 +206,8 @@ class LoongArchTargetLowering : public TargetLowering {
return ISD::SIGN_EXTEND;
}
+ ISD::NodeType getExtendForAtomicCmpSwapArg() const override;
+
Register getRegisterByName(const char *RegName, LLT VT,
const MachineFunction &MF) const override;
bool mayBeEmittedAsTailCall(const CallInst *CI) const override;
diff --git a/llvm/test/CodeGen/LoongArch/atomicrmw-uinc-udec-wrap.ll
b/llvm/test/CodeGen/LoongArch/atomicrmw-uinc-udec-wrap.ll
index b0f29ee790885d..b84c1093eb75f2 100644
--- a/llvm/test/CodeGen/LoongArch/atomicrmw-uinc-udec-wrap.ll
+++ b/llvm/test/CodeGen/LoongArch/atomicrmw-uinc-udec-wrap.ll
@@ -25,15 +25,16 @@ define i8 @atomicrmw_uinc_wrap_i8(ptr %ptr, i8 %val) {
; LA64-NEXT:andi $a5, $a5, 255
; LA64-NEXT:sll.w $a5, $a5, $a3
; LA64-NEXT:and $a6, $a2, $a4
-; LA64-NEXT:or $a6, $a6, $a5
+; LA64-NEXT:or $a5, $a6, $a5
+; LA64-NEXT:addi.w $a6, $a2, 0
; LA64-NEXT: .LBB0_3: # %atomicrmw.start
; LA64-NEXT:# Parent Loop BB0_1 Depth=1
; LA64-NEXT:# => This Inner Loop Header: Depth=2
-; LA64-NEXT:ll.w $a5, $a0, 0
-; LA64-NEXT:bne $a5, $a2, .LBB0_5
+; LA64-NEXT:ll.w $a2, $a0, 0
+; LA64-NEXT:bne $a2, $a6, .LBB0_5
; LA64-NEXT: # %bb.4: # %atomicrmw.start
; LA64-NEXT:# in Loop: Header=BB0_3 Depth=2
-; LA64-NEXT:move $a7, $a6
+; LA64-NEXT:move $a7, $a5
; LA64-NEXT:sc.w $a7, $a0, 0
; LA64-NEXT:beqz $a7, .LBB0_3
; LA64-NEXT:b .LBB0_6
@@ -42,11 +43,9 @@ define i8 @atomicrmw_uinc_wrap_i8(ptr %ptr, i8 %val) {
; LA64-NEXT:dbar 20
; LA64-NEXT: .LBB0_6: # %atomicrmw.start
; LA64-NEXT:# in Loop: Header=BB0_1 Depth=1
-; LA64-NEXT:addi.w $a6, $a2, 0
-; LA64-NEXT:move $a2, $a5
-; LA64-NEXT:bne $a5, $a6, .LBB0_1
+; LA64-NEXT:bne $a2, $a6, .LBB0_1
; LA64-NEXT: # %bb.2: # %atomicrmw.end
-; LA64-NEXT:srl.w $a0, $a5, $a3
+; LA64-NEXT:srl.w $a0, $a2, $a3
; LA64-NEXT:ret
%result = atomicrmw uinc_wrap ptr %ptr, i8 %val seq_cst
ret i8 %result
@@ -77,15 +76,16 @@ define i16 @atomicrmw_uinc_wrap_i16(ptr %ptr, i16 %val) {
; LA64-NEXT:bstrpick.d $a5, $a5, 15, 0
; LA64-NEXT:sll.w $a5, $a5, $a3
; LA64-NEXT:and $a6, $a2, $a4
-; LA64-NEXT:or $a6, $a6, $a5
+; LA64-NEXT:or $a5, $a6, $a5
+; LA64-NEXT:addi.w $a6, $a2, 0
; LA64-NEXT: .LBB1_3: # %atomicrmw.start
; LA64-NEXT:# Parent Loop BB1_1 Depth=1
; LA64-NEXT:# => This Inner Loop Header: Depth=2
-; LA64-NEXT:ll.w $a5, $a0, 0
-; LA64-NEXT:bne $a5, $a2, .LBB1_5
+; LA64-NEXT:ll.w $a2, $a0, 0
+; LA64-NEXT:bne $a2, $a6, .LBB1_5
; LA64-NEXT: # %bb.4: # %atomicrmw.start
; LA64-NEXT:# in Loop: Header=BB1_3 Depth=2
-; LA64-NEXT:move $a7, $a6
+; LA64-NEXT:move $a7, $a5
; LA64-NEXT:sc.w $a7, $a0, 0
; LA64-NEXT:beqz $a7, .LBB1_3
; LA64-NEXT:b .LBB1_6
@@ -94,11 +94,9 @@ define i16 @atomicrmw_uinc_wrap_i16(ptr %ptr, i16 %val) {
; LA64-NEXT:dbar 20
; LA64-NEXT: .LBB1_6: # %atomicrmw.start
; LA64-NEXT:# in Loop: Header=BB1_1 Depth=1
-; LA64-NEXT:addi.w $a6, $a2, 0
-; LA64-NEXT:move $a2, $a5
-; LA64-NEXT:bne $a5, $a6, .LBB1_1
+; LA64-NEXT:bne $a2, $a6, .LBB1_1
; LA64-NEXT: # %bb.2: # %atomicrmw.end
-; LA64-NEXT:srl.w $a0, $a5, $a3
+; LA64-NEXT:srl.w $a0, $a2, $a3
; LA64-NEXT:ret
%result = atomicrmw uinc_wrap ptr %ptr, i16 %val seq_cst
ret i16 %result
@@ -107,37
[llvm-branch-commits] [llvm] ReleaseNotes for LLVM binary utilities (PR #83751)
https://github.com/MaskRay milestoned https://github.com/llvm/llvm-project/pull/83751 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] ReleaseNotes for LLVM binary utilities (PR #83751)
https://github.com/MaskRay created https://github.com/llvm/llvm-project/pull/83751 None >From 5a9f6cf96b1fb4c9f16f59e6c4847b61da46c6b7 Mon Sep 17 00:00:00 2001 From: Fangrui Song Date: Sun, 3 Mar 2024 17:03:04 -0800 Subject: [PATCH] ReleaseNotes for LLVM binary utilities --- llvm/docs/ReleaseNotes.rst | 11 --- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/llvm/docs/ReleaseNotes.rst b/llvm/docs/ReleaseNotes.rst index 5b3210138f2f89..b845b57b4e4af6 100644 --- a/llvm/docs/ReleaseNotes.rst +++ b/llvm/docs/ReleaseNotes.rst @@ -344,21 +344,26 @@ Changes to the LLVM tools * Fixed big-endian support in llvm-symbolizer's DWARF location parser. * llvm-readelf now supports ``--extra-sym-info`` (``-X``) to display extra information (section name) when showing symbols. - -* ``llvm-nm`` now supports the ``--line-numbers`` (``-l``) option to use - debugging information to print symbols' filenames and line numbers. +* ``llvm-readobj``/``llvm-readelf`` now supports ``--decompress``/``-z`` with + string and hex dump for ELF object files. * llvm-symbolizer and llvm-addr2line now support addresses specified as symbol names. * llvm-objcopy now supports ``--gap-fill`` and ``--pad-to`` options, for ELF input and binary output files only. +* ``llvm-objcopy`` now supports ``-O elf64-s390`` for SystemZ. * Supported parsing XCOFF auxiliary symbols in obj2yaml. * ``llvm-ranlib`` now supports ``-X`` on AIX to specify the type of object file ranlib should examine. +* ``llvm-cxxfilt`` now supports ``--no-params``/``-p`` to skip function + parameters. + * ``llvm-nm`` now supports ``--export-symbol`` to ignore the import symbol file. +* ``llvm-nm`` now supports the ``--line-numbers`` (``-l``) option to use + debugging information to print symbols' filenames and line numbers. * llvm-rc and llvm-windres now accept file path references in ``.rc`` files concatenated from multiple string literals. ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/18.x: [LoongArch] Override LoongArchTargetLowering::getExtendForAtomicCmpSwapArg (#83656) (PR #83750)
xen0n wrote: I agree with backporting the change, as the actual code change is trivial and fixes a bug regarding atomic ops, which is known to be a subtle area important to overall system stability. Without the backport distro maintainers would still have to cherry-pick it themselves, duplicating efforts. https://github.com/llvm/llvm-project/pull/83750 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [nfc][InstrProfiling]For comdat setting helper function, move comment closer to the code (PR #83757)
https://github.com/minglotus-6 created
https://github.com/llvm/llvm-project/pull/83757
None
>From 13099c90449036731b834e27aa8fb1c238ab8669 Mon Sep 17 00:00:00 2001
From: mingmingl
Date: Sun, 3 Mar 2024 19:02:09 -0800
Subject: [PATCH] [nfc][InstrProfiling]For comdat setting helper function, move
comment closer to the code
---
.../Instrumentation/InstrProfiling.cpp| 53 +++
1 file changed, 31 insertions(+), 22 deletions(-)
diff --git a/llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
b/llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
index d5d55dec6382fb..84c6aef4c998a7 100644
--- a/llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
+++ b/llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
@@ -206,8 +206,8 @@ class InstrLowerer final {
const bool IsCS;
std::function GetTLI;
-
const bool DataReferencedByCode;
+
struct PerFunctionProfileData {
uint32_t NumValueSites[IPVK_Last + 1] = {};
GlobalVariable *RegionCounters = nullptr;
@@ -1193,18 +1193,42 @@ static bool
needsRuntimeRegistrationOfSectionRange(const Triple &TT) {
}
void InstrLowerer::maybeSetComdat(GlobalVariable *GV, Function *Fn,
- StringRef VarName) {
+ StringRef CounterGroupName) {
+ // Place lowered global variables in a comdat group if the associated
function
+ // is a COMDAT. This will make sure that only one copy of global variable
+ // (e.g. function counters) of the COMDAT function will be emitted after
+ // linking.
bool NeedComdat = needsComdatForCounter(*Fn, M);
+
bool UseComdat = (NeedComdat || TT.isOSBinFormatELF());
if (!UseComdat)
return;
- StringRef GroupName =
- TT.isOSBinFormatCOFF() && DataReferencedByCode ? GV->getName() : VarName;
+ // Keep in mind that this pass may run before the inliner, so we need to
+ // create a new comdat group (for counters, profiling data, etc). If we use
+ // the comdat of the parent function, that will result in relocations against
+ // discarded sections.
+ //
+ // If the data variable is referenced by code, non-counter variables (notably
+ // profiling data) and counters have to be in different comdats for COFF
+ // because the Visual C++ linker will report duplicate symbol errors if there
+ // are multiple external symbols with the same name marked
+ // IMAGE_COMDAT_SELECT_ASSOCIATIVE.
+ StringRef GroupName = TT.isOSBinFormatCOFF() && DataReferencedByCode
+? GV->getName()
+: CounterGroupName;
Comdat *C = M.getOrInsertComdat(GroupName);
- if (!NeedComdat)
+
+ if (!NeedComdat) {
+// Object file format must be ELF since `UseComdat && !NeedComdat` is true.
+//
+// For ELF, when not using COMDAT, put counters, data and values into a
+// nodeduplicate COMDAT which is lowered to a zero-flag section group. This
+// allows -z start-stop-gc to discard the entire group when the function is
+// discarded.
C->setSelectionKind(Comdat::NoDeduplicate);
+ }
GV->setComdat(C);
// COFF doesn't allow the comdat group leader to have private linkage, so
// upgrade private linkage to internal linkage to produce a symbol table
@@ -1238,23 +1262,7 @@ GlobalVariable
*InstrLowerer::setupProfileSection(InstrProfInstBase *Inc,
Linkage = GlobalValue::PrivateLinkage;
Visibility = GlobalValue::DefaultVisibility;
}
- // Move the name variable to the right section. Place them in a COMDAT group
- // if the associated function is a COMDAT. This will make sure that only one
- // copy of counters of the COMDAT function will be emitted after linking.
Keep
- // in mind that this pass may run before the inliner, so we need to create a
- // new comdat group for the counters and profiling data. If we use the comdat
- // of the parent function, that will result in relocations against discarded
- // sections.
- //
- // If the data variable is referenced by code, counters and data have to be
- // in different comdats for COFF because the Visual C++ linker will report
- // duplicate symbol errors if there are multiple external symbols with the
- // same name marked IMAGE_COMDAT_SELECT_ASSOCIATIVE.
- //
- // For ELF, when not using COMDAT, put counters, data and values into a
- // nodeduplicate COMDAT which is lowered to a zero-flag section group. This
- // allows -z start-stop-gc to discard the entire group when the function is
- // discarded.
+ // Move the name variable to the right section.
bool Renamed;
GlobalVariable *Ptr;
StringRef VarPrefix;
@@ -1524,6 +1532,7 @@ void
InstrLowerer::createDataVariable(InstrProfCntrInstBase *Inc) {
Data->setSection(
getInstrProfSectionName(DataSectionKind, TT.getObjectFormat()));
Data->setAlignment(Align(INSTR_PROF_DATA_ALIGNMENT));
+
maybeSetComdat(Data, Fn, CntsVarName);
PD.DataVar = Data;
___
llvm-branch-commits mai
[llvm-branch-commits] [llvm] [nfc][InstrProfiling]For comdat setting helper function, move comment closer to the code (PR #83757)
llvmbot wrote:
@llvm/pr-subscribers-llvm-transforms
Author: Mingming Liu (minglotus-6)
Changes
---
Full diff: https://github.com/llvm/llvm-project/pull/83757.diff
1 Files Affected:
- (modified) llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp (+31-22)
``diff
diff --git a/llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
b/llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
index d5d55dec6382fb..84c6aef4c998a7 100644
--- a/llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
+++ b/llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
@@ -206,8 +206,8 @@ class InstrLowerer final {
const bool IsCS;
std::function GetTLI;
-
const bool DataReferencedByCode;
+
struct PerFunctionProfileData {
uint32_t NumValueSites[IPVK_Last + 1] = {};
GlobalVariable *RegionCounters = nullptr;
@@ -1193,18 +1193,42 @@ static bool
needsRuntimeRegistrationOfSectionRange(const Triple &TT) {
}
void InstrLowerer::maybeSetComdat(GlobalVariable *GV, Function *Fn,
- StringRef VarName) {
+ StringRef CounterGroupName) {
+ // Place lowered global variables in a comdat group if the associated
function
+ // is a COMDAT. This will make sure that only one copy of global variable
+ // (e.g. function counters) of the COMDAT function will be emitted after
+ // linking.
bool NeedComdat = needsComdatForCounter(*Fn, M);
+
bool UseComdat = (NeedComdat || TT.isOSBinFormatELF());
if (!UseComdat)
return;
- StringRef GroupName =
- TT.isOSBinFormatCOFF() && DataReferencedByCode ? GV->getName() : VarName;
+ // Keep in mind that this pass may run before the inliner, so we need to
+ // create a new comdat group (for counters, profiling data, etc). If we use
+ // the comdat of the parent function, that will result in relocations against
+ // discarded sections.
+ //
+ // If the data variable is referenced by code, non-counter variables (notably
+ // profiling data) and counters have to be in different comdats for COFF
+ // because the Visual C++ linker will report duplicate symbol errors if there
+ // are multiple external symbols with the same name marked
+ // IMAGE_COMDAT_SELECT_ASSOCIATIVE.
+ StringRef GroupName = TT.isOSBinFormatCOFF() && DataReferencedByCode
+? GV->getName()
+: CounterGroupName;
Comdat *C = M.getOrInsertComdat(GroupName);
- if (!NeedComdat)
+
+ if (!NeedComdat) {
+// Object file format must be ELF since `UseComdat && !NeedComdat` is true.
+//
+// For ELF, when not using COMDAT, put counters, data and values into a
+// nodeduplicate COMDAT which is lowered to a zero-flag section group. This
+// allows -z start-stop-gc to discard the entire group when the function is
+// discarded.
C->setSelectionKind(Comdat::NoDeduplicate);
+ }
GV->setComdat(C);
// COFF doesn't allow the comdat group leader to have private linkage, so
// upgrade private linkage to internal linkage to produce a symbol table
@@ -1238,23 +1262,7 @@ GlobalVariable
*InstrLowerer::setupProfileSection(InstrProfInstBase *Inc,
Linkage = GlobalValue::PrivateLinkage;
Visibility = GlobalValue::DefaultVisibility;
}
- // Move the name variable to the right section. Place them in a COMDAT group
- // if the associated function is a COMDAT. This will make sure that only one
- // copy of counters of the COMDAT function will be emitted after linking.
Keep
- // in mind that this pass may run before the inliner, so we need to create a
- // new comdat group for the counters and profiling data. If we use the comdat
- // of the parent function, that will result in relocations against discarded
- // sections.
- //
- // If the data variable is referenced by code, counters and data have to be
- // in different comdats for COFF because the Visual C++ linker will report
- // duplicate symbol errors if there are multiple external symbols with the
- // same name marked IMAGE_COMDAT_SELECT_ASSOCIATIVE.
- //
- // For ELF, when not using COMDAT, put counters, data and values into a
- // nodeduplicate COMDAT which is lowered to a zero-flag section group. This
- // allows -z start-stop-gc to discard the entire group when the function is
- // discarded.
+ // Move the name variable to the right section.
bool Renamed;
GlobalVariable *Ptr;
StringRef VarPrefix;
@@ -1524,6 +1532,7 @@ void
InstrLowerer::createDataVariable(InstrProfCntrInstBase *Inc) {
Data->setSection(
getInstrProfSectionName(DataSectionKind, TT.getObjectFormat()));
Data->setAlignment(Align(INSTR_PROF_DATA_ALIGNMENT));
+
maybeSetComdat(Data, Fn, CntsVarName);
PD.DataVar = Data;
``
https://github.com/llvm/llvm-project/pull/83757
___
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-
[llvm-branch-commits] [llvm] [nfc][InstrProfiling]For comdat setting helper function, move comment closer to the code (PR #83757)
https://github.com/minglotus-6 updated
https://github.com/llvm/llvm-project/pull/83757
>From 13099c90449036731b834e27aa8fb1c238ab8669 Mon Sep 17 00:00:00 2001
From: mingmingl
Date: Sun, 3 Mar 2024 19:02:09 -0800
Subject: [PATCH 1/2] [nfc][InstrProfiling]For comdat setting helper function,
move comment closer to the code
---
.../Instrumentation/InstrProfiling.cpp| 53 +++
1 file changed, 31 insertions(+), 22 deletions(-)
diff --git a/llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
b/llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
index d5d55dec6382fb..84c6aef4c998a7 100644
--- a/llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
+++ b/llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
@@ -206,8 +206,8 @@ class InstrLowerer final {
const bool IsCS;
std::function GetTLI;
-
const bool DataReferencedByCode;
+
struct PerFunctionProfileData {
uint32_t NumValueSites[IPVK_Last + 1] = {};
GlobalVariable *RegionCounters = nullptr;
@@ -1193,18 +1193,42 @@ static bool
needsRuntimeRegistrationOfSectionRange(const Triple &TT) {
}
void InstrLowerer::maybeSetComdat(GlobalVariable *GV, Function *Fn,
- StringRef VarName) {
+ StringRef CounterGroupName) {
+ // Place lowered global variables in a comdat group if the associated
function
+ // is a COMDAT. This will make sure that only one copy of global variable
+ // (e.g. function counters) of the COMDAT function will be emitted after
+ // linking.
bool NeedComdat = needsComdatForCounter(*Fn, M);
+
bool UseComdat = (NeedComdat || TT.isOSBinFormatELF());
if (!UseComdat)
return;
- StringRef GroupName =
- TT.isOSBinFormatCOFF() && DataReferencedByCode ? GV->getName() : VarName;
+ // Keep in mind that this pass may run before the inliner, so we need to
+ // create a new comdat group (for counters, profiling data, etc). If we use
+ // the comdat of the parent function, that will result in relocations against
+ // discarded sections.
+ //
+ // If the data variable is referenced by code, non-counter variables (notably
+ // profiling data) and counters have to be in different comdats for COFF
+ // because the Visual C++ linker will report duplicate symbol errors if there
+ // are multiple external symbols with the same name marked
+ // IMAGE_COMDAT_SELECT_ASSOCIATIVE.
+ StringRef GroupName = TT.isOSBinFormatCOFF() && DataReferencedByCode
+? GV->getName()
+: CounterGroupName;
Comdat *C = M.getOrInsertComdat(GroupName);
- if (!NeedComdat)
+
+ if (!NeedComdat) {
+// Object file format must be ELF since `UseComdat && !NeedComdat` is true.
+//
+// For ELF, when not using COMDAT, put counters, data and values into a
+// nodeduplicate COMDAT which is lowered to a zero-flag section group. This
+// allows -z start-stop-gc to discard the entire group when the function is
+// discarded.
C->setSelectionKind(Comdat::NoDeduplicate);
+ }
GV->setComdat(C);
// COFF doesn't allow the comdat group leader to have private linkage, so
// upgrade private linkage to internal linkage to produce a symbol table
@@ -1238,23 +1262,7 @@ GlobalVariable
*InstrLowerer::setupProfileSection(InstrProfInstBase *Inc,
Linkage = GlobalValue::PrivateLinkage;
Visibility = GlobalValue::DefaultVisibility;
}
- // Move the name variable to the right section. Place them in a COMDAT group
- // if the associated function is a COMDAT. This will make sure that only one
- // copy of counters of the COMDAT function will be emitted after linking.
Keep
- // in mind that this pass may run before the inliner, so we need to create a
- // new comdat group for the counters and profiling data. If we use the comdat
- // of the parent function, that will result in relocations against discarded
- // sections.
- //
- // If the data variable is referenced by code, counters and data have to be
- // in different comdats for COFF because the Visual C++ linker will report
- // duplicate symbol errors if there are multiple external symbols with the
- // same name marked IMAGE_COMDAT_SELECT_ASSOCIATIVE.
- //
- // For ELF, when not using COMDAT, put counters, data and values into a
- // nodeduplicate COMDAT which is lowered to a zero-flag section group. This
- // allows -z start-stop-gc to discard the entire group when the function is
- // discarded.
+ // Move the name variable to the right section.
bool Renamed;
GlobalVariable *Ptr;
StringRef VarPrefix;
@@ -1524,6 +1532,7 @@ void
InstrLowerer::createDataVariable(InstrProfCntrInstBase *Inc) {
Data->setSection(
getInstrProfSectionName(DataSectionKind, TT.getObjectFormat()));
Data->setAlignment(Align(INSTR_PROF_DATA_ALIGNMENT));
+
maybeSetComdat(Data, Fn, CntsVarName);
PD.DataVar = Data;
>From 28301273f25dac0219f591dd1ee18ef587ccec24 Mon Sep 17 00:00:00 2001
F
[llvm-branch-commits] [llvm] [nfc][InstrProfiling]For comdat setting helper function, move comment closer to the code (PR #83757)
https://github.com/minglotus-6 edited https://github.com/llvm/llvm-project/pull/83757 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/18.x: [X86] Add missing subvector_subreg_lowering for BF16 (#83720) (PR #83758)
https://github.com/llvmbot milestoned https://github.com/llvm/llvm-project/pull/83758 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/18.x: [X86] Add missing subvector_subreg_lowering for BF16 (#83720) (PR #83758)
llvmbot wrote: @FreddyLeaf What do you think about merging this PR to the release branch? https://github.com/llvm/llvm-project/pull/83758 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/18.x: [X86] Add missing subvector_subreg_lowering for BF16 (#83720) (PR #83758)
https://github.com/llvmbot created
https://github.com/llvm/llvm-project/pull/83758
Backport ff72c83b017ba636be13750c7f96cd87fc22c465
Requested by: @phoebewang
>From 9a640ef3c59b3f4fa274bae5eca07bb31f44f207 Mon Sep 17 00:00:00 2001
From: Phoebe Wang
Date: Mon, 4 Mar 2024 10:15:43 +0800
Subject: [PATCH] [X86] Add missing subvector_subreg_lowering for BF16 (#83720)
Fixes: #83358
(cherry picked from commit ff72c83b017ba636be13750c7f96cd87fc22c465)
---
llvm/lib/Target/X86/X86InstrVecCompiler.td| 3 +++
.../CodeGen/X86/avx512bf16-vl-intrinsics.ll | 22 +++
llvm/test/CodeGen/X86/bfloat.ll | 7 +++---
3 files changed, 28 insertions(+), 4 deletions(-)
diff --git a/llvm/lib/Target/X86/X86InstrVecCompiler.td
b/llvm/lib/Target/X86/X86InstrVecCompiler.td
index bbd19cf8d5b25e..461b2badc13134 100644
--- a/llvm/lib/Target/X86/X86InstrVecCompiler.td
+++ b/llvm/lib/Target/X86/X86InstrVecCompiler.td
@@ -83,6 +83,7 @@ defm : subvector_subreg_lowering;
defm : subvector_subreg_lowering;
defm : subvector_subreg_lowering;
defm : subvector_subreg_lowering;
+defm : subvector_subreg_lowering;
// A 128-bit subvector extract from the first 512-bit vector position is a
// subregister copy that needs no instruction. Likewise, a 128-bit subvector
@@ -95,6 +96,7 @@ defm : subvector_subreg_lowering;
defm : subvector_subreg_lowering;
defm : subvector_subreg_lowering;
defm : subvector_subreg_lowering;
+defm : subvector_subreg_lowering;
// A 128-bit subvector extract from the first 512-bit vector position is a
// subregister copy that needs no instruction. Likewise, a 128-bit subvector
@@ -107,6 +109,7 @@ defm : subvector_subreg_lowering;
defm : subvector_subreg_lowering;
defm : subvector_subreg_lowering;
defm : subvector_subreg_lowering;
+defm : subvector_subreg_lowering;
// If we're inserting into an all zeros vector, just use a plain move which
diff --git a/llvm/test/CodeGen/X86/avx512bf16-vl-intrinsics.ll
b/llvm/test/CodeGen/X86/avx512bf16-vl-intrinsics.ll
index 0826faa1071b01..482713e12d15c7 100644
--- a/llvm/test/CodeGen/X86/avx512bf16-vl-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx512bf16-vl-intrinsics.ll
@@ -381,3 +381,25 @@ entry:
%1 = shufflevector <8 x bfloat> %0, <8 x bfloat> undef, <16 x i32>
zeroinitializer
ret <16 x bfloat> %1
}
+
+define <16 x i32> @pr83358() {
+; X86-LABEL: pr83358:
+; X86: # %bb.0:
+; X86-NEXT:vcvtneps2bf16y {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0 # encoding:
[0x62,0xf2,0x7e,0x28,0x72,0x05,A,A,A,A]
+; X86-NEXT:# fixup A - offset: 6, value: {{\.?LCPI[0-9]+_[0-9]+}}, kind:
FK_Data_4
+; X86-NEXT:vshufi64x2 $0, %zmm0, %zmm0, %zmm0 # encoding:
[0x62,0xf3,0xfd,0x48,0x43,0xc0,0x00]
+; X86-NEXT:# zmm0 = zmm0[0,1,0,1,0,1,0,1]
+; X86-NEXT:retl # encoding: [0xc3]
+;
+; X64-LABEL: pr83358:
+; X64: # %bb.0:
+; X64-NEXT:vcvtneps2bf16y {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 #
encoding: [0x62,0xf2,0x7e,0x28,0x72,0x05,A,A,A,A]
+; X64-NEXT:# fixup A - offset: 6, value: {{\.?LCPI[0-9]+_[0-9]+}}-4, kind:
reloc_riprel_4byte
+; X64-NEXT:vshufi64x2 $0, %zmm0, %zmm0, %zmm0 # encoding:
[0x62,0xf3,0xfd,0x48,0x43,0xc0,0x00]
+; X64-NEXT:# zmm0 = zmm0[0,1,0,1,0,1,0,1]
+; X64-NEXT:retq # encoding: [0xc3]
+ %1 = call <8 x bfloat> @llvm.x86.avx512bf16.cvtneps2bf16.256(<8 x float>
)
+ %2 = bitcast <8 x bfloat> %1 to <4 x i32>
+ %3 = shufflevector <4 x i32> %2, <4 x i32> undef, <16 x i32>
+ ret <16 x i32> %3
+}
diff --git a/llvm/test/CodeGen/X86/bfloat.ll b/llvm/test/CodeGen/X86/bfloat.ll
index f2d3c4fb34199e..0042d477f3b364 100644
--- a/llvm/test/CodeGen/X86/bfloat.ll
+++ b/llvm/test/CodeGen/X86/bfloat.ll
@@ -511,7 +511,7 @@ define void @fold_ext_trunc(ptr %pa, ptr %pc) nounwind {
define bfloat @fold_ext_trunc2(bfloat %a) nounwind {
; X86-LABEL: fold_ext_trunc2:
; X86: # %bb.0:
-; X86-NEXT:vmovsh {{[0-9]+}}(%esp), %xmm0
+; X86-NEXT:vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero
; X86-NEXT:retl
;
; CHECK-LABEL: fold_ext_trunc2:
@@ -934,8 +934,8 @@ define <8 x bfloat> @addv(<8 x bfloat> %a, <8 x bfloat> %b)
nounwind {
define <2 x bfloat> @pr62997(bfloat %a, bfloat %b) {
; X86-LABEL: pr62997:
; X86: # %bb.0:
-; X86-NEXT:vmovsh {{[0-9]+}}(%esp), %xmm0
-; X86-NEXT:vmovsh {{[0-9]+}}(%esp), %xmm1
+; X86-NEXT:vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero
+; X86-NEXT:vmovsh {{.*#+}} xmm1 = mem[0],zero,zero,zero,zero,zero,zero,zero
; X86-NEXT:vpunpcklwd {{.*#+}} xmm0 =
xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
; X86-NEXT:retl
;
@@ -2423,7 +2423,6 @@ define <16 x bfloat> @fptrunc_v16f32(<16 x float> %a)
nounwind {
; AVXNC-LABEL: fptrunc_v16f32:
; AVXNC: # %bb.0:
; AVXNC-NEXT:{vex} vcvtneps2bf16 %ymm0, %xmm0
-; AVXNC-NEXT:vinsertf128 $0, %xmm0, %ymm0, %ymm0
; AVXNC-NEXT:{vex} vcvtneps2bf16 %ymm1, %xmm1
; AVXNC-NEXT:vinsertf128 $1, %xmm1, %ymm0, %ymm0
; AVXNC-NEXT:retq
[llvm-branch-commits] [llvm] release/18.x: [X86] Add missing subvector_subreg_lowering for BF16 (#83720) (PR #83758)
llvmbot wrote:
@llvm/pr-subscribers-backend-x86
Author: None (llvmbot)
Changes
Backport ff72c83b017ba636be13750c7f96cd87fc22c465
Requested by: @phoebewang
---
Full diff: https://github.com/llvm/llvm-project/pull/83758.diff
3 Files Affected:
- (modified) llvm/lib/Target/X86/X86InstrVecCompiler.td (+3)
- (modified) llvm/test/CodeGen/X86/avx512bf16-vl-intrinsics.ll (+22)
- (modified) llvm/test/CodeGen/X86/bfloat.ll (+3-4)
``diff
diff --git a/llvm/lib/Target/X86/X86InstrVecCompiler.td
b/llvm/lib/Target/X86/X86InstrVecCompiler.td
index bbd19cf8d5b25e..461b2badc13134 100644
--- a/llvm/lib/Target/X86/X86InstrVecCompiler.td
+++ b/llvm/lib/Target/X86/X86InstrVecCompiler.td
@@ -83,6 +83,7 @@ defm : subvector_subreg_lowering;
defm : subvector_subreg_lowering;
defm : subvector_subreg_lowering;
defm : subvector_subreg_lowering;
+defm : subvector_subreg_lowering;
// A 128-bit subvector extract from the first 512-bit vector position is a
// subregister copy that needs no instruction. Likewise, a 128-bit subvector
@@ -95,6 +96,7 @@ defm : subvector_subreg_lowering;
defm : subvector_subreg_lowering;
defm : subvector_subreg_lowering;
defm : subvector_subreg_lowering;
+defm : subvector_subreg_lowering;
// A 128-bit subvector extract from the first 512-bit vector position is a
// subregister copy that needs no instruction. Likewise, a 128-bit subvector
@@ -107,6 +109,7 @@ defm : subvector_subreg_lowering;
defm : subvector_subreg_lowering;
defm : subvector_subreg_lowering;
defm : subvector_subreg_lowering;
+defm : subvector_subreg_lowering;
// If we're inserting into an all zeros vector, just use a plain move which
diff --git a/llvm/test/CodeGen/X86/avx512bf16-vl-intrinsics.ll
b/llvm/test/CodeGen/X86/avx512bf16-vl-intrinsics.ll
index 0826faa1071b01..482713e12d15c7 100644
--- a/llvm/test/CodeGen/X86/avx512bf16-vl-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx512bf16-vl-intrinsics.ll
@@ -381,3 +381,25 @@ entry:
%1 = shufflevector <8 x bfloat> %0, <8 x bfloat> undef, <16 x i32>
zeroinitializer
ret <16 x bfloat> %1
}
+
+define <16 x i32> @pr83358() {
+; X86-LABEL: pr83358:
+; X86: # %bb.0:
+; X86-NEXT:vcvtneps2bf16y {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0 # encoding:
[0x62,0xf2,0x7e,0x28,0x72,0x05,A,A,A,A]
+; X86-NEXT:# fixup A - offset: 6, value: {{\.?LCPI[0-9]+_[0-9]+}}, kind:
FK_Data_4
+; X86-NEXT:vshufi64x2 $0, %zmm0, %zmm0, %zmm0 # encoding:
[0x62,0xf3,0xfd,0x48,0x43,0xc0,0x00]
+; X86-NEXT:# zmm0 = zmm0[0,1,0,1,0,1,0,1]
+; X86-NEXT:retl # encoding: [0xc3]
+;
+; X64-LABEL: pr83358:
+; X64: # %bb.0:
+; X64-NEXT:vcvtneps2bf16y {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 #
encoding: [0x62,0xf2,0x7e,0x28,0x72,0x05,A,A,A,A]
+; X64-NEXT:# fixup A - offset: 6, value: {{\.?LCPI[0-9]+_[0-9]+}}-4, kind:
reloc_riprel_4byte
+; X64-NEXT:vshufi64x2 $0, %zmm0, %zmm0, %zmm0 # encoding:
[0x62,0xf3,0xfd,0x48,0x43,0xc0,0x00]
+; X64-NEXT:# zmm0 = zmm0[0,1,0,1,0,1,0,1]
+; X64-NEXT:retq # encoding: [0xc3]
+ %1 = call <8 x bfloat> @llvm.x86.avx512bf16.cvtneps2bf16.256(<8 x float>
)
+ %2 = bitcast <8 x bfloat> %1 to <4 x i32>
+ %3 = shufflevector <4 x i32> %2, <4 x i32> undef, <16 x i32>
+ ret <16 x i32> %3
+}
diff --git a/llvm/test/CodeGen/X86/bfloat.ll b/llvm/test/CodeGen/X86/bfloat.ll
index f2d3c4fb34199e..0042d477f3b364 100644
--- a/llvm/test/CodeGen/X86/bfloat.ll
+++ b/llvm/test/CodeGen/X86/bfloat.ll
@@ -511,7 +511,7 @@ define void @fold_ext_trunc(ptr %pa, ptr %pc) nounwind {
define bfloat @fold_ext_trunc2(bfloat %a) nounwind {
; X86-LABEL: fold_ext_trunc2:
; X86: # %bb.0:
-; X86-NEXT:vmovsh {{[0-9]+}}(%esp), %xmm0
+; X86-NEXT:vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero
; X86-NEXT:retl
;
; CHECK-LABEL: fold_ext_trunc2:
@@ -934,8 +934,8 @@ define <8 x bfloat> @addv(<8 x bfloat> %a, <8 x bfloat> %b)
nounwind {
define <2 x bfloat> @pr62997(bfloat %a, bfloat %b) {
; X86-LABEL: pr62997:
; X86: # %bb.0:
-; X86-NEXT:vmovsh {{[0-9]+}}(%esp), %xmm0
-; X86-NEXT:vmovsh {{[0-9]+}}(%esp), %xmm1
+; X86-NEXT:vmovsh {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero
+; X86-NEXT:vmovsh {{.*#+}} xmm1 = mem[0],zero,zero,zero,zero,zero,zero,zero
; X86-NEXT:vpunpcklwd {{.*#+}} xmm0 =
xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
; X86-NEXT:retl
;
@@ -2423,7 +2423,6 @@ define <16 x bfloat> @fptrunc_v16f32(<16 x float> %a)
nounwind {
; AVXNC-LABEL: fptrunc_v16f32:
; AVXNC: # %bb.0:
; AVXNC-NEXT:{vex} vcvtneps2bf16 %ymm0, %xmm0
-; AVXNC-NEXT:vinsertf128 $0, %xmm0, %ymm0, %ymm0
; AVXNC-NEXT:{vex} vcvtneps2bf16 %ymm1, %xmm1
; AVXNC-NEXT:vinsertf128 $1, %xmm1, %ymm0, %ymm0
; AVXNC-NEXT:retq
``
https://github.com/llvm/llvm-project/pull/83758
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[llvm-branch-commits] [llvm] release/18.x: [X86] Add missing subvector_subreg_lowering for BF16 (#83720) (PR #83758)
https://github.com/FreddyLeaf approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/83758 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [mlir] [mlir][Transforms] Encapsulate dialect conversion options in `ConversionConfig` (PR #83754)
https://github.com/matthias-springer edited https://github.com/llvm/llvm-project/pull/83754 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] [Inline]Update value profile for non-call instructions (PR #83769)
https://github.com/minglotus-6 created
https://github.com/llvm/llvm-project/pull/83769
None
>From 04a2bca6ee0fbea6a9dc84f59e8bf4a41f8ae230 Mon Sep 17 00:00:00 2001
From: mingmingl
Date: Sun, 3 Mar 2024 22:16:03 -0800
Subject: [PATCH] [Inline]Update value profile for non-call instructions
---
llvm/include/llvm/IR/ProfDataUtils.h | 3 +
llvm/lib/IR/ProfDataUtils.cpp | 32 +++
llvm/lib/Transforms/Utils/InlineFunction.cpp | 26 +-
.../Transforms/Inline/update_value_profile.ll | 89 +++
4 files changed, 147 insertions(+), 3 deletions(-)
create mode 100644 llvm/test/Transforms/Inline/update_value_profile.ll
diff --git a/llvm/include/llvm/IR/ProfDataUtils.h
b/llvm/include/llvm/IR/ProfDataUtils.h
index 255fa2ff1c7906..2010c4bc1e8b34 100644
--- a/llvm/include/llvm/IR/ProfDataUtils.h
+++ b/llvm/include/llvm/IR/ProfDataUtils.h
@@ -108,5 +108,8 @@ bool extractProfTotalWeight(const Instruction &I, uint64_t
&TotalWeights);
/// a `prof` metadata reference to instruction `I`.
void setBranchWeights(Instruction &I, ArrayRef Weights);
+/// Scaling value profile 'ProfData' using the ratio of S/T.
+MDNode *scaleValueProfile(const MDNode *ProfData, uint64_t S, uint64_t T);
+
} // namespace llvm
#endif
diff --git a/llvm/lib/IR/ProfDataUtils.cpp b/llvm/lib/IR/ProfDataUtils.cpp
index dcb057c1b25fd8..db91a66bf493ec 100644
--- a/llvm/lib/IR/ProfDataUtils.cpp
+++ b/llvm/lib/IR/ProfDataUtils.cpp
@@ -190,4 +190,36 @@ void setBranchWeights(Instruction &I, ArrayRef
Weights) {
I.setMetadata(LLVMContext::MD_prof, BranchWeights);
}
+MDNode *scaleValueProfile(const MDNode *ProfData, uint64_t S, uint64_t T) {
+ if (ProfData == nullptr)
+return nullptr;
+ assert(
+ dyn_cast(ProfData->getOperand(0))->getString().equals("VP") &&
+ "Expects value profile metadata");
+ LLVMContext &C = ProfData->getContext();
+ MDBuilder MDB(C);
+ APInt APS(128, S), APT(128, T);
+
+ SmallVector Vals;
+ Vals.push_back(ProfData->getOperand(0));
+ for (unsigned i = 1; i < ProfData->getNumOperands(); i += 2) {
+Vals.push_back(ProfData->getOperand(i));
+uint64_t Count =
+mdconst::dyn_extract(ProfData->getOperand(i + 1))
+->getValue()
+.getZExtValue();
+// Don't scale the magic number.
+if (Count == NOMORE_ICP_MAGICNUM) {
+ Vals.push_back(ProfData->getOperand(i + 1));
+ continue;
+}
+// Using APInt::div may be expensive, but most cases should fit 64 bits.
+APInt Val(128, Count);
+Val *= APS;
+Vals.push_back(MDB.createConstant(ConstantInt::get(
+Type::getInt64Ty(C), Val.udiv(APT).getLimitedValue(;
+ }
+ return MDNode::get(C, Vals);
+}
+
} // namespace llvm
diff --git a/llvm/lib/Transforms/Utils/InlineFunction.cpp
b/llvm/lib/Transforms/Utils/InlineFunction.cpp
index d4d4bf5ebdf36e..7cc1641a207aef 100644
--- a/llvm/lib/Transforms/Utils/InlineFunction.cpp
+++ b/llvm/lib/Transforms/Utils/InlineFunction.cpp
@@ -23,6 +23,7 @@
#include "llvm/Analysis/BlockFrequencyInfo.h"
#include "llvm/Analysis/CallGraph.h"
#include "llvm/Analysis/CaptureTracking.h"
+#include "llvm/Analysis/IndirectCallVisitor.h"
#include "llvm/Analysis/InstructionSimplify.h"
#include "llvm/Analysis/MemoryProfileInfo.h"
#include "llvm/Analysis/ObjCARCAnalysisUtils.h"
@@ -30,8 +31,8 @@
#include "llvm/Analysis/ProfileSummaryInfo.h"
#include "llvm/Analysis/ValueTracking.h"
#include "llvm/Analysis/VectorUtils.h"
-#include "llvm/IR/AttributeMask.h"
#include "llvm/IR/Argument.h"
+#include "llvm/IR/AttributeMask.h"
#include "llvm/IR/BasicBlock.h"
#include "llvm/IR/CFG.h"
#include "llvm/IR/Constant.h"
@@ -55,6 +56,7 @@
#include "llvm/IR/MDBuilder.h"
#include "llvm/IR/Metadata.h"
#include "llvm/IR/Module.h"
+#include "llvm/IR/ProfDataUtils.h"
#include "llvm/IR/Type.h"
#include "llvm/IR/User.h"
#include "llvm/IR/Value.h"
@@ -1910,9 +1912,18 @@ void llvm::updateProfileCallee(
if (VMap) {
uint64_t CloneEntryCount = PriorEntryCount - NewEntryCount;
for (auto Entry : *VMap)
+ // FIXME: Update the profiles for invoke instruction after inline
if (isa(Entry.first))
-if (auto *CI = dyn_cast_or_null(Entry.second))
+if (auto *CI = dyn_cast_or_null(Entry.second)) {
CI->updateProfWeight(CloneEntryCount, PriorEntryCount);
+ Instruction *VPtr =
+ PGOIndirectCallVisitor::tryGetVTableInstruction(CI);
+ if (VPtr)
+VPtr->setMetadata(
+LLVMContext::MD_prof,
+scaleValueProfile(VPtr->getMetadata(LLVMContext::MD_prof),
+ CloneEntryCount, PriorEntryCount));
+}
}
if (EntryDelta) {
@@ -1922,8 +1933,17 @@ void llvm::updateProfileCallee(
// No need to update the callsite if it is pruned during inlining.
if (!VMap || VMap->count(&BB))
for (Instruction &I : BB)
- if (CallInst *CI = dyn_cast(&I))
+ // FIXME: Update the profiles fo
[llvm-branch-commits] [llvm] [Inline]Update value profile for non-call instructions (PR #83769)
https://github.com/minglotus-6 edited https://github.com/llvm/llvm-project/pull/83769 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/18.x: [cmake] Add minor version to library SONAME (#79376) (PR #82409)
RalfJung wrote: Making such a fundamental change to the .so file so late in the release was probably a bad idea... a bunch of downstream projects will have to adjust the way they link with LLVM and that's [not always easy](https://github.com/rust-lang/rust/issues/121889). https://github.com/llvm/llvm-project/pull/82409 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] release/18.x: [RISCV] Fix crash when unrolling loop containing vector instructions (#83384) (PR #83744)
https://github.com/arcbbb approved this pull request. LGTM. Thanks! https://github.com/llvm/llvm-project/pull/83744 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
