[llvm-branch-commits] [llvm] release/18.x: [GVN] Drop nsw/nuw flags when replacing the result of a with.overflow intrinsic with a overflowing binary operator (#82935) (PR #82965)

2024-02-26 Thread via llvm-branch-commits

llvmbot wrote:

@nikic What do you think about merging this PR to the release branch?

https://github.com/llvm/llvm-project/pull/82965
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[llvm-branch-commits] [llvm] release/18.x: [GVN] Drop nsw/nuw flags when replacing the result of a with.overflow intrinsic with a overflowing binary operator (#82935) (PR #82965)

2024-02-26 Thread via llvm-branch-commits

https://github.com/llvmbot milestoned 
https://github.com/llvm/llvm-project/pull/82965
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[llvm-branch-commits] [llvm] release/18.x: [GVN] Drop nsw/nuw flags when replacing the result of a with.overflow intrinsic with a overflowing binary operator (#82935) (PR #82965)

2024-02-26 Thread via llvm-branch-commits

https://github.com/llvmbot created 
https://github.com/llvm/llvm-project/pull/82965

Backport 892b4beeac50920e630f10905b2916295e2eb6d8

Requested by: @dtcxzyw

>From 14fb01ef0e443c04d718466608e62dbbc3cfd9ce Mon Sep 17 00:00:00 2001
From: Yingwei Zheng 
Date: Mon, 26 Feb 2024 15:55:56 +0800
Subject: [PATCH] [GVN] Drop nsw/nuw flags when replacing the result of a
 with.overflow intrinsic with a overflowing binary operator (#82935)

Alive2: https://alive2.llvm.org/ce/z/gyL7mn
Fixes https://github.com/llvm/llvm-project/issues/82884.

(cherry picked from commit 892b4beeac50920e630f10905b2916295e2eb6d8)
---
 llvm/lib/Transforms/Utils/Local.cpp |  8 +++-
 llvm/test/Transforms/GVN/pr82884.ll | 21 +
 2 files changed, 28 insertions(+), 1 deletion(-)
 create mode 100644 llvm/test/Transforms/GVN/pr82884.ll

diff --git a/llvm/lib/Transforms/Utils/Local.cpp 
b/llvm/lib/Transforms/Utils/Local.cpp
index 459e3d98059283..a1c6bbc52fd05e 100644
--- a/llvm/lib/Transforms/Utils/Local.cpp
+++ b/llvm/lib/Transforms/Utils/Local.cpp
@@ -3369,11 +3369,17 @@ void llvm::patchReplacementInstruction(Instruction *I, 
Value *Repl) {
 
   // Patch the replacement so that it is not more restrictive than the value
   // being replaced.
+  WithOverflowInst *UnusedWO;
+  // When replacing the result of a llvm.*.with.overflow intrinsic with a
+  // overflowing binary operator, nuw/nsw flags may no longer hold.
+  if (isa(ReplInst) &&
+  match(I, m_ExtractValue<0>(m_WithOverflowInst(UnusedWO
+ReplInst->dropPoisonGeneratingFlags();
   // Note that if 'I' is a load being replaced by some operation,
   // for example, by an arithmetic operation, then andIRFlags()
   // would just erase all math flags from the original arithmetic
   // operation, which is clearly not wanted and not needed.
-  if (!isa(I))
+  else if (!isa(I))
 ReplInst->andIRFlags(I);
 
   // FIXME: If both the original and replacement value are part of the
diff --git a/llvm/test/Transforms/GVN/pr82884.ll 
b/llvm/test/Transforms/GVN/pr82884.ll
new file mode 100644
index 00..71abafda60d93d
--- /dev/null
+++ b/llvm/test/Transforms/GVN/pr82884.ll
@@ -0,0 +1,21 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 
UTC_ARGS: --version 4
+; RUN: opt -S -passes=gvn < %s | FileCheck %s
+
+; Make sure nsw/nuw flags are dropped.
+
+define i32 @pr82884(i32 %x) {
+; CHECK-LABEL: define i32 @pr82884(
+; CHECK-SAME: i32 [[X:%.*]]) {
+; CHECK-NEXT:[[MUL:%.*]] = mul i32 [[X]], [[X]]
+; CHECK-NEXT:call void @use(i32 [[MUL]])
+; CHECK-NEXT:[[MUL2:%.*]] = call { i32, i1 } 
@llvm.smul.with.overflow.i32(i32 [[X]], i32 [[X]])
+; CHECK-NEXT:ret i32 [[MUL]]
+;
+  %mul = mul nsw nuw i32 %x, %x
+  call void @use(i32 %mul)
+  %mul2 = call { i32, i1 } @llvm.smul.with.overflow.i32(i32 %x, i32 %x)
+  %ret = extractvalue { i32, i1 } %mul2, 0
+  ret i32 %ret
+}
+
+declare void @use(i32)

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[llvm-branch-commits] [llvm] release/18.x: [GVN] Drop nsw/nuw flags when replacing the result of a with.overflow intrinsic with a overflowing binary operator (#82935) (PR #82965)

2024-02-26 Thread via llvm-branch-commits

llvmbot wrote:




@llvm/pr-subscribers-llvm-transforms

Author: None (llvmbot)


Changes

Backport 892b4beeac50920e630f10905b2916295e2eb6d8

Requested by: @dtcxzyw

---
Full diff: https://github.com/llvm/llvm-project/pull/82965.diff


2 Files Affected:

- (modified) llvm/lib/Transforms/Utils/Local.cpp (+7-1) 
- (added) llvm/test/Transforms/GVN/pr82884.ll (+21) 


``diff
diff --git a/llvm/lib/Transforms/Utils/Local.cpp 
b/llvm/lib/Transforms/Utils/Local.cpp
index 459e3d98059283..a1c6bbc52fd05e 100644
--- a/llvm/lib/Transforms/Utils/Local.cpp
+++ b/llvm/lib/Transforms/Utils/Local.cpp
@@ -3369,11 +3369,17 @@ void llvm::patchReplacementInstruction(Instruction *I, 
Value *Repl) {
 
   // Patch the replacement so that it is not more restrictive than the value
   // being replaced.
+  WithOverflowInst *UnusedWO;
+  // When replacing the result of a llvm.*.with.overflow intrinsic with a
+  // overflowing binary operator, nuw/nsw flags may no longer hold.
+  if (isa(ReplInst) &&
+  match(I, m_ExtractValue<0>(m_WithOverflowInst(UnusedWO
+ReplInst->dropPoisonGeneratingFlags();
   // Note that if 'I' is a load being replaced by some operation,
   // for example, by an arithmetic operation, then andIRFlags()
   // would just erase all math flags from the original arithmetic
   // operation, which is clearly not wanted and not needed.
-  if (!isa(I))
+  else if (!isa(I))
 ReplInst->andIRFlags(I);
 
   // FIXME: If both the original and replacement value are part of the
diff --git a/llvm/test/Transforms/GVN/pr82884.ll 
b/llvm/test/Transforms/GVN/pr82884.ll
new file mode 100644
index 00..71abafda60d93d
--- /dev/null
+++ b/llvm/test/Transforms/GVN/pr82884.ll
@@ -0,0 +1,21 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 
UTC_ARGS: --version 4
+; RUN: opt -S -passes=gvn < %s | FileCheck %s
+
+; Make sure nsw/nuw flags are dropped.
+
+define i32 @pr82884(i32 %x) {
+; CHECK-LABEL: define i32 @pr82884(
+; CHECK-SAME: i32 [[X:%.*]]) {
+; CHECK-NEXT:[[MUL:%.*]] = mul i32 [[X]], [[X]]
+; CHECK-NEXT:call void @use(i32 [[MUL]])
+; CHECK-NEXT:[[MUL2:%.*]] = call { i32, i1 } 
@llvm.smul.with.overflow.i32(i32 [[X]], i32 [[X]])
+; CHECK-NEXT:ret i32 [[MUL]]
+;
+  %mul = mul nsw nuw i32 %x, %x
+  call void @use(i32 %mul)
+  %mul2 = call { i32, i1 } @llvm.smul.with.overflow.i32(i32 %x, i32 %x)
+  %ret = extractvalue { i32, i1 } %mul2, 0
+  ret i32 %ret
+}
+
+declare void @use(i32)

``




https://github.com/llvm/llvm-project/pull/82965
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[llvm-branch-commits] [clang] [llvm] [MC/DC][Coverage] Loosen the limit of NumConds from 6 (PR #82448)

2024-02-26 Thread NAKAMURA Takumi via llvm-branch-commits

https://github.com/chapuni closed 
https://github.com/llvm/llvm-project/pull/82448
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[llvm-branch-commits] [clang] [llvm] [MC/DC][Coverage] Loosen the limit of NumConds from 6 (PR #82448)

2024-02-26 Thread NAKAMURA Takumi via llvm-branch-commits

https://github.com/chapuni reopened 
https://github.com/llvm/llvm-project/pull/82448
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[llvm-branch-commits] [clang] fix links on clang 18.1.0rc release page (PR #82739)

2024-02-26 Thread Aaron Ballman via llvm-branch-commits

https://github.com/AaronBallman updated 
https://github.com/llvm/llvm-project/pull/82739

>From d3ae59831c804f18b3a415c71a7b392d07c40f94 Mon Sep 17 00:00:00 2001
From: "H. Vetinari" 
Date: Fri, 23 Feb 2024 19:03:59 +1100
Subject: [PATCH] fix links on clang 18.1.0rc release page

---
 clang/docs/ReleaseNotes.rst | 46 ++---
 1 file changed, 23 insertions(+), 23 deletions(-)

diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index 93a67e7a895592..2f590a51c959dd 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -58,12 +58,12 @@ code bases.
 
   To reduce such widespread breakages, as an extension, Clang accepts this code
   with an existing warning ``-Wambiguous-reversed-operator`` warning.
-  Fixes `GH `_.
+  Fixes `#53954 `_.
 
 - The CMake variable ``GCC_INSTALL_PREFIX`` (which sets the default
   ``--gcc-toolchain=``) is deprecated and will be removed. Specify
   ``--gcc-install-dir=`` or ``--gcc-triple=`` in a `configuration file
-  ` as a
+  `_ as a
   replacement.
   (`#77537 `_)
 
@@ -95,7 +95,7 @@ C/C++ Language Potentially Breaking Changes
 
 - Fixed a bug in finding matching `operator!=` while adding reversed 
`operator==` as
   outlined in "The Equality Operator You Are Looking For" (`P2468 
`_).
-  Fixes (`#68901: `_).
+  Fixes (`#68901 `_).
 
 C++ Specific Potentially Breaking Changes
 -
@@ -139,10 +139,10 @@ C++ Specific Potentially Breaking Changes
 
 - Remove the hardcoded path to the imported modules for C++20 named modules. 
Now we
   require all the dependent modules to specified from the command line.
-  See (`#62707: `_).
+  See (`#62707 `_).
 
 - Forbid `import XXX;` in C++ to find module `XXX` comes from explicit clang 
modules.
-  See (`#64755: `_).
+  See (`#64755 `_).
 
 ABI Changes in This Version
 ---
@@ -199,7 +199,7 @@ C++ Language Changes
 
 C++20 Feature Support
 ^
-- Implemented `P1907R1 ` which extends allowed 
non-type template argument
+- Implemented `P1907R1 `_ which extends allowed 
non-type template argument
   kinds with e.g. floating point values and pointers and references to 
subobjects.
   This feature is still experimental. Accordingly, 
``__cpp_nontype_template_args`` was not updated.
   However, its support can be tested with 
``__has_extension(cxx_generalized_nttp)``.
@@ -259,7 +259,7 @@ Resolutions to C++ Defect Reports
 
 - Implemented `CWG2598 `_ and `CWG2096 
`_,
   making unions (that have either no members or at least one literal member) 
literal types.
-  (`#77924: `_).
+  (`#77924 `_).
 
 
 C Language Changes
@@ -415,7 +415,7 @@ Attribute Changes in Clang
   types after default argument promotion. As a result, it's no longer an
   automatic diagnostic to use parameters of types that the format style
   supports but that are never the result of default argument promotion, such as
-  ``float``. (`#59824: `_)
+  ``float``. (`#59824 `_)
 
 - Clang now supports ``[[clang::preferred_type(type-name)]]`` as an attribute
   which can be applied to a bit-field. This attribute helps to map a bit-field
@@ -483,13 +483,13 @@ Improvements to Clang's diagnostics
 - Clang's ``-Wtautological-negation-compare`` flag now diagnoses logical
   tautologies like ``x && !x`` and ``!x || x`` in expressions. This also
   makes ``-Winfinite-recursion`` diagnose more cases.
-  (`#56035: `_).
+  (`#56035 `_).
 - Clang constexpr evaluator now diagnoses compound assignment operators against
   uninitialized variables as a read of uninitialized object.
   (`#51536 `_)
 - Clang's ``-Wformat-truncation`` now diagnoses ``snprintf`` call that is 
known to
   result in string truncation.
-  (`#64871: `_).
+  (`#64871 `_).
   Existing warnings that similarly warn about 

[llvm-branch-commits] [clang] fix links on clang 18.1.0rc release page (PR #82739)

2024-02-26 Thread Aaron Ballman via llvm-branch-commits

https://github.com/AaronBallman milestoned 
https://github.com/llvm/llvm-project/pull/82739
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[llvm-branch-commits] [clang] fix links on clang 18.1.0rc release page (PR #82739)

2024-02-26 Thread Tobias Hieta via llvm-branch-commits

https://github.com/tru closed https://github.com/llvm/llvm-project/pull/82739
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[llvm-branch-commits] [clang] fix links on clang 18.1.0rc release page (PR #82739)

2024-02-26 Thread Tobias Hieta via llvm-branch-commits

tru wrote:

I merged it directly to the branch. Thanks for the fixes!

https://github.com/llvm/llvm-project/pull/82739
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[llvm-branch-commits] [openmp] release/18.x: [OpenMP] Implement __kmp_is_address_mapped on DragonFlyBSD. (#82895) (PR #82940)

2024-02-26 Thread Shilei Tian via llvm-branch-commits

shiltian wrote:

Generally we don't back port feature-implementation patches but we (actually 
it's me) already made an exception by mistake 
[ebc589e](https://github.com/llvm/llvm-project/commit/ebc589e44ffe7b77cc500f3d2dc1a7ba11dd82b1).
 How many patches like this do you expect to be back ported?

https://github.com/llvm/llvm-project/pull/82940
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[llvm-branch-commits] [llvm] release/18.x: [SystemZ] Use VT (not ArgVT) for SlotVT in LowerCall(). (#82475) (PR #83021)

2024-02-26 Thread via llvm-branch-commits

https://github.com/llvmbot milestoned 
https://github.com/llvm/llvm-project/pull/83021
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[llvm-branch-commits] [llvm] release/18.x: [SystemZ] Use VT (not ArgVT) for SlotVT in LowerCall(). (#82475) (PR #83021)

2024-02-26 Thread via llvm-branch-commits

https://github.com/llvmbot created 
https://github.com/llvm/llvm-project/pull/83021

Backport 9c0e45d7f0e2202e16dbd9a7b9f462e2bcb741ae

Requested by: @JonPsson1

>From f370d3e5091c6b76f3676193fc981277b88557ab Mon Sep 17 00:00:00 2001
From: Jonas Paulsson 
Date: Wed, 21 Feb 2024 16:26:16 +0100
Subject: [PATCH] [SystemZ] Use VT (not ArgVT) for SlotVT in LowerCall().
 (#82475)

When an integer argument is promoted and *not* split (like i72 -> i128 on
a new machine with vector support), the SlotVT should be i128, which is
stored in VT - not ArgVT.

Fixes #81417

(cherry picked from commit 9c0e45d7f0e2202e16dbd9a7b9f462e2bcb741ae)
---
 .../lib/Target/SystemZ/SystemZISelLowering.cpp |  2 +-
 llvm/test/CodeGen/SystemZ/frame-29.ll  | 18 ++
 2 files changed, 19 insertions(+), 1 deletion(-)
 create mode 100644 llvm/test/CodeGen/SystemZ/frame-29.ll

diff --git a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp 
b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
index 924df12578fe4b..f4616df85cb202 100644
--- a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
@@ -1922,7 +1922,7 @@ SystemZTargetLowering::LowerCall(CallLoweringInfo &CLI,
 unsigned N = getNumRegistersForCallingConv(Ctx, CLI.CallConv, 
OrigArgVT);
 SlotVT = EVT::getIntegerVT(Ctx, PartVT.getSizeInBits() * N);
   } else {
-SlotVT = Outs[I].ArgVT;
+SlotVT = Outs[I].VT;
   }
   SDValue SpillSlot = DAG.CreateStackTemporary(SlotVT);
   int FI = cast(SpillSlot)->getIndex();
diff --git a/llvm/test/CodeGen/SystemZ/frame-29.ll 
b/llvm/test/CodeGen/SystemZ/frame-29.ll
new file mode 100644
index 00..6cc0d9e985e160
--- /dev/null
+++ b/llvm/test/CodeGen/SystemZ/frame-29.ll
@@ -0,0 +1,18 @@
+; RUN: llc %s -o - -mtriple=s390x-linux-gnu -mcpu=z16 
-print-after=finalize-isel 2>&1 | FileCheck %s
+;
+; Test that the correct space is allocated for the outgoing stack argument.
+
+declare void @bar(i72 %Arg);
+
+define void @foo() {
+; CHECK-LABEL: # Machine code for function foo: IsSSA, TracksLiveness
+; CHECK-NEXT: Frame Objects:
+; CHECK-NEXT:   fi#0: size=1, align=2, at location [SP]
+; CHECK-NEXT:   fi#1: size=16, align=8, at location [SP]
+
+; CHECK-LABEL: foo:
+; CHECK: aghi %r15, -184
+  %1 = alloca i8, align 2
+  tail call fastcc void @bar(i72 2097168)
+  ret void
+}

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[llvm-branch-commits] [llvm] release/18.x: [SystemZ] Use VT (not ArgVT) for SlotVT in LowerCall(). (#82475) (PR #83021)

2024-02-26 Thread via llvm-branch-commits

llvmbot wrote:

@uweigand What do you think about merging this PR to the release branch?

https://github.com/llvm/llvm-project/pull/83021
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[llvm-branch-commits] [llvm] release/18.x: [SystemZ] Require D12 for i128 accesses in isLegalAddressingMode() (#79221) (PR #83022)

2024-02-26 Thread via llvm-branch-commits

https://github.com/llvmbot created 
https://github.com/llvm/llvm-project/pull/83022

Backport 84dcf3d35b6ea8d8b6c34bc9cf21135863c47b8c

Requested by: @JonPsson1

>From 5393a050f0a293c9ca2fbcc2b9250499676f8561 Mon Sep 17 00:00:00 2001
From: Jonas Paulsson 
Date: Wed, 24 Jan 2024 20:16:05 +0100
Subject: [PATCH] [SystemZ] Require D12 for i128 accesses in
 isLegalAddressingMode() (#79221)

Machines with vector support handle i128 in vector registers and
therefore only have the small displacement available for memory
accesses. Update isLegalAddressingMode() to reflect this.

(cherry picked from commit 84dcf3d35b6ea8d8b6c34bc9cf21135863c47b8c)
---
 .../Target/SystemZ/SystemZISelLowering.cpp|  3 ++-
 llvm/test/CodeGen/SystemZ/loop-01.ll  | 23 +++
 2 files changed, 25 insertions(+), 1 deletion(-)

diff --git a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp 
b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
index 924df12578fe4b..19a4e9b0f17ce5 100644
--- a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
@@ -1067,7 +1067,8 @@ bool SystemZTargetLowering::isLegalAddressingMode(const 
DataLayout &DL,
   if (!isInt<20>(AM.BaseOffs))
 return false;
 
-  bool RequireD12 = Subtarget.hasVector() && Ty->isVectorTy();
+  bool RequireD12 =
+  Subtarget.hasVector() && (Ty->isVectorTy() || Ty->isIntegerTy(128));
   AddressingMode SupportedAM(!RequireD12, true);
   if (I != nullptr)
 SupportedAM = supportedAddressingMode(I, Subtarget.hasVector());
diff --git a/llvm/test/CodeGen/SystemZ/loop-01.ll 
b/llvm/test/CodeGen/SystemZ/loop-01.ll
index 15dfae73c97bc9..554c248f8dbf3b 100644
--- a/llvm/test/CodeGen/SystemZ/loop-01.ll
+++ b/llvm/test/CodeGen/SystemZ/loop-01.ll
@@ -312,3 +312,26 @@ for.inc.i:; preds 
= %for.body.i63
   %indvars.iv.next156.i.3 = add nsw i64 %indvars.iv155.i, 4
   br label %for.body.i63
 }
+
+; Test that offsets are in range for i128 memory accesses.
+define void @fun10() {
+; CHECK-Z13-LABEL: fun10:
+; CHECK-Z13: # =>This Inner Loop Header: Depth=1
+; CHECK-Z13-NOT: lay
+entry:
+  %A1 = alloca [3 x [7 x [10 x i128]]], align 8
+  br label %for.body
+
+for.body:; preds = %for.body, %entry
+  %IV = phi i64 [ 0, %entry ], [ %IV.next, %for.body ]
+  %Addr1 = getelementptr inbounds [3 x [7 x [10 x i128]]], ptr %A1, i64 0, i64 
%IV, i64 6, i64 6
+  store i128 17174966165894859678, ptr %Addr1, align 8
+  %Addr2 = getelementptr inbounds [3 x [7 x [10 x i128]]], ptr %A1, i64 0, i64 
%IV, i64 6, i64 8
+  store i128 17174966165894859678, ptr %Addr2, align 8
+  %IV.next = add nuw nsw i64 %IV, 1
+  %exitcond.not.i.i = icmp eq i64 %IV.next, 3
+  br i1 %exitcond.not.i.i, label %exit, label %for.body
+
+exit:; preds = %for.body
+  unreachable
+}

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[llvm-branch-commits] [llvm] release/18.x: [SystemZ] Require D12 for i128 accesses in isLegalAddressingMode() (#79221) (PR #83022)

2024-02-26 Thread via llvm-branch-commits

https://github.com/llvmbot milestoned 
https://github.com/llvm/llvm-project/pull/83022
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[llvm-branch-commits] [llvm] release/18.x: [SystemZ] Require D12 for i128 accesses in isLegalAddressingMode() (#79221) (PR #83022)

2024-02-26 Thread via llvm-branch-commits

llvmbot wrote:

@uweigand What do you think about merging this PR to the release branch?

https://github.com/llvm/llvm-project/pull/83022
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[llvm-branch-commits] [llvm] [llvm][AArch64] Do not inline a function with different signing scheme. (#80642) (PR #82743)

2024-02-26 Thread Nick Desaulniers via llvm-branch-commits

nickdesaulniers wrote:

LGTM

https://github.com/llvm/llvm-project/pull/82743
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[llvm-branch-commits] [llvm] [llvm][AArch64] Do not inline a function with different signing scheme. (#80642) (PR #82743)

2024-02-26 Thread Nick Desaulniers via llvm-branch-commits

https://github.com/nickdesaulniers approved this pull request.


https://github.com/llvm/llvm-project/pull/82743
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[llvm-branch-commits] [llvm] [llvm][AArch64] Do not inline a function with different signing scheme. (#80642) (PR #82743)

2024-02-26 Thread Nick Desaulniers via llvm-branch-commits

nickdesaulniers wrote:

(also, I think you can use `/backport ` comment in any issue and llvmbot 
will generate these PRs for you.)

https://github.com/llvm/llvm-project/pull/82743
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[llvm-branch-commits] [llvm] [llvm][AArch64] Autoupgrade function attributes from Module attributes (PR #82742)

2024-02-26 Thread Nick Desaulniers via llvm-branch-commits

https://github.com/nickdesaulniers requested changes to this pull request.

sounds like this got reverted

https://github.com/llvm/llvm-project/pull/82742
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[llvm-branch-commits] [llvm] release/18.x: [SystemZ] Use VT (not ArgVT) for SlotVT in LowerCall(). (#82475) (PR #83021)

2024-02-26 Thread Ulrich Weigand via llvm-branch-commits

https://github.com/uweigand approved this pull request.

LGTM.  This should be backported as a fixes a regression with i128 support.

https://github.com/llvm/llvm-project/pull/83021
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[llvm-branch-commits] [llvm] release/18.x: [SystemZ] Require D12 for i128 accesses in isLegalAddressingMode() (#79221) (PR #83022)

2024-02-26 Thread Ulrich Weigand via llvm-branch-commits

https://github.com/uweigand approved this pull request.

LGTM.  This should be backported as a fixes a regression with i128 support.

https://github.com/llvm/llvm-project/pull/83022
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[llvm-branch-commits] [llvm] release/18.x: [GVN] Drop nsw/nuw flags when replacing the result of a with.overflow intrinsic with a overflowing binary operator (#82935) (PR #82965)

2024-02-26 Thread Nikita Popov via llvm-branch-commits

https://github.com/nikic approved this pull request.


https://github.com/llvm/llvm-project/pull/82965
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[llvm-branch-commits] [openmp] release/18.x: [OpenMP] Implement __kmp_is_address_mapped on DragonFlyBSD. (#82895) (PR #82940)

2024-02-26 Thread Brad Smith via llvm-branch-commits

brad0 wrote:

> @brad0 Generally we don't back port feature-implementation patches but we 
> (actually it's me) already made an exception by mistake 
> [ebc589e](https://github.com/llvm/llvm-project/commit/ebc589e44ffe7b77cc500f3d2dc1a7ba11dd82b1).
>  How many patches like this do you expect to be back ported?

Just this one. But I can drop it. It's not critical.

https://github.com/llvm/llvm-project/pull/82940
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[llvm-branch-commits] [llvm] [VPlan] Explicitly handle scalar pointer inductions. (PR #80273)

2024-02-26 Thread Florian Hahn via llvm-branch-commits

https://github.com/fhahn closed https://github.com/llvm/llvm-project/pull/80273
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[llvm-branch-commits] [llvm][dfa-jump-threading] Add option to allow DFAJumpThreading when (PR #83049)

2024-02-26 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi created 
https://github.com/llvm/llvm-project/pull/83049

optimizing for size



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[llvm-branch-commits] [compiler-rt] [llvm] A copy of https://github.com/llvm/llvm-project/pull/66825. Actually this is a superset (a copy plus the thinlto-import change) (PR #80761)

2024-02-26 Thread Mingming Liu via llvm-branch-commits

https://github.com/minglotus-6 edited 
https://github.com/llvm/llvm-project/pull/80761
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[llvm-branch-commits] [llvm] 5393a05 - [SystemZ] Require D12 for i128 accesses in isLegalAddressingMode() (#79221)

2024-02-26 Thread via llvm-branch-commits

Author: Jonas Paulsson
Date: 2024-02-26T15:49:43Z
New Revision: 5393a050f0a293c9ca2fbcc2b9250499676f8561

URL: 
https://github.com/llvm/llvm-project/commit/5393a050f0a293c9ca2fbcc2b9250499676f8561
DIFF: 
https://github.com/llvm/llvm-project/commit/5393a050f0a293c9ca2fbcc2b9250499676f8561.diff

LOG: [SystemZ] Require D12 for i128 accesses in isLegalAddressingMode() (#79221)

Machines with vector support handle i128 in vector registers and
therefore only have the small displacement available for memory
accesses. Update isLegalAddressingMode() to reflect this.

(cherry picked from commit 84dcf3d35b6ea8d8b6c34bc9cf21135863c47b8c)

Added: 


Modified: 
llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
llvm/test/CodeGen/SystemZ/loop-01.ll

Removed: 




diff  --git a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp 
b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
index 924df12578fe4b..19a4e9b0f17ce5 100644
--- a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
@@ -1067,7 +1067,8 @@ bool SystemZTargetLowering::isLegalAddressingMode(const 
DataLayout &DL,
   if (!isInt<20>(AM.BaseOffs))
 return false;
 
-  bool RequireD12 = Subtarget.hasVector() && Ty->isVectorTy();
+  bool RequireD12 =
+  Subtarget.hasVector() && (Ty->isVectorTy() || Ty->isIntegerTy(128));
   AddressingMode SupportedAM(!RequireD12, true);
   if (I != nullptr)
 SupportedAM = supportedAddressingMode(I, Subtarget.hasVector());

diff  --git a/llvm/test/CodeGen/SystemZ/loop-01.ll 
b/llvm/test/CodeGen/SystemZ/loop-01.ll
index 15dfae73c97bc9..554c248f8dbf3b 100644
--- a/llvm/test/CodeGen/SystemZ/loop-01.ll
+++ b/llvm/test/CodeGen/SystemZ/loop-01.ll
@@ -312,3 +312,26 @@ for.inc.i:; preds 
= %for.body.i63
   %indvars.iv.next156.i.3 = add nsw i64 %indvars.iv155.i, 4
   br label %for.body.i63
 }
+
+; Test that offsets are in range for i128 memory accesses.
+define void @fun10() {
+; CHECK-Z13-LABEL: fun10:
+; CHECK-Z13: # =>This Inner Loop Header: Depth=1
+; CHECK-Z13-NOT: lay
+entry:
+  %A1 = alloca [3 x [7 x [10 x i128]]], align 8
+  br label %for.body
+
+for.body:; preds = %for.body, %entry
+  %IV = phi i64 [ 0, %entry ], [ %IV.next, %for.body ]
+  %Addr1 = getelementptr inbounds [3 x [7 x [10 x i128]]], ptr %A1, i64 0, i64 
%IV, i64 6, i64 6
+  store i128 17174966165894859678, ptr %Addr1, align 8
+  %Addr2 = getelementptr inbounds [3 x [7 x [10 x i128]]], ptr %A1, i64 0, i64 
%IV, i64 6, i64 8
+  store i128 17174966165894859678, ptr %Addr2, align 8
+  %IV.next = add nuw nsw i64 %IV, 1
+  %exitcond.not.i.i = icmp eq i64 %IV.next, 3
+  br i1 %exitcond.not.i.i, label %exit, label %for.body
+
+exit:; preds = %for.body
+  unreachable
+}



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[llvm-branch-commits] [llvm] release/18.x: [SystemZ] Require D12 for i128 accesses in isLegalAddressingMode() (#79221) (PR #83022)

2024-02-26 Thread Tom Stellard via llvm-branch-commits

https://github.com/tstellar closed 
https://github.com/llvm/llvm-project/pull/83022
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[llvm-branch-commits] [llvm] release/18.x: [SystemZ] Use VT (not ArgVT) for SlotVT in LowerCall(). (#82475) (PR #83021)

2024-02-26 Thread via llvm-branch-commits

https://github.com/llvmbot updated 
https://github.com/llvm/llvm-project/pull/83021

>From 9d51bd1c2476ce334b3370c5f073e24427171e5f Mon Sep 17 00:00:00 2001
From: Jonas Paulsson 
Date: Wed, 21 Feb 2024 16:26:16 +0100
Subject: [PATCH] [SystemZ] Use VT (not ArgVT) for SlotVT in LowerCall().
 (#82475)

When an integer argument is promoted and *not* split (like i72 -> i128 on
a new machine with vector support), the SlotVT should be i128, which is
stored in VT - not ArgVT.

Fixes #81417

(cherry picked from commit 9c0e45d7f0e2202e16dbd9a7b9f462e2bcb741ae)
---
 .../lib/Target/SystemZ/SystemZISelLowering.cpp |  2 +-
 llvm/test/CodeGen/SystemZ/frame-29.ll  | 18 ++
 2 files changed, 19 insertions(+), 1 deletion(-)
 create mode 100644 llvm/test/CodeGen/SystemZ/frame-29.ll

diff --git a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp 
b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
index 19a4e9b0f17ce5..5db04a8bef824a 100644
--- a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
@@ -1923,7 +1923,7 @@ SystemZTargetLowering::LowerCall(CallLoweringInfo &CLI,
 unsigned N = getNumRegistersForCallingConv(Ctx, CLI.CallConv, 
OrigArgVT);
 SlotVT = EVT::getIntegerVT(Ctx, PartVT.getSizeInBits() * N);
   } else {
-SlotVT = Outs[I].ArgVT;
+SlotVT = Outs[I].VT;
   }
   SDValue SpillSlot = DAG.CreateStackTemporary(SlotVT);
   int FI = cast(SpillSlot)->getIndex();
diff --git a/llvm/test/CodeGen/SystemZ/frame-29.ll 
b/llvm/test/CodeGen/SystemZ/frame-29.ll
new file mode 100644
index 00..6cc0d9e985e160
--- /dev/null
+++ b/llvm/test/CodeGen/SystemZ/frame-29.ll
@@ -0,0 +1,18 @@
+; RUN: llc %s -o - -mtriple=s390x-linux-gnu -mcpu=z16 
-print-after=finalize-isel 2>&1 | FileCheck %s
+;
+; Test that the correct space is allocated for the outgoing stack argument.
+
+declare void @bar(i72 %Arg);
+
+define void @foo() {
+; CHECK-LABEL: # Machine code for function foo: IsSSA, TracksLiveness
+; CHECK-NEXT: Frame Objects:
+; CHECK-NEXT:   fi#0: size=1, align=2, at location [SP]
+; CHECK-NEXT:   fi#1: size=16, align=8, at location [SP]
+
+; CHECK-LABEL: foo:
+; CHECK: aghi %r15, -184
+  %1 = alloca i8, align 2
+  tail call fastcc void @bar(i72 2097168)
+  ret void
+}

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[llvm-branch-commits] [llvm] 9d51bd1 - [SystemZ] Use VT (not ArgVT) for SlotVT in LowerCall(). (#82475)

2024-02-26 Thread Tom Stellard via llvm-branch-commits

Author: Jonas Paulsson
Date: 2024-02-26T13:36:40-08:00
New Revision: 9d51bd1c2476ce334b3370c5f073e24427171e5f

URL: 
https://github.com/llvm/llvm-project/commit/9d51bd1c2476ce334b3370c5f073e24427171e5f
DIFF: 
https://github.com/llvm/llvm-project/commit/9d51bd1c2476ce334b3370c5f073e24427171e5f.diff

LOG: [SystemZ] Use VT (not ArgVT) for SlotVT in LowerCall(). (#82475)

When an integer argument is promoted and *not* split (like i72 -> i128 on
a new machine with vector support), the SlotVT should be i128, which is
stored in VT - not ArgVT.

Fixes #81417

(cherry picked from commit 9c0e45d7f0e2202e16dbd9a7b9f462e2bcb741ae)

Added: 
llvm/test/CodeGen/SystemZ/frame-29.ll

Modified: 
llvm/lib/Target/SystemZ/SystemZISelLowering.cpp

Removed: 




diff  --git a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp 
b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
index 19a4e9b0f17ce5..5db04a8bef824a 100644
--- a/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
@@ -1923,7 +1923,7 @@ SystemZTargetLowering::LowerCall(CallLoweringInfo &CLI,
 unsigned N = getNumRegistersForCallingConv(Ctx, CLI.CallConv, 
OrigArgVT);
 SlotVT = EVT::getIntegerVT(Ctx, PartVT.getSizeInBits() * N);
   } else {
-SlotVT = Outs[I].ArgVT;
+SlotVT = Outs[I].VT;
   }
   SDValue SpillSlot = DAG.CreateStackTemporary(SlotVT);
   int FI = cast(SpillSlot)->getIndex();

diff  --git a/llvm/test/CodeGen/SystemZ/frame-29.ll 
b/llvm/test/CodeGen/SystemZ/frame-29.ll
new file mode 100644
index 00..6cc0d9e985e160
--- /dev/null
+++ b/llvm/test/CodeGen/SystemZ/frame-29.ll
@@ -0,0 +1,18 @@
+; RUN: llc %s -o - -mtriple=s390x-linux-gnu -mcpu=z16 
-print-after=finalize-isel 2>&1 | FileCheck %s
+;
+; Test that the correct space is allocated for the outgoing stack argument.
+
+declare void @bar(i72 %Arg);
+
+define void @foo() {
+; CHECK-LABEL: # Machine code for function foo: IsSSA, TracksLiveness
+; CHECK-NEXT: Frame Objects:
+; CHECK-NEXT:   fi#0: size=1, align=2, at location [SP]
+; CHECK-NEXT:   fi#1: size=16, align=8, at location [SP]
+
+; CHECK-LABEL: foo:
+; CHECK: aghi %r15, -184
+  %1 = alloca i8, align 2
+  tail call fastcc void @bar(i72 2097168)
+  ret void
+}



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[llvm-branch-commits] [llvm] release/18.x: [SystemZ] Use VT (not ArgVT) for SlotVT in LowerCall(). (#82475) (PR #83021)

2024-02-26 Thread Tom Stellard via llvm-branch-commits

https://github.com/tstellar closed 
https://github.com/llvm/llvm-project/pull/83021
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[llvm-branch-commits] [llvm] [llvm][dfa-jump-threading] Allow DFAJumpThreading with optsize (PR #83049)

2024-02-26 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/83049

>From fc2e672d474442ef83e90c7a41265d6433651b63 Mon Sep 17 00:00:00 2001
From: Paul Kirth 
Date: Mon, 26 Feb 2024 21:42:24 +
Subject: [PATCH] Refactor option names, and update test

Created using spr 1.3.4
---
 llvm/lib/Passes/PassBuilderPipelines.cpp|  4 ++--
 llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp | 11 +--
 2 files changed, 7 insertions(+), 8 deletions(-)

diff --git a/llvm/lib/Passes/PassBuilderPipelines.cpp 
b/llvm/lib/Passes/PassBuilderPipelines.cpp
index e48a31f79cc0c5..9f81ff1899ac5f 100644
--- a/llvm/lib/Passes/PassBuilderPipelines.cpp
+++ b/llvm/lib/Passes/PassBuilderPipelines.cpp
@@ -222,8 +222,8 @@ static cl::opt
 EnableDFAJumpThreading("enable-dfa-jump-thread",
cl::desc("Enable DFA jump threading"),
cl::init(false), cl::Hidden);
-static cl::opt
-OptSizeDFAJumpThreading("optsize-dfa-jump-thread",
+extern cl::opt
+OptSizeDFAJumpThreading("dfa-jump-thread-optsize",
cl::desc("Enable DFA jump threading when optimizing 
for size"),
cl::init(false), cl::Hidden);
 
diff --git a/llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp 
b/llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp
index 9156d756310d14..ce5e823e531e0f 100644
--- a/llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp
+++ b/llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp
@@ -110,11 +110,10 @@ static cl::opt
   cl::desc("Maximum cost accepted for the transformation"),
   cl::Hidden, cl::init(50));
 
-static cl::opt
-IgnoreOptSize("dfa-jump-ignore-optsize",
-cl::desc("Enable dfa jump threading, even when optimizing 
for size"),
-cl::Hidden, cl::init(false));
-
+static cl::opt DFAJumpThreadIgnoreOptSize(
+"dfa-jump-ignore-optsize",
+cl::desc("Enable dfa jump threading, even when optimizing for size"),
+cl::Hidden, cl::init(false));
 
 namespace {
 
@@ -1250,7 +1249,7 @@ struct TransformDFA {
 bool DFAJumpThreading::run(Function &F) {
   LLVM_DEBUG(dbgs() << "\nDFA Jump threading: " << F.getName() << "\n");
 
-  if (!IgnoreOptSize && F.hasOptSize()) {
+  if (!DFAJumpThreadIgnoreOptSize && F.hasOptSize()) {
 LLVM_DEBUG(dbgs() << "Skipping due to the 'minsize' attribute\n");
 return false;
   }

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[llvm-branch-commits] [llvm] [llvm][dfa-jump-threading] Allow DFAJumpThreading with optsize (PR #83049)

2024-02-26 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi edited 
https://github.com/llvm/llvm-project/pull/83049
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[llvm-branch-commits] [llvm] release/18.x: [GVN] Drop nsw/nuw flags when replacing the result of a with.overflow intrinsic with a overflowing binary operator (#82935) (PR #82965)

2024-02-26 Thread via llvm-branch-commits

https://github.com/llvmbot updated 
https://github.com/llvm/llvm-project/pull/82965

>From 3aea3d2fd3996808ab39de0cf718b292a7d52a5f Mon Sep 17 00:00:00 2001
From: Yingwei Zheng 
Date: Mon, 26 Feb 2024 15:55:56 +0800
Subject: [PATCH] [GVN] Drop nsw/nuw flags when replacing the result of a
 with.overflow intrinsic with a overflowing binary operator (#82935)

Alive2: https://alive2.llvm.org/ce/z/gyL7mn
Fixes https://github.com/llvm/llvm-project/issues/82884.

(cherry picked from commit 892b4beeac50920e630f10905b2916295e2eb6d8)
---
 llvm/lib/Transforms/Utils/Local.cpp |  8 +++-
 llvm/test/Transforms/GVN/pr82884.ll | 21 +
 2 files changed, 28 insertions(+), 1 deletion(-)
 create mode 100644 llvm/test/Transforms/GVN/pr82884.ll

diff --git a/llvm/lib/Transforms/Utils/Local.cpp 
b/llvm/lib/Transforms/Utils/Local.cpp
index 459e3d98059283..a1c6bbc52fd05e 100644
--- a/llvm/lib/Transforms/Utils/Local.cpp
+++ b/llvm/lib/Transforms/Utils/Local.cpp
@@ -3369,11 +3369,17 @@ void llvm::patchReplacementInstruction(Instruction *I, 
Value *Repl) {
 
   // Patch the replacement so that it is not more restrictive than the value
   // being replaced.
+  WithOverflowInst *UnusedWO;
+  // When replacing the result of a llvm.*.with.overflow intrinsic with a
+  // overflowing binary operator, nuw/nsw flags may no longer hold.
+  if (isa(ReplInst) &&
+  match(I, m_ExtractValue<0>(m_WithOverflowInst(UnusedWO
+ReplInst->dropPoisonGeneratingFlags();
   // Note that if 'I' is a load being replaced by some operation,
   // for example, by an arithmetic operation, then andIRFlags()
   // would just erase all math flags from the original arithmetic
   // operation, which is clearly not wanted and not needed.
-  if (!isa(I))
+  else if (!isa(I))
 ReplInst->andIRFlags(I);
 
   // FIXME: If both the original and replacement value are part of the
diff --git a/llvm/test/Transforms/GVN/pr82884.ll 
b/llvm/test/Transforms/GVN/pr82884.ll
new file mode 100644
index 00..71abafda60d93d
--- /dev/null
+++ b/llvm/test/Transforms/GVN/pr82884.ll
@@ -0,0 +1,21 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 
UTC_ARGS: --version 4
+; RUN: opt -S -passes=gvn < %s | FileCheck %s
+
+; Make sure nsw/nuw flags are dropped.
+
+define i32 @pr82884(i32 %x) {
+; CHECK-LABEL: define i32 @pr82884(
+; CHECK-SAME: i32 [[X:%.*]]) {
+; CHECK-NEXT:[[MUL:%.*]] = mul i32 [[X]], [[X]]
+; CHECK-NEXT:call void @use(i32 [[MUL]])
+; CHECK-NEXT:[[MUL2:%.*]] = call { i32, i1 } 
@llvm.smul.with.overflow.i32(i32 [[X]], i32 [[X]])
+; CHECK-NEXT:ret i32 [[MUL]]
+;
+  %mul = mul nsw nuw i32 %x, %x
+  call void @use(i32 %mul)
+  %mul2 = call { i32, i1 } @llvm.smul.with.overflow.i32(i32 %x, i32 %x)
+  %ret = extractvalue { i32, i1 } %mul2, 0
+  ret i32 %ret
+}
+
+declare void @use(i32)

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[llvm-branch-commits] [llvm] 3aea3d2 - [GVN] Drop nsw/nuw flags when replacing the result of a with.overflow intrinsic with a overflowing binary operator (#82935)

2024-02-26 Thread Tom Stellard via llvm-branch-commits

Author: Yingwei Zheng
Date: 2024-02-26T13:43:35-08:00
New Revision: 3aea3d2fd3996808ab39de0cf718b292a7d52a5f

URL: 
https://github.com/llvm/llvm-project/commit/3aea3d2fd3996808ab39de0cf718b292a7d52a5f
DIFF: 
https://github.com/llvm/llvm-project/commit/3aea3d2fd3996808ab39de0cf718b292a7d52a5f.diff

LOG: [GVN] Drop nsw/nuw flags when replacing the result of a with.overflow 
intrinsic with a overflowing binary operator (#82935)

Alive2: https://alive2.llvm.org/ce/z/gyL7mn
Fixes https://github.com/llvm/llvm-project/issues/82884.

(cherry picked from commit 892b4beeac50920e630f10905b2916295e2eb6d8)

Added: 
llvm/test/Transforms/GVN/pr82884.ll

Modified: 
llvm/lib/Transforms/Utils/Local.cpp

Removed: 




diff  --git a/llvm/lib/Transforms/Utils/Local.cpp 
b/llvm/lib/Transforms/Utils/Local.cpp
index 459e3d98059283..a1c6bbc52fd05e 100644
--- a/llvm/lib/Transforms/Utils/Local.cpp
+++ b/llvm/lib/Transforms/Utils/Local.cpp
@@ -3369,11 +3369,17 @@ void llvm::patchReplacementInstruction(Instruction *I, 
Value *Repl) {
 
   // Patch the replacement so that it is not more restrictive than the value
   // being replaced.
+  WithOverflowInst *UnusedWO;
+  // When replacing the result of a llvm.*.with.overflow intrinsic with a
+  // overflowing binary operator, nuw/nsw flags may no longer hold.
+  if (isa(ReplInst) &&
+  match(I, m_ExtractValue<0>(m_WithOverflowInst(UnusedWO
+ReplInst->dropPoisonGeneratingFlags();
   // Note that if 'I' is a load being replaced by some operation,
   // for example, by an arithmetic operation, then andIRFlags()
   // would just erase all math flags from the original arithmetic
   // operation, which is clearly not wanted and not needed.
-  if (!isa(I))
+  else if (!isa(I))
 ReplInst->andIRFlags(I);
 
   // FIXME: If both the original and replacement value are part of the

diff  --git a/llvm/test/Transforms/GVN/pr82884.ll 
b/llvm/test/Transforms/GVN/pr82884.ll
new file mode 100644
index 00..71abafda60d93d
--- /dev/null
+++ b/llvm/test/Transforms/GVN/pr82884.ll
@@ -0,0 +1,21 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 
UTC_ARGS: --version 4
+; RUN: opt -S -passes=gvn < %s | FileCheck %s
+
+; Make sure nsw/nuw flags are dropped.
+
+define i32 @pr82884(i32 %x) {
+; CHECK-LABEL: define i32 @pr82884(
+; CHECK-SAME: i32 [[X:%.*]]) {
+; CHECK-NEXT:[[MUL:%.*]] = mul i32 [[X]], [[X]]
+; CHECK-NEXT:call void @use(i32 [[MUL]])
+; CHECK-NEXT:[[MUL2:%.*]] = call { i32, i1 } 
@llvm.smul.with.overflow.i32(i32 [[X]], i32 [[X]])
+; CHECK-NEXT:ret i32 [[MUL]]
+;
+  %mul = mul nsw nuw i32 %x, %x
+  call void @use(i32 %mul)
+  %mul2 = call { i32, i1 } @llvm.smul.with.overflow.i32(i32 %x, i32 %x)
+  %ret = extractvalue { i32, i1 } %mul2, 0
+  ret i32 %ret
+}
+
+declare void @use(i32)



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[llvm-branch-commits] [llvm] release/18.x: [GVN] Drop nsw/nuw flags when replacing the result of a with.overflow intrinsic with a overflowing binary operator (#82935) (PR #82965)

2024-02-26 Thread Tom Stellard via llvm-branch-commits

https://github.com/tstellar closed 
https://github.com/llvm/llvm-project/pull/82965
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[llvm-branch-commits] release/18.x: [FlattenCFG] Fix the miscompilation where phi nodes exist in the merge point (#81987) (PR #82925)

2024-02-26 Thread via llvm-branch-commits

https://github.com/llvmbot closed 
https://github.com/llvm/llvm-project/pull/82925
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[llvm-branch-commits] release/18.x: [FlattenCFG] Fix the miscompilation where phi nodes exist in the merge point (#81987) (PR #82925)

2024-02-26 Thread via llvm-branch-commits

https://github.com/llvmbot updated 
https://github.com/llvm/llvm-project/pull/82925


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[llvm-branch-commits] [llvm] a5b2e43 - [FlattenCFG] Fix the miscompilation where phi nodes exist in the merge point (#81987)

2024-02-26 Thread Tom Stellard via llvm-branch-commits

Author: Yingwei Zheng
Date: 2024-02-26T13:47:48-08:00
New Revision: a5b2e43ff0181f09eb52f4a2b6b6796a9517b645

URL: 
https://github.com/llvm/llvm-project/commit/a5b2e43ff0181f09eb52f4a2b6b6796a9517b645
DIFF: 
https://github.com/llvm/llvm-project/commit/a5b2e43ff0181f09eb52f4a2b6b6796a9517b645.diff

LOG: [FlattenCFG] Fix the miscompilation where phi nodes exist in the merge 
point (#81987)

When there are phi nodes in the merge point of the if-region, we cannot
do the merge.
Alive2: https://alive2.llvm.org/ce/z/DbgEan
Fixes #70900.

(cherry picked from commit f920b746ea818f1d21f317116cbb105e3e85979a)

Added: 


Modified: 
llvm/lib/Transforms/Utils/FlattenCFG.cpp
llvm/test/Transforms/Util/flattencfg.ll

Removed: 




diff  --git a/llvm/lib/Transforms/Utils/FlattenCFG.cpp 
b/llvm/lib/Transforms/Utils/FlattenCFG.cpp
index 1925b91c4da7ec..c5cb3748a52f8d 100644
--- a/llvm/lib/Transforms/Utils/FlattenCFG.cpp
+++ b/llvm/lib/Transforms/Utils/FlattenCFG.cpp
@@ -407,6 +407,10 @@ bool FlattenCFGOpt::CompareIfRegionBlock(BasicBlock 
*Block1, BasicBlock *Block2,
 /// form, by inverting the condition and the branch successors. The same
 /// approach goes for the opposite case.
 bool FlattenCFGOpt::MergeIfRegion(BasicBlock *BB, IRBuilder<> &Builder) {
+  // We cannot merge the if-region if the merge point has phi nodes.
+  if (isa(BB->front()))
+return false;
+
   BasicBlock *IfTrue2, *IfFalse2;
   BranchInst *DomBI2 = GetIfCondition(BB, IfTrue2, IfFalse2);
   if (!DomBI2)
@@ -493,16 +497,6 @@ bool FlattenCFGOpt::MergeIfRegion(BasicBlock *BB, 
IRBuilder<> &Builder) {
   PBI->replaceUsesOfWith(PBI->getCondition(), NC);
   Builder.SetInsertPoint(SaveInsertBB, SaveInsertPt);
 
-  // Handle PHI node to replace its predecessors to FirstEntryBlock.
-  for (BasicBlock *Succ : successors(PBI)) {
-for (PHINode &Phi : Succ->phis()) {
-  for (unsigned i = 0, e = Phi.getNumIncomingValues(); i != e; ++i) {
-if (Phi.getIncomingBlock(i) == SecondEntryBlock)
-  Phi.setIncomingBlock(i, FirstEntryBlock);
-  }
-}
-  }
-
   // Remove IfTrue1
   if (IfTrue1 != FirstEntryBlock) {
 IfTrue1->dropAllReferences();

diff  --git a/llvm/test/Transforms/Util/flattencfg.ll 
b/llvm/test/Transforms/Util/flattencfg.ll
index 4a4d4279f360d6..5f8dd981293345 100644
--- a/llvm/test/Transforms/Util/flattencfg.ll
+++ b/llvm/test/Transforms/Util/flattencfg.ll
@@ -77,13 +77,16 @@ define void @test_not_crash3(i32 %a) #0 {
 ; CHECK-SAME: (i32 [[A:%.*]]) {
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:[[A_EQ_0:%.*]] = icmp eq i32 [[A]], 0
+; CHECK-NEXT:br i1 [[A_EQ_0]], label [[BB0:%.*]], label [[BB1:%.*]]
+; CHECK:   bb0:
+; CHECK-NEXT:br label [[BB1]]
+; CHECK:   bb1:
 ; CHECK-NEXT:[[A_EQ_1:%.*]] = icmp eq i32 [[A]], 1
-; CHECK-NEXT:[[TMP0:%.*]] = or i1 [[A_EQ_0]], [[A_EQ_1]]
-; CHECK-NEXT:br i1 [[TMP0]], label [[BB2:%.*]], label [[BB3:%.*]]
+; CHECK-NEXT:br i1 [[A_EQ_1]], label [[BB2:%.*]], label [[BB3:%.*]]
 ; CHECK:   bb2:
 ; CHECK-NEXT:br label [[BB3]]
 ; CHECK:   bb3:
-; CHECK-NEXT:[[CHECK_BADREF:%.*]] = phi i32 [ 17, [[ENTRY:%.*]] ], [ 11, 
[[BB2]] ]
+; CHECK-NEXT:[[CHECK_BADREF:%.*]] = phi i32 [ 17, [[BB1]] ], [ 11, [[BB2]] 
]
 ; CHECK-NEXT:ret void
 ;
 entry:
@@ -278,9 +281,9 @@ define i1 @test_cond_multi_use(i32 %x, i32 %y, i32 %z) {
 ; CHECK-NEXT:  entry.x:
 ; CHECK-NEXT:[[CMP_X:%.*]] = icmp ne i32 [[X]], 0
 ; CHECK-NEXT:[[CMP_Y:%.*]] = icmp eq i32 [[Y]], 0
-; CHECK-NEXT:[[TMP0:%.*]] = xor i1 [[CMP_Y]], true
-; CHECK-NEXT:[[TMP1:%.*]] = or i1 [[CMP_X]], [[TMP0]]
-; CHECK-NEXT:br i1 [[TMP1]], label [[IF_THEN_Y:%.*]], label [[EXIT:%.*]]
+; CHECK-NEXT:[[CMP_Y_NOT:%.*]] = xor i1 [[CMP_Y]], true
+; CHECK-NEXT:[[TMP0:%.*]] = or i1 [[CMP_X]], [[CMP_Y_NOT]]
+; CHECK-NEXT:br i1 [[TMP0]], label [[IF_THEN_Y:%.*]], label [[EXIT:%.*]]
 ; CHECK:   if.then.y:
 ; CHECK-NEXT:store i32 [[Z]], ptr @g, align 4
 ; CHECK-NEXT:br label [[EXIT]]



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[llvm-branch-commits] [openmp] release/18.x: Fix build on musl by including stdint.h (#81434) (PR #82897)

2024-02-26 Thread via llvm-branch-commits

https://github.com/llvmbot updated 
https://github.com/llvm/llvm-project/pull/82897

>From c8b11e93004af9aa8bd8116e5cf01946546f0283 Mon Sep 17 00:00:00 2001
From: Daniel Martinez 
Date: Thu, 22 Feb 2024 21:14:27 +
Subject: [PATCH] Fix build on musl by including stdint.h (#81434)

openmp fails to build on musl since it lacks the defines for int32_t

Co-authored-by: Daniel Martinez 
(cherry picked from commit 45fe67dd61a6ac7df84d3a586e41c36a4767757f)
---
 openmp/libomptarget/include/Shared/SourceInfo.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/openmp/libomptarget/include/Shared/SourceInfo.h 
b/openmp/libomptarget/include/Shared/SourceInfo.h
index 7ce5fd43efc07f..711f06a04d017f 100644
--- a/openmp/libomptarget/include/Shared/SourceInfo.h
+++ b/openmp/libomptarget/include/Shared/SourceInfo.h
@@ -13,6 +13,7 @@
 #ifndef OMPTARGET_SHARED_SOURCE_INFO_H
 #define OMPTARGET_SHARED_SOURCE_INFO_H
 
+#include 
 #include 
 
 #ifdef _WIN32

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[llvm-branch-commits] [openmp] release/18.x: Fix build on musl by including stdint.h (#81434) (PR #82897)

2024-02-26 Thread Tom Stellard via llvm-branch-commits

https://github.com/tstellar closed 
https://github.com/llvm/llvm-project/pull/82897
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[llvm-branch-commits] [llvm] [llvm][dfa-jump-threading] Allow DFAJumpThreading with optsize (PR #83049)

2024-02-26 Thread Paul Kirth via llvm-branch-commits

https://github.com/ilovepi updated 
https://github.com/llvm/llvm-project/pull/83049

>From fc2e672d474442ef83e90c7a41265d6433651b63 Mon Sep 17 00:00:00 2001
From: Paul Kirth 
Date: Mon, 26 Feb 2024 21:42:24 +
Subject: [PATCH 1/2] Refactor option names, and update test

Created using spr 1.3.4
---
 llvm/lib/Passes/PassBuilderPipelines.cpp|  4 ++--
 llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp | 11 +--
 2 files changed, 7 insertions(+), 8 deletions(-)

diff --git a/llvm/lib/Passes/PassBuilderPipelines.cpp 
b/llvm/lib/Passes/PassBuilderPipelines.cpp
index e48a31f79cc0c5..9f81ff1899ac5f 100644
--- a/llvm/lib/Passes/PassBuilderPipelines.cpp
+++ b/llvm/lib/Passes/PassBuilderPipelines.cpp
@@ -222,8 +222,8 @@ static cl::opt
 EnableDFAJumpThreading("enable-dfa-jump-thread",
cl::desc("Enable DFA jump threading"),
cl::init(false), cl::Hidden);
-static cl::opt
-OptSizeDFAJumpThreading("optsize-dfa-jump-thread",
+extern cl::opt
+OptSizeDFAJumpThreading("dfa-jump-thread-optsize",
cl::desc("Enable DFA jump threading when optimizing 
for size"),
cl::init(false), cl::Hidden);
 
diff --git a/llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp 
b/llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp
index 9156d756310d14..ce5e823e531e0f 100644
--- a/llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp
+++ b/llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp
@@ -110,11 +110,10 @@ static cl::opt
   cl::desc("Maximum cost accepted for the transformation"),
   cl::Hidden, cl::init(50));
 
-static cl::opt
-IgnoreOptSize("dfa-jump-ignore-optsize",
-cl::desc("Enable dfa jump threading, even when optimizing 
for size"),
-cl::Hidden, cl::init(false));
-
+static cl::opt DFAJumpThreadIgnoreOptSize(
+"dfa-jump-ignore-optsize",
+cl::desc("Enable dfa jump threading, even when optimizing for size"),
+cl::Hidden, cl::init(false));
 
 namespace {
 
@@ -1250,7 +1249,7 @@ struct TransformDFA {
 bool DFAJumpThreading::run(Function &F) {
   LLVM_DEBUG(dbgs() << "\nDFA Jump threading: " << F.getName() << "\n");
 
-  if (!IgnoreOptSize && F.hasOptSize()) {
+  if (!DFAJumpThreadIgnoreOptSize && F.hasOptSize()) {
 LLVM_DEBUG(dbgs() << "Skipping due to the 'minsize' attribute\n");
 return false;
   }

>From ffaa39b064da4d99e1834102ddbb38f0780e4ae7 Mon Sep 17 00:00:00 2001
From: Paul Kirth 
Date: Mon, 26 Feb 2024 21:55:44 +
Subject: [PATCH 2/2] Make variable static + rename

Created using spr 1.3.4
---
 llvm/lib/Passes/PassBuilderPipelines.cpp | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/llvm/lib/Passes/PassBuilderPipelines.cpp 
b/llvm/lib/Passes/PassBuilderPipelines.cpp
index 9f81ff1899ac5f..a4db4614c6f830 100644
--- a/llvm/lib/Passes/PassBuilderPipelines.cpp
+++ b/llvm/lib/Passes/PassBuilderPipelines.cpp
@@ -222,8 +222,8 @@ static cl::opt
 EnableDFAJumpThreading("enable-dfa-jump-thread",
cl::desc("Enable DFA jump threading"),
cl::init(false), cl::Hidden);
-extern cl::opt
-OptSizeDFAJumpThreading("dfa-jump-thread-optsize",
+static cl::opt
+DFAJumpThreadingOptSize("dfa-jump-thread-optsize",
cl::desc("Enable DFA jump threading when optimizing 
for size"),
cl::init(false), cl::Hidden);
 
@@ -723,7 +723,7 @@ 
PassBuilder::buildFunctionSimplificationPipeline(OptimizationLevel Level,
   // Re-consider control flow based optimizations after redundancy elimination,
   // redo DCE, etc.
   if (EnableDFAJumpThreading &&
-  ((Level.getSizeLevel() == 0) || OptSizeDFAJumpThreading))
+  ((Level.getSizeLevel() == 0) || DFAJumpThreadingOptSize))
 FPM.addPass(DFAJumpThreadingPass());
 
   FPM.addPass(JumpThreadingPass());

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[llvm-branch-commits] [openmp] c8b11e9 - Fix build on musl by including stdint.h (#81434)

2024-02-26 Thread Tom Stellard via llvm-branch-commits

Author: Daniel Martinez
Date: 2024-02-26T13:55:13-08:00
New Revision: c8b11e93004af9aa8bd8116e5cf01946546f0283

URL: 
https://github.com/llvm/llvm-project/commit/c8b11e93004af9aa8bd8116e5cf01946546f0283
DIFF: 
https://github.com/llvm/llvm-project/commit/c8b11e93004af9aa8bd8116e5cf01946546f0283.diff

LOG: Fix build on musl by including stdint.h (#81434)

openmp fails to build on musl since it lacks the defines for int32_t

Co-authored-by: Daniel Martinez 
(cherry picked from commit 45fe67dd61a6ac7df84d3a586e41c36a4767757f)

Added: 


Modified: 
openmp/libomptarget/include/Shared/SourceInfo.h

Removed: 




diff  --git a/openmp/libomptarget/include/Shared/SourceInfo.h 
b/openmp/libomptarget/include/Shared/SourceInfo.h
index 7ce5fd43efc07f..711f06a04d017f 100644
--- a/openmp/libomptarget/include/Shared/SourceInfo.h
+++ b/openmp/libomptarget/include/Shared/SourceInfo.h
@@ -13,6 +13,7 @@
 #ifndef OMPTARGET_SHARED_SOURCE_INFO_H
 #define OMPTARGET_SHARED_SOURCE_INFO_H
 
+#include 
 #include 
 
 #ifdef _WIN32



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[llvm-branch-commits] [llvm] release/18.x: [llvm-shlib] Change libLLVM-$MAJOR.so symlink to point to versioned SO (#82660) (PR #83067)

2024-02-26 Thread via llvm-branch-commits

https://github.com/llvmbot created 
https://github.com/llvm/llvm-project/pull/83067

Backport 10c48a772742b7afe665a815b7eba2047f17dc4b

Requested by: @tstellar

>From c429fbcf835b132f7303676f7a77b6bc3c063bc6 Mon Sep 17 00:00:00 2001
From: Tom Stellard 
Date: Fri, 23 Feb 2024 15:58:32 -0800
Subject: [PATCH] [llvm-shlib] Change libLLVM-$MAJOR.so symlink to point to
 versioned SO (#82660)

This symlink was added in 91a384621e5b762d9c173ffd247cfeadd5f436a2 to
maintain backwards compatibility, but it needs to point to
libLLVM.so.$MAJOR.$MINOR rather than libLLVM.so. This works better for
distros that ship libLLVM.so and libLLVM.so.$MAJOR.$MINOR in separate
packages and also prevents mistakes like
libLLVM-19.so -> libLLVM.so -> libLLVM.so.18.1

Fixes #82647

(cherry picked from commit 10c48a772742b7afe665a815b7eba2047f17dc4b)
---
 llvm/cmake/modules/AddLLVM.cmake | 8 ++--
 llvm/tools/llvm-shlib/CMakeLists.txt | 4 ++--
 2 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/llvm/cmake/modules/AddLLVM.cmake b/llvm/cmake/modules/AddLLVM.cmake
index 5fc663d10b8f77..3bc78b0dc9355a 100644
--- a/llvm/cmake/modules/AddLLVM.cmake
+++ b/llvm/cmake/modules/AddLLVM.cmake
@@ -2074,7 +2074,7 @@ function(add_lit_testsuites project directory)
 endfunction()
 
 function(llvm_install_library_symlink name dest type)
-  cmake_parse_arguments(ARG "" "COMPONENT" "" ${ARGN})
+  cmake_parse_arguments(ARG "" "COMPONENT;SOVERSION" "" ${ARGN})
   foreach(path ${CMAKE_MODULE_PATH})
 if(EXISTS ${path}/LLVMInstallSymlink.cmake)
   set(INSTALL_SYMLINK ${path}/LLVMInstallSymlink.cmake)
@@ -2088,7 +2088,11 @@ function(llvm_install_library_symlink name dest type)
   endif()
 
   set(full_name 
${CMAKE_${type}_LIBRARY_PREFIX}${name}${CMAKE_${type}_LIBRARY_SUFFIX})
-  set(full_dest 
${CMAKE_${type}_LIBRARY_PREFIX}${dest}${CMAKE_${type}_LIBRARY_SUFFIX})
+  if (ARG_SOVERSION)
+set(full_dest 
${CMAKE_${type}_LIBRARY_PREFIX}${dest}${CMAKE_${type}_LIBRARY_SUFFIX}.${ARG_SOVERSION})
+  else()
+set(full_dest 
${CMAKE_${type}_LIBRARY_PREFIX}${dest}${CMAKE_${type}_LIBRARY_SUFFIX})
+  endif()
 
   if(LLVM_USE_SYMLINKS)
 set(LLVM_LINK_OR_COPY create_symlink)
diff --git a/llvm/tools/llvm-shlib/CMakeLists.txt 
b/llvm/tools/llvm-shlib/CMakeLists.txt
index 09c15e304614c4..eba1672faee7fa 100644
--- a/llvm/tools/llvm-shlib/CMakeLists.txt
+++ b/llvm/tools/llvm-shlib/CMakeLists.txt
@@ -35,8 +35,8 @@ if(LLVM_BUILD_LLVM_DYLIB)
   endif()
   add_llvm_library(LLVM SHARED DISABLE_LLVM_LINK_LLVM_DYLIB OUTPUT_NAME LLVM 
${INSTALL_WITH_TOOLCHAIN} ${SOURCES})
   # Add symlink for backwards compatibility with old library name
-  get_target_property(LLVM_DYLIB_FILENAME LLVM OUTPUT_NAME)
-  
llvm_install_library_symlink(LLVM-${LLVM_VERSION_MAJOR}${LLVM_VERSION_SUFFIX} 
${LLVM_DYLIB_FILENAME} SHARED COMPONENT LLVM)
+  get_target_property(LLVM_DYLIB_SOVERSION LLVM SOVERSION)
+  
llvm_install_library_symlink(LLVM-${LLVM_VERSION_MAJOR}${LLVM_VERSION_SUFFIX} 
LLVM SHARED COMPONENT LLVM SOVERSION ${LLVM_DYLIB_SOVERSION})
 
   list(REMOVE_DUPLICATES LIB_NAMES)
   if("${CMAKE_SYSTEM_NAME}" STREQUAL "Darwin")

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[llvm-branch-commits] [llvm] release/18.x: [llvm-shlib] Change libLLVM-$MAJOR.so symlink to point to versioned SO (#82660) (PR #83067)

2024-02-26 Thread via llvm-branch-commits

https://github.com/llvmbot milestoned 
https://github.com/llvm/llvm-project/pull/83067
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[llvm-branch-commits] [llvm] release/18.x: [llvm-shlib] Change libLLVM-$MAJOR.so symlink to point to versioned SO (#82660) (PR #83067)

2024-02-26 Thread via llvm-branch-commits

llvmbot wrote:

@nikic What do you think about merging this PR to the release branch?

https://github.com/llvm/llvm-project/pull/83067
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[llvm-branch-commits] [clang] [llvm] release/18.x: [AArch64] Backport Ampere1B support (#81297 , #81341, and #81744) (PR #81857)

2024-02-26 Thread Tom Stellard via llvm-branch-commits

tstellar wrote:

I've decided to merge this.  A feature like this that is self-contained in a 
single backend is inline with the kind of changes I've merged before during the 
RC phase.  If this were some other feature, with a wider impact, it probably 
wouldn't be accepted.


https://github.com/llvm/llvm-project/pull/81857
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[llvm-branch-commits] [llvm] [VPlan] Explicitly handle scalar pointer inductions. (PR #80273)

2024-02-26 Thread Florian Hahn via llvm-branch-commits

fhahn wrote:

@ayalz unfortunately I don't know how to update the target branch to 
`llvm:main`, so I went ahead and opened a new PR that's update on top of 
current `main`: https://github.com/llvm/llvm-project/pull/83068

Comments should be addressed, sorry for the inconvenience.

https://github.com/llvm/llvm-project/pull/80273
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[llvm-branch-commits] [llvm] [llvm][dfa-jump-threading] Allow DFAJumpThreading with optsize (PR #83049)

2024-02-26 Thread Paul Kirth via llvm-branch-commits


@@ -222,6 +222,11 @@ static cl::opt
 EnableDFAJumpThreading("enable-dfa-jump-thread",
cl::desc("Enable DFA jump threading"),
cl::init(false), cl::Hidden);
+static cl::opt
+DFAJumpThreadingOptSize("dfa-jump-thread-optsize",
+   cl::desc("Enable DFA jump threading when optimizing 
for size"),
+   cl::init(false), cl::Hidden);
+

ilovepi wrote:

Its rather unfortunate that we need 2 flags to enable a single behavior ... Is 
there a common place we can put this flag and use it here and in 
`DFAJumpThreading.cpp`?

https://github.com/llvm/llvm-project/pull/83049
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[llvm-branch-commits] [llvm] [llvm][dfa-jump-threading] Allow DFAJumpThreading with optsize (PR #83049)

2024-02-26 Thread Paul Kirth via llvm-branch-commits

ilovepi wrote:

cc: @petrhosek @PiJoules since I think they're interested.

https://github.com/llvm/llvm-project/pull/83049
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[llvm-branch-commits] [llvm] [llvm][dfa-jump-threading] Allow DFAJumpThreading with optsize (PR #83049)

2024-02-26 Thread Arthur Eubanks via llvm-branch-commits

aeubanks wrote:

Can we have a more principled approach to determine when to allow this pass to 
run than a `cl::opt`? For example, change the `CostThreshold` in the pass 
depending on whether or not the function has `optsize`.

https://github.com/llvm/llvm-project/pull/83049
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[llvm-branch-commits] [compiler-rt] 2868743 - Revert "[scudo] Store more blocks in each TransferBatch (#70390)"

2024-02-26 Thread via llvm-branch-commits

Author: ChiaHungDuan
Date: 2024-02-26T14:47:26-08:00
New Revision: 28687438f2340c934afec640c9c6ac718720f0ef

URL: 
https://github.com/llvm/llvm-project/commit/28687438f2340c934afec640c9c6ac718720f0ef
DIFF: 
https://github.com/llvm/llvm-project/commit/28687438f2340c934afec640c9c6ac718720f0ef.diff

LOG: Revert "[scudo] Store more blocks in each TransferBatch (#70390)"

This reverts commit 1865c7ea8561407626fe5489ae07647035413d7c.

Added: 


Modified: 
compiler-rt/lib/scudo/standalone/allocator_common.h
compiler-rt/lib/scudo/standalone/primary32.h
compiler-rt/lib/scudo/standalone/primary64.h
compiler-rt/lib/scudo/standalone/tests/primary_test.cpp

Removed: 




diff  --git a/compiler-rt/lib/scudo/standalone/allocator_common.h 
b/compiler-rt/lib/scudo/standalone/allocator_common.h
index 46dc7c0f3b914e..95f4776ac596dc 100644
--- a/compiler-rt/lib/scudo/standalone/allocator_common.h
+++ b/compiler-rt/lib/scudo/standalone/allocator_common.h
@@ -40,7 +40,6 @@ template  struct TransferBatch {
 B->Count = static_cast(B->Count - N);
   }
   void clear() { Count = 0; }
-  bool empty() { return Count == 0; }
   void add(CompactPtrT P) {
 DCHECK_LT(Count, MaxNumCached);
 Batch[Count++] = P;
@@ -49,12 +48,6 @@ template  struct TransferBatch {
 memcpy(Array, Batch, sizeof(Batch[0]) * Count);
 clear();
   }
-
-  void moveNToArray(CompactPtrT *Array, u16 N) {
-DCHECK_LE(N, Count);
-memcpy(Array, Batch + Count - N, sizeof(Batch[0]) * Count);
-Count -= N;
-  }
   u16 getCount() const { return Count; }
   bool isEmpty() const { return Count == 0U; }
   CompactPtrT get(u16 I) const {

diff  --git a/compiler-rt/lib/scudo/standalone/primary32.h 
b/compiler-rt/lib/scudo/standalone/primary32.h
index c86e75b8fd66a8..4d03b282d000de 100644
--- a/compiler-rt/lib/scudo/standalone/primary32.h
+++ b/compiler-rt/lib/scudo/standalone/primary32.h
@@ -191,21 +191,38 @@ template  class SizeClassAllocator32 {
 return BlockSize > PageSize;
   }
 
+  // Note that the `MaxBlockCount` will be used when we support arbitrary 
blocks
+  // count. Now it's the same as the number of blocks stored in the
+  // `TransferBatch`.
   u16 popBlocks(CacheT *C, uptr ClassId, CompactPtrT *ToArray,
-const u16 MaxBlockCount) {
+UNUSED const u16 MaxBlockCount) {
+TransferBatchT *B = popBatch(C, ClassId);
+if (!B)
+  return 0;
+
+const u16 Count = B->getCount();
+DCHECK_GT(Count, 0U);
+B->moveToArray(ToArray);
+
+if (ClassId != SizeClassMap::BatchClassId)
+  C->deallocate(SizeClassMap::BatchClassId, B);
+
+return Count;
+  }
+
+  TransferBatchT *popBatch(CacheT *C, uptr ClassId) {
 DCHECK_LT(ClassId, NumClasses);
 SizeClassInfo *Sci = getSizeClassInfo(ClassId);
 ScopedLock L(Sci->Mutex);
-
-u16 PopCount = popBlocksImpl(C, ClassId, Sci, ToArray, MaxBlockCount);
-if (UNLIKELY(PopCount == 0)) {
+TransferBatchT *B = popBatchImpl(C, ClassId, Sci);
+if (UNLIKELY(!B)) {
   if (UNLIKELY(!populateFreeList(C, ClassId, Sci)))
-return 0U;
-  PopCount = popBlocksImpl(C, ClassId, Sci, ToArray, MaxBlockCount);
-  DCHECK_NE(PopCount, 0U);
+return nullptr;
+  B = popBatchImpl(C, ClassId, Sci);
+  // if `populateFreeList` succeeded, we are supposed to get free blocks.
+  DCHECK_NE(B, nullptr);
 }
-
-return PopCount;
+return B;
   }
 
   // Push the array of free blocks to the designated batch group.
@@ -493,7 +510,7 @@ template  class SizeClassAllocator32 {
 // by TransferBatch is also free for use. We don't need to recycle the
 // TransferBatch. Note that the correctness is maintained by the invariant,
 //
-//   Each popBlocks() request returns the entire TransferBatch. Returning
+//   The unit of each popBatch() request is entire TransferBatch. Return
 //   part of the blocks in a TransferBatch is invalid.
 //
 // This ensures that TransferBatch won't leak the address itself while it's
@@ -617,7 +634,7 @@ template  class SizeClassAllocator32 {
   BG->Batches.push_front(TB);
   BG->PushedBlocks = 0;
   BG->BytesInBGAtLastCheckpoint = 0;
-  BG->MaxCachedPerBatch = TransferBatchT::MaxNumCached;
+  BG->MaxCachedPerBatch = CacheT::getMaxCached(getSizeByClassId(ClassId));
 
   return BG;
 };
@@ -709,11 +726,14 @@ template  class SizeClassAllocator32 {
 InsertBlocks(Cur, Array + Size - Count, Count);
   }
 
-  u16 popBlocksImpl(CacheT *C, uptr ClassId, SizeClassInfo *Sci,
-CompactPtrT *ToArray, const u16 MaxBlockCount)
+  // Pop one TransferBatch from a BatchGroup. The BatchGroup with the smallest
+  // group id will be considered first.
+  //
+  // The region mutex needs to be held while calling this method.
+  TransferBatchT *popBatchImpl(CacheT *C, uptr ClassId, SizeClassInfo *Sci)
   REQUIRES(Sci->Mutex) {
 if 

[llvm-branch-commits] [llvm] [llvm][dfa-jump-threading] Allow DFAJumpThreading with optsize (PR #83049)

2024-02-26 Thread Paul Kirth via llvm-branch-commits

ilovepi wrote:

> Can we have a more principled approach to determine when to allow this pass 
> to run than a `cl::opt`? For example, change the `CostThreshold` in the pass 
> depending on whether or not the function has `optsize`.

Sure. I can take a look at doing it that way instead. it will probably be much 
cleaner.

https://github.com/llvm/llvm-project/pull/83049
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[llvm-branch-commits] [clang] release/18.x: [clang][CodeGen] Keep processing the rest of AST after encountering unsupported MC/DC expressions (#82464) (PR #82866)

2024-02-26 Thread via llvm-branch-commits

https://github.com/llvmbot updated 
https://github.com/llvm/llvm-project/pull/82866

>From 9274829eb689c261aecf7b100561594385816b0b Mon Sep 17 00:00:00 2001
From: Wentao Zhang <35722712+whentoj...@users.noreply.github.com>
Date: Thu, 22 Feb 2024 16:04:25 -0600
Subject: [PATCH] [clang][CodeGen] Keep processing the rest of AST after
 encountering unsupported MC/DC expressions (#82464)

Currently, upon seeing unsupported decisions (more than 6 conditions, or
split nesting), the post-visitor hook dataTraverseStmtPost() returns a
false. As a result, in the rest of tree even supported decisions will
be skipped as well. Like in the below code:

{ // CompoundStmt
  a && b;   // 1: BinaryOperator (supported)
  a && foo(b && c); // 2: BinaryOperator (not yet supported due to split
//nesting)
  a && b;   // 3: BinaryOperator (supported)
}

Decision 3 will not be processed at all. And only one "Decision" region
will be emitted. Compiler explorer example:
https://godbolt.org/z/Px61sesoo

We hope to process such cases and emit two "Decision" regions (1 and 3)
in the above example.

(cherry picked from commit d4bfca3b2e673789f7c278d46a199ae8910ddd37)
---
 clang/lib/CodeGen/CodeGenPGO.cpp | 11 +++
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/clang/lib/CodeGen/CodeGenPGO.cpp b/clang/lib/CodeGen/CodeGenPGO.cpp
index 5d7c3847745762..fb4e86e8bd8053 100644
--- a/clang/lib/CodeGen/CodeGenPGO.cpp
+++ b/clang/lib/CodeGen/CodeGenPGO.cpp
@@ -240,9 +240,12 @@ struct MapRegionCounters : public 
RecursiveASTVisitor {
 if (MCDCMaxCond == 0)
   return true;
 
-/// At the top of the logical operator nest, reset the number of 
conditions.
-if (LogOpStack.empty())
+/// At the top of the logical operator nest, reset the number of 
conditions,
+/// also forget previously seen split nesting cases.
+if (LogOpStack.empty()) {
   NumCond = 0;
+  SplitNestedLogicalOp = false;
+}
 
 if (const Expr *E = dyn_cast(S)) {
   const BinaryOperator *BinOp = 
dyn_cast(E->IgnoreParens());
@@ -293,7 +296,7 @@ struct MapRegionCounters : public 
RecursiveASTVisitor {
 "contains an operation with a nested boolean expression. "
 "Expression will not be covered");
 Diag.Report(S->getBeginLoc(), DiagID);
-return false;
+return true;
   }
 
   /// Was the maximum number of conditions encountered?
@@ -304,7 +307,7 @@ struct MapRegionCounters : public 
RecursiveASTVisitor {
 "number of conditions (%0) exceeds max (%1). "
 "Expression will not be covered");
 Diag.Report(S->getBeginLoc(), DiagID) << NumCond << MCDCMaxCond;
-return false;
+return true;
   }
 
   // Otherwise, allocate the number of bytes required for the bitmap

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[llvm-branch-commits] [clang] 9274829 - [clang][CodeGen] Keep processing the rest of AST after encountering unsupported MC/DC expressions (#82464)

2024-02-26 Thread Tom Stellard via llvm-branch-commits

Author: Wentao Zhang
Date: 2024-02-26T15:09:20-08:00
New Revision: 9274829eb689c261aecf7b100561594385816b0b

URL: 
https://github.com/llvm/llvm-project/commit/9274829eb689c261aecf7b100561594385816b0b
DIFF: 
https://github.com/llvm/llvm-project/commit/9274829eb689c261aecf7b100561594385816b0b.diff

LOG: [clang][CodeGen] Keep processing the rest of AST after encountering 
unsupported MC/DC expressions (#82464)

Currently, upon seeing unsupported decisions (more than 6 conditions, or
split nesting), the post-visitor hook dataTraverseStmtPost() returns a
false. As a result, in the rest of tree even supported decisions will
be skipped as well. Like in the below code:

{ // CompoundStmt
  a && b;   // 1: BinaryOperator (supported)
  a && foo(b && c); // 2: BinaryOperator (not yet supported due to split
//nesting)
  a && b;   // 3: BinaryOperator (supported)
}

Decision 3 will not be processed at all. And only one "Decision" region
will be emitted. Compiler explorer example:
https://godbolt.org/z/Px61sesoo

We hope to process such cases and emit two "Decision" regions (1 and 3)
in the above example.

(cherry picked from commit d4bfca3b2e673789f7c278d46a199ae8910ddd37)

Added: 


Modified: 
clang/lib/CodeGen/CodeGenPGO.cpp

Removed: 




diff  --git a/clang/lib/CodeGen/CodeGenPGO.cpp 
b/clang/lib/CodeGen/CodeGenPGO.cpp
index 5d7c3847745762..fb4e86e8bd8053 100644
--- a/clang/lib/CodeGen/CodeGenPGO.cpp
+++ b/clang/lib/CodeGen/CodeGenPGO.cpp
@@ -240,9 +240,12 @@ struct MapRegionCounters : public 
RecursiveASTVisitor {
 if (MCDCMaxCond == 0)
   return true;
 
-/// At the top of the logical operator nest, reset the number of 
conditions.
-if (LogOpStack.empty())
+/// At the top of the logical operator nest, reset the number of 
conditions,
+/// also forget previously seen split nesting cases.
+if (LogOpStack.empty()) {
   NumCond = 0;
+  SplitNestedLogicalOp = false;
+}
 
 if (const Expr *E = dyn_cast(S)) {
   const BinaryOperator *BinOp = 
dyn_cast(E->IgnoreParens());
@@ -293,7 +296,7 @@ struct MapRegionCounters : public 
RecursiveASTVisitor {
 "contains an operation with a nested boolean expression. "
 "Expression will not be covered");
 Diag.Report(S->getBeginLoc(), DiagID);
-return false;
+return true;
   }
 
   /// Was the maximum number of conditions encountered?
@@ -304,7 +307,7 @@ struct MapRegionCounters : public 
RecursiveASTVisitor {
 "number of conditions (%0) exceeds max (%1). "
 "Expression will not be covered");
 Diag.Report(S->getBeginLoc(), DiagID) << NumCond << MCDCMaxCond;
-return false;
+return true;
   }
 
   // Otherwise, allocate the number of bytes required for the bitmap



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[llvm-branch-commits] [clang] release/18.x: [clang][CodeGen] Keep processing the rest of AST after encountering unsupported MC/DC expressions (#82464) (PR #82866)

2024-02-26 Thread Tom Stellard via llvm-branch-commits

https://github.com/tstellar closed 
https://github.com/llvm/llvm-project/pull/82866
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[llvm-branch-commits] [llvm] d1a1d7a - [llvm][AArch64] Do not inline a function with different signing scheme. (#80642) (#82743)

2024-02-26 Thread via llvm-branch-commits

Author: Dani
Date: 2024-02-26T15:13:43-08:00
New Revision: d1a1d7afb1fbe7c2cf712a124a2f231ba22103f2

URL: 
https://github.com/llvm/llvm-project/commit/d1a1d7afb1fbe7c2cf712a124a2f231ba22103f2
DIFF: 
https://github.com/llvm/llvm-project/commit/d1a1d7afb1fbe7c2cf712a124a2f231ba22103f2.diff

LOG: [llvm][AArch64] Do not inline a function with different signing scheme. 
(#80642) (#82743)

f the signing scheme is different that maybe the functions assumes
different behaviours and dangerous to inline them without analysing
them. This should be a rare case.

Added: 
llvm/test/Transforms/Inline/inline-sign-return-address.ll

Modified: 
llvm/include/llvm/IR/Attributes.td
llvm/lib/IR/Attributes.cpp
llvm/utils/TableGen/Attributes.cpp

Removed: 




diff  --git a/llvm/include/llvm/IR/Attributes.td 
b/llvm/include/llvm/IR/Attributes.td
index 864f87f3383891..d22eb76d2292d5 100644
--- a/llvm/include/llvm/IR/Attributes.td
+++ b/llvm/include/llvm/IR/Attributes.td
@@ -339,14 +339,26 @@ def UseSampleProfile : StrBoolAttr<"use-sample-profile">;
 def DenormalFPMath : ComplexStrAttr<"denormal-fp-math", [FnAttr]>;
 def DenormalFPMathF32 : ComplexStrAttr<"denormal-fp-math-f32", [FnAttr]>;
 
+// Attribute compatiblity rules are generated to check the attribute of the
+// caller and callee and decide whether inlining should be allowed. CompatRule
+// and child classes are used for the rule generation. CompatRule takes only a
+// compare function which could be templated with the attribute type.
+// CompatRuleStrAttr takes the compare function and the string attribute for
+// checking compatibility for inline substitution.
 class CompatRule {
-  // The name of the function called to check the attribute of the caller and
-  // callee and decide whether inlining should be allowed. The function's
-  // signature must match "bool(const Function&, const Function &)", where the
-  // first parameter is the reference to the caller and the second parameter is
-  // the reference to the callee. It must return false if the attributes of the
-  // caller and callee are incompatible, and true otherwise.
+  // The function's signature must match "bool(const Function&, const
+  // Function&)", where the first parameter is the reference to the caller and
+  // the second parameter is the reference to the callee. It must return false
+  // if the attributes of the caller and callee are incompatible, and true
+  // otherwise.
   string CompatFunc = F;
+  string AttrName = "";
+}
+
+class CompatRuleStrAttr : CompatRule {
+  // The checker function is extended with an third argument as the function
+  // attribute string "bool(const Function&, const Function&, const 
StringRef&)".
+  string AttrName = Attr;
 }
 
 def : CompatRule<"isEqual">;
@@ -359,7 +371,9 @@ def : CompatRule<"isEqual">;
 def : CompatRule<"isEqual">;
 def : CompatRule<"isEqual">;
 def : CompatRule<"checkDenormMode">;
-
+def : CompatRuleStrAttr<"isEqual", "sign-return-address">;
+def : CompatRuleStrAttr<"isEqual", "sign-return-address-key">;
+def : CompatRuleStrAttr<"isEqual", "branch-protection-pauth-lr">;
 
 class MergeRule {
   // The name of the function called to merge the attributes of the caller and

diff  --git a/llvm/lib/IR/Attributes.cpp b/llvm/lib/IR/Attributes.cpp
index fd5160209506f2..19076771ff2eaf 100644
--- a/llvm/lib/IR/Attributes.cpp
+++ b/llvm/lib/IR/Attributes.cpp
@@ -2045,6 +2045,11 @@ static bool isEqual(const Function &Caller, const 
Function &Callee) {
  Callee.getFnAttribute(AttrClass::getKind());
 }
 
+static bool isEqual(const Function &Caller, const Function &Callee,
+const StringRef &AttrName) {
+  return Caller.getFnAttribute(AttrName) == Callee.getFnAttribute(AttrName);
+}
+
 /// Compute the logical AND of the attributes of the caller and the
 /// callee.
 ///

diff  --git a/llvm/test/Transforms/Inline/inline-sign-return-address.ll 
b/llvm/test/Transforms/Inline/inline-sign-return-address.ll
new file mode 100644
index 00..c4d85fa671a4f6
--- /dev/null
+++ b/llvm/test/Transforms/Inline/inline-sign-return-address.ll
@@ -0,0 +1,104 @@
+; Check the inliner doesn't inline a function with 
diff erent sign return address schemes.
+; RUN: opt < %s -passes=inline -S | FileCheck %s
+
+define internal void @foo_all() #0 {
+  ret void
+}
+
+define internal void @foo_nonleaf() #1 {
+  ret void
+}
+
+define internal void @foo_none() #2 {
+  ret void
+}
+
+define internal void @foo_lr() #3 {
+  ret void
+}
+
+define internal void @foo_bkey() #4 {
+  ret void
+}
+
+define dso_local void @bar_all() #0 {
+; CHECK-LABEL: bar_all
+; CHECK-NOT: call void @foo_all()
+; CHECK-NEXT:call void @foo_nonleaf()
+; CHECK-NEXT:call void @foo_none()
+; CHECK-NEXT:call void @foo_lr()
+; CHECK-NEXT:call void @foo_bkey()
+  call void @foo_all()
+  call void @foo_nonleaf()
+  call void @foo_none()
+  call void @foo_lr()
+  call void

[llvm-branch-commits] [llvm] [llvm][AArch64] Do not inline a function with different signing scheme. (#80642) (PR #82743)

2024-02-26 Thread Tom Stellard via llvm-branch-commits

https://github.com/tstellar closed 
https://github.com/llvm/llvm-project/pull/82743
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[llvm-branch-commits] [llvm] 4cc7a75 - [llvm-shlib] Change libLLVM-$MAJOR.so symlink to point to versioned SO (#82660)

2024-02-26 Thread Tom Stellard via llvm-branch-commits

Author: Tom Stellard
Date: 2024-02-26T16:57:21-08:00
New Revision: 4cc7a75aa6ac272a5774ef7ca3f6b2ad095425e3

URL: 
https://github.com/llvm/llvm-project/commit/4cc7a75aa6ac272a5774ef7ca3f6b2ad095425e3
DIFF: 
https://github.com/llvm/llvm-project/commit/4cc7a75aa6ac272a5774ef7ca3f6b2ad095425e3.diff

LOG: [llvm-shlib] Change libLLVM-$MAJOR.so symlink to point to versioned SO 
(#82660)

This symlink was added in 91a384621e5b762d9c173ffd247cfeadd5f436a2 to
maintain backwards compatibility, but it needs to point to
libLLVM.so.$MAJOR.$MINOR rather than libLLVM.so. This works better for
distros that ship libLLVM.so and libLLVM.so.$MAJOR.$MINOR in separate
packages and also prevents mistakes like
libLLVM-19.so -> libLLVM.so -> libLLVM.so.18.1

Fixes #82647

(cherry picked from commit 10c48a772742b7afe665a815b7eba2047f17dc4b)

Added: 


Modified: 
llvm/cmake/modules/AddLLVM.cmake
llvm/tools/llvm-shlib/CMakeLists.txt

Removed: 




diff  --git a/llvm/cmake/modules/AddLLVM.cmake 
b/llvm/cmake/modules/AddLLVM.cmake
index 5fc663d10b8f77..3bc78b0dc9355a 100644
--- a/llvm/cmake/modules/AddLLVM.cmake
+++ b/llvm/cmake/modules/AddLLVM.cmake
@@ -2074,7 +2074,7 @@ function(add_lit_testsuites project directory)
 endfunction()
 
 function(llvm_install_library_symlink name dest type)
-  cmake_parse_arguments(ARG "" "COMPONENT" "" ${ARGN})
+  cmake_parse_arguments(ARG "" "COMPONENT;SOVERSION" "" ${ARGN})
   foreach(path ${CMAKE_MODULE_PATH})
 if(EXISTS ${path}/LLVMInstallSymlink.cmake)
   set(INSTALL_SYMLINK ${path}/LLVMInstallSymlink.cmake)
@@ -2088,7 +2088,11 @@ function(llvm_install_library_symlink name dest type)
   endif()
 
   set(full_name 
${CMAKE_${type}_LIBRARY_PREFIX}${name}${CMAKE_${type}_LIBRARY_SUFFIX})
-  set(full_dest 
${CMAKE_${type}_LIBRARY_PREFIX}${dest}${CMAKE_${type}_LIBRARY_SUFFIX})
+  if (ARG_SOVERSION)
+set(full_dest 
${CMAKE_${type}_LIBRARY_PREFIX}${dest}${CMAKE_${type}_LIBRARY_SUFFIX}.${ARG_SOVERSION})
+  else()
+set(full_dest 
${CMAKE_${type}_LIBRARY_PREFIX}${dest}${CMAKE_${type}_LIBRARY_SUFFIX})
+  endif()
 
   if(LLVM_USE_SYMLINKS)
 set(LLVM_LINK_OR_COPY create_symlink)

diff  --git a/llvm/tools/llvm-shlib/CMakeLists.txt 
b/llvm/tools/llvm-shlib/CMakeLists.txt
index 09c15e304614c4..eba1672faee7fa 100644
--- a/llvm/tools/llvm-shlib/CMakeLists.txt
+++ b/llvm/tools/llvm-shlib/CMakeLists.txt
@@ -35,8 +35,8 @@ if(LLVM_BUILD_LLVM_DYLIB)
   endif()
   add_llvm_library(LLVM SHARED DISABLE_LLVM_LINK_LLVM_DYLIB OUTPUT_NAME LLVM 
${INSTALL_WITH_TOOLCHAIN} ${SOURCES})
   # Add symlink for backwards compatibility with old library name
-  get_target_property(LLVM_DYLIB_FILENAME LLVM OUTPUT_NAME)
-  
llvm_install_library_symlink(LLVM-${LLVM_VERSION_MAJOR}${LLVM_VERSION_SUFFIX} 
${LLVM_DYLIB_FILENAME} SHARED COMPONENT LLVM)
+  get_target_property(LLVM_DYLIB_SOVERSION LLVM SOVERSION)
+  
llvm_install_library_symlink(LLVM-${LLVM_VERSION_MAJOR}${LLVM_VERSION_SUFFIX} 
LLVM SHARED COMPONENT LLVM SOVERSION ${LLVM_DYLIB_SOVERSION})
 
   list(REMOVE_DUPLICATES LIB_NAMES)
   if("${CMAKE_SYSTEM_NAME}" STREQUAL "Darwin")



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[llvm-branch-commits] [compiler-rt] Allow running tests without installing first (PR #83088)

2024-02-26 Thread Alexander Richardson via llvm-branch-commits

https://github.com/arichardson created 
https://github.com/llvm/llvm-project/pull/83088

Currently, the testsuite uses the default runtimes path to find the
runtimes libraries which may or may not match the just-built runtimes.
This change uses the -resource-dir flag for clang whenever
COMPILER_RT_TEST_STANDALONE_BUILD_LIBS is set to ensure that we are
actually testing the currently built libraries rather than the ones
bundled with ${COMPILER_RT_TEST_COMPILER}.

This mostly fixes check-all in my configuration:
```
cmake -DCMAKE_BUILD_TYPE=RelWithDebInfo -G Ninja
-DCMAKE_C_COMPILER=$HOME/output/upstream-llvm/bin/clang
-DCMAKE_CXX_COMPILER=$HOME/output/upstream-llvm/bin/clang++
-DCOMPILER_RT_INCLUDE_TESTS=ON
-DLLVM_EXTERNAL_LIT=$HOME/build/upstream-llvm-project-build/bin/llvm-lit
-DLLVM_CMAKE_DIR=$HOME/output/upstream-llvm
-DCOMPILER_RT_DEBUG=OFF
-S $HOME/src/upstream-llvm-project/compiler-rt
-B $HOME/src/upstream-llvm-project/compiler-rt/cmake-build-all-sanitizers
```

I am still seeing two test failures due to an msan error inside
__gxx_personality_v0, but that is most likely due to an uninstrumented
`/lib/x86_64-linux-gnu/libgcc_s.so.1` being used by these tests.



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[llvm-branch-commits] [compiler-rt] Allow running tests without installing first (PR #83088)

2024-02-26 Thread via llvm-branch-commits

llvmbot wrote:




@llvm/pr-subscribers-compiler-rt-sanitizer

Author: Alexander Richardson (arichardson)


Changes

Currently, the testsuite uses the default runtimes path to find the
runtimes libraries which may or may not match the just-built runtimes.
This change uses the -resource-dir flag for clang whenever
COMPILER_RT_TEST_STANDALONE_BUILD_LIBS is set to ensure that we are
actually testing the currently built libraries rather than the ones
bundled with ${COMPILER_RT_TEST_COMPILER}.

This mostly fixes check-all in my configuration:
```
cmake -DCMAKE_BUILD_TYPE=RelWithDebInfo -G Ninja
-DCMAKE_C_COMPILER=$HOME/output/upstream-llvm/bin/clang
-DCMAKE_CXX_COMPILER=$HOME/output/upstream-llvm/bin/clang++
-DCOMPILER_RT_INCLUDE_TESTS=ON
-DLLVM_EXTERNAL_LIT=$HOME/build/upstream-llvm-project-build/bin/llvm-lit
-DLLVM_CMAKE_DIR=$HOME/output/upstream-llvm
-DCOMPILER_RT_DEBUG=OFF
-S $HOME/src/upstream-llvm-project/compiler-rt
-B $HOME/src/upstream-llvm-project/compiler-rt/cmake-build-all-sanitizers
```

I am still seeing two test failures due to an msan error inside
__gxx_personality_v0, but that is most likely due to an uninstrumented
`/lib/x86_64-linux-gnu/libgcc_s.so.1` being used by these tests.


---
Full diff: https://github.com/llvm/llvm-project/pull/83088.diff


5 Files Affected:

- (modified) compiler-rt/CMakeLists.txt (+24) 
- (modified) compiler-rt/test/CMakeLists.txt (-8) 
- (modified) compiler-rt/test/fuzzer/lit.cfg.py (+1) 
- (modified) compiler-rt/test/lit.common.cfg.py (+35-21) 
- (modified) compiler-rt/test/safestack/lit.cfg.py (+2-2) 


``diff
diff --git a/compiler-rt/CMakeLists.txt b/compiler-rt/CMakeLists.txt
index bbb4e8d7c333e4..68ed37498587c6 100644
--- a/compiler-rt/CMakeLists.txt
+++ b/compiler-rt/CMakeLists.txt
@@ -571,6 +571,30 @@ string(APPEND COMPILER_RT_TEST_COMPILER_CFLAGS " 
${stdlib_flag}")
 string(REPLACE " " ";" COMPILER_RT_UNITTEST_CFLAGS 
"${COMPILER_RT_TEST_COMPILER_CFLAGS}")
 set(COMPILER_RT_UNITTEST_LINK_FLAGS ${COMPILER_RT_UNITTEST_CFLAGS})
 
+option(COMPILER_RT_TEST_STANDALONE_BUILD_LIBS
+  "When set to ON and testing in a standalone build, test the runtime \
+  libraries built by this standalone build rather than the runtime libraries \
+  shipped with the compiler (used for testing). When set to OFF and testing \
+  in a standalone build, test the runtime libraries shipped with the compiler \
+  (used for testing). This option has no effect if the compiler and this \
+  build are configured to use the same runtime library path."
+  ON)
+if (COMPILER_RT_TEST_STANDALONE_BUILD_LIBS)
+  # Ensure that the unit tests can find the sanitizer headers prior to 
installation.
+  list(APPEND COMPILER_RT_UNITTEST_CFLAGS 
"-I${CMAKE_CURRENT_LIST_DIR}/include")
+  # Ensure that unit tests link against the just-built runtime libraries 
instead
+  # of the ones bundled with the compiler by overriding the resource directory.
+  #
+  if ("${COMPILER_RT_TEST_COMPILER_ID}" MATCHES "Clang")
+list(APPEND COMPILER_RT_UNITTEST_LINK_FLAGS 
"-resource-dir=${CMAKE_CURRENT_BINARY_DIR}")
+  endif()
+  get_compiler_rt_output_dir(${COMPILER_RT_DEFAULT_TARGET_ARCH} output_dir)
+  list(APPEND COMPILER_RT_UNITTEST_LINK_FLAGS "-Wl,-rpath,${output_dir}")
+endif()
+message(WARNING 
"COMPILER_RT_UNITTEST_LINK_FLAGS=${COMPILER_RT_UNITTEST_LINK_FLAGS}, 
COMPILER_RT_TEST_STANDALONE_BUILD_LIBS=${COMPILER_RT_TEST_STANDALONE_BUILD_LIBS}
 COMPILER_RT_TEST_COMPILER_ID=${COMPILER_RT_TEST_COMPILER_ID}")
+
+
+
 if(COMPILER_RT_USE_LLVM_UNWINDER)
   # We're linking directly against the libunwind that we're building so don't
   # try to link in the toolchain's default libunwind which may be missing.
diff --git a/compiler-rt/test/CMakeLists.txt b/compiler-rt/test/CMakeLists.txt
index c186be1e44fd9a..edc007aaf477a7 100644
--- a/compiler-rt/test/CMakeLists.txt
+++ b/compiler-rt/test/CMakeLists.txt
@@ -1,14 +1,6 @@
 # Needed for lit support in standalone builds.
 include(AddLLVM)
 
-option(COMPILER_RT_TEST_STANDALONE_BUILD_LIBS
-  "When set to ON and testing in a standalone build, test the runtime \
-  libraries built by this standalone build rather than the runtime libraries \
-  shipped with the compiler (used for testing). When set to OFF and testing \
-  in a standalone build, test the runtime libraries shipped with the compiler \
-  (used for testing). This option has no effect if the compiler and this \
-  build are configured to use the same runtime library path."
-  ON)
 pythonize_bool(COMPILER_RT_TEST_STANDALONE_BUILD_LIBS)
 
 pythonize_bool(LLVM_ENABLE_EXPENSIVE_CHECKS)
diff --git a/compiler-rt/test/fuzzer/lit.cfg.py 
b/compiler-rt/test/fuzzer/lit.cfg.py
index 4e203236b16708..29fd45dbc02fa4 100644
--- a/compiler-rt/test/fuzzer/lit.cfg.py
+++ b/compiler-rt/test/fuzzer/lit.cfg.py
@@ -101,6 +101,7 @@ def generate_compiler_cmd(is_cpp=True, fuzzer_enabled=True, 
msan_enabled=False):
 return " ".join(
 [
 compiler_cmd,
+config.target_cflags,
 std_cmd,
   

[llvm-branch-commits] [compiler-rt] Build libfuzzer sources with the chosen C++ compiler (PR #83090)

2024-02-26 Thread Alexander Richardson via llvm-branch-commits

https://github.com/arichardson created 
https://github.com/llvm/llvm-project/pull/83090

I was getting build failures due to missing  when building the
libfuzzer tests. It turns out that the custom command was using
COMPILER_RT_TEST_COMPILER when building the source file rather than
the COMPILER_RT_TEST_CXX_COMPILER.



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[llvm-branch-commits] [clang] a7a74ec - [Clang] Fixes to immediate-escalating functions (#82281)

2024-02-26 Thread Tom Stellard via llvm-branch-commits

Author: cor3ntin
Date: 2024-02-26T17:03:46-08:00
New Revision: a7a74ece1d6b8dc95bf6fb0b7e06b8e0ba9b9559

URL: 
https://github.com/llvm/llvm-project/commit/a7a74ece1d6b8dc95bf6fb0b7e06b8e0ba9b9559
DIFF: 
https://github.com/llvm/llvm-project/commit/a7a74ece1d6b8dc95bf6fb0b7e06b8e0ba9b9559.diff

LOG: [Clang] Fixes to immediate-escalating functions (#82281)

* Consider that immediate escalating function can appear at global
scope, fixing a crash

* Lambda conversion to function pointer was sometimes not performed in
an immediate function context when it should be.

Fixes #82258

(cherry picked from commit baf6bd303bd58a521809d456dd9b179636982fc5)

Added: 


Modified: 
clang/docs/ReleaseNotes.rst
clang/include/clang/Sema/Sema.h
clang/lib/Sema/SemaExpr.cpp
clang/test/SemaCXX/cxx2b-consteval-propagate.cpp

Removed: 




diff  --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index 2411e97c750c72..fc27297aea2d6c 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -1099,6 +1099,11 @@ Bug Fixes to C++ Support
 - Fix incorrect code generation caused by the object argument of ``static 
operator()`` and ``static operator[]`` calls not being evaluated.
   Fixes (`#67976 `_)
 
+- Fix crash when using an immediate-escalated function at global scope.
+  (`#82258 `_)
+- Correctly immediate-escalate lambda conversion functions.
+  (`#82258 `_)
+
 Bug Fixes to AST Handling
 ^
 - Fixed an import failure of recursive friend class template.

diff  --git a/clang/include/clang/Sema/Sema.h b/clang/include/clang/Sema/Sema.h
index 1f1cbd11ff7358..6adb8fb7966b3f 100644
--- a/clang/include/clang/Sema/Sema.h
+++ b/clang/include/clang/Sema/Sema.h
@@ -1090,7 +1090,9 @@ class Sema final {
   if (FD) {
 FD->setWillHaveBody(true);
 S.ExprEvalContexts.back().InImmediateFunctionContext =
-FD->isImmediateFunction();
+FD->isImmediateFunction() ||
+S.ExprEvalContexts[S.ExprEvalContexts.size() - 2]
+.isConstantEvaluated();
 S.ExprEvalContexts.back().InImmediateEscalatingFunctionContext =
 S.getLangOpts().CPlusPlus20 && FD->isImmediateEscalating();
   } else

diff  --git a/clang/lib/Sema/SemaExpr.cpp b/clang/lib/Sema/SemaExpr.cpp
index 0d9c087ed0cd19..4cce0abc231505 100644
--- a/clang/lib/Sema/SemaExpr.cpp
+++ b/clang/lib/Sema/SemaExpr.cpp
@@ -18294,7 +18294,6 @@ void Sema::CheckUnusedVolatileAssignment(Expr *E) {
 }
 
 void Sema::MarkExpressionAsImmediateEscalating(Expr *E) {
-  assert(!FunctionScopes.empty() && "Expected a function scope");
   assert(getLangOpts().CPlusPlus20 &&
  ExprEvalContexts.back().InImmediateEscalatingFunctionContext &&
  "Cannot mark an immediate escalating expression outside of an "
@@ -18311,7 +18310,8 @@ void Sema::MarkExpressionAsImmediateEscalating(Expr *E) 
{
   } else {
 assert(false && "expected an immediately escalating expression");
   }
-  getCurFunction()->FoundImmediateEscalatingExpression = true;
+  if (FunctionScopeInfo *FI = getCurFunction())
+FI->FoundImmediateEscalatingExpression = true;
 }
 
 ExprResult Sema::CheckForImmediateInvocation(ExprResult E, FunctionDecl *Decl) 
{

diff  --git a/clang/test/SemaCXX/cxx2b-consteval-propagate.cpp 
b/clang/test/SemaCXX/cxx2b-consteval-propagate.cpp
index 531a6262287335..4a75392045d05a 100644
--- a/clang/test/SemaCXX/cxx2b-consteval-propagate.cpp
+++ b/clang/test/SemaCXX/cxx2b-consteval-propagate.cpp
@@ -368,3 +368,29 @@ vector v{};
 // expected-note@-2 {{in call to 'vector()'}}
 
 }
+
+
+namespace GH82258 {
+
+template 
+constexpr auto none_of(R&& r, Pred pred) -> bool { return true; }
+
+struct info { int value; };
+consteval auto is_invalid(info i) -> bool { return false; }
+constexpr info types[] = { {1}, {3}, {5}};
+
+static_assert(none_of(
+types,
++[](info i) consteval {
+return is_invalid(i);
+}
+));
+
+static_assert(none_of(
+types,
+[]{
+return is_invalid;
+}()
+));
+
+}



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[llvm-branch-commits] [clang] [Clang] Fixes to immediate-escalating functions (#82281) (PR #82609)

2024-02-26 Thread Tom Stellard via llvm-branch-commits

tstellar wrote:

Merged a7a74ece1d6b8dc95bf6fb0b7e06b8e0ba9b9559

https://github.com/llvm/llvm-project/pull/82609
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[llvm-branch-commits] [clang] [Clang] Fixes to immediate-escalating functions (#82281) (PR #82609)

2024-02-26 Thread Tom Stellard via llvm-branch-commits

https://github.com/tstellar closed 
https://github.com/llvm/llvm-project/pull/82609
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[llvm-branch-commits] [compiler-rt] [compiler-rt] Build libfuzzer sources with the chosen C++ compiler (PR #83090)

2024-02-26 Thread Alexander Richardson via llvm-branch-commits

https://github.com/arichardson updated 
https://github.com/llvm/llvm-project/pull/83090

>From 8d86b5ea7c696367173335997f5aab2d25a31ad0 Mon Sep 17 00:00:00 2001
From: Alex Richardson 
Date: Mon, 26 Feb 2024 17:08:23 -0800
Subject: [PATCH] add missing part of diff

Created using spr 1.3.4
---
 compiler-rt/cmake/Modules/CompilerRTCompile.cmake | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/compiler-rt/cmake/Modules/CompilerRTCompile.cmake 
b/compiler-rt/cmake/Modules/CompilerRTCompile.cmake
index 8c804acb44ae4d..2bf115973a49b3 100644
--- a/compiler-rt/cmake/Modules/CompilerRTCompile.cmake
+++ b/compiler-rt/cmake/Modules/CompilerRTCompile.cmake
@@ -107,7 +107,7 @@ function(clang_compile object_file source)
 
   add_custom_command(
 OUTPUT ${object_file}
-COMMAND ${COMPILER_RT_TEST_COMPILER} ${compile_flags} -c
+COMMAND ${compiler} ${compile_flags} -c
 -o "${object_file}"
 ${source_rpath}
 MAIN_DEPENDENCY ${source}

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[llvm-branch-commits] [clang] b4b76bd - [AArch64] Make +pauth enabled in Armv8.3-a by default (#78027)

2024-02-26 Thread Tom Stellard via llvm-branch-commits

Author: Anatoly Trosinenko
Date: 2024-02-26T17:38:41-08:00
New Revision: b4b76bdbf1dab6199e4112781f37e96f1902bfcd

URL: 
https://github.com/llvm/llvm-project/commit/b4b76bdbf1dab6199e4112781f37e96f1902bfcd
DIFF: 
https://github.com/llvm/llvm-project/commit/b4b76bdbf1dab6199e4112781f37e96f1902bfcd.diff

LOG: [AArch64] Make +pauth enabled in Armv8.3-a by default (#78027)

Add AEK_PAUTH to ARMV8_3A in TargetParser and let it propagate to
ARMV8R, as it aligns with GCC defaults.

After adding AEK_PAUTH, several tests from TargetParserTest.cpp crashed
when trying to format an error message, thus update a format string in
AssertSameExtensionFlags to account for bitmask being pre-formatted as
std::string.

The CHECK-PAUTH* lines in aarch64-target-features.c are updated to
account for the fact that FEAT_PAUTH support and pac-ret can be enabled
independently and all four combinations are possible.

(cherry picked from commit a52eea66795018550e95c4b060165a7250899298)

Added: 


Modified: 
clang/lib/Basic/Targets/AArch64.cpp
clang/test/CodeGen/aarch64-targetattr.c
clang/test/Preprocessor/aarch64-target-features.c
llvm/include/llvm/TargetParser/AArch64TargetParser.h
llvm/unittests/TargetParser/TargetParserTest.cpp

Removed: 




diff  --git a/clang/lib/Basic/Targets/AArch64.cpp 
b/clang/lib/Basic/Targets/AArch64.cpp
index 3036f461c1ded1..f5a5d689fa095c 100644
--- a/clang/lib/Basic/Targets/AArch64.cpp
+++ b/clang/lib/Basic/Targets/AArch64.cpp
@@ -258,7 +258,6 @@ void AArch64TargetInfo::getTargetDefinesARMV83A(const 
LangOptions &Opts,
 MacroBuilder &Builder) const {
   Builder.defineMacro("__ARM_FEATURE_COMPLEX", "1");
   Builder.defineMacro("__ARM_FEATURE_JCVT", "1");
-  Builder.defineMacro("__ARM_FEATURE_PAUTH", "1");
   // Also include the Armv8.2 defines
   getTargetDefinesARMV82A(Opts, Builder);
 }

diff  --git a/clang/test/CodeGen/aarch64-targetattr.c 
b/clang/test/CodeGen/aarch64-targetattr.c
index 02da18264da0a3..1a3a84a73dbad1 100644
--- a/clang/test/CodeGen/aarch64-targetattr.c
+++ b/clang/test/CodeGen/aarch64-targetattr.c
@@ -97,19 +97,19 @@ void minusarch() {}
 // CHECK: attributes #0 = { {{.*}} 
"target-features"="+crc,+fp-armv8,+lse,+neon,+ras,+rdm,+v8.1a,+v8.2a,+v8a" }
 // CHECK: attributes #1 = { {{.*}} 
"target-features"="+crc,+fp-armv8,+fullfp16,+lse,+neon,+ras,+rdm,+sve,+v8.1a,+v8.2a,+v8a"
 }
 // CHECK: attributes #2 = { {{.*}} 
"target-features"="+crc,+fp-armv8,+fullfp16,+lse,+neon,+ras,+rdm,+sve,+sve2,+v8.1a,+v8.2a,+v8a"
 }
-// CHECK: attributes #3 = { {{.*}} 
"target-features"="+bf16,+complxnum,+crc,+dotprod,+fp-armv8,+fullfp16,+i8mm,+jsconv,+lse,+neon,+ras,+rcpc,+rdm,+sve,+sve2,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8.6a,+v8a"
 }
+// CHECK: attributes #3 = { {{.*}} 
"target-features"="+bf16,+complxnum,+crc,+dotprod,+fp-armv8,+fullfp16,+i8mm,+jsconv,+lse,+neon,+pauth,+ras,+rcpc,+rdm,+sve,+sve2,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8.6a,+v8a"
 }
 // CHECK: attributes #4 = { {{.*}} "target-cpu"="cortex-a710" 
"target-features"="+bf16,+complxnum,+crc,+dotprod,+flagm,+fp-armv8,+fp16fml,+fullfp16,+i8mm,+jsconv,+lse,+mte,+neon,+pauth,+ras,+rcpc,+rdm,+sb,+sve,+sve2,+sve2-bitperm"
 }
 // CHECK: attributes #5 = { {{.*}} "tune-cpu"="cortex-a710" }
 // CHECK: attributes #6 = { {{.*}} "target-cpu"="generic" }
 // CHECK: attributes #7 = { {{.*}} "tune-cpu"="generic" }
 // CHECK: attributes #8 = { {{.*}} "target-cpu"="neoverse-n1" 
"target-features"="+aes,+crc,+dotprod,+fp-armv8,+fullfp16,+lse,+neon,+ras,+rcpc,+rdm,+sha2,+spe,+ssbs"
 "tune-cpu"="cortex-a710" }
 // CHECK: attributes #9 = { {{.*}} 
"target-features"="+fp-armv8,+fullfp16,+neon,+sve" "tune-cpu"="cortex-a710" }
-// CHECK: attributes #10 = { {{.*}} "target-cpu"="neoverse-v1" 
"target-features"="+aes,+bf16,+complxnum,+crc,+dotprod,+fp-armv8,+fp16fml,+fullfp16,+i8mm,+jsconv,+lse,+neon,+rand,+ras,+rcpc,+rdm,+sha2,+sha3,+sm4,+spe,+ssbs,+sve,+sve2"
 }
-// CHECK: attributes #11 = { {{.*}} "target-cpu"="neoverse-v1" 
"target-features"="+aes,+bf16,+complxnum,+crc,+dotprod,+fp-armv8,+fp16fml,+fullfp16,+i8mm,+jsconv,+lse,+neon,+rand,+ras,+rcpc,+rdm,+sha2,+sha3,+sm4,+spe,+ssbs,-sve"
 }
+// CHECK: attributes #10 = { {{.*}} "target-cpu"="neoverse-v1" 
"target-features"="+aes,+bf16,+complxnum,+crc,+dotprod,+fp-armv8,+fp16fml,+fullfp16,+i8mm,+jsconv,+lse,+neon,+pauth,+rand,+ras,+rcpc,+rdm,+sha2,+sha3,+sm4,+spe,+ssbs,+sve,+sve2"
 }
+// CHECK: attributes #11 = { {{.*}} "target-cpu"="neoverse-v1" 
"target-features"="+aes,+bf16,+complxnum,+crc,+dotprod,+fp-armv8,+fp16fml,+fullfp16,+i8mm,+jsconv,+lse,+neon,+pauth,+rand,+ras,+rcpc,+rdm,+sha2,+sha3,+sm4,+spe,+ssbs,-sve"
 }
 // CHECK: attributes #12 = { {{.*}} 
"target-features"="+fp-armv8,+fullfp16,+neon,+sve" }
 // CHECK: attributes #13 = { {{.*}} 
"target-features"="+fp-armv8,+fullfp16,+neon,+sve,-sve2" }
 // CHECK: attributes #14 = { {{.*}} "target-features"="+fullfp16

[llvm-branch-commits] [clang] [llvm] release/18.x: [AArch64] Backport Ampere1B support (#81297 , #81341, and #81744) (PR #81857)

2024-02-26 Thread Tom Stellard via llvm-branch-commits

https://github.com/tstellar closed 
https://github.com/llvm/llvm-project/pull/81857
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[llvm-branch-commits] [llvm] 6d8f929 - [NFC][AArch64] fix whitespace in AArch64SchedNeoverseV1 (#81744)

2024-02-26 Thread Tom Stellard via llvm-branch-commits

Author: Philipp Tomsich
Date: 2024-02-26T17:38:41-08:00
New Revision: 6d8f9290b6afa5e61841124ae1bdeb96d9ada820

URL: 
https://github.com/llvm/llvm-project/commit/6d8f9290b6afa5e61841124ae1bdeb96d9ada820
DIFF: 
https://github.com/llvm/llvm-project/commit/6d8f9290b6afa5e61841124ae1bdeb96d9ada820.diff

LOG: [NFC][AArch64] fix whitespace in AArch64SchedNeoverseV1 (#81744)

One of the whitespace fixes didn't get added to the commit introducing
the Ampere1B model.
Clean it up.

(cherry picked from commit 3369e341288b3d9bb59827f9a2911ebf3d36408d)

Added: 


Modified: 
llvm/lib/Target/AArch64/AArch64SchedNeoverseV1.td

Removed: 




diff  --git a/llvm/lib/Target/AArch64/AArch64SchedNeoverseV1.td 
b/llvm/lib/Target/AArch64/AArch64SchedNeoverseV1.td
index 7e041dbd2abaea..613db353cb0aaa 100644
--- a/llvm/lib/Target/AArch64/AArch64SchedNeoverseV1.td
+++ b/llvm/lib/Target/AArch64/AArch64SchedNeoverseV1.td
@@ -29,7 +29,7 @@ def NeoverseV1Model : SchedMachineModel {
   list UnsupportedFeatures = !listconcat(SVE2Unsupported.F,
 SMEUnsupported.F,
 [HasMTE, HasCPA,
-   HasCSSC]);
+HasCSSC]);
 }
 
 
//===--===//



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[llvm-branch-commits] [clang] 8328334 - [AArch64] Add the Ampere1B core (#81297)

2024-02-26 Thread Tom Stellard via llvm-branch-commits

Author: Philipp Tomsich
Date: 2024-02-26T17:38:41-08:00
New Revision: 83283342c38e03fc501c84b9fad7cd62f1d629d3

URL: 
https://github.com/llvm/llvm-project/commit/83283342c38e03fc501c84b9fad7cd62f1d629d3
DIFF: 
https://github.com/llvm/llvm-project/commit/83283342c38e03fc501c84b9fad7cd62f1d629d3.diff

LOG: [AArch64] Add the Ampere1B core (#81297)

The Ampere1B is Ampere's third-generation core implementing a
superscalar, out-of-order microarchitecture with nested virtualization,
speculative side-channel mitigation and architectural support for
defense against ROP/JOP style software attacks.

Ampere1B is an ARMv8.7+ implementation, adding support for the FEAT
WFxT, FEAT CSSC, FEAT PAN3 and FEAT AFP extensions. It also includes all
features of the second-generation Ampere1A, such as the Memory Tagging
Extension and SM3/SM4 cryptography instructions.

(cherry picked from commit fbba818a78f591d89f25768ba31783714d526532)

Added: 


Modified: 
clang/test/Driver/aarch64-cssc.c
clang/test/Misc/target-invalid-cpu-note.c
llvm/include/llvm/TargetParser/AArch64TargetParser.h
llvm/lib/Target/AArch64/AArch64.td
llvm/lib/Target/AArch64/AArch64Subtarget.cpp
llvm/lib/Target/AArch64/AArch64Subtarget.h
llvm/lib/TargetParser/Host.cpp
llvm/test/CodeGen/AArch64/cpus.ll
llvm/test/CodeGen/AArch64/neon-dot-product.ll
llvm/test/CodeGen/AArch64/remat.ll
llvm/test/MC/AArch64/armv8.2a-dotprod.s
llvm/test/MC/Disassembler/AArch64/armv8.3a-rcpc.txt
llvm/unittests/TargetParser/Host.cpp
llvm/unittests/TargetParser/TargetParserTest.cpp

Removed: 




diff  --git a/clang/test/Driver/aarch64-cssc.c 
b/clang/test/Driver/aarch64-cssc.c
index a3e18663279bbd..5df0ea79d7c850 100644
--- a/clang/test/Driver/aarch64-cssc.c
+++ b/clang/test/Driver/aarch64-cssc.c
@@ -9,6 +9,7 @@
 // RUN: %clang -S -o - -emit-llvm --target=aarch64-none-elf -march=armv9.4-a   
 %s 2>&1 | FileCheck %s
 // RUN: %clang -S -o - -emit-llvm --target=aarch64-none-elf 
-march=armv9.4-a+cssc   %s 2>&1 | FileCheck %s
 // RUN: %clang -S -o - -emit-llvm --target=aarch64-none-elf 
-march=armv9.4-a+nocssc %s 2>&1 | FileCheck %s --check-prefix=NO_CSSC
+// RUN: %clang -S -o - -emit-llvm --target=aarch64-none-elf -mcpu=ampere1b 
 %s 2>&1 | FileCheck %s
 
 // CHECK: "target-features"="{{.*}},+cssc
 // NO_CSSC: "target-features"="{{.*}},-cssc

diff  --git a/clang/test/Misc/target-invalid-cpu-note.c 
b/clang/test/Misc/target-invalid-cpu-note.c
index 2f10bfb1fd82fe..39ed02f50950dd 100644
--- a/clang/test/Misc/target-invalid-cpu-note.c
+++ b/clang/test/Misc/target-invalid-cpu-note.c
@@ -5,11 +5,11 @@
 
 // RUN: not %clang_cc1 -triple arm64--- -target-cpu not-a-cpu -fsyntax-only %s 
2>&1 | FileCheck %s --check-prefix AARCH64
 // AARCH64: error: unknown target CPU 'not-a-cpu'
-// AARCH64-NEXT: note: valid target CPU values are: cortex-a34, cortex-a35, 
cortex-a53, cortex-a55, cortex-a510, cortex-a520, cortex-a57, cortex-a65, 
cortex-a65ae, cortex-a72, cortex-a73, cortex-a75, cortex-a76, cortex-a76ae, 
cortex-a77, cortex-a78, cortex-a78c, cortex-a710, cortex-a715, cortex-a720, 
cortex-r82, cortex-x1, cortex-x1c, cortex-x2, cortex-x3, cortex-x4, 
neoverse-e1, neoverse-n1, neoverse-n2, neoverse-512tvb, neoverse-v1, 
neoverse-v2, cyclone, apple-a7, apple-a8, apple-a9, apple-a10, apple-a11, 
apple-a12, apple-a13, apple-a14, apple-a15, apple-a16, apple-a17, apple-m1, 
apple-m2, apple-m3, apple-s4, apple-s5, exynos-m3, exynos-m4, exynos-m5, 
falkor, saphira, kryo, thunderx2t99, thunderx3t110, thunderx, thunderxt88, 
thunderxt81, thunderxt83, tsv110, a64fx, carmel, ampere1, ampere1a, cobalt-100, 
grace{{$}}
+// AARCH64-NEXT: note: valid target CPU values are: cortex-a34, cortex-a35, 
cortex-a53, cortex-a55, cortex-a510, cortex-a520, cortex-a57, cortex-a65, 
cortex-a65ae, cortex-a72, cortex-a73, cortex-a75, cortex-a76, cortex-a76ae, 
cortex-a77, cortex-a78, cortex-a78c, cortex-a710, cortex-a715, cortex-a720, 
cortex-r82, cortex-x1, cortex-x1c, cortex-x2, cortex-x3, cortex-x4, 
neoverse-e1, neoverse-n1, neoverse-n2, neoverse-512tvb, neoverse-v1, 
neoverse-v2, cyclone, apple-a7, apple-a8, apple-a9, apple-a10, apple-a11, 
apple-a12, apple-a13, apple-a14, apple-a15, apple-a16, apple-a17, apple-m1, 
apple-m2, apple-m3, apple-s4, apple-s5, exynos-m3, exynos-m4, exynos-m5, 
falkor, saphira, kryo, thunderx2t99, thunderx3t110, thunderx, thunderxt88, 
thunderxt81, thunderxt83, tsv110, a64fx, carmel, ampere1, ampere1a, ampere1b, 
cobalt-100, grace{{$}}
 
 // RUN: not %clang_cc1 -triple arm64--- -tune-cpu not-a-cpu -fsyntax-only %s 
2>&1 | FileCheck %s --check-prefix TUNE_AARCH64
 // TUNE_AARCH64: error: unknown target CPU 'not-a-cpu'
-// TUNE_AARCH64-NEXT: note: valid target CPU values are: cortex-a34, 
cortex-a35, cortex-a53, cortex-a55, cortex-a510, cortex-a520, cortex-a57, 
cortex-a65, cortex-a65ae, cortex-a72, cortex-a73, cortex-a75, cortex-a76, 
cortex-a76a

[llvm-branch-commits] [openmp] release/18.x: [OpenMP] Implement __kmp_is_address_mapped on DragonFlyBSD. (#82895) (PR #82940)

2024-02-26 Thread Brad Smith via llvm-branch-commits

https://github.com/brad0 closed https://github.com/llvm/llvm-project/pull/82940
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[llvm-branch-commits] [llvm] [RISCV] Support select optimization (PR #80124)

2024-02-26 Thread Wang Pengcheng via llvm-branch-commits

wangpc-pp wrote:

Ping.

https://github.com/llvm/llvm-project/pull/80124
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[llvm-branch-commits] [llvm] [RISCV] Support select optimization (PR #80124)

2024-02-26 Thread Craig Topper via llvm-branch-commits


@@ -1046,6 +1046,14 @@ def FeatureFastUnalignedAccess
 def FeaturePostRAScheduler : SubtargetFeature<"use-postra-scheduler",
 "UsePostRAScheduler", "true", "Schedule again after register allocation">;
 
+def FeaturePredictableSelectIsExpensive
+  : SubtargetFeature<"predictable-select-expensive", 
"PredictableSelectIsExpensive",
+ "true", "Prefer likely predicted branches over selects">;
+
+def FeatureEnableSelectOptimize
+  : SubtargetFeature<"enable-select-opt", "EnableSelectOptimize", "true",

topperc wrote:

If there are no in tree targets using it should we default this to false?

https://github.com/llvm/llvm-project/pull/80124
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[llvm-branch-commits] [llvm] [RISCV] Support select optimization (PR #80124)

2024-02-26 Thread Craig Topper via llvm-branch-commits

https://github.com/topperc deleted 
https://github.com/llvm/llvm-project/pull/80124
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[llvm-branch-commits] [llvm] [RISCV] Support select optimization (PR #80124)

2024-02-26 Thread Craig Topper via llvm-branch-commits


@@ -101,6 +101,11 @@ static cl::opt EnableMISchedLoadClustering(
 cl::desc("Enable load clustering in the machine scheduler"),
 cl::init(false));
 
+static cl::opt
+EnableSelectOpt("riscv-select-opt", cl::Hidden,

topperc wrote:

If no in tree targets use this, should we default to false?

https://github.com/llvm/llvm-project/pull/80124
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[llvm-branch-commits] [lld] [llvm] release/18.x: [Mips] Fix unable to handle inline assembly ends with compat-branch o… (#77291) (PR #82870)

2024-02-26 Thread Brad Smith via llvm-branch-commits

https://github.com/brad0 approved this pull request.


https://github.com/llvm/llvm-project/pull/82870
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[llvm-branch-commits] [llvm] [llvm][dfa-jump-threading] Allow DFAJumpThreading with optsize (PR #83049)

2024-02-26 Thread Nikita Popov via llvm-branch-commits

nikic wrote:

This pass is not part of the default pipeline -- do you enable this pass 
downstream, or do you want to add options for *all* uses of minsize, even if 
there is no evidence of usefulness?

https://github.com/llvm/llvm-project/pull/83049
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[llvm-branch-commits] [llvm] release/18.x: [llvm-shlib] Change libLLVM-$MAJOR.so symlink to point to versioned SO (#82660) (PR #83067)

2024-02-26 Thread Nikita Popov via llvm-branch-commits

https://github.com/nikic approved this pull request.


https://github.com/llvm/llvm-project/pull/83067
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[llvm-branch-commits] [lld] [llvm] release/18.x: [Mips] Fix unable to handle inline assembly ends with compat-branch o… (#77291) (PR #82870)

2024-02-26 Thread via llvm-branch-commits

yingopq wrote:

> @yingopq What do you think about merging this PR to the release branch?

Yes, I agree.



https://github.com/llvm/llvm-project/pull/82870
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[llvm-branch-commits] [clang] [llvm] release/18.x: MIPS: Fix asm constraints "f" and "r" for softfloat (#79116) (PR #83105)

2024-02-26 Thread via llvm-branch-commits

https://github.com/llvmbot created 
https://github.com/llvm/llvm-project/pull/83105

Backport c88beb4112d5bbf07d76a615ab7f13ba2ba023e6

Requested by: @brad0

>From e223881b2e4c0b1a02f9ea7926f69fce33534a94 Mon Sep 17 00:00:00 2001
From: YunQiang Su 
Date: Tue, 27 Feb 2024 14:08:36 +0800
Subject: [PATCH] MIPS: Fix asm constraints "f" and "r" for softfloat (#79116)

This include 2 fixes:
1. Disallow 'f' for softfloat.
2. Allow 'r' for softfloat.

Currently, 'f' is accpeted by clang, then LLVM meets an internal error.

'r' is rejected by LLVM by: couldn't allocate input reg for constraint
'r'.

Fixes: #64241, #63632

-

Co-authored-by: Fangrui Song 
(cherry picked from commit c88beb4112d5bbf07d76a615ab7f13ba2ba023e6)
---
 clang/lib/Basic/Targets/Mips.h|  4 +-
 .../CodeGen/Mips/inline-asm-constraints.c | 11 +
 clang/test/Sema/inline-asm-validate-mips.c|  9 
 llvm/lib/Target/Mips/MipsISelLowering.cpp | 10 ++--
 .../Mips/inlineasm-constraints-softfloat.ll   | 48 +++
 5 files changed, 78 insertions(+), 4 deletions(-)
 create mode 100644 clang/test/CodeGen/Mips/inline-asm-constraints.c
 create mode 100644 clang/test/Sema/inline-asm-validate-mips.c
 create mode 100644 llvm/test/CodeGen/Mips/inlineasm-constraints-softfloat.ll

diff --git a/clang/lib/Basic/Targets/Mips.h b/clang/lib/Basic/Targets/Mips.h
index f46b95abfd75c7..23d4e1b598fa1e 100644
--- a/clang/lib/Basic/Targets/Mips.h
+++ b/clang/lib/Basic/Targets/Mips.h
@@ -237,12 +237,14 @@ class LLVM_LIBRARY_VISIBILITY MipsTargetInfo : public 
TargetInfo {
 case 'r': // CPU registers.
 case 'd': // Equivalent to "r" unless generating MIPS16 code.
 case 'y': // Equivalent to "r", backward compatibility only.
-case 'f': // floating-point registers.
 case 'c': // $25 for indirect jumps
 case 'l': // lo register
 case 'x': // hilo register pair
   Info.setAllowsRegister();
   return true;
+case 'f': // floating-point registers.
+  Info.setAllowsRegister();
+  return FloatABI != SoftFloat;
 case 'I': // Signed 16-bit constant
 case 'J': // Integer 0
 case 'K': // Unsigned 16-bit constant
diff --git a/clang/test/CodeGen/Mips/inline-asm-constraints.c 
b/clang/test/CodeGen/Mips/inline-asm-constraints.c
new file mode 100644
index 00..88afe8735083b4
--- /dev/null
+++ b/clang/test/CodeGen/Mips/inline-asm-constraints.c
@@ -0,0 +1,11 @@
+// RUN: %clang_cc1 -emit-llvm -triple mips -target-feature +soft-float %s -o - 
| FileCheck %s --check-prefix=SOFT_FLOAT
+
+// SOFT_FLOAT: call void asm sideeffect "", "r,~{$1}"(float %1)
+void read_float(float *p) {
+  __asm__("" ::"r"(*p));
+}
+
+// SOFT_FLOAT: call void asm sideeffect "", "r,~{$1}"(double %1)
+void read_double(double *p) {
+  __asm__("" :: "r"(*p));
+}
diff --git a/clang/test/Sema/inline-asm-validate-mips.c 
b/clang/test/Sema/inline-asm-validate-mips.c
new file mode 100644
index 00..7da248fe417b5c
--- /dev/null
+++ b/clang/test/Sema/inline-asm-validate-mips.c
@@ -0,0 +1,9 @@
+// RUN: %clang_cc1 -triple mips64 -fsyntax-only -verify %s
+// RUN: %clang_cc1 -triple mips64 -target-feature +soft-float -fsyntax-only 
-verify=softfloat %s
+
+// expected-no-diagnostics
+
+void test_f(float p) {
+  float result = p;
+  __asm__("" :: "f"(result)); // softfloat-error{{invalid input constraint 'f' 
in asm}}
+}
diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp 
b/llvm/lib/Target/Mips/MipsISelLowering.cpp
index d431d3d91494f6..88b226eaaccfab 100644
--- a/llvm/lib/Target/Mips/MipsISelLowering.cpp
+++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp
@@ -4128,14 +4128,18 @@ MipsTargetLowering::getRegForInlineAsmConstraint(const 
TargetRegisterInfo *TRI,
 case 'd': // Address register. Same as 'r' unless generating MIPS16 code.
 case 'y': // Same as 'r'. Exists for compatibility.
 case 'r':
-  if (VT == MVT::i32 || VT == MVT::i16 || VT == MVT::i8 || VT == MVT::i1) {
+  if ((VT == MVT::i32 || VT == MVT::i16 || VT == MVT::i8 ||
+   VT == MVT::i1) ||
+  (VT == MVT::f32 && Subtarget.useSoftFloat())) {
 if (Subtarget.inMips16Mode())
   return std::make_pair(0U, &Mips::CPU16RegsRegClass);
 return std::make_pair(0U, &Mips::GPR32RegClass);
   }
-  if (VT == MVT::i64 && !Subtarget.isGP64bit())
+  if ((VT == MVT::i64 || (VT == MVT::f64 && Subtarget.useSoftFloat())) &&
+  !Subtarget.isGP64bit())
 return std::make_pair(0U, &Mips::GPR32RegClass);
-  if (VT == MVT::i64 && Subtarget.isGP64bit())
+  if ((VT == MVT::i64 || (VT == MVT::f64 && Subtarget.useSoftFloat())) &&
+  Subtarget.isGP64bit())
 return std::make_pair(0U, &Mips::GPR64RegClass);
   // This will generate an error message
   return std::make_pair(0U, nullptr);
diff --git a/llvm/test/CodeGen/Mips/inlineasm-constraints-softfloat.ll 
b/llvm/test/CodeGen/Mips/inlineasm-constraints-softfloat.ll
new file mode 100644
index 0

[llvm-branch-commits] [clang] [llvm] release/18.x: MIPS: Fix asm constraints "f" and "r" for softfloat (#79116) (PR #83105)

2024-02-26 Thread via llvm-branch-commits

https://github.com/llvmbot milestoned 
https://github.com/llvm/llvm-project/pull/83105
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[llvm-branch-commits] [clang] [llvm] release/18.x: MIPS: Fix asm constraints "f" and "r" for softfloat (#79116) (PR #83105)

2024-02-26 Thread via llvm-branch-commits

llvmbot wrote:

@MaskRay What do you think about merging this PR to the release branch?

https://github.com/llvm/llvm-project/pull/83105
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[llvm-branch-commits] [clang] [llvm] release/18.x: MIPS: Fix asm constraints "f" and "r" for softfloat (#79116) (PR #83105)

2024-02-26 Thread via llvm-branch-commits

llvmbot wrote:




@llvm/pr-subscribers-clang

Author: None (llvmbot)


Changes

Backport c88beb4112d5bbf07d76a615ab7f13ba2ba023e6

Requested by: @brad0

---
Full diff: https://github.com/llvm/llvm-project/pull/83105.diff


5 Files Affected:

- (modified) clang/lib/Basic/Targets/Mips.h (+3-1) 
- (added) clang/test/CodeGen/Mips/inline-asm-constraints.c (+11) 
- (added) clang/test/Sema/inline-asm-validate-mips.c (+9) 
- (modified) llvm/lib/Target/Mips/MipsISelLowering.cpp (+7-3) 
- (added) llvm/test/CodeGen/Mips/inlineasm-constraints-softfloat.ll (+48) 


``diff
diff --git a/clang/lib/Basic/Targets/Mips.h b/clang/lib/Basic/Targets/Mips.h
index f46b95abfd75c7..23d4e1b598fa1e 100644
--- a/clang/lib/Basic/Targets/Mips.h
+++ b/clang/lib/Basic/Targets/Mips.h
@@ -237,12 +237,14 @@ class LLVM_LIBRARY_VISIBILITY MipsTargetInfo : public 
TargetInfo {
 case 'r': // CPU registers.
 case 'd': // Equivalent to "r" unless generating MIPS16 code.
 case 'y': // Equivalent to "r", backward compatibility only.
-case 'f': // floating-point registers.
 case 'c': // $25 for indirect jumps
 case 'l': // lo register
 case 'x': // hilo register pair
   Info.setAllowsRegister();
   return true;
+case 'f': // floating-point registers.
+  Info.setAllowsRegister();
+  return FloatABI != SoftFloat;
 case 'I': // Signed 16-bit constant
 case 'J': // Integer 0
 case 'K': // Unsigned 16-bit constant
diff --git a/clang/test/CodeGen/Mips/inline-asm-constraints.c 
b/clang/test/CodeGen/Mips/inline-asm-constraints.c
new file mode 100644
index 00..88afe8735083b4
--- /dev/null
+++ b/clang/test/CodeGen/Mips/inline-asm-constraints.c
@@ -0,0 +1,11 @@
+// RUN: %clang_cc1 -emit-llvm -triple mips -target-feature +soft-float %s -o - 
| FileCheck %s --check-prefix=SOFT_FLOAT
+
+// SOFT_FLOAT: call void asm sideeffect "", "r,~{$1}"(float %1)
+void read_float(float *p) {
+  __asm__("" ::"r"(*p));
+}
+
+// SOFT_FLOAT: call void asm sideeffect "", "r,~{$1}"(double %1)
+void read_double(double *p) {
+  __asm__("" :: "r"(*p));
+}
diff --git a/clang/test/Sema/inline-asm-validate-mips.c 
b/clang/test/Sema/inline-asm-validate-mips.c
new file mode 100644
index 00..7da248fe417b5c
--- /dev/null
+++ b/clang/test/Sema/inline-asm-validate-mips.c
@@ -0,0 +1,9 @@
+// RUN: %clang_cc1 -triple mips64 -fsyntax-only -verify %s
+// RUN: %clang_cc1 -triple mips64 -target-feature +soft-float -fsyntax-only 
-verify=softfloat %s
+
+// expected-no-diagnostics
+
+void test_f(float p) {
+  float result = p;
+  __asm__("" :: "f"(result)); // softfloat-error{{invalid input constraint 'f' 
in asm}}
+}
diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp 
b/llvm/lib/Target/Mips/MipsISelLowering.cpp
index d431d3d91494f6..88b226eaaccfab 100644
--- a/llvm/lib/Target/Mips/MipsISelLowering.cpp
+++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp
@@ -4128,14 +4128,18 @@ MipsTargetLowering::getRegForInlineAsmConstraint(const 
TargetRegisterInfo *TRI,
 case 'd': // Address register. Same as 'r' unless generating MIPS16 code.
 case 'y': // Same as 'r'. Exists for compatibility.
 case 'r':
-  if (VT == MVT::i32 || VT == MVT::i16 || VT == MVT::i8 || VT == MVT::i1) {
+  if ((VT == MVT::i32 || VT == MVT::i16 || VT == MVT::i8 ||
+   VT == MVT::i1) ||
+  (VT == MVT::f32 && Subtarget.useSoftFloat())) {
 if (Subtarget.inMips16Mode())
   return std::make_pair(0U, &Mips::CPU16RegsRegClass);
 return std::make_pair(0U, &Mips::GPR32RegClass);
   }
-  if (VT == MVT::i64 && !Subtarget.isGP64bit())
+  if ((VT == MVT::i64 || (VT == MVT::f64 && Subtarget.useSoftFloat())) &&
+  !Subtarget.isGP64bit())
 return std::make_pair(0U, &Mips::GPR32RegClass);
-  if (VT == MVT::i64 && Subtarget.isGP64bit())
+  if ((VT == MVT::i64 || (VT == MVT::f64 && Subtarget.useSoftFloat())) &&
+  Subtarget.isGP64bit())
 return std::make_pair(0U, &Mips::GPR64RegClass);
   // This will generate an error message
   return std::make_pair(0U, nullptr);
diff --git a/llvm/test/CodeGen/Mips/inlineasm-constraints-softfloat.ll 
b/llvm/test/CodeGen/Mips/inlineasm-constraints-softfloat.ll
new file mode 100644
index 00..705570f808ce00
--- /dev/null
+++ b/llvm/test/CodeGen/Mips/inlineasm-constraints-softfloat.ll
@@ -0,0 +1,48 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 
UTC_ARGS: --version 4
+; RUN: llc -march=mips < %s | FileCheck %s --check-prefix=MIPS32
+; RUN: llc -march=mips64 < %s | FileCheck %s --check-prefix=MIPS64
+
+define dso_local void @read_double(ptr nocapture noundef readonly %0) 
local_unnamed_addr #0 {
+; MIPS32-LABEL: read_double:
+; MIPS32:   # %bb.0:
+; MIPS32-NEXT:lw $2, 4($4)
+; MIPS32-NEXT:lw $3, 0($4)
+; MIPS32-NEXT:#APP
+; MIPS32-NEXT:#NO_APP
+; MIPS32-NEXT:jr $ra
+; MIPS32-NEXT:nop
+;
+; MIPS64-LABEL: read_double:
+; MIPS64:   # %bb.0:
+; 

[llvm-branch-commits] [clang] [llvm] release/18.x: MIPS: Fix asm constraints "f" and "r" for softfloat (#79116) (PR #83105)

2024-02-26 Thread Fangrui Song via llvm-branch-commits

https://github.com/MaskRay approved this pull request.


https://github.com/llvm/llvm-project/pull/83105
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[llvm-branch-commits] [llvm] [RISCV] Support select optimization (PR #80124)

2024-02-26 Thread Wang Pengcheng via llvm-branch-commits


@@ -101,6 +101,11 @@ static cl::opt EnableMISchedLoadClustering(
 cl::desc("Enable load clustering in the machine scheduler"),
 cl::init(false));
 
+static cl::opt
+EnableSelectOpt("riscv-select-opt", cl::Hidden,

wangpc-pp wrote:

We have already disabled it via `enableSelectOptimize()`?

https://github.com/llvm/llvm-project/pull/80124
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[llvm-branch-commits] [llvm] [RISCV] Support select optimization (PR #80124)

2024-02-26 Thread Craig Topper via llvm-branch-commits


@@ -101,6 +101,11 @@ static cl::opt EnableMISchedLoadClustering(
 cl::desc("Enable load clustering in the machine scheduler"),
 cl::init(false));
 
+static cl::opt
+EnableSelectOpt("riscv-select-opt", cl::Hidden,

topperc wrote:

But we added a bunch of passes to the pipeline. Does that have compile time 
impact?

https://github.com/llvm/llvm-project/pull/80124
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[llvm-branch-commits] [llvm] [RISCV] Support select optimization (PR #80124)

2024-02-26 Thread Wang Pengcheng via llvm-branch-commits


@@ -101,6 +101,11 @@ static cl::opt EnableMISchedLoadClustering(
 cl::desc("Enable load clustering in the machine scheduler"),
 cl::init(false));
 
+static cl::opt
+EnableSelectOpt("riscv-select-opt", cl::Hidden,

wangpc-pp wrote:

Yeah, this point makes sence to me. This pass adds several analysis passes 
(most of them can be cached), so it may impact compile time.

https://github.com/llvm/llvm-project/pull/80124
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[llvm-branch-commits] [llvm] [llvm][dfa-jump-threading] Allow DFAJumpThreading with optsize (PR #83049)

2024-02-26 Thread Paul Kirth via llvm-branch-commits

ilovepi wrote:

> This pass is not part of the default pipeline -- do you enable this pass 
> downstream, or do you want to add options for _all_ uses of minsize, even if 
> there is no evidence of usefulness?

We’d like to see if this can be useful to some of our size constrained users in 
the embedded space. Particularly because it has been proposed to turn this on 
in the default pipeline.  
https://discourse.llvm.org/t/rfc-enable-dfa-jumpthreading-pass-by-default/77231.
 Currently we don’t have evidence that this is beneficial, but for these 
targets we also don’t have a way to vet that with the current implementation.  

So to be concrete, I’d like the ability to enable this pass somehow even if 
compiling for size. If we can control this behavior with a threshold, then 
mechanically I don’t see much difference between that an the flags I’ve added 
in this pass.  But right now we don’t have a way to evaluate if this may be 
useful at any threshold, and I think it’s useful if we can turn this knob in 
some way without changing the default behavior. 

https://github.com/llvm/llvm-project/pull/83049
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[llvm-branch-commits] [llvm] [RISCV] Support select optimization (PR #80124)

2024-02-26 Thread Wang Pengcheng via llvm-branch-commits

https://github.com/wangpc-pp edited 
https://github.com/llvm/llvm-project/pull/80124
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