date:20220105

[llvm-branch-commits] [clang] d31f8cc - [AArch64] Avoid crashing on invalid -Wa, -march= values

2022-01-05 Thread Tom Stellard via llvm-branch-commits


Author: Dimitry Andric
Date: 2022-01-05T10:21:56-08:00
New Revision: d31f8cc6884ba3cc3e088fd57c4c533868e8a8b2

URL: 
https://github.com/llvm/llvm-project/commit/d31f8cc6884ba3cc3e088fd57c4c533868e8a8b2
DIFF: 
https://github.com/llvm/llvm-project/commit/d31f8cc6884ba3cc3e088fd57c4c533868e8a8b2.diff

LOG: [AArch64] Avoid crashing on invalid -Wa,-march= values

As reported in https://bugs.freebsd.org/260078, the gnutls Makefiles
pass -Wa,-march=all to compile a number of assembly files. Clang does
not support this -march value, but because of a mistake in handling
the arguments, an unitialized Arg pointer is dereferenced, which can
cause a segfault.

Work around this by adding a check if the local WaMArch variable is
initialized, and if so, using its value in the diagnostic message.

Reviewed By: tschuett

Differential Revision: https://reviews.llvm.org/D114677

(cherry picked from commit df08b2fe8b35cb63dfb3b49738a3494b9b4e6f8e)

Added: 


Modified: 
clang/lib/Driver/ToolChains/Arch/AArch64.cpp
clang/test/Driver/aarch64-target-as-march.s

Removed: 




diff  --git a/clang/lib/Driver/ToolChains/Arch/AArch64.cpp 
b/clang/lib/Driver/ToolChains/Arch/AArch64.cpp
index ed8c7e94b013..0e354a49b59a 100644
--- a/clang/lib/Driver/ToolChains/Arch/AArch64.cpp
+++ b/clang/lib/Driver/ToolChains/Arch/AArch64.cpp
@@ -191,7 +191,7 @@ void aarch64::getAArch64TargetFeatures(const Driver &D,
   bool success = true;
   // Enable NEON by default.
   Features.push_back("+neon");
-  llvm::StringRef WaMArch = "";
+  llvm::StringRef WaMArch;
   if (ForAS)
 for (const auto *A :
  Args.filtered(options::OPT_Wa_COMMA, options::OPT_Xassembler))
@@ -201,7 +201,7 @@ void aarch64::getAArch64TargetFeatures(const Driver &D,
   // Call getAArch64ArchFeaturesFromMarch only if "-Wa,-march=" or
   // "-Xassembler -march" is detected. Otherwise it may return false
   // and causes Clang to error out.
-  if (WaMArch.size())
+  if (!WaMArch.empty())
 success = getAArch64ArchFeaturesFromMarch(D, WaMArch, Args, Features);
   else if ((A = Args.getLastArg(options::OPT_march_EQ)))
 success = getAArch64ArchFeaturesFromMarch(D, A->getValue(), Args, 
Features);
@@ -222,8 +222,15 @@ void aarch64::getAArch64TargetFeatures(const Driver &D,
 success = getAArch64MicroArchFeaturesFromMcpu(
 D, getAArch64TargetCPU(Args, Triple, A), Args, Features);
 
-  if (!success)
-D.Diag(diag::err_drv_clang_unsupported) << A->getAsString(Args);
+  if (!success) {
+auto Diag = D.Diag(diag::err_drv_clang_unsupported);
+// If "-Wa,-march=" is used, 'WaMArch' will contain the argument's value,
+// while 'A' is uninitialized. Only dereference 'A' in the other case.
+if (!WaMArch.empty())
+  Diag << "-march=" + WaMArch.str();
+else
+  Diag << A->getAsString(Args);
+  }
 
   if (Args.getLastArg(options::OPT_mgeneral_regs_only)) {
 Features.push_back("-fp-armv8");

diff  --git a/clang/test/Driver/aarch64-target-as-march.s 
b/clang/test/Driver/aarch64-target-as-march.s
index a9301ade4335..03c3e395230d 100644
--- a/clang/test/Driver/aarch64-target-as-march.s
+++ b/clang/test/Driver/aarch64-target-as-march.s
@@ -44,3 +44,12 @@
 // TARGET-FEATURE-3-NOT: "-target-feature" "+v8.4a"
 // TARGET-FEATURE-4: "-target-feature" "+v8.4a"
 // TARGET-FEATURE-4-NOT: "-target-feature" "+v8.3a"
+
+// Invalid -march settings
+// RUN: %clang --target=aarch64-linux-gnueabi -### -c -Wa,-march=all %s 2>&1 | 
\
+// RUN: FileCheck --check-prefix=INVALID-ARCH-1 %s
+// RUN: %clang --target=aarch64-linux-gnueabi -### -c -Wa,-march=foobar %s 
2>&1 | \
+// RUN: FileCheck --check-prefix=INVALID-ARCH-2 %s
+
+// INVALID-ARCH-1: error: the clang compiler does not support '-march=all'
+// INVALID-ARCH-2: error: the clang compiler does not support '-march=foobar'



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[llvm-branch-commits] [llvm] 69fcfde - [AArch64][GlobalISel] Fix an crash in RBS due to a new regclass being added.

2022-01-05 Thread Tom Stellard via llvm-branch-commits


Author: Amara Emerson
Date: 2022-01-05T10:23:05-08:00
New Revision: 69fcfdedc50526a8bf9f155657865aad942b95d4

URL: 
https://github.com/llvm/llvm-project/commit/69fcfdedc50526a8bf9f155657865aad942b95d4
DIFF: 
https://github.com/llvm/llvm-project/commit/69fcfdedc50526a8bf9f155657865aad942b95d4.diff

LOG: [AArch64][GlobalISel] Fix an crash in RBS due to a new regclass being 
added.

rdar://84674985
(cherry picked from commit 5dd9e019ddb4b3e1d9fe425ae8bfe5a01b3f66fa)

Added: 
llvm/test/CodeGen/AArch64/GlobalISel/rbs-matrixindex-regclass-crash.mir

Modified: 
llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp

Removed: 




diff  --git a/llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp 
b/llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
index 8c34027f7bb3..94a0ce09afed 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
@@ -13,6 +13,8 @@
 
 #include "AArch64RegisterBankInfo.h"
 #include "AArch64InstrInfo.h"
+#include "AArch64RegisterInfo.h"
+#include "MCTargetDesc/AArch64MCTargetDesc.h"
 #include "llvm/ADT/STLExtras.h"
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/CodeGen/GlobalISel/RegisterBank.h"
@@ -271,6 +273,7 @@ AArch64RegisterBankInfo::getRegBankFromRegClass(const 
TargetRegisterClass &RC,
   case AArch64::WSeqPairsClassRegClassID:
   case AArch64::XSeqPairsClassRegClassID:
   case AArch64::MatrixIndexGPR32_12_15RegClassID:
+  case AArch64::GPR64_with_sub_32_in_MatrixIndexGPR32_12_15RegClassID:
 return getRegBank(AArch64::GPRRegBankID);
   case AArch64::CCRRegClassID:
 return getRegBank(AArch64::CCRegBankID);

diff  --git 
a/llvm/test/CodeGen/AArch64/GlobalISel/rbs-matrixindex-regclass-crash.mir 
b/llvm/test/CodeGen/AArch64/GlobalISel/rbs-matrixindex-regclass-crash.mir
new file mode 100644
index ..2da63a82a7ca
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/rbs-matrixindex-regclass-crash.mir
@@ -0,0 +1,56 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=aarch64 -run-pass=regbankselect -verify-machineinstrs %s 
-o - | FileCheck %s
+
+# Check we don't crash because of an unhandled new regclass 
GPR64_with_sub_32_in_MatrixIndexGPR32_12_15RegClassID.
+---
+name:foo
+alignment:   4
+legalized:   true
+tracksRegLiveness: true
+body: |
+  bb.1:
+; CHECK-LABEL: name: foo
+; CHECK: [[DEF:%[0-9]+]]:gpr(s64) = G_IMPLICIT_DEF
+; CHECK-NEXT: $x0 = COPY [[DEF]](s64)
+; CHECK-NEXT: $x1 = COPY [[DEF]](s64)
+; CHECK-NEXT: $x2 = COPY [[DEF]](s64)
+; CHECK-NEXT: $x3 = COPY [[DEF]](s64)
+; CHECK-NEXT: $x4 = COPY [[DEF]](s64)
+; CHECK-NEXT: $x5 = COPY [[DEF]](s64)
+; CHECK-NEXT: $x6 = COPY [[DEF]](s64)
+; CHECK-NEXT: $x7 = COPY [[DEF]](s64)
+; CHECK-NEXT: $x8 = COPY [[DEF]](s64)
+; CHECK-NEXT: $x9 = COPY [[DEF]](s64)
+; CHECK-NEXT: $x10 = COPY [[DEF]](s64)
+; CHECK-NEXT: $x11 = COPY [[DEF]](s64)
+; CHECK-NEXT: $x12 = COPY [[DEF]](s64)
+; CHECK-NEXT: $x13 = COPY [[DEF]](s64)
+; CHECK-NEXT: $x14 = COPY [[DEF]](s64)
+; CHECK-NEXT: $x15 = COPY [[DEF]](s64)
+; CHECK-NEXT: $x16 = COPY [[DEF]](s64)
+; CHECK-NEXT: $x17 = COPY [[DEF]](s64)
+; CHECK-NEXT: INLINEASM &"svc 0", 1 /* sideeffect attdialect */, 10 /* 
regdef */, implicit-def $x0, 10 /* regdef */, implicit-def $x1, 10 /* regdef 
*/, implicit-def $x2, 10 /* regdef */, implicit-def $x3, 10 /* regdef */, 
implicit-def $x4, 10 /* regdef */, implicit-def $x5, 10 /* regdef */, 
implicit-def $x6, 10 /* regdef */, implicit-def $x7, 10 /* regdef */, 
implicit-def $x8, 10 /* regdef */, implicit-def $x9, 10 /* regdef */, 
implicit-def $x10, 10 /* regdef */, implicit-def $x11, 10 /* regdef */, 
implicit-def $x12, 10 /* regdef */, implicit-def $x13, 10 /* regdef */, 
implicit-def $x14, 10 /* regdef */, implicit-def $x15, 10 /* regdef */, 
implicit-def $x16, 10 /* regdef */, implicit-def $x17, 9 /* reguse */, $x0, 9 
/* reguse */, $x1, 9 /* reguse */, $x2, 9 /* reguse */, $x3, 9 /* reguse */, 
$x4, 9 /* reguse */, $x5, 9 /* reguse */, $x6, 9 /* reguse */, $x7, 9 /* reguse 
*/, $x8, 9 /* reguse */, $x9, 9 /* reguse */, $x10, 9 /* reguse */, $x11, 9 /* 
reguse */, $x12, 9 /* reguse */, $x13, 9 /* reguse */, $x14, 9 /* reguse */, 
$x15, 9 /* reguse */, $x16, 9 /* reguse */, $x17
+; CHECK-NEXT: RET_ReallyLR
+%0:_(s64) = G_IMPLICIT_DEF
+$x0 = COPY %0(s64)
+$x1 = COPY %0(s64)
+$x2 = COPY %0(s64)
+$x3 = COPY %0(s64)
+$x4 = COPY %0(s64)
+$x5 = COPY %0(s64)
+$x6 = COPY %0(s64)
+$x7 = COPY %0(s64)
+$x8 = COPY %0(s64)
+$x9 = COPY %0(s64)
+$x10 = COPY %0(s64)
+$x11 = COPY %0(s64)
+$x12 = COPY %0(s64)
+$x13 = COPY %0(s64)
+$x14 = COPY %0(s64)
+$x15 = COPY %0(s64)
+$x16 = COPY %0(s64)
+$x17 = COPY %0(s64)
+INLINEASM &"svc

[llvm-branch-commits] [llvm] 0d44201 - [MachineOutliner] Don't outline functions starting with PATCHABLE_FUNCTION_ENTER/FENTRL_CALL

2022-01-05 Thread Tom Stellard via llvm-branch-commits


Author: Fangrui Song
Date: 2022-01-05T10:26:53-08:00
New Revision: 0d44201451f03ba907cdb268fc3fa38a0ebd

URL: 
https://github.com/llvm/llvm-project/commit/0d44201451f03ba907cdb268fc3fa38a0ebd
DIFF: 
https://github.com/llvm/llvm-project/commit/0d44201451f03ba907cdb268fc3fa38a0ebd.diff

LOG: [MachineOutliner] Don't outline functions starting with 
PATCHABLE_FUNCTION_ENTER/FENTRL_CALL

MachineOutliner may outline a "patchable-function-entry" function whose body has
a TargetOpcode::PATCHABLE_FUNCTION_ENTER MachineInstr. This is incorrect because
the special code sequence must stay unchanged to be used at run-time.
Avoid outlining PATCHABLE_FUNCTION_ENTER. While here, avoid outlining 
FENTRY_CALL too
(which doesn't reproduce currently) to allow phase ordering flexibility.

Fixes #52635

Reviewed By: paquette

Differential Revision: https://reviews.llvm.org/D115614

(cherry picked from commit a6a07a514b8a084feaa7f4f15d569698b9840d83)

Added: 
llvm/test/CodeGen/AArch64/machine-outliner-patchable.ll
llvm/test/CodeGen/RISCV/machine-outliner-patchable.ll

Modified: 
llvm/include/llvm/CodeGen/TargetInstrInfo.h
llvm/lib/CodeGen/TargetInstrInfo.cpp
llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
llvm/lib/Target/RISCV/RISCVInstrInfo.cpp

Removed: 




diff  --git a/llvm/include/llvm/CodeGen/TargetInstrInfo.h 
b/llvm/include/llvm/CodeGen/TargetInstrInfo.h
index 05d0591f1e5d..35c33153913e 100644
--- a/llvm/include/llvm/CodeGen/TargetInstrInfo.h
+++ b/llvm/include/llvm/CodeGen/TargetInstrInfo.h
@@ -1922,9 +1922,7 @@ class TargetInstrInfo : public MCInstrInfo {
   /// Optional target hook that returns true if \p MBB is safe to outline from,
   /// and returns any target-specific information in \p Flags.
   virtual bool isMBBSafeToOutlineFrom(MachineBasicBlock &MBB,
-  unsigned &Flags) const {
-return true;
-  }
+  unsigned &Flags) const;
 
   /// Insert a custom frame for outlined functions.
   virtual void buildOutlinedFrame(MachineBasicBlock &MBB, MachineFunction &MF,

diff  --git a/llvm/lib/CodeGen/TargetInstrInfo.cpp 
b/llvm/lib/CodeGen/TargetInstrInfo.cpp
index 2e4a656ea0c8..4bbb5beb21f3 100644
--- a/llvm/lib/CodeGen/TargetInstrInfo.cpp
+++ b/llvm/lib/CodeGen/TargetInstrInfo.cpp
@@ -1417,3 +1417,16 @@ std::string TargetInstrInfo::createMIROperandComment(
 }
 
 TargetInstrInfo::PipelinerLoopInfo::~PipelinerLoopInfo() {}
+
+bool TargetInstrInfo::isMBBSafeToOutlineFrom(MachineBasicBlock &MBB,
+ unsigned &Flags) const {
+  // Some instrumentations create special TargetOpcode at the start which
+  // expands to special code sequences which must be present.
+  auto First = MBB.getFirstNonDebugInstr();
+  if (First != MBB.end() &&
+  (First->getOpcode() == TargetOpcode::FENTRY_CALL ||
+   First->getOpcode() == TargetOpcode::PATCHABLE_FUNCTION_ENTER))
+return false;
+
+  return true;
+}

diff  --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp 
b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
index 091a62aa4ada..f29bb83c2d2e 100644
--- a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
+++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
@@ -6923,6 +6923,8 @@ bool AArch64InstrInfo::isFunctionSafeToOutlineFrom(
 
 bool AArch64InstrInfo::isMBBSafeToOutlineFrom(MachineBasicBlock &MBB,
   unsigned &Flags) const {
+  if (!TargetInstrInfo::isMBBSafeToOutlineFrom(MBB, Flags))
+return false;
   // Check if LR is available through all of the MBB. If it's not, then set
   // a flag.
   assert(MBB.getParent()->getRegInfo().tracksLiveness() &&

diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp 
b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
index 207101763ac2..7dab7a52ac53 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
@@ -999,7 +999,7 @@ bool RISCVInstrInfo::isFunctionSafeToOutlineFrom(
 bool RISCVInstrInfo::isMBBSafeToOutlineFrom(MachineBasicBlock &MBB,
 unsigned &Flags) const {
   // More accurate safety checking is done in getOutliningCandidateInfo.
-  return true;
+  return TargetInstrInfo::isMBBSafeToOutlineFrom(MBB, Flags);
 }
 
 // Enum values indicating how an outlined call should be constructed.

diff  --git a/llvm/test/CodeGen/AArch64/machine-outliner-patchable.ll 
b/llvm/test/CodeGen/AArch64/machine-outliner-patchable.ll
new file mode 100644
index ..e381b49ee8dc
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/machine-outliner-patchable.ll
@@ -0,0 +1,114 @@
+; RUN: llc < %s -verify-machineinstrs -enable-machine-outliner | FileCheck %s
+
+target triple = "aarch64-unknown-linux-gnu"
+
+declare void @foo(i32, i32, i32, i32) minsize
+
+;; TargetOpcode::FENTRY_CALL at the start of the function expands to a 
__fentry__
+;; call which must b

[llvm-branch-commits] [clang] d31f8cc - [AArch64] Avoid crashing on invalid -Wa, -march= values

[llvm-branch-commits] [llvm] 69fcfde - [AArch64][GlobalISel] Fix an crash in RBS due to a new regclass being added.

[llvm-branch-commits] [llvm] 0d44201 - [MachineOutliner] Don't outline functions starting with PATCHABLE_FUNCTION_ENTER/FENTRL_CALL

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