date:20210728

[llvm-branch-commits] [clang-tools-extra] 60e2a50 - [clang-tidy][docs][NFC] Fix broken link and ordering in ReleaseNotes.rst

2021-07-28 Thread via llvm-branch-commits


Author: Whisperity
Date: 2021-07-28T16:34:56+02:00
New Revision: 60e2a503e05a6e061ad75c1e9b69bbb00352926f

URL: 
https://github.com/llvm/llvm-project/commit/60e2a503e05a6e061ad75c1e9b69bbb00352926f
DIFF: 
https://github.com/llvm/llvm-project/commit/60e2a503e05a6e061ad75c1e9b69bbb00352926f.diff

LOG: [clang-tidy][docs][NFC] Fix broken link and ordering in ReleaseNotes.rst

Added: 


Modified: 
clang-tools-extra/docs/ReleaseNotes.rst

Removed: 




diff  --git a/clang-tools-extra/docs/ReleaseNotes.rst 
b/clang-tools-extra/docs/ReleaseNotes.rst
index b4d325cb553d..30d0319edd0b 100644
--- a/clang-tools-extra/docs/ReleaseNotes.rst
+++ b/clang-tools-extra/docs/ReleaseNotes.rst
@@ -84,16 +84,6 @@ Improvements to clang-tidy
 New checks
 ^^
 
-- New :doc:`bugprone-implicit-widening-of-multiplication-result
-  ` 
check.
-
-  Diagnoses instances of an implicit widening of multiplication result.
-
-- New :doc:`concurrency-thread-canceltype-asynchronous
-  ` check.
-
-  Finds ``pthread_setcanceltype`` function calls where a thread's cancellation
-  type is set to asynchronous.
 
 - New :doc:`altera-id-dependent-backward-branch
   ` check.
@@ -115,19 +105,30 @@ New checks
   other directly, making call sites prone to calling the function with
   swapped (or badly ordered) arguments.
 
-- New :doc:`cppcoreguidelines-prefer-member-initializer
-  ` check.
+- New :doc:`bugprone-implicit-widening-of-multiplication-result
+  ` 
check.
 
-  Finds member initializations in the constructor body which can be placed into
-  the initialization list instead.
+  Diagnoses instances of an implicit widening of multiplication result.
 
 - New :doc:`bugprone-unhandled-exception-at-new
   ` check.
 
   Finds calls to ``new`` with missing exception handler for ``std::bad_alloc``.
 
-- New `readability-suspicious-call-argument
-  `_ check
+- New :doc:`concurrency-thread-canceltype-asynchronous
+  ` check.
+
+  Finds ``pthread_setcanceltype`` function calls where a thread's cancellation
+  type is set to asynchronous.
+
+- New :doc:`cppcoreguidelines-prefer-member-initializer
+  ` check.
+
+  Finds member initializations in the constructor body which can be placed into
+  the initialization list instead.
+
+- New :doc:`readability-suspicious-call-argument
+  ` check.
 
   Finds function calls where the arguments passed are provided out of order,
   based on the 
diff erence between the argument name and the parameter names
@@ -161,7 +162,7 @@ Removed checks
 ^^
 
 - The readability-deleted-default check has been removed.
-  
+
   The clang warning `Wdefaulted-function-deleted
   
`_
   will diagnose the same issues and is enabled by default.



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[llvm-branch-commits] [llvm] 715e6b3 - check that r31/x31 is the frame register

2021-07-28 Thread Zarko Todorovski via llvm-branch-commits


Author: Zarko Todorovski
Date: 2021-07-28T11:24:42-04:00
New Revision: 715e6b3a7c7c69b712c0d4bb2704864cfbdc0c8f

URL: 
https://github.com/llvm/llvm-project/commit/715e6b3a7c7c69b712c0d4bb2704864cfbdc0c8f
DIFF: 
https://github.com/llvm/llvm-project/commit/715e6b3a7c7c69b712c0d4bb2704864cfbdc0c8f.diff

LOG: check that r31/x31 is the frame register

Added: 


Modified: 
llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp

Removed: 




diff  --git a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp 
b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
index d0109f9684462..77ff16ef00abe 100644
--- a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
+++ b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
@@ -2023,9 +2023,10 @@ void PPCAIXAsmPrinter::emitTracebackTable() {
   // Set the 4th byte of the mandatory field.
   FirstHalfOfMandatoryField |= TracebackTable::IsFunctionNamePresentMask;
 
-  static_assert(XCOFF::AllocRegNo == 31, "Unexpected register usage!");
-  if (MRI.isPhysRegUsed(Subtarget->isPPC64() ? PPC::X31 : PPC::R31,
-/* SkipRegMaskTest */ true))
+  const PPCRegisterInfo *RegInfo =
+  static_cast(Subtarget->getRegisterInfo());
+  Register FrameReg = RegInfo->getFrameRegister(*MF);
+  if (FrameReg == (Subtarget->isPPC64() ? PPC::X31 : PPC::R31))
 FirstHalfOfMandatoryField |= TracebackTable::IsAllocaUsedMask;
 
   const SmallVectorImpl &MustSaveCRs = FI->getMustSaveCRs();



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[llvm-branch-commits] [llvm] 67d0736 - Revert "[DebugInfo][LoopStrengthReduction] SCEV-based salvaging for LSR"

2021-07-28 Thread Chris Jackson via llvm-branch-commits


Author: Chris Jackson
Date: 2021-07-29T00:04:50+01:00
New Revision: 67d0736b14c7888e63af16dcc71129ce07383010

URL: 
https://github.com/llvm/llvm-project/commit/67d0736b14c7888e63af16dcc71129ce07383010
DIFF: 
https://github.com/llvm/llvm-project/commit/67d0736b14c7888e63af16dcc71129ce07383010.diff

LOG: Revert "[DebugInfo][LoopStrengthReduction] SCEV-based salvaging for LSR"
This was reverted due to a reported crash.
This reverts commit 796b84d26f4d461fb50e7b4e84e15a10eaca88fc.

Added: 


Modified: 
llvm/include/llvm/Transforms/Utils/ScalarEvolutionExpander.h
llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
llvm/test/Transforms/LoopStrengthReduce/dbg-preserve-0.ll
llvm/test/Transforms/LoopStrengthReduce/dbg-preserve-2.ll

Removed: 
llvm/test/Transforms/LoopStrengthReduce/debuginfo-scev-salvage-0.ll
llvm/test/Transforms/LoopStrengthReduce/debuginfo-scev-salvage-1.ll
llvm/test/Transforms/LoopStrengthReduce/debuginfo-scev-salvage-2.ll
llvm/test/Transforms/LoopStrengthReduce/debuginfo-scev-salvage-3.ll
llvm/test/Transforms/LoopStrengthReduce/debuginfo-scev-salvage-4.ll



diff  --git a/llvm/include/llvm/Transforms/Utils/ScalarEvolutionExpander.h 
b/llvm/include/llvm/Transforms/Utils/ScalarEvolutionExpander.h
index 59bf3a342caa..8662dbf385dc 100644
--- a/llvm/include/llvm/Transforms/Utils/ScalarEvolutionExpander.h
+++ b/llvm/include/llvm/Transforms/Utils/ScalarEvolutionExpander.h
@@ -83,9 +83,6 @@ class SCEVExpander : public SCEVVisitor {
   /// InsertedValues/InsertedPostIncValues.
   SmallPtrSet ReusedValues;
 
-  // The induction variables generated.
-  SmallVector InsertedIVs;
-
   /// A memoization of the "relevant" loop for a given SCEV.
   DenseMap RelevantLoops;
 
@@ -202,11 +199,9 @@ class SCEVExpander : public SCEVVisitor {
 InsertedPostIncValues.clear();
 ReusedValues.clear();
 ChainedPhis.clear();
-InsertedIVs.clear();
   }
 
   ScalarEvolution *getSE() { return &SE; }
-  const SmallVectorImpl &getInsertedIVs() const { return InsertedIVs; }
 
   /// Return a vector containing all instructions inserted during expansion.
   SmallVector getAllInsertedInstructions() const {

diff  --git a/llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp 
b/llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
index 5f210380ae5a..b585818af595 100644
--- a/llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
+++ b/llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
@@ -1981,9 +1981,6 @@ class LSRInstance {
   /// IV users that belong to profitable IVChains.
   SmallPtrSet IVIncSet;
 
-  /// Induction variables that were generated and inserted by the SCEV 
Expander.
-  SmallVector ScalarEvolutionIVs;
-
   void OptimizeShadowIV();
   bool FindIVUserForCond(ICmpInst *Cond, IVStrideUse *&CondUse);
   ICmpInst *OptimizeMax(ICmpInst *Cond, IVStrideUse* &CondUse);
@@ -2088,9 +2085,6 @@ class LSRInstance {
   TargetLibraryInfo &TLI, MemorySSAUpdater *MSSAU);
 
   bool getChanged() const { return Changed; }
-  const SmallVectorImpl &getScalarEvolutionIVs() const {
-return ScalarEvolutionIVs;
-  }
 
   void print_factors_and_types(raw_ostream &OS) const;
   void print_fixups(raw_ostream &OS) const;
@@ -5595,11 +5589,6 @@ void LSRInstance::ImplementSolution(
 GenerateIVChain(Chain, Rewriter, DeadInsts);
 Changed = true;
   }
-
-  for (const WeakVH &IV : Rewriter.getInsertedIVs())
-if (IV && dyn_cast(&*IV)->getParent())
-  ScalarEvolutionIVs.push_back(IV);
-
   // Clean up after ourselves. This must be done before deleting any
   // instructions.
   Rewriter.clear();
@@ -5870,389 +5859,87 @@ void 
LoopStrengthReduce::getAnalysisUsage(AnalysisUsage &AU) const {
   AU.addPreserved();
 }
 
-struct SCEVDbgValueBuilder {
-  SCEVDbgValueBuilder() = default;
-  SCEVDbgValueBuilder(const SCEVDbgValueBuilder &Base) {
-Values = Base.Values;
-Expr = Base.Expr;
-  }
-
-  /// The DIExpression as we translate the SCEV.
-  SmallVector Expr;
-  /// The location ops of the DIExpression.
-  SmallVector Values;
-
-  void pushOperator(uint64_t Op) { Expr.push_back(Op); }
-  void pushUInt(uint64_t Operand) { Expr.push_back(Operand); }
-
-  /// Add a DW_OP_LLVM_arg to the expression, followed by the index of the 
value
-  /// in the set of values referenced by the expression.
-  void pushValue(llvm::Value *V) {
-Expr.push_back(llvm::dwarf::DW_OP_LLVM_arg);
-auto *It =
-std::find(Values.begin(), Values.end(), llvm::ValueAsMetadata::get(V));
-unsigned ArgIndex = 0;
-if (It != Values.end()) {
-  ArgIndex = std::distance(Values.begin(), It);
-} else {
-  ArgIndex = Values.size();
-  Values.push_back(llvm::ValueAsMetadata::get(V));
-}
-Expr.push_back(ArgIndex);
-  }
-
-  void pushValue(const SCEVUnknown *U) {
-llvm::Value *V = cast(U)->getValue();
-pushValue(V);
-  }
-
-  void pushC

[llvm-branch-commits] [llvm] 76ad099 - add some comment

2021-07-28 Thread via llvm-branch-commits


Author: 董⼀峰
Date: 2021-07-29T10:19:28+08:00
New Revision: 76ad09983deafe9d2d0384b2a0b1244495e23400

URL: 
https://github.com/llvm/llvm-project/commit/76ad09983deafe9d2d0384b2a0b1244495e23400
DIFF: 
https://github.com/llvm/llvm-project/commit/76ad09983deafe9d2d0384b2a0b1244495e23400.diff

LOG: add some comment

Added: 


Modified: 
llvm/examples/HowToUseLLJIT/HowToUseLLJIT.cpp
llvm/include/llvm/CodeGen/MachineInstr.h
llvm/include/llvm/ExecutionEngine/Orc/ThreadSafeModule.h
llvm/include/llvm/MC/MCRegisterInfo.h
llvm/include/llvm/MC/MCSchedule.h
llvm/include/llvm/Target/Target.td
llvm/include/llvm/Target/TargetItinerary.td
llvm/include/llvm/Target/TargetMachine.h
llvm/include/llvm/Target/TargetSchedule.td
llvm/lib/Analysis/ValueTracking.cpp
llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
llvm/lib/CodeGen/StackMaps.cpp
llvm/lib/CodeGen/TargetSchedule.cpp
llvm/lib/Target/AArch64/AArch64SchedA64FX.td
llvm/lib/Target/BPF/BPFAsmPrinter.cpp
llvm/lib/Target/BPF/TargetInfo/BPFTargetInfo.cpp
llvm/test/CodeGen/AArch64/arm64-patchpoint.ll
llvm/utils/TableGen/CodeGenInstruction.cpp
llvm/utils/TableGen/CodeGenRegisters.cpp
llvm/utils/TableGen/CodeGenSchedule.cpp
llvm/utils/TableGen/CodeGenTarget.cpp

Removed: 




diff  --git a/llvm/examples/HowToUseLLJIT/HowToUseLLJIT.cpp 
b/llvm/examples/HowToUseLLJIT/HowToUseLLJIT.cpp
index c3ab7e6c1adb8..170a899136054 100644
--- a/llvm/examples/HowToUseLLJIT/HowToUseLLJIT.cpp
+++ b/llvm/examples/HowToUseLLJIT/HowToUseLLJIT.cpp
@@ -40,7 +40,7 @@ ExitOnError ExitOnErr;
 
 ThreadSafeModule createDemoModule() {
   auto Context = std::make_unique();
-xo  auto M = std::make_unique("test", *Context);
+  auto M = std::make_unique("test", *Context);
 
   // Create the add1 function entry and insert this entry into module M.  The
   // function will have a return type of "int" and take an argument of "int".

diff  --git a/llvm/include/llvm/CodeGen/MachineInstr.h 
b/llvm/include/llvm/CodeGen/MachineInstr.h
index 7fc1576fe5a09..2f62da932bba1 100644
--- a/llvm/include/llvm/CodeGen/MachineInstr.h
+++ b/llvm/include/llvm/CodeGen/MachineInstr.h
@@ -559,7 +559,7 @@ class MachineInstr
 
   /// Returns the total number of definitions.
   unsigned getNumDefs() const {
-return getNumExplicitDefs() + MCID->getNumImplicitDefs();
+return getNumExplicitDefs() + MCID->getNumImplicitDefs();   // 
一条指令的定义数量取决于显示和隐式两种定义。
   }
 
   /// Returns true if the instruction has implicit definition.

diff  --git a/llvm/include/llvm/ExecutionEngine/Orc/ThreadSafeModule.h 
b/llvm/include/llvm/ExecutionEngine/Orc/ThreadSafeModule.h
index d4960ab8b0bbf..bb07d0f1e2325 100644
--- a/llvm/include/llvm/ExecutionEngine/Orc/ThreadSafeModule.h
+++ b/llvm/include/llvm/ExecutionEngine/Orc/ThreadSafeModule.h
@@ -84,7 +84,7 @@ class ThreadSafeModule {
 
   ThreadSafeModule &operator=(ThreadSafeModule &&Other) {
 // We have to explicitly define this move operator to copy the fields in
-// reverse order (i.e. module first) to ensure the dependencies are
+// reverse order (i.e. module first) to ensure theo dependencies are
 // protected: The old module that is being overwritten must be destroyed
 // *before* the context that it depends on.
 // We also need to lock the context to make sure the module tear-down

diff  --git a/llvm/include/llvm/MC/MCRegisterInfo.h 
b/llvm/include/llvm/MC/MCRegisterInfo.h
index 65436dc74c3e2..7a58b7e1c875f 100644
--- a/llvm/include/llvm/MC/MCRegisterInfo.h
+++ b/llvm/include/llvm/MC/MCRegisterInfo.h
@@ -101,7 +101,7 @@ class MCRegisterClass {
 /// of AX. The SuperRegs field is a zero terminated array of registers that are
 /// super-registers of the specific register, e.g. RAX, EAX, are
 /// super-registers of AX.
-///
+///   用来描述当前寄存器的状态。 tablegen和cpp代码之间的链接结构体。
 struct MCRegisterDesc {
   uint32_t Name;  // Printable name for the reg (for debugging)
   uint32_t SubRegs;   // Sub-register set, described above

diff  --git a/llvm/include/llvm/MC/MCSchedule.h 
b/llvm/include/llvm/MC/MCSchedule.h
index acfbfd387ff35..d98e73aded675 100644
--- a/llvm/include/llvm/MC/MCSchedule.h
+++ b/llvm/include/llvm/MC/MCSchedule.h
@@ -61,6 +61,7 @@ struct MCProcResourceDesc {
 
 /// Identify one of the processor resource kinds consumed by a particular
 /// scheduling class for the specified number of cycles.
+// 用于描述指定调度类型在指定周期数里消耗指定处理器资源
 struct MCWriteProcResEntry {
   uint16_t ProcResourceIdx;
   uint16_t Cycles;
@@ -75,6 +76,7 @@ struct MCWriteProcResEntry {
 /// an instruction with invalid latency to have infinite latency.  Also 
identify
 /// the WriteResources of this def. When the operand expands to a sequence of
 /// writes, this ID is the last write in the

[llvm-branch-commits] [llvm] 26c2169 - add some comment for jit component

2021-07-28 Thread via llvm-branch-commits


Author: 董⼀峰
Date: 2021-07-13T18:22:28+08:00
New Revision: 26c2169a10989277ff01b9f1d3c44a1ab4cbfd9c

URL: 
https://github.com/llvm/llvm-project/commit/26c2169a10989277ff01b9f1d3c44a1ab4cbfd9c
DIFF: 
https://github.com/llvm/llvm-project/commit/26c2169a10989277ff01b9f1d3c44a1ab4cbfd9c.diff

LOG: add some comment for jit component

Added: 
llvm/examples/OrcV2Examples/LLJITWithReexports/CMakeLists.txt
llvm/examples/OrcV2Examples/LLJITWithReexports/LLJITWithReexports.cpp

Modified: 
llvm/examples/HowToUseLLJIT/HowToUseLLJIT.cpp
llvm/examples/OrcV2Examples/CMakeLists.txt
llvm/examples/OrcV2Examples/ExampleModules.h

llvm/examples/OrcV2Examples/LLJITWithLazyReexports/LLJITWithLazyReexports.cpp
llvm/include/llvm/ExecutionEngine/JITLink/JITLink.h
llvm/include/llvm/ExecutionEngine/Orc/Core.h
llvm/lib/ExecutionEngine/JITLink/EHFrameSupport.cpp
llvm/lib/ExecutionEngine/JITLink/ELF.cpp
llvm/lib/ExecutionEngine/JITLink/ELFLinkGraphBuilder.h
llvm/lib/ExecutionEngine/JITLink/ELF_x86_64.cpp
llvm/lib/ExecutionEngine/JITLink/JITLinkGeneric.cpp
llvm/lib/ExecutionEngine/Orc/Core.cpp
llvm/lib/ExecutionEngine/Orc/ExecutionUtils.cpp
llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
llvm/lib/ExecutionEngine/Orc/Layer.cpp
llvm/lib/ExecutionEngine/Orc/LazyReexports.cpp

Removed: 




diff  --git a/llvm/examples/HowToUseLLJIT/HowToUseLLJIT.cpp 
b/llvm/examples/HowToUseLLJIT/HowToUseLLJIT.cpp
index 170a899136054..c3ab7e6c1adb8 100644
--- a/llvm/examples/HowToUseLLJIT/HowToUseLLJIT.cpp
+++ b/llvm/examples/HowToUseLLJIT/HowToUseLLJIT.cpp
@@ -40,7 +40,7 @@ ExitOnError ExitOnErr;
 
 ThreadSafeModule createDemoModule() {
   auto Context = std::make_unique();
-  auto M = std::make_unique("test", *Context);
+xo  auto M = std::make_unique("test", *Context);
 
   // Create the add1 function entry and insert this entry into module M.  The
   // function will have a return type of "int" and take an argument of "int".

diff  --git a/llvm/examples/OrcV2Examples/CMakeLists.txt 
b/llvm/examples/OrcV2Examples/CMakeLists.txt
index 59311f8fbf1c0..6ea3555db4dcd 100644
--- a/llvm/examples/OrcV2Examples/CMakeLists.txt
+++ b/llvm/examples/OrcV2Examples/CMakeLists.txt
@@ -2,6 +2,7 @@ add_subdirectory(LLJITDumpObjects)
 add_subdirectory(LLJITWithCustomObjectLinkingLayer)
 add_subdirectory(LLJITWithGDBRegistrationListener)
 add_subdirectory(LLJITWithInitializers)
+add_subdirectory(LLJITWithReexports)
 add_subdirectory(LLJITWithLazyReexports)
 add_subdirectory(LLJITWithObjectCache)
 add_subdirectory(LLJITWithObjectLinkingLayerPlugin)

diff  --git a/llvm/examples/OrcV2Examples/ExampleModules.h 
b/llvm/examples/OrcV2Examples/ExampleModules.h
index 53da756e15f78..a59d8ab042daf 100644
--- a/llvm/examples/OrcV2Examples/ExampleModules.h
+++ b/llvm/examples/OrcV2Examples/ExampleModules.h
@@ -24,11 +24,80 @@
 
 const llvm::StringRef Add1Example =
 R"(
-  define i32 @add1(i32 %x) {
-  entry:
-%r = add nsw i32 %x, 1
-ret i32 %r
-  }
+
+; Function Attrs: noinline nounwind optnone ssp uwtable
+define i32 @op1(i32 %0, i32 %1) {
+  %3 = alloca i32, align 4
+  %4 = alloca i32, align 4
+  store i32 %0, i32* %3, align 4
+  store i32 %1, i32* %4, align 4
+  %5 = load i32, i32* %3, align 4
+  %6 = load i32, i32* %4, align 4
+  %7 = add nsw i32 %5, %6
+  ret i32 %7
+}
+
+; Function Attrs: noinline nounwind optnone ssp uwtable
+define i32 @op2(i32 %0, i32 %1)  {
+  %3 = alloca i32, align 4
+  %4 = alloca i32, align 4
+  store i32 %0, i32* %3, align 4
+  store i32 %1, i32* %4, align 4
+  %5 = load i32, i32* %3, align 4
+  %6 = load i32, i32* %4, align 4
+  %7 = mul nsw i32 %5, %6
+  ret i32 %7
+}
+
+; Function Attrs: noinline nounwind optnone ssp uwtable
+define i32 @add1(i32 %0, i32 %1) {
+  %3 = alloca i32, align 4
+  %4 = alloca i32, align 4
+  %5 = alloca i32, align 4
+  store i32 %0, i32* %4, align 4
+  store i32 %1, i32* %5, align 4
+  %6 = load i32, i32* %4, align 4
+  %7 = load i32, i32* %5, align 4
+  %8 = sub nsw i32 %6, %7
+  %9 = icmp sgt i32 %8, 0
+  br i1 %9, label %10, label %14
+
+10:   ; preds = %2
+  %11 = load i32, i32* %4, align 4
+  %12 = load i32, i32* %5, align 4
+  %13 = call i32 @op1(i32 %11, i32 %12)
+  store i32 %13, i32* %3, align 4
+  br label %28
+
+14:   ; preds = %2
+  %15 = load i32, i32* %4, align 4
+  %16 = load i32, i32* %5, align 4
+  %17 = srem i32 %15, %16
+  %18 = icmp eq i32 %17, 2
+  br i1 %18, label %19, label %23
+
+19:   ; preds = %14
+  %20 = load i32, i32* %4, align 4
+  %21 = load i32, i32* %5, align 4
+  %22 = call i32 @op2(i32 %20, i32 %21)
+  store i32 %22, i32* %3, align 4
+  br label %28
+
+23:   ; preds = %14
+  br label %24
+
+24:   ; preds = %23
+  %25 = lo

[llvm-branch-commits] [libcxx] 1d99cad - [libc++][doc] Update the release notes

2021-07-28 Thread Mark de Wever via llvm-branch-commits


Author: Mark de Wever
Date: 2021-07-29T07:48:47+02:00
New Revision: 1d99cadfbc58057a9a1503172439a20aa41b004b

URL: 
https://github.com/llvm/llvm-project/commit/1d99cadfbc58057a9a1503172439a20aa41b004b
DIFF: 
https://github.com/llvm/llvm-project/commit/1d99cadfbc58057a9a1503172439a20aa41b004b.diff

LOG: [libc++][doc] Update the release notes

Differential Revision: https://reviews.llvm.org/D106770

Added: 


Modified: 
libcxx/docs/BuildingLibcxx.rst
libcxx/docs/ReleaseNotes.rst
libcxx/docs/index.rst

Removed: 




diff  --git a/libcxx/docs/BuildingLibcxx.rst b/libcxx/docs/BuildingLibcxx.rst
index 399f00be0abc2..a29a05b8f7f7b 100644
--- a/libcxx/docs/BuildingLibcxx.rst
+++ b/libcxx/docs/BuildingLibcxx.rst
@@ -246,10 +246,10 @@ libc++ specific options
 
 .. option:: LIBCXX_ENABLE_FILESYSTEM:BOOL
 
-   **Default**: ``ON`` except on Windows.
+   **Default**: ``ON`` except on Windows when using MSVC.
 
This option can be used to enable or disable the filesystem components on
-   platforms that may not support them. For example on Windows.
+   platforms that may not support them. For example on Windows when using MSVC.
 
 .. option:: LIBCXX_ENABLE_INCOMPLETE_FEATURES:BOOL
 

diff  --git a/libcxx/docs/ReleaseNotes.rst b/libcxx/docs/ReleaseNotes.rst
index 768741418aa2f..fc58a598957b1 100644
--- a/libcxx/docs/ReleaseNotes.rst
+++ b/libcxx/docs/ReleaseNotes.rst
@@ -35,10 +35,37 @@ see the `releases page `_.
 What's New in Libc++ 13.0.0?
 
 
+- Support for older compilers has been removed. Several additional platforms
+  are now officially supported. :ref:`platform_and_compiler_support` contains
+  the complete overview of platforms and compilers supported by libc++.
+- The large headers , , and  have
+  been split in more granular headers. This reduces the size of included code
+  when using libc++. This may lead to missing includes after upgrading to
+  libc++13.
+
 New Features
 
 
-- ...
+- ``std::filesystem`` is now feature complete for the Windows platform using
+  MinGW. MSVC isn't supported since it lacks 128-bit integer support.
+- The implementation of the C++20 concepts library has been completed.
+- Several C++20 ``constexpr`` papers have been completed:
+
+  - `P0879R0 `_ ``constexpr`` for ``std::swap()``
+and swap related functions
+  - `P1032R1 `_ Misc ``constexpr`` bits
+  - `P0883 `_ Fixing Atomic Initialization
+
+- More C++20 features have been implemented. :doc:`Status/Cxx20` has the full
+  overview of libc++'s C++20 implementation status.
+- More C++2b features have been implemented. :doc:`Status/Cxx2b` has the
+  full overview of libc++'s C++2b implementation status.
+- The CMake option ``LIBCXX_ENABLE_INCOMPLETE_FEATURES`` has been added. This
+  option allows libc++ vendors to disable headers that aren't production
+  quality yet. Currently, turning the option off disables the headers
+   and .
+- The documentation conversion from html to restructured text has been
+  completed.
 
 API Changes
 ---

diff  --git a/libcxx/docs/index.rst b/libcxx/docs/index.rst
index d4205a1bcc275..c52e42b146b9d 100644
--- a/libcxx/docs/index.rst
+++ b/libcxx/docs/index.rst
@@ -91,6 +91,7 @@ reasons, but some of the major ones are:
   Further, both projects are apparently abandoned: STLport 5.2.1 was
   released in Oct'08, and STDCXX 4.2.1 in May'08.
 
+.. _platform_and_compiler_support:
 
 Platform and Compiler Support
 =



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[llvm-branch-commits] [clang-tools-extra] 60e2a50 - [clang-tidy][docs][NFC] Fix broken link and ordering in ReleaseNotes.rst

[llvm-branch-commits] [llvm] 715e6b3 - check that r31/x31 is the frame register

[llvm-branch-commits] [llvm] 67d0736 - Revert "[DebugInfo][LoopStrengthReduction] SCEV-based salvaging for LSR"

[llvm-branch-commits] [llvm] 76ad099 - add some comment

[llvm-branch-commits] [llvm] 26c2169 - add some comment for jit component

[llvm-branch-commits] [libcxx] 1d99cad - [libc++][doc] Update the release notes

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