[llvm-branch-commits] [llvm] 26c2169 - add some comment for jit component
Author: 董⼀峰
Date: 2021-07-13T18:22:28+08:00
New Revision: 26c2169a10989277ff01b9f1d3c44a1ab4cbfd9c
URL:
https://github.com/llvm/llvm-project/commit/26c2169a10989277ff01b9f1d3c44a1ab4cbfd9c
DIFF:
https://github.com/llvm/llvm-project/commit/26c2169a10989277ff01b9f1d3c44a1ab4cbfd9c.diff
LOG: add some comment for jit component
Added:
llvm/examples/OrcV2Examples/LLJITWithReexports/CMakeLists.txt
llvm/examples/OrcV2Examples/LLJITWithReexports/LLJITWithReexports.cpp
Modified:
llvm/examples/HowToUseLLJIT/HowToUseLLJIT.cpp
llvm/examples/OrcV2Examples/CMakeLists.txt
llvm/examples/OrcV2Examples/ExampleModules.h
llvm/examples/OrcV2Examples/LLJITWithLazyReexports/LLJITWithLazyReexports.cpp
llvm/include/llvm/ExecutionEngine/JITLink/JITLink.h
llvm/include/llvm/ExecutionEngine/Orc/Core.h
llvm/lib/ExecutionEngine/JITLink/EHFrameSupport.cpp
llvm/lib/ExecutionEngine/JITLink/ELF.cpp
llvm/lib/ExecutionEngine/JITLink/ELFLinkGraphBuilder.h
llvm/lib/ExecutionEngine/JITLink/ELF_x86_64.cpp
llvm/lib/ExecutionEngine/JITLink/JITLinkGeneric.cpp
llvm/lib/ExecutionEngine/Orc/Core.cpp
llvm/lib/ExecutionEngine/Orc/ExecutionUtils.cpp
llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
llvm/lib/ExecutionEngine/Orc/Layer.cpp
llvm/lib/ExecutionEngine/Orc/LazyReexports.cpp
Removed:
diff --git a/llvm/examples/HowToUseLLJIT/HowToUseLLJIT.cpp
b/llvm/examples/HowToUseLLJIT/HowToUseLLJIT.cpp
index 170a899136054..c3ab7e6c1adb8 100644
--- a/llvm/examples/HowToUseLLJIT/HowToUseLLJIT.cpp
+++ b/llvm/examples/HowToUseLLJIT/HowToUseLLJIT.cpp
@@ -40,7 +40,7 @@ ExitOnError ExitOnErr;
ThreadSafeModule createDemoModule() {
auto Context = std::make_unique();
- auto M = std::make_unique("test", *Context);
+xo auto M = std::make_unique("test", *Context);
// Create the add1 function entry and insert this entry into module M. The
// function will have a return type of "int" and take an argument of "int".
diff --git a/llvm/examples/OrcV2Examples/CMakeLists.txt
b/llvm/examples/OrcV2Examples/CMakeLists.txt
index 59311f8fbf1c0..6ea3555db4dcd 100644
--- a/llvm/examples/OrcV2Examples/CMakeLists.txt
+++ b/llvm/examples/OrcV2Examples/CMakeLists.txt
@@ -2,6 +2,7 @@ add_subdirectory(LLJITDumpObjects)
add_subdirectory(LLJITWithCustomObjectLinkingLayer)
add_subdirectory(LLJITWithGDBRegistrationListener)
add_subdirectory(LLJITWithInitializers)
+add_subdirectory(LLJITWithReexports)
add_subdirectory(LLJITWithLazyReexports)
add_subdirectory(LLJITWithObjectCache)
add_subdirectory(LLJITWithObjectLinkingLayerPlugin)
diff --git a/llvm/examples/OrcV2Examples/ExampleModules.h
b/llvm/examples/OrcV2Examples/ExampleModules.h
index 53da756e15f78..a59d8ab042daf 100644
--- a/llvm/examples/OrcV2Examples/ExampleModules.h
+++ b/llvm/examples/OrcV2Examples/ExampleModules.h
@@ -24,11 +24,80 @@
const llvm::StringRef Add1Example =
R"(
- define i32 @add1(i32 %x) {
- entry:
-%r = add nsw i32 %x, 1
-ret i32 %r
- }
+
+; Function Attrs: noinline nounwind optnone ssp uwtable
+define i32 @op1(i32 %0, i32 %1) {
+ %3 = alloca i32, align 4
+ %4 = alloca i32, align 4
+ store i32 %0, i32* %3, align 4
+ store i32 %1, i32* %4, align 4
+ %5 = load i32, i32* %3, align 4
+ %6 = load i32, i32* %4, align 4
+ %7 = add nsw i32 %5, %6
+ ret i32 %7
+}
+
+; Function Attrs: noinline nounwind optnone ssp uwtable
+define i32 @op2(i32 %0, i32 %1) {
+ %3 = alloca i32, align 4
+ %4 = alloca i32, align 4
+ store i32 %0, i32* %3, align 4
+ store i32 %1, i32* %4, align 4
+ %5 = load i32, i32* %3, align 4
+ %6 = load i32, i32* %4, align 4
+ %7 = mul nsw i32 %5, %6
+ ret i32 %7
+}
+
+; Function Attrs: noinline nounwind optnone ssp uwtable
+define i32 @add1(i32 %0, i32 %1) {
+ %3 = alloca i32, align 4
+ %4 = alloca i32, align 4
+ %5 = alloca i32, align 4
+ store i32 %0, i32* %4, align 4
+ store i32 %1, i32* %5, align 4
+ %6 = load i32, i32* %4, align 4
+ %7 = load i32, i32* %5, align 4
+ %8 = sub nsw i32 %6, %7
+ %9 = icmp sgt i32 %8, 0
+ br i1 %9, label %10, label %14
+
+10: ; preds = %2
+ %11 = load i32, i32* %4, align 4
+ %12 = load i32, i32* %5, align 4
+ %13 = call i32 @op1(i32 %11, i32 %12)
+ store i32 %13, i32* %3, align 4
+ br label %28
+
+14: ; preds = %2
+ %15 = load i32, i32* %4, align 4
+ %16 = load i32, i32* %5, align 4
+ %17 = srem i32 %15, %16
+ %18 = icmp eq i32 %17, 2
+ br i1 %18, label %19, label %23
+
+19: ; preds = %14
+ %20 = load i32, i32* %4, align 4
+ %21 = load i32, i32* %5, align 4
+ %22 = call i32 @op2(i32 %20, i32 %21)
+ store i32 %22, i32* %3, align 4
+ br label %28
+
+23: ; preds = %14
+ br label %24
+
+24: ; preds = %23
+ %25 = lo
[llvm-branch-commits] [llvm] ffa2430 - Init implementation
Author: Albion Fung
Date: 2021-07-13T20:00:05-05:00
New Revision: ffa243081676383b5b3dc0f7b63cb19ec55d92be
URL:
https://github.com/llvm/llvm-project/commit/ffa243081676383b5b3dc0f7b63cb19ec55d92be
DIFF:
https://github.com/llvm/llvm-project/commit/ffa243081676383b5b3dc0f7b63cb19ec55d92be.diff
LOG: Init implementation
Added:
Modified:
clang/include/clang/Basic/BuiltinsPPC.def
clang/lib/Basic/Targets/PPC.cpp
clang/lib/CodeGen/CGBuiltin.cpp
llvm/include/llvm/IR/IntrinsicsPowerPC.td
llvm/lib/Target/PowerPC/PPCInstr64Bit.td
llvm/lib/Target/PowerPC/PPCInstrInfo.td
Removed:
diff --git a/clang/include/clang/Basic/BuiltinsPPC.def
b/clang/include/clang/Basic/BuiltinsPPC.def
index 09769b3f974e..b8a14f85a4bd 100644
--- a/clang/include/clang/Basic/BuiltinsPPC.def
+++ b/clang/include/clang/Basic/BuiltinsPPC.def
@@ -83,6 +83,7 @@ BUILTIN(__builtin_ppc_mulhwu, "UiUiUi", "")
BUILTIN(__builtin_ppc_maddhd, "LLiLLiLLiLLi", "")
BUILTIN(__builtin_ppc_maddhdu, "ULLiULLiULLiULLi", "")
BUILTIN(__builtin_ppc_maddld, "LLiLLiLLiLLi", "")
+BUILTIN(__builtin_ppc_mfspr, "ULiiC", "")
BUILTIN(__builtin_ppc_get_timebase, "ULLi", "n")
diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
index b79b30d7a4cd..2ecafa095dac 100644
--- a/clang/lib/Basic/Targets/PPC.cpp
+++ b/clang/lib/Basic/Targets/PPC.cpp
@@ -140,6 +140,7 @@ static void defineXLCompatMacros(MacroBuilder &Builder) {
Builder.defineMacro("__maddhd", "__builtin_ppc_maddhd");
Builder.defineMacro("__maddhdu", "__builtin_ppc_maddhdu");
Builder.defineMacro("__maddld", "__builtin_ppc_maddld");
+ Builder.defineMacro("__mfspr", "__builtin_ppc_mfspr");
}
/// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific
diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index baa143695418..94ebb60fdd19 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -15463,7 +15463,6 @@ Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned
BuiltinID,
return Builder.CreateExtractElement(Unpacked, Index);
}
-
// The PPC MMA builtins take a pointer to a __vector_quad as an argument.
// Some of the MMA instructions accumulate their result into an existing
// accumulator whereas the others generate a new accumulator. So we need to
@@ -15575,6 +15574,18 @@ Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned
BuiltinID,
case PPC::BI__builtin_ppc_ldarx:
case PPC::BI__builtin_ppc_lwarx:
return emitPPCLoadReserveIntrinsic(*this, BuiltinID, E);
+ case PPC::BI__builtin_ppc_mfspr: {
+dbgs() <<"Hello\n";
+llvm::Type *src0 = EmitScalarExpr(E->getArg(0))->getType();
+src0->dump();
+dbgs() << "Ops size: " << Ops.size() << "\n";
+Function *F = CGM.getIntrinsic(Intrinsic::ppc_mfspr, src0);
+// uint64_t Imm = cast(Ops[0])->getZExtValue();
+// Ops[0] = llvm::ConstantInt::get(Int32Ty, Imm);
+Value *temp = Builder.CreateCall(F, Ops);
+temp->dump();
+return temp;
+ }
}
}
diff --git a/llvm/include/llvm/IR/IntrinsicsPowerPC.td
b/llvm/include/llvm/IR/IntrinsicsPowerPC.td
index b021b43afe59..2e5600e68f53 100644
--- a/llvm/include/llvm/IR/IntrinsicsPowerPC.td
+++ b/llvm/include/llvm/IR/IntrinsicsPowerPC.td
@@ -1598,5 +1598,7 @@ let TargetPrefix = "ppc" in {
def int_ppc_maddld
: GCCBuiltin<"__builtin_ppc_maddld">,
Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty, llvm_i64_ty],
[IntrNoMem]>;
+
+ def int_ppc_mfspr : Intrinsic<[llvm_anyint_ty], [llvm_i32_ty],
[ImmArg>]>;
}
diff --git a/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
b/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
index 496f76b69d2e..a709b496d75e 100644
--- a/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
+++ b/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
@@ -412,7 +412,6 @@ def MFSPR8 : XFXForm_1<31, 339, (outs g8rc:$RT), (ins
i32imm:$SPR),
def MTSPR8 : XFXForm_1<31, 467, (outs), (ins i32imm:$SPR, g8rc:$RT),
"mtspr $SPR, $RT", IIC_SprMTSPR>;
-
//===--===//
// 64-bit SPR manipulation instrs.
@@ -1749,3 +1748,5 @@ def : Pat<(int_ppc_tdw g8rc:$A, g8rc:$B, i32:$IMM),
// trapd
def : Pat<(int_ppc_trapd g8rc:$A),
(TDI 24, $A, 0)>;
+def : Pat<(i32 (int_ppc_mfspr i32:$SPR)),
+ (MFSPR $SPR)>;
diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.td
b/llvm/lib/Target/PowerPC/PPCInstrInfo.td
index d97881fe818b..6d592c9f9953 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.td
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.td
@@ -5445,3 +5445,5 @@ def : Pat<(int_ppc_fctudz f64:$A),
(XSCVDPUXDS $A)>;
def : Pat<(int_ppc_fctuwz f64:$A),
(XSCVDPUXWS $A)>;
+def : Pat<(i32 (int_ppc_mfspr i32:$SPR)),
+ (MFSPR $SPR)>;
___
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[llvm-branch-commits] [clang] 09df619 - Implementation of STBCX
Author: Albion Fung
Date: 2021-07-13T21:30:09-05:00
New Revision: 09df6199e796f9855c3fbc78df0eb42ff278cdb2
URL:
https://github.com/llvm/llvm-project/commit/09df6199e796f9855c3fbc78df0eb42ff278cdb2
DIFF:
https://github.com/llvm/llvm-project/commit/09df6199e796f9855c3fbc78df0eb42ff278cdb2.diff
LOG: Implementation of STBCX
Added:
Modified:
clang/include/clang/Basic/BuiltinsPPC.def
clang/lib/Basic/Targets/PPC.cpp
clang/lib/CodeGen/CGBuiltin.cpp
llvm/include/llvm/IR/IntrinsicsPowerPC.td
llvm/lib/Target/PowerPC/PPCInstrInfo.td
Removed:
diff --git a/clang/include/clang/Basic/BuiltinsPPC.def
b/clang/include/clang/Basic/BuiltinsPPC.def
index 09769b3f974e..a214c4e1cc7b 100644
--- a/clang/include/clang/Basic/BuiltinsPPC.def
+++ b/clang/include/clang/Basic/BuiltinsPPC.def
@@ -58,6 +58,7 @@ BUILTIN(__builtin_ppc_fetch_and_swaplp, "ULiULiD*ULi", "")
BUILTIN(__builtin_ppc_ldarx, "LiLiD*", "")
BUILTIN(__builtin_ppc_lwarx, "iiD*", "")
BUILTIN(__builtin_ppc_stdcx, "iLiD*Li", "")
+BUILTIN(__builtin_ppc_stbcx, "icD*c", "")
BUILTIN(__builtin_ppc_stwcx, "iiD*i", "")
BUILTIN(__builtin_ppc_tdw, "vLLiLLiIUi", "")
BUILTIN(__builtin_ppc_tw, "viiIUi", "")
diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
index b79b30d7a4cd..a428f0c3a9f7 100644
--- a/clang/lib/Basic/Targets/PPC.cpp
+++ b/clang/lib/Basic/Targets/PPC.cpp
@@ -118,6 +118,7 @@ static void defineXLCompatMacros(MacroBuilder &Builder) {
Builder.defineMacro("__lwarx", "__builtin_ppc_lwarx");
Builder.defineMacro("__stdcx", "__builtin_ppc_stdcx");
Builder.defineMacro("__stwcx", "__builtin_ppc_stwcx");
+ Builder.defineMacro("__stbcx", "__builtin_ppc_stbcx");
Builder.defineMacro("__tdw", "__builtin_ppc_tdw");
Builder.defineMacro("__tw", "__builtin_ppc_tw");
Builder.defineMacro("__trap", "__builtin_ppc_trap");
diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index baa143695418..b886f270615e 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -15575,6 +15575,21 @@ Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned
BuiltinID,
case PPC::BI__builtin_ppc_ldarx:
case PPC::BI__builtin_ppc_lwarx:
return emitPPCLoadReserveIntrinsic(*this, BuiltinID, E);
+ case PPC::BI__builtin_ppc_stbcx: {
+llvm::Function *F = CGM.getIntrinsic(Intrinsic::ppc_stbcx);
+Ops[0] = Builder.CreateBitCast(Ops[0], Int8PtrTy);
+auto Signed = getIntegerWidthAndSignedness(CGM.getContext(),
+ E->getArg(1)->getType()).Signed;
+
+if (Signed) {
+ dbgs() << "SIGNED\n";
+ Ops[1] = Builder.CreateSExt(Ops[1], Int32Ty);
+} else {
+ dbgs() << "UNSIGNED\n";
+ Ops[1] = Builder.CreateZExt(Ops[1], Int32Ty);
+}
+return Builder.CreateCall(F, Ops);
+ }
}
}
diff --git a/llvm/include/llvm/IR/IntrinsicsPowerPC.td
b/llvm/include/llvm/IR/IntrinsicsPowerPC.td
index b021b43afe59..d95823ef59c5 100644
--- a/llvm/include/llvm/IR/IntrinsicsPowerPC.td
+++ b/llvm/include/llvm/IR/IntrinsicsPowerPC.td
@@ -1565,6 +1565,7 @@ let TargetPrefix = "ppc" in {
def int_ppc_stwcx : GCCBuiltin<"__builtin_ppc_stwcx">,
Intrinsic<[llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty],
[IntrWriteMem]>;
+ def int_ppc_stbcx : Intrinsic<[llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty],
[IntrWriteMem]>;
// compare
def int_ppc_cmpeqb
: GCCBuiltin<"__builtin_ppc_cmpeqb">,
diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.td
b/llvm/lib/Target/PowerPC/PPCInstrInfo.td
index d97881fe818b..2e8ca2df241e 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.td
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.td
@@ -5445,3 +5445,5 @@ def : Pat<(int_ppc_fctudz f64:$A),
(XSCVDPUXDS $A)>;
def : Pat<(int_ppc_fctuwz f64:$A),
(XSCVDPUXWS $A)>;
+def : Pat<(int_ppc_stbcx xoaddr:$dst, gprc:$A),
+ (STBCX gprc:$A, xoaddr:$dst)>;
___
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[llvm-branch-commits] [clang] 7af1432 - Working (ish) version
Author: Albion Fung
Date: 2021-07-13T21:57:27-05:00
New Revision: 7af1432f63a2fe3d8902a5486eba5ba25dd3f509
URL:
https://github.com/llvm/llvm-project/commit/7af1432f63a2fe3d8902a5486eba5ba25dd3f509
DIFF:
https://github.com/llvm/llvm-project/commit/7af1432f63a2fe3d8902a5486eba5ba25dd3f509.diff
LOG: Working (ish) version
Added:
Modified:
clang/lib/CodeGen/CGBuiltin.cpp
llvm/include/llvm/IR/IntrinsicsPowerPC.td
llvm/lib/Target/PowerPC/PPCInstr64Bit.td
Removed:
diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index 94ebb60fdd19..2dccd17bb8ee 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -15575,15 +15575,10 @@ Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned
BuiltinID,
case PPC::BI__builtin_ppc_lwarx:
return emitPPCLoadReserveIntrinsic(*this, BuiltinID, E);
case PPC::BI__builtin_ppc_mfspr: {
-dbgs() <<"Hello\n";
-llvm::Type *src0 = EmitScalarExpr(E->getArg(0))->getType();
-src0->dump();
-dbgs() << "Ops size: " << Ops.size() << "\n";
-Function *F = CGM.getIntrinsic(Intrinsic::ppc_mfspr, src0);
-// uint64_t Imm = cast(Ops[0])->getZExtValue();
-// Ops[0] = llvm::ConstantInt::get(Int32Ty, Imm);
+// llvm::Type *src0 = EmitScalarExpr(E->getArg(0))->getType();
+dbgs() << "Width: " << Ops[0]->getType()->getPrimitiveSizeInBits() << "\n";
+Function *F = CGM.getIntrinsic(Intrinsic::ppc_mfspr, Int64Ty);
Value *temp = Builder.CreateCall(F, Ops);
-temp->dump();
return temp;
}
}
diff --git a/llvm/include/llvm/IR/IntrinsicsPowerPC.td
b/llvm/include/llvm/IR/IntrinsicsPowerPC.td
index 2e5600e68f53..c1b421e168a6 100644
--- a/llvm/include/llvm/IR/IntrinsicsPowerPC.td
+++ b/llvm/include/llvm/IR/IntrinsicsPowerPC.td
@@ -1599,6 +1599,6 @@ let TargetPrefix = "ppc" in {
: GCCBuiltin<"__builtin_ppc_maddld">,
Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty, llvm_i64_ty],
[IntrNoMem]>;
- def int_ppc_mfspr : Intrinsic<[llvm_anyint_ty], [llvm_i32_ty],
[ImmArg>]>;
+ def int_ppc_mfspr : Intrinsic<[llvm_anyint_ty], [llvm_i32_ty],
[ImmArg>]>;
}
diff --git a/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
b/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
index a709b496d75e..d245cc596e64 100644
--- a/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
+++ b/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
@@ -1748,5 +1748,5 @@ def : Pat<(int_ppc_tdw g8rc:$A, g8rc:$B, i32:$IMM),
// trapd
def : Pat<(int_ppc_trapd g8rc:$A),
(TDI 24, $A, 0)>;
-def : Pat<(i32 (int_ppc_mfspr i32:$SPR)),
- (MFSPR $SPR)>;
+def : Pat<(i64 (int_ppc_mfspr i32:$SPR)),
+ (MFSPR8 $SPR)>;
___
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