[llvm-branch-commits] [llvm] bd64ad3 - Recommit "[AArch64][GlobalISel] Make G_USUBO legal and select it."

[Amara Emerson via llvm-branch-commits]

Author: Cassie Jones
Date: 2021-01-22T17:29:54-08:00
New Revision: bd64ad3fe17506933ac2971dcc900271d6ae5969

URL: 
https://github.com/llvm/llvm-project/commit/bd64ad3fe17506933ac2971dcc900271d6ae5969
DIFF: 
https://github.com/llvm/llvm-project/commit/bd64ad3fe17506933ac2971dcc900271d6ae5969.diff

LOG: Recommit "[AArch64][GlobalISel] Make G_USUBO legal and select it."

The expansion for wide subtractions includes G_USUBO.

Differential Revision: https://reviews.llvm.org/D95032

This was miscompiling on ubsan bots.

Added: 
llvm/test/CodeGen/AArch64/GlobalISel/select-saddo.mir
llvm/test/CodeGen/AArch64/GlobalISel/select-ssubo.mir
llvm/test/CodeGen/AArch64/GlobalISel/select-usubo.mir

Modified: 
llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
llvm/test/CodeGen/AArch64/GlobalISel/legalize-add.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-sub.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir

Removed: 




diff  --git a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp 
b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
index 9619bb43ae9c..5259f4f5a4d0 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
@@ -2745,7 +2745,8 @@ bool AArch64InstructionSelector::select(MachineInstr &I) {
   }
   case TargetOpcode::G_SADDO:
   case TargetOpcode::G_UADDO:
-  case TargetOpcode::G_SSUBO: {
+  case TargetOpcode::G_SSUBO:
+  case TargetOpcode::G_USUBO: {
 // Emit the operation and get the correct condition code.
 MachineIRBuilder MIRBuilder(I);
 auto OpAndCC = emitOverflowOp(Opcode, I.getOperand(0).getReg(),
@@ -4376,6 +4377,8 @@ AArch64InstructionSelector::emitOverflowOp(unsigned 
Opcode, Register Dst,
 return std::make_pair(emitADDS(Dst, LHS, RHS, MIRBuilder), AArch64CC::HS);
   case TargetOpcode::G_SSUBO:
 return std::make_pair(emitSUBS(Dst, LHS, RHS, MIRBuilder), AArch64CC::VS);
+  case TargetOpcode::G_USUBO:
+return std::make_pair(emitSUBS(Dst, LHS, RHS, MIRBuilder), AArch64CC::LO);
   }
 }
 

diff  --git a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp 
b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
index cc7aada211bb..5a6c904e3f5d 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
@@ -165,7 +165,8 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const 
AArch64Subtarget &ST)
 
   getActionDefinitionsBuilder({G_SMULH, G_UMULH}).legalFor({s32, s64});
 
-  getActionDefinitionsBuilder({G_UADDE, G_USUBE, G_SADDO, G_SSUBO, G_UADDO})
+  getActionDefinitionsBuilder(
+  {G_UADDE, G_USUBE, G_SADDO, G_SSUBO, G_UADDO, G_USUBO})
   .legalFor({{s32, s1}, {s64, s1}})
   .minScalar(0, s32);
 

diff  --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-add.mir 
b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-add.mir
index ab8510bf9d92..4f97d153d28b 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-add.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-add.mir
@@ -73,6 +73,44 @@ body: |
 %5:_(s64) = G_ANYEXT %4(s8)
 $x0 = COPY %5(s64)
 
+...
+---
+name:test_scalar_uaddo_32
+body: |
+  bb.0.entry:
+; CHECK-LABEL: name: test_scalar_uaddo_32
+; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
+; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1
+; CHECK: [[UADDO:%[0-9]+]]:_(s32), [[UADDO1:%[0-9]+]]:_(s1) = G_UADDO 
[[COPY]], [[COPY1]]
+; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[UADDO1]](s1)
+; CHECK: $w0 = COPY [[UADDO]](s32)
+; CHECK: $w1 = COPY [[ANYEXT]](s32)
+%0:_(s32) = COPY $w0
+%1:_(s32) = COPY $w1
+%2:_(s32), %3:_(s1) = G_UADDO %0, %1
+%4:_(s32) = G_ANYEXT %3
+$w0 = COPY %2(s32)
+$w1 = COPY %4(s32)
+
+...
+---
+name:test_scalar_saddo_32
+body: |
+  bb.0.entry:
+; CHECK-LABEL: name: test_scalar_saddo_32
+; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
+; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1
+; CHECK: [[SADDO:%[0-9]+]]:_(s32), [[SADDO1:%[0-9]+]]:_(s1) = G_SADDO 
[[COPY]], [[COPY1]]
+; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[SADDO1]](s1)
+; CHECK: $w0 = COPY [[SADDO]](s32)
+; CHECK: $w1 = COPY [[ANYEXT]](s32)
+%0:_(s32) = COPY $w0
+%1:_(s32) = COPY $w1
+%2:_(s32), %3:_(s1) = G_SADDO %0, %1
+%4:_(s32) = G_ANYEXT %3
+$w0 = COPY %2(s32)
+$w1 = COPY %4(s32)
+
 ...
 ---
 name:test_vector_add

diff  --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-sub.mir 
b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-sub.mir
index 32796e0948cc..b372a32eb7fc 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-sub.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-sub.mir
@@ -1,6 +1,59 @@
 # NOTE: As

[llvm-branch-commits] [lld] eda973b - [ELF][test] Add a test about --exclude-libs applying to version symbols

[Fangrui Song via llvm-branch-commits]

Author: Fangrui Song
Date: 2021-01-22T18:46:56-08:00
New Revision: eda973bbc7ae5327ee8451ba798dec63c550843e

URL: 
https://github.com/llvm/llvm-project/commit/eda973bbc7ae5327ee8451ba798dec63c550843e
DIFF: 
https://github.com/llvm/llvm-project/commit/eda973bbc7ae5327ee8451ba798dec63c550843e.diff

LOG: [ELF][test] Add a test about --exclude-libs applying to version symbols

D94280 also fixed PR48702.

Added: 
lld/test/ELF/exclude-libs-versym.s

Modified: 
lld/ELF/Driver.cpp

Removed: 




diff  --git a/lld/ELF/Driver.cpp b/lld/ELF/Driver.cpp
index e0ef61d39ac1..3b2a8ba19293 100644
--- a/lld/ELF/Driver.cpp
+++ b/lld/ELF/Driver.cpp
@@ -2192,7 +2192,8 @@ template  void 
LinkerDriver::link(opt::InputArgList &args) {
   compileBitcodeFiles();
 
   // Handle --exclude-libs again because lto.tmp may reference additional
-  // libcalls symbols defined in an excluded archive.
+  // libcalls symbols defined in an excluded archive. This may override
+  // versionId set by scanVersionScript().
   if (args.hasArg(OPT_exclude_libs))
 excludeLibs(args);
 

diff  --git a/lld/test/ELF/exclude-libs-versym.s 
b/lld/test/ELF/exclude-libs-versym.s
new file mode 100644
index ..1c0bd0af0d64
--- /dev/null
+++ b/lld/test/ELF/exclude-libs-versym.s
@@ -0,0 +1,32 @@
+# REQUIRES: x86
+## --exclude-libs can hide version symbols.
+
+# RUN: rm -rf %t && split-file %s %t
+# RUN: llvm-mc -filetype=obj %t/a.s -o %t/a.o
+# RUN: llvm-mc -filetype=obj %t/b.s -o %t/b.o
+# RUN: llvm-ar rc %t/b.a %t/b.o
+# RUN: ld.lld -shared %t/a.o %t/b.a --version-script=%t/ver -o %t.so
+# RUN: llvm-readelf --dyn-syms %t.so | FileCheck %s
+# RUN: ld.lld -shared %t/a.o %t/b.a --exclude-libs=b.a --version-script=%t/ver 
-o %t.so
+# RUN: llvm-readelf --dyn-syms %t.so | FileCheck %s --check-prefix=NO
+
+# CHECK: foo@@v2
+# CHECK: bar@v1
+# NO-NOT: foo@@v2
+# NO-NOT: bar@v1
+
+#--- a.s
+.globl _start
+_start:
+  call foo
+
+#--- b.s
+.symver bar_v1, bar@v1
+.globl foo, bar_v1
+foo:
+bar_v1:
+  ret
+
+#--- ver
+v1 {};
+v2 { foo; };



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[llvm-branch-commits] [lld] 6fe193b - [test] Add -mtriple

[Fangrui Song via llvm-branch-commits]

Author: Fangrui Song
Date: 2021-01-22T19:07:02-08:00
New Revision: 6fe193bf271521c5dd1a50949e83b246a9820ce2

URL: 
https://github.com/llvm/llvm-project/commit/6fe193bf271521c5dd1a50949e83b246a9820ce2
DIFF: 
https://github.com/llvm/llvm-project/commit/6fe193bf271521c5dd1a50949e83b246a9820ce2.diff

LOG: [test] Add -mtriple

Added: 


Modified: 
lld/test/ELF/exclude-libs-versym.s

Removed: 




diff  --git a/lld/test/ELF/exclude-libs-versym.s 
b/lld/test/ELF/exclude-libs-versym.s
index 1c0bd0af0d64..7cea6bfa111e 100644
--- a/lld/test/ELF/exclude-libs-versym.s
+++ b/lld/test/ELF/exclude-libs-versym.s
@@ -2,8 +2,8 @@
 ## --exclude-libs can hide version symbols.
 
 # RUN: rm -rf %t && split-file %s %t
-# RUN: llvm-mc -filetype=obj %t/a.s -o %t/a.o
-# RUN: llvm-mc -filetype=obj %t/b.s -o %t/b.o
+# RUN: llvm-mc -filetype=obj -triple=x86_64 %t/a.s -o %t/a.o
+# RUN: llvm-mc -filetype=obj -triple=x86_64 %t/b.s -o %t/b.o
 # RUN: llvm-ar rc %t/b.a %t/b.o
 # RUN: ld.lld -shared %t/a.o %t/b.a --version-script=%t/ver -o %t.so
 # RUN: llvm-readelf --dyn-syms %t.so | FileCheck %s



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[llvm-branch-commits] [compiler-rt] dd922bc - [LSan] Introduce a callback mechanism to allow adding data reachable from ThreadContexts to the frontier.

[Dan Liew via llvm-branch-commits]

Author: Dan Liew
Date: 2021-01-22T19:26:02-08:00
New Revision: dd922bc2a62163cef442646974324943c551725e

URL: 
https://github.com/llvm/llvm-project/commit/dd922bc2a62163cef442646974324943c551725e
DIFF: 
https://github.com/llvm/llvm-project/commit/dd922bc2a62163cef442646974324943c551725e.diff

LOG: [LSan] Introduce a callback mechanism to allow adding data reachable from 
ThreadContexts to the frontier.

This mechanism is intended to provide a way to treat the `arg` pointer
of a created (but not yet started) thread as reachable. In future
patches this will be implemented in `GetAdditionalThreadContextPtrs`.

A separate implementation of `GetAdditionalThreadContextPtrs` exists
for ASan and LSan runtimes because they need to be implemented
differently in future patches.

rdar://problem/63537240

Differential Revision: https://reviews.llvm.org/D95183

Added: 


Modified: 
compiler-rt/lib/asan/asan_allocator.cpp
compiler-rt/lib/lsan/lsan_allocator.cpp
compiler-rt/lib/lsan/lsan_common.cpp
compiler-rt/lib/lsan/lsan_common.h

Removed: 




diff  --git a/compiler-rt/lib/asan/asan_allocator.cpp 
b/compiler-rt/lib/asan/asan_allocator.cpp
index 58b496a3ca4b..4da697835870 100644
--- a/compiler-rt/lib/asan/asan_allocator.cpp
+++ b/compiler-rt/lib/asan/asan_allocator.cpp
@@ -1183,6 +1183,16 @@ IgnoreObjectResult IgnoreObjectLocked(const void *p) {
   m->lsan_tag = __lsan::kIgnored;
   return kIgnoreObjectSuccess;
 }
+
+void GetAdditionalThreadContextPtrs(ThreadContextBase *tctx, void *ptrs) {
+  // This function can be used to treat memory reachable from `tctx` as live.
+  // This is useful for threads that have been created but not yet started.
+
+  // This is currently a no-op because the ASan `pthread_create()` interceptor
+  // blocks until the child thread starts which keeps the thread's `arg` 
pointer
+  // live.
+}
+
 }  // namespace __lsan
 
 // -- Interface  {{{1

diff  --git a/compiler-rt/lib/lsan/lsan_allocator.cpp 
b/compiler-rt/lib/lsan/lsan_allocator.cpp
index d86c3921395c..70422957e6f3 100644
--- a/compiler-rt/lib/lsan/lsan_allocator.cpp
+++ b/compiler-rt/lib/lsan/lsan_allocator.cpp
@@ -309,6 +309,16 @@ IgnoreObjectResult IgnoreObjectLocked(const void *p) {
 return kIgnoreObjectInvalid;
   }
 }
+
+void GetAdditionalThreadContextPtrs(ThreadContextBase *tctx, void *ptrs) {
+  // This function can be used to treat memory reachable from `tctx` as live.
+  // This is useful for threads that have been created but not yet started.
+
+  // This is currently a no-op because the LSan `pthread_create()` interceptor
+  // blocks until the child thread starts which keeps the thread's `arg` 
pointer
+  // live.
+}
+
 } // namespace __lsan
 
 using namespace __lsan;

diff  --git a/compiler-rt/lib/lsan/lsan_common.cpp 
b/compiler-rt/lib/lsan/lsan_common.cpp
index ab7500ce32cf..d5b4132b24d5 100644
--- a/compiler-rt/lib/lsan/lsan_common.cpp
+++ b/compiler-rt/lib/lsan/lsan_common.cpp
@@ -253,6 +253,27 @@ extern "C" SANITIZER_WEAK_ATTRIBUTE void 
__libc_iterate_dynamic_tls(
 pid_t, void (*cb)(void *, void *, uptr, void *), void *);
 #endif
 
+static void ProcessThreadRegistry(Frontier *frontier) {
+  InternalMmapVector ptrs;
+  GetThreadRegistryLocked()->RunCallbackForEachThreadLocked(
+  GetAdditionalThreadContextPtrs, &ptrs);
+
+  for (uptr i = 0; i < ptrs.size(); ++i) {
+void *ptr = reinterpret_cast(ptrs[i]);
+uptr chunk = PointsIntoChunk(ptr);
+if (!chunk)
+  continue;
+LsanMetadata m(chunk);
+if (!m.allocated())
+  continue;
+
+// Mark as reachable and add to frontier.
+LOG_POINTERS("Treating pointer %p from ThreadContext as reachable\n", ptr);
+m.set_tag(kReachable);
+frontier->push_back(chunk);
+  }
+}
+
 // Scans thread data (stacks and TLS) for heap pointers.
 static void ProcessThreads(SuspendedThreadsList const &suspended_threads,
Frontier *frontier) {
@@ -364,6 +385,9 @@ static void ProcessThreads(SuspendedThreadsList const 
&suspended_threads,
 #endif
 }
   }
+
+  // Add pointers reachable from ThreadContexts
+  ProcessThreadRegistry(frontier);
 }
 
 #endif  // SANITIZER_FUCHSIA

diff  --git a/compiler-rt/lib/lsan/lsan_common.h 
b/compiler-rt/lib/lsan/lsan_common.h
index 05f380d4a5fa..b0ae6f020b63 100644
--- a/compiler-rt/lib/lsan/lsan_common.h
+++ b/compiler-rt/lib/lsan/lsan_common.h
@@ -50,6 +50,7 @@
 namespace __sanitizer {
 class FlagParser;
 class ThreadRegistry;
+class ThreadContextBase;
 struct DTLS;
 }
 
@@ -142,6 +143,7 @@ InternalMmapVector const *GetRootRegions();
 void ScanRootRegion(Frontier *frontier, RootRegion const ®ion,
 uptr region_begin, uptr region_end, bool is_readable);
 void ForEachExtraStackRangeCb(uptr begin, uptr end, void* arg);
+void GetAdditionalThreadContextPtrs(ThreadContextBase *tctx, void *ptrs);
 // Run stoptheworld while holding any 

[llvm-branch-commits] [llvm] 147c0c2 - [TargetLowering] Use isOneConstant to simplify some code. NFC

[Craig Topper via llvm-branch-commits]

Author: Craig Topper
Date: 2021-01-22T19:32:19-08:00
New Revision: 147c0c263d88a9702aba17fbeac62ff83e6c1319

URL: 
https://github.com/llvm/llvm-project/commit/147c0c263d88a9702aba17fbeac62ff83e6c1319
DIFF: 
https://github.com/llvm/llvm-project/commit/147c0c263d88a9702aba17fbeac62ff83e6c1319.diff

LOG: [TargetLowering] Use isOneConstant to simplify some code. NFC

Added: 


Modified: 
llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp

Removed: 




diff  --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp 
b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index b0b4a6ae9227..80b745e0354a 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -3780,8 +3780,7 @@ SDValue TargetLowering::SimplifySetCC(EVT VT, SDValue N0, 
SDValue N1,
(N0.getOpcode() == ISD::AND &&
 N0.getOperand(0).getOpcode() == ISD::XOR &&
 N0.getOperand(1) == N0.getOperand(0).getOperand(1))) &&
-  isa(N0.getOperand(1)) &&
-  cast(N0.getOperand(1))->isOne()) {
+  isOneConstant(N0.getOperand(1))) {
 // If this is (X^1) == 0/1, swap the RHS and eliminate the xor.  We
 // can only do this if the top bits are known zero.
 unsigned BitWidth = N0.getValueSizeInBits();
@@ -3825,9 +3824,7 @@ SDValue TargetLowering::SimplifySetCC(EVT VT, SDValue N0, 
SDValue N1,
 return DAG.getSetCC(dl, VT, XorLHS, XorRHS, Cond);
   }
 }
-if (Op0.getOpcode() == ISD::AND &&
-isa(Op0.getOperand(1)) &&
-cast(Op0.getOperand(1))->isOne()) {
+if (Op0.getOpcode() == ISD::AND && isOneConstant(Op0.getOperand(1))) {
   // If this is (X&1) == / != 1, normalize it to (X&1) != / == 0.
   if (Op0.getValueType().bitsGT(VT))
 Op0 = DAG.getNode(ISD::AND, dl, VT,



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[llvm-branch-commits] [llvm] 6c43564 - [Coroutine] Improve coro-elide-musttail.ll test

[Xun Li via llvm-branch-commits]

Author: Xun Li
Date: 2021-01-22T20:23:48-08:00
New Revision: 6c43564530365ac2c074d7515d4eada294d4ca0c

URL: 
https://github.com/llvm/llvm-project/commit/6c43564530365ac2c074d7515d4eada294d4ca0c
DIFF: 
https://github.com/llvm/llvm-project/commit/6c43564530365ac2c074d7515d4eada294d4ca0c.diff

LOG: [Coroutine] Improve coro-elide-musttail.ll test

The test wasn't sensitive to alias analysis. As you can seen from D95117 when 
AA is added by default this is affected.
Updating the test so that it coveres both cases for AA analysis.
Note that this patch depends on D95117 to land first.

Differential Revision: https://reviews.llvm.org/D95247

Added: 


Modified: 
llvm/test/Transforms/Coroutines/coro-elide-musttail.ll

Removed: 




diff  --git a/llvm/test/Transforms/Coroutines/coro-elide-musttail.ll 
b/llvm/test/Transforms/Coroutines/coro-elide-musttail.ll
index 26f9b5826920..2920bacb5635 100644
--- a/llvm/test/Transforms/Coroutines/coro-elide-musttail.ll
+++ b/llvm/test/Transforms/Coroutines/coro-elide-musttail.ll
@@ -2,7 +2,10 @@
 ; Only run with new pass manager since old pass manager's alias analysis isn't
 ; powerful enough to tell that the tailcall's arguments don't alias the frame.
 ;
+; RUN: opt < %s -coro-elide -S | FileCheck %s
+; RUN: opt < %s -disable-basic-aa -coro-elide -S | FileCheck %s 
-check-prefix=NOAA
 ; RUN: opt < %s -passes='coro-elide' -S | FileCheck %s
+; RUN: opt < %s -aa-pipeline= -passes='coro-elide' -S | FileCheck %s 
-check-prefix=NOAA
 
 %"bar.Frame" = type { void (%"bar.Frame"*)*, void (%"bar.Frame"*)*, 
%"struct.coroutine::promise_type", i1 }
 %"struct.coroutine::promise_type" = type { i32 }
@@ -14,6 +17,7 @@
 declare dso_local void @"bar"() align 2
 declare dso_local fastcc void @"bar.resume"(%"bar.Frame"*) align 2
 
+; There is a musttail call. CoroElide won't happen.
 define internal fastcc void @foo.resume_musttail(%"foo.Frame"* %FramePtr) {
 ; CHECK-LABEL: @foo.resume_musttail(
 ; CHECK-NEXT:  entry:
@@ -34,8 +38,32 @@ entry:
   ret void
 }
 
-define internal fastcc void @foo.resume_no_musttail(%"foo.Frame"* %FramePtr) {
-; CHECK-LABEL: @foo.resume_no_musttail(
+; The new frame (TMP0) could potentially alias CALL34, the tailcall attribute 
on that call must be removed
+define internal fastcc void @foo.resume_no_musttail_with_alias(%"foo.Frame"* 
%FramePtr) {
+; CHECK-LABEL: @foo.resume_no_musttail_with_alias(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:[[TMP0:%.*]] = alloca [24 x i8], align 8
+; CHECK-NEXT:[[VFRAME:%.*]] = bitcast [24 x i8]* [[TMP0]] to i8*
+; CHECK-NEXT:[[TMP1:%.*]] = tail call token @llvm.coro.id(i32 16, i8* 
null, i8* bitcast (void ()* @bar to i8*), i8* bitcast ([3 x void 
(%bar.Frame*)*]* @bar.resumers to i8*))
+; CHECK-NEXT:call fastcc void undef(i8* [[VFRAME]])
+; CHECK-NEXT:[[CALL34:%.*]] = call i8* undef()
+; CHECK-NEXT:call fastcc void undef(i8* [[CALL34]])
+; CHECK-NEXT:ret void
+;
+entry:
+  %0 = tail call token @llvm.coro.id(i32 16, i8* null, i8* bitcast (void ()* 
@"bar" to i8*), i8* bitcast ([3 x void (%"bar.Frame"*)*]* @"bar.resumers" to 
i8*))
+  %1 = tail call i1 @llvm.coro.alloc(token %0)
+  %2 = tail call i8* @llvm.coro.begin(token %0, i8* null)
+  call i8* @llvm.coro.subfn.addr(i8* %2, i8 1)
+  call fastcc void undef(i8* %2)
+  %call34 = call i8* undef()
+  tail call fastcc void undef(i8* %call34)
+  ret void
+}
+
+; The new frame (TMP0) does not alias CALL34, tailcall attribute can reimain. 
This analysis is only available when alias analysis is enabled.
+define internal fastcc void @foo.resume_no_musttail_no_alias(%"foo.Frame"* 
%FramePtr) {
+; CHECK-LABEL: @foo.resume_no_musttail_no_alias(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:[[TMP0:%.*]] = alloca [24 x i8], align 8
 ; CHECK-NEXT:[[VFRAME:%.*]] = bitcast [24 x i8]* [[TMP0]] to i8*
@@ -44,6 +72,15 @@ define internal fastcc void 
@foo.resume_no_musttail(%"foo.Frame"* %FramePtr) {
 ; CHECK-NEXT:tail call fastcc void undef(i8* [[CALL34]])
 ; CHECK-NEXT:ret void
 ;
+; NOAA-LABEL: @foo.resume_no_musttail_no_alias(
+; NOAA-NEXT:  entry:
+; NOAA-NEXT:[[TMP0:%.*]] = alloca [24 x i8], align 8
+; NOAA-NEXT:[[VFRAME:%.*]] = bitcast [24 x i8]* [[TMP0]] to i8*
+; NOAA-NEXT:[[TMP1:%.*]] = call token @llvm.coro.id(i32 16, i8* null, i8* 
bitcast (void ()* @bar to i8*), i8* bitcast ([3 x void (%bar.Frame*)*]* 
@bar.resumers to i8*))
+; NOAA-NEXT:[[CALL34:%.*]] = call i8* undef()
+; NOAA-NEXT:call fastcc void undef(i8* [[CALL34]])
+; NOAA-NEXT:ret void
+;
 entry:
   %0 = tail call token @llvm.coro.id(i32 16, i8* null, i8* bitcast (void ()* 
@"bar" to i8*), i8* bitcast ([3 x void (%"bar.Frame"*)*]* @"bar.resumers" to 
i8*))
   %1 = tail call i1 @llvm.coro.alloc(token %0)
@@ -54,6 +91,7 @@ entry:
   ret void
 }
 
+
 ; Function Attrs: argmemonly nofree nosync nounwind willreturn
 declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture) #0
 

[llvm-branch-commits] [clang] 018984a - [PowerPC] Fix va_arg in C++, Objective-C on 32-bit ELF targets

[Brad Smith via llvm-branch-commits]

Author: George Koehler
Date: 2021-01-23T00:13:36-05:00
New Revision: 018984ae6833fae107aa9c502ab5536efceca88e

URL: 
https://github.com/llvm/llvm-project/commit/018984ae6833fae107aa9c502ab5536efceca88e
DIFF: 
https://github.com/llvm/llvm-project/commit/018984ae6833fae107aa9c502ab5536efceca88e.diff

LOG: [PowerPC] Fix va_arg in C++, Objective-C on 32-bit ELF targets

In the PPC32 SVR4 ABI, a va_list has copies of registers from the function call.
va_arg looked in the wrong registers for (the pointer representation of) an
object in Objective-C, and for some types in C++. Fix va_arg to look in the
general-purpose registers, not the floating-point registers. Also fix va_arg
for some C++ types, like a member function pointer, that are aggregates for
the ABI.

Anthony Richardby found the problem in Objective-C. Eli Friedman suggested
part of this fix.

Fixes https://bugs.llvm.org/show_bug.cgi?id=47921

Reviewed By: efriedma, nemanjai

Differential Revision: https://reviews.llvm.org/D90329

Added: 
clang/test/CodeGenCXX/ppc32-varargs-method.cpp
clang/test/CodeGenObjC/ppc32-varargs-id.m

Modified: 
clang/lib/CodeGen/TargetInfo.cpp

Removed: 




diff  --git a/clang/lib/CodeGen/TargetInfo.cpp 
b/clang/lib/CodeGen/TargetInfo.cpp
index 9a11a0720f3c..bcd24292ff41 100644
--- a/clang/lib/CodeGen/TargetInfo.cpp
+++ b/clang/lib/CodeGen/TargetInfo.cpp
@@ -4709,13 +4709,12 @@ Address PPC32_SVR4_ABIInfo::EmitVAArg(CodeGenFunction 
&CGF, Address VAList,
   // };
 
   bool isI64 = Ty->isIntegerType() && getContext().getTypeSize(Ty) == 64;
-  bool isInt =
-  Ty->isIntegerType() || Ty->isPointerType() || Ty->isAggregateType();
+  bool isInt = !Ty->isFloatingType();
   bool isF64 = Ty->isFloatingType() && getContext().getTypeSize(Ty) == 64;
 
   // All aggregates are passed indirectly?  That doesn't seem consistent
   // with the argument-lowering code.
-  bool isIndirect = Ty->isAggregateType();
+  bool isIndirect = isAggregateTypeForABI(Ty);
 
   CGBuilderTy &Builder = CGF.Builder;
 

diff  --git a/clang/test/CodeGenCXX/ppc32-varargs-method.cpp 
b/clang/test/CodeGenCXX/ppc32-varargs-method.cpp
new file mode 100644
index ..2295f0125a88
--- /dev/null
+++ b/clang/test/CodeGenCXX/ppc32-varargs-method.cpp
@@ -0,0 +1,20 @@
+// REQUIRES: powerpc-registered-target
+// RUN: %clang_cc1 -triple powerpc-unknown-openbsd -emit-llvm -o - %s | 
FileCheck %s
+
+#include 
+
+class something;
+typedef void (something::*method)();
+
+method test(va_list ap) {
+  return va_arg(ap, method);
+}
+// CHECK: using_regs:
+// CHECK-NEXT: getelementptr inbounds %struct.__va_list_tag, 
%struct.__va_list_tag* %{{[0-9]+}}, i32 0, i32 4
+// CHECK-NEXT: load i8*, i8** %{{[0-9]+}}, align 4
+// CHECK-NEXT: mul i8 %numUsedRegs, 4
+// CHECK-NEXT: getelementptr inbounds i8, i8* %{{[0-9]+}}, i8 %{{[0-9]+}}
+// CHECK-NEXT: bitcast i8* %{{[0-9]+}} to { i32, i32 }**
+// CHECK-NEXT: add i8 %numUsedRegs, 1
+// CHECK-NEXT: store i8 %{{[0-9]+}}, i8* %gpr, align 4
+// CHECK-NEXT: br label %cont

diff  --git a/clang/test/CodeGenObjC/ppc32-varargs-id.m 
b/clang/test/CodeGenObjC/ppc32-varargs-id.m
new file mode 100644
index ..3730efb02d28
--- /dev/null
+++ b/clang/test/CodeGenObjC/ppc32-varargs-id.m
@@ -0,0 +1,33 @@
+// REQUIRES: powerpc-registered-target
+// RUN: %clang_cc1 -triple powerpc-unknown-openbsd -fblocks -emit-llvm -o - %s 
| FileCheck %s
+
+#include 
+
+id testObject(va_list ap) {
+  return va_arg(ap, id);
+}
+// CHECK: @testObject
+// CHECK: using_regs:
+// CHECK-NEXT: getelementptr inbounds %struct.__va_list_tag, 
%struct.__va_list_tag* %{{[0-9]+}}, i32 0, i32 4
+// CHECK-NEXT: load i8*, i8** %{{[0-9]+}}, align 4
+// CHECK-NEXT: mul i8 %numUsedRegs, 4
+// CHECK-NEXT: getelementptr inbounds i8, i8* %{{[0-9]+}}, i8 %{{[0-9]+}}
+// CHECK-NEXT: bitcast i8* %{{[0-9]+}} to i8**
+// CHECK-NEXT: add i8 %numUsedRegs, 1
+// CHECK-NEXT: store i8 %{{[0-9]+}}, i8* %gpr, align 4
+// CHECK-NEXT: br label %cont
+
+typedef void (^block)(void);
+block testBlock(va_list ap) {
+  return va_arg(ap, block);
+}
+// CHECK: @testBlock
+// CHECK: using_regs:
+// CHECK-NEXT: getelementptr inbounds %struct.__va_list_tag, 
%struct.__va_list_tag* %{{[0-9]+}}, i32 0, i32 4
+// CHECK-NEXT: load i8*, i8** %{{[0-9]+}}, align 4
+// CHECK-NEXT: mul i8 %numUsedRegs, 4
+// CHECK-NEXT: getelementptr inbounds i8, i8* %{{[0-9]+}}, i8 %{{[0-9]+}}
+// CHECK-NEXT: bitcast i8* %{{[0-9]+}} to void ()**
+// CHECK-NEXT: add i8 %numUsedRegs, 1
+// CHECK-NEXT: store i8 %{{[0-9]+}}, i8* %gpr, align 4
+// CHECK-NEXT: br label %cont



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Re: [llvm-branch-commits] [clang] 82e537a - [Clang][OpenMP] Fixed an issue that clang crashed when compiling OpenMP program in device only mode without host IR

[Shilei Tian via llvm-branch-commits]

Hi Eric,

Sure, will update it soon.

Regards,
Shilei

> On Jan 20, 2021, at 12:10 AM, Eric Christopher  wrote:
> 
> +Tres Popp  (FYI)
> 
> Hi Shilei,
> 
> The other openmp targets tests are all _cc1 tests. I don't think there's a 
> reason for these to not also be cc1, would you mind updating this?
> 
> Thanks!
> 
> -eric
> 
> On Tue, Jan 19, 2021 at 2:22 PM Shilei Tian via llvm-branch-commits 
>  > wrote:
> 
> Author: Shilei Tian
> Date: 2021-01-19T14:18:42-05:00
> New Revision: 82e537a9d28a2c18bd1637e2eac0e0af658ed829
> 
> URL: 
> https://github.com/llvm/llvm-project/commit/82e537a9d28a2c18bd1637e2eac0e0af658ed829
>  
> 
> DIFF: 
> https://github.com/llvm/llvm-project/commit/82e537a9d28a2c18bd1637e2eac0e0af658ed829.diff
>  
> 
> 
> LOG: [Clang][OpenMP] Fixed an issue that clang crashed when compiling OpenMP 
> program in device only mode without host IR
> 
> D94745 rewrites the `deviceRTLs` using OpenMP and compiles it by directly
> calling the device compilation. `clang` crashes because entry in
> `OffloadEntriesDeviceGlobalVar` is unintialized. Current design supposes the
> device compilation can only be invoked after host compilation with the host IR
> such that `clang` can initialize `OffloadEntriesDeviceGlobalVar` from host IR.
> This avoids us using device compilation directly, especially when we only have
> code wrapped into `declare target` which are all device code. The same issue
> also exists for `OffloadEntriesInfoManager`.
> 
> In this patch, we simply initialized an entry if it is not in the maps. Not 
> sure
> we need an option to tell the device compiler that it is invoked standalone.
> 
> Reviewed By: jdoerfert
> 
> Differential Revision: https://reviews.llvm.org/D94871 
> 
> 
> Added: 
> clang/test/OpenMP/declare_target_device_only_compilation.cpp
> 
> Modified: 
> clang/lib/CodeGen/CGOpenMPRuntime.cpp
> 
> Removed: 
> 
> 
> 
> 
> diff  --git a/clang/lib/CodeGen/CGOpenMPRuntime.cpp 
> b/clang/lib/CodeGen/CGOpenMPRuntime.cpp
> index a3b24039365b..17fa56fb06c8 100644
> --- a/clang/lib/CodeGen/CGOpenMPRuntime.cpp
> +++ b/clang/lib/CodeGen/CGOpenMPRuntime.cpp
> @@ -2941,16 +2941,12 @@ void CGOpenMPRuntime::OffloadEntriesInfoManagerTy::
>// If we are emitting code for a target, the entry is already initialized,
>// only has to be registered.
>if (CGM.getLangOpts().OpenMPIsDevice) {
> -if (!hasTargetRegionEntryInfo(DeviceID, FileID, ParentName, LineNum)) {
> -  unsigned DiagID = CGM.getDiags().getCustomDiagID(
> -  DiagnosticsEngine::Error,
> -  "Unable to find target region on line '%0' in the device code.");
> -  CGM.getDiags().Report(DiagID) << LineNum;
> -  return;
> -}
> +// This could happen if the device compilation is invoked standalone.
> +if (!hasTargetRegionEntryInfo(DeviceID, FileID, ParentName, LineNum))
> +  initializeTargetRegionEntryInfo(DeviceID, FileID, ParentName, LineNum,
> +  OffloadingEntriesNum);
>  auto &Entry =
>  OffloadEntriesTargetRegion[DeviceID][FileID][ParentName][LineNum];
> -assert(Entry.isValid() && "Entry not initialized!");
>  Entry.setAddress(Addr);
>  Entry.setID(ID);
>  Entry.setFlags(Flags);
> @@ -3017,9 +3013,10 @@ void CGOpenMPRuntime::OffloadEntriesInfoManagerTy::
>   OMPTargetGlobalVarEntryKind Flags,
>   llvm::GlobalValue::LinkageTypes 
> Linkage) {
>if (CGM.getLangOpts().OpenMPIsDevice) {
> +// This could happen if the device compilation is invoked standalone.
> +if (!hasDeviceGlobalVarEntryInfo(VarName))
> +  initializeDeviceGlobalVarEntryInfo(VarName, Flags, 
> OffloadingEntriesNum);
>  auto &Entry = OffloadEntriesDeviceGlobalVar[VarName];
> -assert(Entry.isValid() && Entry.getFlags() == Flags &&
> -   "Entry not initialized!");
>  assert((!Entry.getAddress() || Entry.getAddress() == Addr) &&
> "Resetting with the new address.");
>  if (Entry.getAddress() && hasDeviceGlobalVarEntryInfo(VarName)) {
> 
> diff  --git a/clang/test/OpenMP/declare_target_device_only_compilation.cpp 
> b/clang/test/OpenMP/declare_target_device_only_compilation.cpp
> new file mode 100644
> index ..280959540306
> --- /dev/null
> +++ b/clang/test/OpenMP/declare_target_device_only_compilation.cpp
> @@ -0,0 +1,15 @@
> +//==///
> +// RUN: %clang -S -target powerpc64le-ibm-linux-gnu -fopenmp 
> -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s
> +// RUN: %clang -S

[llvm-branch-commits] [lldb] aa1943a - Don't take the address of a temporary

[Adrian Prantl via llvm-branch-commits]

Author: Adrian Prantl
Date: 2021-01-08T13:24:07-08:00
New Revision: aa1943a2d167823e6d506895292477f79874dd20

URL: 
https://github.com/llvm/llvm-project/commit/aa1943a2d167823e6d506895292477f79874dd20
DIFF: 
https://github.com/llvm/llvm-project/commit/aa1943a2d167823e6d506895292477f79874dd20.diff

LOG: Don't take the address of a temporary

Added: 


Modified: 
lldb/source/Core/ValueObject.cpp

Removed: 




diff  --git a/lldb/source/Core/ValueObject.cpp 
b/lldb/source/Core/ValueObject.cpp
index bcd76f5a74be4..da90092336d69 100644
--- a/lldb/source/Core/ValueObject.cpp
+++ b/lldb/source/Core/ValueObject.cpp
@@ -3205,7 +3205,7 @@ bool ValueObject::CanProvideValue() {
   // we need to support invalid types as providers of values because some bare-
   // board debugging scenarios have no notion of types, but still manage to
   // have raw numeric values for things like registers. sigh.
-  const CompilerType &type(GetCompilerType());
+  CompilerType type = GetCompilerType();
   return (!type.IsValid()) || (0 != (type.GetTypeInfo() & eTypeHasValue));
 }
 



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[llvm-branch-commits] [llvm] fc6677f - [Test Commit] This is a test commit for https://reviews.llvm.org/D94904

[Arun R via llvm-branch-commits]

Author: Arun R
Date: 2021-01-20T15:21:34+05:30
New Revision: fc6677f0bbaf8a4654ef138fc6b0411c75a7313f

URL: 
https://github.com/llvm/llvm-project/commit/fc6677f0bbaf8a4654ef138fc6b0411c75a7313f
DIFF: 
https://github.com/llvm/llvm-project/commit/fc6677f0bbaf8a4654ef138fc6b0411c75a7313f.diff

LOG: [Test Commit] This is a test commit for https://reviews.llvm.org/D94904

D94904 Reviewed by xbolva00

Reviewers for D94904: llvm-commits, MatzeB, craig.topper, kparzysz, efriedma, 
pengfei, wxiao3, xbolva00

Subscribers for D94904: llvm-commits, xbolva00

D94904 Differential Revision: https://reviews.llvm.org/D94904

Added: 


Modified: 
llvm/test/CodeGen/X86/critical-anti-dep-breaker.ll

Removed: 




diff  --git a/llvm/test/CodeGen/X86/critical-anti-dep-breaker.ll 
b/llvm/test/CodeGen/X86/critical-anti-dep-breaker.ll
index de5744d3a88f..7f6c4db49490 100644
--- a/llvm/test/CodeGen/X86/critical-anti-dep-breaker.ll
+++ b/llvm/test/CodeGen/X86/critical-anti-dep-breaker.ll
@@ -1,6 +1,6 @@
 ; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -relocation-model=pic 
-post-RA-scheduler=1 -break-anti-dependencies=critical  | FileCheck %s
 
-; PR20308 ( http://llvm.org/bugs/show_bug.cgi?id=20308 )
+; PR20308 ( http://llvm.org/bugs/show_bug.cgi?id=20308 ).
 ; The critical-anti-dependency-breaker must not use register def information 
from a kill inst.
 ; This test case expects such an instruction to appear as a comment with def 
info for RDI.
 ; There is an anti-dependency (WAR) hazard using RAX using default reg 
allocation and scheduling.



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[llvm-branch-commits] [llvm] 29aaae2 - [PostRASched] Regenerate Whole Test with update_llc_test_checks.py

[Arun R via llvm-branch-commits]

Author: Arun R
Date: 2021-01-20T16:30:39+05:30
New Revision: 29aaae281403c3ab26a4e87fe37a69e1b810e0f2

URL: 
https://github.com/llvm/llvm-project/commit/29aaae281403c3ab26a4e87fe37a69e1b810e0f2
DIFF: 
https://github.com/llvm/llvm-project/commit/29aaae281403c3ab26a4e87fe37a69e1b810e0f2.diff

LOG: [PostRASched] Regenerate Whole Test with update_llc_test_checks.py

Reviewed by xbolva00

Reviewers: llvm-commits, MatzeB, craig.topper, kparzysz, efriedma, pengfei, 
wxiao3, xbolva00

Subscribers: llvm-commits, xbolva00

Differential Revision: https://reviews.llvm.org/D94904

Added: 


Modified: 
llvm/test/CodeGen/X86/critical-anti-dep-breaker.ll

Removed: 




diff  --git a/llvm/test/CodeGen/X86/critical-anti-dep-breaker.ll 
b/llvm/test/CodeGen/X86/critical-anti-dep-breaker.ll
index 7f6c4db49490..6daee0ce4f8d 100644
--- a/llvm/test/CodeGen/X86/critical-anti-dep-breaker.ll
+++ b/llvm/test/CodeGen/X86/critical-anti-dep-breaker.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -relocation-model=pic 
-post-RA-scheduler=1 -break-anti-dependencies=critical  | FileCheck %s
 
 ; PR20308 ( http://llvm.org/bugs/show_bug.cgi?id=20308 ).
@@ -10,9 +11,39 @@
 @PartClass = external global i32
 @NullToken = external global i64
 
-; CHECK-LABEL: Part_Create:
-; CHECK: movq PartClass@GOTPCREL(%rip), %r10
 define i32 @Part_Create(i64* %Anchor, i32 %TypeNum, i32 %F, i32 %Z, i32* 
%Status, i64* %PartTkn) {
+; CHECK-LABEL: Part_Create:
+; CHECK:   # %bb.0:
+; CHECK-NEXT:pushq %rbp
+; CHECK-NEXT:.cfi_def_cfa_offset 16
+; CHECK-NEXT:pushq %rbx
+; CHECK-NEXT:.cfi_def_cfa_offset 24
+; CHECK-NEXT:subq $24, %rsp
+; CHECK-NEXT:.cfi_def_cfa_offset 48
+; CHECK-NEXT:.cfi_offset %rbx, -24
+; CHECK-NEXT:.cfi_offset %rbp, -16
+; CHECK-NEXT:movq NullToken@{{.*}}(%rip), %rax
+; CHECK-NEXT:movq PartClass@{{.*}}(%rip), %r10
+; CHECK-NEXT:xorl %edx, %edx
+; CHECK-NEXT:xorl %ecx, %ecx
+; CHECK-NEXT:movq %rdi, %rbx
+; CHECK-NEXT:movq (%rax), %rax
+; CHECK-NEXT:movl (%r10), %ebp
+; CHECK-NEXT:movq %rax, {{[0-9]+}}(%rsp)
+; CHECK-NEXT:leaq {{[0-9]+}}(%rsp), %rax
+; CHECK-NEXT:movl %ebp, %esi
+; CHECK-NEXT:movq %rax, (%rsp)
+; CHECK-NEXT:callq Image@PLT
+; CHECK-NEXT:movq %rbx, %rdi
+; CHECK-NEXT:callq Create@PLT
+; CHECK-NEXT:movl %ebp, %eax
+; CHECK-NEXT:addq $24, %rsp
+; CHECK-NEXT:.cfi_def_cfa_offset 24
+; CHECK-NEXT:popq %rbx
+; CHECK-NEXT:.cfi_def_cfa_offset 16
+; CHECK-NEXT:popq %rbp
+; CHECK-NEXT:.cfi_def_cfa_offset 8
+; CHECK-NEXT:retq
   %PartObj = alloca i64*, align 8
   %Vchunk = alloca i64, align 8
   %1 = load i64, i64* @NullToken, align 4



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[llvm-branch-commits] [llvm] a325490 - [Analysis] Use llvm::append_range (NFC)

[Kazu Hirata via llvm-branch-commits]

Author: Kazu Hirata
Date: 2021-01-22T23:25:01-08:00
New Revision: a3254904b28cbc392baa8011f1da8172538ff077

URL: 
https://github.com/llvm/llvm-project/commit/a3254904b28cbc392baa8011f1da8172538ff077
DIFF: 
https://github.com/llvm/llvm-project/commit/a3254904b28cbc392baa8011f1da8172538ff077.diff

LOG: [Analysis] Use llvm::append_range (NFC)

Added: 


Modified: 
llvm/lib/Analysis/BasicAliasAnalysis.cpp
llvm/lib/Analysis/DDG.cpp
llvm/lib/Analysis/DependenceGraphBuilder.cpp
llvm/lib/Analysis/DevelopmentModeInlineAdvisor.cpp
llvm/lib/Analysis/LoopCacheAnalysis.cpp
llvm/lib/Analysis/LoopNestAnalysis.cpp
llvm/lib/Analysis/MemoryDependenceAnalysis.cpp
llvm/lib/Analysis/MustExecute.cpp
llvm/lib/Analysis/ValueTracking.cpp

Removed: 




diff  --git a/llvm/lib/Analysis/BasicAliasAnalysis.cpp 
b/llvm/lib/Analysis/BasicAliasAnalysis.cpp
index 3d638c1c36ce..97d0cb63ef99 100644
--- a/llvm/lib/Analysis/BasicAliasAnalysis.cpp
+++ b/llvm/lib/Analysis/BasicAliasAnalysis.cpp
@@ -652,8 +652,7 @@ bool BasicAAResult::pointsToConstantMemory(const 
MemoryLocation &Loc,
 Visited.clear();
 return AAResultBase::pointsToConstantMemory(Loc, AAQI, OrLocal);
   }
-  for (Value *IncValue : PN->incoming_values())
-Worklist.push_back(IncValue);
+  append_range(Worklist, PN->incoming_values());
   continue;
 }
 

diff  --git a/llvm/lib/Analysis/DDG.cpp b/llvm/lib/Analysis/DDG.cpp
index b2aa322454e7..da5de75a038c 100644
--- a/llvm/lib/Analysis/DDG.cpp
+++ b/llvm/lib/Analysis/DDG.cpp
@@ -190,8 +190,7 @@ DataDependenceGraph::DataDependenceGraph(Function &F, 
DependenceInfo &D)
   // directions.
   BasicBlockListType BBList;
   for (auto &SCC : make_range(scc_begin(&F), scc_end(&F)))
-for (BasicBlock * BB : SCC)
-  BBList.push_back(BB);
+append_range(BBList, SCC);
   std::reverse(BBList.begin(), BBList.end());
   DDGBuilder(*this, D, BBList).populate();
 }
@@ -207,8 +206,7 @@ DataDependenceGraph::DataDependenceGraph(Loop &L, LoopInfo 
&LI,
   LoopBlocksDFS DFS(&L);
   DFS.perform(&LI);
   BasicBlockListType BBList;
-  for (BasicBlock *BB : make_range(DFS.beginRPO(), DFS.endRPO()))
-BBList.push_back(BB);
+  append_range(BBList, make_range(DFS.beginRPO(), DFS.endRPO()));
   DDGBuilder(*this, D, BBList).populate();
 }
 

diff  --git a/llvm/lib/Analysis/DependenceGraphBuilder.cpp 
b/llvm/lib/Analysis/DependenceGraphBuilder.cpp
index 04a34472659c..6b90db4bafe1 100644
--- a/llvm/lib/Analysis/DependenceGraphBuilder.cpp
+++ b/llvm/lib/Analysis/DependenceGraphBuilder.cpp
@@ -498,8 +498,7 @@ void 
AbstractDependenceGraphBuilder::sortNodesTopologically() {
 
   size_t OldSize = Graph.Nodes.size();
   Graph.Nodes.clear();
-  for (NodeType *N : reverse(NodesInPO))
-Graph.Nodes.push_back(N);
+  append_range(Graph.Nodes, reverse(NodesInPO));
   if (Graph.Nodes.size() != OldSize)
 assert(false &&
"Expected the number of nodes to stay the same after the sort");

diff  --git a/llvm/lib/Analysis/DevelopmentModeInlineAdvisor.cpp 
b/llvm/lib/Analysis/DevelopmentModeInlineAdvisor.cpp
index 551add6900be..e138e82c8b05 100644
--- a/llvm/lib/Analysis/DevelopmentModeInlineAdvisor.cpp
+++ b/llvm/lib/Analysis/DevelopmentModeInlineAdvisor.cpp
@@ -331,8 +331,7 @@ TrainingLogger::TrainingLogger(StringRef LogFileName,
 FT.push_back(
 {TensorSpec::createSpec(FeatureNameMap.at(I), {1}), None});
   if (MUTR && MUTR->outputLoggedFeatureSpecs().size() > 1)
-FT.insert(FT.end(), MUTR->outputLoggedFeatureSpecs().begin() + 1,
-  MUTR->outputLoggedFeatureSpecs().end());
+append_range(FT, drop_begin(MUTR->outputLoggedFeatureSpecs()));
 
   DefaultDecisionPos = FT.size();
   FT.push_back(
@@ -465,8 +464,7 @@ 
ModelUnderTrainingRunner::ModelUnderTrainingRunner(LLVMContext &Ctx,
   for (size_t I = 0; I < NumberOfFeatures; ++I)
 InputSpecs.push_back(
 TensorSpec::createSpec(TFFeedPrefix + FeatureNameMap[I], 
{1}));
-  InputSpecs.insert(InputSpecs.end(), TrainingOnlyFeatures.begin(),
-TrainingOnlyFeatures.end());
+  append_range(InputSpecs, TrainingOnlyFeatures);
   if (auto MaybeOutSpecs =
   loadOutputSpecs(Ctx, DecisionName, ModelPath, TFOutputSpecOverride))
 OutputSpecs = std::move(*MaybeOutSpecs);

diff  --git a/llvm/lib/Analysis/LoopCacheAnalysis.cpp 
b/llvm/lib/Analysis/LoopCacheAnalysis.cpp
index 6c490411d106..cf68596bfbc3 100644
--- a/llvm/lib/Analysis/LoopCacheAnalysis.cpp
+++ b/llvm/lib/Analysis/LoopCacheAnalysis.cpp
@@ -505,8 +505,7 @@ CacheCost::getCacheCost(Loop &Root, 
LoopStandardAnalysisResults &AR,
   }
 
   LoopVectorTy Loops;
-  for (Loop *L : breadth_first(&Root))
-Loops.push_back(L);
+  append_range(Loops, breadth_first(&Root));
 
   if (!getInnerMostLoop(Loops)) {
 LLVM_DEBUG(dbgs() << "Cannot compute cache cost of loop nest with more "

diff  --git a/llvm/lib/Analysis/LoopNestAnalysis.

[llvm-branch-commits] [llvm] 5f843b2 - [llvm] Use isAlpha/isAlnum (NFC)

[Kazu Hirata via llvm-branch-commits]

Author: Kazu Hirata
Date: 2021-01-22T23:25:03-08:00
New Revision: 5f843b2dd2ee1f36162a861ef02b2b4bc4dc79b7

URL: 
https://github.com/llvm/llvm-project/commit/5f843b2dd2ee1f36162a861ef02b2b4bc4dc79b7
DIFF: 
https://github.com/llvm/llvm-project/commit/5f843b2dd2ee1f36162a861ef02b2b4bc4dc79b7.diff

LOG: [llvm] Use isAlpha/isAlnum (NFC)

Added: 


Modified: 
llvm/include/llvm/Bitstream/BitCodes.h
llvm/lib/IR/Mangler.cpp
llvm/lib/MC/MCAsmInfo.cpp
llvm/lib/Support/YAMLParser.cpp
llvm/utils/TableGen/AsmMatcherEmitter.cpp
llvm/utils/TableGen/AsmWriterEmitter.cpp
llvm/utils/TableGen/AsmWriterInst.cpp

Removed: 




diff  --git a/llvm/include/llvm/Bitstream/BitCodes.h 
b/llvm/include/llvm/Bitstream/BitCodes.h
index 41a3de3b20efc..9cd4e535a4701 100644
--- a/llvm/include/llvm/Bitstream/BitCodes.h
+++ b/llvm/include/llvm/Bitstream/BitCodes.h
@@ -18,6 +18,7 @@
 #define LLVM_BITSTREAM_BITCODES_H
 
 #include "llvm/ADT/SmallVector.h"
+#include "llvm/ADT/StringExtras.h"
 #include "llvm/Support/DataTypes.h"
 #include "llvm/Support/ErrorHandling.h"
 #include 
@@ -137,13 +138,7 @@ class BitCodeAbbrevOp {
   }
 
   /// isChar6 - Return true if this character is legal in the Char6 encoding.
-  static bool isChar6(char C) {
-if (C >= 'a' && C <= 'z') return true;
-if (C >= 'A' && C <= 'Z') return true;
-if (C >= '0' && C <= '9') return true;
-if (C == '.' || C == '_') return true;
-return false;
-  }
+  static bool isChar6(char C) { return isAlnum(C) || C == '.' || C == '_'; }
   static unsigned EncodeChar6(char C) {
 if (C >= 'a' && C <= 'z') return C-'a';
 if (C >= 'A' && C <= 'Z') return C-'A'+26;

diff  --git a/llvm/lib/IR/Mangler.cpp b/llvm/lib/IR/Mangler.cpp
index 8536503cb6d80..674ba3cdaa24e 100644
--- a/llvm/lib/IR/Mangler.cpp
+++ b/llvm/lib/IR/Mangler.cpp
@@ -12,6 +12,7 @@
 
 #include "llvm/IR/Mangler.h"
 #include "llvm/ADT/SmallString.h"
+#include "llvm/ADT/StringExtras.h"
 #include "llvm/ADT/Triple.h"
 #include "llvm/ADT/Twine.h"
 #include "llvm/IR/DataLayout.h"
@@ -186,8 +187,7 @@ void Mangler::getNameWithPrefix(SmallVectorImpl 
&OutName,
 
 // Check if the name needs quotes to be safe for the linker to interpret.
 static bool canBeUnquotedInDirective(char C) {
-  return (C >= 'a' && C <= 'z') || (C >= 'A' && C <= 'Z') ||
- (C >= '0' && C <= '9') || C == '_' || C == '$' || C == '.' || C == 
'@';
+  return isAlnum(C) || C == '_' || C == '$' || C == '.' || C == '@';
 }
 
 static bool canBeUnquotedInDirective(StringRef Name) {

diff  --git a/llvm/lib/MC/MCAsmInfo.cpp b/llvm/lib/MC/MCAsmInfo.cpp
index 0d2d26b0eb47c..620d3e7cffc30 100644
--- a/llvm/lib/MC/MCAsmInfo.cpp
+++ b/llvm/lib/MC/MCAsmInfo.cpp
@@ -109,8 +109,7 @@ MCAsmInfo::getExprForFDESymbol(const MCSymbol *Sym,
 }
 
 bool MCAsmInfo::isAcceptableChar(char C) const {
-  return (C >= 'a' && C <= 'z') || (C >= 'A' && C <= 'Z') ||
- (C >= '0' && C <= '9') || C == '_' || C == '$' || C == '.' || C == 
'@';
+  return isAlnum(C) || C == '_' || C == '$' || C == '.' || C == '@';
 }
 
 bool MCAsmInfo::isValidUnquotedName(StringRef Name) const {

diff  --git a/llvm/lib/Support/YAMLParser.cpp b/llvm/lib/Support/YAMLParser.cpp
index 17321177105e6..f68ba0d065c1d 100644
--- a/llvm/lib/Support/YAMLParser.cpp
+++ b/llvm/lib/Support/YAMLParser.cpp
@@ -981,17 +981,9 @@ void Scanner::advanceWhile(SkipWhileFunc Func) {
   Current = Final;
 }
 
-static bool is_ns_hex_digit(const char C) {
-  return(C >= '0' && C <= '9')
- || (C >= 'a' && C <= 'z')
- || (C >= 'A' && C <= 'Z');
-}
+static bool is_ns_hex_digit(const char C) { return isAlnum(C); }
 
-static bool is_ns_word_char(const char C) {
-  returnC == '-'
- || (C >= 'a' && C <= 'z')
- || (C >= 'A' && C <= 'Z');
-}
+static bool is_ns_word_char(const char C) { return C == '-' || isAlpha(C); }
 
 void Scanner::scan_ns_uri_char() {
   while (true) {

diff  --git a/llvm/utils/TableGen/AsmMatcherEmitter.cpp 
b/llvm/utils/TableGen/AsmMatcherEmitter.cpp
index 48b7014e84af7..9d304910ba4e6 100644
--- a/llvm/utils/TableGen/AsmMatcherEmitter.cpp
+++ b/llvm/utils/TableGen/AsmMatcherEmitter.cpp
@@ -1112,9 +1112,7 @@ static std::string getEnumNameForToken(StringRef Str) {
 case '-': Res += "_MINUS_"; break;
 case '#': Res += "_HASH_"; break;
 default:
-  if ((*it >= 'A' && *it <= 'Z') ||
-  (*it >= 'a' && *it <= 'z') ||
-  (*it >= '0' && *it <= '9'))
+  if (isAlnum(*it))
 Res += *it;
   else
 Res += "_" + utostr((unsigned) *it) + "_";

diff  --git a/llvm/utils/TableGen/AsmWriterEmitter.cpp 
b/llvm/utils/TableGen/AsmWriterEmitter.cpp
index a09ea775808c6..92df204475b9a 100644
--- a/llvm/utils/TableGen/AsmWriterEmitter.cpp
+++ b/llvm/utils/TableGen/AsmWriterEmitter.cpp
@@ -713,9 +713,7 @@ class IAPrinter {
 ++Next;
 } else {
   // $name, just eat the usual suspects.
-  while (I !=

[llvm-branch-commits] [llvm] 49231c1 - [llvm] Use static_assert instead of assert (NFC)

[Kazu Hirata via llvm-branch-commits]

Author: Kazu Hirata
Date: 2021-01-22T23:25:05-08:00
New Revision: 49231c1f80803ae0f15963cce708cedf6e44088f

URL: 
https://github.com/llvm/llvm-project/commit/49231c1f80803ae0f15963cce708cedf6e44088f
DIFF: 
https://github.com/llvm/llvm-project/commit/49231c1f80803ae0f15963cce708cedf6e44088f.diff

LOG: [llvm] Use static_assert instead of assert (NFC)

Identified with misc-static-assert.

Added: 


Modified: 
llvm/include/llvm/IR/InstrTypes.h
llvm/lib/Object/XCOFFObjectFile.cpp
llvm/lib/Support/SHA1.cpp
llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
llvm/lib/Target/X86/X86InsertPrefetch.cpp
llvm/utils/TableGen/X86DisassemblerTables.cpp

Removed: 




diff  --git a/llvm/include/llvm/IR/InstrTypes.h 
b/llvm/include/llvm/IR/InstrTypes.h
index 631665e3fc52e..7b99cc96b149b 100644
--- a/llvm/include/llvm/IR/InstrTypes.h
+++ b/llvm/include/llvm/IR/InstrTypes.h
@@ -802,8 +802,8 @@ class CmpInst : public Instruction {
   void setPredicate(Predicate P) { setSubclassData(P); }
 
   static bool isFPPredicate(Predicate P) {
-assert(FIRST_FCMP_PREDICATE == 0 &&
-   "FIRST_FCMP_PREDICATE is required to be 0");
+static_assert(FIRST_FCMP_PREDICATE == 0,
+  "FIRST_FCMP_PREDICATE is required to be 0");
 return P <= LAST_FCMP_PREDICATE;
   }
 

diff  --git a/llvm/lib/Object/XCOFFObjectFile.cpp 
b/llvm/lib/Object/XCOFFObjectFile.cpp
index b0d772b6ff212..a16a458168d42 100644
--- a/llvm/lib/Object/XCOFFObjectFile.cpp
+++ b/llvm/lib/Object/XCOFFObjectFile.cpp
@@ -655,7 +655,8 @@ XCOFFObjectFile::relocations(const XCOFFSectionHeader32 
&Sec) const {
 
   uint32_t NumRelocEntries = NumRelocEntriesOrErr.get();
 
-  assert(sizeof(XCOFFRelocation32) == XCOFF::RelocationSerializationSize32);
+  static_assert(
+  sizeof(XCOFFRelocation32) == XCOFF::RelocationSerializationSize32, "");
   auto RelocationOrErr =
   getObject(Data, reinterpret_cast(RelocAddr),
NumRelocEntries * 
sizeof(XCOFFRelocation32));

diff  --git a/llvm/lib/Support/SHA1.cpp b/llvm/lib/Support/SHA1.cpp
index 417b13fea05a4..5dce44af9ecd8 100644
--- a/llvm/lib/Support/SHA1.cpp
+++ b/llvm/lib/Support/SHA1.cpp
@@ -225,7 +225,7 @@ void SHA1::update(ArrayRef Data) {
   // Fast buffer filling for large inputs.
   while (Data.size() >= BLOCK_LENGTH) {
 assert(InternalState.BufferOffset == 0);
-assert(BLOCK_LENGTH % 4 == 0);
+static_assert(BLOCK_LENGTH % 4 == 0, "");
 constexpr size_t BLOCK_LENGTH_32 = BLOCK_LENGTH / 4;
 for (size_t I = 0; I < BLOCK_LENGTH_32; ++I)
   InternalState.Buffer.L[I] = support::endian::read32be(&Data[I * 4]);

diff  --git a/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp 
b/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
index 4a4aad02938a9..8061c6c509e08 100644
--- a/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
+++ b/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
@@ -1015,7 +1015,8 @@ MCOperand AMDGPUDisassembler::decodeSrcOp(const OpWidthTy 
Width, unsigned Val) c
: getVgprClassId(Width), Val - VGPR_MIN);
   }
   if (Val <= SGPR_MAX) {
-assert(SGPR_MIN == 0); // "SGPR_MIN <= Val" is always true and causes 
compilation warning.
+// "SGPR_MIN <= Val" is always true and causes compilation warning.
+static_assert(SGPR_MIN == 0, "");
 return createSRegOperand(getSgprClassId(Width), Val - SGPR_MIN);
   }
 
@@ -1052,7 +1053,8 @@ MCOperand AMDGPUDisassembler::decodeDstOp(const OpWidthTy 
Width, unsigned Val) c
   assert(Width == OPW256 || Width == OPW512);
 
   if (Val <= SGPR_MAX) {
-assert(SGPR_MIN == 0); // "SGPR_MIN <= Val" is always true and causes 
compilation warning.
+// "SGPR_MIN <= Val" is always true and causes compilation warning.
+static_assert(SGPR_MIN == 0, "");
 return createSRegOperand(getSgprClassId(Width), Val - SGPR_MIN);
   }
 

diff  --git a/llvm/lib/Target/X86/X86InsertPrefetch.cpp 
b/llvm/lib/Target/X86/X86InsertPrefetch.cpp
index 53925bbfd72fe..004e6fa5ebf4e 100644
--- a/llvm/lib/Target/X86/X86InsertPrefetch.cpp
+++ b/llvm/lib/Target/X86/X86InsertPrefetch.cpp
@@ -214,10 +214,10 @@ bool 
X86InsertPrefetch::runOnMachineFunction(MachineFunction &MF) {
 MF.CreateMachineInstr(Desc, Current->getDebugLoc(), true);
 MachineInstrBuilder MIB(MF, PFetch);
 
-assert(X86::AddrBaseReg == 0 && X86::AddrScaleAmt == 1 &&
-   X86::AddrIndexReg == 2 && X86::AddrDisp == 3 &&
-   X86::AddrSegmentReg == 4 &&
-   "Unexpected change in X86 operand offset order.");
+static_assert(X86::AddrBaseReg == 0 && X86::AddrScaleAmt == 1 &&
+  X86::AddrIndexReg == 2 && X86::AddrDisp == 3 &&
+  X86::AddrSegmentReg == 4,
+  "Unexpected change in X86 operand offset order.");
 
 // This assu

[llvm-branch-commits] [compiler-rt] 596d534 - [ASan] Stop blocking child thread progress from parent thread in `pthread_create` interceptor.

[Dan Liew via llvm-branch-commits]

Author: Dan Liew
Date: 2021-01-22T23:34:43-08:00
New Revision: 596d534ac3524052df210be8d3c01a33b2260a42

URL: 
https://github.com/llvm/llvm-project/commit/596d534ac3524052df210be8d3c01a33b2260a42
DIFF: 
https://github.com/llvm/llvm-project/commit/596d534ac3524052df210be8d3c01a33b2260a42.diff

LOG: [ASan] Stop blocking child thread progress from parent thread in 
`pthread_create` interceptor.

Previously in ASan's `pthread_create` interceptor we would block in the
`pthread_create` interceptor waiting for the child thread to start.

Unfortunately this has bad performance characteristics because the OS
scheduler doesn't know the relationship between the parent and child
thread (i.e. the parent thread cannot make progress until the child
thread makes progress) and may make the wrong scheduling decision which
stalls progress.

It turns out that ASan didn't use to block in this interceptor but was
changed to do so to try to address
http://llvm.org/bugs/show_bug.cgi?id=21621/.

In that bug the problem being addressed was a LeakSanitizer false
positive. That bug concerns a heap object being passed
as `arg` to `pthread_create`. If:

* The calling thread loses a live reference to the object (e.g.
  `pthread_create` finishes and the thread no longer has a live
  reference to the object).
* Leak checking is triggered.
* The child thread has not yet started (once it starts it will have a
  live reference).

then the heap object will incorrectly appear to be leaked.

This bug is covered by the 
`lsan/TestCases/leak_check_before_thread_started.cpp` test case.

In b029c5101fb49b3577a1c322f42ef9fc616f25bf ASan was changed to block
in `pthread_create()` until the child thread starts so that `arg` is
kept alive for the purposes of leaking check.

While this change "works" its problematic due to the performance
problems it causes. The change is also completely unnecessary if leak
checking is disabled (via detect_leaks runtime option or
CAN_SANITIZE_LEAKS compile time config).

This patch does two things:

1. Takes a different approach to solving the leak false positive by
   making LSan's leak checking mechanism treat the `arg` pointer of
   created but not started threads as reachable.  This is done by
   implementing the `ForEachRegisteredThreadContextCb` callback for
   ASan.

2. Removes the blocking behaviour in the ASan `pthread_create`
   interceptor.

rdar://problem/63537240

Differential Revision: https://reviews.llvm.org/D95184

Added: 


Modified: 
compiler-rt/lib/asan/asan_allocator.cpp
compiler-rt/lib/asan/asan_interceptors.cpp
compiler-rt/lib/asan/asan_thread.cpp
compiler-rt/lib/asan/asan_thread.h

Removed: 




diff  --git a/compiler-rt/lib/asan/asan_allocator.cpp 
b/compiler-rt/lib/asan/asan_allocator.cpp
index 4da697835870..cd97b37652f8 100644
--- a/compiler-rt/lib/asan/asan_allocator.cpp
+++ b/compiler-rt/lib/asan/asan_allocator.cpp
@@ -1185,12 +1185,30 @@ IgnoreObjectResult IgnoreObjectLocked(const void *p) {
 }
 
 void GetAdditionalThreadContextPtrs(ThreadContextBase *tctx, void *ptrs) {
-  // This function can be used to treat memory reachable from `tctx` as live.
-  // This is useful for threads that have been created but not yet started.
-
-  // This is currently a no-op because the ASan `pthread_create()` interceptor
-  // blocks until the child thread starts which keeps the thread's `arg` 
pointer
-  // live.
+  // Look for the arg pointer of threads that have been created or are running.
+  // This is necessary to prevent false positive leaks due to the AsanThread
+  // holding the only live reference to a heap object.  This can happen because
+  // the `pthread_create()` interceptor doesn't wait for the child thread to
+  // start before returning and thus loosing the the only live reference to the
+  // heap object on the stack.
+
+  __asan::AsanThreadContext *atctx =
+  reinterpret_cast<__asan::AsanThreadContext *>(tctx);
+  __asan::AsanThread *asan_thread = atctx->thread;
+
+  // Note ThreadStatusRunning is required because there is a small window where
+  // the thread status switches to `ThreadStatusRunning` but the `arg` pointer
+  // still isn't on the stack yet.
+  if (atctx->status != ThreadStatusCreated &&
+  atctx->status != ThreadStatusRunning)
+return;
+
+  uptr thread_arg = reinterpret_cast(asan_thread->get_arg());
+  if (!thread_arg)
+return;
+
+  auto ptrsVec = reinterpret_cast *>(ptrs);
+  ptrsVec->push_back(thread_arg);
 }
 
 }  // namespace __lsan

diff  --git a/compiler-rt/lib/asan/asan_interceptors.cpp 
b/compiler-rt/lib/asan/asan_interceptors.cpp
index b19cf25c7cd0..cd07d51878b1 100644
--- a/compiler-rt/lib/asan/asan_interceptors.cpp
+++ b/compiler-rt/lib/asan/asan_interceptors.cpp
@@ -189,20 +189,11 @@ DECLARE_REAL_AND_INTERCEPTOR(void, free, void *)
 #include "sanitizer_common/sanitizer_common_syscalls.inc"
 #include "sanitizer_common/sanitizer_syscalls_netb

[llvm-branch-commits] [llvm] 5660dc5 - [TargetLowering] Simplify some code in SimplifySetCC that tries to handle SIGN_EXTEND_INREG operand types that should never happen. NFCI

[Craig Topper via llvm-branch-commits]

Author: Craig Topper
Date: 2021-01-21T23:56:37-08:00
New Revision: 5660dc5968ec6dacba1917b741d660c582f69e9e

URL: 
https://github.com/llvm/llvm-project/commit/5660dc5968ec6dacba1917b741d660c582f69e9e
DIFF: 
https://github.com/llvm/llvm-project/commit/5660dc5968ec6dacba1917b741d660c582f69e9e.diff

LOG: [TargetLowering] Simplify some code in SimplifySetCC that tries to handle 
SIGN_EXTEND_INREG operand types that should never happen. NFCI

There was code to handle the first operand being different than
the result type. And code to handle first operand having the
same type as the type to extend from. This should never happen
for a correctly formed SIGN_EXTEND_INREG. I've replace the
code with asserts.

I also noticed we created the same APInt twice so I've reused it.

Added: 


Modified: 
llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp

Removed: 




diff  --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp 
b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index e2f42d050740..3d1d257ae54c 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -3747,24 +3747,16 @@ SDValue TargetLowering::SimplifySetCC(EVT VT, SDValue 
N0, SDValue N1,
   if (C1.getMinSignedBits() > ExtSrcTyBits)
 return DAG.getConstant(Cond == ISD::SETNE, dl, VT);
 
-  SDValue ZextOp;
-  EVT Op0Ty = N0.getOperand(0).getValueType();
-  if (Op0Ty == ExtSrcTy) {
-ZextOp = N0.getOperand(0);
-  } else {
-APInt Imm = APInt::getLowBitsSet(ExtDstTyBits, ExtSrcTyBits);
-ZextOp = DAG.getNode(ISD::AND, dl, Op0Ty, N0.getOperand(0),
- DAG.getConstant(Imm, dl, Op0Ty));
-  }
+  assert(ExtDstTy == N0.getOperand(0).getValueType() &&
+ ExtDstTy != ExtSrcTy && "Unexpected types!");
+  APInt Imm = APInt::getLowBitsSet(ExtDstTyBits, ExtSrcTyBits);
+  SDValue ZextOp = DAG.getNode(ISD::AND, dl, ExtDstTy, N0.getOperand(0),
+   DAG.getConstant(Imm, dl, ExtDstTy));
   if (!DCI.isCalledByLegalizer())
 DCI.AddToWorklist(ZextOp.getNode());
   // Otherwise, make this a use of a zext.
   return DAG.getSetCC(dl, VT, ZextOp,
-  DAG.getConstant(C1 & APInt::getLowBitsSet(
-  ExtDstTyBits,
-  ExtSrcTyBits),
-  dl, ExtDstTy),
-  Cond);
+  DAG.getConstant(C1 & Imm, dl, ExtDstTy), Cond);
 } else if ((N1C->isNullValue() || N1C->isOne()) &&
 (Cond == ISD::SETEQ || Cond == ISD::SETNE)) {
   // SETCC (SETCC), [0|1], [EQ|NE]  -> SETCC



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[llvm-branch-commits] [llvm] c971bcd - [AMDGPU] Test clean up (NFC)

[Christudasan Devadasan via llvm-branch-commits]

Author: Christudasan Devadasan
Date: 2021-01-22T13:38:52+05:30
New Revision: c971bcd2102b905e6469463fb8309ab3f7b2b8f2

URL: 
https://github.com/llvm/llvm-project/commit/c971bcd2102b905e6469463fb8309ab3f7b2b8f2
DIFF: 
https://github.com/llvm/llvm-project/commit/c971bcd2102b905e6469463fb8309ab3f7b2b8f2.diff

LOG: [AMDGPU] Test clean up (NFC)

Added: 


Modified: 
llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll

Removed: 




diff  --git a/llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll 
b/llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
index 4fb2625a5221..5e4b5f70de0b 100644
--- a/llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
+++ b/llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
@@ -16,7 +16,7 @@
 ; so eliminateFrameIndex would not adjust the access to use the
 ; correct FP offset.
 
-define amdgpu_kernel void @local_stack_offset_uses_sp(i64 addrspace(1)* %out, 
i8 addrspace(1)* %in) {
+define amdgpu_kernel void @local_stack_offset_uses_sp(i64 addrspace(1)* %out) {
 ; MUBUF-LABEL: local_stack_offset_uses_sp:
 ; MUBUF:   ; %bb.0: ; %entry
 ; MUBUF-NEXT:s_load_dwordx2 s[4:5], s[4:5], 0x0
@@ -106,7 +106,7 @@ entry:
   ret void
 }
 
-define void @func_local_stack_offset_uses_sp(i64 addrspace(1)* %out, i8 
addrspace(1)* %in) {
+define void @func_local_stack_offset_uses_sp(i64 addrspace(1)* %out) {
 ; MUBUF-LABEL: func_local_stack_offset_uses_sp:
 ; MUBUF:   ; %bb.0: ; %entry
 ; MUBUF-NEXT:s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)



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[llvm-branch-commits] [llvm] f20bb85 - Update filename to workers.py file in documentation

[Douglas Yung via llvm-branch-commits]

Author: Douglas Yung
Date: 2021-01-22T00:20:26-08:00
New Revision: f20bb857addaf5479d9b1d4ac29e315a3971ff1c

URL: 
https://github.com/llvm/llvm-project/commit/f20bb857addaf5479d9b1d4ac29e315a3971ff1c
DIFF: 
https://github.com/llvm/llvm-project/commit/f20bb857addaf5479d9b1d4ac29e315a3971ff1c.diff

LOG: Update filename to workers.py file in documentation

Commit be9f322e8dc530a56f03356aad31fa9031b27e26 moved the list of workers from
slaves.py to workers.py, but the documentation in "How To Add A Builder" was
never updated and now references a non-existing file. This fixes that.

Reviewed By: gkistanova

Differential Revision: https://reviews.llvm.org/D94886

Added: 


Modified: 
llvm/docs/HowToAddABuilder.rst

Removed: 




diff  --git a/llvm/docs/HowToAddABuilder.rst b/llvm/docs/HowToAddABuilder.rst
index 93a289512fe2..608deb2c1ffd 100644
--- a/llvm/docs/HowToAddABuilder.rst
+++ b/llvm/docs/HowToAddABuilder.rst
@@ -86,7 +86,7 @@ Here are the steps you can follow to do so:
`zorg `_. Use the typical LLVM 
`workflow `_.
 
-   * workers are added to ``buildbot/osuosl/master/config/slaves.py``
+   * workers are added to ``buildbot/osuosl/master/config/workers.py``
* builders are added to ``buildbot/osuosl/master/config/builders.py``
 
Please make sure your builder name and its builddir are unique through the



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[llvm-branch-commits] [llvm] 75f10c9 - NFC: Remove simple_ilist comment mentioning ilist/iplist allocating

[Nathan Lanza via llvm-branch-commits]

Author: Nathan Lanza
Date: 2021-01-22T03:24:54-05:00
New Revision: 75f10c957477b269d9b954a686231342aeb8004b

URL: 
https://github.com/llvm/llvm-project/commit/75f10c957477b269d9b954a686231342aeb8004b
DIFF: 
https://github.com/llvm/llvm-project/commit/75f10c957477b269d9b954a686231342aeb8004b.diff

LOG: NFC: Remove simple_ilist comment mentioning ilist/iplist allocating

Allocation was removed from ilist in 2016 in the git commit
b5da00533510.

Reviewed By: dexonsmith

Differential Revision: https://reviews.llvm.org/D93953

Added: 


Modified: 
llvm/include/llvm/ADT/simple_ilist.h

Removed: 




diff  --git a/llvm/include/llvm/ADT/simple_ilist.h 
b/llvm/include/llvm/ADT/simple_ilist.h
index d5ae20cd455ba..d4b6be3472191 100644
--- a/llvm/include/llvm/ADT/simple_ilist.h
+++ b/llvm/include/llvm/ADT/simple_ilist.h
@@ -28,8 +28,8 @@ namespace llvm {
 /// This is a simple intrusive list for a \c T that inherits from \c
 /// ilist_node.  The list never takes ownership of anything inserted in it.
 ///
-/// Unlike \a iplist and \a ilist, \a simple_ilist never allocates or
-/// deletes values, and has no callback traits.
+/// Unlike \a iplist and \a ilist, \a simple_ilist never deletes
+/// values, and has no callback traits.
 ///
 /// The API for adding nodes include \a push_front(), \a push_back(), and \a
 /// insert().  These all take values by reference (not by pointer), except for



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[llvm-branch-commits] [llvm] c953a83 - [TargetLowering] Use getBoolConstant instead of assuming zero or one for boolean contents.

[Craig Topper via llvm-branch-commits]

Author: Craig Topper
Date: 2021-01-22T00:26:14-08:00
New Revision: c953a8334707951d172e8061c8dc9054eb0c5c3f

URL: 
https://github.com/llvm/llvm-project/commit/c953a8334707951d172e8061c8dc9054eb0c5c3f
DIFF: 
https://github.com/llvm/llvm-project/commit/c953a8334707951d172e8061c8dc9054eb0c5c3f.diff

LOG: [TargetLowering] Use getBoolConstant instead of assuming zero or one for 
boolean contents.

Noticed while I was touching other nearby code. I don't have a
test where this matters because the targets I work on
use zero or one boolean contents. And the tests cases I've seen
this fire on happen before type legalization where the result type
is MVT::i1 so the distinction doesn't matter.

Added: 


Modified: 
llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp

Removed: 




diff  --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp 
b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index 3d1d257ae54c3..b0b4a6ae9227d 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -3745,7 +3745,7 @@ SDValue TargetLowering::SimplifySetCC(EVT VT, SDValue N0, 
SDValue N1,
   // If the constant doesn't fit into the number of bits for the source of
   // the sign extension, it is impossible for both sides to be equal.
   if (C1.getMinSignedBits() > ExtSrcTyBits)
-return DAG.getConstant(Cond == ISD::SETNE, dl, VT);
+return DAG.getBoolConstant(Cond == ISD::SETNE, dl, VT, OpVT);
 
   assert(ExtDstTy == N0.getOperand(0).getValueType() &&
  ExtDstTy != ExtSrcTy && "Unexpected types!");



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[llvm-branch-commits] [clang] ff5f42e - [clang][cli] Port visibility LangOptions to marshalling system

[Jan Svoboda via llvm-branch-commits]

Author: Jan Svoboda
Date: 2021-01-22T09:32:01+01:00
New Revision: ff5f42e413386b1b3730879abf7b35756891e1c3

URL: 
https://github.com/llvm/llvm-project/commit/ff5f42e413386b1b3730879abf7b35756891e1c3
DIFF: 
https://github.com/llvm/llvm-project/commit/ff5f42e413386b1b3730879abf7b35756891e1c3.diff

LOG: [clang][cli] Port visibility LangOptions to marshalling system

This patch introduces Clang-specific MarshallingInfoVisibility TableGen class.

Reviewed By: dexonsmith

Differential Revision: https://reviews.llvm.org/D95147

Added: 


Modified: 
clang/include/clang/Driver/Options.td
clang/lib/Frontend/CompilerInvocation.cpp

Removed: 




diff  --git a/clang/include/clang/Driver/Options.td 
b/clang/include/clang/Driver/Options.td
index a2800381be0e..3bb545f84132 100644
--- a/clang/include/clang/Driver/Options.td
+++ b/clang/include/clang/Driver/Options.td
@@ -510,6 +510,14 @@ multiclass BoolGOption;
 }
 
+// FIXME: Diagnose if target does not support protected visibility.
+class MarshallingInfoVisibility
+  : MarshallingInfoString,
+Values<"default,hidden,internal,protected">,
+NormalizedValues<["DefaultVisibility", "HiddenVisibility",
+  "HiddenVisibility", "ProtectedVisibility"]>,
+AutoNormalizeEnum {}
+
 // Key paths that are constant during parsing of options with the same key 
path prefix.
 defvar open_cl = LangOpts<"OpenCL">;
 
@@ -2482,15 +2490,26 @@ def fno_var_tracking : Flag<["-"], "fno-var-tracking">, 
Group, Group,
   HelpText<"Generate verbose assembly output">;
 def dA : Flag<["-"], "dA">, Alias;
-defm visibility_from_dllstorageclass : 
OptInFFlag<"visibility-from-dllstorageclass", "Set the visiblity of symbols in 
the generated code from their DLL storage class">;
+defm visibility_from_dllstorageclass : 
BoolFOption<"visibility-from-dllstorageclass",
+  LangOpts<"VisibilityFromDLLStorageClass">, DefaultsToFalse,
+  ChangedBy,
+  ResetBy>;
 def fvisibility_dllexport_EQ : Joined<["-"], "fvisibility-dllexport=">, 
Group, Flags<[CC1Option]>,
-  HelpText<"The visibility for dllexport defintions 
[-fvisibility-from-dllstorageclass]">, Values<"hidden,protected,default">;
+  HelpText<"The visibility for dllexport defintions 
[-fvisibility-from-dllstorageclass]">,
+  MarshallingInfoVisibility, 
"DefaultVisibility">,
+  ShouldParseIf;
 def fvisibility_nodllstorageclass_EQ : Joined<["-"], 
"fvisibility-nodllstorageclass=">, Group, Flags<[CC1Option]>,
-  HelpText<"The visibility for defintiions without an explicit DLL export 
class [-fvisibility-from-dllstorageclass]">, Values<"hidden,protected,default">;
+  HelpText<"The visibility for defintiions without an explicit DLL export 
class [-fvisibility-from-dllstorageclass]">,
+  MarshallingInfoVisibility, 
"HiddenVisibility">,
+  ShouldParseIf;
 def fvisibility_externs_dllimport_EQ : Joined<["-"], 
"fvisibility-externs-dllimport=">, Group, Flags<[CC1Option]>,
-  HelpText<"The visibility for dllimport external declarations 
[-fvisibility-from-dllstorageclass]">, Values<"hidden,protected,default">;
+  HelpText<"The visibility for dllimport external declarations 
[-fvisibility-from-dllstorageclass]">,
+  MarshallingInfoVisibility, 
"DefaultVisibility">,
+  ShouldParseIf;
 def fvisibility_externs_nodllstorageclass_EQ : Joined<["-"], 
"fvisibility-externs-nodllstorageclass=">, Group, Flags<[CC1Option]>,
-  HelpText<"The visibility for external declarations without an explicit DLL 
dllstorageclass [-fvisibility-from-dllstorageclass]">, 
Values<"hidden,protected,default">;
+  HelpText<"The visibility for external declarations without an explicit DLL 
dllstorageclass [-fvisibility-from-dllstorageclass]">,
+  MarshallingInfoVisibility, 
"HiddenVisibility">,
+  ShouldParseIf;
 def fvisibility_EQ : Joined<["-"], "fvisibility=">, Group,
   HelpText<"Set the default symbol visibility for all global declarations">, 
Values<"hidden,default">;
 def fvisibility_inlines_hidden : Flag<["-"], "fvisibility-inlines-hidden">, 
Group,
@@ -5148,14 +5167,12 @@ def stack_protector : Separate<["-"], 
"stack-protector">,
 def stack_protector_buffer_size : Separate<["-"], 
"stack-protector-buffer-size">,
   HelpText<"Lower bound for a buffer to be considered for stack protection">,
   MarshallingInfoStringInt, "8">;
-// FIXME: diagnose if target does not support protected visibility
-// Good place for this is CompilerInvocation::fixupInvocation. Do the same for 
parseVisibility.
 def fvisibility : Separate<["-"], "fvisibility">,
-  HelpText<"Default type and symbol visibility">, 
Values<"default,hidden,internal,protected">,
-  NormalizedValues<["DefaultVisibility", "HiddenVisibility", 
"HiddenVisibility", "ProtectedVisibility"]>,
-  MarshallingInfoString, "DefaultVisibility">, 
AutoNormalizeEnum;
+  HelpText<"Default type and symbol visibility">,
+  MarshallingInfoVisibility, 
"DefaultVisibility">;
 def ftype_visibility : Separate<["-"], "ftype-visibility">,
-  

[llvm-branch-commits] [llvm] ff8a1ca - [AMDGPU] Fix the inconsistency in soffset for MUBUF stack accesses.

[Christudasan Devadasan via llvm-branch-commits]

Author: Christudasan Devadasan
Date: 2021-01-22T14:20:59+05:30
New Revision: ff8a1cae181438b97937848060da1efb67117ea4

URL: 
https://github.com/llvm/llvm-project/commit/ff8a1cae181438b97937848060da1efb67117ea4
DIFF: 
https://github.com/llvm/llvm-project/commit/ff8a1cae181438b97937848060da1efb67117ea4.diff

LOG: [AMDGPU] Fix the inconsistency in soffset for MUBUF stack accesses.

During instruction selection, there is an inconsistency in choosing
the initial soffset value. With certain early passes, this value is
getting modified and that brought additional fixup during
eliminateFrameIndex to work for all cases. This whole transformation
looks trivial and can be handled better.

This patch clearly defines the initial value for soffset and keeps it
unchanged before eliminateFrameIndex. The initial value must be zero
for MUBUF with a frame index. The non-frame index MUBUF forms that
use a raw offset from SP will have the stack register for soffset.
During frame elimination, the soffset remains zero for entry functions
with zero dynamic allocas and no callsites, or else is updated to the
appropriate frame/stack register.

Also, did some code clean up and made all asserts around soffset
stricter to match.

Reviewed By: scott.linder

Differential Revision: https://reviews.llvm.org/D95071

Added: 


Modified: 
llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-private.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-private.mir
llvm/test/CodeGen/AMDGPU/amdpal-callable.ll
llvm/test/CodeGen/AMDGPU/fold-fi-mubuf.mir
llvm/test/CodeGen/AMDGPU/stack-pointer-offset-relative-frameindex.ll

Removed: 




diff  --git a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp 
b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
index 3c66745c0e70..340f4ac6f57a 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
@@ -1523,7 +1523,9 @@ std::pair 
AMDGPUDAGToDAGISel::foldFrameIndex(SDValue N) const
   FI ? CurDAG->getTargetFrameIndex(FI->getIndex(), FI->getValueType(0)) : 
N;
 
   // We rebase the base address into an absolute stack address and hence
-  // use constant 0 for soffset.
+  // use constant 0 for soffset. This value must be retained until
+  // frame elimination and eliminateFrameIndex will choose the appropriate
+  // frame register if need be.
   return std::make_pair(TFI, CurDAG->getTargetConstant(0, DL, MVT::i32));
 }
 

diff  --git a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp 
b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
index 7255a061b26b..bd577a6fb8c5 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
@@ -3669,13 +3669,9 @@ 
AMDGPUInstructionSelector::selectMUBUFScratchOffen(MachineOperand &Root) const {
MIB.addReg(HighBits);
  },
  [=](MachineInstrBuilder &MIB) { // soffset
-   const MachineMemOperand *MMO = *MI->memoperands_begin();
-   const MachinePointerInfo &PtrInfo = MMO->getPointerInfo();
-
-   if (isStackPtrRelative(PtrInfo))
- MIB.addReg(Info->getStackPtrOffsetReg());
-   else
- MIB.addImm(0);
+   // Use constant zero for soffset and rely on eliminateFrameIndex
+   // to choose the appropriate frame register if need be.
+   MIB.addImm(0);
  },
  [=](MachineInstrBuilder &MIB) { // offset
MIB.addImm(Offset & 4095);
@@ -3722,15 +3718,9 @@ 
AMDGPUInstructionSelector::selectMUBUFScratchOffen(MachineOperand &Root) const {
MIB.addReg(VAddr);
},
[=](MachineInstrBuilder &MIB) { // soffset
- // If we don't know this private access is a local stack object, 
it
- // needs to be relative to the entry point's scratch wave offset.
- // TODO: Should split large offsets that don't fit like above.
- // TODO: Don't use scratch wave offset just because the offset
- // didn't fit.
- if (!Info->isEntryFunction() && FI.hasValue())
-   MIB.addReg(Info->getStackPtrOffsetReg());
- else
-   MIB.addImm(0);
+ // Use constant zero for soffset and rely on eliminateFrameIndex
+ // to choose the appropriate frame register if need be.
+ MIB.addImm(0);
},
[=](MachineInstrBuilder &MIB) { // offset
  MIB.addImm(Offset);

diff  --git a/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp 
b/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
index d22bdb791535..d5fa9afded27 100644
--- a/llvm/lib/T

[llvm-branch-commits] [llvm] 3e8d1e8 - [APSInt][NFC] Clean up doxygen comments

[Sven van Haastregt via llvm-branch-commits]

Author: Sven van Haastregt
Date: 2021-01-22T09:23:41Z
New Revision: 3e8d1e8b12ba9017b861fff94afdd4a29b39de17

URL: 
https://github.com/llvm/llvm-project/commit/3e8d1e8b12ba9017b861fff94afdd4a29b39de17
DIFF: 
https://github.com/llvm/llvm-project/commit/3e8d1e8b12ba9017b861fff94afdd4a29b39de17.diff

LOG: [APSInt][NFC] Clean up doxygen comments

Add a Doxygen class comment and clean up other Doxygen comments in
this file while we're at it.

Added: 


Modified: 
llvm/include/llvm/ADT/APSInt.h

Removed: 




diff  --git a/llvm/include/llvm/ADT/APSInt.h b/llvm/include/llvm/ADT/APSInt.h
index 0f991826c457..82e9ba81141f 100644
--- a/llvm/include/llvm/ADT/APSInt.h
+++ b/llvm/include/llvm/ADT/APSInt.h
@@ -18,6 +18,7 @@
 
 namespace llvm {
 
+/// An arbitrary precision integer that knows its signedness.
 class LLVM_NODISCARD APSInt : public APInt {
   bool IsUnsigned;
 
@@ -25,8 +26,7 @@ class LLVM_NODISCARD APSInt : public APInt {
   /// Default constructor that creates an uninitialized APInt.
   explicit APSInt() : IsUnsigned(false) {}
 
-  /// APSInt ctor - Create an APSInt with the specified width, default to
-  /// unsigned.
+  /// Create an APSInt with the specified width, default to unsigned.
   explicit APSInt(uint32_t BitWidth, bool isUnsigned = true)
: APInt(BitWidth, 0), IsUnsigned(isUnsigned) {}
 
@@ -78,11 +78,11 @@ class LLVM_NODISCARD APSInt : public APInt {
   void setIsUnsigned(bool Val) { IsUnsigned = Val; }
   void setIsSigned(bool Val) { IsUnsigned = !Val; }
 
-  /// toString - Append this APSInt to the specified SmallString.
+  /// Append this APSInt to the specified SmallString.
   void toString(SmallVectorImpl &Str, unsigned Radix = 10) const {
 APInt::toString(Str, Radix, isSigned());
   }
-  /// toString - Converts an APInt to a std::string.  This is an inefficient
+  /// Converts an APInt to a std::string.  This is an inefficient
   /// method; you should prefer passing in a SmallString instead.
   std::string toString(unsigned Radix) const {
 return APInt::toString(Radix, isSigned());
@@ -282,15 +282,15 @@ class LLVM_NODISCARD APSInt : public APInt {
 return APSInt(~static_cast(*this), IsUnsigned);
   }
 
-  /// getMaxValue - Return the APSInt representing the maximum integer value
-  ///  with the given bit width and signedness.
+  /// Return the APSInt representing the maximum integer value with the given
+  /// bit width and signedness.
   static APSInt getMaxValue(uint32_t numBits, bool Unsigned) {
 return APSInt(Unsigned ? APInt::getMaxValue(numBits)
: APInt::getSignedMaxValue(numBits), Unsigned);
   }
 
-  /// getMinValue - Return the APSInt representing the minimum integer value
-  ///  with the given bit width and signedness.
+  /// Return the APSInt representing the minimum integer value with the given
+  /// bit width and signedness.
   static APSInt getMinValue(uint32_t numBits, bool Unsigned) {
 return APSInt(Unsigned ? APInt::getMinValue(numBits)
: APInt::getSignedMinValue(numBits), Unsigned);
@@ -331,8 +331,8 @@ class LLVM_NODISCARD APSInt : public APInt {
   static APSInt get(int64_t X) { return APSInt(APInt(64, X), false); }
   static APSInt getUnsigned(uint64_t X) { return APSInt(APInt(64, X), true); }
 
-  /// Profile - Used to insert APSInt objects, or objects that contain APSInt
-  ///  objects, into FoldingSets.
+  /// Used to insert APSInt objects, or objects that contain APSInt objects,
+  /// into FoldingSets.
   void Profile(FoldingSetNodeID& ID) const;
 };
 



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[llvm-branch-commits] [llvm] 2e080eb - [SVE] Add support for scalable vectorization of loops with selects and cmps

[David Sherwood via llvm-branch-commits]

Author: David Sherwood
Date: 2021-01-22T09:48:13Z
New Revision: 2e080eb00ad76654313e0e119bb7fa0ffe2f9866

URL: 
https://github.com/llvm/llvm-project/commit/2e080eb00ad76654313e0e119bb7fa0ffe2f9866
DIFF: 
https://github.com/llvm/llvm-project/commit/2e080eb00ad76654313e0e119bb7fa0ffe2f9866.diff

LOG: [SVE] Add support for scalable vectorization of loops with selects and cmps

I have removed an unnecessary assert in 
LoopVectorizationCostModel::getInstructionCost
that prevented a cost being calculated for select instructions when using
scalable vectors. In addition, I have changed AArch64TTIImpl::getCmpSelInstrCost
to only do special cost calculations for fixed width vectors and fall
back to the base version for scalable vectors.

I have added a simple cost model test for cmps and selects:

  test/Analysis/CostModel/sve-cmpsel.ll

and some simple tests that show we vectorize loops with cmp and select:

  test/Transforms/LoopVectorize/AArch64/sve-basic-vec.ll

Differential Revision: https://reviews.llvm.org/D95039

Added: 
llvm/test/Analysis/CostModel/sve-cmpsel.ll
llvm/test/Transforms/LoopVectorize/AArch64/sve-basic-vec.ll

Modified: 
llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
llvm/lib/Transforms/Vectorize/LoopVectorize.cpp

Removed: 




diff  --git a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp 
b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
index ffa045846e59..7fda6b8fb602 100644
--- a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
+++ b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
@@ -707,7 +707,7 @@ int AArch64TTIImpl::getCmpSelInstrCost(unsigned Opcode, 
Type *ValTy,
   int ISD = TLI->InstructionOpcodeToISD(Opcode);
   // We don't lower some vector selects well that are wider than the register
   // width.
-  if (ValTy->isVectorTy() && ISD == ISD::SELECT) {
+  if (isa(ValTy) && ISD == ISD::SELECT) {
 // We would need this many instructions to hide the scalarization 
happening.
 const int AmortizationCost = 20;
 
@@ -749,6 +749,8 @@ int AArch64TTIImpl::getCmpSelInstrCost(unsigned Opcode, 
Type *ValTy,
 return Entry->Cost;
 }
   }
+  // The base case handles scalable vectors fine for now, since it treats the
+  // cost as 1 * legalization cost.
   return BaseT::getCmpSelInstrCost(Opcode, ValTy, CondTy, VecPred, CostKind, 
I);
 }
 

diff  --git a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp 
b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
index 1bc4afeae5f9..9e157f3061b6 100644
--- a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+++ b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
@@ -7334,10 +7334,8 @@ 
LoopVectorizationCostModel::getInstructionCost(Instruction *I, ElementCount VF,
 const SCEV *CondSCEV = SE->getSCEV(SI->getCondition());
 bool ScalarCond = (SE->isLoopInvariant(CondSCEV, TheLoop));
 Type *CondTy = SI->getCondition()->getType();
-if (!ScalarCond) {
-  assert(!VF.isScalable() && "VF is assumed to be non scalable.");
+if (!ScalarCond)
   CondTy = VectorType::get(CondTy, VF);
-}
 return TTI.getCmpSelInstrCost(I->getOpcode(), VectorTy, CondTy,
   CmpInst::BAD_ICMP_PREDICATE, CostKind, I);
   }

diff  --git a/llvm/test/Analysis/CostModel/sve-cmpsel.ll 
b/llvm/test/Analysis/CostModel/sve-cmpsel.ll
new file mode 100644
index ..163c863c1ea3
--- /dev/null
+++ b/llvm/test/Analysis/CostModel/sve-cmpsel.ll
@@ -0,0 +1,146 @@
+; RUN: opt -cost-model -analyze -mtriple=aarch64--linux-gnu -mattr=+sve  < %s 
2>%t | FileCheck %s
+
+; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t
+
+; If this check fails please read test/CodeGen/AArch64/README for instructions 
on how to resolve it.
+; WARN-NOT: warning
+
+; Check icmp for legal integer vectors.
+define void @cmp_legal_int() {
+; CHECK-LABEL: 'cmp_legal_int'
+; CHECK: Cost Model: Found an estimated cost of 1 for instruction:   %1 = icmp 
ne  undef, undef
+; CHECK: Cost Model: Found an estimated cost of 1 for instruction:   %2 = icmp 
ne  undef, undef
+; CHECK: Cost Model: Found an estimated cost of 1 for instruction:   %3 = icmp 
ne  undef, undef
+; CHECK: Cost Model: Found an estimated cost of 1 for instruction:   %4 = icmp 
ne  undef, undef
+  %1 = icmp ne  undef, undef
+  %2 = icmp ne  undef, undef
+  %3 = icmp ne  undef, undef
+  %4 = icmp ne  undef, undef
+  ret void
+}
+
+; Check icmp for an illegal integer vector.
+define  @cmp_nxv4i64() {
+; CHECK-LABEL: 'cmp_nxv4i64'
+; CHECK: Cost Model: Found an estimated cost of 2 for instruction:   %res = 
icmp ne  undef, undef
+; CHECK: Cost Model: Found an estimated cost of 0 for instruction:   ret 
 %res
+  %res = icmp ne  undef, undef
+  ret  %res
+}
+
+; Check icmp for legal predicate vectors.
+define void @cmp_legal_pred() {
+; CHECK-LABEL: 'cmp_legal_pred'
+; CHECK: Cost Model: Found an estimated cost of 1 for instruction:   %1 = icmp 
ne  und

[llvm-branch-commits] [llvm] 14eea6b - [LegacyPM] Update InversedLastUser on the fly. NFC.

[Jay Foad via llvm-branch-commits]

Author: Jay Foad
Date: 2021-01-22T09:48:54Z
New Revision: 14eea6b0ecddfe7d1c68754a8bfb7c21cde82df8

URL: 
https://github.com/llvm/llvm-project/commit/14eea6b0ecddfe7d1c68754a8bfb7c21cde82df8
DIFF: 
https://github.com/llvm/llvm-project/commit/14eea6b0ecddfe7d1c68754a8bfb7c21cde82df8.diff

LOG: [LegacyPM] Update InversedLastUser on the fly. NFC.

This speeds up setLastUser enough to give a 5% to 10% speed up on
trivial invocations of opt and llc, as measured by:

perf stat -r 100 opt -S -o /dev/null -O3 /dev/null
perf stat -r 100 llc -march=amdgcn /dev/null -filetype null

Don't dump last use information unless -debug-pass=Details to avoid
printing lots of spam that will break some existing lit tests. Before
this patch, dumping last use information was broken anyway, because it
used InversedLastUser before it had been populated.

Differential Revision: https://reviews.llvm.org/D92309

Added: 


Modified: 
llvm/include/llvm/IR/LegacyPassManagers.h
llvm/lib/IR/LegacyPassManager.cpp

Removed: 




diff  --git a/llvm/include/llvm/IR/LegacyPassManagers.h 
b/llvm/include/llvm/IR/LegacyPassManagers.h
index 498e736a0100..f4fae184e428 100644
--- a/llvm/include/llvm/IR/LegacyPassManagers.h
+++ b/llvm/include/llvm/IR/LegacyPassManagers.h
@@ -230,11 +230,11 @@ class PMTopLevelManager {
 
   // Map to keep track of last user of the analysis pass.
   // LastUser->second is the last user of Lastuser->first.
+  // This is kept in sync with InversedLastUser.
   DenseMap LastUser;
 
   // Map to keep track of passes that are last used by a pass.
-  // This inverse map is initialized at PM->run() based on
-  // LastUser map.
+  // This is kept in sync with LastUser.
   DenseMap > InversedLastUser;
 
   /// Immutable passes are managed by top level manager.

diff  --git a/llvm/lib/IR/LegacyPassManager.cpp 
b/llvm/lib/IR/LegacyPassManager.cpp
index 5575bc469a87..4547c3a01239 100644
--- a/llvm/lib/IR/LegacyPassManager.cpp
+++ b/llvm/lib/IR/LegacyPassManager.cpp
@@ -568,7 +568,12 @@ PMTopLevelManager::setLastUser(ArrayRef 
AnalysisPasses, Pass *P) {
 PDepth = P->getResolver()->getPMDataManager().getDepth();
 
   for (Pass *AP : AnalysisPasses) {
-LastUser[AP] = P;
+// Record P as the new last user of AP.
+auto &LastUserOfAP = LastUser[AP];
+if (LastUserOfAP)
+  InversedLastUser[LastUserOfAP].erase(AP);
+LastUserOfAP = P;
+InversedLastUser[P].insert(AP);
 
 if (P == AP)
   continue;
@@ -598,13 +603,13 @@ PMTopLevelManager::setLastUser(ArrayRef 
AnalysisPasses, Pass *P) {
 if (P->getResolver())
   setLastUser(LastPMUses, 
P->getResolver()->getPMDataManager().getAsPass());
 
-
 // If AP is the last user of other passes then make P last user of
 // such passes.
-for (auto &LU : LastUser) {
-  if (LU.second == AP)
-LU.second = P;
-}
+auto &LastUsedByAP = InversedLastUser[AP];
+for (Pass *L : LastUsedByAP)
+  LastUser[L] = P;
+InversedLastUser[P].insert(LastUsedByAP.begin(), LastUsedByAP.end());
+LastUsedByAP.clear();
   }
 }
 
@@ -850,11 +855,6 @@ void PMTopLevelManager::initializeAllAnalysisInfo() {
   // Initailize other pass managers
   for (PMDataManager *IPM : IndirectPassManagers)
 IPM->initializeAnalysisInfo();
-
-  for (auto LU : LastUser) {
-SmallPtrSet &L = InversedLastUser[LU.second];
-L.insert(LU.first);
-  }
 }
 
 /// Destructor
@@ -1151,6 +1151,8 @@ Pass *PMDataManager::findAnalysisPass(AnalysisID AID, 
bool SearchParent) {
 
 // Print list of passes that are last used by P.
 void PMDataManager::dumpLastUses(Pass *P, unsigned Offset) const{
+  if (PassDebugging < Details)
+return;
 
   SmallVector LUses;
 



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[llvm-branch-commits] [llvm] 3b1f17c - [JITLink][ELF/x86-64] Add support for weak and hidden symbols.

[Lang Hames via llvm-branch-commits]

Author: Lang Hames
Date: 2021-01-22T20:51:11+11:00
New Revision: 3b1f17ca5498e17655ce531f13f1e8c2cf37058d

URL: 
https://github.com/llvm/llvm-project/commit/3b1f17ca5498e17655ce531f13f1e8c2cf37058d
DIFF: 
https://github.com/llvm/llvm-project/commit/3b1f17ca5498e17655ce531f13f1e8c2cf37058d.diff

LOG: [JITLink][ELF/x86-64] Add support for weak and hidden symbols.

Added: 
llvm/test/ExecutionEngine/JITLink/X86/ELF_weak_definitions.s
llvm/test/ExecutionEngine/JITLink/X86/Inputs/ELF_weak_defs_extra.s

Modified: 
llvm/lib/ExecutionEngine/JITLink/ELF_x86_64.cpp
llvm/lib/ExecutionEngine/JITLink/JITLink.cpp

Removed: 




diff  --git a/llvm/lib/ExecutionEngine/JITLink/ELF_x86_64.cpp 
b/llvm/lib/ExecutionEngine/JITLink/ELF_x86_64.cpp
index 244975f4a51a..0ca2130150a6 100644
--- a/llvm/lib/ExecutionEngine/JITLink/ELF_x86_64.cpp
+++ b/llvm/lib/ExecutionEngine/JITLink/ELF_x86_64.cpp
@@ -544,7 +544,6 @@ class ELFLinkGraphBuilder_x86_64 {
 //   Type != ELF::STT_COMMON) {
 // continue;
 //   }
-std::pair bindings;
 auto Name = SymRef.getName(*StringTable);
 // I am not sure on If this is going to hold as an invariant. Revisit.
 if (!Name)
@@ -560,11 +559,43 @@ class ELFLinkGraphBuilder_x86_64 {
   continue;
 }
 
-// TODO: weak and hidden
-if (SymRef.isExternal())
-  bindings = {Linkage::Strong, Scope::Default};
-else
-  bindings = {Linkage::Strong, Scope::Local};
+// Map Visibility and Binding to Scope and Linkage:
+Linkage L = Linkage::Strong;
+Scope S = Scope::Default;
+
+switch (SymRef.getBinding()) {
+case ELF::STB_LOCAL:
+  S = Scope::Local;
+  break;
+case ELF::STB_GLOBAL:
+  // Nothing to do here.
+  break;
+case ELF::STB_WEAK:
+  L = Linkage::Weak;
+  break;
+default:
+  return make_error("Unrecognized symbol binding for " +
+ *Name,
+ inconvertibleErrorCode());
+}
+
+switch (SymRef.getVisibility()) {
+case ELF::STV_DEFAULT:
+case ELF::STV_PROTECTED:
+  // FIXME: Make STV_DEFAULT symbols pre-emptible? This probably needs
+  // Orc support.
+  // Otherwise nothing to do here.
+  break;
+case ELF::STV_HIDDEN:
+  // Default scope -> Hidden scope. No effect on local scope.
+  if (S == Scope::Default)
+S = Scope::Hidden;
+  break;
+case ELF::STV_INTERNAL:
+  return make_error("Unrecognized symbol visibility for " 
+
+ *Name,
+ inconvertibleErrorCode());
+}
 
 if (SymRef.isDefined() &&
 (Type == ELF::STT_FUNC || Type == ELF::STT_OBJECT ||
@@ -591,17 +622,17 @@ class ELFLinkGraphBuilder_x86_64 {
 return make_error(
 "Section has no block", llvm::inconvertibleErrorCode());
 
-  auto B = *bs.begin();
+  auto *B = *bs.begin();
   LLVM_DEBUG({ dbgs() << "  " << *Name << " at index " << SymbolIndex 
<< "\n"; });
   if (SymRef.getType() == ELF::STT_SECTION)
 *Name = *sectName;
-  auto &S = G->addDefinedSymbol(
-  *B, SymRef.getValue(), *Name, SymRef.st_size, bindings.first,
-  bindings.second, SymRef.getType() == ELF::STT_FUNC, false);
-  JITSymbolTable[SymbolIndex] = &S;
+  auto &Sym = G->addDefinedSymbol(
+  *B, SymRef.getValue(), *Name, SymRef.st_size, L, S,
+  SymRef.getType() == ELF::STT_FUNC, false);
+  JITSymbolTable[SymbolIndex] = &Sym;
 } else if (SymRef.isUndefined() && SymRef.isExternal()) {
-  auto &S = G->addExternalSymbol(*Name, SymRef.st_size, 
bindings.first);
-  JITSymbolTable[SymbolIndex] = &S;
+  auto &Sym = G->addExternalSymbol(*Name, SymRef.st_size, L);
+  JITSymbolTable[SymbolIndex] = &Sym;
 } else
   LLVM_DEBUG({
   dbgs()

diff  --git a/llvm/lib/ExecutionEngine/JITLink/JITLink.cpp 
b/llvm/lib/ExecutionEngine/JITLink/JITLink.cpp
index 41b5423dc335..93dfba9c759b 100644
--- a/llvm/lib/ExecutionEngine/JITLink/JITLink.cpp
+++ b/llvm/lib/ExecutionEngine/JITLink/JITLink.cpp
@@ -64,7 +64,7 @@ const char *getGenericEdgeKindName(Edge::Kind K) {
   case Edge::KeepAlive:
 return "Keep-Alive";
   default:
-llvm_unreachable("Unrecognized relocation kind");
+return "";
   }
 }
 

diff  --git a/llvm/test/ExecutionEngine/JITLink/X86/ELF_weak_definitions.s 
b/llvm/test/ExecutionEngine/JITLink/X86/ELF_weak_definitions.s
new file mode 100644
index ..9085f42098db
--- /dev/null
+++ b/llvm/test/ExecutionEngine/JITLink/X86/ELF_weak_definitions.

[llvm-branch-commits] [llvm] 83e7a96 - Fix build failure caused by 2e080eb00ad76654313e0e119bb7fa0ffe2f9866

[David Sherwood via llvm-branch-commits]

Author: David Sherwood
Date: 2021-01-22T09:56:53Z
New Revision: 83e7a96c06835eb37416ffdc463edc7ddd18656c

URL: 
https://github.com/llvm/llvm-project/commit/83e7a96c06835eb37416ffdc463edc7ddd18656c
DIFF: 
https://github.com/llvm/llvm-project/commit/83e7a96c06835eb37416ffdc463edc7ddd18656c.diff

LOG: Fix build failure caused by 2e080eb00ad76654313e0e119bb7fa0ffe2f9866

Added: 
llvm/test/Analysis/CostModel/AArch64/sve-cmpsel.ll

Modified: 


Removed: 
llvm/test/Analysis/CostModel/sve-cmpsel.ll



diff  --git a/llvm/test/Analysis/CostModel/sve-cmpsel.ll 
b/llvm/test/Analysis/CostModel/AArch64/sve-cmpsel.ll
similarity index 100%
rename from llvm/test/Analysis/CostModel/sve-cmpsel.ll
rename to llvm/test/Analysis/CostModel/AArch64/sve-cmpsel.ll



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[llvm-branch-commits] [llvm] 481659c - [X86][SSE] Add v16i8 02_20_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu shuffle test

[Simon Pilgrim via llvm-branch-commits]

Author: Simon Pilgrim
Date: 2021-01-22T10:05:22Z
New Revision: 481659c55c4ec1e133bec82a909e9e6baee70a28

URL: 
https://github.com/llvm/llvm-project/commit/481659c55c4ec1e133bec82a909e9e6baee70a28
DIFF: 
https://github.com/llvm/llvm-project/commit/481659c55c4ec1e133bec82a909e9e6baee70a28.diff

LOG: [X86][SSE] Add v16i8 02_20_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu 
shuffle test

Added: 


Modified: 
llvm/test/CodeGen/X86/vector-shuffle-128-v16.ll

Removed: 




diff  --git a/llvm/test/CodeGen/X86/vector-shuffle-128-v16.ll 
b/llvm/test/CodeGen/X86/vector-shuffle-128-v16.ll
index ee3cf43e8f2f7..012b9f07dc6d0 100644
--- a/llvm/test/CodeGen/X86/vector-shuffle-128-v16.ll
+++ b/llvm/test/CodeGen/X86/vector-shuffle-128-v16.ll
@@ -761,6 +761,60 @@ define <16 x i8> 
@shuffle_v16i8_16_17_18_19_04_05_06_07_24_25_10_11_28_13_30_15(
   ret <16 x i8> %shuffle
 }
 
+define <16 x i8> 
@shuffle_v16i8_02_20_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu(<16 x i8> %a, 
<16 x i8> %b)  {
+; SSE2-LABEL: shuffle_v16i8_02_20_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu:
+; SSE2:   # %bb.0:
+; SSE2-NEXT:pshufd {{.*#+}} xmm1 = xmm1[1,1,1,1]
+; SSE2-NEXT:punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
+; SSE2-NEXT:pand {{.*}}(%rip), %xmm0
+; SSE2-NEXT:psrlq $16, %xmm0
+; SSE2-NEXT:packuswb %xmm0, %xmm0
+; SSE2-NEXT:retq
+;
+; SSSE3-LABEL: shuffle_v16i8_02_20_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu:
+; SSSE3:   # %bb.0:
+; SSSE3-NEXT:punpcklbw {{.*#+}} xmm0 = 
xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
+; SSSE3-NEXT:pshufb {{.*#+}} xmm0 = xmm0[4,9,u,u,u,u,u,u,u,u,u,u,u,u,u,u]
+; SSSE3-NEXT:retq
+;
+; SSE41-LABEL: shuffle_v16i8_02_20_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu:
+; SSE41:   # %bb.0:
+; SSE41-NEXT:punpcklbw {{.*#+}} xmm0 = 
xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
+; SSE41-NEXT:pshufb {{.*#+}} xmm0 = xmm0[4,9,u,u,u,u,u,u,u,u,u,u,u,u,u,u]
+; SSE41-NEXT:retq
+;
+; AVX1-LABEL: shuffle_v16i8_02_20_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu:
+; AVX1:   # %bb.0:
+; AVX1-NEXT:vpunpcklbw {{.*#+}} xmm0 = 
xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
+; AVX1-NEXT:vpshufb {{.*#+}} xmm0 = xmm0[4,9,u,u,u,u,u,u,u,u,u,u,u,u,u,u]
+; AVX1-NEXT:retq
+;
+; AVX2-LABEL: shuffle_v16i8_02_20_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu:
+; AVX2:   # %bb.0:
+; AVX2-NEXT:vpunpcklbw {{.*#+}} xmm0 = 
xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
+; AVX2-NEXT:vpshufb {{.*#+}} xmm0 = xmm0[4,9,u,u,u,u,u,u,u,u,u,u,u,u,u,u]
+; AVX2-NEXT:retq
+;
+; AVX512VLBW-LABEL: 
shuffle_v16i8_02_20_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu:
+; AVX512VLBW:   # %bb.0:
+; AVX512VLBW-NEXT:vpunpcklbw {{.*#+}} xmm0 = 
xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
+; AVX512VLBW-NEXT:vpshufb {{.*#+}} xmm0 = 
xmm0[4,9,u,u,u,u,u,u,u,u,u,u,u,u,u,u]
+; AVX512VLBW-NEXT:retq
+;
+; AVX512VLVBMI-LABEL: 
shuffle_v16i8_02_20_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu:
+; AVX512VLVBMI:   # %bb.0:
+; AVX512VLVBMI-NEXT:vpbroadcastw {{.*#+}} xmm2 = 
[5122,5122,5122,5122,5122,5122,5122,5122]
+; AVX512VLVBMI-NEXT:vpermt2b %xmm1, %xmm2, %xmm0
+; AVX512VLVBMI-NEXT:retq
+;
+; XOP-LABEL: shuffle_v16i8_02_20_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu:
+; XOP:   # %bb.0:
+; XOP-NEXT:vpperm {{.*#+}} xmm0 = 
xmm0[2],xmm1[4],xmm0[u,u,u,u,u,u,u,u,u,u,u,u,u,u]
+; XOP-NEXT:retq
+  %shuffle = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> 
+  ret <16 x i8> %shuffle
+}
+
 ; PR39387
 define <16 x i8> @shuffle_v16i8_5_6_7_8_9_10_27_28_29_30_31_0_1_2_3_4(<16 x 
i8> %a, <16 x i8> %b) {
 ; SSE2-LABEL: shuffle_v16i8_5_6_7_8_9_10_27_28_29_30_31_0_1_2_3_4:



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[llvm-branch-commits] [llvm] 636b877 - [X86][SSE] Add PR48823 HSUB test case

[Simon Pilgrim via llvm-branch-commits]

Author: Simon Pilgrim
Date: 2021-01-22T10:05:22Z
New Revision: 636b87785c1de64134254b688d30ab1248b16ed2

URL: 
https://github.com/llvm/llvm-project/commit/636b87785c1de64134254b688d30ab1248b16ed2
DIFF: 
https://github.com/llvm/llvm-project/commit/636b87785c1de64134254b688d30ab1248b16ed2.diff

LOG: [X86][SSE] Add PR48823 HSUB test case

Added: 


Modified: 
llvm/test/CodeGen/X86/haddsub-3.ll

Removed: 




diff  --git a/llvm/test/CodeGen/X86/haddsub-3.ll 
b/llvm/test/CodeGen/X86/haddsub-3.ll
index 05ab83f8604de..651ab4ef39355 100644
--- a/llvm/test/CodeGen/X86/haddsub-3.ll
+++ b/llvm/test/CodeGen/X86/haddsub-3.ll
@@ -156,3 +156,56 @@ define <4 x double> @PR41414(i64 %x, <4 x double> %y) {
   %t3 = fadd <4 x double> zeroinitializer, %t2
   ret <4 x double> %t3
 }
+
+define <4 x float> @PR48823(<4 x float> %0, <4 x float> %1) {
+; SSE2-LABEL: PR48823:
+; SSE2:   # %bb.0:
+; SSE2-NEXT:movaps %xmm0, %xmm2
+; SSE2-NEXT:shufps {{.*#+}} xmm2 = xmm2[1,1],xmm1[2,3]
+; SSE2-NEXT:shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,2]
+; SSE2-NEXT:subps %xmm2, %xmm0
+; SSE2-NEXT:retq
+;
+; SSSE3-SLOW-LABEL: PR48823:
+; SSSE3-SLOW:   # %bb.0:
+; SSSE3-SLOW-NEXT:movaps %xmm0, %xmm2
+; SSSE3-SLOW-NEXT:shufps {{.*#+}} xmm2 = xmm2[1,1],xmm1[2,3]
+; SSSE3-SLOW-NEXT:shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,2]
+; SSSE3-SLOW-NEXT:subps %xmm2, %xmm0
+; SSSE3-SLOW-NEXT:retq
+;
+; SSSE3-FAST-LABEL: PR48823:
+; SSSE3-FAST:   # %bb.0:
+; SSSE3-FAST-NEXT:movaps %xmm0, %xmm2
+; SSSE3-FAST-NEXT:shufps {{.*#+}} xmm2 = xmm2[1,1],xmm1[2,3]
+; SSSE3-FAST-NEXT:shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,2]
+; SSSE3-FAST-NEXT:subps %xmm2, %xmm0
+; SSSE3-FAST-NEXT:retq
+;
+; AVX1-SLOW-LABEL: PR48823:
+; AVX1-SLOW:   # %bb.0:
+; AVX1-SLOW-NEXT:vshufps {{.*#+}} xmm2 = xmm0[1,1],xmm1[2,3]
+; AVX1-SLOW-NEXT:vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,2]
+; AVX1-SLOW-NEXT:vsubps %xmm2, %xmm0, %xmm0
+; AVX1-SLOW-NEXT:retq
+;
+; AVX1-FAST-LABEL: PR48823:
+; AVX1-FAST:   # %bb.0:
+; AVX1-FAST-NEXT:vshufps {{.*#+}} xmm2 = xmm0[1,1],xmm1[2,3]
+; AVX1-FAST-NEXT:vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,2]
+; AVX1-FAST-NEXT:vsubps %xmm2, %xmm0, %xmm0
+; AVX1-FAST-NEXT:retq
+;
+; AVX2-LABEL: PR48823:
+; AVX2:   # %bb.0:
+; AVX2-NEXT:vshufps {{.*#+}} xmm2 = xmm0[1,1],xmm1[2,3]
+; AVX2-NEXT:vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,2]
+; AVX2-NEXT:vsubps %xmm2, %xmm0, %xmm0
+; AVX2-NEXT:retq
+  %3 = shufflevector <4 x float> %0, <4 x float> poison, <4 x i32> 
+  %4 = fsub <4 x float> %0, %3
+  %5 = shufflevector <4 x float> %1, <4 x float> poison, <4 x i32> 
+  %6 = fsub <4 x float> %5, %1
+  %7 = shufflevector <4 x float> %4, <4 x float> %6, <4 x i32> 
+  ret <4 x float> %7
+}



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[llvm-branch-commits] [llvm] 5097413 - [gn build] Port 8214982b5042

[LLVM GN Syncbot via llvm-branch-commits]

Author: LLVM GN Syncbot
Date: 2021-01-22T10:24:45Z
New Revision: 509741382f6db7687f33bb2fd35cc6a58b058001

URL: 
https://github.com/llvm/llvm-project/commit/509741382f6db7687f33bb2fd35cc6a58b058001
DIFF: 
https://github.com/llvm/llvm-project/commit/509741382f6db7687f33bb2fd35cc6a58b058001.diff

LOG: [gn build] Port 8214982b5042

Added: 


Modified: 
llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn

Removed: 




diff  --git a/llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn 
b/llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
index 24e728b78087..40b6143e49c0 100644
--- a/llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
@@ -148,6 +148,7 @@ static_library("LLVMAMDGPUCodeGen") {
 "AMDGPULowerKernelArguments.cpp",
 "AMDGPULowerKernelAttributes.cpp",
 "AMDGPUMCInstLower.cpp",
+"AMDGPUMIRFormatter.cpp",
 "AMDGPUMachineCFGStructurizer.cpp",
 "AMDGPUMachineFunction.cpp",
 "AMDGPUMachineModuleInfo.cpp",



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[llvm-branch-commits] [llvm] 176c7f2 - [IR] Optimize adding attribute to AttributeList (NFC)

[Nikita Popov via llvm-branch-commits]

Author: Nikita Popov
Date: 2021-01-22T11:30:21+01:00
New Revision: 176c7f22172eefddc9ff42dfae8a6015d4e017c6

URL: 
https://github.com/llvm/llvm-project/commit/176c7f22172eefddc9ff42dfae8a6015d4e017c6
DIFF: 
https://github.com/llvm/llvm-project/commit/176c7f22172eefddc9ff42dfae8a6015d4e017c6.diff

LOG: [IR] Optimize adding attribute to AttributeList (NFC)

When adding an enum attribute to an AttributeList, avoid going
through an AttrBuilder and instead directly add the attribute to
the correct set. Going through AttrBuilder is expensive, because
it requires all string attributes to be reconstructed.

This can be further improved by inserting the attribute at the
right position and using the AttributeSetNode::getSorted() API.

This recovers the small compile-time regression from D94633.

Added: 


Modified: 
llvm/include/llvm/IR/Attributes.h
llvm/lib/IR/Attributes.cpp

Removed: 




diff  --git a/llvm/include/llvm/IR/Attributes.h 
b/llvm/include/llvm/IR/Attributes.h
index fbfe5854594f..b4056540663f 100644
--- a/llvm/include/llvm/IR/Attributes.h
+++ b/llvm/include/llvm/IR/Attributes.h
@@ -399,6 +399,9 @@ class AttributeList {
 
   static AttributeList getImpl(LLVMContext &C, ArrayRef 
AttrSets);
 
+  AttributeList setAttributes(LLVMContext &C, unsigned Index,
+  AttributeSet Attrs) const;
+
 public:
   AttributeList() = default;
 

diff  --git a/llvm/lib/IR/Attributes.cpp b/llvm/lib/IR/Attributes.cpp
index ec2b83f614d9..b17673f14c9c 100644
--- a/llvm/lib/IR/Attributes.cpp
+++ b/llvm/lib/IR/Attributes.cpp
@@ -1272,9 +1272,11 @@ AttributeList AttributeList::get(LLVMContext &C,
 AttributeList AttributeList::addAttribute(LLVMContext &C, unsigned Index,
   Attribute::AttrKind Kind) const {
   if (hasAttribute(Index, Kind)) return *this;
-  AttrBuilder B;
-  B.addAttribute(Kind);
-  return addAttributes(C, Index, B);
+  AttributeSet Attrs = getAttributes(Index);
+  // TODO: Insert at correct position and avoid sort.
+  SmallVector NewAttrs(Attrs.begin(), Attrs.end());
+  NewAttrs.push_back(Attribute::get(C, Kind));
+  return setAttributes(C, Index, AttributeSet::get(C, NewAttrs));
 }
 
 AttributeList AttributeList::addAttribute(LLVMContext &C, unsigned Index,
@@ -1292,6 +1294,16 @@ AttributeList AttributeList::addAttribute(LLVMContext 
&C, unsigned Index,
   return addAttributes(C, Index, B);
 }
 
+AttributeList AttributeList::setAttributes(LLVMContext &C, unsigned Index,
+   AttributeSet Attrs) const {
+  Index = attrIdxToArrayIdx(Index);
+  SmallVector AttrSets(this->begin(), this->end());
+  if (Index >= AttrSets.size())
+AttrSets.resize(Index + 1);
+  AttrSets[Index] = Attrs;
+  return AttributeList::getImpl(C, AttrSets);
+}
+
 AttributeList AttributeList::addAttributes(LLVMContext &C, unsigned Index,
const AttrBuilder &B) const {
   if (!B.hasAttributes())
@@ -1309,16 +1321,9 @@ AttributeList AttributeList::addAttributes(LLVMContext 
&C, unsigned Index,
  "Attempt to change alignment!");
 #endif
 
-  Index = attrIdxToArrayIdx(Index);
-  SmallVector AttrSets(this->begin(), this->end());
-  if (Index >= AttrSets.size())
-AttrSets.resize(Index + 1);
-
-  AttrBuilder Merged(AttrSets[Index]);
+  AttrBuilder Merged(getAttributes(Index));
   Merged.merge(B);
-  AttrSets[Index] = AttributeSet::get(C, Merged);
-
-  return getImpl(C, AttrSets);
+  return setAttributes(C, Index, AttributeSet::get(C, Merged));
 }
 
 AttributeList AttributeList::addParamAttribute(LLVMContext &C,



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[llvm-branch-commits] [clang-tools-extra] 4cca222 - [clangd] Add documentation for building and testing clangd

[Kadir Cetinkaya via llvm-branch-commits]

Author: Kadir Cetinkaya
Date: 2021-01-22T11:53:31+01:00
New Revision: 4cca79396c4e4d484ba79e74c5dc45fe63e4

URL: 
https://github.com/llvm/llvm-project/commit/4cca79396c4e4d484ba79e74c5dc45fe63e4
DIFF: 
https://github.com/llvm/llvm-project/commit/4cca79396c4e4d484ba79e74c5dc45fe63e4.diff

LOG: [clangd] Add documentation for building and testing clangd

Adds minimal cmake configuration required to build and test clangd,
while telling target names. Should be helpful for people unfamiliar with the
LLVM repo.

See https://github.com/clangd/clangd/issues/579 for a request.

Differential Revision: https://reviews.llvm.org/D91186

Added: 


Modified: 
clang-tools-extra/clangd/README.md

Removed: 




diff  --git a/clang-tools-extra/clangd/README.md 
b/clang-tools-extra/clangd/README.md
index c9a75895acab..3ef9174c9529 100644
--- a/clang-tools-extra/clangd/README.md
+++ b/clang-tools-extra/clangd/README.md
@@ -17,3 +17,22 @@ through one of these channels:
   channel](https://discord.gg/xS7Z362).
 - user questions and feature requests can be asked in the clangd topic on [LLVM
   Discussion Forums](https://llvm.discourse.group/c/llvm-project/clangd/34)
+
+### Building and testing clangd
+
+For a minimal setup on building clangd:
+- Clone the LLVM repo to `$LLVM_ROOT`.
+- Create a build directory, for example at `$LLVM_ROOT/build`.
+- Inside the build directory run: `cmake $LLVM_ROOT/llvm/
+  -DCMAKE_BUILD_TYPE=Release -DLLVM_ENABLE_PROJECTS="clang;clang-tools-extra"`.
+
+  - We suggest building in `Release` mode as building DEBUG binaries requires
+considerably more resources. You can check
+[Building LLVM with CMake documentation](https://llvm.org/docs/CMake.html)
+for more details about cmake flags.
+  - In addition to that using `Ninja` as a generator rather than default `make`
+is preferred. To do that consider passing `-G Ninja` to cmake invocation.
+  - Finally, you can turn on assertions via `-DLLVM_ENABLE_ASSERTS=On`.
+
+- Afterwards you can build clangd with `cmake --build $LLVM_ROOT/build --target
+  clangd`, similarly run tests by changing target to `check-clangd`.



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[llvm-branch-commits] [llvm] 9ae73cd - [ARM] Adjust isSaturatingConditional to return a new SDValue. NFC

[David Green via llvm-branch-commits]

Author: David Green
Date: 2021-01-22T11:11:36Z
New Revision: 9ae73cdbc1e59fd3149e60efd2b96e68e8d1669b

URL: 
https://github.com/llvm/llvm-project/commit/9ae73cdbc1e59fd3149e60efd2b96e68e8d1669b
DIFF: 
https://github.com/llvm/llvm-project/commit/9ae73cdbc1e59fd3149e60efd2b96e68e8d1669b.diff

LOG: [ARM] Adjust isSaturatingConditional to return a new SDValue. NFC

This replaces the isSaturatingConditional function with
LowerSaturatingConditional that directly returns a new SSAT or
USAT SDValue, instead of returning true and the components of it.

Added: 


Modified: 
llvm/lib/Target/ARM/ARMISelLowering.cpp

Removed: 




diff  --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp 
b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index aabfad045d9f..949d2ffc1714 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -5036,17 +5036,13 @@ static bool isLowerSaturate(const SDValue LHS, const 
SDValue RHS,
 // etc.
 //
 // LLVM canonicalizes these to either a min(max()) or a max(min())
-// pattern. This function tries to match one of these and will return true
-// if successful.
+// pattern. This function tries to match one of these and will return a SSAT
+// node if successful.
 //
-// USAT works similarily to SSAT but bounds on the interval [0, k] where k + 1 
is
-// a power of 2.
-//
-// It returns true if the conversion can be done, false otherwise.
-// Additionally, the variable is returned in parameter V, the constant in K and
-// usat is set to true if the conditional represents an unsigned saturation
-static bool isSaturatingConditional(const SDValue &Op, SDValue &V,
-uint64_t &K, bool &Usat) {
+// USAT works similarily to SSAT but bounds on the interval [0, k] where k + 1
+// is a power of 2.
+static SDValue LowerSaturatingConditional(SDValue Op, SelectionDAG &DAG) {
+  EVT VT = Op.getValueType();
   SDValue V1 = Op.getOperand(0);
   SDValue K1 = Op.getOperand(1);
   SDValue TrueVal1 = Op.getOperand(2);
@@ -5055,7 +5051,7 @@ static bool isSaturatingConditional(const SDValue &Op, 
SDValue &V,
 
   const SDValue Op2 = isa(TrueVal1) ? FalseVal1 : TrueVal1;
   if (Op2.getOpcode() != ISD::SELECT_CC)
-return false;
+return SDValue();
 
   SDValue V2 = Op2.getOperand(0);
   SDValue K2 = Op2.getOperand(1);
@@ -5074,41 +5070,39 @@ static bool isSaturatingConditional(const SDValue &Op, 
SDValue &V,
 
   // Check that the registers and the constants match a max(min()) or 
min(max())
   // pattern
-  if (V1Tmp == TrueVal1 && V2Tmp == TrueVal2 && K1 == FalseVal1 &&
-  K2 == FalseVal2 &&
-  ((isGTorGE(CC1) && isLTorLE(CC2)) || (isLTorLE(CC1) && isGTorGE(CC2 {
-
-// Check that the constant in the lower-bound check is
-// the opposite of the constant in the upper-bound check
-// in 1's complement.
-if (!isa(K1) || !isa(K2))
-  return false;
+  if (V1Tmp != TrueVal1 || V2Tmp != TrueVal2 || K1 != FalseVal1 ||
+  K2 != FalseVal2 ||
+  !((isGTorGE(CC1) && isLTorLE(CC2)) || (isLTorLE(CC1) && isGTorGE(CC2
+return SDValue();
 
-int64_t Val1 = cast(K1)->getSExtValue();
-int64_t Val2 = cast(K2)->getSExtValue();
-int64_t PosVal = std::max(Val1, Val2);
-int64_t NegVal = std::min(Val1, Val2);
+  // Check that the constant in the lower-bound check is
+  // the opposite of the constant in the upper-bound check
+  // in 1's complement.
+  if (!isa(K1) || !isa(K2))
+return SDValue();
 
-if (!((Val1 > Val2 && isLTorLE(CC1)) || (Val1 < Val2 && isLTorLE(CC2))) ||
-!isPowerOf2_64(PosVal + 1)) 
-  return false;
+  int64_t Val1 = cast(K1)->getSExtValue();
+  int64_t Val2 = cast(K2)->getSExtValue();
+  int64_t PosVal = std::max(Val1, Val2);
+  int64_t NegVal = std::min(Val1, Val2);
 
-// Handle the 
diff erence between USAT (unsigned) and SSAT (signed)
-// saturation
-if (Val1 == ~Val2)
-  Usat = false;
-else if (NegVal == 0)
-  Usat = true;
-else
-  return false;
+  if (!((Val1 > Val2 && isLTorLE(CC1)) || (Val1 < Val2 && isLTorLE(CC2))) ||
+  !isPowerOf2_64(PosVal + 1))
+return SDValue();
 
-V = V2Tmp;
-// At this point, PosVal is guaranteed to be positive
-K = (uint64_t) PosVal; 
+  // Handle the 
diff erence between USAT (unsigned) and SSAT (signed)
+  // saturation
+  // At this point, PosVal is guaranteed to be positive
+  uint64_t K = PosVal;
+  SDLoc dl(Op);
+  if (Val1 == ~Val2)
+return DAG.getNode(ARMISD::SSAT, dl, VT, V2Tmp,
+   DAG.getConstant(countTrailingOnes(K), dl, VT));
+  if (NegVal == 0)
+return DAG.getNode(ARMISD::USAT, dl, VT, V2Tmp,
+   DAG.getConstant(countTrailingOnes(K), dl, VT));
 
-return true;
-  }
-  return false;
+  return SDValue();
 }
 
 // Check if a condition of the type x < k ? k : x can be converted into a
@@ -5168,18 +5162,9 @@ SDValue ARMTargetLowerin

[llvm-branch-commits] [llvm] ffe72f9 - [X86][SSE] Don't fold shuffle(binop(), binop()) -> binop(shuffle(), shuffle()) if the shuffle are splats

[Simon Pilgrim via llvm-branch-commits]

Author: Simon Pilgrim
Date: 2021-01-22T11:31:38Z
New Revision: ffe72f987f4866c46c18174cdb750dea88bedba3

URL: 
https://github.com/llvm/llvm-project/commit/ffe72f987f4866c46c18174cdb750dea88bedba3
DIFF: 
https://github.com/llvm/llvm-project/commit/ffe72f987f4866c46c18174cdb750dea88bedba3.diff

LOG: [X86][SSE] Don't fold shuffle(binop(),binop()) -> 
binop(shuffle(),shuffle()) if the shuffle are splats

rGbe69e66b1cd8 added the fold, but DAGCombiner.visitVECTOR_SHUFFLE doesn't 
merge shuffles if the inner shuffle is a splat, so we need to bail.

The non-fast-horiz-ops paths see some minor regressions, we might be able to 
improve on this after lowering to target shuffles.

Fix PR48823

Added: 


Modified: 
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/haddsub-3.ll

Removed: 




diff  --git a/llvm/lib/Target/X86/X86ISelLowering.cpp 
b/llvm/lib/Target/X86/X86ISelLowering.cpp
index c5cc23f6236e..895a02e5c98e 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -37964,23 +37964,24 @@ static SDValue combineShuffle(SDNode *N, SelectionDAG 
&DAG,
   return HAddSub;
 
 // Merge shuffles through binops if its likely we'll be able to merge it
-// with other shuffles.
+// with other shuffles (as long as they aren't splats).
 // shuffle(bop(shuffle(x,y),shuffle(z,w)),bop(shuffle(a,b),shuffle(c,d)))
 // TODO: We might be able to move this to DAGCombiner::visitVECTOR_SHUFFLE.
 if (auto *SVN = dyn_cast(N)) {
   unsigned SrcOpcode = N->getOperand(0).getOpcode();
   if (SrcOpcode == N->getOperand(1).getOpcode() && TLI.isBinOp(SrcOpcode) 
&&
   N->isOnlyUserOf(N->getOperand(0).getNode()) &&
-  N->isOnlyUserOf(N->getOperand(1).getNode()) &&
-  VT.getScalarSizeInBits() >= 32) {
+  N->isOnlyUserOf(N->getOperand(1).getNode())) {
 SDValue Op00 = N->getOperand(0).getOperand(0);
 SDValue Op10 = N->getOperand(1).getOperand(0);
 SDValue Op01 = N->getOperand(0).getOperand(1);
 SDValue Op11 = N->getOperand(1).getOperand(1);
-if ((Op00.getOpcode() == ISD::VECTOR_SHUFFLE ||
- Op10.getOpcode() == ISD::VECTOR_SHUFFLE) &&
-(Op01.getOpcode() == ISD::VECTOR_SHUFFLE ||
- Op11.getOpcode() == ISD::VECTOR_SHUFFLE)) {
+auto *SVN00 = dyn_cast(Op00);
+auto *SVN10 = dyn_cast(Op10);
+auto *SVN01 = dyn_cast(Op01);
+auto *SVN11 = dyn_cast(Op11);
+if (((SVN00 && !SVN00->isSplat()) || (SVN10 && !SVN10->isSplat())) &&
+((SVN01 && !SVN01->isSplat()) || (SVN11 && !SVN11->isSplat( {
   SDLoc DL(N);
   ArrayRef Mask = SVN->getMask();
   SDValue LHS = DAG.getVectorShuffle(VT, DL, Op00, Op10, Mask);

diff  --git a/llvm/test/CodeGen/X86/haddsub-3.ll 
b/llvm/test/CodeGen/X86/haddsub-3.ll
index 651ab4ef3935..48d4fe556555 100644
--- a/llvm/test/CodeGen/X86/haddsub-3.ll
+++ b/llvm/test/CodeGen/X86/haddsub-3.ll
@@ -161,46 +161,49 @@ define <4 x float> @PR48823(<4 x float> %0, <4 x float> 
%1) {
 ; SSE2-LABEL: PR48823:
 ; SSE2:   # %bb.0:
 ; SSE2-NEXT:movaps %xmm0, %xmm2
-; SSE2-NEXT:shufps {{.*#+}} xmm2 = xmm2[1,1],xmm1[2,3]
-; SSE2-NEXT:shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,2]
+; SSE2-NEXT:shufps {{.*#+}} xmm2 = xmm2[1,1],xmm0[1,1]
 ; SSE2-NEXT:subps %xmm2, %xmm0
+; SSE2-NEXT:movaps %xmm1, %xmm2
+; SSE2-NEXT:shufps {{.*#+}} xmm2 = xmm2[2,2],xmm1[2,2]
+; SSE2-NEXT:subps %xmm1, %xmm2
+; SSE2-NEXT:shufps {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3]
 ; SSE2-NEXT:retq
 ;
 ; SSSE3-SLOW-LABEL: PR48823:
 ; SSSE3-SLOW:   # %bb.0:
-; SSSE3-SLOW-NEXT:movaps %xmm0, %xmm2
-; SSSE3-SLOW-NEXT:shufps {{.*#+}} xmm2 = xmm2[1,1],xmm1[2,3]
-; SSSE3-SLOW-NEXT:shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,2]
+; SSSE3-SLOW-NEXT:movshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]
 ; SSSE3-SLOW-NEXT:subps %xmm2, %xmm0
+; SSSE3-SLOW-NEXT:movsldup {{.*#+}} xmm2 = xmm1[0,0,2,2]
+; SSSE3-SLOW-NEXT:subps %xmm1, %xmm2
+; SSSE3-SLOW-NEXT:shufps {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3]
 ; SSSE3-SLOW-NEXT:retq
 ;
 ; SSSE3-FAST-LABEL: PR48823:
 ; SSSE3-FAST:   # %bb.0:
-; SSSE3-FAST-NEXT:movaps %xmm0, %xmm2
-; SSSE3-FAST-NEXT:shufps {{.*#+}} xmm2 = xmm2[1,1],xmm1[2,3]
-; SSSE3-FAST-NEXT:shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,2]
-; SSSE3-FAST-NEXT:subps %xmm2, %xmm0
+; SSSE3-FAST-NEXT:hsubps %xmm1, %xmm0
 ; SSSE3-FAST-NEXT:retq
 ;
 ; AVX1-SLOW-LABEL: PR48823:
 ; AVX1-SLOW:   # %bb.0:
-; AVX1-SLOW-NEXT:vshufps {{.*#+}} xmm2 = xmm0[1,1],xmm1[2,3]
-; AVX1-SLOW-NEXT:vshufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,2]
+; AVX1-SLOW-NEXT:vmovshdup {{.*#+}} xmm2 = xmm0[1,1,3,3]
 ; AVX1-SLOW-NEXT:vsubps %xmm2, %xmm0, %xmm0
+; AVX1-SLOW-NEXT:vmovsldup {{.*#+}} xmm2 = xmm1[0,0,2,2]
+; AVX1-SLOW-NEXT:vsubps %xmm1, %xmm2, %xmm1
+; AVX1-S

[llvm-branch-commits] [llvm] 5dbe5d2 - [DAG] Commute shuffle(splat(A, u), shuffle(C, D)) -> shuffle'(shuffle(C, D), splat(A, u))

[Simon Pilgrim via llvm-branch-commits]

Author: Simon Pilgrim
Date: 2021-01-22T11:43:18Z
New Revision: 5dbe5d2c91209db9830d5b17093c408f22a7b471

URL: 
https://github.com/llvm/llvm-project/commit/5dbe5d2c91209db9830d5b17093c408f22a7b471
DIFF: 
https://github.com/llvm/llvm-project/commit/5dbe5d2c91209db9830d5b17093c408f22a7b471.diff

LOG: [DAG] Commute shuffle(splat(A,u), shuffle(C,D)) -> shuffle'(shuffle(C,D), 
splat(A,u))

We only merge shuffles if the inner (LHS) shuffle is a non-splat, so commute 
these shuffles to improve merging of multiple shuffles.

Added: 


Modified: 
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
llvm/test/CodeGen/X86/haddsub-undef.ll

Removed: 




diff  --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp 
b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 32c7ac2f6cfb..72640af23e40 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -20799,26 +20799,35 @@ SDValue DAGCombiner::visitVECTOR_SHUFFLE(SDNode *N) {
 }
   }
 
-  // Canonicalize shuffles according to rules:
-  //  shuffle(A, shuffle(A, B)) -> shuffle(shuffle(A,B), A)
-  //  shuffle(B, shuffle(A, B)) -> shuffle(shuffle(A,B), B)
-  //  shuffle(B, shuffle(A, Undef)) -> shuffle(shuffle(A, Undef), B)
-  if (N1.getOpcode() == ISD::VECTOR_SHUFFLE &&
-  N0.getOpcode() != ISD::VECTOR_SHUFFLE && Level < AfterLegalizeDAG &&
-  TLI.isTypeLegal(VT)) {
-// The incoming shuffle must be of the same type as the result of the
-// current shuffle.
-assert(N1->getOperand(0).getValueType() == VT &&
-   "Shuffle types don't match");
-
-SDValue SV0 = N1->getOperand(0);
-SDValue SV1 = N1->getOperand(1);
-bool HasSameOp0 = N0 == SV0;
-bool IsSV1Undef = SV1.isUndef();
-if (HasSameOp0 || IsSV1Undef || N0 == SV1)
-  // Commute the operands of this shuffle so that next rule
-  // will trigger.
+  if (Level < AfterLegalizeDAG && TLI.isTypeLegal(VT)) {
+// Canonicalize shuffles according to rules:
+//  shuffle(A, shuffle(A, B)) -> shuffle(shuffle(A,B), A)
+//  shuffle(B, shuffle(A, B)) -> shuffle(shuffle(A,B), B)
+//  shuffle(B, shuffle(A, Undef)) -> shuffle(shuffle(A, Undef), B)
+if (N1.getOpcode() == ISD::VECTOR_SHUFFLE &&
+N0.getOpcode() != ISD::VECTOR_SHUFFLE) {
+  // The incoming shuffle must be of the same type as the result of the
+  // current shuffle.
+  assert(N1->getOperand(0).getValueType() == VT &&
+ "Shuffle types don't match");
+
+  SDValue SV0 = N1->getOperand(0);
+  SDValue SV1 = N1->getOperand(1);
+  bool HasSameOp0 = N0 == SV0;
+  bool IsSV1Undef = SV1.isUndef();
+  if (HasSameOp0 || IsSV1Undef || N0 == SV1)
+// Commute the operands of this shuffle so merging below will trigger.
+return DAG.getCommutedVectorShuffle(*SVN);
+}
+
+// Canonicalize splat shuffles to the RHS to improve merging below.
+//  shuffle(splat(A,u), shuffle(C,D)) -> shuffle'(shuffle(C,D), splat(A,u))
+if (N0.getOpcode() == ISD::VECTOR_SHUFFLE &&
+N1.getOpcode() == ISD::VECTOR_SHUFFLE &&
+cast(N0)->isSplat() &&
+!cast(N1)->isSplat()) {
   return DAG.getCommutedVectorShuffle(*SVN);
+}
   }
 
   // Compute the combined shuffle mask for a shuffle with SV0 as the first

diff  --git a/llvm/test/CodeGen/X86/haddsub-undef.ll 
b/llvm/test/CodeGen/X86/haddsub-undef.ll
index 48ee31fe64fc..68d058433179 100644
--- a/llvm/test/CodeGen/X86/haddsub-undef.ll
+++ b/llvm/test/CodeGen/X86/haddsub-undef.ll
@@ -583,17 +583,11 @@ define <4 x float> @add_ps_016(<4 x float> %0, <4 x 
float> %1) {
 ; SSE-NEXT:movaps %xmm1, %xmm0
 ; SSE-NEXT:retq
 ;
-; AVX-SLOW-LABEL: add_ps_016:
-; AVX-SLOW:   # %bb.0:
-; AVX-SLOW-NEXT:vhaddps %xmm0, %xmm1, %xmm0
-; AVX-SLOW-NEXT:vpermilps {{.*#+}} xmm0 = xmm0[1,0,3,3]
-; AVX-SLOW-NEXT:retq
-;
-; AVX-FAST-LABEL: add_ps_016:
-; AVX-FAST:   # %bb.0:
-; AVX-FAST-NEXT:vhaddps %xmm0, %xmm1, %xmm0
-; AVX-FAST-NEXT:vpermilps {{.*#+}} xmm0 = xmm0[1,0,3,1]
-; AVX-FAST-NEXT:retq
+; AVX-LABEL: add_ps_016:
+; AVX:   # %bb.0:
+; AVX-NEXT:vhaddps %xmm0, %xmm1, %xmm0
+; AVX-NEXT:vpermilps {{.*#+}} xmm0 = xmm0[1,0,3,3]
+; AVX-NEXT:retq
   %3 = shufflevector <4 x float> %1, <4 x float> %0, <2 x i32> 
   %4 = shufflevector <4 x float> %1, <4 x float> %0, <2 x i32> 
   %5 = fadd <2 x float> %3, %4



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[llvm-branch-commits] [clang] d972d4c - Revert "[clang] Suppress "follow-up" diagnostics on recovery call expressions."

[Haojian Wu via llvm-branch-commits]

Author: Haojian Wu
Date: 2021-01-22T13:04:37+01:00
New Revision: d972d4c749048531953a16b815e07c67e8455a3b

URL: 
https://github.com/llvm/llvm-project/commit/d972d4c749048531953a16b815e07c67e8455a3b
DIFF: 
https://github.com/llvm/llvm-project/commit/d972d4c749048531953a16b815e07c67e8455a3b.diff

LOG: Revert "[clang] Suppress "follow-up" diagnostics on recovery call 
expressions."

This reverts commit efa9aaad703e6b150980ed1a74b4e7c9da7d85a2 and adds a
crash test.

The commit caused a crash in CodeGen with -fms-compatibility, see
https://bugs.llvm.org/show_bug.cgi?id=48690.

Added: 
clang/test/CodeGenCXX/ms-lookup-template-base-classes.cpp

Modified: 
clang/lib/Sema/SemaOverload.cpp
clang/test/AST/ast-dump-recovery.cpp
clang/test/SemaCXX/typo-correction-delayed.cpp

Removed: 




diff  --git a/clang/lib/Sema/SemaOverload.cpp b/clang/lib/Sema/SemaOverload.cpp
index 13d2125d1a28..2bef37b76763 100644
--- a/clang/lib/Sema/SemaOverload.cpp
+++ b/clang/lib/Sema/SemaOverload.cpp
@@ -12923,7 +12923,7 @@ BuildRecoveryCallExpr(Sema &SemaRef, Scope *S, Expr *Fn,
 return ExprError();
   }
 
-  // Build an implicit member access expression if appropriate. Just drop the
+  // Build an implicit member call if appropriate.  Just drop the
   // casts and such from the call, we don't really care.
   ExprResult NewFn = ExprError();
   if ((*R.begin())->isCXXClassMember())
@@ -12938,19 +12938,12 @@ BuildRecoveryCallExpr(Sema &SemaRef, Scope *S, Expr 
*Fn,
   if (NewFn.isInvalid())
 return ExprError();
 
-  auto CallE =
-  SemaRef.BuildCallExpr(/*Scope*/ nullptr, NewFn.get(), LParenLoc,
-MultiExprArg(Args.data(), Args.size()), RParenLoc);
-  if (CallE.isInvalid())
-return ExprError();
-  // We now have recovered a callee. However, building a real call may lead to
-  // incorrect secondary diagnostics if our recovery wasn't correct.
-  // We keep the recovery behavior but suppress all following diagnostics by
-  // using RecoveryExpr. We deliberately drop the return type of the recovery
-  // function, and rely on clang's dependent mechanism to suppress following
-  // diagnostics.
-  return SemaRef.CreateRecoveryExpr(CallE.get()->getBeginLoc(),
-CallE.get()->getEndLoc(), {CallE.get()});
+  // This shouldn't cause an infinite loop because we're giving it
+  // an expression with viable lookup results, which should never
+  // end up here.
+  return SemaRef.BuildCallExpr(/*Scope*/ nullptr, NewFn.get(), LParenLoc,
+   MultiExprArg(Args.data(), Args.size()),
+   RParenLoc);
 }
 
 /// Constructs and populates an OverloadedCandidateSet from

diff  --git a/clang/test/AST/ast-dump-recovery.cpp 
b/clang/test/AST/ast-dump-recovery.cpp
index a8da2b8ad449..b6d7ac1d0a8e 100644
--- a/clang/test/AST/ast-dump-recovery.cpp
+++ b/clang/test/AST/ast-dump-recovery.cpp
@@ -296,14 +296,3 @@ void InvalidCondition() {
   // CHECK-NEXT: `-IntegerLiteral {{.*}} 'int' 2
   invalid() ? 1 : 2;
 }
-
-void abcc();
-void TypoCorrection() {
-  // RecoveryExpr is always dependent-type in this case in order to suppress
-  // following diagnostics.
-  // CHECK:  RecoveryExpr {{.*}} ''
-  // CHECK-NEXT: `-CallExpr {{.*}} 'void'
-  // CHECK-NEXT:   `-ImplicitCastExpr
-  // CHECK-NEXT: `-DeclRefExpr {{.*}} 'abcc'
-  abc();
-}

diff  --git a/clang/test/CodeGenCXX/ms-lookup-template-base-classes.cpp 
b/clang/test/CodeGenCXX/ms-lookup-template-base-classes.cpp
new file mode 100644
index ..fbc211aca17a
--- /dev/null
+++ b/clang/test/CodeGenCXX/ms-lookup-template-base-classes.cpp
@@ -0,0 +1,15 @@
+// RUN: %clang_cc1 -triple x86_64-windows-msvc -emit-obj -fms-compatibility %s 
-o -
+// CHECK that we don't crash.
+
+struct Base {
+  void b(int, int);
+};
+
+template  struct Derived : Base {
+  void d() { b(1, 2); }
+};
+
+void use() {
+  Derived d;
+  d.d();
+}

diff  --git a/clang/test/SemaCXX/typo-correction-delayed.cpp 
b/clang/test/SemaCXX/typo-correction-delayed.cpp
index aa136a08be4f..66d19daf66fd 100644
--- a/clang/test/SemaCXX/typo-correction-delayed.cpp
+++ b/clang/test/SemaCXX/typo-correction-delayed.cpp
@@ -209,15 +209,6 @@ int z = 1 ? N : ;  // expected-error {{expected 
expression}}
 // expected-error-re@-1 {{use of undeclared identifier 'N'{{$
 }
 
-namespace noSecondaryDiags {
-void abcc(); // expected-note {{'abcc' declared here}}
-
-void test() {
-  // Verify the secondary diagnostic ".. convertible to 'bool'" is suppressed.
-  if (abc()) {} // expected-error {{use of undeclared identifier 'abc'; did 
you mean 'abcc'?}}
-}
-}
-
 // PR 23285. This test must be at the end of the file to avoid additional,
 // unwanted diagnostics.
 // expected-error-re@+2 {{use of undeclared identifier 'uintmax_t'{{$



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[llvm-branch-commits] [clang] e16959c - Don't delete default constructor of PathDiagnosticConsumerOptions

[Moritz Sichert via llvm-branch-commits]

Author: Moritz Sichert
Date: 2021-01-22T13:42:38+01:00
New Revision: e16959c9b8553a60ec5e9aa55d101154d5805292

URL: 
https://github.com/llvm/llvm-project/commit/e16959c9b8553a60ec5e9aa55d101154d5805292
DIFF: 
https://github.com/llvm/llvm-project/commit/e16959c9b8553a60ec5e9aa55d101154d5805292.diff

LOG: Don't delete default constructor of PathDiagnosticConsumerOptions

This type is used as an aggregate, i.e. it has no member functions.
Starting with C++20 types with deleted default constructors are not
aggregate types anymore which means that aggregate initialization will
not work for this class anymore. This leads to a compile error in
clang::AnalyzerOptions::getDiagOpts() for example.

Also set the boolean flags to false by default to avoid undefined
behavior. Previously this was prevented by deleting the default
constructor, now we explicitly initialize them.

Differential Revision: https://reviews.llvm.org/D92221

Added: 


Modified: 
clang/include/clang/Analysis/PathDiagnostic.h

Removed: 




diff  --git a/clang/include/clang/Analysis/PathDiagnostic.h 
b/clang/include/clang/Analysis/PathDiagnostic.h
index 544e9f4662d3..539aa20b8168 100644
--- a/clang/include/clang/Analysis/PathDiagnostic.h
+++ b/clang/include/clang/Analysis/PathDiagnostic.h
@@ -68,11 +68,11 @@ struct PathDiagnosticConsumerOptions {
   /// Whether to include additional information about macro expansions
   /// with the diagnostics, because otherwise they can be hard to obtain
   /// without re-compiling the program under analysis.
-  bool ShouldDisplayMacroExpansions;
+  bool ShouldDisplayMacroExpansions = false;
 
   /// Whether to include LLVM statistics of the process in the diagnostic.
   /// Useful for profiling the tool on large real-world codebases.
-  bool ShouldSerializeStats;
+  bool ShouldSerializeStats = false;
 
   /// If the consumer intends to produce multiple output files, should it
   /// use randomly generated file names for these files (with the tiny risk of
@@ -82,21 +82,19 @@ struct PathDiagnosticConsumerOptions {
   /// because deterministic mode is always superior when done right, but
   /// for some consumers this mode is experimental and needs to be
   /// off by default.
-  bool ShouldWriteStableReportFilename;
+  bool ShouldWriteStableReportFilename = false;
 
   /// Whether the consumer should treat consumed diagnostics as hard errors.
   /// Useful for breaking your build when issues are found.
-  bool ShouldDisplayWarningsAsErrors;
+  bool ShouldDisplayWarningsAsErrors = false;
 
   /// Whether the consumer should attempt to rewrite the source file
   /// with fix-it hints attached to the diagnostics it consumes.
-  bool ShouldApplyFixIts;
+  bool ShouldApplyFixIts = false;
 
   /// Whether the consumer should present the name of the entity that emitted
   /// the diagnostic (eg., a checker) so that the user knew how to disable it.
-  bool ShouldDisplayDiagnosticName;
-
-  PathDiagnosticConsumerOptions() = delete;
+  bool ShouldDisplayDiagnosticName = false;
 };
 
 class PathDiagnosticConsumer {



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[llvm-branch-commits] [clang] a0e3091 - [clang][Tooling] Get rid of a hack in SymbolOccurrences, NFCI

[Mikhail Maltsev via llvm-branch-commits]

Author: Mikhail Maltsev
Date: 2021-01-22T13:01:41Z
New Revision: a0e30914f8c8bb60795a008ce2d9e3c0a4f9b7a2

URL: 
https://github.com/llvm/llvm-project/commit/a0e30914f8c8bb60795a008ce2d9e3c0a4f9b7a2
DIFF: 
https://github.com/llvm/llvm-project/commit/a0e30914f8c8bb60795a008ce2d9e3c0a4f9b7a2.diff

LOG: [clang][Tooling] Get rid of a hack in SymbolOccurrences, NFCI

The class `SymbolOccurrences` can store either a single `SourceRange`
in-place or multiple `SourceRanges` on the heap. In the latter case
the number of source ranges is stored in the internal representation
of the beginning `SourceLocation` of the in-place `SourceRange`
object.

This change gets rid of such hack by placing `SourceRange` in a union
which holds either a valid `SourceRange` or an `unsigned int` (a number
of ranges).

The change also adds `static_assert`s that check that `SourceRange` and
`SourceLocation` are trivially destructible (this is required for the
current patch and for D94237 which has already been committed).

Reviewed By: MarkMurrayARM, simon_tatham

Differential Revision: https://reviews.llvm.org/D94599

Added: 


Modified: 
clang/include/clang/Tooling/Refactoring/Rename/SymbolOccurrences.h
clang/lib/Basic/SourceLocation.cpp
clang/lib/Tooling/Refactoring/Rename/SymbolOccurrences.cpp

Removed: 




diff  --git 
a/clang/include/clang/Tooling/Refactoring/Rename/SymbolOccurrences.h 
b/clang/include/clang/Tooling/Refactoring/Rename/SymbolOccurrences.h
index 3b903cb822f3..c4bfaa9cc377 100644
--- a/clang/include/clang/Tooling/Refactoring/Rename/SymbolOccurrences.h
+++ b/clang/include/clang/Tooling/Refactoring/Rename/SymbolOccurrences.h
@@ -69,17 +69,18 @@ class SymbolOccurrence {
   OccurrenceKind getKind() const { return Kind; }
 
   ArrayRef getNameRanges() const {
-if (MultipleRanges) {
-  return llvm::makeArrayRef(MultipleRanges.get(),
-RangeOrNumRanges.getBegin().getRawEncoding());
-}
-return RangeOrNumRanges;
+if (MultipleRanges)
+  return llvm::makeArrayRef(MultipleRanges.get(), NumRanges);
+return SingleRange;
   }
 
 private:
   OccurrenceKind Kind;
   std::unique_ptr MultipleRanges;
-  SourceRange RangeOrNumRanges;
+  union {
+SourceRange SingleRange;
+unsigned NumRanges;
+  };
 };
 
 using SymbolOccurrences = std::vector;

diff  --git a/clang/lib/Basic/SourceLocation.cpp 
b/clang/lib/Basic/SourceLocation.cpp
index fde139932c40..6f6412028d77 100644
--- a/clang/lib/Basic/SourceLocation.cpp
+++ b/clang/lib/Basic/SourceLocation.cpp
@@ -42,6 +42,14 @@ void PrettyStackTraceLoc::print(raw_ostream &OS) const {
 // SourceLocation
 
//===--===//
 
+static_assert(std::is_trivially_destructible::value,
+  "SourceLocation must be trivially destructible because it is "
+  "used in unions");
+
+static_assert(std::is_trivially_destructible::value,
+  "SourceRange must be trivially destructible because it is "
+  "used in unions");
+
 unsigned SourceLocation::getHashValue() const {
   return llvm::DenseMapInfo::getHashValue(ID);
 }

diff  --git a/clang/lib/Tooling/Refactoring/Rename/SymbolOccurrences.cpp 
b/clang/lib/Tooling/Refactoring/Rename/SymbolOccurrences.cpp
index 9e69d37e81ad..762864c953d8 100644
--- a/clang/lib/Tooling/Refactoring/Rename/SymbolOccurrences.cpp
+++ b/clang/lib/Tooling/Refactoring/Rename/SymbolOccurrences.cpp
@@ -21,13 +21,12 @@ SymbolOccurrence::SymbolOccurrence(const SymbolName &Name, 
OccurrenceKind Kind,
  "mismatching number of locations and lengths");
   assert(!Locations.empty() && "no locations");
   if (Locations.size() == 1) {
-RangeOrNumRanges = SourceRange(
+new (&SingleRange) SourceRange(
 Locations[0], Locations[0].getLocWithOffset(NamePieces[0].size()));
 return;
   }
   MultipleRanges = std::make_unique(Locations.size());
-  RangeOrNumRanges.setBegin(
-  SourceLocation::getFromRawEncoding(Locations.size()));
+  NumRanges = Locations.size();
   for (const auto &Loc : llvm::enumerate(Locations)) {
 MultipleRanges[Loc.index()] = SourceRange(
 Loc.value(),



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[llvm-branch-commits] [llvm] a4914dc - [SLP] do not traverse constant uses

[Sanjay Patel via llvm-branch-commits]

Author: Anton Rapetov
Date: 2021-01-22T08:14:09-05:00
New Revision: a4914dc1f2b4a49cf488d3be7a01fe7238c889d8

URL: 
https://github.com/llvm/llvm-project/commit/a4914dc1f2b4a49cf488d3be7a01fe7238c889d8
DIFF: 
https://github.com/llvm/llvm-project/commit/a4914dc1f2b4a49cf488d3be7a01fe7238c889d8.diff

LOG: [SLP] do not traverse constant uses

Walking the use list of a Constant (particularly, ConstantData)
is not scalable, since a given constant may be used by many
instructinos in many functions in many modules.

Differential Revision: https://reviews.llvm.org/D94713

Added: 


Modified: 
llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp

Removed: 




diff  --git a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp 
b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
index cee388e62bf2..78ce4870588c 100644
--- a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+++ b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
@@ -987,6 +987,14 @@ class BoUpSLP {
   std::array, 2> Values = {{LHS, RHS}};
   for (int Idx = 0, IdxE = Values.size(); Idx != IdxE; ++Idx) {
 Value *V = Values[Idx].first;
+if (isa(V)) {
+  // Since this is a function pass, it doesn't make semantic sense to
+  // walk the users of a subclass of Constant. The users could be in
+  // another function, or even another module that happens to be in
+  // the same LLVMContext.
+  continue;
+}
+
 // Calculate the absolute lane, using the minimum relative lane of LHS
 // and RHS as base and Idx as the offset.
 int Ln = std::min(LHS.second, RHS.second) + Idx;



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[llvm-branch-commits] [llvm] b1166e1 - [X86][AVX] combineX86ShufflesRecursively - attempt to constant fold before widening shuffle inputs

[Simon Pilgrim via llvm-branch-commits]

Author: Simon Pilgrim
Date: 2021-01-22T13:19:35Z
New Revision: b1166e1317c54e9cfbb28b280af12313cf325a86

URL: 
https://github.com/llvm/llvm-project/commit/b1166e1317c54e9cfbb28b280af12313cf325a86
DIFF: 
https://github.com/llvm/llvm-project/commit/b1166e1317c54e9cfbb28b280af12313cf325a86.diff

LOG: [X86][AVX] combineX86ShufflesRecursively - attempt to constant fold before 
widening shuffle inputs

combineX86ShufflesConstants/canonicalizeShuffleMaskWithHorizOp can both 
handle/earlyout shuffles with inputs of different widths, so delay widening as 
late as possible to make it easier to match constant folds etc.

The plan is to eventually move the widening inside combineX86ShuffleChain so 
that we don't create any new nodes unless we successfully combine the shuffles.

Added: 


Modified: 
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/vector-shuffle-combining-avx512bwvl.ll

Removed: 




diff  --git a/llvm/lib/Target/X86/X86ISelLowering.cpp 
b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 895a02e5c98e..a293c48a824a 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -36610,6 +36610,17 @@ static SDValue combineX86ShufflesRecursively(
 }
   }
 
+  // Attempt to constant fold all of the constant source ops.
+  if (SDValue Cst = combineX86ShufflesConstants(
+  Ops, Mask, Root, HasVariableMask, DAG, Subtarget))
+return Cst;
+
+  // Canonicalize the combined shuffle mask chain with horizontal ops.
+  // NOTE: This will update the Ops and Mask.
+  if (SDValue HOp = canonicalizeShuffleMaskWithHorizOp(
+  Ops, Mask, RootSizeInBits, SDLoc(Root), DAG, Subtarget))
+return DAG.getBitcast(Root.getValueType(), HOp);
+
   // Widen any subvector shuffle inputs we've collected.
   if (any_of(Ops, [RootSizeInBits](SDValue Op) {
 return Op.getValueSizeInBits() < RootSizeInBits;
@@ -36622,17 +36633,6 @@ static SDValue combineX86ShufflesRecursively(
 resolveTargetShuffleInputsAndMask(Ops, Mask);
   }
 
-  // Attempt to constant fold all of the constant source ops.
-  if (SDValue Cst = combineX86ShufflesConstants(
-  Ops, Mask, Root, HasVariableMask, DAG, Subtarget))
-return Cst;
-
-  // Canonicalize the combined shuffle mask chain with horizontal ops.
-  // NOTE: This will update the Ops and Mask.
-  if (SDValue HOp = canonicalizeShuffleMaskWithHorizOp(
-  Ops, Mask, RootSizeInBits, SDLoc(Root), DAG, Subtarget))
-return DAG.getBitcast(Root.getValueType(), HOp);
-
   // We can only combine unary and binary shuffle mask cases.
   if (Ops.size() <= 2) {
 // Minor canonicalization of the accumulated shuffle mask to make it easier

diff  --git a/llvm/test/CodeGen/X86/vector-shuffle-combining-avx512bwvl.ll 
b/llvm/test/CodeGen/X86/vector-shuffle-combining-avx512bwvl.ll
index 2c53579f7627..c358250305a7 100644
--- a/llvm/test/CodeGen/X86/vector-shuffle-combining-avx512bwvl.ll
+++ b/llvm/test/CodeGen/X86/vector-shuffle-combining-avx512bwvl.ll
@@ -108,13 +108,12 @@ define void @PR46178(i16* %0) {
 ; X86-NEXT:vmovdqu (%eax), %ymm1
 ; X86-NEXT:vpmovqw %ymm0, %xmm0
 ; X86-NEXT:vpmovqw %ymm1, %xmm1
-; X86-NEXT:vinserti128 $1, %xmm1, %ymm0, %ymm0
-; X86-NEXT:vpsllw $8, %ymm0, %ymm0
-; X86-NEXT:vpsraw $8, %ymm0, %ymm0
-; X86-NEXT:vmovapd {{.*#+}} ymm1 = [0,0,2,0,4,0,4,0]
-; X86-NEXT:vxorpd %xmm2, %xmm2, %xmm2
-; X86-NEXT:vpermi2pd %ymm2, %ymm0, %ymm1
-; X86-NEXT:vmovupd %ymm1, (%eax)
+; X86-NEXT:vpsllw $8, %xmm1, %xmm1
+; X86-NEXT:vpsraw $8, %xmm1, %xmm1
+; X86-NEXT:vpsllw $8, %xmm0, %xmm0
+; X86-NEXT:vpsraw $8, %xmm0, %xmm0
+; X86-NEXT:vshufpd {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[2],ymm1[3]
+; X86-NEXT:vmovupd %ymm0, (%eax)
 ; X86-NEXT:vzeroupper
 ; X86-NEXT:retl
 ;



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[llvm-branch-commits] [clang-tools-extra] 7388c34 - [clangd][SwapIndex] ensure that the old index is alive while we are using it via the function returned by `SwapIndex::indexedFiles()` call

[Aleksandr Platonov via llvm-branch-commits]

Author: Aleksandr Platonov
Date: 2021-01-22T16:26:39+03:00
New Revision: 7388c34685954862e5f1fa4734f42f7087e697a2

URL: 
https://github.com/llvm/llvm-project/commit/7388c34685954862e5f1fa4734f42f7087e697a2
DIFF: 
https://github.com/llvm/llvm-project/commit/7388c34685954862e5f1fa4734f42f7087e697a2.diff

LOG: [clangd][SwapIndex] ensure that the old index is alive while we are using 
it via the function returned by `SwapIndex::indexedFiles()` call

Without this patch the old index could be freed, but there still could be tries 
to access it via the function returned by `SwapIndex::indexedFiles()` call.
This leads to hard to reproduce clangd crashes at code completion.
This patch keeps the old index alive until the function returned by 
`SwapIndex::indexedFiles()` call is alive.

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D95206

Added: 


Modified: 
clang-tools-extra/clangd/index/Index.cpp
clang-tools-extra/clangd/index/Merge.cpp

Removed: 




diff  --git a/clang-tools-extra/clangd/index/Index.cpp 
b/clang-tools-extra/clangd/index/Index.cpp
index 5da06f36ffe4..1b085140b4ff 100644
--- a/clang-tools-extra/clangd/index/Index.cpp
+++ b/clang-tools-extra/clangd/index/Index.cpp
@@ -78,7 +78,13 @@ void SwapIndex::relations(
 
 llvm::unique_function
 SwapIndex::indexedFiles() const {
-  return snapshot()->indexedFiles();
+  // The index snapshot should outlive this method return value.
+  auto SnapShot = snapshot();
+  auto IndexedFiles = SnapShot->indexedFiles();
+  return [KeepAlive{std::move(SnapShot)},
+  IndexContainsFile{std::move(IndexedFiles)}](llvm::StringRef File) {
+return IndexContainsFile(File);
+  };
 }
 
 size_t SwapIndex::estimateMemoryUsage() const {

diff  --git a/clang-tools-extra/clangd/index/Merge.cpp 
b/clang-tools-extra/clangd/index/Merge.cpp
index 0dd0d9e01518..6f369ed2edcf 100644
--- a/clang-tools-extra/clangd/index/Merge.cpp
+++ b/clang-tools-extra/clangd/index/Merge.cpp
@@ -44,21 +44,23 @@ bool MergedIndex::fuzzyFind(
   SymbolSlab Dyn = std::move(DynB).build();
 
   llvm::DenseSet SeenDynamicSymbols;
-  auto DynamicContainsFile = Dynamic->indexedFiles();
-  More |= Static->fuzzyFind(Req, [&](const Symbol &S) {
-// We expect the definition to see the canonical declaration, so it seems
-// to be enough to check only the definition if it exists.
-if (DynamicContainsFile(S.Definition ? S.Definition.FileURI
- : S.CanonicalDeclaration.FileURI))
-  return;
-auto DynS = Dyn.find(S.ID);
-++StaticCount;
-if (DynS == Dyn.end())
-  return Callback(S);
-++MergedCount;
-SeenDynamicSymbols.insert(S.ID);
-Callback(mergeSymbol(*DynS, S));
-  });
+  {
+auto DynamicContainsFile = Dynamic->indexedFiles();
+More |= Static->fuzzyFind(Req, [&](const Symbol &S) {
+  // We expect the definition to see the canonical declaration, so it seems
+  // to be enough to check only the definition if it exists.
+  if (DynamicContainsFile(S.Definition ? S.Definition.FileURI
+   : S.CanonicalDeclaration.FileURI))
+return;
+  auto DynS = Dyn.find(S.ID);
+  ++StaticCount;
+  if (DynS == Dyn.end())
+return Callback(S);
+  ++MergedCount;
+  SeenDynamicSymbols.insert(S.ID);
+  Callback(mergeSymbol(*DynS, S));
+});
+  }
   SPAN_ATTACH(Tracer, "dynamic", DynamicCount);
   SPAN_ATTACH(Tracer, "static", StaticCount);
   SPAN_ATTACH(Tracer, "merged", MergedCount);
@@ -77,20 +79,22 @@ void MergedIndex::lookup(
   Dynamic->lookup(Req, [&](const Symbol &S) { B.insert(S); });
 
   auto RemainingIDs = Req.IDs;
-  auto DynamicContainsFile = Dynamic->indexedFiles();
-  Static->lookup(Req, [&](const Symbol &S) {
-// We expect the definition to see the canonical declaration, so it seems
-// to be enough to check only the definition if it exists.
-if (DynamicContainsFile(S.Definition ? S.Definition.FileURI
- : S.CanonicalDeclaration.FileURI))
-  return;
-const Symbol *Sym = B.find(S.ID);
-RemainingIDs.erase(S.ID);
-if (!Sym)
-  Callback(S);
-else
-  Callback(mergeSymbol(*Sym, S));
-  });
+  {
+auto DynamicContainsFile = Dynamic->indexedFiles();
+Static->lookup(Req, [&](const Symbol &S) {
+  // We expect the definition to see the canonical declaration, so it seems
+  // to be enough to check only the definition if it exists.
+  if (DynamicContainsFile(S.Definition ? S.Definition.FileURI
+   : S.CanonicalDeclaration.FileURI))
+return;
+  const Symbol *Sym = B.find(S.ID);
+  RemainingIDs.erase(S.ID);
+  if (!Sym)
+Callback(S);
+  else
+Callback(mergeSymbol(*Sym, S));
+});
+  }
   for (const auto &ID : RemainingIDs)
 if (const Symbol *Sym = B.fi

[llvm-branch-commits] [clang-tools-extra] 60cd75a - [clangd] Inject context provider rather than config into ClangdServer. NFC

[Sam McCall via llvm-branch-commits]

Author: Sam McCall
Date: 2021-01-22T14:34:30+01:00
New Revision: 60cd75a098d4f18d9c8903ddcb466b4e7deb0580

URL: 
https://github.com/llvm/llvm-project/commit/60cd75a098d4f18d9c8903ddcb466b4e7deb0580
DIFF: 
https://github.com/llvm/llvm-project/commit/60cd75a098d4f18d9c8903ddcb466b4e7deb0580.diff

LOG: [clangd] Inject context provider rather than config into ClangdServer. NFC

This is a step towards allowing CDB behavior to being configurable.

Previously ClangdServer itself created the configs and installed them into
contexts. This was natural as it knows how to deal with resulting diagnostics.

However this prevents config being used in CDB, which must be created before
ClangdServer. So we extract the context provider (config loader) as a separate
object, which publishes diagnostics to a ClangdServer::Callbacks itself.

Now initialization looks like:
 - First create the config::Provider
 - Then create the ClangdLSPServer, passing config provider
 - Next, create the context provider, passing config provider + diagnostic 
callbacks
 - now create the CDB, passing context provider
 - finally create ClangdServer, passing CDB, context provider, and diagnostic 
callbacks

Differential Revision: https://reviews.llvm.org/D95087

Added: 


Modified: 
clang-tools-extra/clangd/ClangdLSPServer.cpp
clang-tools-extra/clangd/ClangdLSPServer.h
clang-tools-extra/clangd/ClangdServer.cpp
clang-tools-extra/clangd/ClangdServer.h
clang-tools-extra/clangd/unittests/ClangdTests.cpp

Removed: 




diff  --git a/clang-tools-extra/clangd/ClangdLSPServer.cpp 
b/clang-tools-extra/clangd/ClangdLSPServer.cpp
index 4e5d9f8bf0fa..24d3a3509ca8 100644
--- a/clang-tools-extra/clangd/ClangdLSPServer.cpp
+++ b/clang-tools-extra/clangd/ClangdLSPServer.cpp
@@ -1469,6 +1469,12 @@ ClangdLSPServer::ClangdLSPServer(class Transport &Transp,
   MsgHandler(new MessageHandler(*this)), TFS(TFS),
   SupportedSymbolKinds(defaultSymbolKinds()),
   SupportedCompletionItemKinds(defaultCompletionItemKinds()), Opts(Opts) {
+  if (Opts.ConfigProvider) {
+assert(!Opts.ContextProvider &&
+   "Only one of ConfigProvider and ContextProvider allowed!");
+this->Opts.ContextProvider = ClangdServer::createConfiguredContextProvider(
+Opts.ConfigProvider, this);
+  }
 
   // clang-format off
   MsgHandler->bind("initialize", &ClangdLSPServer::onInitialize);

diff  --git a/clang-tools-extra/clangd/ClangdLSPServer.h 
b/clang-tools-extra/clangd/ClangdLSPServer.h
index a41bc5666af3..3a46bd7b1bea 100644
--- a/clang-tools-extra/clangd/ClangdLSPServer.h
+++ b/clang-tools-extra/clangd/ClangdLSPServer.h
@@ -41,6 +41,8 @@ class SymbolIndex;
 class ClangdLSPServer : private ClangdServer::Callbacks {
 public:
   struct Options : ClangdServer::Options {
+/// Supplies configuration (overrides ClangdServer::ContextProvider).
+config::Provider *ConfigProvider = nullptr;
 /// Look for compilation databases, rather than using compile commands
 /// set via LSP (extensions) only.
 bool UseDirBasedCDB = true;

diff  --git a/clang-tools-extra/clangd/ClangdServer.cpp 
b/clang-tools-extra/clangd/ClangdServer.cpp
index 32e08e688f44..4f9ea0499077 100644
--- a/clang-tools-extra/clangd/ClangdServer.cpp
+++ b/clang-tools-extra/clangd/ClangdServer.cpp
@@ -133,14 +133,14 @@ ClangdServer::Options::operator TUScheduler::Options() 
const {
   Opts.StorePreamblesInMemory = StorePreamblesInMemory;
   Opts.UpdateDebounce = UpdateDebounce;
   Opts.AsyncPreambleBuilds = AsyncPreambleBuilds;
+  Opts.ContextProvider = ContextProvider;
   return Opts;
 }
 
 ClangdServer::ClangdServer(const GlobalCompilationDatabase &CDB,
const ThreadsafeFS &TFS, const Options &Opts,
Callbacks *Callbacks)
-: ConfigProvider(Opts.ConfigProvider), CDB(CDB), TFS(TFS),
-  ServerCallbacks(Callbacks),
+: CDB(CDB), TFS(TFS),
   DynamicIdx(Opts.BuildDynamicSymbolIndex
  ? new FileIndex(Opts.HeavyweightDynamicSymbolIndex,
  Opts.CollectMainFileRefs)
@@ -153,14 +153,7 @@ ClangdServer::ClangdServer(const GlobalCompilationDatabase 
&CDB,
   // FIXME(ioeric): this can be slow and we may be able to index on less
   // critical paths.
   WorkScheduler(
-  CDB,
-  [&, this] {
-TUScheduler::Options O(Opts);
-O.ContextProvider = [this](PathRef P) {
-  return createProcessingContext(P);
-};
-return O;
-  }(),
+  CDB, TUScheduler::Options(Opts),
   std::make_unique(
   DynamicIdx.get(), Callbacks, Opts.TheiaSemanticHighlighting)) {
   // Adds an index to the stack, at higher priority than existing indexes.
@@ -181,9 +174,7 @@ ClangdServer::ClangdServer(const GlobalCompilationDatabase 
&CDB,
   if (Callbacks)
 Callbacks->onBackground

[llvm-branch-commits] [llvm] 2a8cbdd - [LTO] Add support for existing Config::Freestanding option.

[Florian Hahn via llvm-branch-commits]

Author: Florian Hahn
Date: 2021-01-22T13:45:39Z
New Revision: 2a8cbdd83006d638936800f9ed3dea4fc20ddf32

URL: 
https://github.com/llvm/llvm-project/commit/2a8cbdd83006d638936800f9ed3dea4fc20ddf32
DIFF: 
https://github.com/llvm/llvm-project/commit/2a8cbdd83006d638936800f9ed3dea4fc20ddf32.diff

LOG: [LTO] Add support for existing Config::Freestanding option.

lto::Config has a field to control whether the build is "freestanding"
(no builtins) or not, but it is not hooked up to the code actually
running the passes.

This patch adds support for the flag to both the code that runs
optimization with the new and old pass managers, by explicitly adding a
TargetLibraryInfo instance. If Freestanding is true, all library functions
are disabled.

Reviewed By: steven_wu

Differential Revision: https://reviews.llvm.org/D94630

Added: 


Modified: 
llvm/lib/LTO/LTOBackend.cpp
llvm/test/LTO/X86/tli-nobuiltin.ll
llvm/tools/llvm-lto2/llvm-lto2.cpp

Removed: 




diff  --git a/llvm/lib/LTO/LTOBackend.cpp b/llvm/lib/LTO/LTOBackend.cpp
index 83282249ef44..1796d6ba60cc 100644
--- a/llvm/lib/LTO/LTOBackend.cpp
+++ b/llvm/lib/LTO/LTOBackend.cpp
@@ -237,6 +237,12 @@ static void runNewPMPasses(const Config &Conf, Module 
&Mod, TargetMachine *TM,
   CGSCCAnalysisManager CGAM(Conf.DebugPassManager);
   ModuleAnalysisManager MAM(Conf.DebugPassManager);
 
+  std::unique_ptr TLII(
+  new TargetLibraryInfoImpl(Triple(TM->getTargetTriple(;
+  if (Conf.Freestanding)
+TLII->disableAllFunctions();
+  FAM.registerPass([&] { return TargetLibraryAnalysis(*TLII); });
+
   // Register the AA manager first so that our version is the one used.
   FAM.registerPass([&] { return std::move(AA); });
 
@@ -302,6 +308,12 @@ static void runNewPMCustomPasses(const Config &Conf, 
Module &Mod,
   CGSCCAnalysisManager CGAM;
   ModuleAnalysisManager MAM;
 
+  std::unique_ptr TLII(
+  new TargetLibraryInfoImpl(Triple(TM->getTargetTriple(;
+  if (Conf.Freestanding)
+TLII->disableAllFunctions();
+  FAM.registerPass([&] { return TargetLibraryAnalysis(*TLII); });
+
   // Register the AA manager first so that our version is the one used.
   FAM.registerPass([&] { return std::move(AA); });
 
@@ -335,6 +347,8 @@ static void runOldPMPasses(const Config &Conf, Module &Mod, 
TargetMachine *TM,
 
   PassManagerBuilder PMB;
   PMB.LibraryInfo = new TargetLibraryInfoImpl(Triple(TM->getTargetTriple()));
+  if (Conf.Freestanding)
+PMB.LibraryInfo->disableAllFunctions();
   PMB.Inliner = createFunctionInliningPass();
   PMB.ExportSummary = ExportSummary;
   PMB.ImportSummary = ImportSummary;

diff  --git a/llvm/test/LTO/X86/tli-nobuiltin.ll 
b/llvm/test/LTO/X86/tli-nobuiltin.ll
index 4f6b3ef63f48..a83e42190681 100644
--- a/llvm/test/LTO/X86/tli-nobuiltin.ll
+++ b/llvm/test/LTO/X86/tli-nobuiltin.ll
@@ -11,6 +11,31 @@
 ; RUN: llvm-nm %t.o | FileCheck %s --check-prefix=LTO-FREESTANDING
 ; LTO-FREESTANDING: fprintf
 
+; Test -lto-freestanding option for LTOBackend & legacy PM.
+
+; RUN: llvm-lto2 run -r %t.bc,_fprintf,px -r %t.bc,_hello_world,px -r 
%t.bc,_percent_s,px  -r %t.bc,_foo,px %t.bc -o %t1.o 2>&1
+; RUN: llvm-nm %t1.o.0 | FileCheck %s --check-prefix=LTO
+
+; RUN: llvm-lto2 run -lto-freestanding -r %t.bc,_fprintf,px -r 
%t.bc,_hello_world,px -r %t.bc,_percent_s,px  -r %t.bc,_foo,px %t.bc -o %t2.o 
2>&1
+; RUN: llvm-nm %t2.o.0 | FileCheck %s --check-prefix=LTO-FREESTANDING
+
+; Test -lto-freestanding option for LTOBackend & new PM.
+
+; RUN: llvm-lto2 run -use-new-pm -r %t.bc,_fprintf,px -r %t.bc,_hello_world,px 
-r %t.bc,_percent_s,px  -r %t.bc,_foo,px %t.bc -o %t1.o 2>&1
+; RUN: llvm-nm %t1.o.0 | FileCheck %s --check-prefix=LTO
+
+; RUN: llvm-lto2 run -use-new-pm -lto-freestanding -r %t.bc,_fprintf,px -r 
%t.bc,_hello_world,px -r %t.bc,_percent_s,px  -r %t.bc,_foo,px %t.bc -o %t2.o 
2>&1
+; RUN: llvm-nm %t2.o.0 | FileCheck %s --check-prefix=LTO-FREESTANDING
+
+; Test -lto-freestanding option for LTOBackend & new PM with custom pipeline.
+
+; RUN: llvm-lto2 run -use-new-pm -opt-pipeline='default' -r 
%t.bc,_fprintf,px -r %t.bc,_hello_world,px -r %t.bc,_percent_s,px  -r 
%t.bc,_foo,px %t.bc -o %t1.o 2>&1
+; RUN: llvm-nm %t1.o.0 | FileCheck %s --check-prefix=LTO
+
+; RUN: llvm-lto2 run -use-new-pm -opt-pipeline='default' -lto-freestanding 
-r %t.bc,_fprintf,px -r %t.bc,_hello_world,px -r %t.bc,_percent_s,px  -r 
%t.bc,_foo,px %t.bc -o %t2.o 2>&1
+; RUN: llvm-nm %t2.o.0 | FileCheck %s --check-prefix=LTO-FREESTANDING
+
+
 target datalayout = 
"e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-apple-macosx10.11.0"
 

diff  --git a/llvm/tools/llvm-lto2/llvm-lto2.cpp 
b/llvm/tools/llvm-lto2/llvm-lto2.cpp
index b84bfff81582..ca4278fafb89 100644
--- a/llvm/tools/llvm-lto2/llvm-lto2.cpp
+++ b/llvm/tools/llvm-lto2/llvm-lto2.cpp
@@ -158,6 +158,11 @@ static cl::list
 PassPlugins("load-pass-plugin",
   

[llvm-branch-commits] [llvm] b465455 - Avoid fragile type lookups in GDB pretty printer

[Moritz Sichert via llvm-branch-commits]

Author: Moritz Sichert
Date: 2021-01-22T14:56:32+01:00
New Revision: b46545542b3010749b530f37d24e24a6abdd58e9

URL: 
https://github.com/llvm/llvm-project/commit/b46545542b3010749b530f37d24e24a6abdd58e9
DIFF: 
https://github.com/llvm/llvm-project/commit/b46545542b3010749b530f37d24e24a6abdd58e9.diff

LOG: Avoid fragile type lookups in GDB pretty printer

Instead of using the type llvm::StringMapEntry<{stringified_value_type}>
use only the base class llvm::StringMapEntryBase and calculate the
offsets of the member variables manually. The approach with stringifying
the name of the value type is pretty fragile as it can easily break with
local and dependent types.

Differential Revision: https://reviews.llvm.org/D94431

Added: 


Modified: 
llvm/utils/gdb-scripts/prettyprinters.py

Removed: 




diff  --git a/llvm/utils/gdb-scripts/prettyprinters.py 
b/llvm/utils/gdb-scripts/prettyprinters.py
index 787269c7bb96..b774e336f2fe 100644
--- a/llvm/utils/gdb-scripts/prettyprinters.py
+++ b/llvm/utils/gdb-scripts/prettyprinters.py
@@ -211,7 +211,7 @@ def children(self):
 it = self.val['TheTable']
 end = (it + self.val['NumBuckets'])
 value_ty = self.val.type.template_argument(0)
-entry_ty = 
gdb.lookup_type('llvm::StringMapEntry<{}>'.format(value_ty.name))
+entry_base_ty = gdb.lookup_type('llvm::StringMapEntryBase')
 tombstone = gdb.parse_and_eval('llvm::StringMapImpl::TombstoneIntVal');
 
 while it != end:
@@ -220,15 +220,17 @@ def children(self):
 it = it + 1
 continue
 
-  entry_ptr = it_deref.cast(entry_ty.pointer())
+  entry_ptr = it_deref.cast(entry_base_ty.pointer())
   entry = entry_ptr.dereference()
 
   str_len = entry['keyLength']
-  str_data = (entry_ptr + 
1).cast(gdb.lookup_type('char').const().pointer())
+  value_ptr = (entry_ptr + 1).cast(value_ty.pointer())
+  str_data = (entry_ptr + 1).cast(gdb.lookup_type('uintptr_t')) + 
max(value_ty.sizeof, entry_base_ty.alignof)
+  str_data = str_data.cast(gdb.lookup_type('char').const().pointer())
   string_ref = gdb.Value(struct.pack('PN', int(str_data), int(str_len)), 
gdb.lookup_type('llvm::StringRef'))
   yield 'key', string_ref
 
-  value = entry['second']
+  value = value_ptr.dereference()
   yield 'value', value
 
   it = it + 1



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[llvm-branch-commits] [llvm] af03324 - [ARM] Disable sign extended SSAT pattern recognition.

[David Green via llvm-branch-commits]

Author: David Green
Date: 2021-01-22T14:07:48Z
New Revision: af0332498405b3a4074cef09845bbacfd4fd594f

URL: 
https://github.com/llvm/llvm-project/commit/af0332498405b3a4074cef09845bbacfd4fd594f
DIFF: 
https://github.com/llvm/llvm-project/commit/af0332498405b3a4074cef09845bbacfd4fd594f.diff

LOG: [ARM] Disable sign extended SSAT pattern recognition.

I may have given bad advice, and skipping sext_inreg when matching SSAT
patterns is not valid on it's own. It at least needs to sext_inreg the
input again, but as far as I can tell is still only valid based on
demanded bits. For the moment disable that part of the combine,
hopefully reimplementing it in the future more correctly.

Added: 


Modified: 
llvm/lib/Target/ARM/ARMISelLowering.cpp
llvm/test/CodeGen/ARM/ssat.ll
llvm/test/CodeGen/ARM/usat.ll

Removed: 




diff  --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp 
b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index 949d2ffc1714..f6f8597f3a69 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -5062,12 +5062,6 @@ static SDValue LowerSaturatingConditional(SDValue Op, 
SelectionDAG &DAG) {
   SDValue V1Tmp = V1;
   SDValue V2Tmp = V2;
 
-  if (V1.getOpcode() == ISD::SIGN_EXTEND_INREG &&
-  V2.getOpcode() == ISD::SIGN_EXTEND_INREG) {
-V1Tmp = V1.getOperand(0);
-V2Tmp = V2.getOperand(0);
-  }
-
   // Check that the registers and the constants match a max(min()) or 
min(max())
   // pattern
   if (V1Tmp != TrueVal1 || V2Tmp != TrueVal2 || K1 != FalseVal1 ||

diff  --git a/llvm/test/CodeGen/ARM/ssat.ll b/llvm/test/CodeGen/ARM/ssat.ll
index 9d9758b0515d..fb3c17710b75 100644
--- a/llvm/test/CodeGen/ARM/ssat.ll
+++ b/llvm/test/CodeGen/ARM/ssat.ll
@@ -68,7 +68,15 @@ define i16 @sat_base_16bit(i16 %x) #0 {
 ;
 ; V6T2-LABEL: sat_base_16bit:
 ; V6T2:   @ %bb.0: @ %entry
-; V6T2-NEXT:ssat r0, #12, r0
+; V6T2-NEXT:sxth r1, r0
+; V6T2-NEXT:movw r2, #2047
+; V6T2-NEXT:cmp r1, r2
+; V6T2-NEXT:movlt r2, r0
+; V6T2-NEXT:movw r0, #63488
+; V6T2-NEXT:sxth r1, r2
+; V6T2-NEXT:movt r0, #65535
+; V6T2-NEXT:cmn r1, #2048
+; V6T2-NEXT:movgt r0, r2
 ; V6T2-NEXT:bx lr
 entry:
   %0 = icmp slt i16 %x, 2047
@@ -95,7 +103,12 @@ define i8 @sat_base_8bit(i8 %x) #0 {
 ;
 ; V6T2-LABEL: sat_base_8bit:
 ; V6T2:   @ %bb.0: @ %entry
-; V6T2-NEXT:ssat r0, #6, r0
+; V6T2-NEXT:sxtb r1, r0
+; V6T2-NEXT:cmp r1, #31
+; V6T2-NEXT:movge r0, #31
+; V6T2-NEXT:sxtb r1, r0
+; V6T2-NEXT:cmn r1, #32
+; V6T2-NEXT:mvnle r0, #31
 ; V6T2-NEXT:bx lr
 entry:
   %0 = icmp slt i8 %x, 31
@@ -547,7 +560,12 @@ define void @extended(i32 %xx, i16 signext %y, i8* 
nocapture %z) {
 ; V6T2-LABEL: extended:
 ; V6T2:   @ %bb.0: @ %entry
 ; V6T2-NEXT:add r0, r1, r0, lsr #16
-; V6T2-NEXT:ssat r0, #8, r0
+; V6T2-NEXT:sxth r1, r0
+; V6T2-NEXT:cmp r1, #127
+; V6T2-NEXT:movge r0, #127
+; V6T2-NEXT:sxth r1, r0
+; V6T2-NEXT:cmn r1, #128
+; V6T2-NEXT:mvnle r0, #127
 ; V6T2-NEXT:strb r0, [r2]
 ; V6T2-NEXT:bx lr
 entry:
@@ -582,7 +600,12 @@ define i32 @formulated_valid(i32 %a) {
 ;
 ; V6T2-LABEL: formulated_valid:
 ; V6T2:   @ %bb.0:
-; V6T2-NEXT:ssat r0, #8, r0
+; V6T2-NEXT:sxth r1, r0
+; V6T2-NEXT:cmp r1, #127
+; V6T2-NEXT:movge r0, #127
+; V6T2-NEXT:sxth r1, r0
+; V6T2-NEXT:cmn r1, #128
+; V6T2-NEXT:mvnle r0, #127
 ; V6T2-NEXT:uxth r0, r0
 ; V6T2-NEXT:bx lr
   %x1 = trunc i32 %a to i16
@@ -613,7 +636,12 @@ define i32 @formulated_invalid(i32 %a) {
 ;
 ; V6T2-LABEL: formulated_invalid:
 ; V6T2:   @ %bb.0:
-; V6T2-NEXT:ssat r0, #8, r0
+; V6T2-NEXT:sxth r1, r0
+; V6T2-NEXT:cmp r1, #127
+; V6T2-NEXT:movge r0, #127
+; V6T2-NEXT:sxth r1, r0
+; V6T2-NEXT:cmn r1, #128
+; V6T2-NEXT:mvnle r0, #127
 ; V6T2-NEXT:bic r0, r0, #-16777216
 ; V6T2-NEXT:bx lr
   %x1 = trunc i32 %a to i16

diff  --git a/llvm/test/CodeGen/ARM/usat.ll b/llvm/test/CodeGen/ARM/usat.ll
index ab508fc0e032..dd0eca823a50 100644
--- a/llvm/test/CodeGen/ARM/usat.ll
+++ b/llvm/test/CodeGen/ARM/usat.ll
@@ -67,12 +67,27 @@ define i16 @unsigned_sat_base_16bit(i16 %x) #0 {
 ;
 ; V6-LABEL: unsigned_sat_base_16bit:
 ; V6:   @ %bb.0: @ %entry
-; V6-NEXT:usat r0, #11, r0
+; V6-NEXT:mov r1, #255
+; V6-NEXT:sxth r2, r0
+; V6-NEXT:orr r1, r1, #1792
+; V6-NEXT:cmp r2, r1
+; V6-NEXT:movlt r1, r0
+; V6-NEXT:sxth r0, r1
+; V6-NEXT:cmp r0, #0
+; V6-NEXT:movle r1, #0
+; V6-NEXT:mov r0, r1
 ; V6-NEXT:bx lr
 ;
 ; V6T2-LABEL: unsigned_sat_base_16bit:
 ; V6T2:   @ %bb.0: @ %entry
-; V6T2-NEXT:usat r0, #11, r0
+; V6T2-NEXT:sxth r2, r0
+; V6T2-NEXT:movw r1, #2047
+; V6T2-NEXT:cmp r2, r1
+; V6T2-NEXT:movlt r1, r0
+; V6T2-NEXT:sxth r0, r1
+; V6T2-NEXT:cmp r0, #0
+; V6T2-NEXT:movle r1, #0
+; V6T2-NEXT:mov r0, r1

[llvm-branch-commits] [clang] 98a8344 - [clang][ASTImporter] Add support for importing CXXFoldExpr.

[Balázs Kéri via llvm-branch-commits]

Author: Balázs Kéri
Date: 2021-01-22T15:20:55+01:00
New Revision: 98a8344895a8e1f2cfa98b664b50fb7b864afa52

URL: 
https://github.com/llvm/llvm-project/commit/98a8344895a8e1f2cfa98b664b50fb7b864afa52
DIFF: 
https://github.com/llvm/llvm-project/commit/98a8344895a8e1f2cfa98b664b50fb7b864afa52.diff

LOG: [clang][ASTImporter] Add support for importing CXXFoldExpr.

Reviewed By: shafik, martong

Differential Revision: https://reviews.llvm.org/D94786

Added: 


Modified: 
clang/lib/AST/ASTImporter.cpp
clang/unittests/AST/ASTImporterTest.cpp

Removed: 




diff  --git a/clang/lib/AST/ASTImporter.cpp b/clang/lib/AST/ASTImporter.cpp
index 5c6aa5d3c015..085c50c0667b 100644
--- a/clang/lib/AST/ASTImporter.cpp
+++ b/clang/lib/AST/ASTImporter.cpp
@@ -644,6 +644,7 @@ namespace clang {
 ExpectedStmt 
VisitSubstNonTypeTemplateParmExpr(SubstNonTypeTemplateParmExpr *E);
 ExpectedStmt VisitTypeTraitExpr(TypeTraitExpr *E);
 ExpectedStmt VisitCXXTypeidExpr(CXXTypeidExpr *E);
+ExpectedStmt VisitCXXFoldExpr(CXXFoldExpr *E);
 
 template
 Error ImportArrayChecked(IIter Ibegin, IIter Iend, OIter Obegin) {
@@ -8011,6 +8012,25 @@ ExpectedStmt 
ASTNodeImporter::VisitCXXTypeidExpr(CXXTypeidExpr *E) {
   *ToTypeOrErr, *ToExprOperandOrErr, *ToSourceRangeOrErr);
 }
 
+ExpectedStmt ASTNodeImporter::VisitCXXFoldExpr(CXXFoldExpr *E) {
+  Error Err = Error::success();
+
+  QualType ToType = importChecked(Err, E->getType());
+  UnresolvedLookupExpr *ToCallee = importChecked(Err, E->getCallee());
+  SourceLocation ToLParenLoc = importChecked(Err, E->getLParenLoc());
+  Expr *ToLHS = importChecked(Err, E->getLHS());
+  SourceLocation ToEllipsisLoc = importChecked(Err, E->getEllipsisLoc());
+  Expr *ToRHS = importChecked(Err, E->getRHS());
+  SourceLocation ToRParenLoc = importChecked(Err, E->getRParenLoc());
+
+  if (Err)
+return std::move(Err);
+
+  return new (Importer.getToContext())
+  CXXFoldExpr(ToType, ToCallee, ToLParenLoc, ToLHS, E->getOperator(),
+  ToEllipsisLoc, ToRHS, ToRParenLoc, E->getNumExpansions());
+}
+
 Error ASTNodeImporter::ImportOverriddenMethods(CXXMethodDecl *ToMethod,
CXXMethodDecl *FromMethod) {
   Error ImportErrors = Error::success();

diff  --git a/clang/unittests/AST/ASTImporterTest.cpp 
b/clang/unittests/AST/ASTImporterTest.cpp
index 8a07a5b8e0df..193523f2fc51 100644
--- a/clang/unittests/AST/ASTImporterTest.cpp
+++ b/clang/unittests/AST/ASTImporterTest.cpp
@@ -639,6 +639,38 @@ TEST_P(ImportExpr, ImportSizeOfPackExpr) {
   hasUnqualifiedDesugaredType(constantArrayType(hasSize(7));
 }
 
+const internal::VariadicDynCastAllOfMatcher cxxFoldExpr;
+
+AST_MATCHER_P(CXXFoldExpr, hasOperator, BinaryOperatorKind, Op) {
+  return Node.getOperator() == Op;
+}
+AST_MATCHER(CXXFoldExpr, hasInit) { return Node.getInit(); }
+AST_MATCHER(CXXFoldExpr, isRightFold) { return Node.isRightFold(); }
+AST_MATCHER(CXXFoldExpr, isLeftFold) { return Node.isLeftFold(); }
+
+TEST_P(ImportExpr, ImportCXXFoldExpr) {
+  auto Match1 =
+  cxxFoldExpr(hasOperator(BO_Add), isLeftFold(), unless(hasInit()));
+  auto Match2 = cxxFoldExpr(hasOperator(BO_Sub), isLeftFold(), hasInit());
+  auto Match3 =
+  cxxFoldExpr(hasOperator(BO_Mul), isRightFold(), unless(hasInit()));
+  auto Match4 = cxxFoldExpr(hasOperator(BO_Div), isRightFold(), hasInit());
+
+  MatchVerifier Verifier;
+  testImport("template "
+ "void declToImport(Ts... args) {"
+ "  const int i1 = (... + args);"
+ "  const int i2 = (1 - ... - args);"
+ "  const int i3 = (args * ...);"
+ "  const int i4 = (args / ... / 1);"
+ "};"
+ "void g() { declToImport(1, 2, 3, 4, 5); }",
+ Lang_CXX17, "", Lang_CXX17, Verifier,
+ functionTemplateDecl(hasDescendant(Match1), hasDescendant(Match2),
+  hasDescendant(Match3),
+  hasDescendant(Match4)));
+}
+
 /// \brief Matches __builtin_types_compatible_p:
 /// GNU extension to check equivalent types
 /// Given



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[llvm-branch-commits] [llvm] aabed37 - [NFCI-ish][SimplifyCFG] FoldBranchToCommonDest(): really don't deal with uncond branches

[Roman Lebedev via llvm-branch-commits]

Author: Roman Lebedev
Date: 2021-01-22T17:23:10+03:00
New Revision: aabed3718ae25476c0f6b7e70c83ba4658f00e5c

URL: 
https://github.com/llvm/llvm-project/commit/aabed3718ae25476c0f6b7e70c83ba4658f00e5c
DIFF: 
https://github.com/llvm/llvm-project/commit/aabed3718ae25476c0f6b7e70c83ba4658f00e5c.diff

LOG: [NFCI-ish][SimplifyCFG] FoldBranchToCommonDest(): really don't deal with 
uncond branches

While we already ignore uncond branches, we could still potentially
end up with a conditional branches with identical destinations
due to the visitation order, or because we were called as an utility.
But if we have such a disguised uncond branch,
we still probably shouldn't deal with it here.

Added: 


Modified: 
llvm/lib/Transforms/Utils/SimplifyCFG.cpp

Removed: 




diff  --git a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp 
b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
index d0028c013fa3..5ca8a0b33176 100644
--- a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
+++ b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
@@ -2775,7 +2775,7 @@ bool llvm::FoldBranchToCommonDest(BranchInst *BI, 
DomTreeUpdater *DTU,
   unsigned BonusInstThreshold) {
   // If this block ends with an unconditional branch,
   // let SpeculativelyExecuteBB() deal with it.
-  if (!BI->isConditional())
+  if (!BI->isConditional() || is_splat(successors(BI)))
 return false;
 
   BasicBlock *BB = BI->getParent();
@@ -2863,7 +2863,8 @@ bool llvm::FoldBranchToCommonDest(BranchInst *BI, 
DomTreeUpdater *DTU,
 // Check that we have two conditional branches.  If there is a PHI node in
 // the common successor, verify that the same value flows in from both
 // blocks.
-if (!PBI || PBI->isUnconditional() || !SafeToMergeTerminators(BI, PBI))
+if (!PBI || PBI->isUnconditional() || is_splat(successors(PBI)) ||
+!SafeToMergeTerminators(BI, PBI))
   continue;
 
 // Determine if the two branches share a common destination.



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[llvm-branch-commits] [llvm] 0895b83 - [SimplifyCFG] FoldBranchToCommonDest(): don't deal with unconditional branches

[Roman Lebedev via llvm-branch-commits]

Author: Roman Lebedev
Date: 2021-01-22T17:22:49+03:00
New Revision: 0895b836d74ed333468ddece2102140494eb33b6

URL: 
https://github.com/llvm/llvm-project/commit/0895b836d74ed333468ddece2102140494eb33b6
DIFF: 
https://github.com/llvm/llvm-project/commit/0895b836d74ed333468ddece2102140494eb33b6.diff

LOG: [SimplifyCFG] FoldBranchToCommonDest(): don't deal with unconditional 
branches

The case where BB ends with an unconditional branch,
and has a single predecessor w/ conditional branch
to BB and a single successor of BB is exactly the pattern
SpeculativelyExecuteBB() transform deals with.
(and in this case they both allow speculating only a single instruction)

Well, or FoldTwoEntryPHINode(), if the final block
has only those two predecessors.

Here, in FoldBranchToCommonDest(), only a weird subset of that
transform is supported, and it's glued on the side in a weird way.
  In particular, it took me a bit to understand that the Cond
isn't actually a branch condition in that case, but just the value
we allow to speculate (otherwise it reads as a miscompile to me).
  Additionally, this only supports for the speculated instruction
to be an ICmp.

So let's just unclutter FoldBranchToCommonDest(), and leave
this transform up to SpeculativelyExecuteBB(). As far as i can tell,
this shouldn't really impact optimization potential, but if it does,
improving SpeculativelyExecuteBB() will be more beneficial anyways.

Notably, this only affects a single test,
but EarlyCSE should have run beforehand in the pipeline,
and then FoldTwoEntryPHINode() would have caught it.

This reverts commit rL158392 / commit d33f4efbfdef6ffccf212ab3e40a7673589085fd.

Added: 


Modified: 
llvm/lib/Transforms/Utils/SimplifyCFG.cpp
llvm/test/Transforms/SimplifyCFG/branch-fold.ll

Removed: 
llvm/test/Transforms/SimplifyCFG/X86/fold-branch-debuginvariant.ll



diff  --git a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp 
b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
index a243a2e37950..d0028c013fa3 100644
--- a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
+++ b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
@@ -314,46 +314,6 @@ SafeToMergeTerminators(Instruction *SI1, Instruction *SI2,
   return !Fail;
 }
 
-/// Return true if it is safe and profitable to merge these two terminator
-/// instructions together, where SI1 is an unconditional branch. PhiNodes will
-/// store all PHI nodes in common successors.
-static bool
-isProfitableToFoldUnconditional(BranchInst *SI1, BranchInst *SI2,
-Instruction *Cond,
-SmallVectorImpl &PhiNodes) {
-  if (SI1 == SI2)
-return false; // Can't merge with self!
-  assert(SI1->isUnconditional() && SI2->isConditional());
-
-  // We fold the unconditional branch if we can easily update all PHI nodes in
-  // common successors:
-  // 1> We have a constant incoming value for the conditional branch;
-  // 2> We have "Cond" as the incoming value for the unconditional branch;
-  // 3> SI2->getCondition() and Cond have same operands.
-  CmpInst *Ci2 = dyn_cast(SI2->getCondition());
-  if (!Ci2)
-return false;
-  if (!(Cond->getOperand(0) == Ci2->getOperand(0) &&
-Cond->getOperand(1) == Ci2->getOperand(1)) &&
-  !(Cond->getOperand(0) == Ci2->getOperand(1) &&
-Cond->getOperand(1) == Ci2->getOperand(0)))
-return false;
-
-  BasicBlock *SI1BB = SI1->getParent();
-  BasicBlock *SI2BB = SI2->getParent();
-  SmallPtrSet SI1Succs(succ_begin(SI1BB), succ_end(SI1BB));
-  for (BasicBlock *Succ : successors(SI2BB))
-if (SI1Succs.count(Succ))
-  for (BasicBlock::iterator BBI = Succ->begin(); isa(BBI); ++BBI) 
{
-PHINode *PN = cast(BBI);
-if (PN->getIncomingValueForBlock(SI1BB) != Cond ||
-!isa(PN->getIncomingValueForBlock(SI2BB)))
-  return false;
-PhiNodes.push_back(PN);
-  }
-  return true;
-}
-
 /// Update PHI nodes in Succ to indicate that there will now be entries in it
 /// from the 'NewPred' block. The values that will be flowing into the PHI 
nodes
 /// will be the same as those coming in from ExistPred, an existing predecessor
@@ -2783,23 +2743,6 @@ bool 
SimplifyCFGOpt::SimplifyCondBranchToTwoReturns(BranchInst *BI,
   return true;
 }
 
-/// Return true if the given instruction is available
-/// in its predecessor block. If yes, the instruction will be removed.
-static bool tryCSEWithPredecessor(Instruction *Inst, BasicBlock *PB) {
-  if (!isa(Inst) && !isa(Inst))
-return false;
-  for (Instruction &I : *PB) {
-Instruction *PBI = &I;
-// Check whether Inst and PBI generate the same value.
-if (Inst->isIdenticalTo(PBI)) {
-  Inst->replaceAllUsesWith(PBI);
-  Inst->eraseFromParent();
-  return true;
-}
-  }
-  return false;
-}
-
 /// Return true if either PBI or BI has branch weight available, and store
 /// the weights in {Pred|Succ}{True|False}Weight. If one of PBI

[llvm-branch-commits] [llvm] 256a035 - [NFC][SimplifyCFG] FoldBranchToCommonDest(): unclutter Cond/CondInPred handling

[Roman Lebedev via llvm-branch-commits]

Author: Roman Lebedev
Date: 2021-01-22T17:23:11+03:00
New Revision: 256a0357524b6cea3c705a77ec3d3c0122ede861

URL: 
https://github.com/llvm/llvm-project/commit/256a0357524b6cea3c705a77ec3d3c0122ede861
DIFF: 
https://github.com/llvm/llvm-project/commit/256a0357524b6cea3c705a77ec3d3c0122ede861.diff

LOG: [NFC][SimplifyCFG] FoldBranchToCommonDest(): unclutter Cond/CondInPred 
handling

We don't need those variables, we can just get the final value directly.

Added: 


Modified: 
llvm/lib/Transforms/Utils/SimplifyCFG.cpp

Removed: 




diff  --git a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp 
b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
index 5ca8a0b33176..d1d687c721fb 100644
--- a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
+++ b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
@@ -2934,16 +2934,12 @@ bool llvm::FoldBranchToCommonDest(BranchInst *BI, 
DomTreeUpdater *DTU,
 // Note that there may be multiple predecessor blocks, so we cannot move
 // bonus instructions to a predecessor block.
 ValueToValueMapTy VMap; // maps original values to cloned values
-Instruction *CondInPred;
 for (Instruction &BonusInst : *BB) {
   if (isa(BonusInst) || isa(BonusInst))
 continue;
 
   Instruction *NewBonusInst = BonusInst.clone();
 
-  if (&BonusInst == Cond)
-CondInPred = NewBonusInst;
-
   if (PBI->getDebugLoc() != NewBonusInst->getDebugLoc()) {
 // Unless the instruction has the same !dbg location as the original
 // branch, drop it. When we fold the bonus instructions we want to make
@@ -3004,8 +3000,8 @@ bool llvm::FoldBranchToCommonDest(BranchInst *BI, 
DomTreeUpdater *DTU,
 
 // Now that the Cond was cloned into the predecessor basic block,
 // or/and the two conditions together.
-Instruction *NewCond = cast(
-Builder.CreateBinOp(Opc, PBI->getCondition(), CondInPred, "or.cond"));
+Instruction *NewCond = cast(Builder.CreateBinOp(
+Opc, PBI->getCondition(), VMap[BI->getCondition()], "or.cond"));
 PBI->setCondition(NewCond);
 
 uint64_t PredTrueWeight, PredFalseWeight, SuccTrueWeight, SuccFalseWeight;



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[llvm-branch-commits] [llvm] 7b89efb - [NFC][SimplifyCFG] FoldBranchToCommonDest(): somewhat better structure weight updating code

[Roman Lebedev via llvm-branch-commits]

Author: Roman Lebedev
Date: 2021-01-22T17:23:41+03:00
New Revision: 7b89efb55e4e5d6078aa9571f40859cc9ea01bcc

URL: 
https://github.com/llvm/llvm-project/commit/7b89efb55e4e5d6078aa9571f40859cc9ea01bcc
DIFF: 
https://github.com/llvm/llvm-project/commit/7b89efb55e4e5d6078aa9571f40859cc9ea01bcc.diff

LOG: [NFC][SimplifyCFG] FoldBranchToCommonDest(): somewhat better structure 
weight updating code

Hoist the successor updating out of the code that deals with branch
weight updating, and hoist the 'has weights' check from the latter,
making code more consistent and easier to follow.

Added: 


Modified: 
llvm/lib/Transforms/Utils/SimplifyCFG.cpp

Removed: 




diff  --git a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp 
b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
index d1d687c721fb..bdf4280609f1 100644
--- a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
+++ b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
@@ -3005,13 +3005,11 @@ bool llvm::FoldBranchToCommonDest(BranchInst *BI, 
DomTreeUpdater *DTU,
 PBI->setCondition(NewCond);
 
 uint64_t PredTrueWeight, PredFalseWeight, SuccTrueWeight, SuccFalseWeight;
-bool HasWeights =
-extractPredSuccWeights(PBI, BI, PredTrueWeight, PredFalseWeight,
-   SuccTrueWeight, SuccFalseWeight);
-SmallVector NewWeights;
+if (extractPredSuccWeights(PBI, BI, PredTrueWeight, PredFalseWeight,
+   SuccTrueWeight, SuccFalseWeight)) {
+  SmallVector NewWeights;
 
-if (PBI->getSuccessor(0) == BB) {
-  if (HasWeights) {
+  if (PBI->getSuccessor(0) == BB) {
 // PBI: br i1 %x, BB, FalseDest
 // BI:  br i1 %y, UniqueSucc, FalseDest
 // TrueWeight is TrueWeight for PBI * TrueWeight for BI.
@@ -3023,11 +3021,7 @@ bool llvm::FoldBranchToCommonDest(BranchInst *BI, 
DomTreeUpdater *DTU,
 NewWeights.push_back(PredFalseWeight *
  (SuccFalseWeight + SuccTrueWeight) +
  PredTrueWeight * SuccFalseWeight);
-  }
-  PBI->setSuccessor(0, UniqueSucc);
-}
-if (PBI->getSuccessor(1) == BB) {
-  if (HasWeights) {
+  } else {
 // PBI: br i1 %x, TrueDest, BB
 // BI:  br i1 %y, TrueDest, UniqueSucc
 // TrueWeight is TrueWeight for PBI * TotalWeight for BI +
@@ -3038,17 +3032,20 @@ bool llvm::FoldBranchToCommonDest(BranchInst *BI, 
DomTreeUpdater *DTU,
 // FalseWeight is FalseWeight for PBI * FalseWeight for BI.
 NewWeights.push_back(PredFalseWeight * SuccFalseWeight);
   }
-  PBI->setSuccessor(1, UniqueSucc);
-}
-if (NewWeights.size() == 2) {
+
   // Halve the weights if any of them cannot fit in an uint32_t
   FitWeights(NewWeights);
 
   SmallVector MDWeights(NewWeights.begin(), NewWeights.end());
   setBranchWeights(PBI, MDWeights[0], MDWeights[1]);
+
+  // TODO: If BB is reachable from all paths through PredBlock, then we
+  // could replace PBI's branch probabilities with BI's.
 } else
   PBI->setMetadata(LLVMContext::MD_prof, nullptr);
 
+PBI->setSuccessor(PBI->getSuccessor(0) != BB, UniqueSucc);
+
 if (DTU)
   DTU->applyUpdates({{DominatorTree::Insert, PredBlock, UniqueSucc},
  {DominatorTree::Delete, PredBlock, BB}});
@@ -3058,9 +3055,6 @@ bool llvm::FoldBranchToCommonDest(BranchInst *BI, 
DomTreeUpdater *DTU,
 if (MDNode *LoopMD = BI->getMetadata(LLVMContext::MD_loop))
   PBI->setMetadata(LLVMContext::MD_loop, LoopMD);
 
-// TODO: If BB is reachable from all paths through PredBlock, then we
-// could replace PBI's branch probabilities with BI's.
-
 // Copy any debug value intrinsics into the end of PredBlock.
 for (Instruction &I : *BB) {
   if (isa(I)) {



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[llvm-branch-commits] [llvm] b482560 - [NFC][SimplifyCFG] FoldBranchToCommonDest(): extract check for destination sharing into a helper function

[Roman Lebedev via llvm-branch-commits]

Author: Roman Lebedev
Date: 2021-01-22T17:23:53+03:00
New Revision: b482560a597697789d81e4b9b22fb14e1f2f3c9a

URL: 
https://github.com/llvm/llvm-project/commit/b482560a597697789d81e4b9b22fb14e1f2f3c9a
DIFF: 
https://github.com/llvm/llvm-project/commit/b482560a597697789d81e4b9b22fb14e1f2f3c9a.diff

LOG: [NFC][SimplifyCFG] FoldBranchToCommonDest(): extract check for destination 
sharing into a helper function

As a follow-up, i'll extract the actual transform into a function,
and this helper will be called from both places,
so this avoids code duplication.

Added: 


Modified: 
llvm/lib/Transforms/Utils/SimplifyCFG.cpp

Removed: 




diff  --git a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp 
b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
index bdf4280609f1..4c830be4e6ab 100644
--- a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
+++ b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
@@ -2766,6 +2766,27 @@ static bool extractPredSuccWeights(BranchInst *PBI, 
BranchInst *BI,
   }
 }
 
+// Determine if the two branches share a common destination,
+// and deduce a glue that we need to use to join branch's conditions
+// to arrive at the common destination.
+static Optional>
+CheckIfCondBranchesShareCommonDestination(BranchInst *BI, BranchInst *PBI) {
+  assert(BI && PBI && BI->isConditional() && PBI->isConditional() &&
+ "Both blocks must end with a conditional branches.");
+  assert(is_contained(predecessors(BI->getParent()), PBI->getParent()) &&
+ "PredBB must be a predecessor of BB.");
+
+  if (PBI->getSuccessor(0) == BI->getSuccessor(0))
+return {{Instruction::Or, false}};
+  else if (PBI->getSuccessor(1) == BI->getSuccessor(1))
+return {{Instruction::And, false}};
+  else if (PBI->getSuccessor(0) == BI->getSuccessor(1))
+return {{Instruction::And, true}};
+  else if (PBI->getSuccessor(1) == BI->getSuccessor(0))
+return {{Instruction::Or, true}};
+  return None;
+}
+
 /// If this basic block is simple enough, and if a predecessor branches to us
 /// and one of our successors, fold the block into the predecessor and use
 /// logical operations to pick the right destination.
@@ -2868,22 +2889,12 @@ bool llvm::FoldBranchToCommonDest(BranchInst *BI, 
DomTreeUpdater *DTU,
   continue;
 
 // Determine if the two branches share a common destination.
-Instruction::BinaryOps Opc = Instruction::BinaryOpsEnd;
-bool InvertPredCond = false;
-
-if (PBI->getSuccessor(0) == TrueDest) {
-  Opc = Instruction::Or;
-} else if (PBI->getSuccessor(1) == FalseDest) {
-  Opc = Instruction::And;
-} else if (PBI->getSuccessor(0) == FalseDest) {
-  Opc = Instruction::And;
-  InvertPredCond = true;
-} else if (PBI->getSuccessor(1) == TrueDest) {
-  Opc = Instruction::Or;
-  InvertPredCond = true;
-} else {
+Instruction::BinaryOps Opc;
+bool InvertPredCond;
+if (auto Recepie = CheckIfCondBranchesShareCommonDestination(BI, PBI))
+  std::tie(Opc, InvertPredCond) = *Recepie;
+else
   continue;
-}
 
 // Check the cost of inserting the necessary logic before performing the
 // transformation.



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[llvm-branch-commits] [llvm] efeb8ca - [NFC][SimplifyCFG] FoldBranchToCommonDest(): extract the actual transform into helper function

[Roman Lebedev via llvm-branch-commits]

Author: Roman Lebedev
Date: 2021-01-22T17:23:53+03:00
New Revision: efeb8caf8bd10f2ad794c6f434fbc4ba133cd7e3

URL: 
https://github.com/llvm/llvm-project/commit/efeb8caf8bd10f2ad794c6f434fbc4ba133cd7e3
DIFF: 
https://github.com/llvm/llvm-project/commit/efeb8caf8bd10f2ad794c6f434fbc4ba133cd7e3.diff

LOG: [NFC][SimplifyCFG] FoldBranchToCommonDest(): extract the actual transform 
into helper function

I'm intentionally structuring it this way, so that the actual fold only
does the fold, and no legality/correctness checks, all of which must be
done by the caller. This allows for the fold code to be more compact
and more easily grokable.

Added: 


Modified: 
llvm/lib/Transforms/Utils/SimplifyCFG.cpp

Removed: 




diff  --git a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp 
b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
index 4c830be4e6ab..4191f2104f3d 100644
--- a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
+++ b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
@@ -2787,6 +2787,188 @@ CheckIfCondBranchesShareCommonDestination(BranchInst 
*BI, BranchInst *PBI) {
   return None;
 }
 
+static bool PerformBranchToCommonDestFolding(BranchInst *BI, BranchInst *PBI,
+ DomTreeUpdater *DTU,
+ MemorySSAUpdater *MSSAU) {
+  BasicBlock *BB = BI->getParent();
+  BasicBlock *PredBlock = PBI->getParent();
+
+  // Determine if the two branches share a common destination.
+  Instruction::BinaryOps Opc;
+  bool InvertPredCond;
+  std::tie(Opc, InvertPredCond) =
+  *CheckIfCondBranchesShareCommonDestination(BI, PBI);
+
+  LLVM_DEBUG(dbgs() << "FOLDING BRANCH TO COMMON DEST:\n" << *PBI << *BB);
+
+  IRBuilder<> Builder(PBI);
+  // The builder is used to create instructions to eliminate the branch in BB.
+  // If BB's terminator has !annotation metadata, add it to the new
+  // instructions.
+  Builder.CollectMetadataToCopy(BB->getTerminator(),
+{LLVMContext::MD_annotation});
+
+  // If we need to invert the condition in the pred block to match, do so now.
+  if (InvertPredCond) {
+Value *NewCond = PBI->getCondition();
+if (NewCond->hasOneUse() && isa(NewCond)) {
+  CmpInst *CI = cast(NewCond);
+  CI->setPredicate(CI->getInversePredicate());
+} else {
+  NewCond =
+  Builder.CreateNot(NewCond, PBI->getCondition()->getName() + ".not");
+}
+
+PBI->setCondition(NewCond);
+PBI->swapSuccessors();
+  }
+
+  BasicBlock *UniqueSucc =
+  PBI->getSuccessor(0) == BB ? BI->getSuccessor(0) : BI->getSuccessor(1);
+
+  // Before cloning instructions, notify the successor basic block that it
+  // is about to have a new predecessor. This will update PHI nodes,
+  // which will allow us to update live-out uses of bonus instructions.
+  AddPredecessorToBlock(UniqueSucc, PredBlock, BB, MSSAU);
+
+  // If we have bonus instructions, clone them into the predecessor block.
+  // Note that there may be multiple predecessor blocks, so we cannot move
+  // bonus instructions to a predecessor block.
+  ValueToValueMapTy VMap; // maps original values to cloned values
+  for (Instruction &BonusInst : *BB) {
+if (isa(BonusInst) || isa(BonusInst))
+  continue;
+
+Instruction *NewBonusInst = BonusInst.clone();
+
+if (PBI->getDebugLoc() != NewBonusInst->getDebugLoc()) {
+  // Unless the instruction has the same !dbg location as the original
+  // branch, drop it. When we fold the bonus instructions we want to make
+  // sure we reset their debug locations in order to avoid stepping on
+  // dead code caused by folding dead branches.
+  NewBonusInst->setDebugLoc(DebugLoc());
+}
+
+RemapInstruction(NewBonusInst, VMap,
+ RF_NoModuleLevelChanges | RF_IgnoreMissingLocals);
+VMap[&BonusInst] = NewBonusInst;
+
+// If we moved a load, we cannot any longer claim any knowledge about
+// its potential value. The previous information might have been valid
+// only given the branch precondition.
+// For an analogous reason, we must also drop all the metadata whose
+// semantics we don't understand. We *can* preserve !annotation, because
+// it is tied to the instruction itself, not the value or position.
+NewBonusInst->dropUnknownNonDebugMetadata(LLVMContext::MD_annotation);
+
+PredBlock->getInstList().insert(PBI->getIterator(), NewBonusInst);
+NewBonusInst->takeName(&BonusInst);
+BonusInst.setName(BonusInst.getName() + ".old");
+BonusInst.replaceUsesWithIf(
+NewBonusInst, [BB, BI, UniqueSucc, PredBlock](Use &U) {
+  auto *User = cast(U.getUser());
+  // Ignore non-external uses of bonus instructions.
+  if (User->getParent() == BB) {
+assert(!isa(User) &&
+   "Non-external users are never PHI instructions.");
+return false;
+  }
+  i

[llvm-branch-commits] [llvm] 4ed0d8f - [NFC][InstCombine] Extract freelyInvertAllUsersOf() out of canonicalizeICmpPredicate()

[Roman Lebedev via llvm-branch-commits]

Author: Roman Lebedev
Date: 2021-01-22T17:23:53+03:00
New Revision: 4ed0d8f2f07d0e17942366d48a29c165384ace52

URL: 
https://github.com/llvm/llvm-project/commit/4ed0d8f2f07d0e17942366d48a29c165384ace52
DIFF: 
https://github.com/llvm/llvm-project/commit/4ed0d8f2f07d0e17942366d48a29c165384ace52.diff

LOG: [NFC][InstCombine] Extract freelyInvertAllUsersOf() out of 
canonicalizeICmpPredicate()

I'd like to use it in an upcoming fold.

Added: 


Modified: 
llvm/include/llvm/Transforms/InstCombine/InstCombiner.h
llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
llvm/lib/Transforms/InstCombine/InstCombineInternal.h
llvm/lib/Transforms/InstCombine/InstructionCombining.cpp

Removed: 




diff  --git a/llvm/include/llvm/Transforms/InstCombine/InstCombiner.h 
b/llvm/include/llvm/Transforms/InstCombine/InstCombiner.h
index a5aed720cda6..aae0694e4cab 100644
--- a/llvm/include/llvm/Transforms/InstCombine/InstCombiner.h
+++ b/llvm/include/llvm/Transforms/InstCombine/InstCombiner.h
@@ -263,8 +263,7 @@ class LLVM_LIBRARY_VISIBILITY InstCombiner {
   }
 
   /// Given i1 V, can every user of V be freely adapted if V is changed to !V ?
-  /// InstCombine's canonicalizeICmpPredicate() must be kept in sync with this
-  /// fn.
+  /// InstCombine's freelyInvertAllUsersOf() must be kept in sync with this fn.
   ///
   /// See also: isFreeToInvert()
   static bool canFreelyInvertAllUsersOf(Value *V, Value *IgnoredUser) {

diff  --git a/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp 
b/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
index 9b3cfb3bd754..cd9a036179b6 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
@@ -5328,26 +5328,8 @@ CmpInst 
*InstCombinerImpl::canonicalizeICmpPredicate(CmpInst &I) {
   I.setPredicate(CmpInst::getInversePredicate(Pred));
   I.setName(I.getName() + ".not");
 
-  // And now let's adjust every user.
-  for (User *U : I.users()) {
-switch (cast(U)->getOpcode()) {
-case Instruction::Select: {
-  auto *SI = cast(U);
-  SI->swapValues();
-  SI->swapProfMetadata();
-  break;
-}
-case Instruction::Br:
-  cast(U)->swapSuccessors(); // swaps prof metadata too
-  break;
-case Instruction::Xor:
-  replaceInstUsesWith(cast(*U), &I);
-  break;
-default:
-  llvm_unreachable("Got unexpected user - out of sync with "
-   "canFreelyInvertAllUsersOf() ?");
-}
-  }
+  // And, adapt users.
+  freelyInvertAllUsersOf(&I);
 
   return &I;
 }

diff  --git a/llvm/lib/Transforms/InstCombine/InstCombineInternal.h 
b/llvm/lib/Transforms/InstCombine/InstCombineInternal.h
index 6468e406c527..16bc26520c18 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineInternal.h
+++ b/llvm/lib/Transforms/InstCombine/InstCombineInternal.h
@@ -323,6 +323,8 @@ class LLVM_LIBRARY_VISIBILITY InstCombinerImpl final
   Instruction *optimizeBitCastFromPhi(CastInst &CI, PHINode *PN);
   Instruction *matchSAddSubSat(SelectInst &MinMax1);
 
+  void freelyInvertAllUsersOf(Value *V);
+
   /// Determine if a pair of casts can be replaced by a single cast.
   ///
   /// \param CI1 The first of a pair of casts.

diff  --git a/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp 
b/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
index 570a07ec6a5a..2f8a80a89992 100644
--- a/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
@@ -870,6 +870,30 @@ Value 
*InstCombinerImpl::SimplifySelectsFeedingBinaryOp(BinaryOperator &I,
   return SI;
 }
 
+/// Freely adapt every user of V as-if V was changed to !V.
+/// WARNING: only if canFreelyInvertAllUsersOf() said this can be done.
+void InstCombinerImpl::freelyInvertAllUsersOf(Value *I) {
+  for (User *U : I->users()) {
+switch (cast(U)->getOpcode()) {
+case Instruction::Select: {
+  auto *SI = cast(U);
+  SI->swapValues();
+  SI->swapProfMetadata();
+  break;
+}
+case Instruction::Br:
+  cast(U)->swapSuccessors(); // swaps prof metadata too
+  break;
+case Instruction::Xor:
+  replaceInstUsesWith(cast(*U), I);
+  break;
+default:
+  llvm_unreachable("Got unexpected user - out of sync with "
+   "canFreelyInvertAllUsersOf() ?");
+}
+  }
+}
+
 /// Given a 'sub' instruction, return the RHS of the instruction if the LHS is 
a
 /// constant zero (which is the 'negate' form).
 Value *InstCombinerImpl::dyn_castNegVal(Value *V) const {



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[llvm-branch-commits] [llvm] 6260490 - [NFC][InstCombine] Add tests for `(~x) &/| y` --> `~(x |/& (~y))` fold

[Roman Lebedev via llvm-branch-commits]

Author: Roman Lebedev
Date: 2021-01-22T17:23:54+03:00
New Revision: 62604906b5b29c4a55f83226a60f0de9ff9f8df2

URL: 
https://github.com/llvm/llvm-project/commit/62604906b5b29c4a55f83226a60f0de9ff9f8df2
DIFF: 
https://github.com/llvm/llvm-project/commit/62604906b5b29c4a55f83226a60f0de9ff9f8df2.diff

LOG: [NFC][InstCombine] Add tests for `(~x) &/| y` --> `~(x |/& (~y))` fold

Iff y is free to invert, and the users of the expression can be updated,
we can undo De-Morgan fold, and immediately get rid of the `not` op.

Added: 
llvm/test/Transforms/InstCombine/sink-not-into-another-hand-of-and.ll
llvm/test/Transforms/InstCombine/sink-not-into-another-hand-of-or.ll

Modified: 


Removed: 




diff  --git 
a/llvm/test/Transforms/InstCombine/sink-not-into-another-hand-of-and.ll 
b/llvm/test/Transforms/InstCombine/sink-not-into-another-hand-of-and.ll
new file mode 100644
index ..14c889b23e39
--- /dev/null
+++ b/llvm/test/Transforms/InstCombine/sink-not-into-another-hand-of-and.ll
@@ -0,0 +1,96 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+; Transform
+;   z = (~x) & y
+; into:
+;   z = ~(x | (~y))
+; iff y is free to invert and all uses of z can be freely updated.
+
+declare void @use1(i1)
+
+; Most basic positive test
+define i32 @t0(i1 %i0, i32 %v0, i32 %v1, i32 %v2, i32 %v3) {
+; CHECK-LABEL: @t0(
+; CHECK-NEXT:[[I1:%.*]] = icmp eq i32 [[V0:%.*]], [[V1:%.*]]
+; CHECK-NEXT:[[I2:%.*]] = xor i1 [[I0:%.*]], true
+; CHECK-NEXT:[[I3:%.*]] = and i1 [[I1]], [[I2]]
+; CHECK-NEXT:[[I4:%.*]] = select i1 [[I3]], i32 [[V2:%.*]], i32 [[V3:%.*]]
+; CHECK-NEXT:ret i32 [[I4]]
+;
+  %i1 = icmp eq i32 %v0, %v1
+  %i2 = xor i1 %i0, -1
+  %i3 = and i1 %i2, %i1
+  %i4 = select i1 %i3, i32 %v2, i32 %v3
+  ret i32 %i4
+}
+define i32 @t1(i32 %v0, i32 %v1, i32 %v2, i32 %v3, i32 %v4, i32 %v5) {
+; CHECK-LABEL: @t1(
+; CHECK-NEXT:[[I0:%.*]] = icmp eq i32 [[V0:%.*]], [[V1:%.*]]
+; CHECK-NEXT:[[I1:%.*]] = icmp eq i32 [[V2:%.*]], [[V3:%.*]]
+; CHECK-NEXT:call void @use1(i1 [[I0]])
+; CHECK-NEXT:[[I2:%.*]] = xor i1 [[I0]], true
+; CHECK-NEXT:[[I3:%.*]] = and i1 [[I1]], [[I2]]
+; CHECK-NEXT:[[I4:%.*]] = select i1 [[I3]], i32 [[V4:%.*]], i32 [[V5:%.*]]
+; CHECK-NEXT:ret i32 [[I4]]
+;
+  %i0 = icmp eq i32 %v0, %v1
+  %i1 = icmp eq i32 %v2, %v3
+  call void @use1(i1 %i0)
+  %i2 = xor i1 %i0, -1
+  %i3 = and i1 %i2, %i1
+  %i4 = select i1 %i3, i32 %v4, i32 %v5
+  ret i32 %i4
+}
+
+; All users of %i3 must be invertible
+define i1 @n2(i1 %i0, i32 %v0, i32 %v1, i32 %v2, i32 %v3) {
+; CHECK-LABEL: @n2(
+; CHECK-NEXT:[[I1:%.*]] = icmp eq i32 [[V0:%.*]], [[V1:%.*]]
+; CHECK-NEXT:[[I2:%.*]] = xor i1 [[I0:%.*]], true
+; CHECK-NEXT:[[I3:%.*]] = and i1 [[I1]], [[I2]]
+; CHECK-NEXT:ret i1 [[I3]]
+;
+  %i1 = icmp eq i32 %v0, %v1
+  %i2 = xor i1 %i0, -1
+  %i3 = and i1 %i2, %i1
+  ret i1 %i3 ; can not be inverted
+}
+
+; %i1 must be invertible
+define i32 @n3(i1 %i0, i32 %v0, i32 %v1, i32 %v2, i32 %v3) {
+; CHECK-LABEL: @n3(
+; CHECK-NEXT:[[I1:%.*]] = icmp eq i32 [[V0:%.*]], [[V1:%.*]]
+; CHECK-NEXT:call void @use1(i1 [[I1]])
+; CHECK-NEXT:[[I2:%.*]] = xor i1 [[I0:%.*]], true
+; CHECK-NEXT:[[I3:%.*]] = and i1 [[I1]], [[I2]]
+; CHECK-NEXT:[[I4:%.*]] = select i1 [[I3]], i32 [[V2:%.*]], i32 [[V3:%.*]]
+; CHECK-NEXT:ret i32 [[I4]]
+;
+  %i1 = icmp eq i32 %v0, %v1 ; has extra uninvertible use
+  call void @use1(i1 %i1) ; bad extra use
+  %i2 = xor i1 %i0, -1
+  %i3 = and i1 %i2, %i1
+  %i4 = select i1 %i3, i32 %v2, i32 %v3
+  ret i32 %i4
+}
+
+; FIXME: we could invert all uses of %i1 here
+define i32 @n4(i1 %i0, i32 %v0, i32 %v1, i32 %v2, i32 %v3, i32 %v4, i32 %v5, 
i32* %dst) {
+; CHECK-LABEL: @n4(
+; CHECK-NEXT:[[I1:%.*]] = icmp eq i32 [[V0:%.*]], [[V1:%.*]]
+; CHECK-NEXT:[[I2:%.*]] = select i1 [[I1]], i32 [[V2:%.*]], i32 [[V3:%.*]]
+; CHECK-NEXT:store i32 [[I2]], i32* [[DST:%.*]], align 4
+; CHECK-NEXT:[[I3:%.*]] = xor i1 [[I0:%.*]], true
+; CHECK-NEXT:[[I4:%.*]] = and i1 [[I1]], [[I3]]
+; CHECK-NEXT:[[I5:%.*]] = select i1 [[I4]], i32 [[V4:%.*]], i32 [[V5:%.*]]
+; CHECK-NEXT:ret i32 [[I5]]
+;
+  %i1 = icmp eq i32 %v0, %v1 ; has extra invertible use
+  %i2 = select i1 %i1, i32 %v2, i32 %v3 ; invertible use
+  store i32 %i2, i32* %dst
+  %i3 = xor i1 %i0, -1
+  %i4 = and i1 %i3, %i1
+  %i5 = select i1 %i4, i32 %v4, i32 %v5
+  ret i32 %i5
+}

diff  --git 
a/llvm/test/Transforms/InstCombine/sink-not-into-another-hand-of-or.ll 
b/llvm/test/Transforms/InstCombine/sink-not-into-another-hand-of-or.ll
new file mode 100644
index ..57ef48725ead
--- /dev/null
+++ b/llvm/test/Transforms/InstCombine/sink-not-into-another-hand-of-or.ll
@@ -0,0 +1,96 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -instcombine -S | FileC

[llvm-branch-commits] [llvm] 79b0d21 - [InstCombine] Fold `(~x) & y` --> `~(x | (~y))` iff it is free to do so

[Roman Lebedev via llvm-branch-commits]

Author: Roman Lebedev
Date: 2021-01-22T17:23:54+03:00
New Revision: 79b0d21ce92f1a5ff4c822d1a5c664196b338535

URL: 
https://github.com/llvm/llvm-project/commit/79b0d21ce92f1a5ff4c822d1a5c664196b338535
DIFF: 
https://github.com/llvm/llvm-project/commit/79b0d21ce92f1a5ff4c822d1a5c664196b338535.diff

LOG: [InstCombine] Fold `(~x) & y` --> `~(x | (~y))` iff it is free to do so

Iff we know we can get rid of the inversions in the new pattern,
we can thus get rid of the inversion in the old pattern,
this decreasing instruction count.

Added: 


Modified: 
llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
llvm/lib/Transforms/InstCombine/InstCombineInternal.h
llvm/test/Transforms/InstCombine/sink-not-into-another-hand-of-and.ll

Removed: 




diff  --git a/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp 
b/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
index c42f113feca3..944e7c4b1325 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
@@ -1983,6 +1983,10 @@ Instruction *InstCombinerImpl::visitAnd(BinaryOperator 
&I) {
 return SelectInst::Create(NewICmpInst, X, ConstantInt::getNullValue(Ty));
   }
 
+  // (~x) & y  -->  ~(x | (~y))  iff that gets rid of inversions
+  if (sinkNotIntoOtherHandOfAnd(I))
+return &I;
+
   return nullptr;
 }
 
@@ -3089,6 +3093,45 @@ static Instruction *sinkNotIntoXor(BinaryOperator &I,
   return BinaryOperator::CreateXor(NotX, Y, I.getName() + ".demorgan");
 }
 
+// Transform
+//   z = (~x) & y
+// into:
+//   z = ~(x | (~y))
+// iff y is free to invert and all uses of z can be freely updated.
+bool InstCombinerImpl::sinkNotIntoOtherHandOfAnd(BinaryOperator &I) {
+  Instruction::BinaryOps NewOpc;
+  switch (I.getOpcode()) {
+  case Instruction::And:
+NewOpc = Instruction::Or;
+break;
+  default:
+return false;
+  };
+
+  Value *X, *Y;
+  if (!match(&I, m_c_BinOp(m_Not(m_Value(X)), m_Value(Y
+return false;
+
+  // Will we be able to fold the `not` into Y eventually?
+  if (!InstCombiner::isFreeToInvert(Y, Y->hasOneUse()))
+return false;
+
+  // And can our users be adapted?
+  if (!InstCombiner::canFreelyInvertAllUsersOf(&I, /*IgnoredUser=*/nullptr))
+return false;
+
+  Value *NotY = Builder.CreateNot(Y, Y->getName() + ".not");
+  Value *NewBinOp =
+  BinaryOperator::Create(NewOpc, X, NotY, I.getName() + ".not");
+  Builder.Insert(NewBinOp);
+  replaceInstUsesWith(I, NewBinOp);
+  // We can not just create an outer `not`, it will most likely be immediately
+  // folded back, reconstructing our initial pattern, and causing an
+  // infinite combine loop, so immediately manually fold it away.
+  freelyInvertAllUsersOf(NewBinOp);
+  return true;
+}
+
 // FIXME: We use commutative matchers (m_c_*) for some, but not all, matches
 // here. We should standardize that construct where it is needed or choose some
 // other way to ensure that commutated variants of patterns are not missed.

diff  --git a/llvm/lib/Transforms/InstCombine/InstCombineInternal.h 
b/llvm/lib/Transforms/InstCombine/InstCombineInternal.h
index 16bc26520c18..c56b31bd227b 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineInternal.h
+++ b/llvm/lib/Transforms/InstCombine/InstCombineInternal.h
@@ -105,6 +105,7 @@ class LLVM_LIBRARY_VISIBILITY InstCombinerImpl final
   Value *simplifyRangeCheck(ICmpInst *Cmp0, ICmpInst *Cmp1, bool Inverted);
   Instruction *visitAnd(BinaryOperator &I);
   Instruction *visitOr(BinaryOperator &I);
+  bool sinkNotIntoOtherHandOfAnd(BinaryOperator &I);
   Instruction *visitXor(BinaryOperator &I);
   Instruction *visitShl(BinaryOperator &I);
   Value *reassociateShiftAmtsOfTwoSameDirectionShifts(

diff  --git 
a/llvm/test/Transforms/InstCombine/sink-not-into-another-hand-of-and.ll 
b/llvm/test/Transforms/InstCombine/sink-not-into-another-hand-of-and.ll
index 14c889b23e39..17c37c836bb3 100644
--- a/llvm/test/Transforms/InstCombine/sink-not-into-another-hand-of-and.ll
+++ b/llvm/test/Transforms/InstCombine/sink-not-into-another-hand-of-and.ll
@@ -12,10 +12,9 @@ declare void @use1(i1)
 ; Most basic positive test
 define i32 @t0(i1 %i0, i32 %v0, i32 %v1, i32 %v2, i32 %v3) {
 ; CHECK-LABEL: @t0(
-; CHECK-NEXT:[[I1:%.*]] = icmp eq i32 [[V0:%.*]], [[V1:%.*]]
-; CHECK-NEXT:[[I2:%.*]] = xor i1 [[I0:%.*]], true
-; CHECK-NEXT:[[I3:%.*]] = and i1 [[I1]], [[I2]]
-; CHECK-NEXT:[[I4:%.*]] = select i1 [[I3]], i32 [[V2:%.*]], i32 [[V3:%.*]]
+; CHECK-NEXT:[[I1:%.*]] = icmp ne i32 [[V0:%.*]], [[V1:%.*]]
+; CHECK-NEXT:[[TMP1:%.*]] = or i1 [[I1]], [[I0:%.*]]
+; CHECK-NEXT:[[I4:%.*]] = select i1 [[TMP1]], i32 [[V3:%.*]], i32 
[[V2:%.*]]
 ; CHECK-NEXT:ret i32 [[I4]]
 ;
   %i1 = icmp eq i32 %v0, %v1
@@ -27,11 +26,10 @@ define i32 @t0(i1 %i0, i32 %v0, i32 %v1, i32 %v2, i32 %v3) {
 define i32 @t1(i32 %v0, i32 %v1, i32 %v2, i32 %v3, i32 %v4, i32 %v5) 

[llvm-branch-commits] [llvm] d1a6f92 - [InstCombine] Fold `(~x) | y` --> `~(x & (~y))` iff it is free to do so

[Roman Lebedev via llvm-branch-commits]

Author: Roman Lebedev
Date: 2021-01-22T17:23:54+03:00
New Revision: d1a6f92fd545726aab0784e2dcfb193ce185c418

URL: 
https://github.com/llvm/llvm-project/commit/d1a6f92fd545726aab0784e2dcfb193ce185c418
DIFF: 
https://github.com/llvm/llvm-project/commit/d1a6f92fd545726aab0784e2dcfb193ce185c418.diff

LOG: [InstCombine] Fold `(~x) | y` --> `~(x & (~y))` iff it is free to do so

Iff we know we can get rid of the inversions in the new pattern,
we can thus get rid of the inversion in the old pattern,
this decreasing instruction count.

Note that we could position this transformation as just hoisting
of the `not` (still, iff y is freely negatible), but the test changes
show a number of regressions, so let's not do that.

Added: 


Modified: 
llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
llvm/lib/Transforms/InstCombine/InstCombineInternal.h
llvm/test/Transforms/InstCombine/sink-not-into-another-hand-of-or.ll
llvm/test/Transforms/SimplifyCFG/merge-cond-stores.ll

Removed: 




diff  --git a/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp 
b/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
index 944e7c4b1325..68c4156af2c4 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
@@ -1984,7 +1984,7 @@ Instruction *InstCombinerImpl::visitAnd(BinaryOperator 
&I) {
   }
 
   // (~x) & y  -->  ~(x | (~y))  iff that gets rid of inversions
-  if (sinkNotIntoOtherHandOfAnd(I))
+  if (sinkNotIntoOtherHandOfAndOrOr(I))
 return &I;
 
   return nullptr;
@@ -2867,6 +2867,10 @@ Instruction *InstCombinerImpl::visitOr(BinaryOperator 
&I) {
 }
   }
 
+  // (~x) | y  -->  ~(x & (~y))  iff that gets rid of inversions
+  if (sinkNotIntoOtherHandOfAndOrOr(I))
+return &I;
+
   return nullptr;
 }
 
@@ -3094,16 +3098,19 @@ static Instruction *sinkNotIntoXor(BinaryOperator &I,
 }
 
 // Transform
-//   z = (~x) & y
+//   z = (~x) &/| y
 // into:
-//   z = ~(x | (~y))
+//   z = ~(x |/& (~y))
 // iff y is free to invert and all uses of z can be freely updated.
-bool InstCombinerImpl::sinkNotIntoOtherHandOfAnd(BinaryOperator &I) {
+bool InstCombinerImpl::sinkNotIntoOtherHandOfAndOrOr(BinaryOperator &I) {
   Instruction::BinaryOps NewOpc;
   switch (I.getOpcode()) {
   case Instruction::And:
 NewOpc = Instruction::Or;
 break;
+  case Instruction::Or:
+NewOpc = Instruction::And;
+break;
   default:
 return false;
   };

diff  --git a/llvm/lib/Transforms/InstCombine/InstCombineInternal.h 
b/llvm/lib/Transforms/InstCombine/InstCombineInternal.h
index c56b31bd227b..5e466c5e13e7 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineInternal.h
+++ b/llvm/lib/Transforms/InstCombine/InstCombineInternal.h
@@ -105,7 +105,7 @@ class LLVM_LIBRARY_VISIBILITY InstCombinerImpl final
   Value *simplifyRangeCheck(ICmpInst *Cmp0, ICmpInst *Cmp1, bool Inverted);
   Instruction *visitAnd(BinaryOperator &I);
   Instruction *visitOr(BinaryOperator &I);
-  bool sinkNotIntoOtherHandOfAnd(BinaryOperator &I);
+  bool sinkNotIntoOtherHandOfAndOrOr(BinaryOperator &I);
   Instruction *visitXor(BinaryOperator &I);
   Instruction *visitShl(BinaryOperator &I);
   Value *reassociateShiftAmtsOfTwoSameDirectionShifts(

diff  --git 
a/llvm/test/Transforms/InstCombine/sink-not-into-another-hand-of-or.ll 
b/llvm/test/Transforms/InstCombine/sink-not-into-another-hand-of-or.ll
index 57ef48725ead..d40acc37ca73 100644
--- a/llvm/test/Transforms/InstCombine/sink-not-into-another-hand-of-or.ll
+++ b/llvm/test/Transforms/InstCombine/sink-not-into-another-hand-of-or.ll
@@ -12,10 +12,9 @@ declare void @use1(i1)
 ; Most basic positive test
 define i32 @t0(i1 %i0, i32 %v0, i32 %v1, i32 %v2, i32 %v3) {
 ; CHECK-LABEL: @t0(
-; CHECK-NEXT:[[I1:%.*]] = icmp eq i32 [[V0:%.*]], [[V1:%.*]]
-; CHECK-NEXT:[[I2:%.*]] = xor i1 [[I0:%.*]], true
-; CHECK-NEXT:[[I3:%.*]] = or i1 [[I1]], [[I2]]
-; CHECK-NEXT:[[I4:%.*]] = select i1 [[I3]], i32 [[V2:%.*]], i32 [[V3:%.*]]
+; CHECK-NEXT:[[I1:%.*]] = icmp ne i32 [[V0:%.*]], [[V1:%.*]]
+; CHECK-NEXT:[[TMP1:%.*]] = and i1 [[I1]], [[I0:%.*]]
+; CHECK-NEXT:[[I4:%.*]] = select i1 [[TMP1]], i32 [[V3:%.*]], i32 
[[V2:%.*]]
 ; CHECK-NEXT:ret i32 [[I4]]
 ;
   %i1 = icmp eq i32 %v0, %v1
@@ -27,11 +26,10 @@ define i32 @t0(i1 %i0, i32 %v0, i32 %v1, i32 %v2, i32 %v3) {
 define i32 @t1(i32 %v0, i32 %v1, i32 %v2, i32 %v3, i32 %v4, i32 %v5) {
 ; CHECK-LABEL: @t1(
 ; CHECK-NEXT:[[I0:%.*]] = icmp eq i32 [[V0:%.*]], [[V1:%.*]]
-; CHECK-NEXT:[[I1:%.*]] = icmp eq i32 [[V2:%.*]], [[V3:%.*]]
+; CHECK-NEXT:[[I1:%.*]] = icmp ne i32 [[V2:%.*]], [[V3:%.*]]
 ; CHECK-NEXT:call void @use1(i1 [[I0]])
-; CHECK-NEXT:[[I2:%.*]] = xor i1 [[I0]], true
-; CHECK-NEXT:[[I3:%.*]] = or i1 [[I1]], [[I2]]
-; CHECK-NEXT:[[I4:%.*]] = select i1 [[I3]], i32 [[V4:%.*]], i32 [[V5:%.*]]
+; CHECK-NEXT:[[TMP1:%.*]] = an

[llvm-branch-commits] [llvm] 85e7578 - Revert "[NFCI-ish][SimplifyCFG] FoldBranchToCommonDest(): really don't deal with uncond branches"

[Roman Lebedev via llvm-branch-commits]

Author: Roman Lebedev
Date: 2021-01-22T17:37:11+03:00
New Revision: 85e7578c6db81abb3283cb87fce8592f83ae0ea8

URL: 
https://github.com/llvm/llvm-project/commit/85e7578c6db81abb3283cb87fce8592f83ae0ea8
DIFF: 
https://github.com/llvm/llvm-project/commit/85e7578c6db81abb3283cb87fce8592f83ae0ea8.diff

LOG: Revert "[NFCI-ish][SimplifyCFG] FoldBranchToCommonDest(): really don't 
deal with uncond branches"

Does not build in XCode:
http://green.lab.llvm.org/green/job/clang-stage1-RA/17963/consoleFull#-1704658317a1ca8a51-895e-46c6-af87-ce24fa4cd561

This reverts commit aabed3718ae25476c0f6b7e70c83ba4658f00e5c.

Added: 


Modified: 
llvm/lib/Transforms/Utils/SimplifyCFG.cpp

Removed: 




diff  --git a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp 
b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
index 4191f2104f3d..5fbcdd6abf6d 100644
--- a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
+++ b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
@@ -2978,7 +2978,7 @@ bool llvm::FoldBranchToCommonDest(BranchInst *BI, 
DomTreeUpdater *DTU,
   unsigned BonusInstThreshold) {
   // If this block ends with an unconditional branch,
   // let SpeculativelyExecuteBB() deal with it.
-  if (!BI->isConditional() || is_splat(successors(BI)))
+  if (!BI->isConditional())
 return false;
 
   BasicBlock *BB = BI->getParent();
@@ -3059,8 +3059,7 @@ bool llvm::FoldBranchToCommonDest(BranchInst *BI, 
DomTreeUpdater *DTU,
 // Check that we have two conditional branches.  If there is a PHI node in
 // the common successor, verify that the same value flows in from both
 // blocks.
-if (!PBI || PBI->isUnconditional() || is_splat(successors(PBI)) ||
-!SafeToMergeTerminators(BI, PBI))
+if (!PBI || PBI->isUnconditional() || !SafeToMergeTerminators(BI, PBI))
   continue;
 
 // Determine if the two branches share a common destination.



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[llvm-branch-commits] [openmp] 9b19ecb - [libomptarget][devicertl] Drop templated atomic functions

[Jon Chesterfield via llvm-branch-commits]

Author: Jon Chesterfield
Date: 2021-01-22T14:48:22Z
New Revision: 9b19ecb8f1ec7acbcfd6f0e4f3cbd6902570105d

URL: 
https://github.com/llvm/llvm-project/commit/9b19ecb8f1ec7acbcfd6f0e4f3cbd6902570105d
DIFF: 
https://github.com/llvm/llvm-project/commit/9b19ecb8f1ec7acbcfd6f0e4f3cbd6902570105d.diff

LOG: [libomptarget][devicertl] Drop templated atomic functions

[libomptarget][devicertl] Drop templated atomic functions

The five __kmpc_atomic templates are instantiated a total of seven times.
This change replaces the template with explictly typed functions, which
have the same prototype for amdgcn and nvptx, and implements them with
the same code presently in use.

Rolls in the accepted but not yet landed D95085.

The unsigned long long type can be replaced with uint64_t when replacing
the cuda function. Until then, clang warns on casting a pointer to one to
a pointer to the other.

Reviewed By: tianshilei1992

Differential Revision: https://reviews.llvm.org/D95093

Added: 


Modified: 
openmp/libomptarget/deviceRTLs/amdgcn/src/target_impl.h
openmp/libomptarget/deviceRTLs/amdgcn/src/target_impl.hip
openmp/libomptarget/deviceRTLs/nvptx/src/target_impl.cu
openmp/libomptarget/deviceRTLs/nvptx/src/target_impl.h

Removed: 




diff  --git a/openmp/libomptarget/deviceRTLs/amdgcn/src/target_impl.h 
b/openmp/libomptarget/deviceRTLs/amdgcn/src/target_impl.h
index 6e8a651bd886..228d3f6e556d 100644
--- a/openmp/libomptarget/deviceRTLs/amdgcn/src/target_impl.h
+++ b/openmp/libomptarget/deviceRTLs/amdgcn/src/target_impl.h
@@ -126,29 +126,17 @@ DEVICE unsigned GetWarpId();
 DEVICE unsigned GetLaneId();
 
 // Atomics
-template  INLINE T __kmpc_atomic_add(T *address, T val) {
-  return __atomic_fetch_add(address, val, __ATOMIC_SEQ_CST);
-}
-
-INLINE uint32_t __kmpc_atomic_inc(uint32_t *address, uint32_t max) {
-  return __builtin_amdgcn_atomic_inc32(address, max, __ATOMIC_SEQ_CST, "");
-}
-
-template  INLINE T __kmpc_atomic_max(T *address, T val) {
-  return __atomic_fetch_max(address, val, __ATOMIC_SEQ_CST);
-}
-
-template  INLINE T __kmpc_atomic_exchange(T *address, T val) {
-  T r;
-  __atomic_exchange(address, &val, &r, __ATOMIC_SEQ_CST);
-  return r;
-}
-
-template  INLINE T __kmpc_atomic_cas(T *address, T compare, T val) 
{
-  (void)__atomic_compare_exchange(address, &compare, &val, false,
-  __ATOMIC_SEQ_CST, __ATOMIC_RELAXED);
-  return compare;
-}
+DEVICE uint32_t __kmpc_atomic_add(uint32_t *, uint32_t);
+DEVICE uint32_t __kmpc_atomic_inc(uint32_t *, uint32_t);
+DEVICE uint32_t __kmpc_atomic_max(uint32_t *, uint32_t);
+DEVICE uint32_t __kmpc_atomic_exchange(uint32_t *, uint32_t);
+DEVICE uint32_t __kmpc_atomic_cas(uint32_t *, uint32_t, uint32_t);
+
+static_assert(sizeof(unsigned long long) == sizeof(uint64_t), "");
+DEVICE unsigned long long __kmpc_atomic_exchange(unsigned long long *,
+ unsigned long long);
+DEVICE unsigned long long __kmpc_atomic_add(unsigned long long *,
+unsigned long long);
 
 // Locks
 DEVICE void __kmpc_impl_init_lock(omp_lock_t *lock);

diff  --git a/openmp/libomptarget/deviceRTLs/amdgcn/src/target_impl.hip 
b/openmp/libomptarget/deviceRTLs/amdgcn/src/target_impl.hip
index 7388a29215cc..35828cda0e06 100644
--- a/openmp/libomptarget/deviceRTLs/amdgcn/src/target_impl.hip
+++ b/openmp/libomptarget/deviceRTLs/amdgcn/src/target_impl.hip
@@ -132,11 +132,13 @@ DEVICE uint32_t get_workgroup_dim(uint32_t group_id, 
uint32_t grid_size,
 } // namespace
 
 DEVICE int GetNumberOfBlocksInKernel() {
-  return get_grid_dim(__builtin_amdgcn_grid_size_x(), 
__builtin_amdgcn_workgroup_size_x());
+  return get_grid_dim(__builtin_amdgcn_grid_size_x(),
+  __builtin_amdgcn_workgroup_size_x());
 }
 
 DEVICE int GetNumberOfThreadsInBlock() {
-  return get_workgroup_dim(__builtin_amdgcn_workgroup_id_x(), 
__builtin_amdgcn_grid_size_x(),
+  return get_workgroup_dim(__builtin_amdgcn_workgroup_id_x(),
+   __builtin_amdgcn_grid_size_x(),
__builtin_amdgcn_workgroup_size_x());
 }
 
@@ -149,6 +151,40 @@ EXTERN uint32_t __kmpc_amdgcn_gpu_num_threads() {
   return GetNumberOfThreadsInBlock();
 }
 
+// Atomics
+DEVICE uint32_t __kmpc_atomic_add(uint32_t *Address, uint32_t Val) {
+  return __atomic_fetch_add(Address, Val, __ATOMIC_SEQ_CST);
+}
+DEVICE uint32_t __kmpc_atomic_inc(uint32_t *Address, uint32_t Val) {
+  return __builtin_amdgcn_atomic_inc32(Address, max, __ATOMIC_SEQ_CST, "");
+}
+DEVICE uint32_t __kmpc_atomic_max(uint32_t *Address, uint32_t Val) {
+  return __atomic_fetch_max(Address, Val, __ATOMIC_SEQ_CST);
+}
+
+DEVICE uint32_t __kmpc_atomic_exchange(uint32_t *Address, uint32_t Val) {
+  uint32_t R;
+  __atomic_exchange(Address, &Val, &R, __ATOMIC_SEQ_CST);
+  return R;
+}
+DEVICE uint32_t __kmpc_atomic_cas(uint32_t *Ad

[llvm-branch-commits] [llvm] 87b628d - [coro.async] Make sure we process async coroutines

[Arnold Schwaighofer via llvm-branch-commits]

Author: Arnold Schwaighofer
Date: 2021-01-22T07:04:01-08:00
New Revision: 87b628dadde02b295322c1530d058397c1c4dd14

URL: 
https://github.com/llvm/llvm-project/commit/87b628dadde02b295322c1530d058397c1c4dd14
DIFF: 
https://github.com/llvm/llvm-project/commit/87b628dadde02b295322c1530d058397c1c4dd14.diff

LOG: [coro.async] Make sure we process async coroutines

Because we were not looking for the llvm.coro.id.async intrinsic in the
early coro pass which triggers follow-up passes we relied on the
llvm.coro.end intrinsic being present. This might not be the case in
functions that end in unreachable code.

Differential Revision: https://reviews.llvm.org/D95144

Added: 
llvm/test/Transforms/Coroutines/coro-async-unreachable.ll

Modified: 
llvm/lib/Transforms/Coroutines/CoroEarly.cpp

Removed: 




diff  --git a/llvm/lib/Transforms/Coroutines/CoroEarly.cpp 
b/llvm/lib/Transforms/Coroutines/CoroEarly.cpp
index e134ff7f45c6..1660e41ba830 100644
--- a/llvm/lib/Transforms/Coroutines/CoroEarly.cpp
+++ b/llvm/lib/Transforms/Coroutines/CoroEarly.cpp
@@ -219,9 +219,10 @@ bool Lowerer::lowerEarlyIntrinsics(Function &F) {
 static bool declaresCoroEarlyIntrinsics(const Module &M) {
   return coro::declaresIntrinsics(
   M, {"llvm.coro.id", "llvm.coro.id.retcon", "llvm.coro.id.retcon.once",
-  "llvm.coro.destroy", "llvm.coro.done", "llvm.coro.end",
-  "llvm.coro.end.async", "llvm.coro.noop", "llvm.coro.free",
-  "llvm.coro.promise", "llvm.coro.resume", "llvm.coro.suspend"});
+  "llvm.coro.id.async", "llvm.coro.destroy", "llvm.coro.done",
+  "llvm.coro.end", "llvm.coro.end.async", "llvm.coro.noop",
+  "llvm.coro.free", "llvm.coro.promise", "llvm.coro.resume",
+  "llvm.coro.suspend"});
 }
 
 PreservedAnalyses CoroEarlyPass::run(Function &F, FunctionAnalysisManager &) {

diff  --git a/llvm/test/Transforms/Coroutines/coro-async-unreachable.ll 
b/llvm/test/Transforms/Coroutines/coro-async-unreachable.ll
new file mode 100644
index ..0ca3a6ce162a
--- /dev/null
+++ b/llvm/test/Transforms/Coroutines/coro-async-unreachable.ll
@@ -0,0 +1,105 @@
+; RUN: opt < %s -enable-coroutines -O2 -S | FileCheck --check-prefixes=CHECK %s
+; RUN: opt < %s -enable-coroutines -passes='default' -S | FileCheck 
--check-prefixes=CHECK %s
+
+target datalayout = "p:64:64:64"
+
+%async.task = type { i64 }
+%async.actor = type { i64 }
+%async.fp = type <{ i32, i32 }>
+
+%async.ctxt = type { i8*, void (i8*, %async.task*, %async.actor*)* }
+
+; The async callee.
+@my_other_async_function_fp = external global <{ i32, i32 }>
+declare void @my_other_async_function(i8* %async.ctxt)
+
+; Function that implements the dispatch to the callee function.
+define swiftcc void @my_async_function.my_other_async_function_fp.apply(i8* 
%fnPtr, i8* %async.ctxt, %async.task* %task, %async.actor* %actor) {
+  %callee = bitcast i8* %fnPtr to void(i8*, %async.task*, %async.actor*)*
+  tail call swiftcc void %callee(i8* %async.ctxt, %async.task* %task, 
%async.actor* %actor)
+  ret void
+}
+
+declare void @some_user(i64)
+declare void @some_may_write(i64*)
+
+define i8* @resume_context_projection(i8* %ctxt) {
+entry:
+  %resume_ctxt_addr = bitcast i8* %ctxt to i8**
+  %resume_ctxt = load i8*, i8** %resume_ctxt_addr, align 8
+  ret i8* %resume_ctxt
+}
+
+
+@unreachable_fp = constant <{ i32, i32 }>
+  <{ i32 trunc ( ; Relative pointer to async function
+   i64 sub (
+ i64 ptrtoint (void (i8*, %async.task*, %async.actor*)* @unreachable 
to i64),
+ i64 ptrtoint (i32* getelementptr inbounds (<{ i32, i32 }>, <{ i32, 
i32 }>* @unreachable_fp, i32 0, i32 1) to i64)
+   )
+ to i32),
+ i32 128; Initial async context size without space for frame
+}>
+
+define swiftcc void @unreachable(i8* %async.ctxt, %async.task* %task, 
%async.actor* %actor)  {
+entry:
+  %tmp = alloca { i64, i64 }, align 8
+  %proj.1 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %tmp, i64 0, 
i32 0
+  %proj.2 = getelementptr inbounds { i64, i64 }, { i64, i64 }* %tmp, i64 0, 
i32 1
+
+  %id = call token @llvm.coro.id.async(i32 128, i32 16, i32 0,
+  i8* bitcast (<{i32, i32}>* @unreachable_fp to i8*))
+  %hdl = call i8* @llvm.coro.begin(token %id, i8* null)
+  store i64 0, i64* %proj.1, align 8
+  store i64 1, i64* %proj.2, align 8
+  call void @some_may_write(i64* %proj.1)
+
+   ; Begin lowering: apply %my_other_async_function(%args...)
+  ; setup callee context
+  %arg0 = bitcast %async.task* %task to i8*
+  %arg1 = bitcast <{ i32, i32}>* @my_other_async_function_fp to i8*
+  %callee_context = call i8* @llvm.coro.async.context.alloc(i8* %arg0, i8* 
%arg1)
+   %callee_context.0 = bitcast i8* %callee_context to %async.ctxt*
+  ; store the return continuation
+  %callee_context.return_to_caller.addr = getelementptr inbounds %async.ctxt, 
%async.ctxt* %callee_context.0, i32 0, i32 1
+  %return_to_caller.addr

[llvm-branch-commits] [llvm] c8b4337 - [LoopUnswitch] Add test cases with atomic loads & call

[Florian Hahn via llvm-branch-commits]

Author: Florian Hahn
Date: 2021-01-22T15:10:12Z
New Revision: c8b4337911f4b61724fe62518c83cd6919d56b29

URL: 
https://github.com/llvm/llvm-project/commit/c8b4337911f4b61724fe62518c83cd6919d56b29
DIFF: 
https://github.com/llvm/llvm-project/commit/c8b4337911f4b61724fe62518c83cd6919d56b29.diff

LOG: [LoopUnswitch] Add test cases with atomic loads & call

Added: 


Modified: 
llvm/test/Transforms/LoopUnswitch/partial-unswitch.ll

Removed: 




diff  --git a/llvm/test/Transforms/LoopUnswitch/partial-unswitch.ll 
b/llvm/test/Transforms/LoopUnswitch/partial-unswitch.ll
index 63ce82230322..3e4c9369997e 100644
--- a/llvm/test/Transforms/LoopUnswitch/partial-unswitch.ll
+++ b/llvm/test/Transforms/LoopUnswitch/partial-unswitch.ll
@@ -728,3 +728,104 @@ loop.latch:
 exit:
   ret i32 10
 }
+
+; Do not unswitch if the condition depends on an atomic load. Duplicating such
+; loads is not safe.
+; TODO
+define i32 @no_partial_unswitch_atomic_load_unordered(i32* %ptr, i32 %N) {
+; CHECK-LABEL: @no_partial_unswitch_atomic_load_unordered
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:load
+;
+entry:
+  br label %loop.header
+
+loop.header:
+  %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]
+  %lv = load atomic i32, i32* %ptr unordered, align 4
+  %sc = icmp eq i32 %lv, 100
+  br i1 %sc, label %noclobber, label %clobber
+
+noclobber:
+  br label %loop.latch
+
+clobber:
+  call void @clobber()
+  br label %loop.latch
+
+loop.latch:
+  %c = icmp ult i32 %iv, %N
+  %iv.next = add i32 %iv, 1
+  br i1 %c, label %loop.header, label %exit
+
+exit:
+  ret i32 10
+}
+
+; Do not unswitch if the condition depends on an atomic load. Duplicating such
+; loads is not safe.
+; TODO
+define i32 @no_partial_unswitch_atomic_load_monotonic(i32* %ptr, i32 %N) {
+; CHECK-LABEL: @no_partial_unswitch_atomic_load_monotonic
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:load
+;
+entry:
+  br label %loop.header
+
+loop.header:
+  %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]
+  %lv = load atomic i32, i32* %ptr monotonic, align 4
+  %sc = icmp eq i32 %lv, 100
+  br i1 %sc, label %noclobber, label %clobber
+
+noclobber:
+  br label %loop.latch
+
+clobber:
+  call void @clobber()
+  br label %loop.latch
+
+loop.latch:
+  %c = icmp ult i32 %iv, %N
+  %iv.next = add i32 %iv, 1
+  br i1 %c, label %loop.header, label %exit
+
+exit:
+  ret i32 10
+}
+
+
+declare i32 @get_value()
+
+; Do not unswitch if the condition depends on a call, that may clobber memory.
+; Duplicating such a call is not safe.
+define i32 @no_partial_unswitch_cond_call(i32* %ptr, i32 %N) {
+; CHECK-LABEL: @no_partial_unswitch_cond_call
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:br label %loop.header
+;
+entry:
+  br label %loop.header
+
+loop.header:
+  %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]
+  %lv = call i32 @get_value()
+  %sc = icmp eq i32 %lv, 100
+  br i1 %sc, label %noclobber, label %clobber
+
+noclobber:
+  br label %loop.latch
+
+clobber:
+  call void @clobber()
+  br label %loop.latch
+
+loop.latch:
+  %c = icmp ult i32 %iv, %N
+  %iv.next = add i32 %iv, 1
+  br i1 %c, label %loop.header, label %exit
+
+exit:
+  ret i32 10
+}



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[llvm-branch-commits] [llvm] 86991d3 - [LoopUnswitch] Fix logic to avoid unswitching with atomic loads.

[Florian Hahn via llvm-branch-commits]

Author: Florian Hahn
Date: 2021-01-22T15:10:12Z
New Revision: 86991d3231334538cccf6732056cbb641046bd49

URL: 
https://github.com/llvm/llvm-project/commit/86991d3231334538cccf6732056cbb641046bd49
DIFF: 
https://github.com/llvm/llvm-project/commit/86991d3231334538cccf6732056cbb641046bd49.diff

LOG: [LoopUnswitch] Fix logic to avoid unswitching with atomic loads.

The existing code did not deal with atomic loads correctly. Such loads
are represented as MemoryDefs. Bail out on any MemoryAccess that is not
a MemoryUse.

Added: 


Modified: 
llvm/lib/Transforms/Scalar/LoopUnswitch.cpp
llvm/test/Transforms/LoopUnswitch/partial-unswitch.ll

Removed: 




diff  --git a/llvm/lib/Transforms/Scalar/LoopUnswitch.cpp 
b/llvm/lib/Transforms/Scalar/LoopUnswitch.cpp
index 2e3ab5029fd2..ecf2756bc720 100644
--- a/llvm/lib/Transforms/Scalar/LoopUnswitch.cpp
+++ b/llvm/lib/Transforms/Scalar/LoopUnswitch.cpp
@@ -681,16 +681,22 @@ hasPartialIVCondition(Loop *L, MemorySSA &MSSA, AAResults 
*AA) {
 if (!isa(I) && !isa(I))
   return {};
 
-// Do not duplicate volatile loads.
+// Do not duplicate volatile and atomic loads.
 if (auto *LI = dyn_cast(I))
-  if (LI->isVolatile())
+  if (LI->isVolatile() || LI->isAtomic())
 return {};
 
 ToDuplicate.push_back(I);
-if (auto *MemUse = dyn_cast_or_null(MSSA.getMemoryAccess(I))) {
-  // Queue the defining access to check for alias checks.
-  AccessesToCheck.push_back(MemUse->getDefiningAccess());
-  AccessedLocs.push_back(MemoryLocation::get(I));
+if (MemoryAccess *MA = MSSA.getMemoryAccess(I)) {
+  if (auto *MemUse = dyn_cast_or_null(MA)) {
+// Queue the defining access to check for alias checks.
+AccessesToCheck.push_back(MemUse->getDefiningAccess());
+AccessedLocs.push_back(MemoryLocation::get(I));
+  } else {
+// MemoryDefs may clobber the location or may be atomic memory
+// operations. Bail out.
+return {};
+  }
 }
 WorkList.append(I->op_begin(), I->op_end());
   }
@@ -972,6 +978,8 @@ bool LoopUnswitch::processCurrentLoop() {
   !findOptionMDForLoop(CurrentLoop, "llvm.loop.unswitch.partial.disable")) 
{
 auto ToDuplicate = hasPartialIVCondition(CurrentLoop, *MSSA, AA);
 if (!ToDuplicate.first.empty()) {
+  LLVM_DEBUG(dbgs() << "loop-unswitch: Found partially invariant condition 
"
+<< *ToDuplicate.first[0] << "\n");
   ++NumBranches;
   unswitchIfProfitable(ToDuplicate.first[0], ToDuplicate.second,
CurrentLoop->getHeader()->getTerminator(),

diff  --git a/llvm/test/Transforms/LoopUnswitch/partial-unswitch.ll 
b/llvm/test/Transforms/LoopUnswitch/partial-unswitch.ll
index 3e4c9369997e..1c2471cef9ba 100644
--- a/llvm/test/Transforms/LoopUnswitch/partial-unswitch.ll
+++ b/llvm/test/Transforms/LoopUnswitch/partial-unswitch.ll
@@ -731,11 +731,10 @@ exit:
 
 ; Do not unswitch if the condition depends on an atomic load. Duplicating such
 ; loads is not safe.
-; TODO
 define i32 @no_partial_unswitch_atomic_load_unordered(i32* %ptr, i32 %N) {
 ; CHECK-LABEL: @no_partial_unswitch_atomic_load_unordered
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:load
+; CHECK-NEXT:br label %loop.header
 ;
 entry:
   br label %loop.header
@@ -764,11 +763,10 @@ exit:
 
 ; Do not unswitch if the condition depends on an atomic load. Duplicating such
 ; loads is not safe.
-; TODO
 define i32 @no_partial_unswitch_atomic_load_monotonic(i32* %ptr, i32 %N) {
 ; CHECK-LABEL: @no_partial_unswitch_atomic_load_monotonic
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:load
+; CHECK-NEXT:br label %loop.header
 ;
 entry:
   br label %loop.header



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[llvm-branch-commits] [flang] 02e174e - [flang] Fix typo in error message

[Peter Steinfeld via llvm-branch-commits]

Author: Peter Steinfeld
Date: 2021-01-22T07:28:37-08:00
New Revision: 02e174e8f77f8c03e32e5860492dd9c7dabc6906

URL: 
https://github.com/llvm/llvm-project/commit/02e174e8f77f8c03e32e5860492dd9c7dabc6906
DIFF: 
https://github.com/llvm/llvm-project/commit/02e174e8f77f8c03e32e5860492dd9c7dabc6906.diff

LOG: [flang] Fix typo in error message

The title says it all.

Differential Revision: https://reviews.llvm.org/D95233

Added: 


Modified: 
flang/lib/Semantics/check-call.cpp
flang/test/Semantics/call09.f90

Removed: 




diff  --git a/flang/lib/Semantics/check-call.cpp 
b/flang/lib/Semantics/check-call.cpp
index 1bd0b0ab6f08..996cdf298d85 100644
--- a/flang/lib/Semantics/check-call.cpp
+++ b/flang/lib/Semantics/check-call.cpp
@@ -548,7 +548,7 @@ static void CheckProcedureArg(evaluate::ActualArgument &arg,
 messages.Say(
 "Actual procedure argument has an implicit interface "
 "which is not known to be compatible with %s which has an "
-"explcit interface"_err_en_US,
+"explicit interface"_err_en_US,
 dummyName);
 return;
   }

diff  --git a/flang/test/Semantics/call09.f90 b/flang/test/Semantics/call09.f90
index 36aaa8f4ab46..9db5887dc4e7 100644
--- a/flang/test/Semantics/call09.f90
+++ b/flang/test/Semantics/call09.f90
@@ -78,7 +78,7 @@ subroutine test1 ! 15.5.2.9(5)
 call s01(null(intPtr))
 !ERROR: Actual argument associated with procedure dummy argument 'p=' is 
not a procedure
 call s01(B"0101")
-!ERROR: Actual procedure argument has an implicit interface which is not 
known to be compatible with dummy argument 'p=' which has an explcit interface
+!ERROR: Actual procedure argument has an implicit interface which is not 
known to be compatible with dummy argument 'p=' which has an explicit interface
 call s01(extfunc)
 !ERROR: Actual argument associated with procedure pointer dummy argument 
'p=' must be a POINTER unless INTENT(IN)
 call s02(realfunc)
@@ -93,9 +93,9 @@ subroutine test1 ! 15.5.2.9(5)
 call s02(null(p))
 !ERROR: Actual argument associated with procedure pointer dummy argument 
'p=' must be a POINTER unless INTENT(IN)
 call s02(sin)
-!ERROR: Actual procedure argument has an implicit interface which is not 
known to be compatible with dummy argument 'p=' which has an explcit interface
+!ERROR: Actual procedure argument has an implicit interface which is not 
known to be compatible with dummy argument 'p=' which has an explicit interface
 call s02(extfunc)
-!ERROR: Actual procedure argument has an implicit interface which is not 
known to be compatible with dummy argument 'p=' which has an explcit interface
+!ERROR: Actual procedure argument has an implicit interface which is not 
known to be compatible with dummy argument 'p=' which has an explicit interface
 call s03(extfuncPtr)
   end subroutine
 



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[llvm-branch-commits] [llvm] 4846f6a - [X86][AVX] combineTargetShuffle - simplify the X86ISD::VPERM2X128 subvector matching

[Simon Pilgrim via llvm-branch-commits]

Author: Simon Pilgrim
Date: 2021-01-22T15:47:22Z
New Revision: 4846f6ab815c34f6ffbc8d4ecde891d917bf2157

URL: 
https://github.com/llvm/llvm-project/commit/4846f6ab815c34f6ffbc8d4ecde891d917bf2157
DIFF: 
https://github.com/llvm/llvm-project/commit/4846f6ab815c34f6ffbc8d4ecde891d917bf2157.diff

LOG: [X86][AVX] combineTargetShuffle - simplify the X86ISD::VPERM2X128 
subvector matching

Simplify vperm2x128(concat(X,Y),concat(Z,W)) folding.

Use collectConcatOps / ISD::INSERT_SUBVECTOR to find the source subvectors 
instead of hardcoded immediate matching.

Added: 


Modified: 
llvm/lib/Target/X86/X86ISelLowering.cpp

Removed: 




diff  --git a/llvm/lib/Target/X86/X86ISelLowering.cpp 
b/llvm/lib/Target/X86/X86ISelLowering.cpp
index a293c48a824a..577745c42d81 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -37324,41 +37324,33 @@ static SDValue combineTargetShuffle(SDValue N, 
SelectionDAG &DAG,
 if (SDValue Res = canonicalizeLaneShuffleWithRepeatedOps(N, DAG, DL))
 return Res;
 
-// If both 128-bit values were inserted into high halves of 256-bit values,
-// the shuffle can be reduced to a concatenation of subvectors:
-// vperm2x128 (ins ?, X, C1), (ins ?, Y, C2), 0x31 --> concat X, Y
-// Note: We are only looking for the exact high/high shuffle mask because 
we
-//   expect to fold other similar patterns before creating this opcode.
-SDValue Ins0 = peekThroughBitcasts(N.getOperand(0));
-SDValue Ins1 = peekThroughBitcasts(N.getOperand(1));
+// Combine vperm2x128 subvector shuffle with an inner concat pattern.
+// vperm2x128(concat(X,Y),concat(Z,W)) --> concat X,Y etc.
+auto FindSubVector128 = [&](unsigned Idx) {
+  if (Idx > 3)
+return SDValue();
+  SDValue Src = peekThroughBitcasts(N.getOperand(Idx < 2 ? 0 : 1));
+  SmallVector SubOps;
+  if (collectConcatOps(Src.getNode(), SubOps) && SubOps.size() == 2)
+return SubOps[Idx & 1];
+  unsigned NumElts = Src.getValueType().getVectorNumElements();
+  if ((Idx & 1) == 1 && Src.getOpcode() == ISD::INSERT_SUBVECTOR &&
+  Src.getOperand(1).getValueSizeInBits() == 128 &&
+  Src.getConstantOperandAPInt(2) == (NumElts / 2)) {
+return Src.getOperand(1);
+  }
+  return SDValue();
+};
 unsigned Imm = N.getConstantOperandVal(2);
-
-// Handle subvector splat by tweaking values to match binary concat.
-// vperm2x128 (ins ?, X, C1), undef, 0x11 ->
-// vperm2x128 (ins ?, X, C1), (ins ?, X, C1), 0x31 -> concat X, X
-if (Imm == 0x11 && Ins1.isUndef()) {
-  Imm = 0x31;
-  Ins1 = Ins0;
+if (SDValue SubLo = FindSubVector128(Imm & 0x0F)) {
+  if (SDValue SubHi = FindSubVector128((Imm & 0xF0) >> 4)) {
+MVT SubVT = VT.getHalfNumVectorElementsVT();
+SubLo = DAG.getBitcast(SubVT, SubLo);
+SubHi = DAG.getBitcast(SubVT, SubHi);
+return DAG.getNode(ISD::CONCAT_VECTORS, DL, VT, SubLo, SubHi);
+  }
 }
-
-if (!(Imm == 0x31 &&
-  Ins0.getOpcode() == ISD::INSERT_SUBVECTOR &&
-  Ins1.getOpcode() == ISD::INSERT_SUBVECTOR &&
-  Ins0.getValueType() == Ins1.getValueType()))
-  return SDValue();
-
-SDValue X = Ins0.getOperand(1);
-SDValue Y = Ins1.getOperand(1);
-unsigned C1 = Ins0.getConstantOperandVal(2);
-unsigned C2 = Ins1.getConstantOperandVal(2);
-MVT SrcVT = X.getSimpleValueType();
-unsigned SrcElts = SrcVT.getVectorNumElements();
-if (SrcVT != Y.getSimpleValueType() || SrcVT.getSizeInBits() != 128 ||
-C1 != SrcElts || C2 != SrcElts)
-  return SDValue();
-
-return DAG.getBitcast(VT, DAG.getNode(ISD::CONCAT_VECTORS, DL,
-  Ins1.getValueType(), X, Y));
+return SDValue();
   }
   case X86ISD::PSHUFD:
   case X86ISD::PSHUFLW:



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[llvm-branch-commits] [llvm] c33d36e - [X86][AVX] canonicalizeLaneShuffleWithRepeatedOps - handle unary vperm2x128(permute/shift(x, c), undef) cases

[Simon Pilgrim via llvm-branch-commits]

Author: Simon Pilgrim
Date: 2021-01-22T15:47:23Z
New Revision: c33d36e0667e7fff186243ac7a3a9cd63e797438

URL: 
https://github.com/llvm/llvm-project/commit/c33d36e0667e7fff186243ac7a3a9cd63e797438
DIFF: 
https://github.com/llvm/llvm-project/commit/c33d36e0667e7fff186243ac7a3a9cd63e797438.diff

LOG: [X86][AVX] canonicalizeLaneShuffleWithRepeatedOps - handle unary 
vperm2x128(permute/shift(x,c),undef) cases

Fold vperm2x128(permute/shift(x,c),undef) -> 
permute/shift(vperm2x128(x,undef),c)

Added: 


Modified: 
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/avx-splat.ll
llvm/test/CodeGen/X86/extract-concat.ll
llvm/test/CodeGen/X86/haddsub-4.ll
llvm/test/CodeGen/X86/known-signbits-vector.ll
llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll
llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll
llvm/test/CodeGen/X86/vector-shuffle-combining.ll

Removed: 




diff  --git a/llvm/lib/Target/X86/X86ISelLowering.cpp 
b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 577745c42d81..90ed8c920565 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -36918,19 +36918,21 @@ static SDValue 
canonicalizeLaneShuffleWithRepeatedOps(SDValue V,
   EVT SrcVT0 = Src0.getValueType();
   EVT SrcVT1 = Src1.getValueType();
 
-  // TODO: Under what circumstances should we push perm2f128 up when we have 
one
-  // active src?
-  if (SrcOpc0 != SrcOpc1 || SrcVT0 != SrcVT1)
+  if (!Src1.isUndef() && (SrcVT0 != SrcVT1 || SrcOpc0 != SrcOpc1))
 return SDValue();
 
   switch (SrcOpc0) {
   case X86ISD::VSHLI:
   case X86ISD::VSRLI:
   case X86ISD::VSRAI:
-if (Src0.getOperand(1) == Src1.getOperand(1)) {
-  SDValue Res = DAG.getNode(
-  X86ISD::VPERM2X128, DL, VT, DAG.getBitcast(VT, Src0.getOperand(0)),
-  DAG.getBitcast(VT, Src1.getOperand(0)), V.getOperand(2));
+  case X86ISD::PSHUFD:
+  case X86ISD::VPERMILPI:
+if (Src1.isUndef() || Src0.getOperand(1) == Src1.getOperand(1)) {
+  SDValue LHS = DAG.getBitcast(VT, Src0.getOperand(0));
+  SDValue RHS =
+  DAG.getBitcast(VT, Src1.isUndef() ? Src1 : Src1.getOperand(0));
+  SDValue Res =
+  DAG.getNode(X86ISD::VPERM2X128, DL, VT, LHS, RHS, V.getOperand(2));
   Res = DAG.getNode(SrcOpc0, DL, SrcVT0, DAG.getBitcast(SrcVT0, Res),
 Src0.getOperand(1));
   return DAG.getBitcast(VT, Res);

diff  --git a/llvm/test/CodeGen/X86/avx-splat.ll 
b/llvm/test/CodeGen/X86/avx-splat.ll
index 3755cf4740ab..7602975c8872 100644
--- a/llvm/test/CodeGen/X86/avx-splat.ll
+++ b/llvm/test/CodeGen/X86/avx-splat.ll
@@ -157,8 +157,8 @@ entry:
 define <8 x float> @funcH(<8 x float> %a) nounwind uwtable readnone ssp {
 ; CHECK-LABEL: funcH:
 ; CHECK:   # %bb.0: # %entry
-; CHECK-NEXT:vpermilps {{.*#+}} ymm0 = ymm0[1,1,1,1,5,5,5,5]
 ; CHECK-NEXT:vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,2,3]
+; CHECK-NEXT:vpermilps {{.*#+}} ymm0 = ymm0[1,1,1,1,5,5,5,5]
 ; CHECK-NEXT:ret{{[l|q]}}
 entry:
   %shuffle = shufflevector <8 x float> %a, <8 x float> undef, <8 x i32> 

diff  --git a/llvm/test/CodeGen/X86/extract-concat.ll 
b/llvm/test/CodeGen/X86/extract-concat.ll
index 26e07d86bfc3..49ac851d88fc 100644
--- a/llvm/test/CodeGen/X86/extract-concat.ll
+++ b/llvm/test/CodeGen/X86/extract-concat.ll
@@ -70,12 +70,12 @@ define <16 x i64> @catcat(<4 x i64> %x) {
 ; AVX1:   # %bb.0:
 ; AVX1-NEXT:vmovddup {{.*#+}} ymm1 = ymm0[0,0,2,2]
 ; AVX1-NEXT:vperm2f128 {{.*#+}} ymm2 = ymm1[2,3,2,3]
-; AVX1-NEXT:vpermilpd {{.*#+}} ymm1 = ymm0[1,1,3,3]
-; AVX1-NEXT:vperm2f128 {{.*#+}} ymm3 = ymm1[2,3,2,3]
 ; AVX1-NEXT:vpermilps {{.*#+}} xmm1 = xmm0[0,1,0,1]
 ; AVX1-NEXT:vinsertf128 $1, %xmm1, %ymm1, %ymm4
-; AVX1-NEXT:vpermilps {{.*#+}} xmm0 = xmm0[2,3,2,3]
-; AVX1-NEXT:vinsertf128 $1, %xmm0, %ymm0, %ymm1
+; AVX1-NEXT:vpermilps {{.*#+}} xmm1 = xmm0[2,3,2,3]
+; AVX1-NEXT:vinsertf128 $1, %xmm1, %ymm1, %ymm1
+; AVX1-NEXT:vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,2,3]
+; AVX1-NEXT:vpermilpd {{.*#+}} ymm3 = ymm0[1,1,3,3]
 ; AVX1-NEXT:vmovaps %ymm4, %ymm0
 ; AVX1-NEXT:retq
 ;

diff  --git a/llvm/test/CodeGen/X86/haddsub-4.ll 
b/llvm/test/CodeGen/X86/haddsub-4.ll
index 6003f98b9371..2e077d6247ba 100644
--- a/llvm/test/CodeGen/X86/haddsub-4.ll
+++ b/llvm/test/CodeGen/X86/haddsub-4.ll
@@ -65,8 +65,8 @@ define <8 x float> @hadd_reverse_v8f32(<8 x float> %a0, <8 x 
float> %a1) {
 ; AVX1-LABEL: hadd_reverse_v8f32:
 ; AVX1:   # %bb.0:
 ; AVX1-NEXT:vhaddps %ymm1, %ymm0, %ymm0
-; AVX1-NEXT:vpermilps {{.*#+}} ymm0 = ymm0[1,0,3,2,5,4,7,6]
 ; AVX1-NEXT:vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,0,1]
+; AVX1-NEXT:vpermilps {{.*#+}} ymm0 = ymm0[1,0,3,2,5,4,7,6]
 ; AVX1-NEXT:retq
 ;
 ; AVX2-LABEL: hadd_reverse_v8f32:
@@ -97,10 +97,10 @@ define <8 x float> @hadd_reverse2_v8f32(<8 x float> %a0, <8 
x float> %a1) {
 ;
 ; AVX1-LABEL: hadd_rev

[llvm-branch-commits] [llvm] bd122f6 - [X86][AVX] canonicalizeLaneShuffleWithRepeatedOps - handle vperm2x128(movddup(x), movddup(y)) cases

[Simon Pilgrim via llvm-branch-commits]

Author: Simon Pilgrim
Date: 2021-01-22T16:05:19Z
New Revision: bd122f6d217862b4631ac118c58f62a7dec16a02

URL: 
https://github.com/llvm/llvm-project/commit/bd122f6d217862b4631ac118c58f62a7dec16a02
DIFF: 
https://github.com/llvm/llvm-project/commit/bd122f6d217862b4631ac118c58f62a7dec16a02.diff

LOG: [X86][AVX] canonicalizeLaneShuffleWithRepeatedOps - handle 
vperm2x128(movddup(x),movddup(y)) cases

Fold vperm2x128(movddup(x),movddup(y)) -> movddup(vperm2x128(x,y))

Added: 


Modified: 
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/extract-concat.ll
llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll

Removed: 




diff  --git a/llvm/lib/Target/X86/X86ISelLowering.cpp 
b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 90ed8c920565..70203dacef09 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -36922,6 +36922,15 @@ static SDValue 
canonicalizeLaneShuffleWithRepeatedOps(SDValue V,
 return SDValue();
 
   switch (SrcOpc0) {
+  case X86ISD::MOVDDUP: {
+SDValue LHS = DAG.getBitcast(VT, Src0.getOperand(0));
+SDValue RHS =
+DAG.getBitcast(VT, Src1.isUndef() ? Src1 : Src1.getOperand(0));
+SDValue Res =
+DAG.getNode(X86ISD::VPERM2X128, DL, VT, LHS, RHS, V.getOperand(2));
+Res = DAG.getNode(SrcOpc0, DL, SrcVT0, DAG.getBitcast(SrcVT0, Res));
+return DAG.getBitcast(VT, Res);
+  }
   case X86ISD::VSHLI:
   case X86ISD::VSRLI:
   case X86ISD::VSRAI:

diff  --git a/llvm/test/CodeGen/X86/extract-concat.ll 
b/llvm/test/CodeGen/X86/extract-concat.ll
index 49ac851d88fc..f979f23f82f8 100644
--- a/llvm/test/CodeGen/X86/extract-concat.ll
+++ b/llvm/test/CodeGen/X86/extract-concat.ll
@@ -68,13 +68,12 @@ define <16 x i64> @catcat(<4 x i64> %x) {
 ;
 ; AVX1-LABEL: catcat:
 ; AVX1:   # %bb.0:
-; AVX1-NEXT:vmovddup {{.*#+}} ymm1 = ymm0[0,0,2,2]
-; AVX1-NEXT:vperm2f128 {{.*#+}} ymm2 = ymm1[2,3,2,3]
 ; AVX1-NEXT:vpermilps {{.*#+}} xmm1 = xmm0[0,1,0,1]
 ; AVX1-NEXT:vinsertf128 $1, %xmm1, %ymm1, %ymm4
 ; AVX1-NEXT:vpermilps {{.*#+}} xmm1 = xmm0[2,3,2,3]
 ; AVX1-NEXT:vinsertf128 $1, %xmm1, %ymm1, %ymm1
 ; AVX1-NEXT:vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,2,3]
+; AVX1-NEXT:vmovddup {{.*#+}} ymm2 = ymm0[0,0,2,2]
 ; AVX1-NEXT:vpermilpd {{.*#+}} ymm3 = ymm0[1,1,3,3]
 ; AVX1-NEXT:vmovaps %ymm4, %ymm0
 ; AVX1-NEXT:retq

diff  --git a/llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll 
b/llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll
index 38600884262c..80acaef8a0a0 100644
--- a/llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll
+++ b/llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll
@@ -109,8 +109,8 @@ define <4 x double> @shuffle_v4f64_1000(<4 x double> %a, <4 
x double> %b) {
 define <4 x double> @shuffle_v4f64_2200(<4 x double> %a, <4 x double> %b) {
 ; AVX1-LABEL: shuffle_v4f64_2200:
 ; AVX1:   # %bb.0:
-; AVX1-NEXT:vmovddup {{.*#+}} ymm0 = ymm0[0,0,2,2]
 ; AVX1-NEXT:vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,0,1]
+; AVX1-NEXT:vmovddup {{.*#+}} ymm0 = ymm0[0,0,2,2]
 ; AVX1-NEXT:retq
 ;
 ; AVX2-LABEL: shuffle_v4f64_2200:
@@ -129,8 +129,8 @@ define <4 x double> @shuffle_v4f64_2200(<4 x double> %a, <4 
x double> %b) {
 define <4 x double> @shuffle_v4f64_(<4 x double> %a, <4 x double> %b) {
 ; AVX1-LABEL: shuffle_v4f64_:
 ; AVX1:   # %bb.0:
-; AVX1-NEXT:vmovddup {{.*#+}} ymm0 = ymm0[0,0,2,2]
 ; AVX1-NEXT:vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,2,3]
+; AVX1-NEXT:vmovddup {{.*#+}} ymm0 = ymm0[0,0,2,2]
 ; AVX1-NEXT:retq
 ;
 ; AVX2-LABEL: shuffle_v4f64_:
@@ -149,8 +149,8 @@ define <4 x double> @shuffle_v4f64_(<4 x double> %a, <4 
x double> %b) {
 define <4 x double> @shuffle_v4f64__bc(<4 x i64> %a, <4 x i64> %b) {
 ; AVX1-LABEL: shuffle_v4f64__bc:
 ; AVX1:   # %bb.0:
-; AVX1-NEXT:vmovddup {{.*#+}} ymm0 = ymm0[0,0,2,2]
 ; AVX1-NEXT:vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,2,3]
+; AVX1-NEXT:vmovddup {{.*#+}} ymm0 = ymm0[0,0,2,2]
 ; AVX1-NEXT:retq
 ;
 ; AVX2-LABEL: shuffle_v4f64__bc:
@@ -856,8 +856,8 @@ define <4 x i64> @shuffle_v4i64_1000(<4 x i64> %a, <4 x 
i64> %b) {
 define <4 x i64> @shuffle_v4i64_2200(<4 x i64> %a, <4 x i64> %b) {
 ; AVX1-LABEL: shuffle_v4i64_2200:
 ; AVX1:   # %bb.0:
-; AVX1-NEXT:vmovddup {{.*#+}} ymm0 = ymm0[0,0,2,2]
 ; AVX1-NEXT:vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,0,1]
+; AVX1-NEXT:vmovddup {{.*#+}} ymm0 = ymm0[0,0,2,2]
 ; AVX1-NEXT:retq
 ;
 ; AVX2-LABEL: shuffle_v4i64_2200:



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[llvm-branch-commits] [llvm] 06f8a49 - [SystemZ][z/OS] Fix No such file or directory expression error

[Abhina Sreeskantharajan via llvm-branch-commits]

Author: Abhina Sreeskantharajan
Date: 2021-01-22T11:41:40-05:00
New Revision: 06f8a49693957bc27b83e0ab5f429ff874941a07

URL: 
https://github.com/llvm/llvm-project/commit/06f8a49693957bc27b83e0ab5f429ff874941a07
DIFF: 
https://github.com/llvm/llvm-project/commit/06f8a49693957bc27b83e0ab5f429ff874941a07.diff

LOG: [SystemZ][z/OS] Fix No such file or directory expression error

On z/OS, the following error message is not matched correctly in lit tests. 
This patch updates the CHECK expression to match the end period successfully.
```
EDC5129I No such file or directory.
```

Differential Revision: https://reviews.llvm.org/D94239

Added: 


Modified: 
llvm/test/tools/llvm-libtool-darwin/filelist.test

Removed: 




diff  --git a/llvm/test/tools/llvm-libtool-darwin/filelist.test 
b/llvm/test/tools/llvm-libtool-darwin/filelist.test
index bb606f0585fa..a8d8dac95a49 100644
--- a/llvm/test/tools/llvm-libtool-darwin/filelist.test
+++ b/llvm/test/tools/llvm-libtool-darwin/filelist.test
@@ -65,13 +65,13 @@
 # RUN: not llvm-libtool-darwin -static -o %t.lib -filelist %t.invalid-list.txt 
2>&1 | \
 # RUN:   FileCheck %s --check-prefix=FILE-ERROR -DFILE=no-such-file
 
-# FILE-ERROR: error: '[[FILE]]': {{[nN]}}o such file or directory
+# FILE-ERROR: error: '[[FILE]]': {{.*}}{{[nN]}}o such file or directory
 
 ## Check that an error is thrown when the directory exists but does not 
contain the requested file:
 # RUN: not llvm-libtool-darwin -static -o %t.lib -filelist 
%t.invalid-list.txt,%t/dirname 2>&1 | \
 # RUN:   FileCheck %s --check-prefix=DIR-ERROR -DDIR=%t/dirname 
-DFILE=no-such-file
 
-# DIR-ERROR: error: '[[DIR]]{{[/\\]}}[[FILE]]': {{[nN]}}o such file or 
directory
+# DIR-ERROR: error: '[[DIR]]{{[/\\]}}[[FILE]]': {{.*}}{{[nN]}}o such file or 
directory
 
 ## Check that an error is thrown when a file is in the cwd but dirname is 
specified:
 # RUN: yaml2obj %S/Inputs/input2.yaml -o %basename_t.tmp-input2.o



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[llvm-branch-commits] [clang] 622eaa4 - [HIP] Support __managed__ attribute

[Yaxun Liu via llvm-branch-commits]

Author: Yaxun (Sam) Liu
Date: 2021-01-22T11:43:58-05:00
New Revision: 622eaa4a4cea17c2cec6942d9702b010deae392b

URL: 
https://github.com/llvm/llvm-project/commit/622eaa4a4cea17c2cec6942d9702b010deae392b
DIFF: 
https://github.com/llvm/llvm-project/commit/622eaa4a4cea17c2cec6942d9702b010deae392b.diff

LOG: [HIP] Support __managed__ attribute

This patch implements codegen for __managed__ variable attribute for HIP.

Diagnostics will be added later.

Differential Revision: https://reviews.llvm.org/D94814

Added: 
clang/test/AST/Inputs/cuda.h
clang/test/AST/ast-dump-managed-var.cu
clang/test/CodeGenCUDA/managed-var.cu
clang/test/SemaCUDA/managed-var.cu
llvm/include/llvm/IR/ReplaceConstant.h
llvm/lib/IR/ReplaceConstant.cpp

Modified: 
clang/include/clang/Basic/Attr.td
clang/include/clang/Basic/AttrDocs.td
clang/include/clang/Basic/DiagnosticSemaKinds.td
clang/lib/CodeGen/CGCUDANV.cpp
clang/lib/CodeGen/CGCUDARuntime.h
clang/lib/CodeGen/CodeGenModule.cpp
clang/lib/Sema/SemaDeclAttr.cpp
clang/test/CodeGenCUDA/Inputs/cuda.h
clang/test/Misc/pragma-attribute-supported-attributes-list.test
clang/test/SemaCUDA/Inputs/cuda.h
clang/test/SemaCUDA/bad-attributes.cu
clang/test/SemaCUDA/device-var-init.cu
clang/test/SemaCUDA/function-overload.cu
clang/test/SemaCUDA/union-init.cu
llvm/lib/IR/CMakeLists.txt
llvm/lib/Target/XCore/XCoreLowerThreadLocal.cpp

Removed: 




diff  --git a/clang/include/clang/Basic/Attr.td 
b/clang/include/clang/Basic/Attr.td
index b30b91d3d4a6..bfd50f6a6779 100644
--- a/clang/include/clang/Basic/Attr.td
+++ b/clang/include/clang/Basic/Attr.td
@@ -324,6 +324,7 @@ class LangOpt {
 def MicrosoftExt : LangOpt<"MicrosoftExt">;
 def Borland : LangOpt<"Borland">;
 def CUDA : LangOpt<"CUDA">;
+def HIP : LangOpt<"HIP">;
 def SYCL : LangOpt<"SYCLIsDevice">;
 def COnly : LangOpt<"", "!LangOpts.CPlusPlus">;
 def CPlusPlus : LangOpt<"CPlusPlus">;
@@ -1115,6 +1116,13 @@ def CUDAHost : InheritableAttr {
   let Documentation = [Undocumented];
 }
 
+def HIPManaged : InheritableAttr {
+  let Spellings = [GNU<"managed">, Declspec<"__managed__">];
+  let Subjects = SubjectList<[Var]>;
+  let LangOpts = [HIP];
+  let Documentation = [HIPManagedAttrDocs];
+}
+
 def CUDAInvalidTarget : InheritableAttr {
   let Spellings = [];
   let Subjects = SubjectList<[Function]>;

diff  --git a/clang/include/clang/Basic/AttrDocs.td 
b/clang/include/clang/Basic/AttrDocs.td
index fffede41db1e..170a0fe3d4c4 100644
--- a/clang/include/clang/Basic/AttrDocs.td
+++ b/clang/include/clang/Basic/AttrDocs.td
@@ -5419,6 +5419,17 @@ unbind runtime APIs.
   }];
 }
 
+def HIPManagedAttrDocs : Documentation {
+  let Category = DocCatDecl;
+  let Content = [{
+The ``__managed__`` attribute can be applied to a global variable declaration 
in HIP.
+A managed variable is emitted as an undefined global symbol in the device 
binary and is
+registered by ``__hipRegisterManagedVariable`` in init functions. The HIP 
runtime allocates
+managed memory and uses it to define the symbol when loading the device binary.
+A managed variable can be accessed in both device and host code.
+  }];
+}
+
 def LifetimeOwnerDocs : Documentation {
   let Category = DocCatDecl;
   let Content = [{

diff  --git a/clang/include/clang/Basic/DiagnosticSemaKinds.td 
b/clang/include/clang/Basic/DiagnosticSemaKinds.td
index 758b2ed3e90b..67c59f3ca09a 100644
--- a/clang/include/clang/Basic/DiagnosticSemaKinds.td
+++ b/clang/include/clang/Basic/DiagnosticSemaKinds.td
@@ -8237,7 +8237,7 @@ def err_cuda_device_exceptions : Error<
   "%select{__device__|__global__|__host__|__host__ __device__}1 function">;
 def err_dynamic_var_init : Error<
 "dynamic initialization is not supported for "
-"__device__, __constant__, and __shared__ variables.">;
+"__device__, __constant__, __shared__, and __managed__ variables.">;
 def err_shared_var_init : Error<
 "initialization is not supported for __shared__ variables.">;
 def err_cuda_vla : Error<
@@ -8247,7 +8247,8 @@ def err_cuda_extern_shared : Error<"__shared__ variable 
%0 cannot be 'extern'">;
 def err_cuda_host_shared : Error<
 "__shared__ local variables not allowed in "
 "%select{__device__|__global__|__host__|__host__ __device__}0 functions">;
-def err_cuda_nonstatic_constdev: Error<"__constant__ and __device__ are not 
allowed on non-static local variables">;
+def err_cuda_nonstatic_constdev: Error<"__constant__, __device__, and "
+"__managed__ are not allowed on non-static local variables">;
 def err_cuda_ovl_target : Error<
   "%select{__device__|__global__|__host__|__host__ __device__}0 function %1 "
   "cannot overload %select{__device__|__global__|__host__|__host__ 
__device__}2 function %3">;

diff  --git a/clang/lib/CodeGen/CGCUDANV.cpp b/clang/lib/CodeGen/CGCUDANV.cpp
index 7c5ab39a85ec..33a2d6f4483e 100644
--- a/clang/lib/CodeGen/CGCUD

[llvm-branch-commits] [mlir] 14056df - [MLIR] Add support for extracting an integer sample point (if one exists) from an unbounded FlatAffineConstraints.

[Arjun P via llvm-branch-commits]

Author: Arjun P
Date: 2021-01-22T22:28:38+05:30
New Revision: 14056dfb4dc7b289fbd12c3bc82f68485bf9377c

URL: 
https://github.com/llvm/llvm-project/commit/14056dfb4dc7b289fbd12c3bc82f68485bf9377c
DIFF: 
https://github.com/llvm/llvm-project/commit/14056dfb4dc7b289fbd12c3bc82f68485bf9377c.diff

LOG: [MLIR] Add support for extracting an integer sample point (if one exists) 
from an unbounded FlatAffineConstraints.

With this, we have complete support for finding integer sample points in 
FlatAffineConstraints.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D95047

Added: 


Modified: 
mlir/include/mlir/Analysis/AffineStructures.h
mlir/include/mlir/Analysis/LinearTransform.h
mlir/include/mlir/Analysis/Presburger/Simplex.h
mlir/lib/Analysis/AffineStructures.cpp
mlir/lib/Analysis/LinearTransform.cpp
mlir/lib/Analysis/Presburger/Simplex.cpp
mlir/unittests/Analysis/AffineStructuresTest.cpp
mlir/unittests/Analysis/LinearTransformTest.cpp

Removed: 




diff  --git a/mlir/include/mlir/Analysis/AffineStructures.h 
b/mlir/include/mlir/Analysis/AffineStructures.h
index fa80db7d4b63..fa42db500684 100644
--- a/mlir/include/mlir/Analysis/AffineStructures.h
+++ b/mlir/include/mlir/Analysis/AffineStructures.h
@@ -147,11 +147,8 @@ class FlatAffineConstraints {
   /// returns true, no integer solution to the equality constraints can exist.
   bool isEmptyByGCDTest() const;
 
-  /// Runs the GCD test heuristic. If it proves inconclusive, falls back to
-  /// generalized basis reduction if the set is bounded.
-  ///
   /// Returns true if the set of constraints is found to have no solution,
-  /// false if a solution exists or all tests were inconclusive.
+  /// false if a solution exists. Uses the same algorithm as findIntegerSample.
   bool isIntegerEmpty() const;
 
   // Returns a matrix where each row is a vector along which the polytope is
@@ -160,11 +157,12 @@ class FlatAffineConstraints {
   // independent. This function should not be called on empty sets.
   Matrix getBoundedDirections() const;
 
-  /// Find a sample point satisfying the constraints. This uses a branch and
-  /// bound algorithm with generalized basis reduction, which always works if
-  /// the set is bounded. This should not be called for unbounded sets.
+  /// Find an integer sample point satisfying the constraints using a
+  /// branch and bound algorithm with generalized basis reduction, with some
+  /// additional processing using Simplex for unbounded sets.
   ///
-  /// Returns such a point if one exists, or an empty Optional otherwise.
+  /// Returns an integer sample point if one exists, or an empty Optional
+  /// otherwise.
   Optional> findIntegerSample() const;
 
   /// Returns true if the given point satisfies the constraints, or false
@@ -387,8 +385,9 @@ class FlatAffineConstraints {
   /// Changes all symbol identifiers which are loop IVs to dim identifiers.
   void convertLoopIVSymbolsToDims();
 
-  /// Sets the specified identifier to a constant and removes it.
-  void setAndEliminate(unsigned pos, int64_t constVal);
+  /// Sets the values.size() identifiers starting at pos to the specified 
values
+  /// and removes them.
+  void setAndEliminate(unsigned pos, ArrayRef values);
 
   /// Tries to fold the specified identifier to a constant using a trivial
   /// equality detection; if successful, the constant is substituted for the

diff  --git a/mlir/include/mlir/Analysis/LinearTransform.h 
b/mlir/include/mlir/Analysis/LinearTransform.h
index 0850f5a00609..2f3aaf800ab0 100644
--- a/mlir/include/mlir/Analysis/LinearTransform.h
+++ b/mlir/include/mlir/Analysis/LinearTransform.h
@@ -35,10 +35,15 @@ class LinearTransform {
 
   // Returns a FlatAffineConstraints having a constraint vector vT for every
   // constraint vector v in fac, where T is this transform.
-  FlatAffineConstraints applyTo(const FlatAffineConstraints &fac);
+  FlatAffineConstraints applyTo(const FlatAffineConstraints &fac) const;
 
-  // Post-multiply the given vector v with this transform, say T, returning vT.
-  SmallVector applyTo(ArrayRef v);
+  // The given vector is interpreted as a row vector v. Post-multiply v with
+  // this transform, say T, and return vT.
+  SmallVector postMultiplyRow(ArrayRef rowVec) const;
+
+  // The given vector is interpreted as a column vector v. Pre-multiply v with
+  // this transform, say T, and return Tv.
+  SmallVector preMultiplyColumn(ArrayRef colVec) const;
 
 private:
   Matrix matrix;

diff  --git a/mlir/include/mlir/Analysis/Presburger/Simplex.h 
b/mlir/include/mlir/Analysis/Presburger/Simplex.h
index 370035cbc7ba..d64b86d11dec 100644
--- a/mlir/include/mlir/Analysis/Presburger/Simplex.h
+++ b/mlir/include/mlir/Analysis/Presburger/Simplex.h
@@ -218,7 +218,11 @@ class Simplex {
   /// tableau A and one in B.
   static Simplex makeProduct(const Simplex &a, const Simplex &b);
 
-  /// R

[llvm-branch-commits] [mlir] 1b535df - [mlir][StandardOps] Fix typos in the td file.

[Hanhan Wang via llvm-branch-commits]

Author: Hanhan Wang
Date: 2021-01-22T09:03:16-08:00
New Revision: 1b535df1ccd5b1627be7cedc2503642a71ca59ab

URL: 
https://github.com/llvm/llvm-project/commit/1b535df1ccd5b1627be7cedc2503642a71ca59ab
DIFF: 
https://github.com/llvm/llvm-project/commit/1b535df1ccd5b1627be7cedc2503642a71ca59ab.diff

LOG: [mlir][StandardOps] Fix typos in the td file.

- Fix arguments name for subview and subtensor.
- Fix a typo in a comment of subtensor's method.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D95211

Added: 


Modified: 
mlir/include/mlir/Dialect/StandardOps/IR/Ops.td

Removed: 




diff  --git a/mlir/include/mlir/Dialect/StandardOps/IR/Ops.td 
b/mlir/include/mlir/Dialect/StandardOps/IR/Ops.td
index 5987640a429d..ce1907cb6435 100644
--- a/mlir/include/mlir/Dialect/StandardOps/IR/Ops.td
+++ b/mlir/include/mlir/Dialect/StandardOps/IR/Ops.td
@@ -2795,7 +2795,7 @@ def SubViewOp : BaseOpWithOffsetSizesAndStrides<
 
 The SubView operation supports the following arguments:
 
-* semref: the "base" memref on which to create a "view" memref.
+* source: the "base" memref on which to create a "view" memref.
 * offsets: memref-rank number of offsets into the "base" memref at which to
create the "view" memref.
 * sizes: memref-rank number of sizes which specify the sizes of the result
@@ -2995,7 +2995,7 @@ def SubTensorOp : BaseOpWithOffsetSizesAndStrides<
 
 The subtensor operation supports the following arguments:
 
-* tensor: the "base" tensor from which to extract a subtensor.
+* source: the "base" tensor from which to extract a subtensor.
 * offsets: tensor-rank number of offsets into the "base" tensor from which
to extract the subtensor.
 * sizes: tensor-rank number of sizes which specify the sizes of the result
@@ -3072,9 +3072,9 @@ def SubTensorOp : BaseOpWithOffsetSizesAndStrides<
   return getResult().getType().cast();
 }
 
-/// A subview result type can be fully inferred from the source type and 
the
-/// static representation of offsets, sizes and strides. Special sentinels
-/// encode the dynamic case.
+/// A subtensor result type can be fully inferred from the source type and
+/// the static representation of offsets, sizes and strides. Special
+/// sentinels encode the dynamic case.
 static Type inferResultType(RankedTensorType sourceRankedTensorType,
 ArrayRef staticOffsets,
 ArrayRef staticSizes,



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[llvm-branch-commits] [lld] d24b94f - [ELF] --wrap: retain __wrap_foo if foo is defined in an object/bitcode file

[Fangrui Song via llvm-branch-commits]

Author: Fangrui Song
Date: 2021-01-22T09:20:29-08:00
New Revision: d24b94f070ff4e6621b66d5df4b3a15a693d52bf

URL: 
https://github.com/llvm/llvm-project/commit/d24b94f070ff4e6621b66d5df4b3a15a693d52bf
DIFF: 
https://github.com/llvm/llvm-project/commit/d24b94f070ff4e6621b66d5df4b3a15a693d52bf.diff

LOG: [ELF] --wrap: retain __wrap_foo if foo is defined in an object/bitcode file

If foo is referenced in any object file, bitcode file or shared object,
`__wrap_foo` should be retained as the redirection target of sym
(f96ff3c0f8ebd941b3f6b345164c3d858b781484).

If the object file defining foo has foo references, we cannot easily distinguish
the case from cases where foo is not referenced (we haven't scanned
relocations). Retain `__wrap_foo` because we choose to wrap sym references
regardless of whether sym is defined to keep non-LTO/LTO/relocatable links' 
behaviors similar
https://sourceware.org/bugzilla/show_bug.cgi?id=26358 .

If foo is defined in a shared object, `__wrap_foo` can still be omitted
(`wrap-dynamic-undef.s`).

Reviewed By: andrewng

Differential Revision: https://reviews.llvm.org/D95152

Added: 
lld/test/ELF/lto/wrap-defined.ll
lld/test/ELF/wrap-defined.s

Modified: 
lld/ELF/Driver.cpp
lld/ELF/Options.td
lld/docs/ld.lld.1
lld/test/ELF/wrap-shlib-undefined.s

Removed: 




diff  --git a/lld/ELF/Driver.cpp b/lld/ELF/Driver.cpp
index de613b5c9d19..72d245e5dc01 100644
--- a/lld/ELF/Driver.cpp
+++ b/lld/ELF/Driver.cpp
@@ -1922,7 +1922,13 @@ static std::vector 
addWrappedSymbols(opt::InputArgList &args) {
 
 // Tell LTO not to eliminate these symbols.
 sym->isUsedInRegularObj = true;
-if (sym->referenced)
+// If sym is referenced in any object file, bitcode file or shared object,
+// retain wrap which is the redirection target of sym. If the object file
+// defining sym has sym references, we cannot easily distinguish the case
+// from cases where sym is not referenced. Retain wrap because we choose to
+// wrap sym references regardless of whether sym is defined
+// (https://sourceware.org/bugzilla/show_bug.cgi?id=26358).
+if (sym->referenced || sym->isDefined())
   wrap->isUsedInRegularObj = true;
   }
   return v;

diff  --git a/lld/ELF/Options.td b/lld/ELF/Options.td
index f404fdd74385..c50aa84e30e7 100644
--- a/lld/ELF/Options.td
+++ b/lld/ELF/Options.td
@@ -473,8 +473,9 @@ defm whole_archive: B<"whole-archive",
 "Force load of all members in a static library",
 "Do not force load of all members in a static library (default)">;
 
-defm wrap: Eq<"wrap", "Use wrapper functions for symbol">,
-  MetaVarName<"">;
+defm wrap : Eq<"wrap", "Redirect symbol references to __wrap_symbol and "
+   "__real_symbol references to symbol">,
+MetaVarName<"">;
 
 def z: JoinedOrSeparate<["-"], "z">, MetaVarName<"">,
   HelpText<"Linker option extensions">;

diff  --git a/lld/docs/ld.lld.1 b/lld/docs/ld.lld.1
index 1449b02c4906..79a684def275 100644
--- a/lld/docs/ld.lld.1
+++ b/lld/docs/ld.lld.1
@@ -635,7 +635,14 @@ Report unresolved symbols as warnings.
 .It Fl -whole-archive
 Force load of all members in a static library.
 .It Fl -wrap Ns = Ns Ar symbol
-Use wrapper functions for symbol.
+Redirect
+.Ar symbol
+references to
+.Ar __wrap_symbol
+and
+.Ar __real_symbol
+references to
+.Ar symbol.
 .It Fl z Ar option
 Linker option extensions.
 .Bl -tag -width indent -compact

diff  --git a/lld/test/ELF/lto/wrap-defined.ll 
b/lld/test/ELF/lto/wrap-defined.ll
new file mode 100644
index ..8a5abf8c1d85
--- /dev/null
+++ b/lld/test/ELF/lto/wrap-defined.ll
@@ -0,0 +1,21 @@
+; REQUIRES: x86
+;; Similar to ../wrap-defined.s but for LTO.
+
+; RUN: llvm-as %s -o %t.o
+; RUN: ld.lld -shared %t.o -wrap=bar -o %t.so
+; RUN: llvm-objdump -d %t.so | FileCheck %s
+
+; CHECK:  <_start>:
+; CHECK-NEXT:   jmp {{.*}} <__wrap_bar@plt>
+
+target datalayout = 
"e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-linux-gnu"
+
+define void @bar() {
+  ret void
+}
+
+define void @_start() {
+  call void @bar()
+  ret void
+}

diff  --git a/lld/test/ELF/wrap-defined.s b/lld/test/ELF/wrap-defined.s
new file mode 100644
index ..026b52661726
--- /dev/null
+++ b/lld/test/ELF/wrap-defined.s
@@ -0,0 +1,33 @@
+# REQUIRES: x86
+
+# RUN: rm -rf %t && split-file %s %t
+# RUN: llvm-mc -filetype=obj -triple=x86_64 %t/main.s -o %t/main.o
+# RUN: llvm-mc -filetype=obj -triple=x86_64 %t/wrap.s -o %t/wrap.o
+# RUN: ld.lld -shared --soname=fixed %t/wrap.o -o %t/wrap.so
+
+## GNU ld does not wrap a defined symbol in an object file
+## https://sourceware.org/bugzilla/show_bug.cgi?id=26358
+## We choose to wrap defined symbols so that LTO, non-LTO and relocatable links
+## behave the same. The 'call bar' in main.o will reference __wrap_bar. We 
cannot
+## easily distinguish the case from cases w

[llvm-branch-commits] [openmp] edbcc17 - [OpenMP] libomp: properly initialize buckets in __kmp_dephash_extend

[via llvm-branch-commits]

Author: Joseph Schuchart
Date: 2021-01-22T20:29:46+03:00
New Revision: edbcc17b7a0b5a4f20ec55983e172d0120ccbca9

URL: 
https://github.com/llvm/llvm-project/commit/edbcc17b7a0b5a4f20ec55983e172d0120ccbca9
DIFF: 
https://github.com/llvm/llvm-project/commit/edbcc17b7a0b5a4f20ec55983e172d0120ccbca9.diff

LOG: [OpenMP] libomp: properly initialize buckets in __kmp_dephash_extend

The buckets are initialized in __kmp_dephash_create but when they are extended
the memory is allocated but not NULL'd, potentially leaving some buckets
uninitialized after all entries have been copied into the new allocation.
This commit makes sure the buckets are properly initialized with NULL before
copying the entries.

Differential Revision: https://reviews.llvm.org/D95167

Added: 


Modified: 
openmp/runtime/src/kmp_taskdeps.cpp

Removed: 




diff  --git a/openmp/runtime/src/kmp_taskdeps.cpp 
b/openmp/runtime/src/kmp_taskdeps.cpp
index 7a804d1171db..f580431d0182 100644
--- a/openmp/runtime/src/kmp_taskdeps.cpp
+++ b/openmp/runtime/src/kmp_taskdeps.cpp
@@ -86,6 +86,12 @@ static kmp_dephash_t *__kmp_dephash_extend(kmp_info_t 
*thread,
   h->buckets = (kmp_dephash_entry **)(h + 1);
   h->generation = gen;
   h->nconflicts = 0;
+
+  // make sure buckets are properly initialized
+  for (size_t i = 0; i < new_size; i++) {
+h->buckets[i] = NULL;
+  }
+
   // insert existing elements in the new table
   for (size_t i = 0; i < current_dephash->size; i++) {
 kmp_dephash_entry_t *next, *entry;



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[llvm-branch-commits] [libcxx] 03b6dc3 - [libc++] Fix broken build when merging libc++abi into libc++ on Apple

[Louis Dionne via llvm-branch-commits]

Author: Louis Dionne
Date: 2021-01-22T12:39:40-05:00
New Revision: 03b6dc300531434209e65bccebb1a1c21f387e2a

URL: 
https://github.com/llvm/llvm-project/commit/03b6dc300531434209e65bccebb1a1c21f387e2a
DIFF: 
https://github.com/llvm/llvm-project/commit/03b6dc300531434209e65bccebb1a1c21f387e2a.diff

LOG: [libc++] Fix broken build when merging libc++abi into libc++ on Apple

Added: 


Modified: 
libcxx/src/CMakeLists.txt

Removed: 




diff  --git a/libcxx/src/CMakeLists.txt b/libcxx/src/CMakeLists.txt
index 52b68e50dd4e..c482068fa99a 100644
--- a/libcxx/src/CMakeLists.txt
+++ b/libcxx/src/CMakeLists.txt
@@ -213,9 +213,12 @@ if (LIBCXX_ENABLE_SHARED)
   endif()
 
   # Maybe re-export symbols from libc++abi
+  # In particular, we don't re-export the symbols if libc++abi is merged 
statically
+  # into libc++ because in that case there's no dylib to re-export from.
   if (APPLE AND (LIBCXX_CXX_ABI_LIBNAME STREQUAL "libcxxabi" OR
  LIBCXX_CXX_ABI_LIBNAME STREQUAL "default")
-AND NOT DEFINED LIBCXX_OSX_REEXPORT_LIBCXXABI_SYMBOLS)
+AND NOT DEFINED LIBCXX_OSX_REEXPORT_LIBCXXABI_SYMBOLS
+AND NOT LIBCXX_STATICALLY_LINK_ABI_IN_SHARED_LIBRARY)
 set(LIBCXX_OSX_REEXPORT_LIBCXXABI_SYMBOLS ON)
   endif()
 



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[llvm-branch-commits] [llvm] 7143b63 - [llvm-mca] Adding local lit config file for X86 targets

[Wolfgang Pieb via llvm-branch-commits]

Author: Wolfgang Pieb
Date: 2021-01-22T09:52:57-08:00
New Revision: 7143b63017522b76193e970084a1f34a772834dc

URL: 
https://github.com/llvm/llvm-project/commit/7143b63017522b76193e970084a1f34a772834dc
DIFF: 
https://github.com/llvm/llvm-project/commit/7143b63017522b76193e970084a1f34a772834dc.diff

LOG: [llvm-mca] Adding local lit config file for X86 targets

Added: 
llvm/test/tools/llvm-mca/JSON/X86/lit.local.cfg

Modified: 


Removed: 




diff  --git a/llvm/test/tools/llvm-mca/JSON/X86/lit.local.cfg 
b/llvm/test/tools/llvm-mca/JSON/X86/lit.local.cfg
new file mode 100644
index ..c8625f4d9d24
--- /dev/null
+++ b/llvm/test/tools/llvm-mca/JSON/X86/lit.local.cfg
@@ -0,0 +1,2 @@
+if not 'X86' in config.root.targets:
+config.unsupported = True



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[llvm-branch-commits] [mlir] cc77a2c - [mlir] Add coro intrinsics operations to LLVM dialect

[Eugene Zhulenev via llvm-branch-commits]

Author: Eugene Zhulenev
Date: 2021-01-22T10:01:45-08:00
New Revision: cc77a2c7685a9c82566332ba9bd070473ef679d4

URL: 
https://github.com/llvm/llvm-project/commit/cc77a2c7685a9c82566332ba9bd070473ef679d4
DIFF: 
https://github.com/llvm/llvm-project/commit/cc77a2c7685a9c82566332ba9bd070473ef679d4.diff

LOG: [mlir] Add coro intrinsics operations to LLVM dialect

This PR only has coro intrinsics needed for the Async to LLVM lowering. Will 
add other intrinsics as needed in the followup PRs.

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D95143

Added: 


Modified: 
mlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td
mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
mlir/test/Target/llvmir-intrinsics.mlir

Removed: 




diff  --git a/mlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td 
b/mlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td
index 0ef223c4b023..21984ae2914c 100644
--- a/mlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td
+++ b/mlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td
@@ -52,6 +52,12 @@ def LLVM_Type : DialectType,
 "LLVM dialect-compatible type">;
 
+// Type constraint accepting LLVM token type.
+def LLVM_TokenType : Type<
+  CPred<"$_self.isa<::mlir::LLVM::LLVMTokenType>()">,
+  "LLVM token type">,
+  BuildableType<"::mlir::LLVM::LLVMTokenType::get($_builder.getContext())">;
+
 // Type constraint accepting LLVM integer types.
 def LLVM_AnyInteger : Type<
   CPred<"$_self.isa<::mlir::IntegerType>()">,
@@ -99,6 +105,16 @@ class LLVM_PointerTo : Type<
  pointee.predicate>]>,
   "LLVM pointer to " # pointee.summary>;
 
+// Type constraints accepting LLVM pointer type to integer of a specific width.
+class LLVM_IntPtrBase : Type<
+  LLVM_PointerTo>.predicate,
+  "LLVM pointer to " # LLVM_IntBase.summary>,
+  BuildableType<"::mlir::LLVM::LLVMPointerType::get("
+"::mlir::IntegerType::get($_builder.getContext(), "
+# width #"))">;
+
+def LLVM_i8Ptr : LLVM_IntPtrBase<8>;
+
 // Type constraint accepting any LLVM structure type.
 def LLVM_AnyStruct : Type()">,
  "LLVM structure type">;

diff  --git a/mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td 
b/mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
index cb2eede3040e..908080ace058 100644
--- a/mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
+++ b/mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
@@ -1226,6 +1226,57 @@ def LLVM_UMulWithOverflowOp
   let arguments = (ins LLVM_Type, LLVM_Type);
 }
 
+//
+// Coroutine intrinsics.
+//
+
+def LLVM_CoroIdOp : LLVM_IntrOp<"coro.id", [], [], [], 1> {
+  let arguments = (ins LLVM_i32:$align,
+   LLVM_i8Ptr:$promise,
+   LLVM_i8Ptr:$coroaddr,
+   LLVM_i8Ptr:$fnaddrs);
+  let assemblyFormat = "$align `,` $promise `,` $coroaddr `,` $fnaddrs"
+" attr-dict `:` type($res)";
+}
+
+def LLVM_CoroBeginOp : LLVM_IntrOp<"coro.begin", [], [], [], 1> {
+  let arguments = (ins LLVM_TokenType:$token,
+   LLVM_i8Ptr:$mem);
+  let assemblyFormat = "$token `,` $mem attr-dict `:` type($res)";
+}
+
+def LLVM_CoroSizeOp : LLVM_IntrOp<"coro.size", [0], [], [], 1> {
+  let assemblyFormat = "attr-dict `:` type($res)";
+}
+
+def LLVM_CoroSaveOp : LLVM_IntrOp<"coro.save", [], [], [], 1> {
+  let arguments = (ins LLVM_i8Ptr:$handle);
+  let assemblyFormat = "$handle attr-dict `:` type($res)";
+}
+
+def LLVM_CoroSuspendOp : LLVM_IntrOp<"coro.suspend", [], [], [], 1> {
+  let arguments = (ins LLVM_TokenType:$save,
+   LLVM_i1:$final);
+  let assemblyFormat = "$save `,` $final attr-dict `:` type($res)";
+}
+
+def LLVM_CoroEndOp : LLVM_IntrOp<"coro.end", [], [], [], 1> {
+  let arguments = (ins LLVM_i8Ptr:$handle,
+   LLVM_i1:$unwind);
+  let assemblyFormat = "$handle `,` $unwind attr-dict `:` type($res)";
+}
+
+def LLVM_CoroFreeOp : LLVM_IntrOp<"coro.free", [], [], [], 1> {
+  let arguments = (ins LLVM_TokenType:$id,
+   LLVM_i8Ptr:$handle);
+  let assemblyFormat = "$id `,` $handle attr-dict `:` type($res)";
+}
+
+def LLVM_CoroResumeOp : LLVM_IntrOp<"coro.resume", [], [], [], 0> {
+  let arguments = (ins LLVM_i8Ptr:$handle);
+  let assemblyFormat = "$handle attr-dict";
+}
+
 //
 // Vector Reductions.
 //

diff  --git a/mlir/test/Target/llvmir-intrinsics.mlir 
b/mlir/test/Target/llvmir-intrinsics.mlir
index d218e35e774d..bbffb8965a3a 100644
--- a/mlir/test/Target/llvmir-intrinsics.mlir
+++ b/mlir/test/Target/llvmir-intrinsics.mlir
@@ -347,6 +347,64 @@ llvm.func @umul_with_overflow_test(%arg0: i32, %arg1: i32, 
%arg2: vector<8xi32>,
   llvm.return
 }
 
+// CHECK-LABEL: @coro_id
+llvm.func @coro_id(%arg0: i32, %arg1: !llvm.ptr) {
+  // CHECK: call token @llvm.coro.id
+  llvm.intr.coro.id %arg0, %arg1, %arg1, %arg1 : !llvm.token
+  llvm.return
+}
+
+// CHECK-LABEL: @coro_begin
+llvm.func @coro_begin(%arg0: !llvm.token, %arg1: !llvm.

[llvm-branch-commits] [lldb] dc057e8 - [LLDB] Fix how ObjCBOOLSummaryProvider deals with BOOL

[Shafik Yaghmour via llvm-branch-commits]

Author: Shafik Yaghmour
Date: 2021-01-22T10:05:24-08:00
New Revision: dc057e87f6c18c24d17c7cae97ebe95f78b6d934

URL: 
https://github.com/llvm/llvm-project/commit/dc057e87f6c18c24d17c7cae97ebe95f78b6d934
DIFF: 
https://github.com/llvm/llvm-project/commit/dc057e87f6c18c24d17c7cae97ebe95f78b6d934.diff

LOG: [LLDB] Fix how ObjCBOOLSummaryProvider deals with BOOL

ObjCBOOLSummaryProvider was incorrectly treating BOOL as unsigned and this is 
now fixed.
Also adding tests for one bit bit-fields of BOOL and unsigned char.

Added: 


Modified: 
lldb/source/Plugins/Language/ObjC/Cocoa.cpp

lldb/test/API/functionalities/data-formatter/boolreference/TestFormattersBoolRefPtr.py
lldb/test/API/functionalities/data-formatter/boolreference/main.mm
lldb/test/API/lang/objc/bitfield_ivars/TestBitfieldIvars.py
lldb/test/API/lang/objc/bitfield_ivars/main.m

Removed: 




diff  --git a/lldb/source/Plugins/Language/ObjC/Cocoa.cpp 
b/lldb/source/Plugins/Language/ObjC/Cocoa.cpp
index ca4f7332f258..d871d3470e70 100644
--- a/lldb/source/Plugins/Language/ObjC/Cocoa.cpp
+++ b/lldb/source/Plugins/Language/ObjC/Cocoa.cpp
@@ -1035,7 +1035,7 @@ bool lldb_private::formatters::ObjCBOOLSummaryProvider(
 if (!real_guy_sp)
   return false;
   }
-  uint8_t value = (real_guy_sp->GetValueAsUnsigned(0) & 0xFF);
+  int8_t value = (real_guy_sp->GetValueAsSigned(0) & 0xFF);
   switch (value) {
   case 0:
 stream.Printf("NO");
@@ -1044,7 +1044,7 @@ bool lldb_private::formatters::ObjCBOOLSummaryProvider(
 stream.Printf("YES");
 break;
   default:
-stream.Printf("%u", value);
+stream.Printf("%d", value);
 break;
   }
   return true;

diff  --git 
a/lldb/test/API/functionalities/data-formatter/boolreference/TestFormattersBoolRefPtr.py
 
b/lldb/test/API/functionalities/data-formatter/boolreference/TestFormattersBoolRefPtr.py
index 7435409939e4..815a8ab903c0 100644
--- 
a/lldb/test/API/functionalities/data-formatter/boolreference/TestFormattersBoolRefPtr.py
+++ 
b/lldb/test/API/functionalities/data-formatter/boolreference/TestFormattersBoolRefPtr.py
@@ -75,3 +75,12 @@ def cleanup():
 substrs=['NO'])
 if not(isArm):
 self.expect('frame variable unset', substrs=['12'])
+
+self.expect_expr('myField', result_type="BoolBitFields",
+ result_children=[
+ ValueCheck(name="fieldOne", summary="NO"),
+ ValueCheck(name="fieldTwo", summary="-1"),
+ ValueCheck(name="fieldThree", summary="NO"),
+ ValueCheck(name="fieldFour", summary="NO"),
+ ValueCheck(name="fieldFive", summary="-1")
+ ])

diff  --git 
a/lldb/test/API/functionalities/data-formatter/boolreference/main.mm 
b/lldb/test/API/functionalities/data-formatter/boolreference/main.mm
index ce25c0b46e98..121849201bb1 100644
--- a/lldb/test/API/functionalities/data-formatter/boolreference/main.mm
+++ b/lldb/test/API/functionalities/data-formatter/boolreference/main.mm
@@ -1,12 +1,20 @@
 #import 
 
+typedef struct {
+BOOL fieldOne : 1;
+BOOL fieldTwo : 1;
+BOOL fieldThree : 1;
+BOOL fieldFour : 1;
+BOOL fieldFive : 1;
+} BoolBitFields;
+
 int main (int argc, const char * argv[])
 {
-NSAutoreleasePool * pool = [[NSAutoreleasePool alloc] init];
+  NSAutoreleasePool * pool = [[NSAutoreleasePool alloc] init];
 
BOOL yes  = YES;
BOOL no = NO;
-BOOL unset = 12;
+  BOOL unset = 12;

BOOL &yes_ref = yes;
BOOL &no_ref = no;
@@ -16,6 +24,10 @@ int main (int argc, const char * argv[])
BOOL* no_ptr = &no;
BOOL* unset_ptr = &unset;
 
+  BoolBitFields myField = {0};
+  myField.fieldTwo = YES;
+  myField.fieldFive = YES;
+
 [pool drain];// Set break point at this line.
 return 0;
 }

diff  --git a/lldb/test/API/lang/objc/bitfield_ivars/TestBitfieldIvars.py 
b/lldb/test/API/lang/objc/bitfield_ivars/TestBitfieldIvars.py
index 644dca52a464..4e7590de608e 100644
--- a/lldb/test/API/lang/objc/bitfield_ivars/TestBitfieldIvars.py
+++ b/lldb/test/API/lang/objc/bitfield_ivars/TestBitfieldIvars.py
@@ -25,6 +25,15 @@ def test(self):
  'field2 =', '3',
  'field3 =', '4'])
 
+self.expect_expr('myField', result_type="UCBitFields",
+ result_children=[
+ ValueCheck(name="fieldOne", value="'\\0'"),
+ ValueCheck(name="fieldTwo", value="'\\x01'"),
+ ValueCheck(name="fieldThree", value="'\\0'"),
+ ValueCheck(name="fieldFour", value="'\\0'"),
+ ValueCheck(name="fieldFive", value="'\\x01'")
+ ])
+
 # This test is meant to be xfailed, but running the test triggers an ASan
 # issue, so it must be skipped for now.
 @ski

[llvm-branch-commits] [mlir] 167fb9b - [mlir][spirv] Fix script for availability autogen and refresh ops

[Lei Zhang via llvm-branch-commits]

Author: Lei Zhang
Date: 2021-01-22T13:07:36-05:00
New Revision: 167fb9b4b4352cdea92ccfdfb205c7ed4470d3ef

URL: 
https://github.com/llvm/llvm-project/commit/167fb9b4b4352cdea92ccfdfb205c7ed4470d3ef
DIFF: 
https://github.com/llvm/llvm-project/commit/167fb9b4b4352cdea92ccfdfb205c7ed4470d3ef.diff

LOG: [mlir][spirv] Fix script for availability autogen and refresh ops

Previously we only autogen the availability for ops that are
direct instantiating `SPV_Op` and expected other subclasses of
`SPV_Op` to define aggregated availability for all ops. This is
quite error prone and we can miss capabilities for certain ops.
Also it's arguable to have multiple levels of subclasses and try
to deduplicate too much: having the availability directly in the
op can be quite explicit and clear. A few extra lines of
declarative code is fine.

Reviewed By: mravishankar

Differential Revision: https://reviews.llvm.org/D95236

Added: 


Modified: 
mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBitOps.td
mlir/include/mlir/Dialect/SPIRV/IR/SPIRVCompositeOps.td
mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGroupOps.td
mlir/include/mlir/Dialect/SPIRV/IR/SPIRVLogicalOps.td
mlir/include/mlir/Dialect/SPIRV/IR/SPIRVMatrixOps.td
mlir/include/mlir/Dialect/SPIRV/IR/SPIRVMemoryOps.td
mlir/include/mlir/Dialect/SPIRV/IR/SPIRVNonUniformOps.td
mlir/include/mlir/Dialect/SPIRV/IR/SPIRVStructureOps.td
mlir/test/Conversion/StandardToSPIRV/std-ops-to-spirv.mlir
mlir/utils/spirv/gen_spirv_dialect.py

Removed: 




diff  --git a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBitOps.td 
b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBitOps.td
index 5e3bf0b9eccd..c495650c77f1 100644
--- a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBitOps.td
+++ b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBitOps.td
@@ -92,13 +92,6 @@ def SPV_BitCountOp : SPV_BitUnaryOp<"BitCount", []> {
 %3 = spv.BitCount %1: vector<4xi32>
 ```
   }];
-
-  let availability = [
-MinVersion,
-MaxVersion,
-Extension<[]>,
-Capability<[]>
-  ];
 }
 
 // -
@@ -341,13 +334,6 @@ def SPV_BitwiseAndOp : SPV_BitBinaryOp<"BitwiseAnd",
 %2 = spv.BitwiseAnd %0, %1 : vector<4xi32>
 ```
   }];
-
-  let availability = [
-MinVersion,
-MaxVersion,
-Extension<[]>,
-Capability<[]>
-  ];
 }
 
 // -
@@ -383,13 +369,6 @@ def SPV_BitwiseOrOp : SPV_BitBinaryOp<"BitwiseOr",
 %2 = spv.BitwiseOr %0, %1 : vector<4xi32>
 ```
   }];
-
-  let availability = [
-MinVersion,
-MaxVersion,
-Extension<[]>,
-Capability<[]>
-  ];
 }
 
 // -
@@ -425,13 +404,6 @@ def SPV_BitwiseXorOp : SPV_BitBinaryOp<"BitwiseXor",
 %2 = spv.BitwiseXor %0, %1 : vector<4xi32>
 ```
   }];
-
-  let availability = [
-MinVersion,
-MaxVersion,
-Extension<[]>,
-Capability<[]>
-  ];
 }
 
 // -
@@ -440,7 +412,7 @@ def SPV_ShiftLeftLogicalOp : SPV_ShiftOp<"ShiftLeftLogical",
  [UsableInSpecConstantOp]> {
   let summary = [{
 Shift the bits in Base left by the number of bits specified in Shift.
-The least-significant bits will be zero filled.
+The least-significant bits are zero filled.
   }];
 
   let description = [{
@@ -477,13 +449,6 @@ def SPV_ShiftLeftLogicalOp : 
SPV_ShiftOp<"ShiftLeftLogical",
 %5 = spv.ShiftLeftLogical %3, %4 : vector<3xi32>, vector<3xi16>
 ```
   }];
-
-  let availability = [
-MinVersion,
-MaxVersion,
-Extension<[]>,
-Capability<[]>
-  ];
 }
 
 // -
@@ -492,7 +457,7 @@ def SPV_ShiftRightArithmeticOp : 
SPV_ShiftOp<"ShiftRightArithmetic",
  [UsableInSpecConstantOp]> {
   let summary = [{
 Shift the bits in Base right by the number of bits specified in Shift.
-The most-significant bits will be filled with the sign bit from Base.
+The most-significant bits are filled with the sign bit from Base.
   }];
 
   let description = [{
@@ -526,13 +491,6 @@ def SPV_ShiftRightArithmeticOp : 
SPV_ShiftOp<"ShiftRightArithmetic",
 %5 = spv.ShiftRightArithmetic %3, %4 : vector<3xi32>, vector<3xi16>
 ```
   }];
-
-  let availability = [
-MinVersion,
-MaxVersion,
-Extension<[]>,
-Capability<[]>
-  ];
 }
 
 // -
@@ -541,7 +499,7 @@ def SPV_ShiftRightLogicalOp : 
SPV_ShiftOp<"ShiftRightLogical",
   [UsableInSpecConstantOp]> {
   let summary = [{
 Shift the bits in Base right by the number of bits specified in Shift.
-The most-significant bits will be zero filled.
+The most-significant bits are zero filled.
   }];
 
   let description = [{
@@ -576,13 +534,6 @@ def SPV_ShiftRightLogicalOp : 
SPV_ShiftOp<"ShiftRightLogical",
 %5 = spv.ShiftRightLogical %3, %4 : vector<3xi32>, vector<3xi16>
 ```
   }];
-
-  let availability = [
-MinVersion,
-MaxVersion,
-Extension<[]>,
-Capability<[]>
-  ];
 }
 
 // -
@@ -595,7 

[llvm-branch-commits] [flang] 59bf9a8 - [flang] Remove some needless operations in expr rewriting

[peter klausler via llvm-branch-commits]

Author: peter klausler
Date: 2021-01-22T10:08:51-08:00
New Revision: 59bf9a89d825c1f23b249e0ce43d8bf7b486a203

URL: 
https://github.com/llvm/llvm-project/commit/59bf9a89d825c1f23b249e0ce43d8bf7b486a203
DIFF: 
https://github.com/llvm/llvm-project/commit/59bf9a89d825c1f23b249e0ce43d8bf7b486a203.diff

LOG: [flang] Remove some needless operations in expr rewriting

Expressions emitted to module files and error messages
sometimes contain conversions of integer results of inquiry
intrinsics; these are usually not needed, and can conflict
with "int" in the user's namespace.  Improve folding so that
these conversions don't appear, and do some other clean-up
in adjacent code.

Differential Revision: https://reviews.llvm.org/D95172

Added: 


Modified: 
flang/lib/Evaluate/fold-implementation.h
flang/test/Semantics/modfile17.f90
flang/test/Semantics/modfile30.f90

Removed: 




diff  --git a/flang/lib/Evaluate/fold-implementation.h 
b/flang/lib/Evaluate/fold-implementation.h
index 7232715600fd..37116bb6bca4 100644
--- a/flang/lib/Evaluate/fold-implementation.h
+++ b/flang/lib/Evaluate/fold-implementation.h
@@ -1105,12 +1105,13 @@ Expr FoldOperation(
 // This variable is a workaround for msvc which emits an error when
 // using the FROMCAT template parameter below.
 TypeCategory constexpr FromCat{FROMCAT};
+static_assert(FromCat == Operand::category);
 auto &convert{msvcWorkaround.convert};
 char buffer[64];
 if (auto value{GetScalarConstantValue(kindExpr)}) {
   FoldingContext &ctx{msvcWorkaround.context};
   if constexpr (TO::category == TypeCategory::Integer) {
-if constexpr (Operand::category == TypeCategory::Integer) {
+if constexpr (FromCat == TypeCategory::Integer) {
   auto converted{Scalar::ConvertSigned(*value)};
   if (converted.overflow) {
 ctx.messages().Say(
@@ -1118,7 +1119,7 @@ Expr FoldOperation(
 Operand::kind, TO::kind);
   }
   return ScalarConstantToExpr(std::move(converted.value));
-} else if constexpr (Operand::category == TypeCategory::Real) {
+} else if constexpr (FromCat == TypeCategory::Real) {
   auto converted{value->template ToInteger>()};
   if (converted.flags.test(RealFlag::InvalidArgument)) {
 ctx.messages().Say(
@@ -1132,7 +1133,7 @@ Expr FoldOperation(
   return ScalarConstantToExpr(std::move(converted.value));
 }
   } else if constexpr (TO::category == TypeCategory::Real) {
-if constexpr (Operand::category == TypeCategory::Integer) {
+if constexpr (FromCat == TypeCategory::Integer) {
   auto converted{Scalar::FromInteger(*value)};
   if (!converted.flags.empty()) {
 std::snprintf(buffer, sizeof buffer,
@@ -1141,7 +1142,7 @@ Expr FoldOperation(
 RealFlagWarnings(ctx, converted.flags, buffer);
   }
   return ScalarConstantToExpr(std::move(converted.value));
-} else if constexpr (Operand::category == TypeCategory::Real) {
+} else if constexpr (FromCat == TypeCategory::Real) {
   auto converted{Scalar::Convert(*value)};
   if (!converted.flags.empty()) {
 std::snprintf(buffer, sizeof buffer,
@@ -1154,7 +1155,7 @@ Expr FoldOperation(
   return ScalarConstantToExpr(std::move(converted.value));
 }
   } else if constexpr (TO::category == TypeCategory::Complex) {
-if constexpr (Operand::category == TypeCategory::Complex) {
+if constexpr (FromCat == TypeCategory::Complex) {
   return FoldOperation(ctx,
   ComplexConstructor{
   AsExpr(Convert{AsCategoryExpr(
@@ -1163,17 +1164,31 @@ Expr FoldOperation(
   Constant{value->AIMAG()})})});
 }
   } else if constexpr (TO::category == TypeCategory::Character &&
-  Operand::category == TypeCategory::Character) {
+  FromCat == TypeCategory::Character) {
 if (auto converted{ConvertString>(std::move(*value))}) {
   return ScalarConstantToExpr(std::move(*converted));
 }
   } else if constexpr (TO::category == TypeCategory::Logical &&
-  Operand::category == TypeCategory::Logical) {
+  FromCat == TypeCategory::Logical) {
 return Expr{value->IsTrue()};
   }
-} else if constexpr (std::is_same_v &&
+} else if constexpr (TO::category == FromCat &&
 FromCat != TypeCategory::Character) {
-  return std::move(kindExpr); // remove needless conversion
+  // Conversion of non-constant in same type category
+  if constexpr (st

[llvm-branch-commits] [mlir] e27197f - [mlir][spirv] Define spv.IsNan/spv.IsInf and add lowerings

[Lei Zhang via llvm-branch-commits]

Author: Lei Zhang
Date: 2021-01-22T13:09:33-05:00
New Revision: e27197f3605450c372ddc71922d0e9982b30e115

URL: 
https://github.com/llvm/llvm-project/commit/e27197f3605450c372ddc71922d0e9982b30e115
DIFF: 
https://github.com/llvm/llvm-project/commit/e27197f3605450c372ddc71922d0e9982b30e115.diff

LOG: [mlir][spirv] Define spv.IsNan/spv.IsInf and add lowerings

spv.Ordered/spv.Unordered are meant for OpenCL Kernel capability.
For Vulkan Shader capability, we should use spv.IsNan to check
whether a number is NaN.

Add a new pattern for converting `std.cmpf ord|uno` to spv.IsNan
and bumped the pattern converting to spv.Ordered/spv.Unordered
to a higher benefit. The SPIR-V target environment will properly
select between these two patterns.

Reviewed By: mravishankar

Differential Revision: https://reviews.llvm.org/D95237

Added: 


Modified: 
mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
mlir/include/mlir/Dialect/SPIRV/IR/SPIRVLogicalOps.td
mlir/lib/Conversion/StandardToSPIRV/StandardToSPIRV.cpp
mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp
mlir/test/Conversion/StandardToSPIRV/std-ops-to-spirv.mlir
mlir/test/Dialect/SPIRV/IR/logical-ops.mlir
mlir/test/Target/SPIRV/logical-ops.mlir

Removed: 




diff  --git a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td 
b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
index c369304cf18b..347b65a7739e 100644
--- a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
+++ b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
@@ -3216,6 +3216,8 @@ def SPV_OC_OpFRem  : 
I32EnumAttrCase<"OpFRem", 140>;
 def SPV_OC_OpFMod  : I32EnumAttrCase<"OpFMod", 141>;
 def SPV_OC_OpMatrixTimesScalar : 
I32EnumAttrCase<"OpMatrixTimesScalar", 143>;
 def SPV_OC_OpMatrixTimesMatrix : 
I32EnumAttrCase<"OpMatrixTimesMatrix", 146>;
+def SPV_OC_OpIsNan : I32EnumAttrCase<"OpIsNan", 156>;
+def SPV_OC_OpIsInf : I32EnumAttrCase<"OpIsInf", 157>;
 def SPV_OC_OpOrdered   : I32EnumAttrCase<"OpOrdered", 162>;
 def SPV_OC_OpUnordered : I32EnumAttrCase<"OpUnordered", 163>;
 def SPV_OC_OpLogicalEqual  : I32EnumAttrCase<"OpLogicalEqual", 
164>;
@@ -3332,15 +3334,15 @@ def SPV_OpcodeAttr :
   SPV_OC_OpISub, SPV_OC_OpFSub, SPV_OC_OpIMul, SPV_OC_OpFMul, 
SPV_OC_OpUDiv,
   SPV_OC_OpSDiv, SPV_OC_OpFDiv, SPV_OC_OpUMod, SPV_OC_OpSRem, 
SPV_OC_OpSMod,
   SPV_OC_OpFRem, SPV_OC_OpFMod, SPV_OC_OpMatrixTimesScalar,
-  SPV_OC_OpMatrixTimesMatrix, SPV_OC_OpOrdered, SPV_OC_OpUnordered,
-  SPV_OC_OpLogicalEqual, SPV_OC_OpLogicalNotEqual, SPV_OC_OpLogicalOr,
-  SPV_OC_OpLogicalAnd, SPV_OC_OpLogicalNot, SPV_OC_OpSelect, 
SPV_OC_OpIEqual,
-  SPV_OC_OpINotEqual, SPV_OC_OpUGreaterThan, SPV_OC_OpSGreaterThan,
-  SPV_OC_OpUGreaterThanEqual, SPV_OC_OpSGreaterThanEqual, 
SPV_OC_OpULessThan,
-  SPV_OC_OpSLessThan, SPV_OC_OpULessThanEqual, SPV_OC_OpSLessThanEqual,
-  SPV_OC_OpFOrdEqual, SPV_OC_OpFUnordEqual, SPV_OC_OpFOrdNotEqual,
-  SPV_OC_OpFUnordNotEqual, SPV_OC_OpFOrdLessThan, SPV_OC_OpFUnordLessThan,
-  SPV_OC_OpFOrdGreaterThan, SPV_OC_OpFUnordGreaterThan,
+  SPV_OC_OpMatrixTimesMatrix, SPV_OC_OpIsNan, SPV_OC_OpIsInf, 
SPV_OC_OpOrdered,
+  SPV_OC_OpUnordered, SPV_OC_OpLogicalEqual, SPV_OC_OpLogicalNotEqual,
+  SPV_OC_OpLogicalOr, SPV_OC_OpLogicalAnd, SPV_OC_OpLogicalNot, 
SPV_OC_OpSelect,
+  SPV_OC_OpIEqual, SPV_OC_OpINotEqual, SPV_OC_OpUGreaterThan,
+  SPV_OC_OpSGreaterThan, SPV_OC_OpUGreaterThanEqual, 
SPV_OC_OpSGreaterThanEqual,
+  SPV_OC_OpULessThan, SPV_OC_OpSLessThan, SPV_OC_OpULessThanEqual,
+  SPV_OC_OpSLessThanEqual, SPV_OC_OpFOrdEqual, SPV_OC_OpFUnordEqual,
+  SPV_OC_OpFOrdNotEqual, SPV_OC_OpFUnordNotEqual, SPV_OC_OpFOrdLessThan,
+  SPV_OC_OpFUnordLessThan, SPV_OC_OpFOrdGreaterThan, 
SPV_OC_OpFUnordGreaterThan,
   SPV_OC_OpFOrdLessThanEqual, SPV_OC_OpFUnordLessThanEqual,
   SPV_OC_OpFOrdGreaterThanEqual, SPV_OC_OpFUnordGreaterThanEqual,
   SPV_OC_OpShiftRightLogical, SPV_OC_OpShiftRightArithmetic,

diff  --git a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVLogicalOps.td 
b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVLogicalOps.td
index 0516e70f87c4..019b63f3a582 100644
--- a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVLogicalOps.td
+++ b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVLogicalOps.td
@@ -41,6 +41,11 @@ class SPV_LogicalUnaryOp {
   let parser = [{ return ::parseLogicalUnaryOp(parser, result); }];
   let printer = [{ return ::printLogicalOp(getOperation(), p); }];
+
+  let builders = [
+OpBuilderDAG<(ins "Value":$value),
+[{::buildLogicalUnaryOp($_builder, $_state, value);}]>
+  ];
 }
 
 // -
@@ -507,6 +512,70 @@ def SPV_INotEqualOp : SPV_LogicalBinaryOp<"INotEqual",
 
 // -
 
+def SPV_IsInfOp : SPV_LogicalUnaryOp<"IsInf", SPV_Float, []> {
+  let summary = "Result is true if x is an I

[llvm-branch-commits] [llvm] e679eea - [InstCombine] add tests for abs(sext X); NFC

[Sanjay Patel via llvm-branch-commits]

Author: Sanjay Patel
Date: 2021-01-22T13:36:04-05:00
New Revision: e679eea6d20d6e6e749525827c95f42bfef16285

URL: 
https://github.com/llvm/llvm-project/commit/e679eea6d20d6e6e749525827c95f42bfef16285
DIFF: 
https://github.com/llvm/llvm-project/commit/e679eea6d20d6e6e749525827c95f42bfef16285.diff

LOG: [InstCombine] add tests for abs(sext X); NFC

https://llvm.org/PR48816

Added: 


Modified: 
llvm/test/Transforms/InstCombine/abs-intrinsic.ll

Removed: 




diff  --git a/llvm/test/Transforms/InstCombine/abs-intrinsic.ll 
b/llvm/test/Transforms/InstCombine/abs-intrinsic.ll
index 30e5a9ddab3c..baeb44d1d8dc 100644
--- a/llvm/test/Transforms/InstCombine/abs-intrinsic.ll
+++ b/llvm/test/Transforms/InstCombine/abs-intrinsic.ll
@@ -292,3 +292,66 @@ define i1 @abs_ne_int_min_nopoison(i8 %x) {
   %cmp = icmp ne i8 %abs, -128
   ret i1 %cmp
 }
+
+define i32 @abs_sext(i8 %x) {
+; CHECK-LABEL: @abs_sext(
+; CHECK-NEXT:[[S:%.*]] = sext i8 [[X:%.*]] to i32
+; CHECK-NEXT:[[A:%.*]] = call i32 @llvm.abs.i32(i32 [[S]], i1 false)
+; CHECK-NEXT:ret i32 [[A]]
+;
+  %s = sext i8 %x to i32
+  %a = call i32 @llvm.abs.i32(i32 %s, i1 0)
+  ret i32 %a
+}
+
+define <3 x i82> @abs_nsw_sext(<3 x i7> %x) {
+; CHECK-LABEL: @abs_nsw_sext(
+; CHECK-NEXT:[[S:%.*]] = sext <3 x i7> [[X:%.*]] to <3 x i82>
+; CHECK-NEXT:[[A:%.*]] = call <3 x i82> @llvm.abs.v3i82(<3 x i82> [[S]], 
i1 true)
+; CHECK-NEXT:ret <3 x i82> [[A]]
+;
+  %s = sext <3 x i7> %x to <3 x i82>
+  %a = call <3 x i82> @llvm.abs.v3i82(<3 x i82> %s, i1 1)
+  ret <3 x i82> %a
+}
+
+define i32 @abs_sext_extra_use(i8 %x, i32* %p) {
+; CHECK-LABEL: @abs_sext_extra_use(
+; CHECK-NEXT:[[S:%.*]] = sext i8 [[X:%.*]] to i32
+; CHECK-NEXT:store i32 [[S]], i32* [[P:%.*]], align 4
+; CHECK-NEXT:[[A:%.*]] = call i32 @llvm.abs.i32(i32 [[S]], i1 false)
+; CHECK-NEXT:ret i32 [[A]]
+;
+  %s = sext i8 %x to i32
+  store i32 %s, i32* %p
+  %a = call i32 @llvm.abs.i32(i32 %s, i1 0)
+  ret i32 %a
+}
+
+; PR48816
+
+define i8 @trunc_abs_sext(i8 %x) {
+; CHECK-LABEL: @trunc_abs_sext(
+; CHECK-NEXT:[[S:%.*]] = sext i8 [[X:%.*]] to i32
+; CHECK-NEXT:[[A:%.*]] = tail call i32 @llvm.abs.i32(i32 [[S]], i1 true)
+; CHECK-NEXT:[[T:%.*]] = trunc i32 [[A]] to i8
+; CHECK-NEXT:ret i8 [[T]]
+;
+  %s = sext i8 %x to i32
+  %a = tail call i32 @llvm.abs.i32(i32 %s, i1 true)
+  %t = trunc i32 %a to i8
+  ret i8 %t
+}
+
+define <4 x i8> @trunc_abs_sext_vec(<4 x i8> %x) {
+; CHECK-LABEL: @trunc_abs_sext_vec(
+; CHECK-NEXT:[[S:%.*]] = sext <4 x i8> [[X:%.*]] to <4 x i32>
+; CHECK-NEXT:[[A:%.*]] = tail call <4 x i32> @llvm.abs.v4i32(<4 x i32> 
[[S]], i1 true)
+; CHECK-NEXT:[[T:%.*]] = trunc <4 x i32> [[A]] to <4 x i8>
+; CHECK-NEXT:ret <4 x i8> [[T]]
+;
+  %s = sext <4 x i8> %x to <4 x i32>
+  %a = tail call <4 x i32> @llvm.abs.v4i32(<4 x i32> %s, i1 true)
+  %t = trunc <4 x i32> %a to <4 x i8>
+  ret <4 x i8> %t
+}



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[llvm-branch-commits] [llvm] 411c144 - [InstCombine] narrow abs with sign-extended input

[Sanjay Patel via llvm-branch-commits]

Author: Sanjay Patel
Date: 2021-01-22T13:36:04-05:00
New Revision: 411c144e4c99f4d4370ed2b9c248dc6bb9a39648

URL: 
https://github.com/llvm/llvm-project/commit/411c144e4c99f4d4370ed2b9c248dc6bb9a39648
DIFF: 
https://github.com/llvm/llvm-project/commit/411c144e4c99f4d4370ed2b9c248dc6bb9a39648.diff

LOG: [InstCombine] narrow abs with sign-extended input

In the motivating cases from https://llvm.org/PR48816 ,
we have a trailing trunc. But that is not required to
reduce the abs width:
https://alive2.llvm.org/ce/z/ECaz-p
...as long as we clear the int-min-is-poison bit (nsw).

We have some existing tests that are affected, and I'm
not sure what the overall implications are, but in general
we favor narrowing operations over preserving nsw/nuw.

If that causes problems, we could restrict this transform
based on type (shouldChangeType() and/or vector vs. scalar).

Differential Revision: https://reviews.llvm.org/D95235

Added: 


Modified: 
llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
llvm/test/Transforms/InstCombine/abs-1.ll
llvm/test/Transforms/InstCombine/abs-intrinsic.ll

Removed: 




diff  --git a/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp 
b/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
index 7d63b30d35f8..5ba51d255109 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
@@ -820,6 +820,14 @@ Instruction *InstCombinerImpl::visitCallInst(CallInst &CI) 
{
   return BinaryOperator::CreateNeg(IIOperand);
 }
 
+// abs (sext X) --> zext (abs X*)
+// Clear the IsIntMin (nsw) bit on the abs to allow narrowing.
+if (match(IIOperand, m_OneUse(m_SExt(m_Value(X) {
+  Value *NarrowAbs =
+  Builder.CreateBinaryIntrinsic(Intrinsic::abs, X, Builder.getFalse());
+  return CastInst::Create(Instruction::ZExt, NarrowAbs, II->getType());
+}
+
 break;
   }
   case Intrinsic::bswap: {

diff  --git a/llvm/test/Transforms/InstCombine/abs-1.ll 
b/llvm/test/Transforms/InstCombine/abs-1.ll
index 7e5eadf5b25e..7452798ead77 100644
--- a/llvm/test/Transforms/InstCombine/abs-1.ll
+++ b/llvm/test/Transforms/InstCombine/abs-1.ll
@@ -102,9 +102,9 @@ define i8 @abs_canonical_4(i8 %x) {
 
 define i32 @abs_canonical_5(i8 %x) {
 ; CHECK-LABEL: @abs_canonical_5(
-; CHECK-NEXT:[[CONV:%.*]] = sext i8 [[X:%.*]] to i32
-; CHECK-NEXT:[[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[CONV]], i1 true)
-; CHECK-NEXT:ret i32 [[TMP1]]
+; CHECK-NEXT:[[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[X:%.*]], i1 false)
+; CHECK-NEXT:[[TMP2:%.*]] = zext i8 [[TMP1]] to i32
+; CHECK-NEXT:ret i32 [[TMP2]]
 ;
   %cmp = icmp sgt i8 %x, 0
   %conv = sext i8 %x to i32
@@ -250,9 +250,9 @@ define i8 @nabs_canonical_4(i8 %x) {
 
 define i32 @nabs_canonical_5(i8 %x) {
 ; CHECK-LABEL: @nabs_canonical_5(
-; CHECK-NEXT:[[CONV:%.*]] = sext i8 [[X:%.*]] to i32
-; CHECK-NEXT:[[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[CONV]], i1 false)
-; CHECK-NEXT:[[ABS:%.*]] = sub nsw i32 0, [[TMP1]]
+; CHECK-NEXT:[[TMP1:%.*]] = call i8 @llvm.abs.i8(i8 [[X:%.*]], i1 false)
+; CHECK-NEXT:[[TMP2:%.*]] = zext i8 [[TMP1]] to i32
+; CHECK-NEXT:[[ABS:%.*]] = sub nsw i32 0, [[TMP2]]
 ; CHECK-NEXT:ret i32 [[ABS]]
 ;
   %cmp = icmp sgt i8 %x, 0

diff  --git a/llvm/test/Transforms/InstCombine/abs-intrinsic.ll 
b/llvm/test/Transforms/InstCombine/abs-intrinsic.ll
index baeb44d1d8dc..1f5f1c2ba562 100644
--- a/llvm/test/Transforms/InstCombine/abs-intrinsic.ll
+++ b/llvm/test/Transforms/InstCombine/abs-intrinsic.ll
@@ -64,9 +64,9 @@ define <4 x i32> @abs_trailing_zeros_negative_vec(<4 x i32> 
%x) {
 ; sign bits, the abs reduces this to 2 sign bits.
 define i32 @abs_signbits(i30 %x) {
 ; CHECK-LABEL: @abs_signbits(
-; CHECK-NEXT:[[EXT:%.*]] = sext i30 [[X:%.*]] to i32
-; CHECK-NEXT:[[ABS:%.*]] = call i32 @llvm.abs.i32(i32 [[EXT]], i1 false)
-; CHECK-NEXT:[[ADD:%.*]] = add nuw nsw i32 [[ABS]], 1
+; CHECK-NEXT:[[TMP1:%.*]] = call i30 @llvm.abs.i30(i30 [[X:%.*]], i1 false)
+; CHECK-NEXT:[[NARROW:%.*]] = add nuw i30 [[TMP1]], 1
+; CHECK-NEXT:[[ADD:%.*]] = zext i30 [[NARROW]] to i32
 ; CHECK-NEXT:ret i32 [[ADD]]
 ;
   %ext = sext i30 %x to i32
@@ -77,9 +77,9 @@ define i32 @abs_signbits(i30 %x) {
 
 define <4 x i32> @abs_signbits_vec(<4 x i30> %x) {
 ; CHECK-LABEL: @abs_signbits_vec(
-; CHECK-NEXT:[[EXT:%.*]] = sext <4 x i30> [[X:%.*]] to <4 x i32>
-; CHECK-NEXT:[[ABS:%.*]] = call <4 x i32> @llvm.abs.v4i32(<4 x i32> 
[[EXT]], i1 false)
-; CHECK-NEXT:[[ADD:%.*]] = add nuw nsw <4 x i32> [[ABS]], 
+; CHECK-NEXT:[[TMP1:%.*]] = call <4 x i30> @llvm.abs.v4i30(<4 x i30> 
[[X:%.*]], i1 false)
+; CHECK-NEXT:[[NARROW:%.*]] = add nuw <4 x i30> [[TMP1]], 
+; CHECK-NEXT:[[ADD:%.*]] = zext <4 x i30> [[NARROW]] to <4 x i32>
 ; CHECK-NEXT:ret <4 x i32> [[ADD]]
 ;
   %ext = sext <4 x i30> %x to <4 

[llvm-branch-commits] [flang] 07f1e1f - [flang] Correct shape analysis for transformational intrinsic functions

[peter klausler via llvm-branch-commits]

Author: peter klausler
Date: 2021-01-22T10:48:58-08:00
New Revision: 07f1e1f44c87d1ee84caf13d6e5aa64eb7e1b068

URL: 
https://github.com/llvm/llvm-project/commit/07f1e1f44c87d1ee84caf13d6e5aa64eb7e1b068
DIFF: 
https://github.com/llvm/llvm-project/commit/07f1e1f44c87d1ee84caf13d6e5aa64eb7e1b068.diff

LOG: [flang] Correct shape analysis for transformational intrinsic functions

Correct the analysis of references to transformational intrinsic
functions that have different semantics based on the presence or
absence of a DIM= argument; add shape analysis for UNPACK().

Differential Revision: https://reviews.llvm.org/D94716

Added: 


Modified: 
flang/lib/Evaluate/intrinsics.cpp
flang/lib/Evaluate/shape.cpp

Removed: 




diff  --git a/flang/lib/Evaluate/intrinsics.cpp 
b/flang/lib/Evaluate/intrinsics.cpp
index 3de43fd88d7e..98fbe92e2815 100644
--- a/flang/lib/Evaluate/intrinsics.cpp
+++ b/flang/lib/Evaluate/intrinsics.cpp
@@ -181,12 +181,13 @@ ENUM_CLASS(Rank,
 conformable, // scalar, or array of same rank & shape as "array" argument
 reduceOperation, // a pure function with constraints for REDUCE
 dimReduced, // scalar if no DIM= argument, else rank(array)-1
-dimRemoved, // scalar, or rank(array)-1
+dimRemovedOrScalar, // rank(array)-1 (less DIM) or scalar
+locReduced, // vector(1:rank) if no DIM= argument, else rank(array)-1
 rankPlus1, // rank(known)+1
 shaped, // rank is length of SHAPE vector
 )
 
-ENUM_CLASS(Optionality, required, optional,
+ENUM_CLASS(Optionality, required, optional, missing,
 defaultsToSameKind, // for MatchingDefaultKIND
 defaultsToDefaultForResult, // for DefaultingKIND
 defaultsToSizeKind, // for SizeDefaultKIND
@@ -227,6 +228,9 @@ static constexpr IntrinsicDummyArgument RequiredDIM{"dim",
 static constexpr IntrinsicDummyArgument OptionalDIM{"dim",
 {IntType, KindCode::dimArg}, Rank::scalar, Optionality::optional,
 common::Intent::In};
+static constexpr IntrinsicDummyArgument MissingDIM{"dim",
+{IntType, KindCode::dimArg}, Rank::scalar, Optionality::missing,
+common::Intent::In};
 static constexpr IntrinsicDummyArgument OptionalMASK{"mask", AnyLogical,
 Rank::conformable, Optionality::optional, common::Intent::In};
 
@@ -346,8 +350,8 @@ static const IntrinsicInterface genericIntrinsicFunction[]{
 {"count", {{"mask", AnyLogical, Rank::array}, OptionalDIM, DefaultingKIND},
 KINDInt, Rank::dimReduced, IntrinsicClass::transformationalFunction},
 {"cshift",
-{{"array", SameType, Rank::array}, {"shift", AnyInt, Rank::dimRemoved},
-OptionalDIM},
+{{"array", SameType, Rank::array},
+{"shift", AnyInt, Rank::dimRemovedOrScalar}, OptionalDIM},
 SameType, Rank::conformable, IntrinsicClass::transformationalFunction},
 {"dble", {{"a", AnyNumeric, Rank::elementalOrBOZ}}, DoublePrecision},
 {"digits", {{"x", AnyIntOrReal, Rank::anyOrAssumedRank}}, DefaultInt,
@@ -380,16 +384,16 @@ static const IntrinsicInterface 
genericIntrinsicFunction[]{
 {"dshiftr", {{"i", BOZ}, {"j", SameInt}, {"shift", AnyInt}}, SameInt},
 {"eoshift",
 {{"array", SameIntrinsic, Rank::array},
-{"shift", AnyInt, Rank::dimRemoved},
-{"boundary", SameIntrinsic, Rank::dimRemoved,
+{"shift", AnyInt, Rank::dimRemovedOrScalar},
+{"boundary", SameIntrinsic, Rank::dimReduced,
 Optionality::optional},
 OptionalDIM},
 SameIntrinsic, Rank::conformable,
 IntrinsicClass::transformationalFunction},
 {"eoshift",
 {{"array", SameDerivedType, Rank::array},
-{"shift", AnyInt, Rank::dimRemoved},
-{"boundary", SameDerivedType, Rank::dimRemoved}, OptionalDIM},
+{"shift", AnyInt, Rank::dimReduced},
+{"boundary", SameDerivedType, Rank::dimReduced}, OptionalDIM},
 SameDerivedType, Rank::conformable,
 IntrinsicClass::transformationalFunction},
 {"epsilon", {{"x", SameReal, Rank::anyOrAssumedRank}}, SameReal,
@@ -410,20 +414,21 @@ static const IntrinsicInterface 
genericIntrinsicFunction[]{
 {"value", AnyNumeric, Rank::scalar}, RequiredDIM, OptionalMASK,
 SizeDefaultKIND,
 {"back", AnyLogical, Rank::scalar, Optionality::optional}},
-KINDInt, Rank::dimRemoved, IntrinsicClass::transformationalFunction},
+KINDInt, Rank::locReduced, IntrinsicClass::transformationalFunction},
 {"findloc",
 {{"array", AnyNumeric, Rank::array},
-{"value", AnyNumeric, Rank::scalar}, OptionalMASK, SizeDefaultKIND,
+{"value", AnyNumeric, Rank::scalar}, MissingDIM, OptionalMASK,
+SizeDefaultKIND,
 {"back", AnyLogical, Rank::scalar, Optionality::optional}},
 KINDInt, Rank::vector, IntrinsicClass::transformationalFunction},
 {"findloc",
 {{"a

[llvm-branch-commits] [clang] 520b5ec - [SystemZ][z/OS] Fix No such file or directory expression error matching in lit tests - continued

[Abhina Sreeskantharajan via llvm-branch-commits]

Author: Abhina Sreeskantharajan
Date: 2021-01-22T13:54:25-05:00
New Revision: 520b5ecf856152f35ee38207eec39f5674dd2bd4

URL: 
https://github.com/llvm/llvm-project/commit/520b5ecf856152f35ee38207eec39f5674dd2bd4
DIFF: 
https://github.com/llvm/llvm-project/commit/520b5ecf856152f35ee38207eec39f5674dd2bd4.diff

LOG: [SystemZ][z/OS] Fix No such file or directory expression error matching in 
lit tests - continued

This is a continuation of https://reviews.llvm.org/D94239. I missed some other 
spellings of the same error.

Reviewed By: muiez

Differential Revision: https://reviews.llvm.org/D95246

Added: 


Modified: 
clang/test/Driver/clang-offload-bundler.c
clang/test/Frontend/output-failures.c
llvm/test/Object/archive-extract-dir.test
llvm/test/Object/archive-extract.test
llvm/test/Object/directory.ll
llvm/test/tools/llvm-ar/error-opening-directory.test
llvm/test/tools/llvm-ar/move.test
llvm/test/tools/llvm-ar/print.test
llvm/test/tools/llvm-ar/quick-append.test
llvm/test/tools/llvm-libtool-darwin/invalid-input-output-args.test
llvm/test/tools/llvm-lipo/create-arch.test
llvm/test/tools/llvm-lipo/replace-invalid-input.test
llvm/test/tools/llvm-lto/error.ll
llvm/test/tools/llvm-objcopy/wasm/dump-section.test
llvm/test/tools/llvm-symbolizer/pdb/missing_pdb.test

Removed: 




diff  --git a/clang/test/Driver/clang-offload-bundler.c 
b/clang/test/Driver/clang-offload-bundler.c
index 3e1fab25d7544..f7428d7f02f4e 100644
--- a/clang/test/Driver/clang-offload-bundler.c
+++ b/clang/test/Driver/clang-offload-bundler.c
@@ -72,7 +72,7 @@
 
 // RUN: not clang-offload-bundler -type=i 
-targets=host-%itanium_abi_triple,openmp-powerpc64le-ibm-linux-gnu,openmp-x86_64-pc-linux-gnu
 -inputs=%t.i,%t.tgt1,%t.tgt2.notexist -outputs=%t.bundle.i 2>&1 | FileCheck %s 
-DFILE=%t.tgt2.notexist --check-prefix CK-ERR5
 // RUN: not clang-offload-bundler -type=i 
-targets=host-%itanium_abi_triple,openmp-powerpc64le-ibm-linux-gnu,openmp-x86_64-pc-linux-gnu
 -outputs=%t.i,%t.tgt1,%t.tgt2 -inputs=%t.bundle.i.notexist -unbundle 2>&1 | 
FileCheck %s -DFILE=%t.bundle.i.notexist --check-prefix CK-ERR5
-// CK-ERR5: error: '[[FILE]]': {{N|n}}o such file or directory
+// CK-ERR5: error: '[[FILE]]': {{.*}}{{N|n}}o such file or directory
 
 // RUN: not clang-offload-bundler -type=invalid 
-targets=host-%itanium_abi_triple,openmp-powerpc64le-ibm-linux-gnu,openmp-x86_64-pc-linux-gnu
 -inputs=%t.i,%t.tgt1,%t.tgt2 -outputs=%t.bundle.i 2>&1 | FileCheck %s 
-DTYPE=invalid --check-prefix CK-ERR6
 // CK-ERR6: error: '[[TYPE]]': invalid file type specified

diff  --git a/clang/test/Frontend/output-failures.c 
b/clang/test/Frontend/output-failures.c
index 0e9ea63f8067b..26d25fdbef36c 100644
--- a/clang/test/Frontend/output-failures.c
+++ b/clang/test/Frontend/output-failures.c
@@ -1,4 +1,4 @@
 // RUN: not %clang_cc1 -emit-llvm -o %t.doesnotexist/somename %s 2> %t
 // RUN: FileCheck -check-prefix=OUTPUTFAIL -input-file=%t %s
 
-// OUTPUTFAIL: error: unable to open output file 
'{{.*}}doesnotexist{{.}}somename': '{{[nN]}}o such file or directory'
+// OUTPUTFAIL: error: unable to open output file 
'{{.*}}doesnotexist{{.}}somename': '{{.*}}{{[nN]}}o such file or 
directory{{.*}}'

diff  --git a/llvm/test/Object/archive-extract-dir.test 
b/llvm/test/Object/archive-extract-dir.test
index 5182a2f914110..d6a721c090b36 100644
--- a/llvm/test/Object/archive-extract-dir.test
+++ b/llvm/test/Object/archive-extract-dir.test
@@ -8,4 +8,4 @@ RUN: rm foo
 RUN: mkdir foo
 RUN: not llvm-ar x test.a foo 2>&1 | FileCheck %s
 
-CHECK: foo: {{[Ii]}}s a directory
+CHECK: foo: {{.*}}{{[Ii]}}s a directory{{.*}}

diff  --git a/llvm/test/Object/archive-extract.test 
b/llvm/test/Object/archive-extract.test
index 11ca12e3353b1..589e8b8fe8561 100644
--- a/llvm/test/Object/archive-extract.test
+++ b/llvm/test/Object/archive-extract.test
@@ -58,4 +58,4 @@ RUN: llvm-ar p %p/Inputs/thin.a evenlen | FileCheck %s 
--check-prefix=EVENLEN
 EVENLEN: evenlen
 
 RUN: not llvm-ar p %p/Inputs/thin-path.a t/test2.o 2>&1 | FileCheck %s 
--check-prefix=MISSING
-MISSING: error: {{N|n}}o such file or directory
+MISSING: error: {{.*}}{{N|n}}o such file or directory

diff  --git a/llvm/test/Object/directory.ll b/llvm/test/Object/directory.ll
index 3e9ac2ce202e8..d9e340a587b10 100644
--- a/llvm/test/Object/directory.ll
+++ b/llvm/test/Object/directory.ll
@@ -1,6 +1,6 @@
 ;RUN: rm -rf %t && mkdir -p %t
 ;RUN: not llvm-ar r %t/test.a . 2>&1 | FileCheck %s
-;CHECK: .: {{I|i}}s a directory
+;CHECK: .: {{.*}}{{I|i}}s a directory{{.*}}
 
 ;RUN: rm -f %t/test.a
 ;RUN: touch %t/a-very-long-file-name

diff  --git a/llvm/test/tools/llvm-ar/error-opening-directory.test 
b/llvm/test/tools/llvm-ar/error-opening-directory.test
index c3068871230fc..5a6491bd29c86 100644
--- a/llvm/test/tools/llvm-ar/error-opening-directory.test
+++ b/llvm/test/tools/llvm-ar/error-opening-directory.t

[llvm-branch-commits] [flang] f187d64 - [flang][nfc] Fix comments, remove needless API, tweak script

[peter klausler via llvm-branch-commits]

Author: peter klausler
Date: 2021-01-22T10:55:53-08:00
New Revision: f187d64c80acd84f3f60799b80eba2485f8866df

URL: 
https://github.com/llvm/llvm-project/commit/f187d64c80acd84f3f60799b80eba2485f8866df
DIFF: 
https://github.com/llvm/llvm-project/commit/f187d64c80acd84f3f60799b80eba2485f8866df.diff

LOG: [flang][nfc] Fix comments, remove needless API, tweak script

* Remove an unimplemented and unused member function declaration
* Remove a misleading comment about an unrelated constraint number
* Fix a comment
* Add f18 crash message to "flang" driver script

Differential Revision: https://reviews.llvm.org/D95180

Added: 


Modified: 
flang/include/flang/Parser/provenance.h
flang/include/flang/Semantics/symbol.h
flang/lib/Semantics/assignment.cpp
flang/tools/f18/flang

Removed: 




diff  --git a/flang/include/flang/Parser/provenance.h 
b/flang/include/flang/Parser/provenance.h
index 1f0a0a90e7019..73661d954854a 100644
--- a/flang/include/flang/Parser/provenance.h
+++ b/flang/include/flang/Parser/provenance.h
@@ -173,7 +173,6 @@ class AllSources {
   std::string GetPath(Provenance) const; // __FILE__
   int GetLineNumber(Provenance) const; // __LINE__
   Provenance CompilerInsertionProvenance(char ch);
-  Provenance CompilerInsertionProvenance(const char *, std::size_t);
   ProvenanceRange IntersectionWithSourceFiles(ProvenanceRange) const;
   llvm::raw_ostream &Dump(llvm::raw_ostream &) const;
 

diff  --git a/flang/include/flang/Semantics/symbol.h 
b/flang/include/flang/Semantics/symbol.h
index dc7196cfd5eab..f04b05afd6e4b 100644
--- a/flang/include/flang/Semantics/symbol.h
+++ b/flang/include/flang/Semantics/symbol.h
@@ -356,7 +356,7 @@ class TypeParamDetails {
 };
 
 // Record the USE of a symbol: location is where (USE statement or renaming);
-// symbol is the USEd module.
+// symbol is in the USEd module.
 class UseDetails {
 public:
   UseDetails(const SourceName &location, const Symbol &symbol)

diff  --git a/flang/lib/Semantics/assignment.cpp 
b/flang/lib/Semantics/assignment.cpp
index 090aae0af8cb7..1fae92c61f3cb 100644
--- a/flang/lib/Semantics/assignment.cpp
+++ b/flang/lib/Semantics/assignment.cpp
@@ -70,7 +70,7 @@ void AssignmentContext::Analyze(const parser::AssignmentStmt 
&stmt) {
   const Scope &scope{context_.FindScope(lhsLoc)};
   if (auto whyNot{WhyNotModifiable(lhsLoc, lhs, scope, true)}) {
 if (auto *msg{Say(lhsLoc,
-"Left-hand side of assignment is not modifiable"_err_en_US)}) 
{ // C1158
+"Left-hand side of assignment is not modifiable"_err_en_US)}) {
   msg->Attach(*whyNot);
 }
   }

diff  --git a/flang/tools/f18/flang b/flang/tools/f18/flang
index 01bdffdd20c72..7109cd7f547a9 100644
--- a/flang/tools/f18/flang
+++ b/flang/tools/f18/flang
@@ -12,4 +12,9 @@ module_dir=$wd/include/flang
 if [[ ! -d $module_dir ]]; then
   module_dir=$wd/tools/flang/include/flang
 fi
-$wd/bin/f18 -module-suffix .f18.mod -intrinsic-module-directory $module_dir 
"$@"
+opts="-module-suffix .f18.mod -intrinsic-module-directory $module_dir"
+if ! $wd/bin/f18 $opts "$@"
+then status=$?
+ echo flang: in $PWD, f18 failed with exit status $status: $wd/bin/f18 
$opts "$@" >&2
+ exit $status
+fi



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[llvm-branch-commits] [lld] 8aa3ee2 - [CSSPGO] LTO option for pseudo probe

[Hongtao Yu via llvm-branch-commits]

Author: Hongtao Yu
Date: 2021-01-22T11:07:10-08:00
New Revision: 8aa3ee241d522ee97558dcbe9ae331c9564cda4c

URL: 
https://github.com/llvm/llvm-project/commit/8aa3ee241d522ee97558dcbe9ae331c9564cda4c
DIFF: 
https://github.com/llvm/llvm-project/commit/8aa3ee241d522ee97558dcbe9ae331c9564cda4c.diff

LOG: [CSSPGO] LTO option for pseudo probe

Adding a lld option to support emitting pseudo probe metadata in LTO mode.

Reviewed By: MaskRay, wmi, wenlei

Differential Revision: https://reviews.llvm.org/D95056

Added: 
lld/test/ELF/lto/pseudo-probe-lto.ll

Modified: 
lld/ELF/Config.h
lld/ELF/Driver.cpp
lld/ELF/LTO.cpp
lld/ELF/Options.td

Removed: 




diff  --git a/lld/ELF/Config.h b/lld/ELF/Config.h
index 0ec4cb9a0432..c84b5f5bdfda 100644
--- a/lld/ELF/Config.h
+++ b/lld/ELF/Config.h
@@ -175,6 +175,7 @@ struct Configuration {
   bool ltoDebugPassManager;
   bool ltoEmitAsm;
   bool ltoNewPassManager;
+  bool ltoPseudoProbeForProfiling;
   bool ltoUniqueBasicBlockSectionNames;
   bool ltoWholeProgramVisibility;
   bool mergeArmExidx;

diff  --git a/lld/ELF/Driver.cpp b/lld/ELF/Driver.cpp
index 72d245e5dc01..e0ef61d39ac1 100644
--- a/lld/ELF/Driver.cpp
+++ b/lld/ELF/Driver.cpp
@@ -1005,6 +1005,8 @@ static void readConfigs(opt::InputArgList &args) {
   config->ltoo = args::getInteger(args, OPT_lto_O, 2);
   config->ltoObjPath = args.getLastArgValue(OPT_lto_obj_path_eq);
   config->ltoPartitions = args::getInteger(args, OPT_lto_partitions, 1);
+  config->ltoPseudoProbeForProfiling =
+  args.hasArg(OPT_lto_pseudo_probe_for_profiling);
   config->ltoSampleProfile = args.getLastArgValue(OPT_lto_sample_profile);
   config->ltoBasicBlockSections =
   args.getLastArgValue(OPT_lto_basic_block_sections);

diff  --git a/lld/ELF/LTO.cpp b/lld/ELF/LTO.cpp
index 24d7d9a07a9c..b3d4b7dee9f8 100644
--- a/lld/ELF/LTO.cpp
+++ b/lld/ELF/LTO.cpp
@@ -112,6 +112,7 @@ static lto::Config createConfig() {
 }
   }
 
+  c.Options.PseudoProbeForProfiling = config->ltoPseudoProbeForProfiling;
   c.Options.UniqueBasicBlockSectionNames =
   config->ltoUniqueBasicBlockSectionNames;
 

diff  --git a/lld/ELF/Options.td b/lld/ELF/Options.td
index c50aa84e30e7..0ca283cdfe08 100644
--- a/lld/ELF/Options.td
+++ b/lld/ELF/Options.td
@@ -550,6 +550,8 @@ def lto_sample_profile: JJ<"lto-sample-profile=">,
 defm lto_whole_program_visibility: BB<"lto-whole-program-visibility",
   "Asserts that the LTO link has whole program visibility",
   "Asserts that the LTO link does not have whole program visibility">;
+def lto_pseudo_probe_for_profiling: F<"lto-pseudo-probe-for-profiling">,
+  HelpText<"Emit pseudo probes for sample profiling">;
 def disable_verify: F<"disable-verify">;
 defm mllvm: Eq<"mllvm", "Additional arguments to forward to LLVM's option 
processing">;
 def opt_remarks_filename: Separate<["--"], "opt-remarks-filename">,
@@ -623,6 +625,8 @@ def: F<"plugin-opt=opt-remarks-with-hotness">,
 def: J<"plugin-opt=opt-remarks-hotness-threshold=">,
   Alias,
   HelpText<"Alias for --opt-remarks-hotness-threshold">;
+def: J<"plugin-opt=pseudo-probe-for-profiling">,
+  Alias, HelpText<"Alias for 
--lto-pseudo-probe-for-profiling">;
 def: J<"plugin-opt=sample-profile=">,
   Alias, HelpText<"Alias for --lto-sample-profile">;
 def: F<"plugin-opt=save-temps">, Alias, HelpText<"Alias for 
--save-temps">;

diff  --git a/lld/test/ELF/lto/pseudo-probe-lto.ll 
b/lld/test/ELF/lto/pseudo-probe-lto.ll
new file mode 100644
index ..ae71876087fc
--- /dev/null
+++ b/lld/test/ELF/lto/pseudo-probe-lto.ll
@@ -0,0 +1,36 @@
+; REQUIRES: x86
+; RUN: opt < %s -passes=pseudo-probe -function-sections -o %t.o
+; RUN: ld.lld %t.o -shared --lto-pseudo-probe-for-profiling --lto-emit-asm -o 
- | FileCheck %s
+; RUN: ld.lld %t.o -shared -plugin-opt=pseudo-probe-for-profiling 
--lto-emit-asm -o - | FileCheck %s
+
+target datalayout = 
"e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-scei-ps4"
+
+@g = dso_local global i32 3, align 4
+
+define void @foo(void (i32)* %f) !dbg !4 {
+entry:
+; CHECK: .pseudoprobe  [[#GUID:]] 1 0 0
+; CHECK: .pseudoprobe  [[#GUID]] 2 1 0
+  call void %f(i32 1), !dbg !13
+  %0 = load i32, i32* @g, align 4
+  %inc = add nsw i32 %0, 1
+  store i32 %inc, i32* @g, align 4
+  ret void
+}
+
+; CHECK:  .section 
.pseudo_probe_desc,"G",@progbits,.pseudo_probe_desc_foo,comdat
+; CHECK-NEXT: .quad [[#GUID]]
+; CHECK-NEXT: .quad [[#HASH:]]
+; CHECK-NEXT: .byte  3
+; CHECK-NEXT: .ascii   "foo"
+
+!llvm.dbg.cu = !{!0}
+!llvm.module.flags = !{!9, !10}
+
+!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1)
+!1 = !DIFile(filename: "test.c", directory: "")
+!4 = distinct !DISubprogram(name: "foo", scope: !1, file: !1, line: 2, unit: 
!0)
+!9 = !{i32 2, !"Dwarf Version", i32 4}
+!10 = !{i32 2, !"Debug Info Version", i32 3}
+!13 = !DILocation(line: 2, column: 20, scope: !4)



_

[llvm-branch-commits] [mlir] bce318f - [mlir][Linalg] NFC: Refactor LinalgDependenceGraphElem to allow

[via llvm-branch-commits]

Author: MaheshRavishankar
Date: 2021-01-22T11:19:59-08:00
New Revision: bce318f58da3741e6dce143c6713906f3af3d913

URL: 
https://github.com/llvm/llvm-project/commit/bce318f58da3741e6dce143c6713906f3af3d913
DIFF: 
https://github.com/llvm/llvm-project/commit/bce318f58da3741e6dce143c6713906f3af3d913.diff

LOG: [mlir][Linalg] NFC: Refactor LinalgDependenceGraphElem to allow
representing dependence from producer result to consumer.

With Linalg on tensors the dependence between operations can be from
the result of the producer to the consumer. This change just does a
NFC refactoring of the LinalgDependenceGraphElem to allow representing
both OpResult and OpOperand*.

Differential Revision: https://reviews.llvm.org/D95208

Added: 


Modified: 
mlir/include/mlir/Dialect/Linalg/Analysis/DependenceAnalysis.h
mlir/lib/Dialect/Linalg/Analysis/DependenceAnalysis.cpp
mlir/lib/Dialect/Linalg/Transforms/Fusion.cpp
mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
mlir/test/Dialect/Linalg/fusion-pattern.mlir

Removed: 




diff  --git a/mlir/include/mlir/Dialect/Linalg/Analysis/DependenceAnalysis.h 
b/mlir/include/mlir/Dialect/Linalg/Analysis/DependenceAnalysis.h
index 9aa50c25cd79..5ffe4c6c9461 100644
--- a/mlir/include/mlir/Dialect/Linalg/Analysis/DependenceAnalysis.h
+++ b/mlir/include/mlir/Dialect/Linalg/Analysis/DependenceAnalysis.h
@@ -48,16 +48,104 @@ class LinalgDependenceGraph {
   // TODO: OpOperand tracks dependencies on buffer operands. Tensor result will
   // need an extension to use OpResult.
   struct LinalgDependenceGraphElem {
+using OpView = PointerUnion;
 // dependentOpView may be either:
 //   1. src in the case of dependencesIntoGraphs.
 //   2. dst in the case of dependencesFromDstGraphs.
-OpOperand *dependentOpView;
+OpView dependentOpView;
 // View in the op that is used to index in the graph:
 //   1. src in the case of dependencesFromDstGraphs.
 //   2. dst in the case of dependencesIntoGraphs.
-OpOperand *indexingOpView;
+OpView indexingOpView;
 // Type of the dependence.
 DependenceType dependenceType;
+
+// Return the Operation that owns the operand or result represented in
+// `opView`.
+static Operation *getOwner(OpView opView) {
+  if (OpOperand *operand = opView.dyn_cast())
+return operand->getOwner();
+  return opView.get().cast().getOwner();
+}
+// Return the operand or the result Value represented by the `opView`.
+static Value getValue(OpView opView) {
+  if (OpOperand *operand = opView.dyn_cast())
+return operand->get();
+  return opView.get();
+}
+// Return the indexing map of the operand/result in `opView` specified in
+// the owning LinalgOp. If the owner is not a LinalgOp returns llvm::None.
+static Optional getIndexingMap(OpView opView) {
+  auto owner = dyn_cast(getOwner(opView));
+  if (!owner)
+return llvm::None;
+  if (OpOperand *operand = opView.dyn_cast())
+return owner.getIndexingMap(operand->getOperandNumber());
+  return owner.getOutputIndexingMap(
+  opView.get().cast().getResultNumber());
+}
+// Return the operand number if the `opView` is an OpOperand *. Otherwise
+// return llvm::None.
+static Optional getOperandNumber(OpView opView) {
+  if (OpOperand *operand = opView.dyn_cast())
+return operand->getOperandNumber();
+  return llvm::None;
+}
+// Return the result number if the `opView` is an OpResult. Otherwise 
return
+// llvm::None.
+static Optional getResultNumber(OpView opView) {
+  if (OpResult result = opView.dyn_cast().cast())
+return result.getResultNumber();
+  return llvm::None;
+}
+
+// Return the owner of the dependent OpView.
+Operation *getDependentOp() const { return getOwner(dependentOpView); }
+
+// Return the owner of the indexing OpView.
+Operation *getIndexingOp() const { return getOwner(indexingOpView); }
+
+// Return the operand or result stored in the dependentOpView.
+Value getDependentValue() const { return getValue(dependentOpView); }
+
+// Return the operand or result stored in the indexingOpView.
+Value getIndexingValue() const { return getValue(indexingOpView); }
+
+// If the dependent OpView is an operand, return operand number. Return
+// llvm::None otherwise.
+Optional getDependentOpViewOperandNum() const {
+  return getOperandNumber(dependentOpView);
+}
+
+// If the indexing OpView is an operand, return operand number. Return
+// llvm::None otherwise.
+Optional getIndexingOpViewOperandNum() const {
+  return getOperandNumber(indexingOpView);
+}
+
+// If the dependent OpView is a result value, return the result
+// number. Return llvm::None otherwise.
+Optional getDependentOpViewResultNum() const {
+  return getRe

[llvm-branch-commits] [libcxx] 3317b38 - [NFC][libc++] Update the implementation status.

[Mark de Wever via llvm-branch-commits]

Author: Mark de Wever
Date: 2021-01-22T20:24:33+01:00
New Revision: 3317b38ef86ecee1ae134f419a8ed0f4733444a3

URL: 
https://github.com/llvm/llvm-project/commit/3317b38ef86ecee1ae134f419a8ed0f4733444a3
DIFF: 
https://github.com/llvm/llvm-project/commit/3317b38ef86ecee1ae134f419a8ed0f4733444a3.diff

LOG: [NFC][libc++] Update the implementation status.

During the review of https://reviews.llvm.org/D93912 we failed to notice
the implementation status wasn't updated. This rectifies the issue.

Added: 


Modified: 
libcxx/docs/Cxx2bStatusPaperStatus.csv

Removed: 




diff  --git a/libcxx/docs/Cxx2bStatusPaperStatus.csv 
b/libcxx/docs/Cxx2bStatusPaperStatus.csv
index f5c893fdbd48..c191633bd750 100644
--- a/libcxx/docs/Cxx2bStatusPaperStatus.csv
+++ b/libcxx/docs/Cxx2bStatusPaperStatus.csv
@@ -2,5 +2,5 @@
 "`P0881R7 `__","LWG","A Proposal to add stacktrace 
library","Autumn 2020","",""
 "`P0943R6 `__","LWG","Support C atomics in 
C++","Autumn 2020","",""
 "`P1048R1 `__","LWG","A proposal for a type trait 
to detect scoped enumerations","Autumn 2020","|Complete|","12.0"
-"`P1679R3 `__","LWG","string contains 
function","Autumn 2020","",""
+"`P1679R3 `__","LWG","string contains 
function","Autumn 2020","|Complete|","12.0"
 "","","","","",""



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[llvm-branch-commits] [mlir] 01defcc - [mlir][Linalg] Extend tile+fuse to work on Linalg operation on tensors.

[via llvm-branch-commits]

Author: MaheshRavishankar
Date: 2021-01-22T11:33:35-08:00
New Revision: 01defcc8d74e65f3d304274bc4ede44d838ff22b

URL: 
https://github.com/llvm/llvm-project/commit/01defcc8d74e65f3d304274bc4ede44d838ff22b
DIFF: 
https://github.com/llvm/llvm-project/commit/01defcc8d74e65f3d304274bc4ede44d838ff22b.diff

LOG: [mlir][Linalg] Extend tile+fuse to work on Linalg operation on tensors.

Differential Revision: https://reviews.llvm.org/D93086

Added: 


Modified: 
mlir/include/mlir/Dialect/Linalg/Analysis/DependenceAnalysis.h
mlir/lib/Dialect/Linalg/Analysis/DependenceAnalysis.cpp
mlir/lib/Dialect/Linalg/Transforms/Fusion.cpp
mlir/test/Dialect/Linalg/fusion-sequence.mlir
mlir/test/lib/Transforms/TestLinalgFusionTransforms.cpp

Removed: 




diff  --git a/mlir/include/mlir/Dialect/Linalg/Analysis/DependenceAnalysis.h 
b/mlir/include/mlir/Dialect/Linalg/Analysis/DependenceAnalysis.h
index 5ffe4c6c9461..fecaeff1c8df 100644
--- a/mlir/include/mlir/Dialect/Linalg/Analysis/DependenceAnalysis.h
+++ b/mlir/include/mlir/Dialect/Linalg/Analysis/DependenceAnalysis.h
@@ -247,8 +247,9 @@ class LinalgDependenceGraph {
   // Uses std::pair to keep operations and view together and avoid usage errors
   // related to src/dst and producer/consumer terminology in the context of
   // dependences.
-  void addDependenceElem(DependenceType dt, OpOperand *indexingOpView,
- OpOperand *dependentOpView);
+  void addDependenceElem(DependenceType dt,
+ LinalgDependenceGraphElem::OpView indexingOpView,
+ LinalgDependenceGraphElem::OpView dependentOpView);
 
   /// Implementation detail for findCoveringxxx.
   SmallVector

diff  --git a/mlir/lib/Dialect/Linalg/Analysis/DependenceAnalysis.cpp 
b/mlir/lib/Dialect/Linalg/Analysis/DependenceAnalysis.cpp
index f80a00bf64d4..59004867a333 100644
--- a/mlir/lib/Dialect/Linalg/Analysis/DependenceAnalysis.cpp
+++ b/mlir/lib/Dialect/Linalg/Analysis/DependenceAnalysis.cpp
@@ -113,18 +113,21 @@ LinalgDependenceGraph::LinalgDependenceGraph(Aliases 
&aliases,
   }
 }
 
-void LinalgDependenceGraph::addDependenceElem(DependenceType dt,
-  OpOperand *indexingOpView,
-  OpOperand *dependentOpView) {
+void LinalgDependenceGraph::addDependenceElem(
+DependenceType dt, LinalgDependenceGraphElem::OpView indexingOpView,
+LinalgDependenceGraphElem::OpView dependentOpView) {
   LLVM_DEBUG(dbgs() << "\nAdd dep type " << getDependenceTypeStr(dt) << ":\t ("
-<< indexingOpView->get() << " @"
-<< indexingOpView->getOperandNumber() << ") -> \n\t\t("
-<< dependentOpView->get() << " @"
-<< dependentOpView->getOperandNumber() << ")");
-  dependencesFromGraphs[dt][indexingOpView->getOwner()].push_back(
-  LinalgDependenceGraphElem{dependentOpView, indexingOpView, dt});
-  dependencesIntoGraphs[dt][dependentOpView->getOwner()].push_back(
-  LinalgDependenceGraphElem{indexingOpView, dependentOpView, dt});
+<< LinalgDependenceGraphElem::getValue(indexingOpView)
+<< " @) -> \n\t\t("
+<< LinalgDependenceGraphElem::getValue(dependentOpView)
+<< " @)");
+  
dependencesFromGraphs[dt][LinalgDependenceGraphElem::getOwner(indexingOpView)]
+  .push_back(
+  LinalgDependenceGraphElem{dependentOpView, indexingOpView, dt});
+  dependencesIntoGraphs[dt]
+   [LinalgDependenceGraphElem::getOwner(dependentOpView)]
+   .push_back(LinalgDependenceGraphElem{
+   indexingOpView, dependentOpView, dt});
 }
 
 LinalgDependenceGraph::dependence_range
@@ -158,6 +161,18 @@ LinalgDependenceGraph::getDependencesInto(
 }
 
 void LinalgDependenceGraph::addDependencesBetween(LinalgOp src, LinalgOp dst) {
+  if (src.hasTensorSemantics() && dst.hasTensorSemantics()) {
+for (OpOperand &dstOpOperand : dst.getInputOpOperands()) {
+  // Check if the operand is defined by the src.
+  auto definingOp = dstOpOperand.get().getDefiningOp();
+  if (definingOp && definingOp == src)
+addDependenceElem(DependenceType::RAW, dstOpOperand.get(),
+  &dstOpOperand);
+}
+return;
+  }
+  assert(src.hasBufferSemantics() && dst.hasBufferSemantics() &&
+ "unhandled dependence tracking for mixed buffer/tensor operations");
   for (OpOperand *srcOpOperand : src.getOutputBuffersOpOperands()) { // W
 // RAW graph
 for (OpOperand *dstOpOperand : dst.getInputBuffersOpOperands()) // R

diff  --git a/mlir/lib/Dialect/Linalg/Transforms/Fusion.cpp 
b/mlir/lib/Dialect/Linalg/Transforms/Fusion.cpp
index 5d37e8f9d782..714bb0f9 100644
--- a/mlir/lib/Dialect/Linalg/Transforms/Fusion.cpp
+++ b/mlir/lib/Dialect/L

[llvm-branch-commits] [mlir] 73de3df - Add more explicit assert for failures

[Jacques Pienaar via llvm-branch-commits]

Author: Jacques Pienaar
Date: 2021-01-22T11:45:25-08:00
New Revision: 73de3df1d28523dbd67dd54594480d126e27b559

URL: 
https://github.com/llvm/llvm-project/commit/73de3df1d28523dbd67dd54594480d126e27b559
DIFF: 
https://github.com/llvm/llvm-project/commit/73de3df1d28523dbd67dd54594480d126e27b559.diff

LOG: Add more explicit assert for failures

Differential Revision: https://reviews.llvm.org/D95201

Added: 


Modified: 
mlir/lib/IR/BuiltinTypes.cpp

Removed: 




diff  --git a/mlir/lib/IR/BuiltinTypes.cpp b/mlir/lib/IR/BuiltinTypes.cpp
index 34283e95b8f5..23553a8483de 100644
--- a/mlir/lib/IR/BuiltinTypes.cpp
+++ b/mlir/lib/IR/BuiltinTypes.cpp
@@ -214,7 +214,10 @@ int64_t ShapedType::getNumElements() const {
   return num;
 }
 
-int64_t ShapedType::getRank() const { return getShape().size(); }
+int64_t ShapedType::getRank() const {
+  assert(hasRank() && "cannot query rank of unranked shaped type");
+  return getShape().size();
+}
 
 bool ShapedType::hasRank() const {
   return !isa();



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[llvm-branch-commits] [libcxx] faa4407 - [libc++] Bring back mach_absolute_time implementation of steady_clock

[Louis Dionne via llvm-branch-commits]

Author: Louis Dionne
Date: 2021-01-22T14:54:16-05:00
New Revision: faa440786ccf0c2846385c882426d207acbab49c

URL: 
https://github.com/llvm/llvm-project/commit/faa440786ccf0c2846385c882426d207acbab49c
DIFF: 
https://github.com/llvm/llvm-project/commit/faa440786ccf0c2846385c882426d207acbab49c.diff

LOG: [libc++] Bring back mach_absolute_time implementation of steady_clock

This is meant to unblock Chrome, as discussed in https://llvm.org/D74489.

Differential Revision: https://reviews.llvm.org/D95177

Added: 


Modified: 
libcxx/src/chrono.cpp

Removed: 




diff  --git a/libcxx/src/chrono.cpp b/libcxx/src/chrono.cpp
index 5291d4fa8dc6..085fbfde26c1 100644
--- a/libcxx/src/chrono.cpp
+++ b/libcxx/src/chrono.cpp
@@ -33,6 +33,10 @@
 #  endif
 #endif // defined(_LIBCPP_WIN32API)
 
+#if __has_include()
+# include 
+#endif
+
 #if defined(__ELF__) && defined(_LIBCPP_LINK_RT_LIB)
 #  pragma comment(lib, "rt")
 #endif
@@ -121,6 +125,59 @@ system_clock::from_time_t(time_t t) _NOEXCEPT
 
 #if defined(__APPLE__)
 
+// TODO(ldionne):
+// This old implementation of steady_clock is retained until Chrome drops 
supports
+// for macOS < 10.12. The issue is that they link libc++ statically into their
+// application, which means that libc++ must support being built for such 
deployment
+// targets. See https://llvm.org/D74489 for details.
+#if (defined(__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__) && 
__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__ < 101200) || \
+(defined(__ENVIRONMENT_IPHONE_OS_VERSION_MIN_REQUIRED__) && 
__ENVIRONMENT_IPHONE_OS_VERSION_MIN_REQUIRED__ < 10) || \
+(defined(__ENVIRONMENT_TV_OS_VERSION_MIN_REQUIRED__) && 
__ENVIRONMENT_TV_OS_VERSION_MIN_REQUIRED__ < 10) || \
+(defined(__ENVIRONMENT_WATCH_OS_VERSION_MIN_REQUIRED__) && 
__ENVIRONMENT_WATCH_OS_VERSION_MIN_REQUIRED__ < 3)
+# define _LIBCPP_USE_OLD_MACH_ABSOLUTE_TIME
+#endif
+
+#if defined(_LIBCPP_USE_OLD_MACH_ABSOLUTE_TIME)
+
+//   mach_absolute_time() * MachInfo.numer / MachInfo.denom is the number of
+//   nanoseconds since the computer booted up.  MachInfo.numer and 
MachInfo.denom
+//   are run time constants supplied by the OS.  This clock has no relationship
+//   to the Gregorian calendar.  It's main use is as a high resolution timer.
+
+// MachInfo.numer / MachInfo.denom is often 1 on the latest equipment.  
Specialize
+//   for that case as an optimization.
+
+static steady_clock::rep steady_simplified() {
+return static_cast(mach_absolute_time());
+}
+static double compute_steady_factor() {
+mach_timebase_info_data_t MachInfo;
+mach_timebase_info(&MachInfo);
+return static_cast(MachInfo.numer) / MachInfo.denom;
+}
+
+static steady_clock::rep steady_full() {
+static const double factor = compute_steady_factor();
+return static_cast(mach_absolute_time() * factor);
+}
+
+typedef steady_clock::rep (*FP)();
+
+static FP init_steady_clock() {
+mach_timebase_info_data_t MachInfo;
+mach_timebase_info(&MachInfo);
+if (MachInfo.numer == MachInfo.denom)
+return &steady_simplified;
+return &steady_full;
+}
+
+static steady_clock::time_point __libcpp_steady_clock_now() {
+static FP fp = init_steady_clock();
+return steady_clock::time_point(steady_clock::duration(fp()));
+}
+
+#else // v default behavior for Apple platforms  v
+
 // On Apple platforms, only CLOCK_UPTIME_RAW, CLOCK_MONOTONIC_RAW or
 // mach_absolute_time are able to time functions in the nanosecond range.
 // Furthermore, only CLOCK_MONOTONIC_RAW is truly monotonic, because it
@@ -133,6 +190,8 @@ static steady_clock::time_point __libcpp_steady_clock_now() 
{
 return steady_clock::time_point(seconds(tp.tv_sec) + 
nanoseconds(tp.tv_nsec));
 }
 
+#endif
+
 #elif defined(_LIBCPP_WIN32API)
 
 // 
https://msdn.microsoft.com/en-us/library/windows/desktop/ms644905(v=vs.85).aspx 
says:



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[llvm-branch-commits] [llvm] 45b259f - [SimplifyLibCalls] Skip unused calls in sincos transform

[Nikita Popov via llvm-branch-commits]

Author: Nikita Popov
Date: 2021-01-22T20:57:13+01:00
New Revision: 45b259f99509dda6820e09369d84c21d4ea33bcd

URL: 
https://github.com/llvm/llvm-project/commit/45b259f99509dda6820e09369d84c21d4ea33bcd
DIFF: 
https://github.com/llvm/llvm-project/commit/45b259f99509dda6820e09369d84c21d4ea33bcd.diff

LOG: [SimplifyLibCalls] Skip unused calls in sincos transform

If the call result is unused, we should let it get DCEd rather
than replacing it. Also, don't try to replace an existing sincos
with another one (unless it's as part of combining sin and cos).

This avoids an infinite combine loop if the calls are not DCEd
as expected, which can happen with D94106 and lack of willreturn
annotation in hand-crafted IR.

Added: 


Modified: 
llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp

Removed: 




diff  --git a/llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp 
b/llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
index b68e45363811..4cb4e8848523 100644
--- a/llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
+++ b/llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
@@ -2187,7 +2187,7 @@ Value *LibCallSimplifier::optimizeSinCosPi(CallInst *CI, 
IRBuilderBase &B) {
 classifyArgUse(U, F, IsFloat, SinCalls, CosCalls, SinCosCalls);
 
   // It's only worthwhile if both sinpi and cospi are actually used.
-  if (SinCosCalls.empty() && (SinCalls.empty() || CosCalls.empty()))
+  if (SinCalls.empty() || CosCalls.empty())
 return nullptr;
 
   Value *Sin, *Cos, *SinCos;
@@ -2213,7 +2213,7 @@ void LibCallSimplifier::classifyArgUse(
 SmallVectorImpl &SinCosCalls) {
   CallInst *CI = dyn_cast(Val);
 
-  if (!CI)
+  if (!CI || CI->use_empty())
 return;
 
   // Don't consider calls in other functions.



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[llvm-branch-commits] [llvm] 975086b - Remove obsolete TODOs

[Julian Lettner via llvm-branch-commits]

Author: Julian Lettner
Date: 2021-01-22T12:03:03-08:00
New Revision: 975086b10a6f1ce5a9b78783f085c0da454c30bc

URL: 
https://github.com/llvm/llvm-project/commit/975086b10a6f1ce5a9b78783f085c0da454c30bc
DIFF: 
https://github.com/llvm/llvm-project/commit/975086b10a6f1ce5a9b78783f085c0da454c30bc.diff

LOG: Remove obsolete TODOs

Remove a few of my own TODOs that I will not have time to fix from lit
code.

Added: 


Modified: 
llvm/utils/lit/lit/cl_arguments.py

Removed: 




diff  --git a/llvm/utils/lit/lit/cl_arguments.py 
b/llvm/utils/lit/lit/cl_arguments.py
index 591d4f9aaafb..ce49c3c48a97 100644
--- a/llvm/utils/lit/lit/cl_arguments.py
+++ b/llvm/utils/lit/lit/cl_arguments.py
@@ -116,7 +116,7 @@ def parse_args():
 dest="maxIndividualTestTime",
 help="Maximum time to spend running a single test (in seconds). "
  "0 means no time limit. [Default: 0]",
-type=_non_negative_int) # TODO(yln): --[no-]test-timeout, instead 
of 0 allowed
+type=_non_negative_int)
 execution_group.add_argument("--max-failures",
 help="Stop execution after the given number of failures.",
 type=_positive_int)
@@ -135,15 +135,15 @@ def parse_args():
 metavar="N",
 help="Maximum number of tests to run",
 type=_positive_int)
-selection_group.add_argument("--max-time", #TODO(yln): --timeout
+selection_group.add_argument("--max-time",
 dest="timeout",
 metavar="N",
 help="Maximum time to spend testing (in seconds)",
 type=_positive_int)
-selection_group.add_argument("--shuffle",   # TODO(yln): --order=random
-help="Run tests in random order",   # default or 'by-path' (+ 
isEarlyTest())
+selection_group.add_argument("--shuffle",
+help="Run tests in random order",
 action="store_true")
-selection_group.add_argument("-i", "--incremental",  # TODO(yln): 
--order=failing-first
+selection_group.add_argument("-i", "--incremental",
 help="Run modified and failing tests first (updates mtimes)",
 action="store_true")
 selection_group.add_argument("--filter",
@@ -151,7 +151,7 @@ def parse_args():
 type=_case_insensitive_regex,
 help="Only run tests with paths matching the given regular 
expression",
 default=os.environ.get("LIT_FILTER", ".*"))
-selection_group.add_argument("--num-shards", # TODO(yln): --shards N/M
+selection_group.add_argument("--num-shards",
 dest="numShards",
 metavar="M",
 help="Split testsuite into M pieces and only run one",



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[llvm-branch-commits] [mlir] 29d420e - [mlir][OpFormatGen] Add support for anchoring optional groups with types

[River Riddle via llvm-branch-commits]

Author: River Riddle
Date: 2021-01-22T12:07:27-08:00
New Revision: 29d420e0bf0273cdef35b2d2453f0f574d1e8313

URL: 
https://github.com/llvm/llvm-project/commit/29d420e0bf0273cdef35b2d2453f0f574d1e8313
DIFF: 
https://github.com/llvm/llvm-project/commit/29d420e0bf0273cdef35b2d2453f0f574d1e8313.diff

LOG: [mlir][OpFormatGen] Add support for anchoring optional groups with types

This revision adds support for using either operand or result types to anchor 
an optional group. It also removes the arbitrary restriction that type 
directives must refer to variables in the same group, which is overly limiting 
for a declarative format syntax.

Fixes PR#48784

Differential Revision: https://reviews.llvm.org/D95109

Added: 


Modified: 
mlir/docs/OpDefinitions.md
mlir/test/lib/Dialect/Test/TestOps.td
mlir/test/mlir-tblgen/op-format-spec.td
mlir/test/mlir-tblgen/op-format.mlir
mlir/tools/mlir-tblgen/OpFormatGen.cpp

Removed: 




diff  --git a/mlir/docs/OpDefinitions.md b/mlir/docs/OpDefinitions.md
index dd522904dd73..8a7f6a238732 100644
--- a/mlir/docs/OpDefinitions.md
+++ b/mlir/docs/OpDefinitions.md
@@ -777,8 +777,8 @@ information. An optional group is defined by wrapping a set 
of elements within
 *   The first element of the group must either be a attribute, literal, 
operand,
 or region.
 -   This is because the first element must be optionally parsable.
-*   Exactly one argument variable within the group must be marked as the anchor
-of the group.
+*   Exactly one argument variable or type directive within the group must be
+marked as the anchor of the group.
 -   The anchor is the element whose presence controls whether the group
 should be printed/parsed.
 -   An element is marked as the anchor by adding a trailing `^`.
@@ -789,11 +789,9 @@ information. An optional group is defined by wrapping a 
set of elements within
 valid elements within the group.
 -   Any attribute variable may be used, but only optional attributes can be
 marked as the anchor.
--   Only variadic or optional operand arguments can be used.
+-   Only variadic or optional results and operand arguments and can be 
used.
 -   All region variables can be used. When a non-variable length region is
 used, if the group is not present the region is empty.
--   The operands to a type directive must be defined within the optional
-group.
 
 An example of an operation with an optional group is `std.return`, which has a
 variadic number of operands.

diff  --git a/mlir/test/lib/Dialect/Test/TestOps.td 
b/mlir/test/lib/Dialect/Test/TestOps.td
index d1cbe77ac21b..89d2ee87356b 100644
--- a/mlir/test/lib/Dialect/Test/TestOps.td
+++ b/mlir/test/lib/Dialect/Test/TestOps.td
@@ -1571,6 +1571,25 @@ def FormatOptionalOperandResultBOp : 
FormatOptionalOperandResultOpBase<"b", [{
   (`[` $variadic^ `]`)? attr-dict
 }]>;
 
+// Test optional result type formatting.
+class FormatOptionalResultOpBase
+: TEST_Op<"format_optional_result_" # suffix # "_op",
+  [AttrSizedResultSegments]> {
+  let results = (outs Optional:$optional, Variadic:$variadic);
+  let assemblyFormat = fmt;
+}
+def FormatOptionalResultAOp : FormatOptionalResultOpBase<"a", [{
+  (`:` type($optional)^ `->` type($variadic))? attr-dict
+}]>;
+
+def FormatOptionalResultBOp : FormatOptionalResultOpBase<"b", [{
+  (`:` type($optional) `->` type($variadic)^)? attr-dict
+}]>;
+
+def FormatOptionalResultCOp : FormatOptionalResultOpBase<"c", [{
+  (`:` functional-type($optional, $variadic)^)? attr-dict
+}]>;
+
 def FormatTwoVariadicOperandsNoBuildableTypeOp
 : TEST_Op<"format_two_variadic_operands_no_buildable_type_op",
   [AttrSizedOperandSegments]> {

diff  --git a/mlir/test/mlir-tblgen/op-format-spec.td 
b/mlir/test/mlir-tblgen/op-format-spec.td
index 424dbb83c276..652bbd08679d 100644
--- a/mlir/test/mlir-tblgen/op-format-spec.td
+++ b/mlir/test/mlir-tblgen/op-format-spec.td
@@ -333,7 +333,7 @@ def OptionalInvalidC : TestFormat_Op<"optional_invalid_c", 
[{
 def OptionalInvalidD : TestFormat_Op<"optional_invalid_d", [{
   (type($operand) $operand^)? attr-dict
 }]>, Arguments<(ins Optional:$operand)>;
-// CHECK: error: type directive can only refer to variables within the 
optional group
+// CHECK: error: only literals, types, and variables can be used within an 
optional group
 def OptionalInvalidE : TestFormat_Op<"optional_invalid_e", [{
   (`,` $attr^ type(operands))? attr-dict
 }]>, Arguments<(ins OptionalAttr:$attr)>;
@@ -349,9 +349,9 @@ def OptionalInvalidG : TestFormat_Op<"optional_invalid_g", 
[{
 def OptionalInvalidH : TestFormat_Op<"optional_invalid_h", [{
   ($arg^) attr-dict
 }]>, Arguments<(ins I64:$arg)>;
-// CHECK: error: only variables can be used to anchor an optional group
+// CHECK: error: only literals, types, and variables can be used within an 
optional group
 def Opti

[llvm-branch-commits] [clang] ea2cfda - [CGExpr] Use getCharWidth() more consistently in CCGExprConstant. NFC

[Bjorn Pettersson via llvm-branch-commits]

Author: Bjorn Pettersson
Date: 2021-01-22T21:12:17+01:00
New Revision: ea2cfda386f1a0f0b8cab06a9400bbf4cf7bfbaa

URL: 
https://github.com/llvm/llvm-project/commit/ea2cfda386f1a0f0b8cab06a9400bbf4cf7bfbaa
DIFF: 
https://github.com/llvm/llvm-project/commit/ea2cfda386f1a0f0b8cab06a9400bbf4cf7bfbaa.diff

LOG: [CGExpr] Use getCharWidth() more consistently in CCGExprConstant. NFC

Most of CGExprConstant.cpp is using the CharUnits abstraction
and is using getCharWidth() (directly of indirectly) when converting
between size of a char and size in bits. This patch is making that
abstraction more consistent by adding CharTy to the CodeGenTypeCache
(honoring getCharWidth() when mapping from char to LLVM IR types,
instead of using Int8Ty directly).

Reviewed By: rjmccall

Differential Revision: https://reviews.llvm.org/D94979

Added: 


Modified: 
clang/lib/CodeGen/CGExprConstant.cpp
clang/lib/CodeGen/CodeGenModule.cpp
clang/lib/CodeGen/CodeGenTypeCache.h

Removed: 




diff  --git a/clang/lib/CodeGen/CGExprConstant.cpp 
b/clang/lib/CodeGen/CGExprConstant.cpp
index ca1d3a937fa87..497f9c04c9f80 100644
--- a/clang/lib/CodeGen/CGExprConstant.cpp
+++ b/clang/lib/CodeGen/CGExprConstant.cpp
@@ -58,14 +58,14 @@ struct ConstantAggregateBuilderUtils {
   }
 
   llvm::Constant *getPadding(CharUnits PadSize) const {
-llvm::Type *Ty = CGM.Int8Ty;
+llvm::Type *Ty = CGM.CharTy;
 if (PadSize > CharUnits::One())
   Ty = llvm::ArrayType::get(Ty, PadSize.getQuantity());
 return llvm::UndefValue::get(Ty);
   }
 
   llvm::Constant *getZeroes(CharUnits ZeroSize) const {
-llvm::Type *Ty = llvm::ArrayType::get(CGM.Int8Ty, ZeroSize.getQuantity());
+llvm::Type *Ty = llvm::ArrayType::get(CGM.CharTy, ZeroSize.getQuantity());
 return llvm::ConstantAggregateZero::get(Ty);
   }
 };
@@ -1069,7 +1069,7 @@ class ConstExprEmitter :
 
   assert(CurSize <= TotalSize && "Union size mismatch!");
   if (unsigned NumPadBytes = TotalSize - CurSize) {
-llvm::Type *Ty = CGM.Int8Ty;
+llvm::Type *Ty = CGM.CharTy;
 if (NumPadBytes > 1)
   Ty = llvm::ArrayType::get(Ty, NumPadBytes);
 

diff  --git a/clang/lib/CodeGen/CodeGenModule.cpp 
b/clang/lib/CodeGen/CodeGenModule.cpp
index 18d633911f555..d93c9690cfb2d 100644
--- a/clang/lib/CodeGen/CodeGenModule.cpp
+++ b/clang/lib/CodeGen/CodeGenModule.cpp
@@ -123,6 +123,8 @@ CodeGenModule::CodeGenModule(ASTContext &C, const 
HeaderSearchOptions &HSO,
 
C.toCharUnitsFromBits(C.getTargetInfo().getMaxPointerWidth()).getQuantity();
   IntAlignInBytes =
 C.toCharUnitsFromBits(C.getTargetInfo().getIntAlign()).getQuantity();
+  CharTy =
+llvm::IntegerType::get(LLVMContext, C.getTargetInfo().getCharWidth());
   IntTy = llvm::IntegerType::get(LLVMContext, C.getTargetInfo().getIntWidth());
   IntPtrTy = llvm::IntegerType::get(LLVMContext,
 C.getTargetInfo().getMaxPointerWidth());

diff  --git a/clang/lib/CodeGen/CodeGenTypeCache.h 
b/clang/lib/CodeGen/CodeGenTypeCache.h
index 20a3263c0b1ad..f258234fb4d8f 100644
--- a/clang/lib/CodeGen/CodeGenTypeCache.h
+++ b/clang/lib/CodeGen/CodeGenTypeCache.h
@@ -41,6 +41,9 @@ struct CodeGenTypeCache {
   /// int
   llvm::IntegerType *IntTy;
 
+  /// char
+  llvm::IntegerType *CharTy;
+
   /// intptr_t, size_t, and ptr
diff _t, which we assume are the same size.
   union {
 llvm::IntegerType *IntPtrTy;



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[llvm-branch-commits] [clang] 72f863f - [CodeGen] Use getCharWidth() more consistently in CGRecordLowering. NFC

[Bjorn Pettersson via llvm-branch-commits]

Author: Bjorn Pettersson
Date: 2021-01-22T21:12:17+01:00
New Revision: 72f863fd37c3471e7e1b152ac613da00ab6faaba

URL: 
https://github.com/llvm/llvm-project/commit/72f863fd37c3471e7e1b152ac613da00ab6faaba
DIFF: 
https://github.com/llvm/llvm-project/commit/72f863fd37c3471e7e1b152ac613da00ab6faaba.diff

LOG: [CodeGen] Use getCharWidth() more consistently in CGRecordLowering. NFC

When using getByteArrayType the requested size is calculated in
char units, but the type used for the array was hardcoded to the
Int8Ty. This patch is using getCharWIdth a bit more consistently
by using getIntNTy in combination with getCharWidth, instead
of explictly using getInt8Ty.

Reviewed By: rjmccall

Differential Revision: https://reviews.llvm.org/D94977

Added: 


Modified: 
clang/lib/CodeGen/CGRecordLayoutBuilder.cpp

Removed: 




diff  --git a/clang/lib/CodeGen/CGRecordLayoutBuilder.cpp 
b/clang/lib/CodeGen/CGRecordLayoutBuilder.cpp
index 880342dfed1f..cf8313f92587 100644
--- a/clang/lib/CodeGen/CGRecordLayoutBuilder.cpp
+++ b/clang/lib/CodeGen/CGRecordLayoutBuilder.cpp
@@ -127,15 +127,20 @@ struct CGRecordLowering {
 
   /// Wraps llvm::Type::getIntNTy with some implicit arguments.
   llvm::Type *getIntNType(uint64_t NumBits) {
+unsigned AlignedBits = llvm::alignTo(NumBits, Context.getCharWidth());
+return llvm::Type::getIntNTy(Types.getLLVMContext(), AlignedBits);
+  }
+  /// Get the LLVM type sized as one character unit.
+  llvm::Type *getCharType() {
 return llvm::Type::getIntNTy(Types.getLLVMContext(),
- (unsigned)llvm::alignTo(NumBits, 8));
+ Context.getCharWidth());
   }
-  /// Gets an llvm type of size NumBytes and alignment 1.
-  llvm::Type *getByteArrayType(CharUnits NumBytes) {
-assert(!NumBytes.isZero() && "Empty byte arrays aren't allowed.");
-llvm::Type *Type = llvm::Type::getInt8Ty(Types.getLLVMContext());
-return NumBytes == CharUnits::One() ? Type :
-(llvm::Type *)llvm::ArrayType::get(Type, NumBytes.getQuantity());
+  /// Gets an llvm type of size NumChars and alignment 1.
+  llvm::Type *getByteArrayType(CharUnits NumChars) {
+assert(!NumChars.isZero() && "Empty byte arrays aren't allowed.");
+llvm::Type *Type = getCharType();
+return NumChars == CharUnits::One() ? Type :
+(llvm::Type *)llvm::ArrayType::get(Type, NumChars.getQuantity());
   }
   /// Gets the storage type for a field decl and handles storage
   /// for itanium bitfields that are smaller than their declared type.



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[llvm-branch-commits] [libcxx] b973e2e - [libc++] Introduce __bits

[Thorsten Schütt via llvm-branch-commits]

Author: Thorsten Schütt
Date: 2021-01-22T21:20:23+01:00
New Revision: b973e2e2f27ede7a70d470ea537f1901759d239d

URL: 
https://github.com/llvm/llvm-project/commit/b973e2e2f27ede7a70d470ea537f1901759d239d
DIFF: 
https://github.com/llvm/llvm-project/commit/b973e2e2f27ede7a70d470ea537f1901759d239d.diff

LOG: [libc++] Introduce __bits

It has the low-level bit fiddling operations from bit. It eliminates a cyclic 
dependency between __bit_reference, bits, and vector. I want to exploit this in 
later patches.

Reviewed By: #libc, ldionne

Differential Revision: https://reviews.llvm.org/D94908

Added: 
libcxx/include/__bits

Modified: 
libcxx/include/CMakeLists.txt
libcxx/include/__bit_reference
libcxx/include/bit
libcxx/include/module.modulemap

Removed: 




diff  --git a/libcxx/include/CMakeLists.txt b/libcxx/include/CMakeLists.txt
index 2ffdf07efcd4..77e5e556d684 100644
--- a/libcxx/include/CMakeLists.txt
+++ b/libcxx/include/CMakeLists.txt
@@ -1,6 +1,7 @@
 set(files
   __availability
   __bit_reference
+  __bits
   __bsd_locale_defaults.h
   __bsd_locale_fallbacks.h
   __debug

diff  --git a/libcxx/include/__bit_reference b/libcxx/include/__bit_reference
index 284ed0fb0d54..9cfb4b84e653 100644
--- a/libcxx/include/__bit_reference
+++ b/libcxx/include/__bit_reference
@@ -11,7 +11,7 @@
 #define _LIBCPP___BIT_REFERENCE
 
 #include <__config>
-#include 
+#include <__bits>
 #include 
 
 #if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER)

diff  --git a/libcxx/include/__bits b/libcxx/include/__bits
new file mode 100644
index ..0d321da92285
--- /dev/null
+++ b/libcxx/include/__bits
@@ -0,0 +1,146 @@
+// -*- C++ -*-
+//===--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef _LIBCPP___BITS
+#define _LIBCPP___BITS
+
+#include <__config>
+
+#if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER)
+#pragma GCC system_header
+#endif
+
+_LIBCPP_PUSH_MACROS
+#include <__undef_macros>
+
+
+_LIBCPP_BEGIN_NAMESPACE_STD
+
+#ifndef _LIBCPP_COMPILER_MSVC
+
+inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR
+int __libcpp_ctz(unsigned __x)   _NOEXCEPT { return 
__builtin_ctz(__x); }
+
+inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR
+int __libcpp_ctz(unsigned long __x)  _NOEXCEPT { return 
__builtin_ctzl(__x); }
+
+inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR
+int __libcpp_ctz(unsigned long long __x) _NOEXCEPT { return 
__builtin_ctzll(__x); }
+
+
+inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR
+int __libcpp_clz(unsigned __x)   _NOEXCEPT { return 
__builtin_clz(__x); }
+
+inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR
+int __libcpp_clz(unsigned long __x)  _NOEXCEPT { return 
__builtin_clzl(__x); }
+
+inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR
+int __libcpp_clz(unsigned long long __x) _NOEXCEPT { return 
__builtin_clzll(__x); }
+
+
+inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR
+int __libcpp_popcount(unsigned __x)   _NOEXCEPT { return 
__builtin_popcount(__x); }
+
+inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR
+int __libcpp_popcount(unsigned long __x)  _NOEXCEPT { return 
__builtin_popcountl(__x); }
+
+inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR
+int __libcpp_popcount(unsigned long long __x) _NOEXCEPT { return 
__builtin_popcountll(__x); }
+
+#else  // _LIBCPP_COMPILER_MSVC
+
+// Precondition:  __x != 0
+inline _LIBCPP_INLINE_VISIBILITY
+int __libcpp_ctz(unsigned __x) {
+  static_assert(sizeof(unsigned) == sizeof(unsigned long), "");
+  static_assert(sizeof(unsigned long) == 4, "");
+  unsigned long __where;
+  if (_BitScanForward(&__where, __x))
+return static_cast(__where);
+  return 32;
+}
+
+inline _LIBCPP_INLINE_VISIBILITY
+int __libcpp_ctz(unsigned long __x) {
+static_assert(sizeof(unsigned long) == sizeof(unsigned), "");
+return __ctz(static_cast(__x));
+}
+
+inline _LIBCPP_INLINE_VISIBILITY
+int __libcpp_ctz(unsigned long long __x) {
+unsigned long __where;
+#if defined(_LIBCPP_HAS_BITSCAN64)
+(defined(_M_AMD64) || defined(__x86_64__))
+  if (_BitScanForward64(&__where, __x))
+return static_cast(__where);
+#else
+  // Win32 doesn't have _BitScanForward64 so emulate it with two 32 bit calls.
+  if (_BitScanForward(&__where, static_cast(__x)))
+return static_cast(__where);
+  if (_BitScanForward(&__where, static_cast(__x >> 32)))
+return static_cast(__where + 32);
+#endif
+  return 64;
+}
+
+// Precondition:  __x != 0
+inline _LIBCPP_INLINE_VISIBILITY
+int __libcpp_clz(unsigned __x) {
+  static_assert(sizeof(unsigned) == sizeof(unsigned long), "");
+  static_assert(sizeof(unsigned long) ==

[llvm-branch-commits] [llvm] 42d682a - [NewPM][AMDGPU] Skip adding CGSCCOptimizerLate callbacks at O0

[Arthur Eubanks via llvm-branch-commits]

Author: Arthur Eubanks
Date: 2021-01-22T12:29:39-08:00
New Revision: 42d682a217b6e04318d11d374e29d7d94ceaed1f

URL: 
https://github.com/llvm/llvm-project/commit/42d682a217b6e04318d11d374e29d7d94ceaed1f
DIFF: 
https://github.com/llvm/llvm-project/commit/42d682a217b6e04318d11d374e29d7d94ceaed1f.diff

LOG: [NewPM][AMDGPU] Skip adding CGSCCOptimizerLate callbacks at O0

The legacy PM's EP_CGSCCOptimizerLate was only used under not-O0.

Fixes clang/test/CodeGenCXX/cxx0x-initializer-stdinitializerlist.cpp under the 
new PM.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D95250

Added: 


Modified: 
llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp

Removed: 




diff  --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp 
b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
index 38e3966cc150..ce7c82e2a88a 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
@@ -579,24 +579,27 @@ void 
AMDGPUTargetMachine::registerPassBuilderCallbacks(PassBuilder &PB,
   PB.registerCGSCCOptimizerLateEPCallback(
   [this, DebugPassManager](CGSCCPassManager &PM,
PassBuilder::OptimizationLevel Level) {
-  FunctionPassManager FPM(DebugPassManager);
+if (Level == PassBuilder::OptimizationLevel::O0)
+  return;
 
-  // Add infer address spaces pass to the opt pipeline after inlining
-  // but before SROA to increase SROA opportunities.
-  FPM.addPass(InferAddressSpacesPass());
+FunctionPassManager FPM(DebugPassManager);
 
-  // This should run after inlining to have any chance of doing
-  // anything, and before other cleanup optimizations.
-  FPM.addPass(AMDGPULowerKernelAttributesPass());
+// Add infer address spaces pass to the opt pipeline after inlining
+// but before SROA to increase SROA opportunities.
+FPM.addPass(InferAddressSpacesPass());
 
-  if (Level != PassBuilder::OptimizationLevel::O0) {
-// Promote alloca to vector before SROA and loop unroll. If we
-// manage to eliminate allocas before unroll we may choose to 
unroll
-// less.
-FPM.addPass(AMDGPUPromoteAllocaToVectorPass(*this));
-  }
+// This should run after inlining to have any chance of doing
+// anything, and before other cleanup optimizations.
+FPM.addPass(AMDGPULowerKernelAttributesPass());
+
+if (Level != PassBuilder::OptimizationLevel::O0) {
+  // Promote alloca to vector before SROA and loop unroll. If we
+  // manage to eliminate allocas before unroll we may choose to unroll
+  // less.
+  FPM.addPass(AMDGPUPromoteAllocaToVectorPass(*this));
+}
 
-  PM.addPass(createCGSCCToFunctionPassAdaptor(std::move(FPM)));
+PM.addPass(createCGSCCToFunctionPassAdaptor(std::move(FPM)));
   });
 }
 



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[llvm-branch-commits] [llvm] 9d27962 - [Tests] Add willreturn to libcalls in some tests

[Nikita Popov via llvm-branch-commits]

Author: Nikita Popov
Date: 2021-01-22T21:47:35+01:00
New Revision: 9d2796210f71f95d0c62337c130a455694ce99a5

URL: 
https://github.com/llvm/llvm-project/commit/9d2796210f71f95d0c62337c130a455694ce99a5
DIFF: 
https://github.com/llvm/llvm-project/commit/9d2796210f71f95d0c62337c130a455694ce99a5.diff

LOG: [Tests] Add willreturn to libcalls in some tests

Willreturn would be inferred by FuncAttrs for these. Annotate them
to preserve test behavior in the future.

Added: 


Modified: 
llvm/test/Transforms/Attributor/nonnull.ll
llvm/test/Transforms/DCE/calls-errno.ll
llvm/test/Transforms/InstSimplify/ConstProp/calls-math-finite.ll
llvm/test/Transforms/InstSimplify/ConstProp/calls.ll
llvm/test/Transforms/InstSimplify/ConstProp/round.ll
llvm/test/Transforms/InstSimplify/ConstProp/trunc.ll

Removed: 




diff  --git a/llvm/test/Transforms/Attributor/nonnull.ll 
b/llvm/test/Transforms/Attributor/nonnull.ll
index cc3ae684b09f..3c836e4e5c28 100644
--- a/llvm/test/Transforms/Attributor/nonnull.ll
+++ b/llvm/test/Transforms/Attributor/nonnull.ll
@@ -1513,23 +1513,23 @@ define void @PR43833_simple(i32* %0, i32 %1) {
   br i1 %11, label %7, label %8
 }
 
-declare i8* @strrchr(i8* %0, i32 %1) nofree nounwind readonly
+declare i8* @strrchr(i8* %0, i32 %1) nofree nounwind readonly willreturn
 
 ; We should not mark the return of @strrchr as `nonnull`, it may well be NULL!
 define i8* @mybasename(i8* nofree readonly %str) {
-; NOT_CGSCC_OPM: Function Attrs: nofree nounwind readonly
+; NOT_CGSCC_OPM: Function Attrs: nofree nounwind readonly willreturn
 ; NOT_CGSCC_OPM-LABEL: define {{[^@]+}}@mybasename
 ; NOT_CGSCC_OPM-SAME: (i8* nofree readonly [[STR:%.*]]) [[ATTR11:#.*]] {
-; NOT_CGSCC_OPM-NEXT:[[CALL:%.*]] = call i8* @strrchr(i8* nofree readonly 
[[STR]], i32 noundef 47) [[ATTR14]]
+; NOT_CGSCC_OPM-NEXT:[[CALL:%.*]] = call i8* @strrchr(i8* nofree readonly 
[[STR]], i32 noundef 47) [[ATTR15:#.*]]
 ; NOT_CGSCC_OPM-NEXT:[[TOBOOL:%.*]] = icmp ne i8* [[CALL]], null
 ; NOT_CGSCC_OPM-NEXT:[[ADD_PTR:%.*]] = getelementptr inbounds i8, i8* 
[[CALL]], i64 1
 ; NOT_CGSCC_OPM-NEXT:[[COND:%.*]] = select i1 [[TOBOOL]], i8* [[ADD_PTR]], 
i8* [[STR]]
 ; NOT_CGSCC_OPM-NEXT:ret i8* [[COND]]
 ;
-; IS__CGSCC_OPM: Function Attrs: nofree nounwind readonly
+; IS__CGSCC_OPM: Function Attrs: nofree nounwind readonly willreturn
 ; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@mybasename
 ; IS__CGSCC_OPM-SAME: (i8* nofree readonly [[STR:%.*]]) [[ATTR12:#.*]] {
-; IS__CGSCC_OPM-NEXT:[[CALL:%.*]] = call i8* @strrchr(i8* nofree readonly 
[[STR]], i32 noundef 47) [[ATTR15]]
+; IS__CGSCC_OPM-NEXT:[[CALL:%.*]] = call i8* @strrchr(i8* nofree readonly 
[[STR]], i32 noundef 47) [[ATTR16:#.*]]
 ; IS__CGSCC_OPM-NEXT:[[TOBOOL:%.*]] = icmp ne i8* [[CALL]], null
 ; IS__CGSCC_OPM-NEXT:[[ADD_PTR:%.*]] = getelementptr inbounds i8, i8* 
[[CALL]], i64 1
 ; IS__CGSCC_OPM-NEXT:[[COND:%.*]] = select i1 [[TOBOOL]], i8* [[ADD_PTR]], 
i8* [[STR]]

diff  --git a/llvm/test/Transforms/DCE/calls-errno.ll 
b/llvm/test/Transforms/DCE/calls-errno.ll
index 77f048c03aa0..f0dce672e213 100644
--- a/llvm/test/Transforms/DCE/calls-errno.ll
+++ b/llvm/test/Transforms/DCE/calls-errno.ll
@@ -1,59 +1,66 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s -dce -S | FileCheck %s
 ; RUN: opt < %s -passes=dce -S | FileCheck %s
 
-declare double @acos(double) nounwind
-declare double @asin(double) nounwind
-declare double @atan(double) nounwind
-declare double @atan2(double, double) nounwind
-declare double @ceil(double) nounwind
-declare double @cos(double) nounwind
-declare double @cosh(double) nounwind
-declare double @exp(double) nounwind
-declare double @exp2(double) nounwind
-declare double @fabs(double) nounwind
-declare double @floor(double) nounwind
-declare double @fmod(double, double) nounwind
-declare double @log(double) nounwind
-declare double @log10(double) nounwind
-declare double @pow(double, double) nounwind
-declare double @sin(double) nounwind
-declare double @sinh(double) nounwind
-declare double @sqrt(double) nounwind
-declare double @tan(double) nounwind
-declare double @tanh(double) nounwind
-
-declare float @acosf(float) nounwind
-declare float @asinf(float) nounwind
-declare float @atanf(float) nounwind
-declare float @atan2f(float, float) nounwind
-declare float @ceilf(float) nounwind
-declare float @cosf(float) nounwind
-declare float @coshf(float) nounwind
-declare float @expf(float) nounwind
-declare float @exp2f(float) nounwind
-declare float @fabsf(float) nounwind
-declare float @floorf(float) nounwind
-declare float @fmodf(float, float) nounwind
-declare float @logf(float) nounwind
-declare float @log10f(float) nounwind
-declare float @powf(float, float) nounwind
-declare float @sinf(float) nounwind
-declare float @sinhf(float) nounwind
-declare float @sqrtf(float) nounwind
-dec

[llvm-branch-commits] [llvm] 6aced6b - [RISCV] Rename pcnt->cpop to match 0.93 bitmanip spec.

[Craig Topper via llvm-branch-commits]

Author: Craig Topper
Date: 2021-01-22T12:49:10-08:00
New Revision: 6aced6bf396b78b0021a224bf210ffc3598c3047

URL: 
https://github.com/llvm/llvm-project/commit/6aced6bf396b78b0021a224bf210ffc3598c3047
DIFF: 
https://github.com/llvm/llvm-project/commit/6aced6bf396b78b0021a224bf210ffc3598c3047.diff

LOG: [RISCV] Rename pcnt->cpop to match 0.93 bitmanip spec.

This is the first of multiple patches to bring our 0.92
implementation up to 0.93.

Reviewed By: asb, frasercrmck

Differential Revision: https://reviews.llvm.org/D94568

Added: 


Modified: 
llvm/lib/Target/RISCV/RISCVInstrInfoB.td
llvm/test/CodeGen/RISCV/rv32Zbb.ll
llvm/test/CodeGen/RISCV/rv64Zbb.ll
llvm/test/MC/RISCV/rv32zbb-invalid.s
llvm/test/MC/RISCV/rv32zbb-valid.s
llvm/test/MC/RISCV/rv64zbb-invalid.s
llvm/test/MC/RISCV/rv64zbb-valid.s

Removed: 




diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfoB.td 
b/llvm/lib/Target/RISCV/RISCVInstrInfoB.td
index 5773535e3a69..8b3b709a1c02 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoB.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoB.td
@@ -289,7 +289,7 @@ def CLZ  : RVBUnary<0b011, 0b0, 0b001, 
RISCVOpcode<0b0010011>, "clz">,
Sched<[]>;
 def CTZ  : RVBUnary<0b011, 0b1, 0b001, RISCVOpcode<0b0010011>, "ctz">,
Sched<[]>;
-def PCNT : RVBUnary<0b011, 0b00010, 0b001, RISCVOpcode<0b0010011>, "pcnt">,
+def CPOP : RVBUnary<0b011, 0b00010, 0b001, RISCVOpcode<0b0010011>, "cpop">,
Sched<[]>;
 } // Predicates = [HasStdExtZbb]
 
@@ -441,8 +441,8 @@ def CLZW   : RVBUnary<0b011, 0b0, 0b001, 
RISCVOpcode<0b0011011>,
   "clzw">, Sched<[]>;
 def CTZW   : RVBUnary<0b011, 0b1, 0b001, RISCVOpcode<0b0011011>,
   "ctzw">, Sched<[]>;
-def PCNTW  : RVBUnary<0b011, 0b00010, 0b001, RISCVOpcode<0b0011011>,
-  "pcntw">, Sched<[]>;
+def CPOPW  : RVBUnary<0b011, 0b00010, 0b001, RISCVOpcode<0b0011011>,
+  "cpopw">, Sched<[]>;
 } // Predicates = [HasStdExtZbb, IsRV64]
 
 let Predicates = [HasStdExtZbc, IsRV64] in {
@@ -772,7 +772,7 @@ def : Pat<(fshl GPR:$rs3, GPR:$rs1, uimmlog2xlen:$shamt),
 let Predicates = [HasStdExtZbb] in {
 def : Pat<(ctlz GPR:$rs1), (CLZ GPR:$rs1)>;
 def : Pat<(cttz GPR:$rs1), (CTZ GPR:$rs1)>;
-def : Pat<(ctpop GPR:$rs1), (PCNT GPR:$rs1)>;
+def : Pat<(ctpop GPR:$rs1), (CPOP GPR:$rs1)>;
 } // Predicates = [HasStdExtZbb]
 
 let Predicates = [HasStdExtZbb] in {
@@ -948,7 +948,7 @@ def : Pat<(and (add (ctlz (and GPR:$rs1, (i64 
0x))), (i64 -32)),
   (CLZW GPR:$rs1)>;
 def : Pat<(cttz (or GPR:$rs1, (i64 0x1))),
   (CTZW GPR:$rs1)>;
-def : Pat<(ctpop (and GPR:$rs1, (i64 0x))), (PCNTW GPR:$rs1)>;
+def : Pat<(ctpop (and GPR:$rs1, (i64 0x))), (CPOPW GPR:$rs1)>;
 } // Predicates = [HasStdExtZbb, IsRV64]
 
 let Predicates = [HasStdExtZbbOrZbp, IsRV64] in {

diff  --git a/llvm/test/CodeGen/RISCV/rv32Zbb.ll 
b/llvm/test/CodeGen/RISCV/rv32Zbb.ll
index d32b5c4f407e..9e448d67cfa7 100644
--- a/llvm/test/CodeGen/RISCV/rv32Zbb.ll
+++ b/llvm/test/CodeGen/RISCV/rv32Zbb.ll
@@ -671,12 +671,12 @@ define i32 @ctpop_i32(i32 %a) nounwind {
 ;
 ; RV32IB-LABEL: ctpop_i32:
 ; RV32IB:   # %bb.0:
-; RV32IB-NEXT:pcnt a0, a0
+; RV32IB-NEXT:cpop a0, a0
 ; RV32IB-NEXT:ret
 ;
 ; RV32IBB-LABEL: ctpop_i32:
 ; RV32IBB:   # %bb.0:
-; RV32IBB-NEXT:pcnt a0, a0
+; RV32IBB-NEXT:cpop a0, a0
 ; RV32IBB-NEXT:ret
   %1 = call i32 @llvm.ctpop.i32(i32 %a)
   ret i32 %1
@@ -744,16 +744,16 @@ define i64 @ctpop_i64(i64 %a) nounwind {
 ;
 ; RV32IB-LABEL: ctpop_i64:
 ; RV32IB:   # %bb.0:
-; RV32IB-NEXT:pcnt a1, a1
-; RV32IB-NEXT:pcnt a0, a0
+; RV32IB-NEXT:cpop a1, a1
+; RV32IB-NEXT:cpop a0, a0
 ; RV32IB-NEXT:add a0, a0, a1
 ; RV32IB-NEXT:mv a1, zero
 ; RV32IB-NEXT:ret
 ;
 ; RV32IBB-LABEL: ctpop_i64:
 ; RV32IBB:   # %bb.0:
-; RV32IBB-NEXT:pcnt a1, a1
-; RV32IBB-NEXT:pcnt a0, a0
+; RV32IBB-NEXT:cpop a1, a1
+; RV32IBB-NEXT:cpop a0, a0
 ; RV32IBB-NEXT:add a0, a0, a1
 ; RV32IBB-NEXT:mv a1, zero
 ; RV32IBB-NEXT:ret

diff  --git a/llvm/test/CodeGen/RISCV/rv64Zbb.ll 
b/llvm/test/CodeGen/RISCV/rv64Zbb.ll
index 56ae050342ee..6cf8b8478bc0 100644
--- a/llvm/test/CodeGen/RISCV/rv64Zbb.ll
+++ b/llvm/test/CodeGen/RISCV/rv64Zbb.ll
@@ -590,12 +590,12 @@ define signext i32 @ctpop_i32(i32 signext %a) nounwind {
 ;
 ; RV64IB-LABEL: ctpop_i32:
 ; RV64IB:   # %bb.0:
-; RV64IB-NEXT:pcntw a0, a0
+; RV64IB-NEXT:cpopw a0, a0
 ; RV64IB-NEXT:ret
 ;
 ; RV64IBB-LABEL: ctpop_i32:
 ; RV64IBB:   # %bb.0:
-; RV64IBB-NEXT:pcntw a0, a0
+; RV64IBB-NEXT:cpopw a0, a0
 ; RV64IBB-NEXT:ret
   %1 = call i32 @llvm.ctpop.i32(i32 %a)
   ret i32 %1
@@ -656,12 +656,12 @@ define i64 @ctpop_i64(i64 %a) nounwind {
 ;
 ; RV64IB-LABEL: ctpop_i64:
 ; RV64IB:   # %bb.0:

[llvm-branch-commits] [llvm] b2f8595 - [RISCV] Remove addiwu, addwu, subwu, subuw, clmulw, clmulrw, clmulhw to match 0.93 bitmanip spec.

[Craig Topper via llvm-branch-commits]

Author: Craig Topper
Date: 2021-01-22T12:49:10-08:00
New Revision: b2f859500f196f98a73d531c2ec847b7f23875af

URL: 
https://github.com/llvm/llvm-project/commit/b2f859500f196f98a73d531c2ec847b7f23875af
DIFF: 
https://github.com/llvm/llvm-project/commit/b2f859500f196f98a73d531c2ec847b7f23875af.diff

LOG: [RISCV] Remove addiwu, addwu, subwu, subuw, clmulw, clmulrw, clmulhw to 
match 0.93 bitmanip spec.

Reviewed By: asb, frasercrmck

Differential Revision: https://reviews.llvm.org/D94577

Added: 


Modified: 
llvm/lib/Target/RISCV/RISCVInstrInfoB.td
llvm/test/CodeGen/RISCV/rv64Zbb.ll
llvm/test/MC/RISCV/rv64zbb-invalid.s
llvm/test/MC/RISCV/rv64zbb-valid.s

Removed: 
llvm/test/MC/RISCV/rv64zbc-invalid.s
llvm/test/MC/RISCV/rv64zbc-valid.s



diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfoB.td 
b/llvm/lib/Target/RISCV/RISCVInstrInfoB.td
index 8b3b709a1c02..91d325942f9c 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoB.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoB.td
@@ -137,11 +137,6 @@ class RVBUnary funct7, bits<5> funct5, bits<3> 
funct3,
   let Inst{24-20} = funct5;
 }
 
-let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
-class RVBALUW_ri funct3, string opcodestr>
-: RVInstI;
-
 let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
 class RVBShift_ri funct5, bits<3> funct3, RISCVOpcode opcode,
   string opcodestr>
@@ -375,12 +370,8 @@ def UNSHFLI : RVBShfl_ri<0b10, 0b101, OPC_OP_IMM, 
"unshfli">, Sched<[]>;
 } // Predicates = [HasStdExtZbp]
 
 let Predicates = [HasStdExtZbb, IsRV64] in {
-def ADDIWU : RVBALUW_ri<0b100, "addiwu">, Sched<[]>;
 def SLLIUW : RVBShift_ri<0b1, 0b001, OPC_OP_IMM_32, "slliu.w">, Sched<[]>;
-def ADDWU : ALUW_rr<0b101, 0b000, "addwu">, Sched<[]>;
-def SUBWU : ALUW_rr<0b0100101, 0b000, "subwu">, Sched<[]>;
 def ADDUW : ALUW_rr<0b100, 0b000, "addu.w">, Sched<[]>;
-def SUBUW : ALUW_rr<0b0100100, 0b000, "subu.w">, Sched<[]>;
 } // Predicates = [HasStdExtZbb, IsRV64]
 
 let Predicates = [HasStdExtZbb, IsRV64] in {
@@ -445,12 +436,6 @@ def CPOPW  : RVBUnary<0b011, 0b00010, 0b001, 
RISCVOpcode<0b0011011>,
   "cpopw">, Sched<[]>;
 } // Predicates = [HasStdExtZbb, IsRV64]
 
-let Predicates = [HasStdExtZbc, IsRV64] in {
-def CLMULW  : ALUW_rr<0b101, 0b001, "clmulw">, Sched<[]>;
-def CLMULRW : ALUW_rr<0b101, 0b010, "clmulrw">, Sched<[]>;
-def CLMULHW : ALUW_rr<0b101, 0b011, "clmulhw">, Sched<[]>;
-} // Predicates = [HasStdExtZbc, IsRV64]
-
 let Predicates = [HasStdExtZbp, IsRV64] in {
 def SHFLW   : ALUW_rr<0b100, 0b001, "shflw">, Sched<[]>;
 def UNSHFLW : ALUW_rr<0b100, 0b101, "unshflw">, Sched<[]>;
@@ -854,20 +839,12 @@ def : Pat<(or (or (and (shl GPR:$rs1, (i64 1)), (i64 
0x)),
 } // Predicates = [HasStdExtZbp, IsRV64]
 
 let Predicates = [HasStdExtZbb, IsRV64] in {
-def : Pat<(and (add GPR:$rs, simm12:$simm12), (i64 0x)),
-  (ADDIWU GPR:$rs, simm12:$simm12)>;
 def : Pat<(SLLIUWPat GPR:$rs1, uimm5:$shamt),
   (SLLIUW GPR:$rs1, uimm5:$shamt)>;
 def : Pat<(shl (and GPR:$rs1, 0x), uimm5:$shamt),
   (SLLIUW GPR:$rs1, uimm5:$shamt)>;
-def : Pat<(and (add GPR:$rs1, GPR:$rs2), (i64 0x)),
-  (ADDWU GPR:$rs1, GPR:$rs2)>;
-def : Pat<(and (sub GPR:$rs1, GPR:$rs2), (i64 0x)),
-  (SUBWU GPR:$rs1, GPR:$rs2)>;
 def : Pat<(add GPR:$rs1, (and GPR:$rs2, (i64 0x))),
   (ADDUW GPR:$rs1, GPR:$rs2)>;
-def : Pat<(sub GPR:$rs1, (and GPR:$rs2, (i64 0x))),
-  (SUBUW GPR:$rs1, GPR:$rs2)>;
 def : Pat<(not (riscv_sllw (not GPR:$rs1), GPR:$rs2)),
   (SLOW GPR:$rs1, GPR:$rs2)>;
 def : Pat<(not (riscv_srlw (not GPR:$rs1), GPR:$rs2)),

diff  --git a/llvm/test/CodeGen/RISCV/rv64Zbb.ll 
b/llvm/test/CodeGen/RISCV/rv64Zbb.ll
index 6cf8b8478bc0..e9bc99b18f77 100644
--- a/llvm/test/CodeGen/RISCV/rv64Zbb.ll
+++ b/llvm/test/CodeGen/RISCV/rv64Zbb.ll
@@ -988,51 +988,6 @@ define i64 @abs_i64(i64 %x) {
   ret i64 %abs
 }
 
-; We select a i32 addi that zero-extends the result on RV64 as addiwu
-
-define zeroext i32 @zext_add_to_addiwu(i32 signext %a) nounwind {
-; RV64I-LABEL: zext_add_to_addiwu:
-; RV64I:   # %bb.0:
-; RV64I-NEXT:addi a0, a0, 1
-; RV64I-NEXT:slli a0, a0, 32
-; RV64I-NEXT:srli a0, a0, 32
-; RV64I-NEXT:ret
-;
-; RV64IB-LABEL: zext_add_to_addiwu:
-; RV64IB:   # %bb.0:
-; RV64IB-NEXT:addiwu a0, a0, 1
-; RV64IB-NEXT:ret
-;
-; RV64IBB-LABEL: zext_add_to_addiwu:
-; RV64IBB:   # %bb.0:
-; RV64IBB-NEXT:addiwu a0, a0, 1
-; RV64IBB-NEXT:ret
-  %add = add i32 %a, 1
-  ret i32 %add
-}
-
-define i64 @addiwu(i64 %a) nounwind {
-; RV64I-LABEL: addiwu:
-; RV64I:   # %bb.0:
-; RV64I-NEXT:addi a0, a0, 1
-; RV64I-NEXT:slli a0, a0, 32
-; RV64I-NEXT:srli a0, a0, 32
-; RV64I-NEXT:ret
-;
-; RV64IB-LABEL: addiwu:
-; RV64IB:   # %bb.0:
-; RV64IB-NEXT:addiwu a

[llvm-branch-commits] [llvm] d985c73 - [RISCV] Swap encodings of max and minu to match 0.93 bitmanip spec.

[Craig Topper via llvm-branch-commits]

Author: Craig Topper
Date: 2021-01-22T12:49:10-08:00
New Revision: d985c7321f0b9cbaf8f8423a7faa645bb5966fc8

URL: 
https://github.com/llvm/llvm-project/commit/d985c7321f0b9cbaf8f8423a7faa645bb5966fc8
DIFF: 
https://github.com/llvm/llvm-project/commit/d985c7321f0b9cbaf8f8423a7faa645bb5966fc8.diff

LOG: [RISCV] Swap encodings of max and minu to match 0.93 bitmanip spec.

Reviewed By: asb, frasercrmck

Differential Revision: https://reviews.llvm.org/D94580

Added: 


Modified: 
llvm/lib/Target/RISCV/RISCVInstrInfoB.td
llvm/test/MC/RISCV/rv32zbb-valid.s

Removed: 




diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfoB.td 
b/llvm/lib/Target/RISCV/RISCVInstrInfoB.td
index 91d325942f9c..5ad8fc2b4636 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoB.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoB.td
@@ -333,8 +333,8 @@ def CLMULH : ALU_rr<0b101, 0b011, "clmulh">, Sched<[]>;
 
 let Predicates = [HasStdExtZbb] in {
 def MIN  : ALU_rr<0b101, 0b100, "min">, Sched<[]>;
-def MAX  : ALU_rr<0b101, 0b101, "max">, Sched<[]>;
-def MINU : ALU_rr<0b101, 0b110, "minu">, Sched<[]>;
+def MINU : ALU_rr<0b101, 0b101, "minu">, Sched<[]>;
+def MAX  : ALU_rr<0b101, 0b110, "max">, Sched<[]>;
 def MAXU : ALU_rr<0b101, 0b111, "maxu">, Sched<[]>;
 } // Predicates = [HasStdExtZbb]
 

diff  --git a/llvm/test/MC/RISCV/rv32zbb-valid.s 
b/llvm/test/MC/RISCV/rv32zbb-valid.s
index dff8364fea94..13cf4a1bf9bd 100644
--- a/llvm/test/MC/RISCV/rv32zbb-valid.s
+++ b/llvm/test/MC/RISCV/rv32zbb-valid.s
@@ -42,12 +42,12 @@ sext.h t0, t1
 # CHECK-ASM-AND-OBJ: min t0, t1, t2
 # CHECK-ASM: encoding: [0xb3,0x42,0x73,0x0a]
 min t0, t1, t2
-# CHECK-ASM-AND-OBJ: max t0, t1, t2
-# CHECK-ASM: encoding: [0xb3,0x52,0x73,0x0a]
-max t0, t1, t2
 # CHECK-ASM-AND-OBJ: minu t0, t1, t2
-# CHECK-ASM: encoding: [0xb3,0x62,0x73,0x0a]
+# CHECK-ASM: encoding: [0xb3,0x52,0x73,0x0a]
 minu t0, t1, t2
+# CHECK-ASM-AND-OBJ: max t0, t1, t2
+# CHECK-ASM: encoding: [0xb3,0x62,0x73,0x0a]
+max t0, t1, t2
 # CHECK-ASM-AND-OBJ: maxu t0, t1, t2
 # CHECK-ASM: encoding: [0xb3,0x72,0x73,0x0a]
 maxu t0, t1, t2



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