date:20210113

[llvm-branch-commits] [llvm] 8f8c207 - [Verifier] Add tied-ness verification to statepoint intsruction

2021-01-13 Thread Serguei Katkov via llvm-branch-commits


Author: Serguei Katkov
Date: 2021-01-13T14:40:44+07:00
New Revision: 8f8c207b8f2e69be652ef7afa30a92312bbb2bf0

URL: 
https://github.com/llvm/llvm-project/commit/8f8c207b8f2e69be652ef7afa30a92312bbb2bf0
DIFF: 
https://github.com/llvm/llvm-project/commit/8f8c207b8f2e69be652ef7afa30a92312bbb2bf0.diff

LOG: [Verifier] Add tied-ness verification to statepoint intsruction

Reviewers: reames, dantrushin
Reviewed By: reames, dantrushin
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D94483

Added: 
llvm/test/MachineVerifier/verifier-statepoint.mir

Modified: 
llvm/lib/CodeGen/MachineVerifier.cpp

Removed: 




diff  --git a/llvm/lib/CodeGen/MachineVerifier.cpp 
b/llvm/lib/CodeGen/MachineVerifier.cpp
index 41fdf2f83444..1cfadef251c5 100644
--- a/llvm/lib/CodeGen/MachineVerifier.cpp
+++ b/llvm/lib/CodeGen/MachineVerifier.cpp
@@ -1663,6 +1663,22 @@ void MachineVerifier::visitMachineInstrBefore(const 
MachineInstr *MI) {
 VerifyStackMapConstant(SO.getNumAllocaIdx());
 VerifyStackMapConstant(SO.getNumGcMapEntriesIdx());
 
+// Verify that all explicit statepoint defs are tied to gc operands as
+// they are expected to be a relocation of gc operands.
+unsigned FirstGCPtrIdx = SO.getFirstGCPtrIdx();
+unsigned LastGCPtrIdx = SO.getNumAllocaIdx() - 2;
+for (unsigned Idx = 0; Idx < MI->getNumDefs(); Idx++) {
+  unsigned UseOpIdx;
+  if (!MI->isRegTiedToUseOperand(Idx, &UseOpIdx)) {
+report("STATEPOINT defs expected to be tied", MI);
+break;
+  }
+  if (UseOpIdx < FirstGCPtrIdx || UseOpIdx > LastGCPtrIdx) {
+report("STATEPOINT def tied to non-gc operand", MI);
+break;
+  }
+}
+
 // TODO: verify we have properly encoded deopt arguments
   } break;
   }

diff  --git a/llvm/test/MachineVerifier/verifier-statepoint.mir 
b/llvm/test/MachineVerifier/verifier-statepoint.mir
new file mode 100644
index ..c5c1717530da
--- /dev/null
+++ b/llvm/test/MachineVerifier/verifier-statepoint.mir
@@ -0,0 +1,30 @@
+# RUN: not --crash llc -o - %s -mtriple=x86_64-- -verify-machineinstrs 
-run-pass=none 2>&1 | FileCheck %s
+# REQUIRES: x86-registered-target
+
+# CHECK: Bad machine code: STATEPOINT defs expected to be tied
+# CHECK-NEXT: - function:bad_statepoint
+# CHECK-NEXT: - basic block: %bb.0
+# CHECK-NEXT: - instruction: renamable $rdi = STATEPOINT 0, 0, 0, $r15, 2, 0, 
2, 0, 2, 0, 2, 1, killed renamable $rdi, 2, 0, 2, 1, 0, 0, , implicit-def $rsp, implicit-def $ssp
+
+# CHECK: Bad machine code: STATEPOINT def tied to non-gc operand
+# CHECK-NEXT: - function:bad_statepoint
+# CHECK-NEXT: - basic block: %bb.0
+# CHECK-NEXT: - instruction: renamable $rdi = STATEPOINT 0, 0, 0, $r15, 2, 0, 
2, 0, 2, 1, killed renamable $rdi(tied-def 0), 2, 0, 2, 0, 2, 1, 0, 0, , implicit-def $rsp, implicit-def 
$ssp
+
+# CHECK: Bad machine code: STATEPOINT def tied to non-gc operand
+# CHECK-NEXT: - function:bad_statepoint
+# CHECK-NEXT: - basic block: %bb.0
+# CHECK-NEXT: - instruction: renamable $r14, renamable $rdi = STATEPOINT 0, 0, 
0, $r15, 2, 0, 2, 0, 2, 0, 2, 1, killed renamable $r14(tied-def 0), 2, 1, 
killed renamable $rdi(tied-def 1), 2, 1, 0, 0, , implicit-def $rsp, implicit-def $ssp
+---
+name:  bad_statepoint
+tracksRegLiveness: true
+body:  |
+  bb.0:
+liveins: $rdi, $r15, $r14
+
+renamable $rdi = STATEPOINT 0, 0, 0, $r15, 2, 0, 2, 0, 2, 0, 2, 1, killed 
renamable $rdi, 2, 0, 2, 1, 0, 0, csr_64, implicit-def $rsp, implicit-def $ssp
+renamable $rdi = STATEPOINT 0, 0, 0, $r15, 2, 0, 2, 0, 2, 1, killed 
renamable $rdi(tied-def 0), 2, 0, 2, 0, 2, 1, 0, 0, csr_64, implicit-def $rsp, 
implicit-def $ssp
+renamable $r14, renamable $rdi = STATEPOINT 0, 0, 0, $r15, 2, 0, 2, 0, 2, 
0, 2, 1, killed renamable $r14(tied-def 0), 2, 1, killed renamable 
$rdi(tied-def 1), 2, 1, 0, 0, csr_64, implicit-def $rsp, implicit-def $ssp
+$rax = COPY killed renamable $rdi
+RET 0, killed $rax
+...



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[llvm-branch-commits] [llvm] 3aeb30d - [ARM] Additional tests for different interleaving patterns. NFC

2021-01-13 Thread David Green via llvm-branch-commits


Author: David Green
Date: 2021-01-13T08:31:50Z
New Revision: 3aeb30d1a68a76616c699587e07a7d8880c29d1c

URL: 
https://github.com/llvm/llvm-project/commit/3aeb30d1a68a76616c699587e07a7d8880c29d1c
DIFF: 
https://github.com/llvm/llvm-project/commit/3aeb30d1a68a76616c699587e07a7d8880c29d1c.diff

LOG: [ARM] Additional tests for different interleaving patterns. NFC

Added: 


Modified: 
llvm/test/CodeGen/Thumb2/mve-shuffleext.ll
llvm/test/CodeGen/Thumb2/mve-vcvt.ll
llvm/test/CodeGen/Thumb2/mve-vmovnstore.ll
llvm/test/CodeGen/Thumb2/mve-vqdmulh.ll

Removed: 




diff  --git a/llvm/test/CodeGen/Thumb2/mve-shuffleext.ll 
b/llvm/test/CodeGen/Thumb2/mve-shuffleext.ll
index c7165e71b5dd..715be1d921ca 100644
--- a/llvm/test/CodeGen/Thumb2/mve-shuffleext.ll
+++ b/llvm/test/CodeGen/Thumb2/mve-shuffleext.ll
@@ -14,6 +14,33 @@ entry:
   ret <4 x i32> %out
 }
 
+define arm_aapcs_vfpcc <4 x i32> @sext_i32_0246_swapped(<8 x i16> %src) {
+; CHECK-LABEL: sext_i32_0246_swapped:
+; CHECK:   @ %bb.0: @ %entry
+; CHECK-NEXT:vmov.u16 r0, q0[2]
+; CHECK-NEXT:vmov.u16 r1, q0[0]
+; CHECK-NEXT:vmov q1[2], q1[0], r1, r0
+; CHECK-NEXT:vmov.u16 r0, q0[3]
+; CHECK-NEXT:vmov.u16 r1, q0[1]
+; CHECK-NEXT:vmov q1[3], q1[1], r1, r0
+; CHECK-NEXT:vmov.u16 r0, q0[6]
+; CHECK-NEXT:vmov.u16 r1, q0[4]
+; CHECK-NEXT:vmov q2[2], q2[0], r1, r0
+; CHECK-NEXT:vmov.u16 r0, q0[7]
+; CHECK-NEXT:vmov.u16 r1, q0[5]
+; CHECK-NEXT:vmovlb.s16 q0, q1
+; CHECK-NEXT:vmov q2[3], q2[1], r1, r0
+; CHECK-NEXT:vmov.f32 s1, s2
+; CHECK-NEXT:vmovlb.s16 q2, q2
+; CHECK-NEXT:vmov.f32 s2, s8
+; CHECK-NEXT:vmov.f32 s3, s10
+; CHECK-NEXT:bx lr
+entry:
+  %out = sext <8 x i16> %src to <8 x i32>
+  %strided.vec = shufflevector <8 x i32> %out, <8 x i32> undef, <4 x i32> 
+  ret <4 x i32> %strided.vec
+}
+
 define arm_aapcs_vfpcc <4 x i32> @sext_i32_1357(<8 x i16> %src) {
 ; CHECK-LABEL: sext_i32_1357:
 ; CHECK:   @ %bb.0: @ %entry
@@ -25,6 +52,34 @@ entry:
   ret <4 x i32> %out
 }
 
+define arm_aapcs_vfpcc <4 x i32> @sext_i32_1357_swapped(<8 x i16> %src) {
+; CHECK-LABEL: sext_i32_1357_swapped:
+; CHECK:   @ %bb.0: @ %entry
+; CHECK-NEXT:vmov.u16 r0, q0[2]
+; CHECK-NEXT:vmov.u16 r1, q0[0]
+; CHECK-NEXT:vmov q1[2], q1[0], r1, r0
+; CHECK-NEXT:vmov.u16 r0, q0[3]
+; CHECK-NEXT:vmov.u16 r1, q0[1]
+; CHECK-NEXT:vmov q1[3], q1[1], r1, r0
+; CHECK-NEXT:vmov.u16 r0, q0[6]
+; CHECK-NEXT:vmov.u16 r1, q0[4]
+; CHECK-NEXT:vmovlb.s16 q1, q1
+; CHECK-NEXT:vmov q2[2], q2[0], r1, r0
+; CHECK-NEXT:vmov.u16 r0, q0[7]
+; CHECK-NEXT:vmov.u16 r1, q0[5]
+; CHECK-NEXT:vmov.f32 s0, s5
+; CHECK-NEXT:vmov q2[3], q2[1], r1, r0
+; CHECK-NEXT:vmov.f32 s1, s7
+; CHECK-NEXT:vmovlb.s16 q2, q2
+; CHECK-NEXT:vmov.f32 s2, s9
+; CHECK-NEXT:vmov.f32 s3, s11
+; CHECK-NEXT:bx lr
+entry:
+  %out = sext <8 x i16> %src to <8 x i32>
+  %strided.vec = shufflevector <8 x i32> %out, <8 x i32> undef, <4 x i32> 
+  ret <4 x i32> %strided.vec
+}
+
 define arm_aapcs_vfpcc <8 x i32> @sext_i32_02468101214(<16 x i16> %src) {
 ; CHECK-LABEL: sext_i32_02468101214:
 ; CHECK:   @ %bb.0: @ %entry
@@ -37,6 +92,50 @@ entry:
   ret <8 x i32> %out
 }
 
+define arm_aapcs_vfpcc <8 x i32> @sext_i32_02468101214_swapped(<16 x i16> 
%src) {
+; CHECK-LABEL: sext_i32_02468101214_swapped:
+; CHECK:   @ %bb.0: @ %entry
+; CHECK-NEXT:vmov.u16 r0, q0[2]
+; CHECK-NEXT:vmov.u16 r1, q0[0]
+; CHECK-NEXT:vmov q2[2], q2[0], r1, r0
+; CHECK-NEXT:vmov.u16 r0, q0[3]
+; CHECK-NEXT:vmov.u16 r1, q0[1]
+; CHECK-NEXT:vmov q2[3], q2[1], r1, r0
+; CHECK-NEXT:vmov.u16 r0, q0[6]
+; CHECK-NEXT:vmov.u16 r1, q0[4]
+; CHECK-NEXT:vmov q3[2], q3[0], r1, r0
+; CHECK-NEXT:vmov.u16 r0, q0[7]
+; CHECK-NEXT:vmov.u16 r1, q0[5]
+; CHECK-NEXT:vmovlb.s16 q0, q2
+; CHECK-NEXT:vmov q3[3], q3[1], r1, r0
+; CHECK-NEXT:vmov.u16 r0, q1[2]
+; CHECK-NEXT:vmov.u16 r1, q1[0]
+; CHECK-NEXT:vmovlb.s16 q3, q3
+; CHECK-NEXT:vmov.f32 s1, s2
+; CHECK-NEXT:vmov q2[2], q2[0], r1, r0
+; CHECK-NEXT:vmov.u16 r0, q1[3]
+; CHECK-NEXT:vmov.u16 r1, q1[1]
+; CHECK-NEXT:vmov.f32 s2, s12
+; CHECK-NEXT:vmov q2[3], q2[1], r1, r0
+; CHECK-NEXT:vmov.u16 r0, q1[6]
+; CHECK-NEXT:vmov.u16 r1, q1[4]
+; CHECK-NEXT:vmov.f32 s3, s14
+; CHECK-NEXT:vmov q3[2], q3[0], r1, r0
+; CHECK-NEXT:vmov.u16 r0, q1[7]
+; CHECK-NEXT:vmov.u16 r1, q1[5]
+; CHECK-NEXT:vmovlb.s16 q1, q2
+; CHECK-NEXT:vmov q3[3], q3[1], r1, r0
+; CHECK-NEXT:vmovlb.s16 q3, q3
+; CHECK-NEXT:vmov.f32 s5, s6
+; CHECK-NEXT:vmov.f32 s6, s12
+; CHECK-NEXT:vmov.f32 s7, s14
+; CHECK-NEXT:bx lr
+entry:
+  %out = sext <16 x i16> %src to <16 x i32>
+  %strided.vec = shufflevector <16 x i32> %out, <16 x i32> undef, <8 x i32> 

+  ret <8 x i32> %strided.vec
+}
+
 define

[llvm-branch-commits] [llvm] 141906f - [llvm-readelf/obj] - Add support of multiple SHT_SYMTAB_SHNDX sections.

2021-01-13 Thread Georgii Rymar via llvm-branch-commits


Author: Georgii Rymar
Date: 2021-01-13T11:36:43+03:00
New Revision: 141906fa149ffaa37bb5b65e9890ab1f0f3effd5

URL: 
https://github.com/llvm/llvm-project/commit/141906fa149ffaa37bb5b65e9890ab1f0f3effd5
DIFF: 
https://github.com/llvm/llvm-project/commit/141906fa149ffaa37bb5b65e9890ab1f0f3effd5.diff

LOG: [llvm-readelf/obj] - Add support of multiple SHT_SYMTAB_SHNDX sections.

Currently we don't support multiple SHT_SYMTAB_SHNDX sections
and the DT_SYMTAB_SHNDX tag currently.

This patch implements it and fixes the
https://bugs.llvm.org/show_bug.cgi?id=43991.

I had to introduce the `struct DataRegion` to ELF.h,
it is used to represent a region that might have no known size.
It is needed, because we don't know the size of the extended
section indices table when it is located via DT_SYMTAB_SHNDX.
In this case we still want to validate that we don't read
past the end of the file.

Differential revision: https://reviews.llvm.org/D92923

Added: 
llvm/test/tools/llvm-readobj/ELF/symtab-shndx.test

Modified: 
llvm/include/llvm/Object/ELF.h
llvm/test/Object/invalid.test
llvm/test/tools/llvm-readobj/ELF/dyn-symbols.test
llvm/test/tools/llvm-readobj/ELF/dynamic-tags.test
llvm/test/tools/llvm-readobj/ELF/mips-got.test
llvm/test/tools/llvm-readobj/ELF/mips-plt.test
llvm/test/tools/llvm-readobj/ELF/section-symbols.test
llvm/test/tools/llvm-readobj/ELF/symbol-shndx.test
llvm/test/tools/obj2yaml/ELF/sht-symtab-shndx.yaml
llvm/test/tools/yaml2obj/ELF/sht-symtab-shndx.yaml
llvm/tools/llvm-readobj/ELFDumper.cpp
llvm/unittests/Object/ELFTest.cpp

Removed: 




diff  --git a/llvm/include/llvm/Object/ELF.h b/llvm/include/llvm/Object/ELF.h
index bd224ada7783..86359ff44d56 100644
--- a/llvm/include/llvm/Object/ELF.h
+++ b/llvm/include/llvm/Object/ELF.h
@@ -57,6 +57,36 @@ enum PPCInstrMasks : uint64_t {
 
 template  class ELFFile;
 
+template  struct DataRegion {
+  // This constructor is used when we know the start and the size of a data
+  // region. We assume that Arr does not go past the end of the file.
+  DataRegion(ArrayRef Arr) : First(Arr.data()), Size(Arr.size()) {}
+
+  // Sometimes we only know the start of a data region. We still don't want to
+  // read past the end of the file, so we provide the end of a buffer.
+  DataRegion(const T *Data, const uint8_t *BufferEnd)
+  : First(Data), BufEnd(BufferEnd) {}
+
+  Expected operator[](uint64_t N) {
+assert(Size || BufEnd);
+if (Size) {
+  if (N >= *Size)
+return createError(
+"the index is greater than or equal to the number of entries (" +
+Twine(*Size) + ")");
+} else {
+  const uint8_t *EntryStart = (const uint8_t *)First + N * sizeof(T);
+  if (EntryStart + sizeof(T) > BufEnd)
+return createError("can't read past the end of the file");
+}
+return *(First + N);
+  }
+
+  const T *First;
+  Optional Size = None;
+  const uint8_t *BufEnd = nullptr;
+};
+
 template 
 std::string getSecIndexForError(const ELFFile &Obj,
 const typename ELFT::Shdr &Sec) {
@@ -99,6 +129,7 @@ class ELFFile {
   using WarningHandler = llvm::function_ref;
 
   const uint8_t *base() const { return Buf.bytes_begin(); }
+  const uint8_t *end() const { return base() + getBufSize(); }
 
   size_t getBufSize() const { return Buf.size(); }
 
@@ -274,13 +305,13 @@ class ELFFile {
   Elf_Shdr_Range Sections,
   WarningHandler WarnHandler = &defaultWarningHandler) const;
   Expected getSectionIndex(const Elf_Sym &Sym, Elf_Sym_Range Syms,
- ArrayRef ShndxTable) const;
+ DataRegion ShndxTable) const;
   Expected getSection(const Elf_Sym &Sym,
 const Elf_Shdr *SymTab,
-ArrayRef ShndxTable) const;
+DataRegion ShndxTable) const;
   Expected getSection(const Elf_Sym &Sym,
 Elf_Sym_Range Symtab,
-ArrayRef ShndxTable) const;
+DataRegion ShndxTable) const;
   Expected getSection(uint32_t Index) const;
 
   Expected getSymbol(const Elf_Shdr *Sec,
@@ -313,22 +344,25 @@ getSection(typename ELFT::ShdrRange Sections, uint32_t 
Index) {
 template 
 inline Expected
 getExtendedSymbolTableIndex(const typename ELFT::Sym &Sym, unsigned SymIndex,
-ArrayRef ShndxTable) {
+DataRegion ShndxTable) {
   assert(Sym.st_shndx == ELF::SHN_XINDEX);
-  if (SymIndex >= ShndxTable.size())
+  if (!ShndxTable.First)
 return createError(
-"extended symbol index (" + Twine(SymIndex) +
-") is past the end of the SHT_SYMTAB_SHNDX section of size " +
-Twine(ShndxTable.size()));
+"found an extended sym

[llvm-branch-commits] [llvm] c29ca85 - [ARM] Update isVMOVNOriginalMask to handle single input shuffle vectors

2021-01-13 Thread David Green via llvm-branch-commits


Author: David Green
Date: 2021-01-13T08:51:28Z
New Revision: c29ca8551afff316976c2befcd65eeef53798499

URL: 
https://github.com/llvm/llvm-project/commit/c29ca8551afff316976c2befcd65eeef53798499
DIFF: 
https://github.com/llvm/llvm-project/commit/c29ca8551afff316976c2befcd65eeef53798499.diff

LOG: [ARM] Update isVMOVNOriginalMask to handle single input shuffle vectors

The isVMOVNOriginalMask was previously only checking for two input
shuffles that could be better expanded as vmovn nodes. This expands that
to single input shuffles that will later be legalized to multiple
vectors.

Differential Revision: https://reviews.llvm.org/D94189

Added: 


Modified: 
llvm/lib/Target/ARM/ARMISelLowering.cpp
llvm/test/CodeGen/Thumb2/mve-vmovnstore.ll

Removed: 




diff  --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp 
b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index 982397dbb2db..46c5efa2cf2f 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -14695,18 +14695,22 @@ static SDValue 
PerformSplittingToNarrowingStores(StoreSDNode *St,
   // use the VMOVN over splitting the store. We are looking for patterns of:
   // !rev: 0 N 1 N+1 2 N+2 ...
   //  rev: N 0 N+1 1 N+2 2 ...
-  auto isVMOVNOriginalMask = [&](ArrayRef M, bool rev) {
+  // The shuffle may either be a single source (in which case N = NumElts/2) or
+  // two inputs extended with concat to the same size (in which case N =
+  // NumElts).
+  auto isVMOVNShuffle = [&](ShuffleVectorSDNode *SVN, bool Rev) {
+ArrayRef M = SVN->getMask();
 unsigned NumElts = ToVT.getVectorNumElements();
-if (NumElts != M.size())
-  return false;
+if (SVN->getOperand(1).isUndef())
+  NumElts /= 2;
 
-unsigned Off0 = rev ? NumElts : 0;
-unsigned Off1 = rev ? 0 : NumElts;
+unsigned Off0 = Rev ? NumElts : 0;
+unsigned Off1 = Rev ? 0 : NumElts;
 
-for (unsigned i = 0; i < NumElts; i += 2) {
-  if (M[i] >= 0 && M[i] != (int)(Off0 + i / 2))
+for (unsigned I = 0; I < NumElts; I += 2) {
+  if (M[I] >= 0 && M[I] != (int)(Off0 + I / 2))
 return false;
-  if (M[i + 1] >= 0 && M[i + 1] != (int)(Off1 + i / 2))
+  if (M[I + 1] >= 0 && M[I + 1] != (int)(Off1 + I / 2))
 return false;
 }
 
@@ -14721,9 +14725,8 @@ static SDValue 
PerformSplittingToNarrowingStores(StoreSDNode *St,
   return SDValue();
 }
   }
-  if (auto *Shuffle = dyn_cast(Trunc->getOperand(0)))
-if (isVMOVNOriginalMask(Shuffle->getMask(), false) ||
-isVMOVNOriginalMask(Shuffle->getMask(), true))
+  if (auto *Shuffle = dyn_cast(Trunc.getOperand(0)))
+if (isVMOVNShuffle(Shuffle, false) || isVMOVNShuffle(Shuffle, true))
   return SDValue();
 
   LLVMContext &C = *DAG.getContext();

diff  --git a/llvm/test/CodeGen/Thumb2/mve-vmovnstore.ll 
b/llvm/test/CodeGen/Thumb2/mve-vmovnstore.ll
index f9a535e9d2dc..aba29b4e5e48 100644
--- a/llvm/test/CodeGen/Thumb2/mve-vmovnstore.ll
+++ b/llvm/test/CodeGen/Thumb2/mve-vmovnstore.ll
@@ -30,16 +30,8 @@ entry:
 define arm_aapcs_vfpcc void @vmovn32_trunc1_onesrc(<8 x i32> %src1, <8 x i16> 
*%dest) {
 ; CHECK-LABEL: vmovn32_trunc1_onesrc:
 ; CHECK:   @ %bb.0: @ %entry
-; CHECK-NEXT:vmov.f32 s8, s2
-; CHECK-NEXT:vmov.f32 s9, s6
-; CHECK-NEXT:vmov.f32 s10, s3
-; CHECK-NEXT:vmov.f32 s11, s7
-; CHECK-NEXT:vstrh.32 q2, [r0, #8]
-; CHECK-NEXT:vmov.f32 s8, s0
-; CHECK-NEXT:vmov.f32 s9, s4
-; CHECK-NEXT:vmov.f32 s10, s1
-; CHECK-NEXT:vmov.f32 s11, s5
-; CHECK-NEXT:vstrh.32 q2, [r0]
+; CHECK-NEXT:vmovnt.i32 q0, q1
+; CHECK-NEXT:vstrw.32 q0, [r0]
 ; CHECK-NEXT:bx lr
 entry:
   %strided.vec = shufflevector <8 x i32> %src1, <8 x i32> undef, <8 x i32> 

@@ -51,16 +43,8 @@ entry:
 define arm_aapcs_vfpcc void @vmovn32_trunc2_onesrc(<8 x i32> %src1, <8 x i16> 
*%dest) {
 ; CHECK-LABEL: vmovn32_trunc2_onesrc:
 ; CHECK:   @ %bb.0: @ %entry
-; CHECK-NEXT:vmov.f32 s8, s6
-; CHECK-NEXT:vmov.f32 s9, s2
-; CHECK-NEXT:vmov.f32 s10, s7
-; CHECK-NEXT:vmov.f32 s11, s3
-; CHECK-NEXT:vstrh.32 q2, [r0, #8]
-; CHECK-NEXT:vmov.f32 s8, s4
-; CHECK-NEXT:vmov.f32 s9, s0
-; CHECK-NEXT:vmov.f32 s10, s5
-; CHECK-NEXT:vmov.f32 s11, s1
-; CHECK-NEXT:vstrh.32 q2, [r0]
+; CHECK-NEXT:vmovnt.i32 q1, q0
+; CHECK-NEXT:vstrw.32 q1, [r0]
 ; CHECK-NEXT:bx lr
 entry:
   %strided.vec = shufflevector <8 x i32> %src1, <8 x i32> undef, <8 x i32> 

@@ -98,40 +82,8 @@ entry:
 define arm_aapcs_vfpcc void @vmovn16_trunc1_onesrc(<16 x i16> %src1, <16 x i8> 
*%dest) {
 ; CHECK-LABEL: vmovn16_trunc1_onesrc:
 ; CHECK:   @ %bb.0: @ %entry
-; CHECK-NEXT:vmov.u16 r1, q0[4]
-; CHECK-NEXT:vmov.16 q2[0], r1
-; CHECK-NEXT:vmov.u16 r1, q1[4]
-; CHECK-NEXT:vmov.16 q2[1], r1
-; CHECK-NEXT:vmov.u16 r1, q0[5]
-; CHECK-NEXT:vmov.16 q2[2], r1
-; CHECK-NEXT:vmov.u16 r1, q1[5]
-; CHECK-NEX

[llvm-branch-commits] [llvm] 6d3098e - [obj2yaml, yaml2obj] - Refine how we set/dump the sh_entsize field.

2021-01-13 Thread Georgii Rymar via llvm-branch-commits


Author: Georgii Rymar
Date: 2021-01-13T11:52:40+03:00
New Revision: 6d3098e7ff968ad7d3033d7751af05a1fcd2ed9b

URL: 
https://github.com/llvm/llvm-project/commit/6d3098e7ff968ad7d3033d7751af05a1fcd2ed9b
DIFF: 
https://github.com/llvm/llvm-project/commit/6d3098e7ff968ad7d3033d7751af05a1fcd2ed9b.diff

LOG: [obj2yaml,yaml2obj] - Refine how we set/dump the sh_entsize field.

This reuses the code from yaml2obj (moves it to ELFYAML.h).
With it we can set the `sh_entsize` in a single place in `obj2yaml`.

Note that it also fixes a bug of `yaml2obj`: we do not
set the `sh_entsize` field for the `SHT_ARM_EXIDX` section properly.

Differential revision: https://reviews.llvm.org/D93858

Added: 


Modified: 
llvm/include/llvm/ObjectYAML/ELFYAML.h
llvm/lib/ObjectYAML/ELFEmitter.cpp
llvm/test/Object/obj2yaml.test
llvm/test/tools/obj2yaml/ELF/call-graph-profile-section.yaml
llvm/test/tools/obj2yaml/ELF/mips-abi-flags.yaml
llvm/test/tools/obj2yaml/ELF/sht-symtab-shndx.yaml
llvm/test/tools/obj2yaml/ELF/versym-section.yaml
llvm/test/tools/yaml2obj/ELF/arm-exidx-section.yaml
llvm/tools/obj2yaml/elf2yaml.cpp

Removed: 




diff  --git a/llvm/include/llvm/ObjectYAML/ELFYAML.h 
b/llvm/include/llvm/ObjectYAML/ELFYAML.h
index a838b69273ce..a289aab05b2c 100644
--- a/llvm/include/llvm/ObjectYAML/ELFYAML.h
+++ b/llvm/include/llvm/ObjectYAML/ELFYAML.h
@@ -16,6 +16,8 @@
 #define LLVM_OBJECTYAML_ELFYAML_H
 
 #include "llvm/ADT/StringRef.h"
+#include "llvm/BinaryFormat/ELF.h"
+#include "llvm/Object/ELFTypes.h"
 #include "llvm/ObjectYAML/DWARFYAML.h"
 #include "llvm/ObjectYAML/YAML.h"
 #include "llvm/Support/YAMLTraits.h"
@@ -69,6 +71,38 @@ LLVM_YAML_STRONG_TYPEDEF(uint32_t, MIPS_ISA)
 LLVM_YAML_STRONG_TYPEDEF(StringRef, YAMLFlowString)
 LLVM_YAML_STRONG_TYPEDEF(int64_t, YAMLIntUInt)
 
+template 
+unsigned getDefaultShEntSize(unsigned EMachine, ELF_SHT SecType,
+ StringRef SecName) {
+  if (EMachine == ELF::EM_MIPS && SecType == ELF::SHT_MIPS_ABIFLAGS)
+return sizeof(object::Elf_Mips_ABIFlags);
+
+  switch (SecType) {
+  case ELF::SHT_GROUP:
+return sizeof(typename ELFT::Word);
+  case ELF::SHT_REL:
+return sizeof(typename ELFT::Rel);
+  case ELF::SHT_RELA:
+return sizeof(typename ELFT::Rela);
+  case ELF::SHT_RELR:
+return sizeof(typename ELFT::Relr);
+  case ELF::SHT_DYNAMIC:
+return sizeof(typename ELFT::Dyn);
+  case ELF::SHT_HASH:
+return sizeof(typename ELFT::Word);
+  case ELF::SHT_SYMTAB_SHNDX:
+return sizeof(typename ELFT::Word);
+  case ELF::SHT_GNU_versym:
+return sizeof(typename ELFT::Half);
+  case ELF::SHT_LLVM_CALL_GRAPH_PROFILE:
+return sizeof(object::Elf_CGProfile_Impl);
+  default:
+if (SecName == ".debug_str")
+  return 1;
+return 0;
+  }
+}
+
 // For now, hardcode 64 bits everywhere that 32 or 64 would be needed
 // since 64-bit can hold 32-bit values too.
 struct FileHeader {

diff  --git a/llvm/lib/ObjectYAML/ELFEmitter.cpp 
b/llvm/lib/ObjectYAML/ELFEmitter.cpp
index 181b130de621..ba0525c4a675 100644
--- a/llvm/lib/ObjectYAML/ELFEmitter.cpp
+++ b/llvm/lib/ObjectYAML/ELFEmitter.cpp
@@ -704,6 +704,12 @@ void 
ELFState::initSectionHeaders(std::vector &SHeaders,
 if (Sec->Link)
   SHeader.sh_link = toSectionIndex(*Sec->Link, Sec->Name);
 
+if (Sec->EntSize)
+  SHeader.sh_entsize = *Sec->EntSize;
+else
+  SHeader.sh_entsize = ELFYAML::getDefaultShEntSize(
+  Doc.Header.Machine.getValueOr(ELF::EM_NONE), Sec->Type, Sec->Name);
+
 if (IsFirstUndefSection) {
   if (auto RawSec = dyn_cast(Sec)) {
 // We do not write any content for special SHN_UNDEF section.
@@ -712,8 +718,6 @@ void 
ELFState::initSectionHeaders(std::vector &SHeaders,
 if (RawSec->Info)
   SHeader.sh_info = *RawSec->Info;
   }
-  if (Sec->EntSize)
-SHeader.sh_entsize = *Sec->EntSize;
 
   LocationCounter += SHeader.sh_size;
   overrideFields(Sec, SHeader);
@@ -1161,9 +1165,6 @@ template 
 void ELFState::writeSectionContent(
 Elf_Shdr &SHeader, const ELFYAML::RawContentSection &Section,
 ContiguousBlobAccumulator &CBA) {
-  if (Section.EntSize)
-SHeader.sh_entsize = *Section.EntSize;
-
   if (Section.Info)
 SHeader.sh_info = *Section.Info;
 }
@@ -1182,12 +1183,6 @@ void ELFState::writeSectionContent(
   Section.Type == llvm::ELF::SHT_RELA) &&
  "Section type is not SHT_REL nor SHT_RELA");
 
-  bool IsRela = Section.Type == llvm::ELF::SHT_RELA;
-  if (Section.EntSize)
-SHeader.sh_entsize = *Section.EntSize;
-  else
-SHeader.sh_entsize = IsRela ? sizeof(Elf_Rela) : sizeof(Elf_Rel);
-
   // For relocation section set link to .symtab by default.
   unsigned Link = 0;
   if (!Section.Link && !ExcludedSectionHeaders.count(".symtab") &&
@@ -1200,6 +1195,7 @@ void ELFState::writeSectionContent(
   if (!Section.Relocations)
 return;
 
+  co

[llvm-branch-commits] [clang] cbea673 - [clang][driver] Restore the original help text for `-I`

2021-01-13 Thread Andrzej Warzynski via llvm-branch-commits


Author: Andrzej Warzynski
Date: 2021-01-13T09:19:50Z
New Revision: cbea6737d5130724c7c8cf8ee4ccf1c3dd099450

URL: 
https://github.com/llvm/llvm-project/commit/cbea6737d5130724c7c8cf8ee4ccf1c3dd099450
DIFF: 
https://github.com/llvm/llvm-project/commit/cbea6737d5130724c7c8cf8ee4ccf1c3dd099450.diff

LOG: [clang][driver] Restore the original help text for `-I`

The help text for `-I` was recently expanded in [1]. The expanded
version focuses on explaining the semantics of `-I` in Clang. We are now
in the process of adding support for `-I` in Flang and this new
description is incompatible with the semantics of `-I` in Flang. This
was brought up in this review:
  * https://reviews.llvm.org/D93453

This patch reverts the original change in Options.td. This way the help
text for `-I` remains generic enough so that it applies to both Clang
and Flang.

The expanded description of `-I` from [1] is moved to the
`DocBrief` field for `-I`. This field is prioritised over the help text
when generating ClangCommandLineReference.rst, so the user facing
documentation for Clang retains the expanded description:
  * https://clang.llvm.org/docs/ClangCommandLineReference.html
`DocBrief` fields are currently not used in Flang.

As requested in the reviews, the help text and the expanded description
are slightly refined.

[1] Commit: 8dd4e3ceb804a58bcf25e6856fc6fde5e1995a66

Differential Revision: https://reviews.llvm.org/D94169

Added: 


Modified: 
clang/docs/ClangCommandLineReference.rst
clang/include/clang/Driver/Options.td

Removed: 




diff  --git a/clang/docs/ClangCommandLineReference.rst 
b/clang/docs/ClangCommandLineReference.rst
index ac97f6fed935..d8ad75ce 100644
--- a/clang/docs/ClangCommandLineReference.rst
+++ b/clang/docs/ClangCommandLineReference.rst
@@ -1016,7 +1016,12 @@ Flags controlling how ``#include``\s are resolved to 
files.
 
 .. option:: -I, --include-directory , --include-directory=
 
-Add directory to include search path. If there are multiple -I options, these 
directories are searched in the order they are given before the standard system 
directories are searched. If the same directory is in the SYSTEM include search 
paths, for example if also specified with -isystem, the -I option will be 
ignored
+Add directory to include search path. For C++ input, if
+there are multiple -I options, these directories are searched
+in the order they are given before the standard system directories
+are searched. If the same directory is in the SYSTEM include search
+paths, for example if also specified with -isystem, the -I option
+will be ignored
 
 .. option:: -I-, --include-barrier
 

diff  --git a/clang/include/clang/Driver/Options.td 
b/clang/include/clang/Driver/Options.td
index b441c1b4c169..acc3db40bdc7 100644
--- a/clang/include/clang/Driver/Options.td
+++ b/clang/include/clang/Driver/Options.td
@@ -651,12 +651,13 @@ def I_ : Flag<["-"], "I-">, Group,
  "remove current directory from include path">;
 def I : JoinedOrSeparate<["-"], "I">, Group,
 Flags<[CC1Option,CC1AsOption]>, MetaVarName<"">,
-HelpText<"Add directory to include search path. If there are multiple -I "
- "options, these directories are searched in the order they are "
- "given before the standard system directories are searched. "
- "If the same directory is in the SYSTEM include search paths, for 
"
- "example if also specified with -isystem, the -I option will be "
- "ignored">;
+HelpText<"Add directory to the end of the list of include search paths">,
+DocBrief<[{Add directory to include search path. For C++ inputs, if
+there are multiple -I options, these directories are searched
+in the order they are given before the standard system directories
+are searched. If the same directory is in the SYSTEM include search
+paths, for example if also specified with -isystem, the -I option
+will be ignored}]>;
 def L : JoinedOrSeparate<["-"], "L">, Flags<[RenderJoined]>, Group,
 MetaVarName<"">, HelpText<"Add directory to library search path">;
 def MD : Flag<["-"], "MD">, Group,



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[llvm-branch-commits] [llvm] f638c2e - [LTO] Replace anonymous namespace with static functions (NFC).

2021-01-13 Thread Florian Hahn via llvm-branch-commits


Author: Florian Hahn
Date: 2021-01-13T09:32:15Z
New Revision: f638c2eb4ee6d0a0bd0e80cd305ad93e382db8f5

URL: 
https://github.com/llvm/llvm-project/commit/f638c2eb4ee6d0a0bd0e80cd305ad93e382db8f5
DIFF: 
https://github.com/llvm/llvm-project/commit/f638c2eb4ee6d0a0bd0e80cd305ad93e382db8f5.diff

LOG: [LTO] Replace anonymous namespace with static functions (NFC).

Only class declarations should be inside anonymous namespaces
(https://llvm.org/docs/CodingStandards.html#anonymous-namespaces)

Instead of using a anonymous namespace, just mark the functions in it as
static (some of them already were).

This simplifies the diff for D94486.

Added: 


Modified: 
llvm/lib/LTO/LTOBackend.cpp

Removed: 




diff  --git a/llvm/lib/LTO/LTOBackend.cpp b/llvm/lib/LTO/LTOBackend.cpp
index 65aaa8d21bfc..112a0c0897e8 100644
--- a/llvm/lib/LTO/LTOBackend.cpp
+++ b/llvm/lib/LTO/LTOBackend.cpp
@@ -176,9 +176,7 @@ static void RegisterPassPlugins(ArrayRef 
PassPlugins,
   }
 }
 
-namespace {
-
-std::unique_ptr
+static std::unique_ptr
 createTargetMachine(const Config &Conf, const Target *TheTarget, Module &M) {
   StringRef TheTriple = M.getTargetTriple();
   SubtargetFeatures Features;
@@ -360,10 +358,10 @@ static void runOldPMPasses(const Config &Conf, Module 
&Mod, TargetMachine *TM,
   passes.run(Mod);
 }
 
-bool opt(const Config &Conf, TargetMachine *TM, unsigned Task, Module &Mod,
- bool IsThinLTO, ModuleSummaryIndex *ExportSummary,
- const ModuleSummaryIndex *ImportSummary,
- const std::vector &CmdArgs) {
+static bool opt(const Config &Conf, TargetMachine *TM, unsigned Task,
+Module &Mod, bool IsThinLTO, ModuleSummaryIndex *ExportSummary,
+const ModuleSummaryIndex *ImportSummary,
+const std::vector &CmdArgs) {
   if (EmbedBitcode == LTOBitcodeEmbedding::EmbedPostMergePreOptimized) {
 // FIXME: the motivation for capturing post-merge bitcode and command line
 // is replicating the compilation environment from bitcode, without needing
@@ -393,9 +391,9 @@ bool opt(const Config &Conf, TargetMachine *TM, unsigned 
Task, Module &Mod,
   return !Conf.PostOptModuleHook || Conf.PostOptModuleHook(Task, Mod);
 }
 
-void codegen(const Config &Conf, TargetMachine *TM, AddStreamFn AddStream,
- unsigned Task, Module &Mod,
- const ModuleSummaryIndex &CombinedIndex) {
+static void codegen(const Config &Conf, TargetMachine *TM,
+AddStreamFn AddStream, unsigned Task, Module &Mod,
+const ModuleSummaryIndex &CombinedIndex) {
   if (Conf.PreCodeGenModuleHook && !Conf.PreCodeGenModuleHook(Task, Mod))
 return;
 
@@ -440,10 +438,11 @@ void codegen(const Config &Conf, TargetMachine *TM, 
AddStreamFn AddStream,
 DwoOut->keep();
 }
 
-void splitCodeGen(const Config &C, TargetMachine *TM, AddStreamFn AddStream,
-  unsigned ParallelCodeGenParallelismLevel,
-  std::unique_ptr Mod,
-  const ModuleSummaryIndex &CombinedIndex) {
+static void splitCodeGen(const Config &C, TargetMachine *TM,
+ AddStreamFn AddStream,
+ unsigned ParallelCodeGenParallelismLevel,
+ std::unique_ptr Mod,
+ const ModuleSummaryIndex &CombinedIndex) {
   ThreadPool CodegenThreadPool(
   heavyweight_hardware_concurrency(ParallelCodeGenParallelismLevel));
   unsigned ThreadCount = 0;
@@ -491,7 +490,8 @@ void splitCodeGen(const Config &C, TargetMachine *TM, 
AddStreamFn AddStream,
   CodegenThreadPool.wait();
 }
 
-Expected initAndLookupTarget(const Config &C, Module &Mod) {
+static Expected initAndLookupTarget(const Config &C,
+Module &Mod) {
   if (!C.OverrideTriple.empty())
 Mod.setTargetTriple(C.OverrideTriple);
   else if (Mod.getTargetTriple().empty())
@@ -503,7 +503,6 @@ Expected initAndLookupTarget(const Config 
&C, Module &Mod) {
 return make_error(Msg, inconvertibleErrorCode());
   return T;
 }
-}
 
 Error lto::finalizeOptimizationRemarks(
 std::unique_ptr DiagOutputFile) {



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[llvm-branch-commits] [llvm] 4cd4853 - [NFC][InstructionCost] Use InstructionCost in Transforms/Scalar/RewriteStatepointsForGC.cpp

2021-01-13 Thread David Sherwood via llvm-branch-commits


Author: David Sherwood
Date: 2021-01-13T09:42:58Z
New Revision: 4cd48535eca06245c89a9158844bb177c6f8eb63

URL: 
https://github.com/llvm/llvm-project/commit/4cd48535eca06245c89a9158844bb177c6f8eb63
DIFF: 
https://github.com/llvm/llvm-project/commit/4cd48535eca06245c89a9158844bb177c6f8eb63.diff

LOG: [NFC][InstructionCost] Use InstructionCost in 
Transforms/Scalar/RewriteStatepointsForGC.cpp

In places where we calculate costs using TTI.getXXXCost() interfaces
I have changed the code to use InstructionCost instead of unsigned.
The change is non functional since InstructionCost behaves in the
same way as an integer for valid costs. Currently the getXXXCost()
functions used in this file do not return invalid costs.

See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: 
http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html

Differential revision: https://reviews.llvm.org/D94484

Added: 


Modified: 
llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp

Removed: 




diff  --git a/llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp 
b/llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
index 68ddebf113d1..6a95ec3a6576 100644
--- a/llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
+++ b/llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
@@ -2110,10 +2110,10 @@ static Value* findRematerializableChainToBasePointer(
 
 // Helper function for the "rematerializeLiveValues". Compute cost of the use
 // chain we are going to rematerialize.
-static unsigned
-chainToBasePointerCost(SmallVectorImpl &Chain,
+static InstructionCost
+chainToBasePointerCost(SmallVectorImpl &Chain,
TargetTransformInfo &TTI) {
-  unsigned Cost = 0;
+  InstructionCost Cost = 0;
 
   for (Instruction *Instr : Chain) {
 if (CastInst *CI = dyn_cast(Instr)) {
@@ -2220,7 +2220,7 @@ static void rematerializeLiveValues(CallBase *Call,
   assert(Info.LiveSet.count(AlternateRootPhi));
 }
 // Compute cost of this chain
-unsigned Cost = chainToBasePointerCost(ChainToBase, TTI);
+InstructionCost Cost = chainToBasePointerCost(ChainToBase, TTI);
 // TODO: We can also account for cases when we will be able to remove some
 //   of the rematerialized values by later optimization passes. I.e if
 //   we rematerialized several intersecting chains. Or if original 
values



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[llvm-branch-commits] [llvm] 3122c66 - [AArch64][SVE] Remove chains of unnecessary SVE reinterpret intrinsics

2021-01-13 Thread Joe Ellis via llvm-branch-commits


Author: Joe Ellis
Date: 2021-01-13T09:44:09Z
New Revision: 3122c66aee7b709046753873c4e94db73742b3de

URL: 
https://github.com/llvm/llvm-project/commit/3122c66aee7b709046753873c4e94db73742b3de
DIFF: 
https://github.com/llvm/llvm-project/commit/3122c66aee7b709046753873c4e94db73742b3de.diff

LOG: [AArch64][SVE] Remove chains of unnecessary SVE reinterpret intrinsics

This commit extends SVEIntrinsicOpts::optimizeConvertFromSVBool to
identify and remove longer chains of redundant SVE reintepret
intrinsics. For example, the following chain of redundant SVE
reinterprets is now recognised as redundant:

%a = 
%1 =  @llvm.aarch64.sve.convert.to.svbool( %a)
%2 =  @llvm.aarch64.sve.convert.from.svbool( %1)
%3 =  @llvm.aarch64.sve.convert.to.svbool( %2)
%4 =  @llvm.aarch64.sve.convert.from.svbool( %3)
%5 =  @llvm.aarch64.sve.convert.to.svbool( %4)
%6 =  @llvm.aarch64.sve.convert.from.svbool( %5)
ret  %6

and will be replaced with:

ret  %a

Eliminating these can sometimes mean emitting fewer unnecessary
loads/stores when lowering to assembly.

Differential Revision: https://reviews.llvm.org/D94074

Added: 


Modified: 
llvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp
llvm/test/CodeGen/AArch64/sve-intrinsic-opts-reinterpret.ll

Removed: 




diff  --git a/llvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp 
b/llvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp
index 8e8b12c07bbf..9911f33371c6 100644
--- a/llvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp
+++ b/llvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp
@@ -177,22 +177,50 @@ bool 
SVEIntrinsicOpts::optimizeConvertFromSVBool(IntrinsicInst *I) {
   if (isa(I->getArgOperand(0)))
 return processPhiNode(I);
 
-  // If we have a reinterpret intrinsic I of type A which is converting from
-  // another reinterpret Y of type B, and the source type of Y is A, then we 
can
-  // elide away both reinterprets if there are no other users of Y.
-  auto *Y = isReinterpretToSVBool(I->getArgOperand(0));
-  if (!Y)
-return false;
+  SmallVector CandidatesForRemoval;
+  Value *Cursor = I->getOperand(0), *EarliestReplacement = nullptr;
+
+  const auto *IVTy = cast(I->getType());
+
+  // Walk the chain of conversions.
+  while (Cursor) {
+// If the type of the cursor has fewer lanes than the final result, zeroing
+// must take place, which breaks the equivalence chain.
+const auto *CursorVTy = cast(Cursor->getType());
+if (CursorVTy->getElementCount().getKnownMinValue() <
+IVTy->getElementCount().getKnownMinValue())
+  break;
+
+// If the cursor has the same type as I, it is a viable replacement.
+if (Cursor->getType() == IVTy)
+  EarliestReplacement = Cursor;
 
-  Value *SourceVal = Y->getArgOperand(0);
-  if (I->getType() != SourceVal->getType())
+auto *IntrinsicCursor = dyn_cast(Cursor);
+
+// If this is not an SVE conversion intrinsic, this is the end of the 
chain.
+if (!IntrinsicCursor || !(IntrinsicCursor->getIntrinsicID() ==
+  Intrinsic::aarch64_sve_convert_to_svbool ||
+  IntrinsicCursor->getIntrinsicID() ==
+  Intrinsic::aarch64_sve_convert_from_svbool))
+  break;
+
+CandidatesForRemoval.insert(CandidatesForRemoval.begin(), IntrinsicCursor);
+Cursor = IntrinsicCursor->getOperand(0);
+  }
+
+  // If no viable replacement in the conversion chain was found, there is
+  // nothing to do.
+  if (!EarliestReplacement)
 return false;
 
-  I->replaceAllUsesWith(SourceVal);
+  I->replaceAllUsesWith(EarliestReplacement);
   I->eraseFromParent();
-  if (Y->use_empty())
-Y->eraseFromParent();
 
+  while (!CandidatesForRemoval.empty()) {
+Instruction *Candidate = CandidatesForRemoval.pop_back_val();
+if (Candidate->use_empty())
+  Candidate->eraseFromParent();
+  }
   return true;
 }
 

diff  --git a/llvm/test/CodeGen/AArch64/sve-intrinsic-opts-reinterpret.ll 
b/llvm/test/CodeGen/AArch64/sve-intrinsic-opts-reinterpret.ll
index 47e0ff8f19c7..22c61d0565af 100644
--- a/llvm/test/CodeGen/AArch64/sve-intrinsic-opts-reinterpret.ll
+++ b/llvm/test/CodeGen/AArch64/sve-intrinsic-opts-reinterpret.ll
@@ -67,6 +67,62 @@ define  @reinterpret_test_d_rev( %a) {
   ret  %2
 }
 
+define  @reinterpret_test_full_chain( %a) {
+; OPT-LABEL: @reinterpret_test_full_chain(
+; OPT: ret  %a
+  %1 = tail call  
@llvm.aarch64.sve.convert.to.svbool.nxv2i1( %a)
+  %2 = tail call  
@llvm.aarch64.sve.convert.from.svbool.nxv4i1( %1)
+  %3 = tail call  
@llvm.aarch64.sve.convert.to.svbool.nxv4i1( %2)
+  %4 = tail call  
@llvm.aarch64.sve.convert.from.svbool.nxv4i1( %3)
+  %5 = tail call  
@llvm.aarch64.sve.convert.to.svbool.nxv4i1( %4)
+  %6 = tail call  
@llvm.aarch64.sve.convert.from.svbool.nxv2i1( %5)
+  ret  %6
+}
+
+; The last two reinterprets are not necessary, since they are doing the same
+; work as the first two.
+define  @rei

[llvm-branch-commits] [llvm] 0f59d09 - [X86][AVX] combineVectorSignBitsTruncation - limit AVX512 truncations to 128-bits (PR48727)

2021-01-13 Thread Simon Pilgrim via llvm-branch-commits


Author: Simon Pilgrim
Date: 2021-01-13T10:38:23Z
New Revision: 0f59d099571d3d803b54e2ce06aa94babb9b26db

URL: 
https://github.com/llvm/llvm-project/commit/0f59d099571d3d803b54e2ce06aa94babb9b26db
DIFF: 
https://github.com/llvm/llvm-project/commit/0f59d099571d3d803b54e2ce06aa94babb9b26db.diff

LOG: [X86][AVX] combineVectorSignBitsTruncation - limit AVX512 truncations to 
128-bits (PR48727)

rG73a44f437bf1 result in 256-bit packss/packus ops with additional shuffles 
that shuffle combining can sometimes try to convert back into a truncation.

Added: 
llvm/test/CodeGen/X86/pr48727.ll

Modified: 
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/vector-pack-256.ll

Removed: 




diff  --git a/llvm/lib/Target/X86/X86ISelLowering.cpp 
b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 65b784f31842..5949782f3c0c 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -45957,11 +45957,11 @@ static SDValue combineVectorSignBitsTruncation(SDNode 
*N, const SDLoc &DL,
   if (Subtarget.hasAVX512() &&
   !(!Subtarget.useAVX512Regs() && VT.is256BitVector() &&
 InVT.is512BitVector())) {
-// PACK should still be worth it for 128/256-bit vectors if the sources 
were
+// PACK should still be worth it for 128-bit vectors if the sources were
 // originally concatenated from subvectors.
 SmallVector ConcatOps;
-if (VT.getSizeInBits() > 256 || !collectConcatOps(In.getNode(), ConcatOps))
-  return SDValue();
+if (VT.getSizeInBits() > 128 || !collectConcatOps(In.getNode(), ConcatOps))
+return SDValue();
   }
 
   unsigned NumPackedSignBits = std::min(SVT.getSizeInBits(), 16);

diff  --git a/llvm/test/CodeGen/X86/pr48727.ll 
b/llvm/test/CodeGen/X86/pr48727.ll
new file mode 100644
index ..4fa16db14acc
--- /dev/null
+++ b/llvm/test/CodeGen/X86/pr48727.ll
@@ -0,0 +1,51 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=skx | FileCheck %s
+
+define void @PR48727() {
+; CHECK-LABEL: PR48727:
+; CHECK:   # %bb.0: # %entry
+; CHECK-NEXT:vcvttpd2dqy 0, %xmm0
+; CHECK-NEXT:vcvttpd2dqy 128, %xmm1
+; CHECK-NEXT:movq (%rax), %rax
+; CHECK-NEXT:vcvttpd2dqy 160, %xmm2
+; CHECK-NEXT:vinserti128 $1, %xmm2, %ymm1, %ymm1
+; CHECK-NEXT:vcvttpd2dqy (%rax), %xmm2
+; CHECK-NEXT:vinserti128 $1, %xmm2, %ymm0, %ymm0
+; CHECK-NEXT:vinserti64x4 $1, %ymm1, %zmm0, %zmm0
+; CHECK-NEXT:vpmovdw %zmm0, %ymm0
+; CHECK-NEXT:vmovdqu %ymm0, 16(%rax)
+; CHECK-NEXT:vzeroupper
+; CHECK-NEXT:retq
+entry:
+  %0 = load [100 x [100 x i16]]*, [100 x [100 x i16]]** undef, align 8
+  %wide.load.2 = load <4 x double>, <4 x double>* null, align 16
+  %1 = fptosi <4 x double> %wide.load.2 to <4 x i16>
+  %2 = getelementptr inbounds [100 x [100 x i16]], [100 x [100 x i16]]* %0, 
i64 0, i64 0, i64 8
+  %3 = bitcast i16* %2 to <4 x i16>*
+  store <4 x i16> %1, <4 x i16>* %3, align 8
+  %wide.load.3 = load <4 x double>, <4 x double>* undef, align 16, 
!invariant.load !0, !noalias !1
+  %4 = fptosi <4 x double> %wide.load.3 to <4 x i16>
+  %5 = getelementptr inbounds [100 x [100 x i16]], [100 x [100 x i16]]* %0, 
i64 0, i64 0, i64 12
+  %6 = bitcast i16* %5 to <4 x i16>*
+  store <4 x i16> %4, <4 x i16>* %6, align 8
+  %7 = getelementptr inbounds [100 x [100 x double]], [100 x [100 x double]]* 
null, i64 0, i64 0, i64 16
+  %8 = bitcast double* %7 to <4 x double>*
+  %wide.load.4 = load <4 x double>, <4 x double>* %8, align 16, 
!invariant.load !0, !noalias !1
+  %9 = fptosi <4 x double> %wide.load.4 to <4 x i16>
+  %10 = getelementptr inbounds [100 x [100 x i16]], [100 x [100 x i16]]* %0, 
i64 0, i64 0, i64 16
+  %11 = bitcast i16* %10 to <4 x i16>*
+  store <4 x i16> %9, <4 x i16>* %11, align 8
+  %12 = getelementptr inbounds [100 x [100 x double]], [100 x [100 x double]]* 
null, i64 0, i64 0, i64 20
+  %13 = bitcast double* %12 to <4 x double>*
+  %wide.load.5 = load <4 x double>, <4 x double>* %13, align 16, 
!invariant.load !0, !noalias !1
+  %14 = fptosi <4 x double> %wide.load.5 to <4 x i16>
+  %15 = getelementptr inbounds [100 x [100 x i16]], [100 x [100 x i16]]* %0, 
i64 0, i64 0, i64 20
+  %16 = bitcast i16* %15 to <4 x i16>*
+  store <4 x i16> %14, <4 x i16>* %16, align 8
+  ret void
+}
+
+!0 = !{}
+!1 = !{!2}
+!2 = !{!"buffer: {index:1, offset:0, size:2}", !3}
+!3 = !{!"XLA global AA domain"}

diff  --git a/llvm/test/CodeGen/X86/vector-pack-256.ll 
b/llvm/test/CodeGen/X86/vector-pack-256.ll
index af06ddbd3f3a..b789b46906cb 100644
--- a/llvm/test/CodeGen/X86/vector-pack-256.ll
+++ b/llvm/test/CodeGen/X86/vector-pack-256.ll
@@ -31,7 +31,10 @@ define <16 x i16> @trunc_concat_packssdw_256(<8 x i32> %a0, 
<8 x i32> %a1) nounw
 ; AVX512:   # %bb.0:
 ; AVX512-NEXT:vpsrad $17, %ymm0, %ymm0
 ; AVX512-NEXT:vpsrad $23, %ymm1, %ymm1
-; AVX512-

[llvm-branch-commits] [llvm] ad85e39 - [SVE] Add ISel pattern for addvl

2021-01-13 Thread Cullen Rhodes via llvm-branch-commits


Author: Cullen Rhodes
Date: 2021-01-13T10:57:49Z
New Revision: ad85e3967067154a579f7989ce0e736f8cd56be9

URL: 
https://github.com/llvm/llvm-project/commit/ad85e3967067154a579f7989ce0e736f8cd56be9
DIFF: 
https://github.com/llvm/llvm-project/commit/ad85e3967067154a579f7989ce0e736f8cd56be9.diff

LOG: [SVE] Add ISel pattern for addvl

Reviewed By: cameron.mcinally

Differential Revision: https://reviews.llvm.org/D94504

Added: 


Modified: 
llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
llvm/test/CodeGen/AArch64/split-vector-insert.ll
llvm/test/CodeGen/AArch64/sve-gep.ll
llvm/test/CodeGen/AArch64/sve-intrinsics-loads-nf.ll
llvm/test/CodeGen/AArch64/sve-ld1-addressing-mode-reg-imm.ll

llvm/test/CodeGen/AArch64/sve-pred-contiguous-ldst-addressing-mode-reg-imm.ll

llvm/test/CodeGen/AArch64/sve-pred-non-temporal-ldst-addressing-mode-reg-imm.ll
llvm/test/CodeGen/AArch64/sve-st1-addressing-mode-reg-imm.ll

Removed: 




diff  --git a/llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td 
b/llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
index 50368199effb..cd80f3801fb2 100644
--- a/llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
+++ b/llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
@@ -1648,6 +1648,9 @@ let Predicates = [HasSVE] in {
 def : Pat<(vscale (sve_cntd_imm_neg i32:$imm)), (SUBXrs XZR, (CNTD_XPiI 
31, $imm), 0)>;
   }
 
+  def : Pat<(add GPR64:$op, (vscale (sve_rdvl_imm i32:$imm))),
+(ADDVL_XXI GPR64:$op, $imm)>;
+
   // FIXME: BigEndian requires an additional REV instruction to satisfy the
   // constraint that none of the bits change when stored to memory as one
   // type, and and reloaded as another type.

diff  --git a/llvm/test/CodeGen/AArch64/split-vector-insert.ll 
b/llvm/test/CodeGen/AArch64/split-vector-insert.ll
index 3fb86ae6b963..cc2ea86cad2e 100644
--- a/llvm/test/CodeGen/AArch64/split-vector-insert.ll
+++ b/llvm/test/CodeGen/AArch64/split-vector-insert.ll
@@ -29,27 +29,27 @@ define  @test_nxv2i64_v8i64( %a, <8 x i64> %
 ; CHECK-NEXT:lsl x10, x10, #3
 ; CHECK-NEXT:st1d { z0.d }, p0, [sp]
 ; CHECK-NEXT:str q1, [x9, x10]
-; CHECK-NEXT:addvl x10, sp, #1
 ; CHECK-NEXT:ld1d { z0.d }, p0/z, [sp]
 ; CHECK-NEXT:mov w9, #2
 ; CHECK-NEXT:cmp x8, #2 // =2
 ; CHECK-NEXT:csel x9, x8, x9, lo
+; CHECK-NEXT:addvl x10, sp, #1
 ; CHECK-NEXT:lsl x9, x9, #3
 ; CHECK-NEXT:st1d { z0.d }, p0, [sp, #1, mul vl]
 ; CHECK-NEXT:str q2, [x10, x9]
-; CHECK-NEXT:addvl x10, sp, #2
 ; CHECK-NEXT:ld1d { z0.d }, p0/z, [sp, #1, mul vl]
 ; CHECK-NEXT:mov w9, #4
 ; CHECK-NEXT:cmp x8, #4 // =4
 ; CHECK-NEXT:csel x9, x8, x9, lo
+; CHECK-NEXT:addvl x10, sp, #2
 ; CHECK-NEXT:lsl x9, x9, #3
 ; CHECK-NEXT:st1d { z0.d }, p0, [sp, #2, mul vl]
 ; CHECK-NEXT:str q3, [x10, x9]
-; CHECK-NEXT:addvl x10, sp, #3
 ; CHECK-NEXT:ld1d { z0.d }, p0/z, [sp, #2, mul vl]
 ; CHECK-NEXT:mov w9, #6
 ; CHECK-NEXT:cmp x8, #6 // =6
 ; CHECK-NEXT:csel x8, x8, x9, lo
+; CHECK-NEXT:addvl x10, sp, #3
 ; CHECK-NEXT:lsl x8, x8, #3
 ; CHECK-NEXT:st1d { z0.d }, p0, [sp, #3, mul vl]
 ; CHECK-NEXT:str q4, [x10, x8]
@@ -82,27 +82,27 @@ define  @test_nxv2f64_v8f64( %a, <8 x
 ; CHECK-NEXT:lsl x10, x10, #3
 ; CHECK-NEXT:st1d { z0.d }, p0, [sp]
 ; CHECK-NEXT:str q1, [x9, x10]
-; CHECK-NEXT:addvl x10, sp, #1
 ; CHECK-NEXT:ld1d { z0.d }, p0/z, [sp]
 ; CHECK-NEXT:mov w9, #2
 ; CHECK-NEXT:cmp x8, #2 // =2
 ; CHECK-NEXT:csel x9, x8, x9, lo
+; CHECK-NEXT:addvl x10, sp, #1
 ; CHECK-NEXT:lsl x9, x9, #3
 ; CHECK-NEXT:st1d { z0.d }, p0, [sp, #1, mul vl]
 ; CHECK-NEXT:str q2, [x10, x9]
-; CHECK-NEXT:addvl x10, sp, #2
 ; CHECK-NEXT:ld1d { z0.d }, p0/z, [sp, #1, mul vl]
 ; CHECK-NEXT:mov w9, #4
 ; CHECK-NEXT:cmp x8, #4 // =4
 ; CHECK-NEXT:csel x9, x8, x9, lo
+; CHECK-NEXT:addvl x10, sp, #2
 ; CHECK-NEXT:lsl x9, x9, #3
 ; CHECK-NEXT:st1d { z0.d }, p0, [sp, #2, mul vl]
 ; CHECK-NEXT:str q3, [x10, x9]
-; CHECK-NEXT:addvl x10, sp, #3
 ; CHECK-NEXT:ld1d { z0.d }, p0/z, [sp, #2, mul vl]
 ; CHECK-NEXT:mov w9, #6
 ; CHECK-NEXT:cmp x8, #6 // =6
 ; CHECK-NEXT:csel x8, x8, x9, lo
+; CHECK-NEXT:addvl x10, sp, #3
 ; CHECK-NEXT:lsl x8, x8, #3
 ; CHECK-NEXT:st1d { z0.d }, p0, [sp, #3, mul vl]
 ; CHECK-NEXT:str q4, [x10, x8]

diff  --git a/llvm/test/CodeGen/AArch64/sve-gep.ll 
b/llvm/test/CodeGen/AArch64/sve-gep.ll
index ffde9289a55d..7e6e8efbb790 100644
--- a/llvm/test/CodeGen/AArch64/sve-gep.ll
+++ b/llvm/test/CodeGen/AArch64/sve-gep.ll
@@ -8,8 +8,7 @@
 define * @scalar_of_scalable_1(* %base) {
 ; CHECK-LABEL: scalar_of_scalable_1:
 ; CHECK:   // %bb.0:
-; CHECK-NEXT:rdvl x8, #4
-; CHECK-NEXT:add x0, x0, x8
+; CHECK-NEXT:addvl x0, x0, #4
 ; CHECK-NEXT:ret
   %d = getelementptr , * %base, i64 4
   ret * %d

diff  --git a/

[llvm-branch-commits] [compiler-rt] 1854594 - Hwasan InitPrctl check for error using internal_iserror

2021-01-13 Thread Matthew Malcomson via llvm-branch-commits


Author: Matthew Malcomson
Date: 2021-01-13T11:35:09Z
New Revision: 1854594b80b444dc21b830b51e53e05d38fc7d60

URL: 
https://github.com/llvm/llvm-project/commit/1854594b80b444dc21b830b51e53e05d38fc7d60
DIFF: 
https://github.com/llvm/llvm-project/commit/1854594b80b444dc21b830b51e53e05d38fc7d60.diff

LOG: Hwasan InitPrctl check for error using internal_iserror

When adding this function in https://reviews.llvm.org/D68794 I did not
notice that internal_prctl has the API of the syscall to prctl rather
than the API of the glibc (posix) wrapper.

This means that the error return value is not necessarily -1 and that
errno is not set by the call.

For InitPrctl this means that the checks do not catch running on a
kernel *without* the required ABI (not caught since I only tested this
function correctly enables the ABI when it exists).
This commit updates the two calls which check for an error condition to
use `internal_iserror`.  That function sets a provided integer to an
equivalent errno value and returns a boolean to indicate success or not.

Tested by running on a kernel that has this ABI and on one that does
not.  Verified that running on the kernel without this ABI the current
code prints the provided error message and does not attempt to run the
program.  Verified that running on the kernel with this ABI the current
code does not print an error message and turns on the ABI.
All tests done on an AArch64 Linux machine.

Reviewed By: eugenis

Differential Revision: https://reviews.llvm.org/D94425

Added: 


Modified: 
compiler-rt/lib/hwasan/hwasan_linux.cpp

Removed: 




diff  --git a/compiler-rt/lib/hwasan/hwasan_linux.cpp 
b/compiler-rt/lib/hwasan/hwasan_linux.cpp
index e99926d355cf..793fd2fab6bf 100644
--- a/compiler-rt/lib/hwasan/hwasan_linux.cpp
+++ b/compiler-rt/lib/hwasan/hwasan_linux.cpp
@@ -119,8 +119,10 @@ void InitPrctl() {
 #define PR_GET_TAGGED_ADDR_CTRL 56
 #define PR_TAGGED_ADDR_ENABLE (1UL << 0)
   // Check we're running on a kernel that can use the tagged address ABI.
-  if (internal_prctl(PR_GET_TAGGED_ADDR_CTRL, 0, 0, 0, 0) == (uptr)-1 &&
-  errno == EINVAL) {
+  int local_errno = 0;
+  if (internal_iserror(internal_prctl(PR_GET_TAGGED_ADDR_CTRL, 0, 0, 0, 0),
+   &local_errno) &&
+  local_errno == EINVAL) {
 #if SANITIZER_ANDROID
 // Some older Android kernels have the tagged pointer ABI on
 // unconditionally, and hence don't have the tagged-addr prctl while still
@@ -137,8 +139,8 @@ void InitPrctl() {
   }
 
   // Turn on the tagged address ABI.
-  if (internal_prctl(PR_SET_TAGGED_ADDR_CTRL, PR_TAGGED_ADDR_ENABLE, 0, 0, 0) 
==
-  (uptr)-1 ||
+  if (internal_iserror(internal_prctl(PR_SET_TAGGED_ADDR_CTRL,
+  PR_TAGGED_ADDR_ENABLE, 0, 0, 0)) ||
   !internal_prctl(PR_GET_TAGGED_ADDR_CTRL, 0, 0, 0, 0)) {
 Printf(
 "FATAL: HWAddressSanitizer failed to enable tagged address syscall "



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[llvm-branch-commits] [llvm] ceb9379 - [ADT] Fix join_impl using the wrong size when calculating total length

2021-01-13 Thread Nathan James via llvm-branch-commits


Author: Nathan James
Date: 2021-01-13T11:36:49Z
New Revision: ceb9379a90f5a320d19f5694ef00b4d1164fa7d6

URL: 
https://github.com/llvm/llvm-project/commit/ceb9379a90f5a320d19f5694ef00b4d1164fa7d6
DIFF: 
https://github.com/llvm/llvm-project/commit/ceb9379a90f5a320d19f5694ef00b4d1164fa7d6.diff

LOG: [ADT] Fix join_impl using the wrong size when calculating total length

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D83305

Added: 


Modified: 
llvm/include/llvm/ADT/StringExtras.h

Removed: 




diff  --git a/llvm/include/llvm/ADT/StringExtras.h 
b/llvm/include/llvm/ADT/StringExtras.h
index 1fea700efe0c..0178539bc402 100644
--- a/llvm/include/llvm/ADT/StringExtras.h
+++ b/llvm/include/llvm/ADT/StringExtras.h
@@ -384,13 +384,16 @@ inline std::string join_impl(IteratorT Begin, IteratorT 
End,
 
   size_t Len = (std::distance(Begin, End) - 1) * Separator.size();
   for (IteratorT I = Begin; I != End; ++I)
-Len += (*Begin).size();
+Len += I->size();
   S.reserve(Len);
+  size_t PrevCapacity = S.capacity();
+  (void)PrevCapacity;
   S += (*Begin);
   while (++Begin != End) {
 S += Separator;
 S += (*Begin);
   }
+  assert(PrevCapacity == S.capacity() && "String grew during building");
   return S;
 }
 



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[llvm-branch-commits] [llvm] ada96fa - [LTO] Add test to ensure objc-arc-contract is executed.

2021-01-13 Thread Florian Hahn via llvm-branch-commits


Author: Florian Hahn
Date: 2021-01-13T12:18:17Z
New Revision: ada96fa62179d2addd6c85a02381f1353fe7a2d1

URL: 
https://github.com/llvm/llvm-project/commit/ada96fa62179d2addd6c85a02381f1353fe7a2d1
DIFF: 
https://github.com/llvm/llvm-project/commit/ada96fa62179d2addd6c85a02381f1353fe7a2d1.diff

LOG: [LTO] Add test to ensure objc-arc-contract is executed.

This test adds additional test coverage for upcoming refactorings.

Added: 
llvm/test/LTO/X86/objc-arc-contract.ll

Modified: 


Removed: 




diff  --git a/llvm/test/LTO/X86/objc-arc-contract.ll 
b/llvm/test/LTO/X86/objc-arc-contract.ll
new file mode 100644
index ..689668503ee6
--- /dev/null
+++ b/llvm/test/LTO/X86/objc-arc-contract.ll
@@ -0,0 +1,13 @@
+; RUN: llvm-as < %s >%t.bc
+; RUN: llvm-lto -debug-pass=Arguments -exported-symbol=_f -o /dev/null %t.bc 
2>&1 -disable-verify | FileCheck %s
+
+target datalayout = 
"e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-apple-macosx10.10.0"
+
+; Make sure -objc-arc-contract is executed.
+; CHECK: Pass Arguments: {{.*}} -objc-arc-contract
+
+define void @f() {
+entry:
+  ret void
+}



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[llvm-branch-commits] [llvm] af1bb4b - Fix build errors after ceb9379a9

2021-01-13 Thread Nathan James via llvm-branch-commits


Author: Nathan James
Date: 2021-01-13T12:19:53Z
New Revision: af1bb4bc823f823df9869d354f639ee86b83d747

URL: 
https://github.com/llvm/llvm-project/commit/af1bb4bc823f823df9869d354f639ee86b83d747
DIFF: 
https://github.com/llvm/llvm-project/commit/af1bb4bc823f823df9869d354f639ee86b83d747.diff

LOG: Fix build errors after ceb9379a9

For some reason some builds dont like the arrow operator access. using the 
deref then access should fix the issue.

/home/buildbots/ppc64le-flang-mlir-rhel-test/ppc64le-flang-rhel-clang-build/llvm-project/llvm/include/llvm/ADT/iterator.h:171:34:
 error: taking the address of a temporary object of type 'llvm::StringRef' 
[-Waddress-of-temporary]
  PointerT operator->() { return &static_cast(this)->operator*(); }
 ^~~
/home/buildbots/ppc64le-flang-mlir-rhel-test/ppc64le-flang-rhel-clang-build/llvm-project/llvm/include/llvm/ADT/StringExtras.h:387:13:
 note: in instantiation of member function 
'llvm::iterator_facade_base, std::random_access_iterator_tag, llvm::StringRef, long, 
llvm::StringRef *, llvm::StringRef &>::operator->' requested here
Len += I->size();

Added: 


Modified: 
llvm/include/llvm/ADT/StringExtras.h

Removed: 




diff  --git a/llvm/include/llvm/ADT/StringExtras.h 
b/llvm/include/llvm/ADT/StringExtras.h
index 0178539bc402..caa1ed547bb2 100644
--- a/llvm/include/llvm/ADT/StringExtras.h
+++ b/llvm/include/llvm/ADT/StringExtras.h
@@ -384,7 +384,7 @@ inline std::string join_impl(IteratorT Begin, IteratorT End,
 
   size_t Len = (std::distance(Begin, End) - 1) * Separator.size();
   for (IteratorT I = Begin; I != End; ++I)
-Len += I->size();
+Len += (*I).size();
   S.reserve(Len);
   size_t PrevCapacity = S.capacity();
   (void)PrevCapacity;



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[llvm-branch-commits] [llvm] c6e341c - Revert "[dsymutil] Warn on timestmap mismatch between object file and debug map"

2021-01-13 Thread David Zarzycki via llvm-branch-commits


Author: David Zarzycki
Date: 2021-01-13T07:23:34-05:00
New Revision: c6e341c89957db31432baffb72ee015f37d8c48d

URL: 
https://github.com/llvm/llvm-project/commit/c6e341c89957db31432baffb72ee015f37d8c48d
DIFF: 
https://github.com/llvm/llvm-project/commit/c6e341c89957db31432baffb72ee015f37d8c48d.diff

LOG: Revert "[dsymutil] Warn on timestmap mismatch between object file and 
debug map"

This reverts commit e5553b9a6ab9f02f382a31cc5117b52c3bfaf77a.

Tests are not allowed to modify the source. Please figure out a way to
use %t rather than dynamically modifying the inputs.

Added: 


Modified: 
llvm/test/tools/dsymutil/X86/swift-ast-x86_64.test
llvm/test/tools/dsymutil/debug-map-parsing.test
llvm/tools/dsymutil/BinaryHolder.cpp
llvm/tools/dsymutil/BinaryHolder.h
llvm/tools/dsymutil/DwarfLinkerForBinary.cpp

Removed: 
llvm/test/tools/dsymutil/Inputs/basic.macho.x86_64.o



diff  --git a/llvm/test/tools/dsymutil/Inputs/basic.macho.x86_64.o 
b/llvm/test/tools/dsymutil/Inputs/basic.macho.x86_64.o
deleted file mode 100644
index e69de29bb2d1..

diff  --git a/llvm/test/tools/dsymutil/X86/swift-ast-x86_64.test 
b/llvm/test/tools/dsymutil/X86/swift-ast-x86_64.test
index 43d930af7128..626208ff3496 100644
--- a/llvm/test/tools/dsymutil/X86/swift-ast-x86_64.test
+++ b/llvm/test/tools/dsymutil/X86/swift-ast-x86_64.test
@@ -20,7 +20,7 @@ READOBJ-NEXT: |.|
 DWARFDUMP: __swift_ast
 
 RUN: dsymutil -oso-prepend-path %p/.. %p/../Inputs/swift-ast.macho.x86_64 
-no-output -verbose 2>&1 | FileCheck %s --check-prefix=TIMESTAMP
-TIMESTAMP: warning: {{.*}}/swift-ast.swiftmodule: timestamp mismatch between 
swift interface file ({{.*}}) and debug map ({{.*}})
+TIMESTAMP: warning: Timestamp mismatch
 
 RUN: dsymutil -s 
%T/swift-ast.dSYM/Contents/Resources/DWARF/swift-ast.macho.x86_64 | FileCheck 
%s --check-prefix=NAST
 NAST-NOT: N_AST

diff  --git a/llvm/test/tools/dsymutil/debug-map-parsing.test 
b/llvm/test/tools/dsymutil/debug-map-parsing.test
index 703934d38503..fb4226093da1 100644
--- a/llvm/test/tools/dsymutil/debug-map-parsing.test
+++ b/llvm/test/tools/dsymutil/debug-map-parsing.test
@@ -1,4 +1,3 @@
-RUN: touch %p/Inputs/basic.macho.x86_64.o
 RUN: dsymutil -dump-debug-map -oso-prepend-path=%p 
%p/Inputs/basic.macho.x86_64 | FileCheck %s
 RUN: dsymutil -dump-debug-map -oso-prepend-path=%p 
%p/Inputs/basic-lto.macho.x86_64 | FileCheck %s --check-prefix=CHECK-LTO
 RUN: dsymutil -verbose -dump-debug-map -oso-prepend-path=%p 
%p/Inputs/basic-archive.macho.x86_64 2>&1 | FileCheck %s 
--check-prefix=CHECK-ARCHIVE
@@ -47,7 +46,6 @@ opening the archive once if mulitple of its members are used).
 CHECK-ARCHIVE:  trying to open {{.*}}basic-archive.macho.x86_64'
 CHECK-ARCHIVE-NEXT:loaded object.
 CHECK-ARCHIVE-NEXT: trying to open {{.*}}/Inputs/basic1.macho.x86_64.o'
-CHECK-ARCHIVE-NEXT: warning: {{.*}}/Inputs/basic1.macho.x86_64.o: timestamp 
mismatch between object file ({{.*}}) and debug map ({{.*}})
 CHECK-ARCHIVE-NEXT:loaded object.
 CHECK-ARCHIVE-NEXT: trying to open {{.*}}/libbasic.a(basic2.macho.x86_64.o)'
 CHECK-ARCHIVE-NEXT:loaded archive {{.*}}/libbasic.a'

diff  --git a/llvm/tools/dsymutil/BinaryHolder.cpp 
b/llvm/tools/dsymutil/BinaryHolder.cpp
index b401d519718c..df3cb7161a81 100644
--- a/llvm/tools/dsymutil/BinaryHolder.cpp
+++ b/llvm/tools/dsymutil/BinaryHolder.cpp
@@ -87,8 +87,7 @@ Error 
BinaryHolder::ArchiveEntry::load(IntrusiveRefCntPtr VFS,
 }
 
 Error BinaryHolder::ObjectEntry::load(IntrusiveRefCntPtr VFS,
-  StringRef Filename, TimestampTy 
Timestamp,
-  bool Verbose) {
+  StringRef Filename, bool Verbose) {
   // Try to load regular binary and force it to be memory mapped.
   auto ErrOrBuff = (Filename == "-")
? MemoryBuffer::getSTDIN()
@@ -96,17 +95,6 @@ Error 
BinaryHolder::ObjectEntry::load(IntrusiveRefCntPtr VFS,
   if (auto Err = ErrOrBuff.getError())
 return errorCodeToError(Err);
 
-  if (Filename != "-" && Timestamp != sys::TimePoint<>()) {
-llvm::ErrorOr Stat = VFS->status(Filename);
-if (!Stat)
-  return errorCodeToError(Stat.getError());
-if (Timestamp != Stat->getLastModificationTime())
-  WithColor::warning() << Filename
-   << ": timestamp mismatch between object file ("
-   << Stat->getLastModificationTime()
-   << ") and debug map (" << Timestamp << ")\n";
-  }
-
   MemBuffer = std::move(*ErrOrBuff);
 
   if (Verbose)
@@ -194,11 +182,7 @@ BinaryHolder::ArchiveEntry::getObjectEntry(StringRef 
Filename,
   if (Timestamp != sys::TimePoint<>() &&
   Timestamp != ModTimeOrErr.get()) {
 if (Verbose)
-  WithColor::warning()
-  << *NameOrErr
-  << ": timestamp mismatch betw

[llvm-branch-commits] [llvm] 2170e0e - [SVE][CodeGen] CTLZ, CTTZ & CTPOP operations (predicates)

2021-01-13 Thread Kerry McLaughlin via llvm-branch-commits


Author: Kerry McLaughlin
Date: 2021-01-13T12:24:54Z
New Revision: 2170e0ee60db638175a8c57230d46fbaafa06d4c

URL: 
https://github.com/llvm/llvm-project/commit/2170e0ee60db638175a8c57230d46fbaafa06d4c
DIFF: 
https://github.com/llvm/llvm-project/commit/2170e0ee60db638175a8c57230d46fbaafa06d4c.diff

LOG: [SVE][CodeGen] CTLZ, CTTZ & CTPOP operations (predicates)

Canonicalise the following operations in getNode() for predicate types:
 - CTLZ(Pred)  -> bitwise_NOT(Pred)
 - CTTZ(Pred)  -> bitwise_NOT(Pred)
 - CTPOP(Pred) -> Pred

Reviewed By: david-arm

Differential Revision: https://reviews.llvm.org/D94428

Added: 
llvm/test/CodeGen/AArch64/sve-bit-counting-pred.ll

Modified: 
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Removed: 




diff  --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp 
b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index c4f6e89006c1..e080408bbe42 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -4796,6 +4796,15 @@ SDValue SelectionDAG::getNode(unsigned Opcode, const 
SDLoc &DL, EVT VT,
   case ISD::VSCALE:
 assert(VT == Operand.getValueType() && "Unexpected VT!");
 break;
+  case ISD::CTPOP:
+if (Operand.getValueType().getScalarType() == MVT::i1)
+  return Operand;
+break;
+  case ISD::CTLZ:
+  case ISD::CTTZ:
+if (Operand.getValueType().getScalarType() == MVT::i1)
+  return getNOT(DL, Operand, Operand.getValueType());
+break;
   case ISD::VECREDUCE_SMIN:
   case ISD::VECREDUCE_UMAX:
 if (Operand.getValueType().getScalarType() == MVT::i1)

diff  --git a/llvm/test/CodeGen/AArch64/sve-bit-counting-pred.ll 
b/llvm/test/CodeGen/AArch64/sve-bit-counting-pred.ll
new file mode 100644
index ..73c555d98943
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/sve-bit-counting-pred.ll
@@ -0,0 +1,141 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s 2>%t | FileCheck %s
+; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t
+
+; If this check fails please read test/CodeGen/AArch64/README for instructions 
on how to resolve it.
+; WARN-NOT: warning
+
+;
+; CTPOP
+;
+
+define  @ctpop_nxv16i1( %a) {
+; CHECK-LABEL: ctpop_nxv16i1:
+; CHECK:   // %bb.0:
+; CHECK-NEXT:ret
+  %res = call  @llvm.ctpop.nxv16i1( %a)
+  ret  %res
+}
+
+define  @ctpop_nxv8i1( %a) {
+; CHECK-LABEL: ctpop_nxv8i1:
+; CHECK:   // %bb.0:
+; CHECK-NEXT:ret
+  %res = call  @llvm.ctpop.nxv8i1( %a)
+  ret  %res
+}
+
+define  @ctpop_nxv4i1( %a) {
+; CHECK-LABEL: ctpop_nxv4i1:
+; CHECK:   // %bb.0:
+; CHECK-NEXT:ret
+  %res = call  @llvm.ctpop.nxv4i1( %a)
+  ret  %res
+}
+
+define  @ctpop_nxv2i1( %a) {
+; CHECK-LABEL: ctpop_nxv2i1:
+; CHECK:   // %bb.0:
+; CHECK-NEXT:ret
+  %res = call  @llvm.ctpop.nxv2i1( %a)
+  ret  %res
+}
+
+; CTLZ
+
+define  @ctlz_nxv16i1( %a) {
+; CHECK-LABEL: ctlz_nxv16i1:
+; CHECK:   // %bb.0:
+; CHECK-NEXT:ptrue p1.b
+; CHECK-NEXT:not p0.b, p1/z, p0.b
+; CHECK-NEXT:ret
+  %res = call  @llvm.ctlz.nxv16i1( %a)
+  ret  %res
+}
+
+define  @ctlz_nxv8i1( %a) {
+; CHECK-LABEL: ctlz_nxv8i1:
+; CHECK:   // %bb.0:
+; CHECK-NEXT:ptrue p1.h
+; CHECK-NEXT:not p0.b, p1/z, p0.b
+; CHECK-NEXT:ret
+  %res = call  @llvm.ctlz.nxv8i1( %a)
+  ret  %res
+}
+
+define  @ctlz_nxv4i1( %a) {
+; CHECK-LABEL: ctlz_nxv4i1:
+; CHECK:   // %bb.0:
+; CHECK-NEXT:ptrue p1.s
+; CHECK-NEXT:not p0.b, p1/z, p0.b
+; CHECK-NEXT:ret
+  %res = call  @llvm.ctlz.nxv4i1( %a)
+  ret  %res
+}
+
+define  @ctlz_nxv2i1( %a) {
+; CHECK-LABEL: ctlz_nxv2i1:
+; CHECK:   // %bb.0:
+; CHECK-NEXT:ptrue p1.d
+; CHECK-NEXT:not p0.b, p1/z, p0.b
+; CHECK-NEXT:ret
+  %res = call  @llvm.ctlz.nxv2i1( %a)
+  ret  %res
+}
+
+; CTTZ
+
+define  @cttz_nxv16i1( %a) {
+; CHECK-LABEL: cttz_nxv16i1:
+; CHECK:   // %bb.0:
+; CHECK-NEXT:ptrue p1.b
+; CHECK-NEXT:not p0.b, p1/z, p0.b
+; CHECK-NEXT:ret
+  %res = call  @llvm.cttz.nxv16i1( %a)
+  ret  %res
+}
+
+define  @cttz_nxv8i1( %a) {
+; CHECK-LABEL: cttz_nxv8i1:
+; CHECK:   // %bb.0:
+; CHECK-NEXT:ptrue p1.h
+; CHECK-NEXT:not p0.b, p1/z, p0.b
+; CHECK-NEXT:ret
+  %res = call  @llvm.cttz.nxv8i1( %a)
+  ret  %res
+}
+
+define  @cttz_nxv4i1( %a) {
+; CHECK-LABEL: cttz_nxv4i1:
+; CHECK:   // %bb.0:
+; CHECK-NEXT:ptrue p1.s
+; CHECK-NEXT:not p0.b, p1/z, p0.b
+; CHECK-NEXT:ret
+  %res = call  @llvm.cttz.nxv4i1( %a)
+  ret  %res
+}
+
+define  @cttz_nxv2i1( %a) {
+; CHECK-LABEL: cttz_nxv2i1:
+; CHECK:   // %bb.0:
+; CHECK-NEXT:ptrue p1.d
+; CHECK-NEXT:not p0.b, p1/z, p0.b
+; CHECK-NEXT:ret
+  %res = call  @llvm.cttz.nxv2i1( %a)
+  ret  %res
+}
+
+declare  @llvm.ctpop.nxv16i1()
+declare  @llvm.ctpop.nxv8i1()
+declare  @llvm.ctpop.nxv4i1()
+declare  @llvm.ctpop.nxv2i1()
+
+declare  @llvm.ctlz.nx

[llvm-branch-commits] [llvm] f8cece1 - [ValueTracking] Fix one s/dyn_cast/dyn_cast_or_null/

2021-01-13 Thread Markus Lavin via llvm-branch-commits


Author: Markus Lavin
Date: 2021-01-13T13:39:53+01:00
New Revision: f8cece18630575dccd62ba6a12f21acf5fd38c26

URL: 
https://github.com/llvm/llvm-project/commit/f8cece18630575dccd62ba6a12f21acf5fd38c26
DIFF: 
https://github.com/llvm/llvm-project/commit/f8cece18630575dccd62ba6a12f21acf5fd38c26.diff

LOG: [ValueTracking] Fix one s/dyn_cast/dyn_cast_or_null/

Handle if Constant::getAggregateElement() returns nullptr in
canCreateUndefOrPoison().

Differential Revision: https://reviews.llvm.org/D94494

Added: 


Modified: 
llvm/lib/Analysis/ValueTracking.cpp
llvm/unittests/Analysis/ValueTrackingTest.cpp

Removed: 




diff  --git a/llvm/lib/Analysis/ValueTracking.cpp 
b/llvm/lib/Analysis/ValueTracking.cpp
index 1c75c5fbd0db..b138caa05610 100644
--- a/llvm/lib/Analysis/ValueTracking.cpp
+++ b/llvm/lib/Analysis/ValueTracking.cpp
@@ -4737,7 +4737,7 @@ static bool canCreateUndefOrPoison(const Operator *Op, 
bool PoisonOnly) {
 ShiftAmounts.push_back(C);
 
   bool Safe = llvm::all_of(ShiftAmounts, [](Constant *C) {
-auto *CI = dyn_cast(C);
+auto *CI = dyn_cast_or_null(C);
 return CI && CI->getValue().ult(C->getType()->getIntegerBitWidth());
   });
   return !Safe;

diff  --git a/llvm/unittests/Analysis/ValueTrackingTest.cpp 
b/llvm/unittests/Analysis/ValueTrackingTest.cpp
index d70fd6eb0ba2..4b3b33b42625 100644
--- a/llvm/unittests/Analysis/ValueTrackingTest.cpp
+++ b/llvm/unittests/Analysis/ValueTrackingTest.cpp
@@ -943,6 +943,7 @@ TEST_F(ValueTrackingTest, 
isGuaranteedNotToBeUndefOrPoison_assume) {
 
 TEST(ValueTracking, canCreatePoisonOrUndef) {
   std::string AsmHead =
+  "@s = external dso_local global i32, align 1\n"
   "declare i32 @g(i32)\n"
   "define void @f(i32 %x, i32 %y, float %fx, float %fy, i1 %cond, "
   "<4 x i32> %vx, <4 x i32> %vx2,  %svx, i8* %p) {\n";
@@ -1001,7 +1002,11 @@ TEST(ValueTracking, canCreatePoisonOrUndef) {
   {{true, false}, "call i32 @g(i32 %x)"},
   {{false, false}, "call noundef i32 @g(i32 %x)"},
   {{true, false}, "fcmp nnan oeq float %fx, %fy"},
-  {{false, false}, "fcmp oeq float %fx, %fy"}};
+  {{false, false}, "fcmp oeq float %fx, %fy"},
+  {{true, false},
+   "ashr <4 x i32> %vx, select (i1 icmp sgt (i32 ptrtoint (i32* @s to "
+   "i32), i32 1), <4 x i32> zeroinitializer, <4 x i32> )"}};
 
   std::string AssemblyStr = AsmHead;
   for (auto &Itm : Data)



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[llvm-branch-commits] [compiler-rt] 704831f - Revert "Hwasan InitPrctl check for error using internal_iserror"

2021-01-13 Thread Nico Weber via llvm-branch-commits


Author: Nico Weber
Date: 2021-01-13T08:30:11-05:00
New Revision: 704831fe1f1f02e41ab7440a6f6c2c390ec183b1

URL: 
https://github.com/llvm/llvm-project/commit/704831fe1f1f02e41ab7440a6f6c2c390ec183b1
DIFF: 
https://github.com/llvm/llvm-project/commit/704831fe1f1f02e41ab7440a6f6c2c390ec183b1.diff

LOG: Revert "Hwasan InitPrctl check for error using internal_iserror"

This reverts commit 1854594b80b444dc21b830b51e53e05d38fc7d60.
See https://reviews.llvm.org/D94425#2495621

Added: 


Modified: 
compiler-rt/lib/hwasan/hwasan_linux.cpp

Removed: 




diff  --git a/compiler-rt/lib/hwasan/hwasan_linux.cpp 
b/compiler-rt/lib/hwasan/hwasan_linux.cpp
index 793fd2fab6bf..e99926d355cf 100644
--- a/compiler-rt/lib/hwasan/hwasan_linux.cpp
+++ b/compiler-rt/lib/hwasan/hwasan_linux.cpp
@@ -119,10 +119,8 @@ void InitPrctl() {
 #define PR_GET_TAGGED_ADDR_CTRL 56
 #define PR_TAGGED_ADDR_ENABLE (1UL << 0)
   // Check we're running on a kernel that can use the tagged address ABI.
-  int local_errno = 0;
-  if (internal_iserror(internal_prctl(PR_GET_TAGGED_ADDR_CTRL, 0, 0, 0, 0),
-   &local_errno) &&
-  local_errno == EINVAL) {
+  if (internal_prctl(PR_GET_TAGGED_ADDR_CTRL, 0, 0, 0, 0) == (uptr)-1 &&
+  errno == EINVAL) {
 #if SANITIZER_ANDROID
 // Some older Android kernels have the tagged pointer ABI on
 // unconditionally, and hence don't have the tagged-addr prctl while still
@@ -139,8 +137,8 @@ void InitPrctl() {
   }
 
   // Turn on the tagged address ABI.
-  if (internal_iserror(internal_prctl(PR_SET_TAGGED_ADDR_CTRL,
-  PR_TAGGED_ADDR_ENABLE, 0, 0, 0)) ||
+  if (internal_prctl(PR_SET_TAGGED_ADDR_CTRL, PR_TAGGED_ADDR_ENABLE, 0, 0, 0) 
==
+  (uptr)-1 ||
   !internal_prctl(PR_GET_TAGGED_ADDR_CTRL, 0, 0, 0, 0)) {
 Printf(
 "FATAL: HWAddressSanitizer failed to enable tagged address syscall "



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[llvm-branch-commits] [llvm] d307d89 - [Tests] Added test for memcpy loop idiom recognization

2021-01-13 Thread Dávid Bolvanský via llvm-branch-commits


Author: Dávid Bolvanský
Date: 2021-01-13T14:55:46+01:00
New Revision: d307d892ade9384a5d8b40ddb6a9c0b2dffbdb81

URL: 
https://github.com/llvm/llvm-project/commit/d307d892ade9384a5d8b40ddb6a9c0b2dffbdb81
DIFF: 
https://github.com/llvm/llvm-project/commit/d307d892ade9384a5d8b40ddb6a9c0b2dffbdb81.diff

LOG: [Tests] Added test for memcpy loop idiom recognization

Added: 
llvm/test/Transforms/LoopIdiom/memcpy.ll

Modified: 


Removed: 




diff  --git a/llvm/test/Transforms/LoopIdiom/memcpy.ll 
b/llvm/test/Transforms/LoopIdiom/memcpy.ll
new file mode 100644
index ..af8dc773c19b
--- /dev/null
+++ b/llvm/test/Transforms/LoopIdiom/memcpy.ll
@@ -0,0 +1,106 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -basic-aa -loop-idiom < %s -S | FileCheck %s
+
+define void @copy_both_noalias(float* noalias nocapture %d, float* noalias 
nocapture readonly %s, i64 %sz) {
+; CHECK-LABEL: @copy_both_noalias(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:[[D1:%.*]] = bitcast float* [[D:%.*]] to i8*
+; CHECK-NEXT:[[S2:%.*]] = bitcast float* [[S:%.*]] to i8*
+; CHECK-NEXT:[[EXITCOND_NOT1:%.*]] = icmp eq i64 [[SZ:%.*]], 0
+; CHECK-NEXT:br i1 [[EXITCOND_NOT1]], label [[FOR_END:%.*]], label 
[[FOR_BODY_PREHEADER:%.*]]
+; CHECK:   for.body.preheader:
+; CHECK-NEXT:[[TMP0:%.*]] = shl nuw i64 [[SZ]], 2
+; CHECK-NEXT:call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[D1]], i8* 
align 4 [[S2]], i64 [[TMP0]], i1 false)
+; CHECK-NEXT:br label [[FOR_BODY:%.*]]
+; CHECK:   for.body:
+; CHECK-NEXT:[[I_04:%.*]] = phi i64 [ [[INC:%.*]], [[FOR_BODY]] ], [ 0, 
[[FOR_BODY_PREHEADER]] ]
+; CHECK-NEXT:[[D_ADDR_03:%.*]] = phi float* [ [[INCDEC_PTR1:%.*]], 
[[FOR_BODY]] ], [ [[D]], [[FOR_BODY_PREHEADER]] ]
+; CHECK-NEXT:[[S_ADDR_02:%.*]] = phi float* [ [[INCDEC_PTR:%.*]], 
[[FOR_BODY]] ], [ [[S]], [[FOR_BODY_PREHEADER]] ]
+; CHECK-NEXT:[[INCDEC_PTR]] = getelementptr inbounds float, float* 
[[S_ADDR_02]], i64 1
+; CHECK-NEXT:[[TMP1:%.*]] = load float, float* [[S_ADDR_02]], align 4
+; CHECK-NEXT:[[INCDEC_PTR1]] = getelementptr inbounds float, float* 
[[D_ADDR_03]], i64 1
+; CHECK-NEXT:[[INC]] = add i64 [[I_04]], 1
+; CHECK-NEXT:[[EXITCOND_NOT:%.*]] = icmp eq i64 [[INC]], [[SZ]]
+; CHECK-NEXT:br i1 [[EXITCOND_NOT]], label [[FOR_END_LOOPEXIT:%.*]], label 
[[FOR_BODY]]
+; CHECK:   for.end.loopexit:
+; CHECK-NEXT:br label [[FOR_END]]
+; CHECK:   for.end:
+; CHECK-NEXT:ret void
+;
+entry:
+  %exitcond.not1 = icmp eq i64 %sz, 0
+  br i1 %exitcond.not1, label %for.end, label %for.body.preheader
+
+for.body.preheader:   ; preds = %entry
+  br label %for.body
+
+for.body: ; preds = 
%for.body.preheader, %for.body
+  %i.04 = phi i64 [ %inc, %for.body ], [ 0, %for.body.preheader ]
+  %d.addr.03 = phi float* [ %incdec.ptr1, %for.body ], [ %d, 
%for.body.preheader ]
+  %s.addr.02 = phi float* [ %incdec.ptr, %for.body ], [ %s, 
%for.body.preheader ]
+  %incdec.ptr = getelementptr inbounds float, float* %s.addr.02, i64 1
+  %0 = load float, float* %s.addr.02, align 4
+  %incdec.ptr1 = getelementptr inbounds float, float* %d.addr.03, i64 1
+  store float %0, float* %d.addr.03, align 4
+  %inc = add i64 %i.04, 1
+  %exitcond.not = icmp eq i64 %inc, %sz
+  br i1 %exitcond.not, label %for.end.loopexit, label %for.body
+
+for.end.loopexit: ; preds = %for.body
+  br label %for.end
+
+for.end:  ; preds = %for.end.loopexit, 
%entry
+  ret void
+}
+
+define void @copy_one_noalias(float* nocapture %d, float* noalias nocapture 
readonly %s, i64 %sz) {
+; CHECK-LABEL: @copy_one_noalias(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:[[D1:%.*]] = bitcast float* [[D:%.*]] to i8*
+; CHECK-NEXT:[[S2:%.*]] = bitcast float* [[S:%.*]] to i8*
+; CHECK-NEXT:[[EXITCOND_NOT1:%.*]] = icmp eq i64 [[SZ:%.*]], 0
+; CHECK-NEXT:br i1 [[EXITCOND_NOT1]], label [[FOR_END:%.*]], label 
[[FOR_BODY_PREHEADER:%.*]]
+; CHECK:   for.body.preheader:
+; CHECK-NEXT:[[TMP0:%.*]] = shl nuw i64 [[SZ]], 2
+; CHECK-NEXT:call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[D1]], i8* 
align 4 [[S2]], i64 [[TMP0]], i1 false)
+; CHECK-NEXT:br label [[FOR_BODY:%.*]]
+; CHECK:   for.body:
+; CHECK-NEXT:[[I_04:%.*]] = phi i64 [ [[INC:%.*]], [[FOR_BODY]] ], [ 0, 
[[FOR_BODY_PREHEADER]] ]
+; CHECK-NEXT:[[D_ADDR_03:%.*]] = phi float* [ [[INCDEC_PTR1:%.*]], 
[[FOR_BODY]] ], [ [[D]], [[FOR_BODY_PREHEADER]] ]
+; CHECK-NEXT:[[S_ADDR_02:%.*]] = phi float* [ [[INCDEC_PTR:%.*]], 
[[FOR_BODY]] ], [ [[S]], [[FOR_BODY_PREHEADER]] ]
+; CHECK-NEXT:[[INCDEC_PTR]] = getelementptr inbounds float, float* 
[[S_ADDR_02]], i64 1
+; CHECK-NEXT:[[TMP1:%.*]] = load float, float* [[S_ADDR_02]], align 4
+; CHECK-NEXT:[[INCDEC_PTR1]] = geteleme

[llvm-branch-commits] [llvm] 0a0ee7f - [X86] canonicalizeShuffleMaskWithHorizOp - minor refactor to support multiple src ops. NFCI.

2021-01-13 Thread Simon Pilgrim via llvm-branch-commits


Author: Simon Pilgrim
Date: 2021-01-13T13:59:56Z
New Revision: 0a0ee7f5a5af0f5dae65452f649ab665e787e7d6

URL: 
https://github.com/llvm/llvm-project/commit/0a0ee7f5a5af0f5dae65452f649ab665e787e7d6
DIFF: 
https://github.com/llvm/llvm-project/commit/0a0ee7f5a5af0f5dae65452f649ab665e787e7d6.diff

LOG: [X86] canonicalizeShuffleMaskWithHorizOp - minor refactor to support 
multiple src ops. NFCI.

canonicalizeShuffleMaskWithHorizOp currently only supports shuffles with 1 or 2 
sources, but PR41813 will require us to support higher numbers of sources.

This patch just generalizes the initial setup stages to ensure all src ops are 
the same type and opcode and then will continue to early out if we have more 
than 2 sources.

Added: 


Modified: 
llvm/lib/Target/X86/X86ISelLowering.cpp

Removed: 




diff  --git a/llvm/lib/Target/X86/X86ISelLowering.cpp 
b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 5949782f3c0c..821cfc5f0c27 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -36088,20 +36088,20 @@ static SDValue canonicalizeShuffleMaskWithHorizOp(
 MutableArrayRef Ops, MutableArrayRef Mask,
 unsigned RootSizeInBits, const SDLoc &DL, SelectionDAG &DAG,
 const X86Subtarget &Subtarget) {
-
-  // Combine binary shuffle of 2 similar 'Horizontal' instructions into a
-  // single instruction. Attempt to match a v2X64 repeating shuffle pattern 
that
-  // represents the LHS/RHS inputs for the lower/upper halves.
-  if (Mask.empty() || Ops.empty() || 2 < Ops.size())
+  if (Mask.empty() || Ops.empty())
 return SDValue();
 
-  SDValue BC0 = peekThroughBitcasts(Ops.front());
-  SDValue BC1 = peekThroughBitcasts(Ops.back());
+  SmallVector BC;
+  for (SDValue Op : Ops)
+BC.push_back(peekThroughBitcasts(Op));
+
+  // All ops must be the same horizop + type.
+  SDValue BC0 = BC[0];
   EVT VT0 = BC0.getValueType();
-  EVT VT1 = BC1.getValueType();
   unsigned Opcode0 = BC0.getOpcode();
-  unsigned Opcode1 = BC1.getOpcode();
-  if (Opcode0 != Opcode1 || VT0 != VT1 || VT0.getSizeInBits() != 
RootSizeInBits)
+  if (VT0.getSizeInBits() != RootSizeInBits || llvm::any_of(BC, [&](SDValue V) 
{
+return V.getOpcode() != Opcode0 || V.getValueType() != VT0;
+  }))
 return SDValue();
 
   bool isHoriz = (Opcode0 == X86ISD::FHADD || Opcode0 == X86ISD::HADD ||
@@ -36110,12 +36110,16 @@ static SDValue canonicalizeShuffleMaskWithHorizOp(
   if (!isHoriz && !isPack)
 return SDValue();
 
-  if (Mask.size() == VT0.getVectorNumElements()) {
-int NumElts = VT0.getVectorNumElements();
-int NumLanes = VT0.getSizeInBits() / 128;
-int NumEltsPerLane = NumElts / NumLanes;
-int NumHalfEltsPerLane = NumEltsPerLane / 2;
+  int NumElts = VT0.getVectorNumElements();
+  int NumLanes = VT0.getSizeInBits() / 128;
+  int NumEltsPerLane = NumElts / NumLanes;
+  int NumHalfEltsPerLane = NumEltsPerLane / 2;
+
+  if (2 < Ops.size())
+return SDValue();
 
+  SDValue BC1 = BC[BC.size() - 1];
+  if (Mask.size() == VT0.getVectorNumElements()) {
 // Canonicalize binary shuffles of horizontal ops that use the
 // same sources to an unary shuffle.
 // TODO: Try to perform this fold even if the shuffle remains.
@@ -36159,6 +36163,9 @@ static SDValue canonicalizeShuffleMaskWithHorizOp(
 }
   }
 
+  // Combine binary shuffle of 2 similar 'Horizontal' instructions into a
+  // single instruction. Attempt to match a v2X64 repeating shuffle pattern 
that
+  // represents the LHS/RHS inputs for the lower/upper halves.
   unsigned EltSizeInBits = RootSizeInBits / Mask.size();
   SmallVector TargetMask128, WideMask128;
   if (isRepeatedTargetShuffleMask(128, EltSizeInBits, Mask, TargetMask128) &&



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[llvm-branch-commits] [libc] ab57780 - [libc] Refresh benchmark progress bar when needed.

2021-01-13 Thread Guillaume Chatelet via llvm-branch-commits


Author: Guillaume Chatelet
Date: 2021-01-13T14:06:51Z
New Revision: ab577807165c45abfbadc117125ec7275cdcc0cf

URL: 
https://github.com/llvm/llvm-project/commit/ab577807165c45abfbadc117125ec7275cdcc0cf
DIFF: 
https://github.com/llvm/llvm-project/commit/ab577807165c45abfbadc117125ec7275cdcc0cf.diff

LOG: [libc] Refresh benchmark progress bar when needed.

Added: 


Modified: 
libc/benchmarks/LibcMemoryBenchmarkMain.cpp

Removed: 




diff  --git a/libc/benchmarks/LibcMemoryBenchmarkMain.cpp 
b/libc/benchmarks/LibcMemoryBenchmarkMain.cpp
index 99c5879397d9..770336e3205c 100644
--- a/libc/benchmarks/LibcMemoryBenchmarkMain.cpp
+++ b/libc/benchmarks/LibcMemoryBenchmarkMain.cpp
@@ -262,17 +262,21 @@ template  struct MemfunctionBenchmark 
: IBenchmark {
 };
   }
 
-  void reportProgress(BenchmarkStatus BS) {
+  void reportProgress() {
+static size_t LastPercent = -1;
 const size_t TotalSteps = Study.Measurements.capacity();
 const size_t Steps = Study.Measurements.size();
 const size_t Percent = 100 * Steps / TotalSteps;
+if (Percent == LastPercent)
+  return;
+LastPercent = Percent;
 size_t I = 0;
 errs() << '[';
 for (; I <= Percent; ++I)
   errs() << '#';
 for (; I <= 100; ++I)
   errs() << '_';
-errs() << "] " << Percent << "%\r";
+errs() << "] " << Percent << '%' << '\r';
   }
 
   void runTrials(const BenchmarkOptions &Options,
@@ -283,7 +287,7 @@ template  struct MemfunctionBenchmark : 
IBenchmark {
 for (size_t i = 0; i < NumTrials; ++i) {
   const BenchmarkResult Result = benchmark(Options, B, B.functor());
   Study.Measurements.push_back(Result.BestGuess);
-  reportProgress(Result.TerminationStatus);
+  reportProgress();
 }
   }
 
@@ -330,6 +334,7 @@ void writeStudy(const Study &S) {
.concat(Output));
   json::OStream JOS(FOS);
   serializeToJson(S, JOS);
+  FOS << "\n";
 }
 
 void main() {



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[llvm-branch-commits] [clang] 7c77b53 - [OpenCL] Improve OpenCL operator tests

2021-01-13 Thread Sven van Haastregt via llvm-branch-commits


Author: Sven van Haastregt
Date: 2021-01-13T14:50:49Z
New Revision: 7c77b536efdd953d6d97bffbd9ca320c517b26d7

URL: 
https://github.com/llvm/llvm-project/commit/7c77b536efdd953d6d97bffbd9ca320c517b26d7
DIFF: 
https://github.com/llvm/llvm-project/commit/7c77b536efdd953d6d97bffbd9ca320c517b26d7.diff

LOG: [OpenCL] Improve OpenCL operator tests

Extend testing of increment/decrement operators and make sure these
operators are tested in only one dedicated test file.

Rename logical-ops.cl to operators.cl, as it was already containing
more than just logical operators.

Add testing for the remainder operator on floating point types.

Added: 
clang/test/SemaOpenCL/operators.cl

Modified: 
clang/test/SemaOpenCL/invalid-vector-literals.cl
clang/test/SemaOpenCL/vector_inc_dec_ops.cl

Removed: 
clang/test/SemaOpenCL/logical-ops.cl



diff  --git a/clang/test/SemaOpenCL/invalid-vector-literals.cl 
b/clang/test/SemaOpenCL/invalid-vector-literals.cl
index 4e502aad3bad..1d82fedf29de 100644
--- a/clang/test/SemaOpenCL/invalid-vector-literals.cl
+++ b/clang/test/SemaOpenCL/invalid-vector-literals.cl
@@ -8,7 +8,6 @@ void vector_literals_invalid()
 {
   int4 a = (int4)(1,2,3); // expected-error{{too few elements}}
   int4 b = (int4)(1,2,3,4,5); // expected-error{{excess elements in vector}}
-  ((float4)(1.0f))++; // expected-error{{cannot increment value of type 
'float4'}}
   int8 d = (int8)(a,(float4)(1)); // expected-error{{initializing 'int' with 
an expression of incompatible type 'float4'}}
   ((int4)(0)).x = 8; // expected-error{{expression is not assignable}}
 }

diff  --git a/clang/test/SemaOpenCL/logical-ops.cl 
b/clang/test/SemaOpenCL/operators.cl
similarity index 90%
rename from clang/test/SemaOpenCL/logical-ops.cl
rename to clang/test/SemaOpenCL/operators.cl
index f6972c46e2ad..cf359acd5acb 100644
--- a/clang/test/SemaOpenCL/logical-ops.cl
+++ b/clang/test/SemaOpenCL/operators.cl
@@ -36,6 +36,8 @@ kernel void float_ops() {
 #if __OPENCL_C_VERSION__ < 120
 // expected-error@-2{{invalid argument type}}
 #endif
+  float fcst = 5.5f;
+  float fremainder = fcst % 2.0f; // expected-error {{invalid operands to 
binary expression}}
 }
 
 kernel void vec_float_ops() {
@@ -56,6 +58,8 @@ kernel void vec_float_ops() {
 #if __OPENCL_C_VERSION__ < 120
 // expected-error@-2{{invalid argument type}}
 #endif
+  float4 f4cst = (float4)(5.5f, 5.5f, 5.5f, 5.5f);
+  float4 f4remainder = f4cst % (float4)(2.0f, 2.0f, 2.0f, 2.0f); // 
expected-error {{invalid operands to binary expression}}
 }
 
 kernel void double_ops() {
@@ -85,6 +89,8 @@ kernel void double_ops() {
 #if __OPENCL_C_VERSION__ < 120
 // expected-error@-2{{invalid argument type}}
 #endif
+  double dcst = 5.5;
+  double dremainder = dcst % 2.0; // expected-error {{invalid operands to 
binary expression}}
 }
 
 kernel void vec_double_ops() {

diff  --git a/clang/test/SemaOpenCL/vector_inc_dec_ops.cl 
b/clang/test/SemaOpenCL/vector_inc_dec_ops.cl
index c65bbcb5b749..533253ee696f 100644
--- a/clang/test/SemaOpenCL/vector_inc_dec_ops.cl
+++ b/clang/test/SemaOpenCL/vector_inc_dec_ops.cl
@@ -1,9 +1,9 @@
 // RUN: %clang_cc1 %s -verify -pedantic -fsyntax-only
-// expected-no-diagnostics
 
 typedef __attribute__((ext_vector_type(2)))  char char2;
 typedef __attribute__((ext_vector_type(4)))  unsigned int uint4;
 typedef __attribute__((ext_vector_type(8)))  long long8;
+typedef __attribute__((ext_vector_type(4)))  float float4;
 
 void vectorIncrementDecrementOps()
 {
@@ -17,3 +17,10 @@ void vectorIncrementDecrementOps()
   ++B;
   C++;
 }
+
+void invalidIncrementDecrementOps() {
+  ((float4)(1.0f))++; // expected-error{{cannot increment value of type 
'float4'}}
+  float4 i;
+  ++i; // expected-error{{cannot increment value of type '__private float4'}}
+  i--; // expected-error{{cannot decrement value of type '__private float4'}}
+}



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[llvm-branch-commits] [llvm] b7b1e8c - [X86] Add tests for rv_marker lowering.

2021-01-13 Thread Florian Hahn via llvm-branch-commits


Author: Florian Hahn
Date: 2021-01-13T14:58:50Z
New Revision: b7b1e8c37a920fcf2755a99fbf78cc570cf76c60

URL: 
https://github.com/llvm/llvm-project/commit/b7b1e8c37a920fcf2755a99fbf78cc570cf76c60
DIFF: 
https://github.com/llvm/llvm-project/commit/b7b1e8c37a920fcf2755a99fbf78cc570cf76c60.diff

LOG: [X86] Add tests for rv_marker lowering.

Precommit tests for D94597.

Added: 
llvm/test/CodeGen/X86/call-rv-marker.ll

Modified: 


Removed: 




diff  --git a/llvm/test/CodeGen/X86/call-rv-marker.ll 
b/llvm/test/CodeGen/X86/call-rv-marker.ll
new file mode 100644
index ..54775fde55b4
--- /dev/null
+++ b/llvm/test/CodeGen/X86/call-rv-marker.ll
@@ -0,0 +1,175 @@
+; RUN: llc -mtriple=x86_64-apple-macosx -o - %s | FileCheck 
--check-prefix=CHECK %s
+
+; TODO: support marker generation with GlobalISel
+target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
+
+declare i8* @foo0(i32)
+declare i8* @foo1()
+
+declare void @llvm.objc.release(i8*)
+declare void @objc_object(i8*)
+
+declare void @foo2(i8*)
+
+declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture)
+
+declare %struct.S* @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(1))
+
+declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture)
+
+
+%struct.S = type { i8 }
+
+@g = global i8* null, align 8
+@fptr = global i8* ()* null, align 8
+
+define i8* @rv_marker_1() {
+; CHECK-LABEL:  rv_marker_1:
+; CHECK: pushq %rax
+; CHECK-NEXT:.cfi_def_cfa_offset 16
+; CHECK-NEXT:callq   _foo1
+; CHECK-NEXT:popq%rcx
+; CHECK-NEXT:retq
+;
+entry:
+  %call = call "rv_marker" i8* @foo1()
+  ret i8* %call
+}
+
+define void @rv_marker_2_select(i32 %c) {
+; CHECK-LABEL: rv_marker_2_select:
+; CHECK:pushq   %rax
+; CHECK-NEXT:   .cfi_def_cfa_offset 16
+; CHECK-NEXT:   cmpl$1, %edi
+; CHECK-NEXT:   movl$1, %edi
+; CHECK-NEXT:   adcl$0, %edi
+; CHECK-NEXT:   callq   _foo0
+; CHECK-NEXT:   movq%rax, %rdi
+; CHECK-NEXT:   popq%rax
+; CHECK-NEXT:   jmp _foo2
+;
+entry:
+  %tobool.not = icmp eq i32 %c, 0
+  %.sink = select i1 %tobool.not, i32 2, i32 1
+  %call1 = call "rv_marker" i8* @foo0(i32 %.sink)
+  tail call void @foo2(i8* %call1)
+  ret void
+}
+
+define void @rv_marker_3() personality i8* bitcast (i32 (...)* 
@__gxx_personality_v0 to i8*) {
+; CHECK-LABEL: rv_marker_3
+; CHECK: pushq   %r14
+; CHECK-NEXT:.cfi_def_cfa_offset 16
+; CHECK-NEXT:pushq   %rbx
+; CHECK-NEXT:.cfi_def_cfa_offset 24
+; CHECK-NEXT:pushq   %rax
+; CHECK-NEXT:.cfi_def_cfa_offset 32
+; CHECK-NEXT:.cfi_offset %rbx, -24
+; CHECK-NEXT:.cfi_offset %r14, -16
+; CHECK-NEXT:callq   _foo1
+; CHECK-NEXT:movq%rax, %rbx
+; CHECK-NEXT: Ltmp0:
+;
+entry:
+  %call = call "rv_marker" i8* @foo1()
+  invoke void @objc_object(i8* %call) #5
+  to label %invoke.cont unwind label %lpad
+
+invoke.cont:  ; preds = %entry
+  tail call void @llvm.objc.release(i8* %call)
+  ret void
+
+lpad: ; preds = %entry
+  %0 = landingpad { i8*, i32 }
+  cleanup
+  tail call void @llvm.objc.release(i8* %call)
+  resume { i8*, i32 } %0
+}
+
+define void @rv_marker_4() personality i8* bitcast (i32 (...)* 
@__gxx_personality_v0 to i8*) {
+; CHECK-LABEL: rv_marker_4
+; CHECK: pushq   %r14
+; CHECK-NEXT:.cfi_def_cfa_offset 16
+; CHECK-NEXT:pushq   %rbx
+; CHECK-NEXT:.cfi_def_cfa_offset 24
+; CHECK-NEXT:pushq   %rax
+; CHECK-NEXT:.cfi_def_cfa_offset 32
+; CHECK-NEXT:.cfi_offset %rbx, -24
+; CHECK-NEXT:.cfi_offset %r14, -16
+; CHECK-NEXT: Ltmp3:
+; CHECK-NEXT:callq   _foo1
+; CHECK-NEXT: Ltmp4:
+;
+entry:
+  %s = alloca %struct.S, align 1
+  %0 = getelementptr inbounds %struct.S, %struct.S* %s, i64 0, i32 0
+  call void @llvm.lifetime.start.p0i8(i64 1, i8* nonnull %0) #2
+  %call = invoke "rv_marker" i8* @foo1()
+  to label %invoke.cont unwind label %lpad
+
+invoke.cont:  ; preds = %entry
+  invoke void @objc_object(i8* %call) #5
+  to label %invoke.cont2 unwind label %lpad1
+
+invoke.cont2: ; preds = %invoke.cont
+  tail call void @llvm.objc.release(i8* %call)
+  %call3 = call %struct.S* @_ZN1SD1Ev(%struct.S* nonnull dereferenceable(1) %s)
+  call void @llvm.lifetime.end.p0i8(i64 1, i8* nonnull %0)
+  ret void
+
+lpad: ; preds = %entry
+  %1 = landingpad { i8*, i32 }
+  cleanup
+  br label %ehcleanup
+
+lpad1:; preds = %invoke.cont
+  %2 = landingpad { i8*, i32 }
+  cleanup
+  tail call void @llvm.objc.release(i8* %call)
+  br label %ehcleanup
+
+ehcleanup:; preds = %lpad1, %lpad
+  %.pn = phi { i8*, i32 } [ %2, %lpad1 ], [ %1, %lpad ]
+  %call4 = call %struct.

[llvm-branch-commits] [mlir] 3bc7555 - [mlir][linalg] Use attributes in named ops' indexing maps

2021-01-13 Thread Lei Zhang via llvm-branch-commits


Author: Lei Zhang
Date: 2021-01-13T10:04:49-05:00
New Revision: 3bc7555ffac0a803e44c4b1462e0c4c5eee865ea

URL: 
https://github.com/llvm/llvm-project/commit/3bc7555ffac0a803e44c4b1462e0c4c5eee865ea
DIFF: 
https://github.com/llvm/llvm-project/commit/3bc7555ffac0a803e44c4b1462e0c4c5eee865ea.diff

LOG: [mlir][linalg] Use attributes in named ops' indexing maps

This commit adds support for parsing attribute uses in indexing
maps. These attribute uses are represented as affine symbols in
the resultant indexing maps because we can only know their
concrete value (which are coming from op attributes and are
constants) for specific op instances. The `indxing_maps()`
calls are synthesized to read these attributes and create affine
constants to replace the placeholder affine symbols and simplify.

Depends on D94240

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D94335

Added: 


Modified: 
mlir/docs/Dialects/Linalg.md
mlir/test/mlir-linalg-ods-gen/test-linalg-ods-gen.tc
mlir/tools/mlir-linalg-ods-gen/mlir-linalg-ods-gen.cpp

Removed: 




diff  --git a/mlir/docs/Dialects/Linalg.md b/mlir/docs/Dialects/Linalg.md
index 922455dddbda..1f8ef3c4021b 100644
--- a/mlir/docs/Dialects/Linalg.md
+++ b/mlir/docs/Dialects/Linalg.md
@@ -590,6 +590,12 @@ better adapt to Linalg:
 `i` (resp. `j`) is a parallel iterator encoded by affine dimension of
 position `0` (resp. `1`); `k` (resp. `l`) is a reduction iterator encoded 
by
 an affine dimension of position `2` (resp. `3`).
+1.  A list of attributes can be defined for the op with the format of `attr(
+strides: 2xi32)` and referenced in comprehension like `strides[0]`. These
+attribute uses will be parsed as affine symbols to generate op definition
+and implementation. For a concrete op instance, the runtime constant values
+from the attributes will be used to replace the affine symbols and simplify
+the indexing maps.
 
 These decisions and syntax are subject to evolution and change. In particular,
 op-specific attributes, dynamic ranks, some form of templating, shape

diff  --git a/mlir/test/mlir-linalg-ods-gen/test-linalg-ods-gen.tc 
b/mlir/test/mlir-linalg-ods-gen/test-linalg-ods-gen.tc
index 1ef128760637..1ce2d2ac9418 100644
--- a/mlir/test/mlir-linalg-ods-gen/test-linalg-ods-gen.tc
+++ b/mlir/test/mlir-linalg-ods-gen/test-linalg-ods-gen.tc
@@ -10,9 +10,18 @@
 //   IMPL:  { {{.*}}Parallel{{.*}}, {{.*}}Reduction{{.*}} }
 //
 //   IMPL:  ArrayAttr Test1Op::indexing_maps() {
-//   IMPL:  AffineMap::get(2, 0, {d0, d1}, context),
-//  IMPL-NEXT:  AffineMap::get(2, 0, {d1}, context),
-//  IMPL-NEXT:  AffineMap::get(2, 0, {d0}, context) });
+//   IMPL: auto s0 = getAffineSymbolExpr(0, context); (void)s0;
+//  IMPL-NEXT: auto s1 = getAffineSymbolExpr(1, context); (void)s1;
+//  IMPL-NEXT: auto map0 = AffineMap::get(2, 2, {d0, d1}, context);
+//  IMPL-NEXT: map0 = map0.replaceDimsAndSymbols({}, { s0, s1 }, 2, 0);
+//  IMPL-NEXT: map0 = simplifyAffineMap(map0);
+//  IMPL-NEXT: auto map1 = AffineMap::get(2, 2, {d1}, context);
+//  IMPL-NEXT: map1 = map1.replaceDimsAndSymbols({}, { s0, s1 }, 2, 0);
+//  IMPL-NEXT: map1 = simplifyAffineMap(map1);
+//  IMPL-NEXT: auto map2 = AffineMap::get(2, 2, {d0}, context);
+//  IMPL-NEXT: map2 = map2.replaceDimsAndSymbols({}, { s0, s1 }, 2, 0);
+//  IMPL-NEXT: map2 = simplifyAffineMap(map2);
+//  IMPL-NEXT: return {{.+}}.getAffineMapArrayAttr({ map0, map1, map2 });
 //
 //   IMPL:  void Test1Op::regionBuilder(Block &block) {
 //   IMPL:  Value [[a:.*]](args[0]), [[b:.*]](args[1]), [[c:.*]](args[2]);
@@ -34,9 +43,9 @@ def test1(A: f32(M, K), B: f32(K)) -> (C: f32(M)) {
 //   IMPL:  { {{.*}}Parallel{{.*}}, {{.*}}Parallel{{.*}}, 
{{.*}}Reduction{{.*}} }
 //
 //   IMPL:  ArrayAttr Test2Op::indexing_maps() {
-//   IMPL:  AffineMap::get(3, 0, {d0, d2}, context),
-//  IMPL-NEXT:  AffineMap::get(3, 0, {d2, d1}, context),
-//  IMPL-NEXT:  AffineMap::get(3, 0, {d0, d1}, context) });
+//   IMPL:  AffineMap::get(3, 3, {d0, d2}, context)
+//   IMPL:  AffineMap::get(3, 3, {d2, d1}, context)
+//   IMPL:  AffineMap::get(3, 3, {d0, d1}, context)
 //
 //   IMPL:  Test2Op::regionBuilder(Block &block) {
 //   IMPL:  Value [[a:.*]](args[0]), [[b:.*]](args[1]), [[c:.*]](args[2]);
@@ -58,9 +67,9 @@ def test2(A: f32(M, K), B: f32(K, N)) -> (C: f32(M, N)) {
 //   IMPL:  { {{.*}}Parallel{{.*}}, {{.*}}Parallel{{.*}}, 
{{.*}}Reduction{{.*}} }
 //
 //   IMPL:  ArrayAttr Test3Op::indexing_maps() {
-//   IMPL:  AffineMap::get(4, 0, {d0, d1, d3}, context),
-//  IMPL-NEXT:  AffineMap::get(4, 0, {d3, d2}, context),
-//  IMPL-NEXT:  AffineMap::get(4, 0, {d0, d1, d2}, context) });
+//   IMPL:  AffineMap::get(4, 4, {d0, d1, d3}, context)
+//   IMPL:  AffineMap::get(4, 4, {d3, d2}, context)
+//   IMPL:  AffineMap::get(4, 4, {d0, d1, d2}, context)
 //

[llvm-branch-commits] [clang-tools-extra] 90164ba - [clangd] Split out a base class for delegating GlobalCompilationDatabases. NFC

2021-01-13 Thread Sam McCall via llvm-branch-commits


Author: Sam McCall
Date: 2021-01-13T16:20:33+01:00
New Revision: 90164ba957a2532daef6515d7114af69eca025a7

URL: 
https://github.com/llvm/llvm-project/commit/90164ba957a2532daef6515d7114af69eca025a7
DIFF: 
https://github.com/llvm/llvm-project/commit/90164ba957a2532daef6515d7114af69eca025a7.diff

LOG: [clangd] Split out a base class for delegating GlobalCompilationDatabases. 
NFC

This prepares for adding another delegatable method (blockUntilIdle) to GCDB.

Added: 


Modified: 
clang-tools-extra/clangd/GlobalCompilationDatabase.cpp
clang-tools-extra/clangd/GlobalCompilationDatabase.h
clang-tools-extra/clangd/QueryDriverDatabase.cpp

Removed: 




diff  --git a/clang-tools-extra/clangd/GlobalCompilationDatabase.cpp 
b/clang-tools-extra/clangd/GlobalCompilationDatabase.cpp
index 86375fa11d3b..9a74ef0d5c2f 100644
--- a/clang-tools-extra/clangd/GlobalCompilationDatabase.cpp
+++ b/clang-tools-extra/clangd/GlobalCompilationDatabase.cpp
@@ -556,13 +556,8 @@ 
DirectoryBasedGlobalCompilationDatabase::getProjectInfo(PathRef File) const {
 OverlayCDB::OverlayCDB(const GlobalCompilationDatabase *Base,
std::vector FallbackFlags,
tooling::ArgumentsAdjuster Adjuster)
-: Base(Base), ArgsAdjuster(std::move(Adjuster)),
-  FallbackFlags(std::move(FallbackFlags)) {
-  if (Base)
-BaseChanged = Base->watch([this](const std::vector Changes) {
-  OnCommandChanged.broadcast(Changes);
-});
-}
+: DelegatingCDB(Base), ArgsAdjuster(std::move(Adjuster)),
+  FallbackFlags(std::move(FallbackFlags)) {}
 
 llvm::Optional
 OverlayCDB::getCompileCommand(PathRef File) const {
@@ -573,8 +568,8 @@ OverlayCDB::getCompileCommand(PathRef File) const {
 if (It != Commands.end())
   Cmd = It->second;
   }
-  if (!Cmd && Base)
-Cmd = Base->getCompileCommand(File);
+  if (!Cmd)
+Cmd = DelegatingCDB::getCompileCommand(File);
   if (!Cmd)
 return llvm::None;
   if (ArgsAdjuster)
@@ -583,8 +578,7 @@ OverlayCDB::getCompileCommand(PathRef File) const {
 }
 
 tooling::CompileCommand OverlayCDB::getFallbackCommand(PathRef File) const {
-  auto Cmd = Base ? Base->getFallbackCommand(File)
-  : GlobalCompilationDatabase::getFallbackCommand(File);
+  auto Cmd = DelegatingCDB::getFallbackCommand(File);
   std::lock_guard Lock(Mutex);
   Cmd.CommandLine.insert(Cmd.CommandLine.end(), FallbackFlags.begin(),
  FallbackFlags.end());
@@ -609,13 +603,37 @@ void OverlayCDB::setCompileCommand(
   OnCommandChanged.broadcast({CanonPath});
 }
 
-llvm::Optional OverlayCDB::getProjectInfo(PathRef File) const {
-  // It wouldn't make much sense to treat files with overridden commands
-  // specially when we can't do the same for the (unknown) local headers they
-  // include or changing behavior mid-air after receiving an override.
+DelegatingCDB::DelegatingCDB(const GlobalCompilationDatabase *Base)
+: Base(Base) {
   if (Base)
-return Base->getProjectInfo(File);
-  return llvm::None;
+BaseChanged = Base->watch([this](const std::vector Changes) {
+  OnCommandChanged.broadcast(Changes);
+});
+}
+
+DelegatingCDB::DelegatingCDB(std::unique_ptr Base)
+: DelegatingCDB(Base.get()) {
+  BaseOwner = std::move(Base);
 }
+
+llvm::Optional
+DelegatingCDB::getCompileCommand(PathRef File) const {
+  if (!Base)
+return llvm::None;
+  return Base->getCompileCommand(File);
+}
+
+llvm::Optional DelegatingCDB::getProjectInfo(PathRef File) const {
+  if (!Base)
+return llvm::None;
+  return Base->getProjectInfo(File);
+}
+
+tooling::CompileCommand DelegatingCDB::getFallbackCommand(PathRef File) const {
+  if (!Base)
+return GlobalCompilationDatabase::getFallbackCommand(File);
+  return Base->getFallbackCommand(File);
+}
+
 } // namespace clangd
 } // namespace clang

diff  --git a/clang-tools-extra/clangd/GlobalCompilationDatabase.h 
b/clang-tools-extra/clangd/GlobalCompilationDatabase.h
index 9fb6f15f13d2..125bd77a5207 100644
--- a/clang-tools-extra/clangd/GlobalCompilationDatabase.h
+++ b/clang-tools-extra/clangd/GlobalCompilationDatabase.h
@@ -62,6 +62,25 @@ class GlobalCompilationDatabase {
   mutable CommandChanged OnCommandChanged;
 };
 
+// Helper class for implementing GlobalCompilationDatabases that wrap others.
+class DelegatingCDB : public GlobalCompilationDatabase {
+public:
+  DelegatingCDB(const GlobalCompilationDatabase *Base);
+  DelegatingCDB(std::unique_ptr Base);
+
+  llvm::Optional
+  getCompileCommand(PathRef File) const override;
+
+  llvm::Optional getProjectInfo(PathRef File) const override;
+
+  tooling::CompileCommand getFallbackCommand(PathRef File) const override;
+
+private:
+  const GlobalCompilationDatabase *Base;
+  std::unique_ptr BaseOwner;
+  CommandChanged::Subscription BaseChanged;
+};
+
 /// Gets compile args from tooling::CompilationDatabases built for parent
 /// directories.
 class Directo

[llvm-branch-commits] [llvm] dda6003 - [AArch64] Attempt to sink mul operands

2021-01-13 Thread Nicholas Guy via llvm-branch-commits


Author: Nicholas Guy
Date: 2021-01-13T15:23:36Z
New Revision: dda60035e9f0769c8907cdf6561489e0435c2275

URL: 
https://github.com/llvm/llvm-project/commit/dda60035e9f0769c8907cdf6561489e0435c2275
DIFF: 
https://github.com/llvm/llvm-project/commit/dda60035e9f0769c8907cdf6561489e0435c2275.diff

LOG: [AArch64] Attempt to sink mul operands

Following on from D91255, this patch is responsible for sinking relevant mul
operands to the same block so that umull/smull instructions can be correctly
generated by the mul combine implemented in the aforementioned patch.

Differential revision: https://reviews.llvm.org/D91271

Added: 
llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll

Modified: 
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

Removed: 




diff  --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp 
b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index b500cd534a1f..082fdf390786 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -10956,6 +10956,43 @@ bool AArch64TargetLowering::shouldSinkOperands(
 
 return true;
   }
+  case Instruction::Mul: {
+bool IsProfitable = false;
+for (auto &Op : I->operands()) {
+  // Make sure we are not already sinking this operand
+  if (any_of(Ops, [&](Use *U) { return U->get() == Op; }))
+continue;
+
+  ShuffleVectorInst *Shuffle = dyn_cast(Op);
+  if (!Shuffle || !Shuffle->isZeroEltSplat())
+continue;
+
+  Value *ShuffleOperand = Shuffle->getOperand(0);
+  InsertElementInst *Insert = dyn_cast(ShuffleOperand);
+  if (!Insert)
+continue;
+
+  Instruction *OperandInstr = dyn_cast(Insert->getOperand(1));
+  if (!OperandInstr)
+continue;
+
+  ConstantInt *ElementConstant =
+  dyn_cast(Insert->getOperand(2));
+  // Check that the insertelement is inserting into element 0
+  if (!ElementConstant || ElementConstant->getZExtValue() != 0)
+continue;
+
+  unsigned Opcode = OperandInstr->getOpcode();
+  if (Opcode != Instruction::SExt && Opcode != Instruction::ZExt)
+continue;
+
+  Ops.push_back(&Shuffle->getOperandUse(0));
+  Ops.push_back(&Op);
+  IsProfitable = true;
+}
+
+return IsProfitable;
+  }
   default:
 return false;
   }

diff  --git a/llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll 
b/llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
new file mode 100644
index ..966cf7b46daa
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
@@ -0,0 +1,186 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=aarch64-none-linux-gnu < %s -o -| FileCheck %s
+
+define void @matrix_mul_unsigned(i32 %N, i32* nocapture %C, i16* nocapture 
readonly %A, i16 %val) {
+; CHECK-LABEL: matrix_mul_unsigned:
+; CHECK:   // %bb.0: // %vector.header
+; CHECK-NEXT:and w9, w3, #0x
+; CHECK-NEXT:// kill: def $w0 killed $w0 def $x0
+; CHECK-NEXT:and x8, x0, #0xfff8
+; CHECK-NEXT:dup v0.4h, w9
+; CHECK-NEXT:  .LBB0_1: // %vector.body
+; CHECK-NEXT:// =>This Inner Loop Header: Depth=1
+; CHECK-NEXT:add x9, x2, w0, uxtw #1
+; CHECK-NEXT:ldp d1, d2, [x9]
+; CHECK-NEXT:add x9, x1, w0, uxtw #2
+; CHECK-NEXT:subs x8, x8, #8 // =8
+; CHECK-NEXT:add w0, w0, #8 // =8
+; CHECK-NEXT:umull v1.4s, v0.4h, v1.4h
+; CHECK-NEXT:umull v2.4s, v0.4h, v2.4h
+; CHECK-NEXT:stp q1, q2, [x9]
+; CHECK-NEXT:b.ne .LBB0_1
+; CHECK-NEXT:  // %bb.2: // %for.end12
+; CHECK-NEXT:ret
+vector.header:
+  %conv4 = zext i16 %val to i32
+  %wide.trip.count = zext i32 %N to i64
+  %0 = add nsw i64 %wide.trip.count, -1
+  %min.iters.check = icmp ult i32 %N, 8
+  %1 = trunc i64 %0 to i32
+  %2 = icmp ugt i64 %0, 4294967295
+  %n.vec = and i64 %wide.trip.count, 4294967288
+  %broadcast.splatinsert = insertelement <4 x i32> undef, i32 %conv4, i32 0
+  %broadcast.splat = shufflevector <4 x i32> %broadcast.splatinsert, <4 x i32> 
undef, <4 x i32> zeroinitializer
+  %broadcast.splatinsert31 = insertelement <4 x i32> undef, i32 %conv4, i32 0
+  %broadcast.splat32 = shufflevector <4 x i32> %broadcast.splatinsert31, <4 x 
i32> undef, <4 x i32> zeroinitializer
+  %cmp.n = icmp eq i64 %n.vec, %wide.trip.count
+  br label %vector.body
+
+vector.body:  ; preds = %vector.header, 
%vector.body
+  %index = phi i64 [ %index.next, %vector.body ], [ 0, %vector.header ]
+  %3 = trunc i64 %index to i32
+  %4 = add i32 %N, %3
+  %5 = zext i32 %4 to i64
+  %6 = getelementptr inbounds i16, i16* %A, i64 %5
+  %7 = bitcast i16* %6 to <4 x i16>*
+  %wide.load = load <4 x i16>, <4 x i16>* %7, align 2
+  %8 = getelementptr inbounds i16, i16* %6, i64 4
+  %9 = bitcast i16* %8 to <4 x i16>*
+  %wide.load30 = load <4 x i16>, <4 x i16>* %9, align 2
+  %10 = zext <4

[llvm-branch-commits] [llvm] d55d592 - GlobalISel: Do not set observer of MachineIRBuilder in LegalizerHelper

2021-01-13 Thread Matt Arsenault via llvm-branch-commits


Author: Matt Arsenault
Date: 2021-01-13T10:44:31-05:00
New Revision: d55d592a921f1cd6a922bfff6662f8722d9c

URL: 
https://github.com/llvm/llvm-project/commit/d55d592a921f1cd6a922bfff6662f8722d9c
DIFF: 
https://github.com/llvm/llvm-project/commit/d55d592a921f1cd6a922bfff6662f8722d9c.diff

LOG: GlobalISel: Do not set observer of MachineIRBuilder in LegalizerHelper

This fixes double printing of insertion debug messages in the
legalizer.

Try to cleanup usage of observers. Currently the use of observers is
pretty hard to follow and it's not clear what is responsible for
them. Observers are referenced in 3 places:

1. In the MachineFunction
2. In the MachineIRBuilder
3. In the LegalizerHelper

The observers in the MachineFunction and MachineIRBuilder are both
called only on insertions, and are redundant with each other. The
source of the double printing was the same observer was added to both
the MachineFunction, and the MachineIRBuilder. One of these references
needs to be removed. Arguably observers in general should be fully
removed from one or the other, but it may be useful to have a local
observer in the MachineIRBuilder that is not added to the function's
observers. Alternatively, the wrapper observer could manage a local
observer in one place.

The LegalizerHelper only ever calls the observer on changing/changed
instructions, and never insertions. Logically these are two different
types of observers, for changes and for insertions.

Additionally, some places used the GISelObserverWrapper when they only
needed a single observer they could use directly.

Setting the observer in the LegalizerHelper constructor is not
flexible enough if the LegalizerHelper is constructed anywhere outside
the one used by the legalizer. AMDGPU calls the LegalizerHelper in
RegBankSelect, and needs to use a local observer to apply the regbank
to newly created instructions. Currently it accomplishes this by
constructing a local MachineIRBuilder. I'm trying to move the
MachineIRBuilder to be owned/maintained by the RegBankSelect pass
itself, but the locally constructed LegalizerHelper would reset the
observer.

Mips also has a special case use of the LegalizationArtifactCombiner
in applyMappingImpl; I think we do need to run the artifact combiner
during RegBankSelect, but in a more consistent way outside of
applyMappingImpl.

Added: 


Modified: 
llvm/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h
llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp
llvm/test/CodeGen/AArch64/GlobalISel/legalize-ext-csedebug-output.mir

Removed: 




diff  --git 
a/llvm/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h 
b/llvm/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h
index e42859ea28b3..e7bda3b4bd97 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h
@@ -486,7 +486,7 @@ class LegalizationArtifactCombiner {
 MachineRegisterInfo &MRI,
 MachineIRBuilder &Builder,
 SmallVectorImpl &UpdatedDefs,
-GISelObserverWrapper &Observer) {
+GISelChangeObserver &Observer) {
 if (!llvm::canReplaceReg(DstReg, SrcReg, MRI)) {
   Builder.buildCopy(DstReg, SrcReg);
   UpdatedDefs.push_back(DstReg);
@@ -521,7 +521,7 @@ class LegalizationArtifactCombiner {
   bool tryCombineUnmergeValues(MachineInstr &MI,
SmallVectorImpl &DeadInsts,
SmallVectorImpl &UpdatedDefs,
-   GISelObserverWrapper &Observer) {
+   GISelChangeObserver &Observer) {
 assert(MI.getOpcode() == TargetOpcode::G_UNMERGE_VALUES);
 
 unsigned NumDefs = MI.getNumOperands() - 1;

diff  --git a/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h 
b/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
index 739600ead21a..1ab4cd704824 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
@@ -252,6 +252,11 @@ class MachineIRBuilder {
 setDebugLoc(MI.getDebugLoc());
   }
 
+  MachineIRBuilder(MachineInstr &MI, GISelChangeObserver &Observer) :
+MachineIRBuilder(MI) {
+setChangeObserver(Observer);
+  }
+
   virtual ~MachineIRBuilder() = default;
 
   MachineIRBuilder(const MachineIRBuilderState &BState) : State(BState) {}

diff  --git a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp 
b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
index bd0f2ec6b4ff..b9e32257d2c8 100644
--- a/llvm/lib/Co

[llvm-branch-commits] [llvm] 4e8e888 - [AArch64][GlobalISel] Add support for FCONSTANT of FP128 type

2021-01-13 Thread Muhammad Asif Manzoor via llvm-branch-commits


Author: Muhammad Asif Manzoor
Date: 2021-01-13T10:46:10-05:00
New Revision: 4e8e888905a4258932dcb593a5531a6329cc821a

URL: 
https://github.com/llvm/llvm-project/commit/4e8e888905a4258932dcb593a5531a6329cc821a
DIFF: 
https://github.com/llvm/llvm-project/commit/4e8e888905a4258932dcb593a5531a6329cc821a.diff

LOG: [AArch64][GlobalISel] Add support for FCONSTANT of FP128 type

Add support for G_FCONSTANT of FP128 (Quadruple precision) type.
It replaces the constant by emitting a load with a constant pool entry.

Reviewed By: aemerson

Differential Revision: https://reviews.llvm.org/D94437

Added: 
llvm/test/CodeGen/AArch64/GlobalISel/legalize-fp128-fconstant.mir

Modified: 
llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
llvm/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll

Removed: 




diff  --git a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp 
b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
index 34dd6760efc2..6dc0d1fb97e2 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
@@ -2289,6 +2289,7 @@ bool AArch64InstructionSelector::select(MachineInstr &I) {
 const LLT s16 = LLT::scalar(16);
 const LLT s32 = LLT::scalar(32);
 const LLT s64 = LLT::scalar(64);
+const LLT s128 = LLT::scalar(128);
 const LLT p0 = LLT::pointer(0, 64);
 
 const Register DefReg = I.getOperand(0).getReg();
@@ -2298,10 +2299,10 @@ bool AArch64InstructionSelector::select(MachineInstr 
&I) {
 
 // FIXME: Redundant check, but even less readable when factored out.
 if (isFP) {
-  if (Ty != s32 && Ty != s64) {
+  if (Ty != s32 && Ty != s64 && Ty != s128) {
 LLVM_DEBUG(dbgs() << "Unable to materialize FP " << Ty
   << " constant, expected: " << s32 << " or " << s64
-  << '\n');
+  << " or " << s128 << '\n');
 return false;
   }
 
@@ -2314,7 +2315,9 @@ bool AArch64InstructionSelector::select(MachineInstr &I) {
 
   // The case when we have 0.0 is covered by tablegen. Reject it here so we
   // can be sure tablegen works correctly and isn't rescued by this code.
-  if (I.getOperand(1).getFPImm()->getValueAPF().isExactlyValue(0.0))
+  // 0.0 is not covered by tablegen for FP128. So we will handle this 
+  // scenario in the code here.
+  if (DefSize != 128 && I.getOperand(1).getFPImm()->isExactlyValue(0.0))
 return false;
 } else {
   // s32 and s64 are covered by tablegen.
@@ -2341,15 +2344,17 @@ bool AArch64InstructionSelector::select(MachineInstr 
&I) {
   // Either emit a FMOV, or emit a copy to emit a normal mov.
   const TargetRegisterClass &GPRRC =
   DefSize == 32 ? AArch64::GPR32RegClass : AArch64::GPR64RegClass;
-  const TargetRegisterClass &FPRRC =
-  DefSize == 32 ? AArch64::FPR32RegClass : AArch64::FPR64RegClass;
+  const TargetRegisterClass &FPRRC = 
+  DefSize == 32 ? AArch64::FPR32RegClass 
+: (DefSize == 64 ? AArch64::FPR64RegClass 
+ : AArch64::FPR128RegClass);
 
   // Can we use a FMOV instruction to represent the immediate?
   if (emitFMovForFConstant(I, MRI))
 return true;
 
   // For 64b values, emit a constant pool load instead.
-  if (DefSize == 64) {
+  if (DefSize == 64 || DefSize == 128) {
 auto *FPImm = I.getOperand(1).getFPImm();
 MachineIRBuilder MIB(I);
 auto *LoadMI = emitLoadFromConstantPool(FPImm, MIB);

diff  --git a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp 
b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
index a611d68cb2e5..cc7aada211bb 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
@@ -332,9 +332,9 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const 
AArch64Subtarget &ST)
 const auto &Ty = Query.Types[0];
 if (HasFP16 && Ty == s16)
   return true;
-return Ty == s32 || Ty == s64;
+return Ty == s32 || Ty == s64 || Ty == s128;
   })
-  .clampScalar(0, MinFPScalar, s64);
+  .clampScalar(0, MinFPScalar, s128);
 
   getActionDefinitionsBuilder({G_ICMP, G_FCMP})
   .legalFor({{s32, s32},

diff  --git a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll 
b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
index 137e859d0b4d..0bbb9955ee10 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
@@ -64,13 +64,6 @@ define void @test_write_register_intrin() {
 @_ZTIi = external global i8*
 declare i32 @__gxx_personality_v0(...)
 
-; FALLBACK-WITH-REPORT-ERR: remark: :0:0: unable

[llvm-branch-commits] [lld] 07b6aeb - [lld][WebAssembly] Fix for TLS + --relocatable

2021-01-13 Thread Sam Clegg via llvm-branch-commits


Author: Sam Clegg
Date: 2021-01-13T07:49:39-08:00
New Revision: 07b6aeb5685fa6474cbeae797ebc5ea1f17da0f7

URL: 
https://github.com/llvm/llvm-project/commit/07b6aeb5685fa6474cbeae797ebc5ea1f17da0f7
DIFF: 
https://github.com/llvm/llvm-project/commit/07b6aeb5685fa6474cbeae797ebc5ea1f17da0f7.diff

LOG: [lld][WebAssembly] Fix for TLS + --relocatable

When running in `-r/--relocatable` we output relocations but the
new TLS relocations type was missing from `ObjFile::calcNewAddend`
causing this combination of inputs/flags to crash the linker.

Also avoid creating tls variables in relocatable mode.  These variables
are only needed when linking final executables.

Fixes: https://github.com/emscripten-core/emscripten/issues/12934
Fixes: PR48506

Differential Revision: https://reviews.llvm.org/D93554

Added: 


Modified: 
lld/test/wasm/tls-no-shared.s
lld/test/wasm/tls.s
lld/wasm/Driver.cpp
lld/wasm/InputFiles.cpp
lld/wasm/Writer.cpp

Removed: 




diff  --git a/lld/test/wasm/tls-no-shared.s b/lld/test/wasm/tls-no-shared.s
index 3fdc7057ad07..6c17489b7d42 100644
--- a/lld/test/wasm/tls-no-shared.s
+++ b/lld/test/wasm/tls-no-shared.s
@@ -1,5 +1,5 @@
 # Test that linking without shared memory causes __tls_base to be
-# interlized
+# internalized
 
 # RUN: llvm-mc -filetype=obj -triple=wasm32-unknown-unknown -o %t.o %s
 

diff  --git a/lld/test/wasm/tls.s b/lld/test/wasm/tls.s
index f5072dc13afa..878498bc2e48 100644
--- a/lld/test/wasm/tls.s
+++ b/lld/test/wasm/tls.s
@@ -73,8 +73,8 @@ tls3:
 # RUN: wasm-ld -no-gc-sections --shared-memory --max-memory=131072 --no-entry 
-o %t.wasm %t.o
 # RUN: obj2yaml %t.wasm | FileCheck %s
 
-# RUN: wasm-ld -no-gc-sections --shared-memory --max-memory=131072 
--no-merge-data-segments --no-entry -o %t.wasm %t.o
-# RUN: obj2yaml %t.wasm | FileCheck %s
+# RUN: wasm-ld -no-gc-sections --shared-memory --max-memory=131072 
--no-merge-data-segments --no-entry -o %t2.wasm %t.o
+# RUN: obj2yaml %t2.wasm | FileCheck %s
 
 # CHECK:  - Type:GLOBAL
 # CHECK-NEXT:   Globals:
@@ -163,3 +163,32 @@ tls3:
 # Expected body of tls_align:
 #   global.get 3
 #   end
+
+
+# Also verify TLS usage with --relocatable
+# RUN: wasm-ld --relocatable -o %t3.wasm %t.o
+# RUN: obj2yaml %t3.wasm | FileCheck %s --check-prefix=RELOC
+
+# RELOC:   - Type:IMPORT
+# RELOC-NEXT:Imports:
+# RELOC-NEXT:  - Module:  env
+# RELOC-NEXT:Field:   __tls_base
+# RELOC-NEXT:Kind:GLOBAL
+# RELOC-NEXT:GlobalType:  I32
+# RELOC-NEXT:GlobalMutable:   true
+# RELOC-NEXT:  - Module:  env
+# RELOC-NEXT:Field:   __tls_align
+# RELOC-NEXT:Kind:GLOBAL
+# RELOC-NEXT:GlobalType:  I32
+# RELOC-NEXT:GlobalMutable:   false
+
+# RELOC: GlobalNames:
+# RELOC-NEXT:  - Index:   0
+# RELOC-NEXT:Name:__tls_base
+# RELOC-NEXT:  - Index:   1
+# RELOC-NEXT:Name:__tls_align
+# RELOC-NEXT:DataSegmentNames:
+# RELOC-NEXT:  - Index:   0
+# RELOC-NEXT:Name:.tdata
+# RELOC-NEXT:  - Index:   1
+# RELOC-NEXT:Name:.bss.no_tls

diff  --git a/lld/wasm/Driver.cpp b/lld/wasm/Driver.cpp
index fb699c55fc8c..84fdb77aea2c 100644
--- a/lld/wasm/Driver.cpp
+++ b/lld/wasm/Driver.cpp
@@ -639,7 +639,7 @@ static void createSyntheticSymbols() {
 WasmSym::stackPointer->markLive();
   }
 
-  if (config->sharedMemory) {
+  if (config->sharedMemory && !config->relocatable) {
 WasmSym::tlsBase = createGlobalVariable("__tls_base", true);
 WasmSym::tlsSize = createGlobalVariable("__tls_size", false);
 WasmSym::tlsAlign = createGlobalVariable("__tls_align", false);

diff  --git a/lld/wasm/InputFiles.cpp b/lld/wasm/InputFiles.cpp
index 68a9472819e4..eb37ae548b80 100644
--- a/lld/wasm/InputFiles.cpp
+++ b/lld/wasm/InputFiles.cpp
@@ -123,6 +123,7 @@ uint64_t ObjFile::calcNewAddend(const WasmRelocation 
&reloc) const {
   case R_WASM_MEMORY_ADDR_REL_SLEB64:
   case R_WASM_MEMORY_ADDR_I32:
   case R_WASM_MEMORY_ADDR_I64:
+  case R_WASM_MEMORY_ADDR_TLS_SLEB:
   case R_WASM_FUNCTION_OFFSET_I32:
   case R_WASM_FUNCTION_OFFSET_I64:
 return reloc.Addend;

diff  --git a/lld/wasm/Writer.cpp b/lld/wasm/Writer.cpp
index c95b92504634..710404943df2 100644
--- a/lld/wasm/Writer.cpp
+++ b/lld/wasm/Writer.cpp
@@ -284,7 +284,7 @@ void Writer::layoutMemory() {
 log(formatv("mem: {0,-15} offset={1,-8} size={2,-8} align={3}", seg->name,
 memoryPtr, seg->size, seg->alignment));
 
-if (seg->name == ".tdata") {
+if (!config->relocatable && seg->name == ".tdata") {
   if (config->sharedMemory) {
 auto *tlsSize = cast(WasmSym::tlsSize);
 setGlobalPtr(tlsSize, seg->size);



___
llvm-br

[llvm-branch-commits] [clang] f0abe2a - [Frontend] Add pragma align natural and sort out pragma pack stack effect

2021-01-13 Thread Xiangling Liao via llvm-branch-commits


Author: Xiangling Liao
Date: 2021-01-13T10:53:24-05:00
New Revision: f0abe2aeaca76a24b1e17295ab797068c057a15d

URL: 
https://github.com/llvm/llvm-project/commit/f0abe2aeaca76a24b1e17295ab797068c057a15d
DIFF: 
https://github.com/llvm/llvm-project/commit/f0abe2aeaca76a24b1e17295ab797068c057a15d.diff

LOG: [Frontend] Add pragma align natural and sort out pragma pack stack effect

- Implemente the natural align for XL on AIX
- Sort out pragma pack stack effect
- Add -fxl-pragma-stack option to enable XL on AIX pragma stack effect

Differential Revision: https://reviews.llvm.org/D87702

Added: 
clang/test/Driver/aix-pragma-pack.c
clang/test/Layout/aix-power-natural-interaction.cpp
clang/test/PCH/aix-pragma-pack.c
clang/test/Sema/aix-pragma-pack-and-align.c

Modified: 
clang/include/clang/Basic/Attr.td
clang/include/clang/Basic/DiagnosticSemaKinds.td
clang/include/clang/Basic/LangOptions.def
clang/include/clang/Driver/Options.td
clang/include/clang/Sema/Sema.h
clang/include/clang/Serialization/ASTReader.h
clang/include/clang/Serialization/ASTWriter.h
clang/lib/AST/RecordLayoutBuilder.cpp
clang/lib/Driver/ToolChains/Clang.cpp
clang/lib/Frontend/CompilerInvocation.cpp
clang/lib/Parse/ParsePragma.cpp
clang/lib/Sema/Sema.cpp
clang/lib/Sema/SemaAttr.cpp
clang/lib/Serialization/ASTReader.cpp
clang/lib/Serialization/ASTWriter.cpp
clang/test/Layout/aix-double-struct-member.cpp

Removed: 




diff  --git a/clang/include/clang/Basic/Attr.td 
b/clang/include/clang/Basic/Attr.td
index c51e95fa6fa8..b30b91d3d4a6 100644
--- a/clang/include/clang/Basic/Attr.td
+++ b/clang/include/clang/Basic/Attr.td
@@ -681,6 +681,13 @@ def AlignMac68k : InheritableAttr {
   let Documentation = [Undocumented];
 }
 
+def AlignNatural : InheritableAttr {
+  // This attribute has no spellings as it is only ever created implicitly.
+  let Spellings = [];
+  let SemaHandler = 0;
+  let Documentation = [Undocumented];
+}
+
 def AlwaysInline : InheritableAttr {
   let Spellings = [GCC<"always_inline">, Keyword<"__forceinline">];
   let Subjects = SubjectList<[Function]>;

diff  --git a/clang/include/clang/Basic/DiagnosticSemaKinds.td 
b/clang/include/clang/Basic/DiagnosticSemaKinds.td
index 717bf6e12ccd..b387736832a9 100644
--- a/clang/include/clang/Basic/DiagnosticSemaKinds.td
+++ b/clang/include/clang/Basic/DiagnosticSemaKinds.td
@@ -854,6 +854,8 @@ def err_pragma_options_align_mac68k_target_unsupported : 
Error<
 def warn_pragma_pack_invalid_alignment : Warning<
   "expected #pragma pack parameter to be '1', '2', '4', '8', or '16'">,
   InGroup;
+def err_pragma_pack_invalid_alignment : Error<
+  warn_pragma_pack_invalid_alignment.Text>;
 def warn_pragma_pack_non_default_at_include : Warning<
   "non-default #pragma pack value changes the alignment of struct or union "
   "members in the included file">, InGroup,
@@ -887,6 +889,8 @@ def warn_cxx_ms_struct :
   Warning<"ms_struct may not produce Microsoft-compatible layouts for classes "
   "with base classes or virtual functions">,
   DefaultError, InGroup;
+def err_pragma_pack_identifer_not_supported : Error<
+  "specifying an identifier within `#pragma pack` is not supported on this 
target">;
 def err_section_conflict : Error<"%0 causes a section type conflict with %1">;
 def err_no_base_classes : Error<"invalid use of '__super', %0 has no base 
classes">;
 def err_invalid_super_scope : Error<"invalid use of '__super', "

diff  --git a/clang/include/clang/Basic/LangOptions.def 
b/clang/include/clang/Basic/LangOptions.def
index 963fde5f3ad4..c01f0cca9c9c 100644
--- a/clang/include/clang/Basic/LangOptions.def
+++ b/clang/include/clang/Basic/LangOptions.def
@@ -354,6 +354,8 @@ ENUM_LANGOPT(VtorDispMode, MSVtorDispMode, 2, 
MSVtorDispMode::ForVBaseOverride,
 
 LANGOPT(ApplePragmaPack, 1, 0, "Apple gcc-compatible #pragma pack handling")
 
+LANGOPT(XLPragmaPack, 1, 0, "IBM XL #pragma pack handling")
+
 LANGOPT(RetainCommentsFromSystemHeaders, 1, 0, "retain documentation comments 
from system headers in the AST")
 
 LANGOPT(SanitizeAddressFieldPadding, 2, 0, "controls how aggressive is ASan "

diff  --git a/clang/include/clang/Driver/Options.td 
b/clang/include/clang/Driver/Options.td
index acc3db40bdc7..9ea3feccddff 100644
--- a/clang/include/clang/Driver/Options.td
+++ b/clang/include/clang/Driver/Options.td
@@ -1026,6 +1026,8 @@ defm apple_pragma_pack : BoolFOption<"apple-pragma-pack",
   "LangOpts->ApplePragmaPack", DefaultsToFalse,
   ChangedBy,
   ResetBy>;
+def fxl_pragma_pack : Flag<["-"], "fxl-pragma-pack">, Group, 
Flags<[CC1Option]>,
+  HelpText<"Enable IBM XL #pragma pack handling">;
 def shared_libsan : Flag<["-"], "shared-libsan">,
   HelpText<"Dynamically link the sanitizer runtime">;
 def static_libsan : Flag<["-"], "static-libsan">,
@@ -1966,6 +1968,7 @@ def fmudflapth : Flag<["-"], "fmudflapth">, 
Group;
 def fmudf

[llvm-branch-commits] [openmp] a957634 - [OpenMP] Add documentation for error messages and release notes

2021-01-13 Thread Joseph Huber via llvm-branch-commits


Author: Joseph Huber
Date: 2021-01-13T11:00:41-05:00
New Revision: a957634942a48c963a8ed99b1bb90f7b985a3602

URL: 
https://github.com/llvm/llvm-project/commit/a957634942a48c963a8ed99b1bb90f7b985a3602
DIFF: 
https://github.com/llvm/llvm-project/commit/a957634942a48c963a8ed99b1bb90f7b985a3602.diff

LOG: [OpenMP] Add documentation for error messages and release notes

Add extra information to the runtime page describing the error messages and add 
information to the release notes for clang 12.0

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D94562

Added: 


Modified: 
openmp/docs/ReleaseNotes.rst
openmp/docs/design/Runtimes.rst

Removed: 




diff  --git a/openmp/docs/ReleaseNotes.rst b/openmp/docs/ReleaseNotes.rst
index de0f2018032c..7f40d3c81510 100644
--- a/openmp/docs/ReleaseNotes.rst
+++ b/openmp/docs/ReleaseNotes.rst
@@ -13,11 +13,34 @@ Introduction
 
 
 This document contains the release notes for the OpenMP runtime, release 
12.0.0.
-Here we describe the status of openmp, including major improvements
-from the previous release. All openmp releases may be downloaded
+Here we describe the status of OpenMP, including major improvements
+from the previous release. All OpenMP releases may be downloaded
 from the `LLVM releases web site `_.
 
 Non-comprehensive list of changes in this release
 =
 
+- Extended the ``libomptarget`` API functions to include source location
+  information and OpenMP target mapper support. This allows ``libomptarget`` to
+  know the source location of the OpenMP region it is executing, as well as the
+  name and declarations of all the variables used inside the region. Each
+  function generated now uses its ``mapper`` variant. The old API calls now 
call
+  into the new API functions with ``nullptr`` arguments for backwards
+  compatibility with old binaries. Source location information for
+  ``libomptarget`` is now generated by Clang at any level of debugging
+  information.
 
+- Added improved error messages for ``libomptarget`` and ``CUDA`` plugins. 
Error
+  messages are now presented without requiring a debug build of
+  ``libomptarget``. The newly added source location information can also be 
used
+  to identify which OpenMP target region the failure occurred in. More
+  information can be found :ref:`here `.
+
+- Added additional environment variables to control output from the
+  ``libomptarget`` runtime library. ``LIBOMPTARGET_PROFILE`` to
+  generate time profile output similar to Clang's ``-ftime-trace`` option.
+  ``LIBOMPTARGET_MEMORY_MANAGER_THRESHOLD`` sets the threshold size for which
+  the ``libomptarget`` memory manager will handle the allocation.
+  ``LIBOMPTARGET_INFO`` allows the user to request certain information from the
+  ``libomptarget`` runtime using a 32-bit field. A full description of each
+  environment variable is described :ref:`here 
`.

diff  --git a/openmp/docs/design/Runtimes.rst b/openmp/docs/design/Runtimes.rst
index 1d52b6b8378c..85031c66f442 100644
--- a/openmp/docs/design/Runtimes.rst
+++ b/openmp/docs/design/Runtimes.rst
@@ -16,6 +16,8 @@ the LLVM/OpenMP host runtime, aka.  `libomp.so`, is available 
as a `pdf
 LLVM/OpenMP Target Host Runtime (``libomptarget``)
 --
 
+.. _libopenmptarget_environment_vars:
+
 Environment Variables
 ^
 
@@ -171,6 +173,95 @@ shows that ``D`` will be copied back from the device once 
the OpenMP device
 kernel region ends even though it isn't written to. Finally, at the end of the
 OpenMP data region the entries for ``X`` and ``Y`` are removed from the table.
 
+.. _libopenmptarget_errors:
+
+Errors:
+^^^
+
+``libomptarget`` provides error messages when the program fails inside the
+OpenMP target region. Common causes of failure could be an invalid pointer
+access, running out of device memory, or trying to offload when the device is
+busy. If the application was built with debugging symbols the error messages
+will additionally provide the source location of the OpenMP target region.
+
+For example, consider the following code that implements a simple parallel
+reduction on the GPU. This code has a bug that causes it to fail in the
+offloading region.
+
+.. code-block:: c++
+
+#include 
+
+double sum(double *A, std::size_t N) {
+  double sum = 0.0;
+#pragma omp target teams distribute parallel for reduction(+:sum)
+  for (int i = 0; i < N; ++i)
+sum += A[i];
+
+  return sum;
+}
+
+int main() {
+  const int N = 1024;
+  double A[N];
+  sum(A, N);
+}
+
+If this code is compiled and run, there will be an error message indicating 
what is
+going wrong.
+
+.. code-block:: console
+
+$ clang++ -fopenmp -fopenmp-targets=nvptx64 -O3 -gline-tables-only sum.cpp 
-o s

[llvm-branch-commits] [openmp] 4fe17ad - [OpenMP] Fix hierarchical barrier

2021-01-13 Thread Nawrin Sultana via llvm-branch-commits


Author: Terry Wilmarth
Date: 2021-01-13T10:22:57-06:00
New Revision: 4fe17ada55ade9b77e18521dae0985cb4a88f6c4

URL: 
https://github.com/llvm/llvm-project/commit/4fe17ada55ade9b77e18521dae0985cb4a88f6c4
DIFF: 
https://github.com/llvm/llvm-project/commit/4fe17ada55ade9b77e18521dae0985cb4a88f6c4.diff

LOG: [OpenMP] Fix hierarchical barrier

Hierarchical barrier is an experimental barrier algorithm that uses aspects
of machine hierarchy to define the barrier tree structure. This patch fixes
offset calculation in hierarchical barrier. The offset is used to store info
on a flag about sleeping threads waiting on a location stored in the flag.
This commit also fixes a potential deadlock in hierarchical barrier when
using infinite blocktime by adjusting the offset value of leaf kids so that
it matches the value of leaf state. It also adds testing of default barriers
with infinite blocktime, and also tests hierarchical barrier algorithm with
both default and infinite blocktime.

Patch by Terry Wilmarth and Nawrin Sultana.

Differential Revision: https://reviews.llvm.org/D94241

Added: 


Modified: 
openmp/runtime/src/kmp_barrier.cpp
openmp/runtime/test/barrier/omp_barrier.c

Removed: 




diff  --git a/openmp/runtime/src/kmp_barrier.cpp 
b/openmp/runtime/src/kmp_barrier.cpp
index 1fef5c9936ff..4da2d0bd5220 100644
--- a/openmp/runtime/src/kmp_barrier.cpp
+++ b/openmp/runtime/src/kmp_barrier.cpp
@@ -828,8 +828,8 @@ static bool __kmp_init_hierarchical_barrier_thread(enum 
barrier_type bt,
   thr_bar->parent_tid = 0;
   thr_bar->my_level = d;
   break;
-} else if ((rem = tid % thr_bar->skip_per_level[d + 1]) !=
-   0) { // TODO: can we make this op faster?
+} else if ((rem = tid % thr_bar->skip_per_level[d + 1]) != 0) {
+  // TODO: can we make the above op faster?
   // thread is not a subtree root at next level, so this is max
   thr_bar->parent_tid = tid - rem;
   thr_bar->my_level = d;
@@ -838,7 +838,9 @@ static bool __kmp_init_hierarchical_barrier_thread(enum 
barrier_type bt,
 ++d;
   }
 }
-__kmp_type_convert(7 - (tid - thr_bar->parent_tid - 1), 
&(thr_bar->offset));
+__kmp_type_convert(7 - ((tid - thr_bar->parent_tid) /
+(thr_bar->skip_per_level[thr_bar->my_level])),
+   &(thr_bar->offset));
 thr_bar->old_tid = tid;
 thr_bar->wait_flag = KMP_BARRIER_NOT_WAITING;
 thr_bar->team = team;
@@ -1029,7 +1031,8 @@ static void __kmp_hierarchical_barrier_gather(
 } else {
   // Leaf does special release on "offset" bits of parent's b_arrived flag
   thr_bar->b_arrived = team->t.t_bar[bt].b_arrived + 
KMP_BARRIER_STATE_BUMP;
-  kmp_flag_oncore flag(&thr_bar->parent_bar->b_arrived, thr_bar->offset);
+  kmp_flag_oncore flag(&thr_bar->parent_bar->b_arrived,
+   thr_bar->offset + 1);
   flag.set_waiter(other_threads[thr_bar->parent_tid]);
   flag.release();
 }
@@ -1078,7 +1081,7 @@ static void __kmp_hierarchical_barrier_release(
   // Wait on my "offset" bits on parent's b_go flag
   thr_bar->wait_flag = KMP_BARRIER_PARENT_FLAG;
   kmp_flag_oncore flag(&thr_bar->parent_bar->b_go, KMP_BARRIER_STATE_BUMP,
-   thr_bar->offset, bt,
+   thr_bar->offset + 1, bt,
this_thr USE_ITT_BUILD_ARG(itt_sync_obj));
   flag.wait(this_thr, TRUE);
   if (thr_bar->wait_flag ==
@@ -1087,7 +1090,7 @@ static void __kmp_hierarchical_barrier_release(
   KMP_INIT_BARRIER_STATE); // Reset my b_go flag for next time
   } else { // Reset my bits on parent's b_go flag
 (RCAST(volatile char *,
-   &(thr_bar->parent_bar->b_go)))[thr_bar->offset] = 0;
+   &(thr_bar->parent_bar->b_go)))[thr_bar->offset + 1] = 0;
   }
 }
 thr_bar->wait_flag = KMP_BARRIER_NOT_WAITING;

diff  --git a/openmp/runtime/test/barrier/omp_barrier.c 
b/openmp/runtime/test/barrier/omp_barrier.c
index a3fb06086a3f..3da70db92890 100644
--- a/openmp/runtime/test/barrier/omp_barrier.c
+++ b/openmp/runtime/test/barrier/omp_barrier.c
@@ -1,4 +1,7 @@
 // RUN: %libomp-compile-and-run
+// RUN: %libomp-compile && env KMP_BLOCKTIME=infinite %libomp-run
+// RUN: %libomp-compile && env 
KMP_PLAIN_BARRIER_PATTERN='hierarchical,hierarchical' 
KMP_FORKJOIN_BARRIER_PATTERN='hierarchical,hierarchical' %libomp-run
+// RUN: %libomp-compile && env KMP_BLOCKTIME=infinite 
KMP_PLAIN_BARRIER_PATTERN='hierarchical,hierarchical' 
KMP_FORKJOIN_BARRIER_PATTERN='hierarchical,hierarchical' %libomp-run
 #include 
 #include "omp_testsuite.h"
 #include "omp_my_sleep.h"



___
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[llvm-branch-commits] [clang-tools-extra] 66d5994 - [clangd] Explicitly avoid background-indexing the same file twice.

2021-01-13 Thread Sam McCall via llvm-branch-commits


Author: Sam McCall
Date: 2021-01-13T17:29:30+01:00
New Revision: 66d5994bd38a9be4a0c05de2b69f88b64e6845ce

URL: 
https://github.com/llvm/llvm-project/commit/66d5994bd38a9be4a0c05de2b69f88b64e6845ce
DIFF: 
https://github.com/llvm/llvm-project/commit/66d5994bd38a9be4a0c05de2b69f88b64e6845ce.diff

LOG: [clangd] Explicitly avoid background-indexing the same file twice.

This used to implicitly never happen due to only discovering each CDB
once.

We may want to carefully support reindexing one day, but we need to do
it carefully (tricky tradeoffs) and it would need further support in
background indexer.

Making this explicit here rather than just turning off rebroadcast in
background index for a few reasons:
- allows *new* files in the same CDB to be indexed
- relying on bugs-at-a-distance cancelling each other out is bound to bite us
- gets us closer to actually supporting reindexing, which requires similar 
tracking

Differential Revision: https://reviews.llvm.org/D94503

Added: 


Modified: 
clang-tools-extra/clangd/index/Background.cpp
clang-tools-extra/clangd/index/Background.h
clang-tools-extra/clangd/index/BackgroundQueue.cpp
clang-tools-extra/clangd/unittests/BackgroundIndexTests.cpp

Removed: 




diff  --git a/clang-tools-extra/clangd/index/Background.cpp 
b/clang-tools-extra/clangd/index/Background.cpp
index 1649bffea2ed..e4ce1f57ff2f 100644
--- a/clang-tools-extra/clangd/index/Background.cpp
+++ b/clang-tools-extra/clangd/index/Background.cpp
@@ -43,6 +43,7 @@
 #include "llvm/Support/Error.h"
 #include "llvm/Support/Path.h"
 #include "llvm/Support/Threading.h"
+#include "llvm/Support/xxhash.h"
 
 #include 
 #include 
@@ -139,8 +140,8 @@ BackgroundQueue::Task BackgroundIndex::changedFilesTask(
  std::mt19937(std::random_device{}()));
 std::vector Tasks;
 Tasks.reserve(NeedsReIndexing.size());
-for (auto &Cmd : NeedsReIndexing)
-  Tasks.push_back(indexFileTask(std::move(Cmd)));
+for (const auto &File : NeedsReIndexing)
+  Tasks.push_back(indexFileTask(std::move(File)));
 Queue.append(std::move(Tasks));
   });
 
@@ -156,6 +157,7 @@ static llvm::StringRef 
filenameWithoutExtension(llvm::StringRef Path) {
 
 BackgroundQueue::Task BackgroundIndex::indexFileTask(std::string Path) {
   std::string Tag = filenameWithoutExtension(Path).str();
+  uint64_t Key = llvm::xxHash64(Path);
   BackgroundQueue::Task T([this, Path(std::move(Path))] {
 llvm::Optional WithProvidedContext;
 if (ContextProvider)
@@ -168,6 +170,7 @@ BackgroundQueue::Task 
BackgroundIndex::indexFileTask(std::string Path) {
   });
   T.QueuePri = IndexFile;
   T.Tag = std::move(Tag);
+  T.Key = Key;
   return T;
 }
 

diff  --git a/clang-tools-extra/clangd/index/Background.h 
b/clang-tools-extra/clangd/index/Background.h
index e8f9468889f2..fbcec7014957 100644
--- a/clang-tools-extra/clangd/index/Background.h
+++ b/clang-tools-extra/clangd/index/Background.h
@@ -76,6 +76,8 @@ class BackgroundQueue {
 llvm::ThreadPriority ThreadPri = llvm::ThreadPriority::Background;
 unsigned QueuePri = 0; // Higher-priority tasks will run first.
 std::string Tag;   // Allows priority to be boosted later.
+uint64_t Key = 0;  // If the key matches a previous task, drop this 
one.
+   // (in practice this means we never reindex a file).
 
 bool operator<(const Task &O) const { return QueuePri < O.QueuePri; }
   };
@@ -114,6 +116,7 @@ class BackgroundQueue {
 
 private:
   void notifyProgress() const; // Requires lock Mu
+  bool adjust(Task &T);
 
   std::mutex Mu;
   Stats Stat;
@@ -122,6 +125,7 @@ class BackgroundQueue {
   std::vector Queue; // max-heap
   llvm::StringMap Boosts;
   std::function OnProgress;
+  llvm::DenseSet SeenKeys;
 };
 
 // Builds an in-memory index by by running the static indexer action over

diff  --git a/clang-tools-extra/clangd/index/BackgroundQueue.cpp 
b/clang-tools-extra/clangd/index/BackgroundQueue.cpp
index 3262a2f46d38..b0dc2acca356 100644
--- a/clang-tools-extra/clangd/index/BackgroundQueue.cpp
+++ b/clang-tools-extra/clangd/index/BackgroundQueue.cpp
@@ -72,10 +72,24 @@ void BackgroundQueue::stop() {
   CV.notify_all();
 }
 
+// Tweaks the priority of a newly-enqueued task, or returns false to cancel it.
+bool BackgroundQueue::adjust(Task &T) {
+  // It is tempting to drop duplicates of queued tasks, and merely deprioritize
+  // duplicates of completed tasks (i.e. reindexing on CDB changes). But:
+  //  - the background indexer doesn't support reindexing well, e.g. staleness
+  //is checked at *enqueue* time only, and doesn't account for compile 
flags
+  //  - reindexing on compile flags is often a poor use of CPU in practice
+  if (T.Key && !SeenKeys.insert(T.Key).second)
+return false;
+  T.QueuePri = std::max(T.QueuePri, Boosts.lookup(T.Tag));
+  return true;
+}
+
 void BackgroundQueue::push(Task T) {
   {

[llvm-branch-commits] [clang-tools-extra] 466acd6 - [clangd] Avoid reallocating buffers for each message read:

2021-01-13 Thread Sam McCall via llvm-branch-commits


Author: Sam McCall
Date: 2021-01-13T17:40:33+01:00
New Revision: 466acd694861138997d668a3f9cb29aa87bd316e

URL: 
https://github.com/llvm/llvm-project/commit/466acd694861138997d668a3f9cb29aa87bd316e
DIFF: 
https://github.com/llvm/llvm-project/commit/466acd694861138997d668a3f9cb29aa87bd316e.diff

LOG: [clangd] Avoid reallocating buffers for each message read:

 - reuse std::string we read messages into
 - when reading line-wise, use SmallVector<128> and read in chunks of 128
   (this affects headers, which are short, and tests, which don't matter)

Differential Revision: https://reviews.llvm.org/D93653

Added: 


Modified: 
clang-tools-extra/clangd/JSONTransport.cpp

Removed: 




diff  --git a/clang-tools-extra/clangd/JSONTransport.cpp 
b/clang-tools-extra/clangd/JSONTransport.cpp
index 662e5df4e27b..3e8caceda21c 100644
--- a/clang-tools-extra/clangd/JSONTransport.cpp
+++ b/clang-tools-extra/clangd/JSONTransport.cpp
@@ -10,6 +10,7 @@
 #include "support/Cancellation.h"
 #include "support/Logger.h"
 #include "support/Shutdown.h"
+#include "llvm/ADT/SmallString.h"
 #include "llvm/Support/Errno.h"
 #include "llvm/Support/Error.h"
 #include 
@@ -99,6 +100,7 @@ class JSONTransport : public Transport {
   }
 
   llvm::Error loop(MessageHandler &Handler) override {
+std::string JSON; // Messages may be large, reuse same big buffer.
 while (!feof(In)) {
   if (shutdownRequested())
 return error(std::make_error_code(std::errc::operation_canceled),
@@ -106,14 +108,14 @@ class JSONTransport : public Transport {
   if (ferror(In))
 return llvm::errorCodeToError(
 std::error_code(errno, std::system_category()));
-  if (auto JSON = readRawMessage()) {
-if (auto Doc = llvm::json::parse(*JSON)) {
+  if (readRawMessage(JSON)) {
+if (auto Doc = llvm::json::parse(JSON)) {
   vlog(Pretty ? "<<< {0:2}\n" : "<<< {0}\n", *Doc);
   if (!handleMessage(std::move(*Doc), Handler))
 return llvm::Error::success(); // we saw the "exit" notification.
 } else {
   // Parse error. Log the raw message.
-  vlog("<<< {0}\n", *JSON);
+  vlog("<<< {0}\n", JSON);
   elog("JSON parse error: {0}", llvm::toString(Doc.takeError()));
 }
   }
@@ -136,12 +138,12 @@ class JSONTransport : public Transport {
   }
 
   // Read raw string messages from input stream.
-  llvm::Optional readRawMessage() {
-return Style == JSONStreamStyle::Delimited ? readDelimitedMessage()
-   : readStandardMessage();
+  bool readRawMessage(std::string &JSON) {
+return Style == JSONStreamStyle::Delimited ? readDelimitedMessage(JSON)
+   : readStandardMessage(JSON);
   }
-  llvm::Optional readDelimitedMessage();
-  llvm::Optional readStandardMessage();
+  bool readDelimitedMessage(std::string &JSON);
+  bool readStandardMessage(std::string &JSON);
 
   llvm::SmallVector OutputBuffer;
   std::FILE *In;
@@ -191,12 +193,14 @@ bool JSONTransport::handleMessage(llvm::json::Value 
Message,
 
 // Tries to read a line up to and including \n.
 // If failing, feof(), ferror(), or shutdownRequested() will be set.
-bool readLine(std::FILE *In, std::string &Out) {
-  static constexpr int BufSize = 1024;
+bool readLine(std::FILE *In, llvm::SmallVectorImpl &Out) {
+  // Big enough to hold any reasonable header line. May not fit content lines
+  // in delimited mode, but performance doesn't matter for that mode.
+  static constexpr int BufSize = 128;
   size_t Size = 0;
   Out.clear();
   for (;;) {
-Out.resize(Size + BufSize);
+Out.resize_for_overwrite(Size + BufSize);
 // Handle EINTR which is sent when a debugger attaches on some platforms.
 if (!retryAfterSignalUnlessShutdown(
 nullptr, [&] { return std::fgets(&Out[Size], BufSize, In); }))
@@ -216,14 +220,14 @@ bool readLine(std::FILE *In, std::string &Out) {
 // Returns None when:
 //  - ferror(), feof(), or shutdownRequested() are set.
 //  - Content-Length is missing or empty (protocol error)
-llvm::Optional JSONTransport::readStandardMessage() {
+bool JSONTransport::readStandardMessage(std::string &JSON) {
   // A Language Server Protocol message starts with a set of HTTP headers,
   // delimited  by \r\n, and terminated by an empty line (\r\n).
   unsigned long long ContentLength = 0;
-  std::string Line;
+  llvm::SmallString<128> Line;
   while (true) {
 if (feof(In) || ferror(In) || !readLine(In, Line))
-  return llvm::None;
+  return false;
 InMirror << Line;
 
 llvm::StringRef LineRef(Line);
@@ -258,14 +262,14 @@ llvm::Optional 
JSONTransport::readStandardMessage() {
 elog("Refusing to read message with long Content-Length: {0}. "
  "Expect protocol errors",
  ContentLength);
-return llvm::None;
+return false;
   }
   if (Conte

[llvm-branch-commits] [llvm] e433ca2 - [SLP] add reduction test for FMF; NFC

2021-01-13 Thread Sanjay Patel via llvm-branch-commits


Author: Sanjay Patel
Date: 2021-01-13T11:43:51-05:00
New Revision: e433ca28ec923929efe4f6babb8d33b4e6673ac1

URL: 
https://github.com/llvm/llvm-project/commit/e433ca28ec923929efe4f6babb8d33b4e6673ac1
DIFF: 
https://github.com/llvm/llvm-project/commit/e433ca28ec923929efe4f6babb8d33b4e6673ac1.diff

LOG: [SLP] add reduction test for FMF; NFC

Added: 


Modified: 
llvm/test/Transforms/SLPVectorizer/X86/horizontal-list.ll

Removed: 




diff  --git a/llvm/test/Transforms/SLPVectorizer/X86/horizontal-list.ll 
b/llvm/test/Transforms/SLPVectorizer/X86/horizontal-list.ll
index faa4a186e6c4..33b4f7f706fe 100644
--- a/llvm/test/Transforms/SLPVectorizer/X86/horizontal-list.ll
+++ b/llvm/test/Transforms/SLPVectorizer/X86/horizontal-list.ll
@@ -1197,6 +1197,58 @@ define float @extra_args_no_replace(float* nocapture 
readonly %x, i32 %a, i32 %b
   ret float %add4.6
 }
 
+define float @extra_args_no_fast(float* %x, float %a, float %b) {
+; CHECK-LABEL: @extra_args_no_fast(
+; CHECK-NEXT:[[ADDC:%.*]] = fadd fast float [[B:%.*]], 3.00e+00
+; CHECK-NEXT:[[ADD:%.*]] = fadd fast float [[A:%.*]], [[ADDC]]
+; CHECK-NEXT:[[ARRAYIDX3:%.*]] = getelementptr inbounds float, float* 
[[X:%.*]], i64 1
+; CHECK-NEXT:[[ARRAYIDX3_1:%.*]] = getelementptr inbounds float, float* 
[[X]], i64 2
+; CHECK-NEXT:[[ARRAYIDX3_2:%.*]] = getelementptr inbounds float, float* 
[[X]], i64 3
+; CHECK-NEXT:[[T0:%.*]] = load float, float* [[X]], align 4
+; CHECK-NEXT:[[T1:%.*]] = load float, float* [[ARRAYIDX3]], align 4
+; CHECK-NEXT:[[T2:%.*]] = load float, float* [[ARRAYIDX3_1]], align 4
+; CHECK-NEXT:[[T3:%.*]] = load float, float* [[ARRAYIDX3_2]], align 4
+; CHECK-NEXT:[[ADD1:%.*]] = fadd fast float [[T0]], [[ADD]]
+; CHECK-NEXT:[[ADD4:%.*]] = fadd fast float [[T1]], [[ADD1]]
+; CHECK-NEXT:[[ADD4_1:%.*]] = fadd float [[T2]], [[ADD4]]
+; CHECK-NEXT:[[ADD4_2:%.*]] = fadd fast float [[T3]], [[ADD4_1]]
+; CHECK-NEXT:[[ADD5:%.*]] = fadd fast float [[ADD4_2]], [[A]]
+; CHECK-NEXT:ret float [[ADD5]]
+;
+; THRESHOLD-LABEL: @extra_args_no_fast(
+; THRESHOLD-NEXT:[[ADDC:%.*]] = fadd fast float [[B:%.*]], 3.00e+00
+; THRESHOLD-NEXT:[[ADD:%.*]] = fadd fast float [[A:%.*]], [[ADDC]]
+; THRESHOLD-NEXT:[[ARRAYIDX3:%.*]] = getelementptr inbounds float, float* 
[[X:%.*]], i64 1
+; THRESHOLD-NEXT:[[ARRAYIDX3_1:%.*]] = getelementptr inbounds float, 
float* [[X]], i64 2
+; THRESHOLD-NEXT:[[ARRAYIDX3_2:%.*]] = getelementptr inbounds float, 
float* [[X]], i64 3
+; THRESHOLD-NEXT:[[T0:%.*]] = load float, float* [[X]], align 4
+; THRESHOLD-NEXT:[[T1:%.*]] = load float, float* [[ARRAYIDX3]], align 4
+; THRESHOLD-NEXT:[[T2:%.*]] = load float, float* [[ARRAYIDX3_1]], align 4
+; THRESHOLD-NEXT:[[T3:%.*]] = load float, float* [[ARRAYIDX3_2]], align 4
+; THRESHOLD-NEXT:[[ADD1:%.*]] = fadd fast float [[T0]], [[ADD]]
+; THRESHOLD-NEXT:[[ADD4:%.*]] = fadd fast float [[T1]], [[ADD1]]
+; THRESHOLD-NEXT:[[ADD4_1:%.*]] = fadd float [[T2]], [[ADD4]]
+; THRESHOLD-NEXT:[[ADD4_2:%.*]] = fadd fast float [[T3]], [[ADD4_1]]
+; THRESHOLD-NEXT:[[ADD5:%.*]] = fadd fast float [[ADD4_2]], [[A]]
+; THRESHOLD-NEXT:ret float [[ADD5]]
+;
+  %addc = fadd fast float %b, 3.0
+  %add = fadd fast float %a, %addc
+  %arrayidx3 = getelementptr inbounds float, float* %x, i64 1
+  %arrayidx3.1 = getelementptr inbounds float, float* %x, i64 2
+  %arrayidx3.2 = getelementptr inbounds float, float* %x, i64 3
+  %t0 = load float, float* %x, align 4
+  %t1 = load float, float* %arrayidx3, align 4
+  %t2 = load float, float* %arrayidx3.1, align 4
+  %t3 = load float, float* %arrayidx3.2, align 4
+  %add1 = fadd fast float %t0, %add
+  %add4 = fadd fast float %t1, %add1
+  %add4.1 = fadd float %t2, %add4  ; this is not a reduction candidate
+  %add4.2 = fadd fast float %t3, %add4.1
+  %add5 = fadd fast float %add4.2, %a
+  ret float %add5
+}
+
 define i32 @wobble(i32 %arg, i32 %bar) {
 ; CHECK-LABEL: @wobble(
 ; CHECK-NEXT:  bb:



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[llvm-branch-commits] [llvm] 1786361 - [InstCombine] Fold select -> and/or using impliesPoison

2021-01-13 Thread Nikita Popov via llvm-branch-commits


Author: Nikita Popov
Date: 2021-01-13T17:45:40+01:00
New Revision: 17863614da1efbe61e91c9f6f08ad80cdd257bb4

URL: 
https://github.com/llvm/llvm-project/commit/17863614da1efbe61e91c9f6f08ad80cdd257bb4
DIFF: 
https://github.com/llvm/llvm-project/commit/17863614da1efbe61e91c9f6f08ad80cdd257bb4.diff

LOG: [InstCombine] Fold select -> and/or using impliesPoison

We can fold a ? b : false to a & b if is_poison(b) implies that
is_poison(a), at which point we're able to reuse all the usual fold
on ands. In particular, this covers the very common case of
icmp X, C && icmp X, C'. The same applies to ors.

This currently only has an effect if the
-instcombine-unsafe-select-transform=0 option is set.

Differential Revision: https://reviews.llvm.org/D94550

Added: 


Modified: 
llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
llvm/test/Transforms/InstCombine/select-and-or.ll

Removed: 




diff  --git a/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp 
b/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
index 5dcea0f5cdf1..5a43b8b20db9 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
@@ -2572,11 +2572,13 @@ Instruction 
*InstCombinerImpl::visitSelectInst(SelectInst &SI) {
 
   if (SelType->isIntOrIntVectorTy(1) &&
   TrueVal->getType() == CondVal->getType()) {
-if (EnableUnsafeSelectTransform && match(TrueVal, m_One())) {
+if (match(TrueVal, m_One()) &&
+(EnableUnsafeSelectTransform || impliesPoison(FalseVal, CondVal))) {
   // Change: A = select B, true, C --> A = or B, C
   return BinaryOperator::CreateOr(CondVal, FalseVal);
 }
-if (EnableUnsafeSelectTransform && match(FalseVal, m_Zero())) {
+if (match(FalseVal, m_Zero()) &&
+(EnableUnsafeSelectTransform || impliesPoison(TrueVal, CondVal))) {
   // Change: A = select B, C, false --> A = and B, C
   return BinaryOperator::CreateAnd(CondVal, TrueVal);
 }

diff  --git a/llvm/test/Transforms/InstCombine/select-and-or.ll 
b/llvm/test/Transforms/InstCombine/select-and-or.ll
index 59fa170b73d4..8681a7349ff9 100644
--- a/llvm/test/Transforms/InstCombine/select-and-or.ll
+++ b/llvm/test/Transforms/InstCombine/select-and-or.ll
@@ -91,7 +91,7 @@ define i1 @logical_or_implies(i32 %x) {
 ; CHECK-LABEL: @logical_or_implies(
 ; CHECK-NEXT:[[C1:%.*]] = icmp eq i32 [[X:%.*]], 0
 ; CHECK-NEXT:[[C2:%.*]] = icmp eq i32 [[X]], 42
-; CHECK-NEXT:[[RES:%.*]] = select i1 [[C1]], i1 true, i1 [[C2]]
+; CHECK-NEXT:[[RES:%.*]] = or i1 [[C1]], [[C2]]
 ; CHECK-NEXT:ret i1 [[RES]]
 ;
   %c1 = icmp eq i32 %x, 0
@@ -103,10 +103,7 @@ define i1 @logical_or_implies(i32 %x) {
 ; Will fold after conversion to or.
 define i1 @logical_or_implies_folds(i32 %x) {
 ; CHECK-LABEL: @logical_or_implies_folds(
-; CHECK-NEXT:[[C1:%.*]] = icmp slt i32 [[X:%.*]], 0
-; CHECK-NEXT:[[C2:%.*]] = icmp sgt i32 [[X]], -1
-; CHECK-NEXT:[[RES:%.*]] = select i1 [[C1]], i1 true, i1 [[C2]]
-; CHECK-NEXT:ret i1 [[RES]]
+; CHECK-NEXT:ret i1 true
 ;
   %c1 = icmp slt i32 %x, 0
   %c2 = icmp sge i32 %x, 0
@@ -119,7 +116,7 @@ define i1 @logical_and_implies(i32 %x) {
 ; CHECK-LABEL: @logical_and_implies(
 ; CHECK-NEXT:[[C1:%.*]] = icmp ne i32 [[X:%.*]], 0
 ; CHECK-NEXT:[[C2:%.*]] = icmp ne i32 [[X]], 42
-; CHECK-NEXT:[[RES:%.*]] = select i1 [[C1]], i1 [[C2]], i1 false
+; CHECK-NEXT:[[RES:%.*]] = and i1 [[C1]], [[C2]]
 ; CHECK-NEXT:ret i1 [[RES]]
 ;
   %c1 = icmp ne i32 %x, 0
@@ -132,9 +129,7 @@ define i1 @logical_and_implies(i32 %x) {
 define i1 @logical_and_implies_folds(i32 %x) {
 ; CHECK-LABEL: @logical_and_implies_folds(
 ; CHECK-NEXT:[[C1:%.*]] = icmp ugt i32 [[X:%.*]], 42
-; CHECK-NEXT:[[C2:%.*]] = icmp ne i32 [[X]], 0
-; CHECK-NEXT:[[RES:%.*]] = select i1 [[C1]], i1 [[C2]], i1 false
-; CHECK-NEXT:ret i1 [[RES]]
+; CHECK-NEXT:ret i1 [[C1]]
 ;
   %c1 = icmp ugt i32 %x, 42
   %c2 = icmp ne i32 %x, 0
@@ -153,6 +148,7 @@ define i1 @logical_or_noundef_a(i1 noundef %a, i1 %b) {
 }
 
 ; Noundef on false value allows conversion to or.
+; TODO: impliesPoison doesn't handle this yet.
 define i1 @logical_or_noundef_b(i1 %a, i1 noundef %b) {
 ; CHECK-LABEL: @logical_or_noundef_b(
 ; CHECK-NEXT:[[RES:%.*]] = select i1 [[A:%.*]], i1 true, i1 [[B:%.*]]
@@ -173,6 +169,7 @@ define i1 @logical_and_noundef_a(i1 noundef %a, i1 %b) {
 }
 
 ; Noundef on false value allows conversion to and.
+; TODO: impliesPoison doesn't handle this yet.
 define i1 @logical_and_noundef_b(i1 %a, i1 noundef %b) {
 ; CHECK-LABEL: @logical_and_noundef_b(
 ; CHECK-NEXT:[[RES:%.*]] = select i1 [[A:%.*]], i1 [[B:%.*]], i1 false



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[llvm-branch-commits] [clang-tools-extra] a4f3866 - [clangd] Remove "decision-forest-base" experimental flag.

2021-01-13 Thread Utkarsh Saxena via llvm-branch-commits


Author: Utkarsh Saxena
Date: 2021-01-13T17:54:38+01:00
New Revision: a4f386688239b06e09f28fd31f93bf761aa9c76f

URL: 
https://github.com/llvm/llvm-project/commit/a4f386688239b06e09f28fd31f93bf761aa9c76f
DIFF: 
https://github.com/llvm/llvm-project/commit/a4f386688239b06e09f28fd31f93bf761aa9c76f.diff

LOG: [clangd] Remove "decision-forest-base" experimental flag.

The value of this flag can only be fine tuned by using A/B testing on large
user base.
We do not expect individual users to use and fine tune this flag.

Differential Revision: https://reviews.llvm.org/D94513

Added: 


Modified: 
clang-tools-extra/clangd/tool/ClangdMain.cpp

Removed: 




diff  --git a/clang-tools-extra/clangd/tool/ClangdMain.cpp 
b/clang-tools-extra/clangd/tool/ClangdMain.cpp
index d2c52cf61c53..9c75cafdb08e 100644
--- a/clang-tools-extra/clangd/tool/ClangdMain.cpp
+++ b/clang-tools-extra/clangd/tool/ClangdMain.cpp
@@ -194,14 +194,6 @@ opt 
RankingModel{
 Hidden,
 };
 
-opt DecisionForestBase{
-"decision-forest-base",
-cat(Features),
-desc("Base for exponentiating the prediction from DecisionForest."),
-init(CodeCompleteOptions().DecisionForestBase),
-Hidden,
-};
-
 // FIXME: also support "plain" style where signatures are always omitted.
 enum CompletionStyleFlag { Detailed, Bundled };
 opt CompletionStyle{
@@ -841,7 +833,6 @@ clangd accepts flags on the commandline, and in the 
CLANGD_FLAGS environment var
   Opts.CodeComplete.AllScopes = AllScopesCompletion;
   Opts.CodeComplete.RunParser = CodeCompletionParse;
   Opts.CodeComplete.RankingModel = RankingModel;
-  Opts.CodeComplete.DecisionForestBase = DecisionForestBase;
 
   RealThreadsafeFS TFS;
   std::vector> ProviderStack;



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[llvm-branch-commits] [clang-tools-extra] 0bbc6a6 - [clangd] Remove some old CodeCompletion options that are never (un)set. NFC

2021-01-13 Thread Sam McCall via llvm-branch-commits


Author: Sam McCall
Date: 2021-01-13T18:01:48+01:00
New Revision: 0bbc6a6bb643af69baaf85f7f380dbcfe1f5ad54

URL: 
https://github.com/llvm/llvm-project/commit/0bbc6a6bb643af69baaf85f7f380dbcfe1f5ad54
DIFF: 
https://github.com/llvm/llvm-project/commit/0bbc6a6bb643af69baaf85f7f380dbcfe1f5ad54.diff

LOG: [clangd] Remove some old CodeCompletion options that are never (un)set.  
NFC

Added: 


Modified: 
clang-tools-extra/clangd/CodeComplete.cpp
clang-tools-extra/clangd/CodeComplete.h
clang-tools-extra/clangd/unittests/CodeCompleteTests.cpp

Removed: 




diff  --git a/clang-tools-extra/clangd/CodeComplete.cpp 
b/clang-tools-extra/clangd/CodeComplete.cpp
index 53c647a68788..b3b40022fbb2 100644
--- a/clang-tools-extra/clangd/CodeComplete.cpp
+++ b/clang-tools-extra/clangd/CodeComplete.cpp
@@ -277,7 +277,7 @@ struct CodeCompletionBuilder {
 CodeCompletionContext::Kind ContextKind,
 const CodeCompleteOptions &Opts,
 bool IsUsingDeclaration, tok::TokenKind NextTokenKind)
-  : ASTCtx(ASTCtx), ExtractDocumentation(Opts.IncludeComments),
+  : ASTCtx(ASTCtx),
 EnableFunctionArgSnippets(Opts.EnableFunctionArgSnippets),
 IsUsingDeclaration(IsUsingDeclaration), NextTokenKind(NextTokenKind) {
 add(C, SemaCCS);
@@ -393,7 +393,7 @@ struct CodeCompletionBuilder {
   S.SnippetSuffix = std::string(C.IndexResult->CompletionSnippetSuffix);
   S.ReturnType = std::string(C.IndexResult->ReturnType);
 }
-if (ExtractDocumentation && !Completion.Documentation) {
+if (!Completion.Documentation) {
   auto SetDoc = [&](llvm::StringRef Doc) {
 if (!Doc.empty()) {
   Completion.Documentation.emplace();
@@ -512,7 +512,6 @@ struct CodeCompletionBuilder {
   ASTContext *ASTCtx;
   CodeCompletion Completion;
   llvm::SmallVector Bundled;
-  bool ExtractDocumentation;
   bool EnableFunctionArgSnippets;
   // No snippets will be generated for using declarations and when the function
   // arguments are already present.
@@ -1765,8 +1764,8 @@ class CodeCompleteFlow {
 
 clang::CodeCompleteOptions CodeCompleteOptions::getClangCompleteOpts() const {
   clang::CodeCompleteOptions Result;
-  Result.IncludeCodePatterns = EnableSnippets && IncludeCodePatterns;
-  Result.IncludeMacros = IncludeMacros;
+  Result.IncludeCodePatterns = EnableSnippets;
+  Result.IncludeMacros = true;
   Result.IncludeGlobals = true;
   // We choose to include full comments and not do doxygen parsing in
   // completion.

diff  --git a/clang-tools-extra/clangd/CodeComplete.h 
b/clang-tools-extra/clangd/CodeComplete.h
index ce8a2097a6d9..f7ac3c7e5aba 100644
--- a/clang-tools-extra/clangd/CodeComplete.h
+++ b/clang-tools-extra/clangd/CodeComplete.h
@@ -50,17 +50,6 @@ struct CodeCompleteOptions {
   /// b})).
   bool EnableSnippets = false;
 
-  /// Add code patterns to completion results.
-  /// If EnableSnippets is false, this options is ignored and code patterns 
will
-  /// always be omitted.
-  bool IncludeCodePatterns = true;
-
-  /// Add macros to code completion results.
-  bool IncludeMacros = true;
-
-  /// Add comments to code completion results, if available.
-  bool IncludeComments = true;
-
   /// Include results that are not legal completions in the current context.
   /// For example, private members are usually inaccessible.
   bool IncludeIneligibleResults = false;

diff  --git a/clang-tools-extra/clangd/unittests/CodeCompleteTests.cpp 
b/clang-tools-extra/clangd/unittests/CodeCompleteTests.cpp
index 76b193b49791..43a557d6c73e 100644
--- a/clang-tools-extra/clangd/unittests/CodeCompleteTests.cpp
+++ b/clang-tools-extra/clangd/unittests/CodeCompleteTests.cpp
@@ -315,8 +315,7 @@ void testAfterDotCompletion(clangd::CodeCompleteOptions 
Opts) {
   EXPECT_THAT(Results.Completions,
   Not(Contains(Kind(CompletionItemKind::Snippet;
   // Check documentation.
-  EXPECT_IFF(Opts.IncludeComments, Results.Completions,
- Contains(IsDocumented()));
+  EXPECT_THAT(Results.Completions, Contains(IsDocumented()));
 }
 
 void testGlobalScopeCompletion(clangd::CodeCompleteOptions Opts) {
@@ -356,14 +355,13 @@ void 
testGlobalScopeCompletion(clangd::CodeCompleteOptions Opts) {
 Has("index_func" /* our fake symbol doesn't include () */),
 Has("GlobalClass"), Has("IndexClass")));
   // A macro.
-  EXPECT_IFF(Opts.IncludeMacros, Results.Completions, Has("MACRO"));
+  EXPECT_THAT(Results.Completions, Has("MACRO"));
   // Local items. Must be present always.
   EXPECT_THAT(Results.Completions,
   AllOf(Has("local_var"), Has("LocalClass"),
 Contains(Kind(CompletionItemKind::Snippet;
   // Check documentation.
-  EXPECT_IFF(Opts.IncludeComments, Results.Completions,
- Contains(IsDocumented()));
+  EXPECT_THAT(Results.Completions, Contains(I

[llvm-branch-commits] [llvm] 05b1a15 - [IROutliner] Adapting to hoisted bitcasts in CodeExtractor

2021-01-13 Thread Andrew Litteken via llvm-branch-commits


Author: Andrew Litteken
Date: 2021-01-13T11:10:37-06:00
New Revision: 05b1a15f703c3e01f4123424700bc37188af8af1

URL: 
https://github.com/llvm/llvm-project/commit/05b1a15f703c3e01f4123424700bc37188af8af1
DIFF: 
https://github.com/llvm/llvm-project/commit/05b1a15f703c3e01f4123424700bc37188af8af1.diff

LOG: [IROutliner] Adapting to hoisted bitcasts in CodeExtractor

In commit 700d2417d8281ea56dfd7ac72d1a1473d03d2d59 the CodeExtractor
was updated so that bitcasts that have lifetime markers that beginning
outside of the region are deduplicated outside the region and are not
used as an output.  This caused a discrepancy in the IROutliner, where
in these cases there were arguments added to the aggregate function
that were not needed causing assertion errors.

The IROutliner queries the CodeExtractor twice to determine the inputs
and outputs, before and after `findAllocas` is called with the same
ValueSet for the outputs causing the duplication. This has been fixed
with a dummy ValueSet for the first call.

However, the additional bitcasts prevent us from using the same
similarity relationships that were previously defined by the
IR Similarity Analysis Pass. In these cases, we check whether the
initial version of the region being analyzed for outlining is still the
same as it was previously.  If it is not, i.e. because of the additional
bitcast instructions from the CodeExtractor, we discard the region.

Reviewers: yroux

Differential Revision: https://reviews.llvm.org/D94303

Added: 
llvm/test/Transforms/IROutliner/outlining-bitcasts.ll

Modified: 
llvm/lib/Transforms/IPO/IROutliner.cpp

Removed: 




diff  --git a/llvm/lib/Transforms/IPO/IROutliner.cpp 
b/llvm/lib/Transforms/IPO/IROutliner.cpp
index 0e5e1dd0886e..f6fdd69d71c3 100644
--- a/llvm/lib/Transforms/IPO/IROutliner.cpp
+++ b/llvm/lib/Transforms/IPO/IROutliner.cpp
@@ -510,13 +510,16 @@ static void getCodeExtractorArguments(
   // outlined region. PremappedInputs are the arguments found by the
   // CodeExtractor, removing conditions such as sunken allocas, but that
   // may need to be remapped due to the extracted output values replacing
-  // the original values.
-  SetVector OverallInputs, PremappedInputs, SinkCands, HoistCands;
+  // the original values. We use DummyOutputs for this first run of finding
+  // inputs and outputs since the outputs could change during findAllocas,
+  // the correct set of extracted outputs will be in the final Outputs 
ValueSet.
+  SetVector OverallInputs, PremappedInputs, SinkCands, HoistCands,
+  DummyOutputs;
 
   // Use the code extractor to get the inputs and outputs, without sunken
   // allocas or removing llvm.assumes.
   CodeExtractor *CE = Region.CE;
-  CE->findInputsOutputs(OverallInputs, Outputs, SinkCands);
+  CE->findInputsOutputs(OverallInputs, DummyOutputs, SinkCands);
   assert(Region.StartBB && "Region must have a start BasicBlock!");
   Function *OrigF = Region.StartBB->getParent();
   CodeExtractorAnalysisCache CEAC(*OrigF);
@@ -1263,6 +1266,16 @@ void IROutliner::pruneIncompatibleRegions(
   continue;
 
 bool BadInst = any_of(IRSC, [this](IRInstructionData &ID) {
+  // We check if there is a discrepancy between the InstructionDataList
+  // and the actual next instruction in the module.  If there is, it means
+  // that an extra instruction was added, likely by the CodeExtractor.
+
+  // Since we do not have any similarity data about this particular
+  // instruction, we cannot confidently outline it, and must discard this
+  // candidate.
+  if (std::next(ID.getIterator())->Inst !=
+  ID.Inst->getNextNonDebugInstruction())
+return true;
   return !this->InstructionClassifier.visit(ID.Inst);
 });
 

diff  --git a/llvm/test/Transforms/IROutliner/outlining-bitcasts.ll 
b/llvm/test/Transforms/IROutliner/outlining-bitcasts.ll
new file mode 100644
index ..68b7eb74ec0c
--- /dev/null
+++ b/llvm/test/Transforms/IROutliner/outlining-bitcasts.ll
@@ -0,0 +1,105 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -S -verify -iroutliner -ir-outlining-no-cost < %s | FileCheck %s
+
+; This test ensures that an extra output is not added when there is a bitcast
+; that is relocated to outside of the extraction due to a starting lifetime
+; instruction outside of the extracted region.
+
+; Additionally, we check that the newly added bitcast instruction is excluded 
in
+; further extractions.
+
+declare void @llvm.lifetime.start.p0i8(i64, i8* nocapture)
+declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture)
+
+define void @outline_bitcast_base() {
+; CHECK-LABEL: @outline_bitcast_base(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:[[A:%.*]] = alloca i32, align 4
+; CHECK-NEXT:[[B:%.*]] = alloca i32, align 4
+; CHECK-NEXT:[[C:%.*]] = alloca i32, align 4
+; CHECK-NEXT:[[D:%.*]] = alloca i32, align 4
+; CHECK

[llvm-branch-commits] [llvm] 48d2068 - [dsymutil] Warn on timestmap mismatch between object file and debug map

2021-01-13 Thread Jonas Devlieghere via llvm-branch-commits


Author: Jonas Devlieghere
Date: 2021-01-13T09:15:30-08:00
New Revision: 48d2068fb738302b9fba91c9bf8e4b051c3909eb

URL: 
https://github.com/llvm/llvm-project/commit/48d2068fb738302b9fba91c9bf8e4b051c3909eb
DIFF: 
https://github.com/llvm/llvm-project/commit/48d2068fb738302b9fba91c9bf8e4b051c3909eb.diff

LOG: [dsymutil] Warn on timestmap mismatch between object file and debug map

This re-lands e5553b9a6ab9 with two small fixes to the tests:

 - Don't touch the source directory in debug-map-parsing.test but
   instead copy everything over in a temporary directory in
   timestamp-mismatch.test.
 - Don't redirect stderr to stdout to avoid the output getting
   intertwined in extern-alias.test.

Added: 
llvm/test/tools/dsymutil/X86/timestamp-mismatch.test

Modified: 
llvm/test/tools/dsymutil/ARM/extern-alias.test
llvm/test/tools/dsymutil/X86/swift-ast-x86_64.test
llvm/test/tools/dsymutil/debug-map-parsing.test
llvm/tools/dsymutil/BinaryHolder.cpp
llvm/tools/dsymutil/BinaryHolder.h
llvm/tools/dsymutil/DwarfLinkerForBinary.cpp

Removed: 




diff  --git a/llvm/test/tools/dsymutil/ARM/extern-alias.test 
b/llvm/test/tools/dsymutil/ARM/extern-alias.test
index 91297ac6ef54..0f0e347ad9d6 100644
--- a/llvm/test/tools/dsymutil/ARM/extern-alias.test
+++ b/llvm/test/tools/dsymutil/ARM/extern-alias.test
@@ -35,8 +35,8 @@ $ xcrun --sdk iphoneos clang -g private_extern.c -c -o 
private_extern.o -target
 $ xcrun --sdk iphoneos clang -g main.c -c -o main.o -target arm64-apple-ios14.0
 $ xcrun --sdk iphoneos clang private_extern.o main.o -target 
arm64-apple-ios14.0 -o private_extern.out -Xlinker -alias_list -Xlinker 
alias_list
 
-RUN: dsymutil -oso-prepend-path %p/../Inputs 
%p/../Inputs/private/tmp/private_extern/private_extern.out -o %t.dSYM --verbose 
2>&1 | FileCheck %s
-RUN: dsymutil -oso-prepend-path %p/../Inputs 
%p/../Inputs/private/tmp/extern/extern.out -o %t.dSYM --verbose 2>&1 | 
FileCheck %s
+RUN: dsymutil -oso-prepend-path %p/../Inputs 
%p/../Inputs/private/tmp/private_extern/private_extern.out -o %t.dSYM --verbose 
| FileCheck %s
+RUN: dsymutil -oso-prepend-path %p/../Inputs 
%p/../Inputs/private/tmp/extern/extern.out -o %t.dSYM --verbose | FileCheck %s
 CHECK-NOT: could not find object file symbol for symbol _baz
 CHECK: { sym: _foo, objAddr: 0x0, binAddr: 0x17F58, size: 0x20 }
 CHECK: { sym: _baz, objAddr: 0x0, binAddr: 0x17F58, size: 0x0 }

diff  --git a/llvm/test/tools/dsymutil/X86/swift-ast-x86_64.test 
b/llvm/test/tools/dsymutil/X86/swift-ast-x86_64.test
index 626208ff3496..43d930af7128 100644
--- a/llvm/test/tools/dsymutil/X86/swift-ast-x86_64.test
+++ b/llvm/test/tools/dsymutil/X86/swift-ast-x86_64.test
@@ -20,7 +20,7 @@ READOBJ-NEXT: |.|
 DWARFDUMP: __swift_ast
 
 RUN: dsymutil -oso-prepend-path %p/.. %p/../Inputs/swift-ast.macho.x86_64 
-no-output -verbose 2>&1 | FileCheck %s --check-prefix=TIMESTAMP
-TIMESTAMP: warning: Timestamp mismatch
+TIMESTAMP: warning: {{.*}}/swift-ast.swiftmodule: timestamp mismatch between 
swift interface file ({{.*}}) and debug map ({{.*}})
 
 RUN: dsymutil -s 
%T/swift-ast.dSYM/Contents/Resources/DWARF/swift-ast.macho.x86_64 | FileCheck 
%s --check-prefix=NAST
 NAST-NOT: N_AST

diff  --git a/llvm/test/tools/dsymutil/X86/timestamp-mismatch.test 
b/llvm/test/tools/dsymutil/X86/timestamp-mismatch.test
new file mode 100644
index ..7d41905e7951
--- /dev/null
+++ b/llvm/test/tools/dsymutil/X86/timestamp-mismatch.test
@@ -0,0 +1,10 @@
+RUN: mkdir -p %t/Inputs
+RUN: cp %p/../Inputs/basic.macho.x86_64 %t/Inputs
+RUN: cp %p/../Inputs/basic1.macho.x86_64.o %t/Inputs
+RUN: cp %p/../Inputs/basic2.macho.x86_64.o %t/Inputs
+RUN: cp %p/../Inputs/basic3.macho.x86_64.o %t/Inputs
+RUN: dsymutil -oso-prepend-path=%t %t/Inputs/basic.macho.x86_64 -o %t.dSYM 
2>&1 | FileCheck %s
+
+CHECK: warning: {{.*}}/Inputs/basic1.macho.x86_64.o: timestamp mismatch 
between object file ({{.*}}) and debug map ({{.*}})
+CHECK: warning: {{.*}}/Inputs/basic2.macho.x86_64.o: timestamp mismatch 
between object file ({{.*}}) and debug map ({{.*}})
+CHECK: warning: {{.*}}/Inputs/basic3.macho.x86_64.o: timestamp mismatch 
between object file ({{.*}}) and debug map ({{.*}})

diff  --git a/llvm/test/tools/dsymutil/debug-map-parsing.test 
b/llvm/test/tools/dsymutil/debug-map-parsing.test
index fb4226093da1..a25e44598b30 100644
--- a/llvm/test/tools/dsymutil/debug-map-parsing.test
+++ b/llvm/test/tools/dsymutil/debug-map-parsing.test
@@ -46,7 +46,7 @@ opening the archive once if mulitple of its members are used).
 CHECK-ARCHIVE:  trying to open {{.*}}basic-archive.macho.x86_64'
 CHECK-ARCHIVE-NEXT:loaded object.
 CHECK-ARCHIVE-NEXT: trying to open {{.*}}/Inputs/basic1.macho.x86_64.o'
-CHECK-ARCHIVE-NEXT:loaded object.
+CHECK-ARCHIVE: loaded object.
 CHECK-ARCHIVE-NEXT: trying to open {{.*}}/libbasic.a(basic2.macho.x86_64.o)'
 CHECK-ARCHIVE-NEXT:loaded archive {{.*}}/l

[llvm-branch-commits] [llvm] cbbfc82 - [X86][SSE] canonicalizeShuffleMaskWithHorizOp - simplify shuffle(HOP(HOP(X, Y), HOP(Z, W))) style chains.

2021-01-13 Thread Simon Pilgrim via llvm-branch-commits


Author: Simon Pilgrim
Date: 2021-01-13T17:19:40Z
New Revision: cbbfc8258615bc971a54c6287abe33c4215d2eac

URL: 
https://github.com/llvm/llvm-project/commit/cbbfc8258615bc971a54c6287abe33c4215d2eac
DIFF: 
https://github.com/llvm/llvm-project/commit/cbbfc8258615bc971a54c6287abe33c4215d2eac.diff

LOG: [X86][SSE] canonicalizeShuffleMaskWithHorizOp - simplify 
shuffle(HOP(HOP(X,Y),HOP(Z,W))) style chains.

See if we can remove the shuffle by resorting a HOP chain so that the HOP args 
are pre-shuffled.

This initial version just handles (the most common) v4i32/v4f32 hadd/hsub 
reduction patterns - future work can extend this to v8i16 types plus PACK 
chains (2f64 HADD/HSUB should already be handled in the half-lane combine code 
later on).

Added: 


Modified: 
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/horizontal-sum.ll

Removed: 




diff  --git a/llvm/lib/Target/X86/X86ISelLowering.cpp 
b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 821cfc5f0c27..d45eb5366bfe 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -36115,6 +36115,38 @@ static SDValue canonicalizeShuffleMaskWithHorizOp(
   int NumEltsPerLane = NumElts / NumLanes;
   int NumHalfEltsPerLane = NumEltsPerLane / 2;
 
+  // See if we can remove the shuffle by resorting the HOP chain so that
+  // the HOP args are pre-shuffled.
+  // TODO: Generalize to any sized/depth chain.
+  // TODO: Add support for PACKSS/PACKUS.
+  if (isHoriz && NumEltsPerLane == 4 && VT0.is128BitVector() &&
+  shouldUseHorizontalOp(Ops.size() == 1, DAG, Subtarget)) {
+SmallVector ScaledMask;
+if (scaleShuffleElements(Mask, 4, ScaledMask)) {
+  // Attempt to find a HOP(HOP(X,Y),HOP(Z,W)) source operand.
+  auto GetHOpSrc = [&](int M) {
+if (M == SM_SentinelUndef)
+  return DAG.getUNDEF(VT0);
+if (M == SM_SentinelZero)
+  return getZeroVector(VT0.getSimpleVT(), Subtarget, DAG, DL);
+SDValue Src0 = BC[M / NumElts];
+SDValue Src1 = Src0.getOperand((M % 4) >= 2);
+if (Src1.getOpcode() == Opcode0 && Src0->isOnlyUserOf(Src1.getNode()))
+  return Src1.getOperand(M % 2);
+return SDValue();
+  };
+  SDValue M0 = GetHOpSrc(ScaledMask[0]);
+  SDValue M1 = GetHOpSrc(ScaledMask[1]);
+  SDValue M2 = GetHOpSrc(ScaledMask[2]);
+  SDValue M3 = GetHOpSrc(ScaledMask[3]);
+  if (M0 && M1 && M2 && M3) {
+SDValue LHS = DAG.getNode(Opcode0, DL, VT0, M0, M1);
+SDValue RHS = DAG.getNode(Opcode0, DL, VT0, M2, M3);
+return DAG.getNode(Opcode0, DL, VT0, LHS, RHS);
+  }
+}
+  }
+
   if (2 < Ops.size())
 return SDValue();
 

diff  --git a/llvm/test/CodeGen/X86/horizontal-sum.ll 
b/llvm/test/CodeGen/X86/horizontal-sum.ll
index 47d44171d99a..315e795d7a37 100644
--- a/llvm/test/CodeGen/X86/horizontal-sum.ll
+++ b/llvm/test/CodeGen/X86/horizontal-sum.ll
@@ -38,13 +38,9 @@ define <4 x float> @pair_sum_v4f32_v4f32(<4 x float> %0, <4 
x float> %1, <4 x fl
 ;
 ; SSSE3-FAST-LABEL: pair_sum_v4f32_v4f32:
 ; SSSE3-FAST:   # %bb.0:
-; SSSE3-FAST-NEXT:haddps %xmm0, %xmm0
-; SSSE3-FAST-NEXT:haddps %xmm1, %xmm1
 ; SSSE3-FAST-NEXT:haddps %xmm1, %xmm0
-; SSSE3-FAST-NEXT:haddps %xmm2, %xmm2
-; SSSE3-FAST-NEXT:haddps %xmm3, %xmm3
-; SSSE3-FAST-NEXT:haddps %xmm2, %xmm3
-; SSSE3-FAST-NEXT:shufps {{.*#+}} xmm0 = xmm0[0,2],xmm3[2,0]
+; SSSE3-FAST-NEXT:haddps %xmm3, %xmm2
+; SSSE3-FAST-NEXT:haddps %xmm2, %xmm0
 ; SSSE3-FAST-NEXT:retq
 ;
 ; AVX1-SLOW-LABEL: pair_sum_v4f32_v4f32:
@@ -66,18 +62,12 @@ define <4 x float> @pair_sum_v4f32_v4f32(<4 x float> %0, <4 
x float> %1, <4 x fl
 ; AVX1-SLOW-NEXT:vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[0]
 ; AVX1-SLOW-NEXT:retq
 ;
-; AVX1-FAST-LABEL: pair_sum_v4f32_v4f32:
-; AVX1-FAST:   # %bb.0:
-; AVX1-FAST-NEXT:vhaddps %xmm0, %xmm0, %xmm0
-; AVX1-FAST-NEXT:vhaddps %xmm1, %xmm1, %xmm1
-; AVX1-FAST-NEXT:vhaddps %xmm1, %xmm0, %xmm0
-; AVX1-FAST-NEXT:vhaddps %xmm2, %xmm2, %xmm1
-; AVX1-FAST-NEXT:vhaddps %xmm1, %xmm1, %xmm1
-; AVX1-FAST-NEXT:vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,1]
-; AVX1-FAST-NEXT:vhaddps %xmm3, %xmm3, %xmm1
-; AVX1-FAST-NEXT:vhaddps %xmm1, %xmm1, %xmm1
-; AVX1-FAST-NEXT:vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[0]
-; AVX1-FAST-NEXT:retq
+; AVX-FAST-LABEL: pair_sum_v4f32_v4f32:
+; AVX-FAST:   # %bb.0:
+; AVX-FAST-NEXT:vhaddps %xmm1, %xmm0, %xmm0
+; AVX-FAST-NEXT:vhaddps %xmm3, %xmm2, %xmm1
+; AVX-FAST-NEXT:vhaddps %xmm1, %xmm0, %xmm0
+; AVX-FAST-NEXT:retq
 ;
 ; AVX2-SLOW-LABEL: pair_sum_v4f32_v4f32:
 ; AVX2-SLOW:   # %bb.0:
@@ -97,19 +87,6 @@ define <4 x float> @pair_sum_v4f32_v4f32(<4 x float> %0, <4 
x float> %1, <4 x fl
 ; AVX2-SLOW-NEXT:vaddps %xmm2, %xmm1, %xmm1
 ; AVX2-SLOW-NEXT:vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[0]
 ; AVX2-SL

[llvm-branch-commits] [llvm] efb6e45 - [X86][AVX] Add test for another 'reverse HADD' pattern mentioned in PR41813

2021-01-13 Thread Simon Pilgrim via llvm-branch-commits


Author: Simon Pilgrim
Date: 2021-01-13T17:19:41Z
New Revision: efb6e45d2be8e3e0843bdc4c2766e6910083c08e

URL: 
https://github.com/llvm/llvm-project/commit/efb6e45d2be8e3e0843bdc4c2766e6910083c08e
DIFF: 
https://github.com/llvm/llvm-project/commit/efb6e45d2be8e3e0843bdc4c2766e6910083c08e.diff

LOG: [X86][AVX] Add test for another 'reverse HADD' pattern mentioned in PR41813

Added: 


Modified: 
llvm/test/CodeGen/X86/haddsub-4.ll

Removed: 




diff  --git a/llvm/test/CodeGen/X86/haddsub-4.ll 
b/llvm/test/CodeGen/X86/haddsub-4.ll
index d0c62753f0d2..6003f98b9371 100644
--- a/llvm/test/CodeGen/X86/haddsub-4.ll
+++ b/llvm/test/CodeGen/X86/haddsub-4.ll
@@ -120,6 +120,38 @@ define <8 x float> @hadd_reverse2_v8f32(<8 x float> %a0, 
<8 x float> %a1) {
   ret <8 x float> %add
 }
 
+define <8 x float> @hadd_reverse3_v8f32(<8 x float> %a0, <8 x float> %a1) {
+; SSE-LABEL: hadd_reverse3_v8f32:
+; SSE:   # %bb.0:
+; SSE-NEXT:movaps %xmm0, %xmm4
+; SSE-NEXT:haddps %xmm2, %xmm4
+; SSE-NEXT:haddps %xmm3, %xmm1
+; SSE-NEXT:shufps {{.*#+}} xmm1 = xmm1[3,2,1,0]
+; SSE-NEXT:shufps {{.*#+}} xmm4 = xmm4[3,2,1,0]
+; SSE-NEXT:movaps %xmm1, %xmm0
+; SSE-NEXT:movaps %xmm4, %xmm1
+; SSE-NEXT:retq
+;
+; AVX1-LABEL: hadd_reverse3_v8f32:
+; AVX1:   # %bb.0:
+; AVX1-NEXT:vhaddps %ymm1, %ymm0, %ymm0
+; AVX1-NEXT:vpermilps {{.*#+}} ymm0 = ymm0[3,2,1,0,7,6,5,4]
+; AVX1-NEXT:vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,0,1]
+; AVX1-NEXT:retq
+;
+; AVX2-LABEL: hadd_reverse3_v8f32:
+; AVX2:   # %bb.0:
+; AVX2-NEXT:vhaddps %ymm1, %ymm0, %ymm0
+; AVX2-NEXT:vpermilps {{.*#+}} ymm0 = ymm0[3,2,1,0,7,6,5,4]
+; AVX2-NEXT:vpermpd {{.*#+}} ymm0 = ymm0[2,3,0,1]
+; AVX2-NEXT:retq
+  %shuf0 = shufflevector <8 x float> %a0, <8 x float> %a1, <8 x i32> 
+  %shuf1 = shufflevector <8 x float> %a0, <8 x float> %a1, <8 x i32> 
+  %add = fadd <8 x float> %shuf0, %shuf1
+  %shuf2 = shufflevector <8 x float> %add, <8 x float> poison, <8 x i32> 
+  ret <8 x float> %shuf2
+}
+
 define <16 x i16> @hadd_reverse_v16i16(<16 x i16> %a0, <16 x i16> %a1) 
nounwind {
 ; SSE-LABEL: hadd_reverse_v16i16:
 ; SSE:   # %bb.0:



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[llvm-branch-commits] [llvm] 993c488 - [DAG] visitVECTOR_SHUFFLE - use all_of to check for all-undef shuffle mask. NFCI.

2021-01-13 Thread Simon Pilgrim via llvm-branch-commits


Author: Simon Pilgrim
Date: 2021-01-13T17:19:41Z
New Revision: 993c488ed2b347011d9d71990af38a82aaf5bdf5

URL: 
https://github.com/llvm/llvm-project/commit/993c488ed2b347011d9d71990af38a82aaf5bdf5
DIFF: 
https://github.com/llvm/llvm-project/commit/993c488ed2b347011d9d71990af38a82aaf5bdf5.diff

LOG: [DAG] visitVECTOR_SHUFFLE - use all_of to check for all-undef shuffle 
mask. NFCI.

Added: 


Modified: 
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Removed: 




diff  --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp 
b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 5d9bb4e4a98b..7e4ee3bd 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -20901,11 +20901,7 @@ SDValue DAGCombiner::visitVECTOR_SHUFFLE(SDNode *N) {
 }
 
 // Check if all indices in Mask are Undef. In case, propagate Undef.
-bool isUndefMask = true;
-for (unsigned i = 0; i != NumElts && isUndefMask; ++i)
-  isUndefMask &= Mask[i] < 0;
-
-if (isUndefMask)
+if (llvm::all_of(Mask, [](int M) { return M < 0; }))
   return DAG.getUNDEF(VT);
 
 if (!SV0.getNode())



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[llvm-branch-commits] [llvm] 60fda8e - [ARM] Add a pass that re-arranges blocks when there is a backwards WLS branch

2021-01-13 Thread Sam Tebbs via llvm-branch-commits


Author: Sam Tebbs
Date: 2021-01-13T17:23:00Z
New Revision: 60fda8ebb6dc4e2ac1cc181c0ab8019c4309cb22

URL: 
https://github.com/llvm/llvm-project/commit/60fda8ebb6dc4e2ac1cc181c0ab8019c4309cb22
DIFF: 
https://github.com/llvm/llvm-project/commit/60fda8ebb6dc4e2ac1cc181c0ab8019c4309cb22.diff

LOG: [ARM] Add a pass that re-arranges blocks when there is a backwards WLS 
branch

Blocks can be laid out such that a t2WhileLoopStart branches backwards. This is 
forbidden by the architecture and so it fails to be converted into a 
low-overhead loop. This new pass checks for these cases and moves the target 
block, fixing any fall-through that would then be broken.

Differential Revision: https://reviews.llvm.org/D92385

Added: 
llvm/lib/Target/ARM/ARMBlockPlacement.cpp
llvm/test/CodeGen/Thumb2/block-placement.mir

Modified: 
llvm/lib/Target/ARM/ARM.h
llvm/lib/Target/ARM/ARMTargetMachine.cpp
llvm/lib/Target/ARM/CMakeLists.txt
llvm/test/CodeGen/ARM/O3-pipeline.ll

Removed: 




diff  --git a/llvm/lib/Target/ARM/ARM.h b/llvm/lib/Target/ARM/ARM.h
index d8a4e4c31012..f4fdc9803728 100644
--- a/llvm/lib/Target/ARM/ARM.h
+++ b/llvm/lib/Target/ARM/ARM.h
@@ -37,6 +37,7 @@ class PassRegistry;
 
 Pass *createMVETailPredicationPass();
 FunctionPass *createARMLowOverheadLoopsPass();
+FunctionPass *createARMBlockPlacementPass();
 Pass *createARMParallelDSPPass();
 FunctionPass *createARMISelDag(ARMBaseTargetMachine &TM,
CodeGenOpt::Level OptLevel);
@@ -71,6 +72,7 @@ void initializeThumb2ITBlockPass(PassRegistry &);
 void initializeMVEVPTBlockPass(PassRegistry &);
 void initializeMVEVPTOptimisationsPass(PassRegistry &);
 void initializeARMLowOverheadLoopsPass(PassRegistry &);
+void initializeARMBlockPlacementPass(PassRegistry &);
 void initializeMVETailPredicationPass(PassRegistry &);
 void initializeMVEGatherScatterLoweringPass(PassRegistry &);
 void initializeARMSLSHardeningPass(PassRegistry &);

diff  --git a/llvm/lib/Target/ARM/ARMBlockPlacement.cpp 
b/llvm/lib/Target/ARM/ARMBlockPlacement.cpp
new file mode 100644
index ..fda05f526335
--- /dev/null
+++ b/llvm/lib/Target/ARM/ARMBlockPlacement.cpp
@@ -0,0 +1,227 @@
+//===-- ARMBlockPlacement.cpp - ARM block placement pass ===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+//
+// This pass re-arranges machine basic blocks to suit target requirements.
+// Currently it only moves blocks to fix backwards WLS branches.
+//
+//===--===//
+
+#include "ARM.h"
+#include "ARMBaseInstrInfo.h"
+#include "ARMBasicBlockInfo.h"
+#include "ARMSubtarget.h"
+#include "llvm/CodeGen/MachineFunctionPass.h"
+#include "llvm/CodeGen/MachineInstrBuilder.h"
+#include "llvm/CodeGen/MachineLoopInfo.h"
+
+using namespace llvm;
+
+#define DEBUG_TYPE "arm-block-placement"
+#define DEBUG_PREFIX "ARM Block Placement: "
+
+namespace llvm {
+class ARMBlockPlacement : public MachineFunctionPass {
+private:
+  const ARMBaseInstrInfo *TII;
+  std::unique_ptr BBUtils = nullptr;
+  MachineLoopInfo *MLI = nullptr;
+
+public:
+  static char ID;
+  ARMBlockPlacement() : MachineFunctionPass(ID) {}
+
+  bool runOnMachineFunction(MachineFunction &MF) override;
+  void moveBasicBlock(MachineBasicBlock *BB, MachineBasicBlock *After);
+  bool blockIsBefore(MachineBasicBlock *BB, MachineBasicBlock *Other);
+
+  void getAnalysisUsage(AnalysisUsage &AU) const override {
+AU.setPreservesCFG();
+AU.addRequired();
+MachineFunctionPass::getAnalysisUsage(AU);
+  }
+};
+
+} // namespace llvm
+
+FunctionPass *llvm::createARMBlockPlacementPass() {
+  return new ARMBlockPlacement();
+}
+
+char ARMBlockPlacement::ID = 0;
+
+INITIALIZE_PASS(ARMBlockPlacement, DEBUG_TYPE, "ARM block placement", false,
+false)
+
+bool ARMBlockPlacement::runOnMachineFunction(MachineFunction &MF) {
+  const ARMSubtarget &ST = static_cast(MF.getSubtarget());
+  if (!ST.hasLOB())
+return false;
+  LLVM_DEBUG(dbgs() << DEBUG_PREFIX << "Running on " << MF.getName() << "\n");
+  MLI = &getAnalysis();
+  TII = static_cast(ST.getInstrInfo());
+  BBUtils = std::unique_ptr(new ARMBasicBlockUtils(MF));
+  MF.RenumberBlocks();
+  BBUtils->computeAllBlockSizes();
+  BBUtils->adjustBBOffsetsAfter(&MF.front());
+  bool Changed = false;
+
+  // Find loops with a backwards branching WLS.
+  // This requires looping over the loops in the function, checking each
+  // preheader for a WLS and if its target is before the preheader. If moving
+  // the target block wouldn't produce another backwards WLS or a new forwards
+  // LE branch then move the target block after the preh

[llvm-branch-commits] [llvm] 14f322f - [gn build] Port 60fda8ebb6d

2021-01-13 Thread LLVM GN Syncbot via llvm-branch-commits


Author: LLVM GN Syncbot
Date: 2021-01-13T17:33:32Z
New Revision: 14f322f074b933af1e26bf6288b88ec2e7c3a551

URL: 
https://github.com/llvm/llvm-project/commit/14f322f074b933af1e26bf6288b88ec2e7c3a551
DIFF: 
https://github.com/llvm/llvm-project/commit/14f322f074b933af1e26bf6288b88ec2e7c3a551.diff

LOG: [gn build] Port 60fda8ebb6d

Added: 


Modified: 
llvm/utils/gn/secondary/llvm/lib/Target/ARM/BUILD.gn

Removed: 




diff  --git a/llvm/utils/gn/secondary/llvm/lib/Target/ARM/BUILD.gn 
b/llvm/utils/gn/secondary/llvm/lib/Target/ARM/BUILD.gn
index 27d98ae937c8..e98d3a77adf4 100644
--- a/llvm/utils/gn/secondary/llvm/lib/Target/ARM/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/lib/Target/ARM/BUILD.gn
@@ -67,6 +67,7 @@ static_library("LLVMARMCodeGen") {
 "ARMBaseInstrInfo.cpp",
 "ARMBaseRegisterInfo.cpp",
 "ARMBasicBlockInfo.cpp",
+"ARMBlockPlacement.cpp",
 "ARMCallLowering.cpp",
 "ARMCallingConv.cpp",
 "ARMConstantIslandPass.cpp",



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[llvm-branch-commits] [flang] a50bb84 - [flang] Fix classification of shape inquiries in specification exprs

2021-01-13 Thread peter klausler via llvm-branch-commits


Author: peter klausler
Date: 2021-01-13T10:05:14-08:00
New Revision: a50bb84ec0c2d47a2a7403ad29842ca48cd6b828

URL: 
https://github.com/llvm/llvm-project/commit/a50bb84ec0c2d47a2a7403ad29842ca48cd6b828
DIFF: 
https://github.com/llvm/llvm-project/commit/a50bb84ec0c2d47a2a7403ad29842ca48cd6b828.diff

LOG: [flang] Fix classification of shape inquiries in specification exprs

In some contexts, including the motivating case of determining whether
the expressions that define the shape of a variable are "constant expressions"
in the sense of the Fortran standard, expression rewriting via Fold()
is not necessary, and should not be required.  The inquiry intrinsics LBOUND,
UBOUND, and SIZE work correctly now in specification expressions and are
classified correctly as being constant expressions (or not).  Getting this right
led to a fair amount of API clean-up as a consequence, including the
folding of shapes and TypeAndShape objects, and new APIs for shapes
that do not fold for those cases where folding isn't needed.  Further,
the symbol-testing predicate APIs in Evaluate/tools.h now all resolve any
associations of their symbols and work transparently on use-, host-, and
construct-association symbols; the tools used to resolve those associations have
been defined and documented more precisely, and their clients adjusted as 
needed.

Differential Revision: https://reviews.llvm.org/D94561

Added: 


Modified: 
flang/include/flang/Evaluate/characteristics.h
flang/include/flang/Evaluate/fold.h
flang/include/flang/Evaluate/shape.h
flang/include/flang/Evaluate/tools.h
flang/include/flang/Evaluate/type.h
flang/include/flang/Semantics/tools.h
flang/lib/Evaluate/characteristics.cpp
flang/lib/Evaluate/check-expression.cpp
flang/lib/Evaluate/fold.cpp
flang/lib/Evaluate/intrinsics.cpp
flang/lib/Evaluate/shape.cpp
flang/lib/Evaluate/tools.cpp
flang/lib/Semantics/check-call.cpp
flang/lib/Semantics/check-declarations.cpp
flang/lib/Semantics/check-do-forall.cpp
flang/lib/Semantics/resolve-names.cpp
flang/lib/Semantics/semantics.cpp
flang/lib/Semantics/tools.cpp
flang/test/Semantics/data04.f90
flang/test/Semantics/resolve44.f90
flang/test/Semantics/shape.f90

Removed: 




diff  --git a/flang/include/flang/Evaluate/characteristics.h 
b/flang/include/flang/Evaluate/characteristics.h
index c7ef66e800a9..6b7b2f5408e4 100644
--- a/flang/include/flang/Evaluate/characteristics.h
+++ b/flang/include/flang/Evaluate/characteristics.h
@@ -81,9 +81,9 @@ class TypeAndShape {
   static std::optional Characterize(
   const semantics::ObjectEntityDetails &, FoldingContext &);
   static std::optional Characterize(
-  const semantics::ProcInterface &);
+  const semantics::ProcInterface &, FoldingContext &);
   static std::optional Characterize(
-  const semantics::DeclTypeSpec &);
+  const semantics::DeclTypeSpec &, FoldingContext &);
   static std::optional Characterize(
   const ActualArgument &, FoldingContext &);
 
@@ -101,15 +101,16 @@ class TypeAndShape {
 if (type->category() == TypeCategory::Character) {
   if (const auto *chExpr{UnwrapExpr>(x)}) {
 if (auto length{chExpr->LEN()}) {
-  result.set_LEN(Fold(context, std::move(*length)));
+  result.set_LEN(std::move(*length));
 }
   }
 }
-return result;
+return std::move(result.Rewrite(context));
   }
 }
 return std::nullopt;
   }
+
   template 
   static std::optional Characterize(
   const std::optional &x, FoldingContext &context) {
@@ -121,9 +122,9 @@ class TypeAndShape {
   }
   template 
   static std::optional Characterize(
-  const A *x, FoldingContext &context) {
-if (x) {
-  return Characterize(*x, context);
+  const A *p, FoldingContext &context) {
+if (p) {
+  return Characterize(*p, context);
 } else {
   return std::nullopt;
 }
@@ -151,14 +152,17 @@ class TypeAndShape {
   std::optional> MeasureSizeInBytes(
   FoldingContext &) const;
 
+  // called by Fold() to rewrite in place
+  TypeAndShape &Rewrite(FoldingContext &);
+
   llvm::raw_ostream &Dump(llvm::raw_ostream &) const;
 
 private:
   static std::optional Characterize(
   const semantics::AssocEntityDetails &, FoldingContext &);
   static std::optional Characterize(
-  const semantics::ProcEntityDetails &);
-  void AcquireShape(const semantics::ObjectEntityDetails &, FoldingContext &);
+  const semantics::ProcEntityDetails &, FoldingContext &);
+  void AcquireShape(const semantics::ObjectEntityDetails &);
   void AcquireLEN();
 
 protected:
@@ -325,6 +329,5 @@ struct Procedure {
 private:
   Procedure() {}
 };
-
 } // namespace Fortran::evaluate::characteristics
 #endif // FORTRAN_EVALUATE_CHARACTERISTICS_H_

diff  --git a/flang/include/flang/Evaluate/fold.h 
b/flang

[llvm-branch-commits] [llvm] a2e6506 - [Hexagon] Improve legalizing of ISD::SETCC result

2021-01-13 Thread Krzysztof Parzyszek via llvm-branch-commits


Author: Krzysztof Parzyszek
Date: 2021-01-13T12:29:22-06:00
New Revision: a2e6506c47b1ab8cb085aa485fd0abf980a47a05

URL: 
https://github.com/llvm/llvm-project/commit/a2e6506c47b1ab8cb085aa485fd0abf980a47a05
DIFF: 
https://github.com/llvm/llvm-project/commit/a2e6506c47b1ab8cb085aa485fd0abf980a47a05.diff

LOG: [Hexagon] Improve legalizing of ISD::SETCC result

Added: 


Modified: 
llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp

Removed: 




diff  --git a/llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp 
b/llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
index 161035b93e8b..cf5ea5d53af6 100644
--- a/llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
@@ -51,13 +51,6 @@ HexagonTargetLowering::initializeHVXLowering() {
 addRegisterClass(MVT::v256i8,  &Hexagon::HvxWRRegClass);
 addRegisterClass(MVT::v128i16, &Hexagon::HvxWRRegClass);
 addRegisterClass(MVT::v64i32,  &Hexagon::HvxWRRegClass);
-// Treat v16i1 as a legal type, since there is no way to widen vNi1:
-// the validity of vNi1 may depend on how the result was obtained.
-// For example v32i1 is ok when it's a result of comparing v32i32,
-// but would need to be widened if it came from comparing v32i16.
-// This precludes using getTypeToTransformTo, since it doesn't have
-// the necessary context to decide what to do.
-addRegisterClass(MVT::v16i1, &Hexagon::HvxQRRegClass);
 addRegisterClass(MVT::v32i1, &Hexagon::HvxQRRegClass);
 addRegisterClass(MVT::v64i1, &Hexagon::HvxQRRegClass);
 addRegisterClass(MVT::v128i1, &Hexagon::HvxQRRegClass);
@@ -265,6 +258,10 @@ HexagonTargetLowering::initializeHVXLowering() {
 setOperationAction(ISD::ANY_EXTEND,   VecTy, Custom);
 setOperationAction(ISD::SIGN_EXTEND,  VecTy, Custom);
 setOperationAction(ISD::ZERO_EXTEND,  VecTy, Custom);
+
+MVT BoolTy = MVT::getVectorVT(MVT::i1, N);
+if (!isTypeLegal(BoolTy))
+  setOperationAction(ISD::SETCC, BoolTy, Custom);
   }
 }
   }
@@ -279,17 +276,26 @@ HexagonTargetLowering::getPreferredHvxVectorAction(MVT 
VecTy) const {
   unsigned VecLen = VecTy.getVectorNumElements();
   unsigned HwLen = Subtarget.getVectorLength();
 
-  // Split vectors of i1 that correspond to (byte) vector pairs.
-  if (ElemTy == MVT::i1 && VecLen == 2*HwLen)
+  // Split vectors of i1 that exceed byte vector length.
+  if (ElemTy == MVT::i1 && VecLen > HwLen)
 return TargetLoweringBase::TypeSplitVector;
-  // Treat i1 as i8 from now on.
-  if (ElemTy == MVT::i1)
-ElemTy = MVT::i8;
+
+  ArrayRef Tys = Subtarget.getHVXElementTypes();
+  // For shorter vectors of i1, widen them if any of the corresponding
+  // vectors of integers needs to be widened.
+  if (ElemTy == MVT::i1) {
+for (MVT T : Tys) {
+  assert(T != MVT::i1);
+  auto A = getPreferredHvxVectorAction(MVT::getVectorVT(T, VecLen));
+  if (A != ~0u)
+return A;
+}
+return ~0u;
+  }
 
   // If the size of VecTy is at least half of the vector length,
   // widen the vector. Note: the threshold was not selected in
   // any scientific way.
-  ArrayRef Tys = Subtarget.getHVXElementTypes();
   if (llvm::is_contained(Tys, ElemTy)) {
 unsigned VecWidth = VecTy.getSizeInBits();
 bool HaveThreshold = HvxWidenThreshold.getNumOccurrences() > 0;
@@ -1956,7 +1962,9 @@ HexagonTargetLowering::WidenHvxSetCC(SDValue Op, 
SelectionDAG &DAG) const {
   getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), WideOpTy);
   SDValue SetCC = DAG.getNode(ISD::SETCC, dl, ResTy,
   {WideOp0, WideOp1, Op.getOperand(2)});
-  return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, ty(Op),
+
+  EVT RetTy = getTypeToTransformTo(*DAG.getContext(), ty(Op));
+  return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, RetTy,
  {SetCC, getZero(dl, MVT::i32, DAG)});
 }
 
@@ -2187,6 +2195,12 @@ HexagonTargetLowering::ReplaceHvxNodeResults(SDNode *N,
   Results.push_back(T);
   }
   break;
+case ISD::SETCC:
+  if (shouldWidenToHvx(ty(Op), DAG)) {
+if (SDValue T = WidenHvxSetCC(Op, DAG))
+  Results.push_back(T);
+  }
+  break;
 case ISD::TRUNCATE:
   if (shouldWidenToHvx(ty(Op), DAG)) {
 if (SDValue T = WidenHvxTruncate(Op, DAG))



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[llvm-branch-commits] [llvm] 123674a - [SLP] simplify type check for reductions

2021-01-13 Thread Sanjay Patel via llvm-branch-commits


Author: Sanjay Patel
Date: 2021-01-13T13:30:46-05:00
New Revision: 123674a816742254debdfcc978026b8107b502d8

URL: 
https://github.com/llvm/llvm-project/commit/123674a816742254debdfcc978026b8107b502d8
DIFF: 
https://github.com/llvm/llvm-project/commit/123674a816742254debdfcc978026b8107b502d8.diff

LOG: [SLP] simplify type check for reductions

This is NFC-intended. The 'valid' call allows int/FP/pointers
for other parts of SLP. The difference here is that we can't
reduce pointers.

Added: 


Modified: 
llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp

Removed: 




diff  --git a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp 
b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
index 403170447f5a..b3a3d65d3340 100644
--- a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+++ b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
@@ -6809,10 +6809,10 @@ class HorizontalReduction {
 if (!RdxTreeInst.isVectorizable(B))
   return false;
 
+// Analyze "regular" integer/FP types for reductions - no target-specific
+// types or pointers.
 Type *Ty = B->getType();
-if (!isValidElementType(Ty))
-  return false;
-if (!Ty->isIntOrIntVectorTy() && !Ty->isFPOrFPVectorTy())
+if (!isValidElementType(Ty) || Ty->isPointerTy())
   return false;
 
 RdxLeafVal.clear();



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[llvm-branch-commits] [flang] 166e5c3 - [flang] Do not create HostAssoc symbols in derived type scopes

2021-01-13 Thread peter klausler via llvm-branch-commits


Author: peter klausler
Date: 2021-01-13T11:01:27-08:00
New Revision: 166e5c335cbe9f8144a7822ca655dc3352ec9e56

URL: 
https://github.com/llvm/llvm-project/commit/166e5c335cbe9f8144a7822ca655dc3352ec9e56
DIFF: 
https://github.com/llvm/llvm-project/commit/166e5c335cbe9f8144a7822ca655dc3352ec9e56.diff

LOG: [flang] Do not create HostAssoc symbols in derived type scopes

When needed due to a specification expression in a derived type,
the host association symbols should be created in the surrounding
subprogram's scope instead.

Differential Revision: https://reviews.llvm.org/D94567

Added: 


Modified: 
flang/lib/Semantics/resolve-names.cpp

Removed: 




diff  --git a/flang/lib/Semantics/resolve-names.cpp 
b/flang/lib/Semantics/resolve-names.cpp
index cee49175d7f4..d66f561fc3c5 100644
--- a/flang/lib/Semantics/resolve-names.cpp
+++ b/flang/lib/Semantics/resolve-names.cpp
@@ -2050,7 +2050,9 @@ Symbol &ScopeHandler::MakeSymbol(const parser::Name 
&name, Attrs attrs) {
 }
 Symbol &ScopeHandler::MakeHostAssocSymbol(
 const parser::Name &name, const Symbol &hostSymbol) {
-  Symbol &symbol{MakeSymbol(name, HostAssocDetails{hostSymbol})};
+  Symbol &symbol{*NonDerivedTypeScope()
+  .try_emplace(name.source, HostAssocDetails{hostSymbol})
+  .first->second};
   name.symbol = &symbol;
   symbol.attrs() = hostSymbol.attrs(); // TODO: except PRIVATE, PUBLIC?
   symbol.flags() = hostSymbol.flags();



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[llvm-branch-commits] [llvm] b3154d1 - [CSSPGO][llvm-profgen] Pseudo probe decoding and disassembling

2021-01-13 Thread via llvm-branch-commits


Author: wlei
Date: 2021-01-13T11:02:57-08:00
New Revision: b3154d11bc6dee59e581b731b7561f1ebab3aed6

URL: 
https://github.com/llvm/llvm-project/commit/b3154d11bc6dee59e581b731b7561f1ebab3aed6
DIFF: 
https://github.com/llvm/llvm-project/commit/b3154d11bc6dee59e581b731b7561f1ebab3aed6.diff

LOG: [CSSPGO][llvm-profgen] Pseudo probe decoding and disassembling

This change implements pseudo probe decoding and disassembling for 
llvm-profgen/CSSPGO. Please see 
https://groups.google.com/g/llvm-dev/c/1p1rdYbL93s and 
https://reviews.llvm.org/D89707 for more context about CSSPGO and llvm-profgen.

**ELF section format**
Please see the encoding patch(https://reviews.llvm.org/D91878) for more details 
of the format, just copy the example here:

Two section(`.pseudo_probe_desc` and  `.pseudoprobe` ) is emitted in ELF to 
support pseudo probe.
The format of `.pseudo_probe_desc` section looks like:

```
.section   .pseudo_probe_desc,"",@progbits
.quad   6309742469962978389  // Func GUID
.quad   4294967295   // Func Hash
.byte   9// Length of func name
.ascii  "_Z5funcAi"  // Func name
.quad   7102633082150537521
.quad   138828622701
.byte   12
.ascii  "_Z8funcLeafi"
.quad   446061515086924981
.quad   4294967295
.byte   9
.ascii  "_Z5funcBi"
.quad   -2016976694713209516
.quad   72617220756
.byte   7
.ascii  "_Z3fibi"
```

For each `.pseudoprobe` section, the encoded binary data consists of a single 
function record corresponding to an outlined function (i.e, a function with a 
code entry in the `.text` section). A function record has the following format :

```
FUNCTION BODY (one for each outlined function present in the text section)
GUID (uint64)
GUID of the function
NPROBES (ULEB128)
Number of probes originating from this function.
NUM_INLINED_FUNCTIONS (ULEB128)
Number of callees inlined into this function, aka number of
first-level inlinees
PROBE RECORDS
A list of NPROBES entries. Each entry contains:
  INDEX (ULEB128)
  TYPE (uint4)
0 - block probe, 1 - indirect call, 2 - direct call
  ATTRIBUTE (uint3)
reserved
  ADDRESS_TYPE (uint1)
0 - code address, 1 - address delta
  CODE_ADDRESS (uint64 or ULEB128)
code address or address delta, depending on ADDRESS_TYPE
INLINED FUNCTION RECORDS
A list of NUM_INLINED_FUNCTIONS entries describing each of the inlined
callees.  Each record contains:
  INLINE SITE
GUID of the inlinee (uint64)
ID of the callsite probe (ULEB128)
  FUNCTION BODY
A FUNCTION BODY entry describing the inlined function.
```

**Disassembling**
A switch `--show-pseudo-probe` is added to use along with `--show-disassembly` 
to print disassembly code with pseudo probe directives.

For example:
```
002011a0 :
  2011a0: 50push   rax
  2011a1: 85 ff test   edi,edi
  [Probe]:  FUNC: foo2  Index: 1  Type: Block
  2011a3: 74 02 je 2011a7 
  [Probe]:  FUNC: foo2  Index: 3  Type: Block
  [Probe]:  FUNC: foo2  Index: 4  Type: Block
  [Probe]:  FUNC: foo   Index: 1  Type: Block  Inlined: @ foo2:6
  2011a5: 58poprax
  2011a6: c3ret
  [Probe]:  FUNC: foo2  Index: 2  Type: Block
  2011a7: bf 01 00 00 00movedi,0x1
  [Probe]:  FUNC: foo2  Index: 5  Type: IndirectCall
  2011ac: ff d6 call   rsi
  [Probe]:  FUNC: foo2  Index: 4  Type: Block
  2011ae: 58poprax
  2011af: c3ret
```

**Implementation**
- `PseudoProbeDecoder` is added in ProfiledBinary as an infra for the decoding. 
It decoded the two section and generate two map: `GUIDProbeFunctionMap` stores 
all the `PseudoProbeFunction` which is the abstraction of a general function. 
`AddressProbesMap` stores all the pseudo probe info indexed by its address.
- All the inline info is encoded into binary as a trie(`PseudoProbeInlineTree`) 
and will be constructed from the decoding. Each pseudo probe can get its inline 
context(`getInlineContext`) by traversing its inline tree node backwards.

Test Plan:
ninja & ninja check-llvm

Differential Revision: https://reviews.llvm.org/D92334

Added: 
llvm/test/tools/llvm-profgen/Inputs/inline-cs-pseudoprobe.perfbin
llvm/test/tools/llvm-profgen/pseudoprobe-decoding.test
llvm/tools/llvm-profgen/PseudoProbe.cpp
llvm/tools/llvm-profgen/PseudoProbe.h

Modified: 
llvm/tools/llvm-profgen/CMakeLists.txt
llvm/tools/llvm-profgen/ProfiledBinary.cpp
llvm/tools/llvm-profgen/ProfiledBinary.h

Removed: 




diff  --git a/llvm/test/tools/llvm-profgen/Inputs/inline-cs-pseudoprobe.perfbin 
b/llvm/test/tools/llvm-profgen/Inputs/inline-cs-pseudoprobe.perfbin
new file mode 100755
index ..2b5fc0a9dfdd
Binary

[llvm-branch-commits] [llvm] 414930b - [CSSPGO][llvm-profgen] Refactor to unify hashable interface for trace sample and context-sensitive counter

2021-01-13 Thread via llvm-branch-commits


Author: wlei
Date: 2021-01-13T11:02:57-08:00
New Revision: 414930b91bfd4196c457120932a1dbaf26db711d

URL: 
https://github.com/llvm/llvm-project/commit/414930b91bfd4196c457120932a1dbaf26db711d
DIFF: 
https://github.com/llvm/llvm-project/commit/414930b91bfd4196c457120932a1dbaf26db711d.diff

LOG: [CSSPGO][llvm-profgen] Refactor to unify hashable interface for trace 
sample and context-sensitive counter

As we plan to support both CSSPGO and AutoFDO for llvm-profgen, we will have 
different kinds of perf sample and different kinds of sample counter(cs/non-cs, 
with/without pseudo probe) which both need to do aggregation in hash map.  This 
change implements the hashable interface(`Hashable`) and the unified base class 
for them to have better extensibility and reusability.

Currently perf trace sample and sample counter with context implemented this 
`Hashable` and  the class hierarchy is like:

```
| Hashable
   | PerfSample
  | HybridSample
  | LBRSample
   | ContextKey
  | StringBasedCtxKey
  | ProbeBasedCtxKey
  | CallsiteBasedCtxKey
   | ...
```

- Class specifying `Hashable` should implement `getHashCode` and `isEqual`. 
Here we make `getHashCode` a non-virtual function to avoid vtable overhead, so 
derived class should calculate and assign the base class's HashCode manually. 
This also provides the flexibility for calculating the hash code 
incrementally(like rolling hash) during frame stack unwinding
- `isEqual` is a virtual function, which will have perf overhead. In the 
future, if we redesign a better hash function, then we can just skip this or 
switch to non-virtual function.
- Added `PerfSample` and `ContextKey` as base class for perf sample and counter 
context key, leveraging llvm-style RTTI for this.
- Added `StringBasedCtxKey` class extending  `ContextKey` to use string as 
context id.
- Refactor `AggregationCounter` to take all kinds of `PerfSample` as key
- Refactor `ContextSampleCounter` to take all kinds of `ContextKey` as key
- Other refactoring work:
 - Create a wrapper class `SampleCounter` to wrap `RangeCounter` and 
`BranchCounter`
 - Hoist `ContextId` and `FunctionProfile` out of `populateFunctionBodySamples` 
and `populateFunctionBoundarySamples` to reuse them in ProfileGenerator

Differential Revision: https://reviews.llvm.org/D92584

Added: 


Modified: 
llvm/tools/llvm-profgen/PerfReader.cpp
llvm/tools/llvm-profgen/PerfReader.h
llvm/tools/llvm-profgen/ProfileGenerator.cpp
llvm/tools/llvm-profgen/ProfileGenerator.h

Removed: 




diff  --git a/llvm/tools/llvm-profgen/PerfReader.cpp 
b/llvm/tools/llvm-profgen/PerfReader.cpp
index 6a0d54e2de87..1ed5e2917cba 100644
--- a/llvm/tools/llvm-profgen/PerfReader.cpp
+++ b/llvm/tools/llvm-profgen/PerfReader.cpp
@@ -72,26 +72,39 @@ void VirtualUnwinder::unwindBranchWithinFrame(UnwindState 
&State) {
   State.InstPtr.update(Source);
 }
 
+SampleCounter &
+VirtualUnwinder::getOrCreateSampleCounter(const ProfiledBinary *Binary,
+  std::list &CallStack) {
+  std::shared_ptr KeyStr =
+  std::make_shared();
+  KeyStr->Context = Binary->getExpandedContextStr(CallStack);
+  KeyStr->genHashCode();
+  auto Ret =
+  CtxCounterMap->emplace(Hashable(KeyStr), SampleCounter());
+  return Ret.first->second;
+}
+
 void VirtualUnwinder::recordRangeCount(uint64_t Start, uint64_t End,
UnwindState &State, uint64_t Repeat) {
-  std::string &&ContextId = State.getExpandedContextStr();
   uint64_t StartOffset = State.getBinary()->virtualAddrToOffset(Start);
   uint64_t EndOffset = State.getBinary()->virtualAddrToOffset(End);
-  SampleCounters->recordRangeCount(ContextId, StartOffset, EndOffset, Repeat);
+  SampleCounter &SCounter =
+  getOrCreateSampleCounter(State.getBinary(), State.CallStack);
+  SCounter.recordRangeCount(StartOffset, EndOffset, Repeat);
 }
 
 void VirtualUnwinder::recordBranchCount(const LBREntry &Branch,
 UnwindState &State, uint64_t Repeat) {
   if (Branch.IsArtificial)
 return;
-  std::string &&ContextId = State.getExpandedContextStr();
   uint64_t SourceOffset = 
State.getBinary()->virtualAddrToOffset(Branch.Source);
   uint64_t TargetOffset = 
State.getBinary()->virtualAddrToOffset(Branch.Target);
-  SampleCounters->recordBranchCount(ContextId, SourceOffset, TargetOffset,
-Repeat);
+  SampleCounter &SCounter =
+  getOrCreateSampleCounter(State.getBinary(), State.CallStack);
+  SCounter.recordBranchCount(SourceOffset, TargetOffset, Repeat);
 }
 
-bool VirtualUnwinder::unwind(const HybridSample &Sample, uint64_t Repeat) {
+bool VirtualUnwinder::unwind(const HybridSample *Sample, uint64_t Repeat) {
   // Capture initial state

[llvm-branch-commits] [llvm] c681400 - [CSSPGO][llvm-profgen] Virtual unwinding with pseudo probe

2021-01-13 Thread via llvm-branch-commits


Author: wlei
Date: 2021-01-13T11:02:58-08:00
New Revision: c681400b25a66ae56b74cc1f11ffdc15190a65b8

URL: 
https://github.com/llvm/llvm-project/commit/c681400b25a66ae56b74cc1f11ffdc15190a65b8
DIFF: 
https://github.com/llvm/llvm-project/commit/c681400b25a66ae56b74cc1f11ffdc15190a65b8.diff

LOG: [CSSPGO][llvm-profgen] Virtual unwinding with pseudo probe

This change extends virtual unwinder to support pseudo probe in llvm-profgen. 
Please refer https://groups.google.com/g/llvm-dev/c/1p1rdYbL93s and 
https://reviews.llvm.org/D89707 for more context about CSSPGO and llvm-profgen.

**Implementation**

- Added `ProbeBasedCtxKey` derived from `ContextKey` for sample counter 
aggregation. As we need string splitting to infer the profile for callee 
function, string based context introduces more string handling overhead, here 
we just use probe pointer based context.
- For linear unwinding, as inline context is encoded in each pseudo probe, we 
don't need to go through each instruction to extract range sharing same 
inliner. So just record the range for the context.
- For probe based context, we should ignore the top frame probe since it will 
be extracted from the address range. we defer the extraction in 
`ProfileGeneration`.
- Added `PseudoProbeProfileGenerator` for pseudo probe based profile generation.
- Some helper function to get pseduo probe info(call probe, inline context) 
from profiled binary.
- Added regression test for unwinder's output

The pseudo probe based profile generation will be in the upcoming patch.

Test Plan:

ninja & ninja check-llvm

Differential Revision: https://reviews.llvm.org/D92896

Added: 
llvm/test/tools/llvm-profgen/Inputs/inline-cs-pseudoprobe.perfscript
llvm/test/tools/llvm-profgen/Inputs/noinline-cs-pseudoprobe.perfbin
llvm/test/tools/llvm-profgen/Inputs/noinline-cs-pseudoprobe.perfscript
llvm/test/tools/llvm-profgen/inline-cs-pseudoprobe.test
llvm/test/tools/llvm-profgen/noinline-cs-pseudoprobe.test

Modified: 
llvm/test/tools/llvm-profgen/Inputs/inline-cs-noprobe.perfscript
llvm/test/tools/llvm-profgen/Inputs/noinline-cs-noprobe.perfscript
llvm/tools/llvm-profgen/PerfReader.cpp
llvm/tools/llvm-profgen/PerfReader.h
llvm/tools/llvm-profgen/ProfileGenerator.cpp
llvm/tools/llvm-profgen/ProfileGenerator.h
llvm/tools/llvm-profgen/ProfiledBinary.cpp
llvm/tools/llvm-profgen/ProfiledBinary.h
llvm/tools/llvm-profgen/PseudoProbe.cpp
llvm/tools/llvm-profgen/PseudoProbe.h

Removed: 




diff  --git a/llvm/test/tools/llvm-profgen/Inputs/inline-cs-noprobe.perfscript 
b/llvm/test/tools/llvm-profgen/Inputs/inline-cs-noprobe.perfscript
index 38f74549676b..7ef76dcd3884 100644
--- a/llvm/test/tools/llvm-profgen/Inputs/inline-cs-noprobe.perfscript
+++ b/llvm/test/tools/llvm-profgen/Inputs/inline-cs-noprobe.perfscript
@@ -1,4 +1,3 @@
-Using perf wrapper that supports hot-text. Try perf.real if you encounter any 
issues.
 PERF_RECORD_MMAP2 2854748/2854748: [0x40(0x1000) @ 0 00:1d 123291722 
526021]: r-xp /home/inline-cs-noprobe.perfbin
 
 

diff  --git 
a/llvm/test/tools/llvm-profgen/Inputs/inline-cs-pseudoprobe.perfscript 
b/llvm/test/tools/llvm-profgen/Inputs/inline-cs-pseudoprobe.perfscript
new file mode 100644
index ..11e3e07b66e8
--- /dev/null
+++ b/llvm/test/tools/llvm-profgen/Inputs/inline-cs-pseudoprobe.perfscript
@@ -0,0 +1,5 @@
+PERF_RECORD_MMAP2 595196/595196: [0x201000(0x1000) @ 0 00:1d 224227621 
1042948]: r-xp /home/inline-cs-pseudoprobe.perfbin
+
+ 20180e
+   5541f689495641d7
+ 0x201858/0x20180e/P/-/-/0  0x201858/0x20180e/P/-/-/0  
0x201858/0x20180e/P/-/-/0  0x201858/0x20180e/P/-/-/0  0x201858/0x20180e/P/-/-/0 
 0x201858/0x20180e/P/-/-/0  0x201858/0x20180e/P/-/-/0  
0x201858/0x20180e/P/-/-/0  0x201858/0x20180e/P/-/-/0  0x201858/0x20180e/P/-/-/0 
 0x201858/0x20180e/P/-/-/0  0x20182b/0x201800/M/-/-/0  
0x201858/0x20180e/P/-/-/0  0x201858/0x20180e/P/-/-/0  0x201858/0x20180e/P/-/-/0 
 0x201858/0x20180e/P/-/-/0

diff  --git 
a/llvm/test/tools/llvm-profgen/Inputs/noinline-cs-noprobe.perfscript 
b/llvm/test/tools/llvm-profgen/Inputs/noinline-cs-noprobe.perfscript
index a1a4ca9f9342..0dbe83d464d1 100644
--- a/llvm/test/tools/llvm-profgen/Inputs/noinline-cs-noprobe.perfscript
+++ b/llvm/test/tools/llvm-profgen/Inputs/noinline-cs-noprobe.perfscript
@@ -1,4 +1,3 @@
-Using perf wrapper that supports hot-text. Try perf.real if you encounter any 
issues.
 PERF_RECORD_MMAP2 2854748/2854748: [0x40(0x1000) @ 0 00:1d 123291722 
526021]: r-xp /home/noinline-cs-noprobe.perfbin
 
  4005dc

diff  --git 
a/llvm/test/tools/llvm-profgen/Inputs/noinline-cs-pseudoprobe.perfbin 
b/llvm/test/tools/llvm-profgen/Inputs/noinline-cs-pseudoprobe.perfbin
new file mode 100755
index ..6b96f792d0c2
Binary files /dev/null and 
b/llvm/test/tools/llvm-profgen/Inputs/noinline-cs-pseudoprobe.perfbin 
diff er

diff

[llvm-branch-commits] [llvm] 33a8466 - [NFC] fix missing SectionName declaration

2021-01-13 Thread via llvm-branch-commits


Author: wlei
Date: 2021-01-13T11:30:09-08:00
New Revision: 33a8466531e68698dc735a0a8dcb97eb41b35ba6

URL: 
https://github.com/llvm/llvm-project/commit/33a8466531e68698dc735a0a8dcb97eb41b35ba6
DIFF: 
https://github.com/llvm/llvm-project/commit/33a8466531e68698dc735a0a8dcb97eb41b35ba6.diff

LOG: [NFC] fix missing SectionName declaration

Added: 


Modified: 
llvm/tools/llvm-profgen/PseudoProbe.h

Removed: 




diff  --git a/llvm/tools/llvm-profgen/PseudoProbe.h 
b/llvm/tools/llvm-profgen/PseudoProbe.h
index de4857088a73..25769cad8805 100644
--- a/llvm/tools/llvm-profgen/PseudoProbe.h
+++ b/llvm/tools/llvm-profgen/PseudoProbe.h
@@ -178,10 +178,8 @@ class PseudoProbeDecoder {
   /// Points to the end of the buffer.
   const uint8_t *End = nullptr;
 
-#ifndef NDEBUG
   /// SectionName used for debug
   std::string SectionName;
-#endif
 
   // Decoding helper function
   template  T readUnencodedNumber();



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[llvm-branch-commits] [mlir] 3bd620d - [mlir] Correct 2 places that result in corrupted conversion rollbacks

2021-01-13 Thread Tres Popp via llvm-branch-commits


Author: Tres Popp
Date: 2021-01-13T20:31:15+01:00
New Revision: 3bd620d4504915615b8368b20eb9e5c34f3fb779

URL: 
https://github.com/llvm/llvm-project/commit/3bd620d4504915615b8368b20eb9e5c34f3fb779
DIFF: 
https://github.com/llvm/llvm-project/commit/3bd620d4504915615b8368b20eb9e5c34f3fb779.diff

LOG: [mlir] Correct 2 places that result in corrupted conversion rollbacks

This corrects the last 2 issues caught by tests when causing dialect
conversion rollbacks to occur.

Differential Revision: https://reviews.llvm.org/D94623

Added: 


Modified: 
mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
mlir/lib/Transforms/Utils/DialectConversion.cpp

Removed: 




diff  --git a/mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp 
b/mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
index b895c904d623..0e0d568c3440 100644
--- a/mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
+++ b/mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
@@ -2144,7 +2144,7 @@ Value mlir::LLVM::createGlobalString(Location loc, 
OpBuilder &builder,
   assert(module && "builder points to an op outside of a module");
 
   // Create the global at the entry of the module.
-  OpBuilder moduleBuilder(module.getBodyRegion());
+  OpBuilder moduleBuilder(module.getBodyRegion(), builder.getListener());
   MLIRContext *ctx = builder.getContext();
   auto type = LLVM::LLVMArrayType::get(IntegerType::get(ctx, 8), value.size());
   auto global = moduleBuilder.create(

diff  --git a/mlir/lib/Transforms/Utils/DialectConversion.cpp 
b/mlir/lib/Transforms/Utils/DialectConversion.cpp
index 33101a4102dd..f1fa1e250610 100644
--- a/mlir/lib/Transforms/Utils/DialectConversion.cpp
+++ b/mlir/lib/Transforms/Utils/DialectConversion.cpp
@@ -849,6 +849,7 @@ static void detachNestedAndErase(Operation *op) {
   block.dropAllDefinedValueUses();
 }
   }
+  op->dropAllUses();
   op->erase();
 }
 



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[llvm-branch-commits] [lld] e7a371f - [LLD][COFF] Avoid std::vector resizes during type merging

2021-01-13 Thread Alexandre Ganea via llvm-branch-commits


Author: Alexandre Ganea
Date: 2021-01-13T14:35:03-05:00
New Revision: e7a371f9fd0076c187f4cd1a9c7546867faeb19b

URL: 
https://github.com/llvm/llvm-project/commit/e7a371f9fd0076c187f4cd1a9c7546867faeb19b
DIFF: 
https://github.com/llvm/llvm-project/commit/e7a371f9fd0076c187f4cd1a9c7546867faeb19b.diff

LOG: [LLD][COFF] Avoid std::vector resizes during type merging

Consistently saves approx. 0.6 sec (out of 18 sec) on a large output (400 MB 
EXE, 2 GB PDB).

Differential Revision: https://reviews.llvm.org/D94555

Added: 


Modified: 
lld/COFF/DebugTypes.cpp

Removed: 




diff  --git a/lld/COFF/DebugTypes.cpp b/lld/COFF/DebugTypes.cpp
index 52c24aaf214f..fedcb054540f 100644
--- a/lld/COFF/DebugTypes.cpp
+++ b/lld/COFF/DebugTypes.cpp
@@ -679,6 +679,26 @@ void TpiSource::mergeUniqueTypeRecords(ArrayRef 
typeRecords,
   auto nextUniqueIndex = uniqueTypes.begin();
   assert(mergedTpi.recs.empty());
   assert(mergedIpi.recs.empty());
+
+  // Pre-compute the number of elements in advance to avoid std::vector 
resizes.
+  unsigned nbTpiRecs = 0;
+  unsigned nbIpiRecs = 0;
+  forEachTypeChecked(typeRecords, [&](const CVType &ty) {
+if (nextUniqueIndex != uniqueTypes.end() &&
+*nextUniqueIndex == ghashIndex) {
+  assert(ty.length() <= codeview::MaxRecordLength);
+  size_t newSize = alignTo(ty.length(), 4);
+  (isIdRecord(ty.kind()) ? nbIpiRecs : nbTpiRecs) += newSize;
+  ++nextUniqueIndex;
+}
+++ghashIndex;
+  });
+  mergedTpi.recs.reserve(nbTpiRecs);
+  mergedIpi.recs.reserve(nbIpiRecs);
+
+  // Do the actual type merge.
+  ghashIndex = 0;
+  nextUniqueIndex = uniqueTypes.begin();
   forEachTypeChecked(typeRecords, [&](const CVType &ty) {
 if (nextUniqueIndex != uniqueTypes.end() &&
 *nextUniqueIndex == ghashIndex) {



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[llvm-branch-commits] [llvm] bb72adc - [NFC] Use correct ssa.copy spelling when referring to the intrinsic

2021-01-13 Thread Jeroen Dobbelaere via llvm-branch-commits


Author: Jeroen Dobbelaere
Date: 2021-01-13T20:43:14+01:00
New Revision: bb72adcaee7db0877e1cecb29d414003bf19ce02

URL: 
https://github.com/llvm/llvm-project/commit/bb72adcaee7db0877e1cecb29d414003bf19ce02
DIFF: 
https://github.com/llvm/llvm-project/commit/bb72adcaee7db0877e1cecb29d414003bf19ce02.diff

LOG: [NFC] Use correct ssa.copy spelling when referring to the intrinsic

Split out from D91250. Fixes wrong ssa_copy naming.

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D94310

Added: 


Modified: 
llvm/docs/LangRef.rst

Removed: 




diff  --git a/llvm/docs/LangRef.rst b/llvm/docs/LangRef.rst
index 854c72191da2..5a4c652c3603 100644
--- a/llvm/docs/LangRef.rst
+++ b/llvm/docs/LangRef.rst
@@ -20063,7 +20063,7 @@ optimizer.
 
 .. _int_ssa_copy:
 
-'``llvm.ssa_copy``' Intrinsic
+'``llvm.ssa.copy``' Intrinsic
 ^^^
 
 Syntax:
@@ -20071,7 +20071,7 @@ Syntax:
 
 ::
 
-  declare type @llvm.ssa_copy(type %operand) returned(1) readnone
+  declare type @llvm.ssa.copy(type %operand) returned(1) readnone
 
 Arguments:
 ""
@@ -20081,7 +20081,7 @@ The first argument is an operand which is used as the 
returned value.
 Overview:
 ""
 
-The ``llvm.ssa_copy`` intrinsic can be used to attach information to
+The ``llvm.ssa.copy`` intrinsic can be used to attach information to
 operations by copying them and giving them new names.  For example,
 the PredicateInfo utility uses it to build Extended SSA form, and
 attach various forms of information to operands that dominate specific



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[llvm-branch-commits] [mlir] f4f158b - [mlir][sparse] add vectorization strategies to sparse compiler

2021-01-13 Thread Aart Bik via llvm-branch-commits


Author: Aart Bik
Date: 2021-01-13T11:55:23-08:00
New Revision: f4f158b2f89e16ee7068d6292d2d46457d6932bb

URL: 
https://github.com/llvm/llvm-project/commit/f4f158b2f89e16ee7068d6292d2d46457d6932bb
DIFF: 
https://github.com/llvm/llvm-project/commit/f4f158b2f89e16ee7068d6292d2d46457d6932bb.diff

LOG: [mlir][sparse] add vectorization strategies to sparse compiler

Similar to the parallelization strategies, the vectorization strategies
provide control on what loops should be vectorize. Unlike the parallel
strategies, only innermost loops are considered, but including reductions,
with the control of vectorizing dense loops only or dense and sparse loops.

The vectorized loops are always controlled by a vector mask to avoid
overrunning the iterations, but subsequent vector operation folding removes
redundant masks and replaces the operations with more efficient counterparts.
Similarly, we will rely on subsequent loop optimizations to further optimize
masking, e.g. using an unconditional full vector loop and scalar cleanup loop.

The current strategy already demonstrates a nice interaction between the
sparse compiler and all prior optimizations that went into the vector dialect.

Ongoing discussion at:
https://llvm.discourse.group/t/mlir-support-for-sparse-tensors/2020/10

Reviewed By: penpornk

Differential Revision: https://reviews.llvm.org/D94551

Added: 
mlir/test/Dialect/Linalg/sparse_vector.mlir

Modified: 
mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
mlir/lib/Dialect/Linalg/Transforms/Sparsification.cpp
mlir/test/lib/Transforms/TestSparsification.cpp

Removed: 




diff  --git a/mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h 
b/mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
index de1658f96a87..0effa2f45c20 100644
--- a/mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
+++ b/mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
@@ -867,7 +867,13 @@ struct SparsificationOptions {
 SparseVectorizationStrategy v, unsigned vl,
 SparseIntType pt, SparseIntType it)
   : parallelizationStrategy(p), vectorizationStrategy(v), vectorLength(vl),
-ptrType(pt), indType(it) {}
+ptrType(pt), indType(it) {
+// TODO: remove restriction when vectors with index elements are supported
+assert((v != SparseVectorizationStrategy::kAnyStorageInnerLoop ||
+(ptrType != SparseIntType::kNative &&
+ indType != SparseIntType::kNative)) &&
+   "This combination requires support for vectors with index 
elements");
+  }
   SparsificationOptions()
   : SparsificationOptions(SparseParallelizationStrategy::kNone,
   SparseVectorizationStrategy::kNone, 1u,

diff  --git a/mlir/lib/Dialect/Linalg/Transforms/Sparsification.cpp 
b/mlir/lib/Dialect/Linalg/Transforms/Sparsification.cpp
index dbf8d5ffcb8c..7ba0a2f63071 100644
--- a/mlir/lib/Dialect/Linalg/Transforms/Sparsification.cpp
+++ b/mlir/lib/Dialect/Linalg/Transforms/Sparsification.cpp
@@ -46,6 +46,7 @@
 #include "mlir/Dialect/Linalg/Utils/Utils.h"
 #include "mlir/Dialect/SCF/SCF.h"
 #include "mlir/Dialect/StandardOps/IR/Ops.h"
+#include "mlir/IR/Matchers.h"
 
 using namespace mlir;
 
@@ -301,7 +302,8 @@ struct CodeGen {
 indices(numTensors, std::vector(numLoops)),
 highs(numTensors, std::vector(numLoops)),
 pidxs(numTensors, std::vector(numLoops)),
-idxs(numTensors, std::vector(numLoops)), redExp(-1u), redVal() 
{}
+idxs(numTensors, std::vector(numLoops)), redExp(-1u), redVal(),
+curVecLength(1), curVecMask() {}
   /// Sparsification options.
   linalg::SparsificationOptions options;
   /// Universal dense indices and upper bounds (by index). The loops array
@@ -327,6 +329,9 @@ struct CodeGen {
   // is most effective; we could generalize to more outer and while-loops.
   unsigned redExp;
   Value redVal;
+  // Current vector length and mask.
+  unsigned curVecLength;
+  Value curVecMask;
 };
 
 } // namespace
@@ -558,6 +563,71 @@ static void genBuffers(Merger &merger, CodeGen &codegen,
   }
 }
 
+/// Constructs vector type from pointer.
+static VectorType vectorType(CodeGen &codegen, Value ptr) {
+  Type etp = ptr.getType().cast().getElementType();
+  return VectorType::get(codegen.curVecLength, etp);
+}
+
+/// Constructs vector iteration mask.
+static Value genVectorMask(CodeGen &codegen, PatternRewriter &rewriter,
+   Value iv, Value lo, Value hi, Value step) {
+  Location loc = iv.getLoc();
+  VectorType mtp =
+  VectorType::get(codegen.curVecLength, rewriter.getIntegerType(1));
+  // Special case if the vector length evenly divides the trip count (for
+  // example, "for i = 0, 128, 16"). A constant all-true mask is generated
+  // so that all subsequent masked memory operations are immediately folded
+  // into unconditional memory op

[llvm-branch-commits] [llvm] 01c3135 - [LTO] Add test for freestanding LTO option.

2021-01-13 Thread Florian Hahn via llvm-branch-commits


Author: Florian Hahn
Date: 2021-01-13T20:43:22Z
New Revision: 01c3135850d15c8dce9374eec26dc2d555a87b7f

URL: 
https://github.com/llvm/llvm-project/commit/01c3135850d15c8dce9374eec26dc2d555a87b7f
DIFF: 
https://github.com/llvm/llvm-project/commit/01c3135850d15c8dce9374eec26dc2d555a87b7f.diff

LOG: [LTO] Add test for freestanding LTO option.

This patch adds a test for the -lto-freestanding option, similar to
llvm/test/ThinLTO/X86/tli-nobuiltin.ll.

Added: 
llvm/test/LTO/X86/tli-nobuiltin.ll

Modified: 


Removed: 




diff  --git a/llvm/test/LTO/X86/tli-nobuiltin.ll 
b/llvm/test/LTO/X86/tli-nobuiltin.ll
new file mode 100644
index ..4f6b3ef63f48
--- /dev/null
+++ b/llvm/test/LTO/X86/tli-nobuiltin.ll
@@ -0,0 +1,31 @@
+; Test -lto-freestanding option for libLTO.
+; RUN: llvm-as < %s > %t.bc
+
+; Regular run: expects fprintf to be turned into fwrite
+; RUN: llvm-lto %t.bc -exported-symbol=_foo -o %t.o
+; RUN: llvm-nm %t.o | FileCheck %s --check-prefix=LTO
+; LTO: fwrite
+
+; Freestanding run: expects fprintf to NOT be turned into fwrite
+; RUN: llvm-lto %t.bc -lto-freestanding -exported-symbol=_foo -o %t.o
+; RUN: llvm-nm %t.o | FileCheck %s --check-prefix=LTO-FREESTANDING
+; LTO-FREESTANDING: fprintf
+
+target datalayout = 
"e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-apple-macosx10.11.0"
+
+declare i32 @fprintf(%FILE*, i8*, ...)
+
+%FILE = type { }
+
+@hello_world = constant [13 x i8] c"hello world\0A\00"
+@percent_s = constant [3 x i8] c"%s\00"
+
+; Check fprintf(fp, "%s", str) -> fwrite(str, fp) only when builtins are 
enabled
+
+define void @foo(%FILE* %fp) {
+  %fmt = getelementptr [3 x i8], [3 x i8]* @percent_s, i32 0, i32 0
+  %str = getelementptr [13 x i8], [13 x i8]* @hello_world, i32 0, i32 0
+  call i32 (%FILE*, i8*, ...) @fprintf(%FILE* %fp, i8* %fmt, i8* %str)
+  ret void
+}



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[llvm-branch-commits] [flang] 18278ff - [flang] Fix accessibility of USEd name in .mod file

2021-01-13 Thread Tim Keith via llvm-branch-commits


Author: Tim Keith
Date: 2021-01-13T12:52:44-08:00
New Revision: 18278ff1aac47d9bffa0231c74277ffc89def13e

URL: 
https://github.com/llvm/llvm-project/commit/18278ff1aac47d9bffa0231c74277ffc89def13e
DIFF: 
https://github.com/llvm/llvm-project/commit/18278ff1aac47d9bffa0231c74277ffc89def13e.diff

LOG: [flang] Fix accessibility of USEd name in .mod file

If a module specifies default private accessibility, names that have
been use-associated are private by default. This was not reflected in
.mod files.

Differential Revision: https://reviews.llvm.org/D94602

Added: 


Modified: 
flang/lib/Semantics/mod-file.cpp
flang/test/Semantics/modfile03.f90

Removed: 




diff  --git a/flang/lib/Semantics/mod-file.cpp 
b/flang/lib/Semantics/mod-file.cpp
index f8e5889e4698..23733f944d8c 100644
--- a/flang/lib/Semantics/mod-file.cpp
+++ b/flang/lib/Semantics/mod-file.cpp
@@ -427,6 +427,7 @@ void ModFileWriter::PutUse(const Symbol &symbol) {
 PutGenericName(uses_ << "=>", use);
   }
   uses_ << '\n';
+  PutUseExtraAttr(Attr::PRIVATE, symbol, use);
   PutUseExtraAttr(Attr::VOLATILE, symbol, use);
   PutUseExtraAttr(Attr::ASYNCHRONOUS, symbol, use);
 }

diff  --git a/flang/test/Semantics/modfile03.f90 
b/flang/test/Semantics/modfile03.f90
index 9bdb35695f03..a4b21c8287f5 100644
--- a/flang/test/Semantics/modfile03.f90
+++ b/flang/test/Semantics/modfile03.f90
@@ -158,3 +158,21 @@ subroutine s(x)
 !  end
 ! end interface
 !end
+
+module m7a
+  real :: x
+end
+!Expect: m7a.mod
+!module m7a
+! real(4)::x
+!end
+
+module m7b
+  use m7a
+  private
+end
+!Expect: m7b.mod
+!module m7b
+! use m7a,only:x
+! private::x
+!end



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[llvm-branch-commits] [libc] 4cfccd5 - [libc][NFC] add macro for fuchsia to switch test backend to zxtest

2021-01-13 Thread Michael Jones via llvm-branch-commits


Author: Michael Jones
Date: 2021-01-13T21:28:02Z
New Revision: 4cfccd51335139871cad03ac451a2d27ebfe7761

URL: 
https://github.com/llvm/llvm-project/commit/4cfccd51335139871cad03ac451a2d27ebfe7761
DIFF: 
https://github.com/llvm/llvm-project/commit/4cfccd51335139871cad03ac451a2d27ebfe7761.diff

LOG: [libc][NFC] add macro for fuchsia to switch test backend to zxtest

This moves utils/UnitTest/Test.[h/cpp] to LibcTest.[h/cpp] and adds a
new Test.h that acts as a switcher so that Fuchsia can use the zxtest
backend for running our tests as part of their build.

FuchsiaTest.h is for including fuchsia's zxtest library and anything
else needed to make the tests work under fuchsia (currently just
undefining the isascii macro for the test).

Downstream users, please fix your build instead of reverting.

Reviewed By: sivachandra

Differential Revision: https://reviews.llvm.org/D94625

Added: 
libc/utils/UnitTest/FuchsiaTest.h
libc/utils/UnitTest/LibcTest.cpp
libc/utils/UnitTest/LibcTest.h

Modified: 
libc/utils/UnitTest/CMakeLists.txt
libc/utils/UnitTest/Test.h

Removed: 
libc/utils/UnitTest/Test.cpp



diff  --git a/libc/utils/UnitTest/CMakeLists.txt 
b/libc/utils/UnitTest/CMakeLists.txt
index 1c9753e62a59..5ab41125017c 100644
--- a/libc/utils/UnitTest/CMakeLists.txt
+++ b/libc/utils/UnitTest/CMakeLists.txt
@@ -1,7 +1,8 @@
 add_llvm_library(
   LibcUnitTest
-  Test.cpp
   Test.h
+  LibcTest.cpp
+  LibcTest.h
 )
 target_include_directories(LibcUnitTest PUBLIC ${LIBC_SOURCE_DIR})
 add_dependencies(LibcUnitTest libc.utils.CPP.standalone_cpp)

diff  --git a/libc/utils/UnitTest/FuchsiaTest.h 
b/libc/utils/UnitTest/FuchsiaTest.h
new file mode 100644
index ..0a19a986fb5a
--- /dev/null
+++ b/libc/utils/UnitTest/FuchsiaTest.h
@@ -0,0 +1,20 @@
+//===-- Header for setting up the Fuchsia tests -*- C++ 
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef LLVM_LIBC_UTILS_UNITTEST_FUCHSIATEST_H
+#define LLVM_LIBC_UTILS_UNITTEST_FUCHSIATEST_H
+
+#include 
+// isascii is being undef'd because Fuchsia's headers define a macro for
+// isascii. that macro causes errors when isascii_test.cpp references
+// __llvm_libc::isascii since the macro is applied first.
+#ifdef isascii
+#undef isascii
+#endif
+
+#endif // LLVM_LIBC_UTILS_UNITTEST_FUCHSIATEST_H

diff  --git a/libc/utils/UnitTest/Test.cpp b/libc/utils/UnitTest/LibcTest.cpp
similarity index 99%
rename from libc/utils/UnitTest/Test.cpp
rename to libc/utils/UnitTest/LibcTest.cpp
index 2f1e3b2a1ad9..a8e32d17dd7c 100644
--- a/libc/utils/UnitTest/Test.cpp
+++ b/libc/utils/UnitTest/LibcTest.cpp
@@ -6,7 +6,7 @@
 //
 
//===--===//
 
-#include "Test.h"
+#include "LibcTest.h"
 
 #include "utils/testutils/ExecuteFunction.h"
 #include 

diff  --git a/libc/utils/UnitTest/LibcTest.h b/libc/utils/UnitTest/LibcTest.h
new file mode 100644
index ..059310570832
--- /dev/null
+++ b/libc/utils/UnitTest/LibcTest.h
@@ -0,0 +1,260 @@
+//===-- Base class for libc unittests ---*- C++ 
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+
+#ifndef LLVM_LIBC_UTILS_UNITTEST_LIBCTEST_H
+#define LLVM_LIBC_UTILS_UNITTEST_LIBCTEST_H
+
+// This file can only include headers from utils/CPP/ or utils/testutils. No
+// other headers should be included.
+
+#include "utils/CPP/TypeTraits.h"
+#include "utils/testutils/ExecuteFunction.h"
+#include "utils/testutils/StreamWrapper.h"
+
+namespace __llvm_libc {
+namespace testing {
+
+class RunContext;
+
+// Only the following conditions are supported. Notice that we do not have
+// a TRUE or FALSE condition. That is because, C library funtions do not
+// return boolean values, but use integral return values to indicate true or
+// false conditions. Hence, it is more appropriate to use the other comparison
+// conditions for such cases.
+enum TestCondition {
+  Cond_None,
+  Cond_EQ,
+  Cond_NE,
+  Cond_LT,
+  Cond_LE,
+  Cond_GT,
+  Cond_GE,
+};
+
+namespace internal {
+
+template 
+bool test(RunContext *Ctx, TestCondition Cond, ValType LHS, ValType RHS,
+  const char *LHSStr, const char *RHSStr, const char *File,
+  unsigned long Line);
+
+} // namespace internal
+
+struct MatcherBase {
+  virtual ~MatcherBase() {}
+  virtual void explainError(testutils::StreamWrapper &OS) {
+OS << "unknown error\n";
+  }
+};
+
+templa

[llvm-branch-commits] [clang-tools-extra] fb98a1b - Fix the warnings on unused variables (NFC)

2021-01-13 Thread Kazu Hirata via llvm-branch-commits


Author: Kazu Hirata
Date: 2021-01-13T13:32:40-08:00
New Revision: fb98a1be43645c87fff089c4cc9555ca2400268c

URL: 
https://github.com/llvm/llvm-project/commit/fb98a1be43645c87fff089c4cc9555ca2400268c
DIFF: 
https://github.com/llvm/llvm-project/commit/fb98a1be43645c87fff089c4cc9555ca2400268c.diff

LOG: Fix the warnings on unused variables (NFC)

Added: 


Modified: 
clang-tools-extra/clangd/AST.cpp
lld/MachO/InputSection.cpp
llvm/lib/Transforms/Coroutines/CoroFrame.cpp

Removed: 




diff  --git a/clang-tools-extra/clangd/AST.cpp 
b/clang-tools-extra/clangd/AST.cpp
index 8af4cbb19a3d..aecaf7e6b8f7 100644
--- a/clang-tools-extra/clangd/AST.cpp
+++ b/clang-tools-extra/clangd/AST.cpp
@@ -116,6 +116,7 @@ getQualification(ASTContext &Context, const DeclContext 
*DestContext,
 if (auto *TD = llvm::dyn_cast(CurContext)) {
   // There can't be any more tag parents after hitting a namespace.
   assert(!ReachedNS);
+  (void)ReachedNS;
   NNS = NestedNameSpecifier::Create(Context, nullptr, false,
 TD->getTypeForDecl());
 } else {

diff  --git a/lld/MachO/InputSection.cpp b/lld/MachO/InputSection.cpp
index 4cb322a058f9..9287d49dae3c 100644
--- a/lld/MachO/InputSection.cpp
+++ b/lld/MachO/InputSection.cpp
@@ -50,7 +50,7 @@ void InputSection::writeTo(uint8_t *buf) {
 // relative to the start of the thread-local data memory area, which
 // is initialized via copying all the TLV data sections (which are all
 // contiguous).
-if (auto *defined = dyn_cast(referentSym))
+if (isa(referentSym))
   referentVA -= firstTLVDataSection->addr;
   }
 } else if (auto *referentIsec = r.referent.dyn_cast()) {

diff  --git a/llvm/lib/Transforms/Coroutines/CoroFrame.cpp 
b/llvm/lib/Transforms/Coroutines/CoroFrame.cpp
index 4823eea4154f..84b78fce3f44 100644
--- a/llvm/lib/Transforms/Coroutines/CoroFrame.cpp
+++ b/llvm/lib/Transforms/Coroutines/CoroFrame.cpp
@@ -1538,6 +1538,7 @@ static void rewritePHIs(BasicBlock &BB) {
 // CleanupPad with a CatchSwitch predecessor: therefore this is an
 // unwind destination that needs to be handle specially.
 assert(CS->getUnwindDest() == &BB);
+(void)CS;
 rewritePHIsForCleanupPad(&BB, CleanupPad);
 return;
   }



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[llvm-branch-commits] [llvm] f711cb9 - [FuncAttrs] Add additional willreturn tests (NFC)

2021-01-13 Thread Nikita Popov via llvm-branch-commits


Author: Nikita Popov
Date: 2021-01-13T22:33:22+01:00
New Revision: f711cb9a8ad9fe80dd9f1844dbe15c0e7edb1450

URL: 
https://github.com/llvm/llvm-project/commit/f711cb9a8ad9fe80dd9f1844dbe15c0e7edb1450
DIFF: 
https://github.com/llvm/llvm-project/commit/f711cb9a8ad9fe80dd9f1844dbe15c0e7edb1450.diff

LOG: [FuncAttrs] Add additional willreturn tests (NFC)

Added: 


Modified: 
llvm/test/Transforms/FunctionAttrs/willreturn.ll

Removed: 




diff  --git a/llvm/test/Transforms/FunctionAttrs/willreturn.ll 
b/llvm/test/Transforms/FunctionAttrs/willreturn.ll
index d92151c299fe..78233769b45e 100644
--- a/llvm/test/Transforms/FunctionAttrs/willreturn.ll
+++ b/llvm/test/Transforms/FunctionAttrs/willreturn.ll
@@ -16,8 +16,11 @@ define i32 @mustprogress_load(i32* %ptr) mustprogress {
 ; CHECK-NEXT: define i32 @mustprogress_load(
 ;
 entry:
+  br label %while.body
+
+while.body:
   %r = load i32, i32* %ptr
-  ret i32 %r
+  br label %while.body
 }
 
 define void @mustprogress_store(i32* %ptr) mustprogress {
@@ -25,8 +28,11 @@ define void @mustprogress_store(i32* %ptr) mustprogress {
 ; CHECK: define void @mustprogress_store(
 ;
 entry:
+  br label %while.body
+
+while.body:
   store i32 0, i32* %ptr
-  ret void
+  br label %while.body
 }
 
 declare void @unknown_fn()
@@ -65,4 +71,59 @@ B:
   ret i64 0
 }
 
+define void @willreturn_no_loop(i1 %c, i32* %p) {
+; CHECK-NOT: Function Attrs: {{.*}}willreturn
+; CHECK: define void @willreturn_no_loop(
+;
+  br i1 %c, label %if, label %else
+
+if:
+  load atomic i32, i32* %p seq_cst, align 4
+  call void @fn_willreturn()
+  br label %end
+
+else:
+  store atomic i32 0, i32* %p seq_cst, align 4
+  br label %end
+
+end:
+  ret void
+}
+
+define void @willreturn_non_returning_function(i1 %c, i32* %p) {
+; CHECK-NOT: Function Attrs: {{.*}}willreturn
+; CHECK: define void @willreturn_non_returning_function(
+;
+  call void @unknown_fn()
+  ret void
+}
+
+define void @willreturn_loop() {
+; CHECK-NOT: Function Attrs: {{.*}}willreturn
+; CHECK: define void @willreturn_loop(
+;
+  br label %loop
+
+loop:
+  br label %loop
+}
+
+define void @willreturn_finite_loop() {
+; CHECK-NOT: Function Attrs: {{.*}}willreturn
+; CHECK: define void @willreturn_finite_loop(
+;
+entry:
+  br label %loop
+
+loop:
+  %i = phi i32 [ 0, %entry], [ %i.inc, %loop ]
+  %i.inc = add nuw i32 %i, 1
+  %c = icmp ne i32 %i.inc, 100
+  br i1 %c, label %loop, label %end
+
+end:
+  ret void
+}
+
 declare i64 @fn_noread() readnone
+declare void @fn_willreturn() willreturn



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[llvm-branch-commits] [llvm] 6077d55 - [DSE] Add tests with stores of existing values.

2021-01-13 Thread Florian Hahn via llvm-branch-commits


Author: Florian Hahn
Date: 2021-01-13T21:56:21Z
New Revision: 6077d55381a6aa3e947ef7abdc36a7515c598c8a

URL: 
https://github.com/llvm/llvm-project/commit/6077d55381a6aa3e947ef7abdc36a7515c598c8a
DIFF: 
https://github.com/llvm/llvm-project/commit/6077d55381a6aa3e947ef7abdc36a7515c598c8a.diff

LOG: [DSE] Add tests with stores of existing values.

This patch pre-commits test cases with dead stores of
existing values for D90328. It also updates a few tests that had such
stores by accident, to preserve the original spirit of those tests.

Added: 
llvm/test/Transforms/DeadStoreElimination/MSSA/stores-of-existing-values.ll

Modified: 
llvm/test/Transforms/DeadStoreElimination/MSSA/multiblock-loops.ll
llvm/test/Transforms/DeadStoreElimination/MSSA/multiblock-memoryphis.ll
llvm/test/Transforms/DeadStoreElimination/MSSA/multiblock-simple.ll

Removed: 




diff  --git 
a/llvm/test/Transforms/DeadStoreElimination/MSSA/multiblock-loops.ll 
b/llvm/test/Transforms/DeadStoreElimination/MSSA/multiblock-loops.ll
index dc6004bf71d7..9f833b2bd481 100644
--- a/llvm/test/Transforms/DeadStoreElimination/MSSA/multiblock-loops.ll
+++ b/llvm/test/Transforms/DeadStoreElimination/MSSA/multiblock-loops.ll
@@ -183,7 +183,7 @@ define void @loop_multiple_def_uses(i32* noalias %P) {
 ; CHECK-NEXT:[[C1:%.*]] = call i1 @cond()
 ; CHECK-NEXT:br i1 [[C1]], label [[FOR_BODY:%.*]], label [[END:%.*]]
 ; CHECK:   for.body:
-; CHECK-NEXT:store i32 1, i32* [[P]], align 4
+; CHECK-NEXT:store i32 2, i32* [[P]], align 4
 ; CHECK-NEXT:[[LV:%.*]] = load i32, i32* [[P]], align 4
 ; CHECK-NEXT:br label [[FOR_HEADER]]
 ; CHECK:   end:
@@ -199,7 +199,7 @@ for.header:
   br i1 %c1, label %for.body, label %end
 
 for.body:
-  store i32 1, i32* %P, align 4
+  store i32 2, i32* %P, align 4
   %lv = load i32, i32* %P
   br label %for.header
 

diff  --git 
a/llvm/test/Transforms/DeadStoreElimination/MSSA/multiblock-memoryphis.ll 
b/llvm/test/Transforms/DeadStoreElimination/MSSA/multiblock-memoryphis.ll
index 1ad2e71f2d59..b3faafd15b3b 100644
--- a/llvm/test/Transforms/DeadStoreElimination/MSSA/multiblock-memoryphis.ll
+++ b/llvm/test/Transforms/DeadStoreElimination/MSSA/multiblock-memoryphis.ll
@@ -14,7 +14,7 @@ define void @test4(i32* noalias %P) {
 ; CHECK-NEXT:[[X:%.*]] = load i32, i32* [[P]], align 4
 ; CHECK-NEXT:br label [[BB3]]
 ; CHECK:   bb3:
-; CHECK-NEXT:store i32 0, i32* [[P]], align 4
+; CHECK-NEXT:store i32 1, i32* [[P]], align 4
 ; CHECK-NEXT:ret void
 ;
   store i32 0, i32* %P
@@ -25,7 +25,7 @@ bb2:
   %x = load i32, i32* %P
   br label %bb3
 bb3:
-  store i32 0, i32* %P
+  store i32 1, i32* %P
   ret void
 }
 

diff  --git 
a/llvm/test/Transforms/DeadStoreElimination/MSSA/multiblock-simple.ll 
b/llvm/test/Transforms/DeadStoreElimination/MSSA/multiblock-simple.ll
index 334e080bf8db..e30c78e44e02 100644
--- a/llvm/test/Transforms/DeadStoreElimination/MSSA/multiblock-simple.ll
+++ b/llvm/test/Transforms/DeadStoreElimination/MSSA/multiblock-simple.ll
@@ -33,7 +33,7 @@ define void @test3(i32* noalias %P) {
 ; CHECK:   bb1:
 ; CHECK-NEXT:br label [[BB3:%.*]]
 ; CHECK:   bb2:
-; CHECK-NEXT:store i32 0, i32* [[P]], align 4
+; CHECK-NEXT:store i32 1, i32* [[P]], align 4
 ; CHECK-NEXT:br label [[BB3]]
 ; CHECK:   bb3:
 ; CHECK-NEXT:ret void
@@ -43,7 +43,7 @@ define void @test3(i32* noalias %P) {
 bb1:
   br label %bb3
 bb2:
-  store i32 0, i32* %P
+  store i32 1, i32* %P
   br label %bb3
 bb3:
   ret void
@@ -99,7 +99,7 @@ define void @test9(i32* noalias %P) {
 ; CHECK:   bb2:
 ; CHECK-NEXT:ret void
 ; CHECK:   bb3:
-; CHECK-NEXT:store i32 0, i32* [[P]], align 4
+; CHECK-NEXT:store i32 1, i32* [[P]], align 4
 ; CHECK-NEXT:ret void
 ;
   store i32 0, i32* %P
@@ -109,7 +109,7 @@ bb1:
 bb2:
   ret void
 bb3:
-  store i32 0, i32* %P
+  store i32 1, i32* %P
   ret void
 }
 
@@ -153,7 +153,7 @@ define void @test10(i32* %P) {
 ; CHECK-NEXT:store i32 0, i32* [[P:%.*]], align 4
 ; CHECK-NEXT:br i1 true, label [[BB1:%.*]], label [[BB2:%.*]]
 ; CHECK:   bb1:
-; CHECK-NEXT:store i32 0, i32* [[P]], align 4
+; CHECK-NEXT:store i32 1, i32* [[P]], align 4
 ; CHECK-NEXT:br label [[BB3:%.*]]
 ; CHECK:   bb2:
 ; CHECK-NEXT:ret void
@@ -163,7 +163,7 @@ define void @test10(i32* %P) {
   store i32 0, i32* %P
   br i1 true, label %bb1, label %bb2
 bb1:
-  store i32 0, i32* %P
+  store i32 1, i32* %P
   br label %bb3
 bb2:
   ret void

diff  --git 
a/llvm/test/Transforms/DeadStoreElimination/MSSA/stores-of-existing-values.ll 
b/llvm/test/Transforms/DeadStoreElimination/MSSA/stores-of-existing-values.ll
new file mode 100644
index ..77f006a52454
--- /dev/null
+++ 
b/llvm/test/Transforms/DeadStoreElimination/MSSA/stores-of-existing-values.ll
@@ -0,0 +1,284 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks

[llvm-branch-commits] [libc] ea8034e - [libc][NFC] change isblank and iscntrl from implicit casting

2021-01-13 Thread Michael Jones via llvm-branch-commits


Author: Michael Jones
Date: 2021-01-13T22:06:56Z
New Revision: ea8034ec35a9e3d6784d7e6f50617af3d87f6a9f

URL: 
https://github.com/llvm/llvm-project/commit/ea8034ec35a9e3d6784d7e6f50617af3d87f6a9f
DIFF: 
https://github.com/llvm/llvm-project/commit/ea8034ec35a9e3d6784d7e6f50617af3d87f6a9f.diff

LOG: [libc][NFC] change isblank and iscntrl from implicit casting

isblank and iscntrl were casting an int to a char implicitly and this
was throwing errors under Fuchsia. I've added a static cast to resolve
this issue.

Reviewed By: sivachandra

Differential Revision: https://reviews.llvm.org/D94634

Added: 


Modified: 
libc/src/ctype/isblank.cpp
libc/src/ctype/iscntrl.cpp

Removed: 




diff  --git a/libc/src/ctype/isblank.cpp b/libc/src/ctype/isblank.cpp
index b29d19aef2f1..1c3061379b29 100644
--- a/libc/src/ctype/isblank.cpp
+++ b/libc/src/ctype/isblank.cpp
@@ -15,7 +15,7 @@ namespace __llvm_libc {
 // TODO: Currently restricted to default locale.
 // These should be extended using locale information.
 LLVM_LIBC_FUNCTION(int, isblank, (int c)) {
-  const unsigned char ch = c;
+  const unsigned char ch = static_cast(c);
   return ch == ' ' || ch == '\t';
 }
 

diff  --git a/libc/src/ctype/iscntrl.cpp b/libc/src/ctype/iscntrl.cpp
index 8962bcae0a84..b061199c47ec 100644
--- a/libc/src/ctype/iscntrl.cpp
+++ b/libc/src/ctype/iscntrl.cpp
@@ -15,7 +15,7 @@ namespace __llvm_libc {
 // TODO: Currently restricted to default locale.
 // These should be extended using locale information.
 LLVM_LIBC_FUNCTION(int, iscntrl, (int c)) {
-  const unsigned char ch = c;
+  const unsigned char ch = static_cast(c);
   return ch < 0x20 || ch == 0x7f;
 }
 



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[llvm-branch-commits] [clang] 74a42ae - [test] Add Clang side tests for -fdebug-info-for-profiling

2021-01-13 Thread Fangrui Song via llvm-branch-commits


Author: Fangrui Song
Date: 2021-01-13T14:27:39-08:00
New Revision: 74a42aedfe14938e01d128456c76cede2ccbc26c

URL: 
https://github.com/llvm/llvm-project/commit/74a42aedfe14938e01d128456c76cede2ccbc26c
DIFF: 
https://github.com/llvm/llvm-project/commit/74a42aedfe14938e01d128456c76cede2ccbc26c.diff

LOG: [test] Add Clang side tests for -fdebug-info-for-profiling

There is currently a driver test but no test for its effect on linkageName & 
pass pipeline.

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D94381

Added: 
clang/test/CodeGenCXX/fdebug-info-for-profiling.cpp

Modified: 


Removed: 




diff  --git a/clang/test/CodeGenCXX/fdebug-info-for-profiling.cpp 
b/clang/test/CodeGenCXX/fdebug-info-for-profiling.cpp
new file mode 100644
index ..0a66818b23be
--- /dev/null
+++ b/clang/test/CodeGenCXX/fdebug-info-for-profiling.cpp
@@ -0,0 +1,21 @@
+/// Normally -g1 does not add linkageName. -fdebug-info-for-profiling adds 
linkageName.
+// RUN: %clang_cc1 -emit-llvm -triple %itanium_abi_triple 
-debug-info-kind=line-tables-only %s -o - | FileCheck %s --check-prefix=LINE
+// RUN: %clang_cc1 -emit-llvm -triple %itanium_abi_triple 
-debug-info-kind=line-tables-only -fdebug-info-for-profiling %s -o - | 
FileCheck %s
+
+// LINE: = distinct !DISubprogram(name: "foo", scope:
+
+// CHECK: = distinct !DICompileUnit({{.*}}, debugInfoForProfiling: true,
+// CHECK: = distinct !DISubprogram(name: "foo", linkageName: "_Z3foov", scope:
+
+/// Add a DWARF discriminators pass for PGO.
+// RUN: %clang_cc1 -emit-llvm -fno-legacy-pass-manager -fdebug-pass-manager 
-O1 -fprofile-instrument-path=a.profdata %s -o - 2>&1 | FileCheck %s 
--check-prefix=NODISCR
+// RUN: %clang_cc1 -emit-llvm -fno-legacy-pass-manager -fdebug-pass-manager 
-O1 -fprofile-instrument-path=a.profdata -fdebug-info-for-profiling %s -o - 
2>&1 | FileCheck %s --check-prefix=DISCR
+
+// RUN: echo > %t.proftext
+// RUN: llvm-profdata merge %t.proftext -o %t.profdata
+// RUN: %clang_cc1 -emit-llvm -fno-legacy-pass-manager -fdebug-pass-manager 
-O1 -fprofile-instrument-use-path=%t.profdata -fdebug-info-for-profiling %s -o 
- 2>&1 | FileCheck %s --check-prefix=DISCR
+
+// NODISCR-NOT: Running pass: AddDiscriminatorsPass
+// DISCR:   Running pass: AddDiscriminatorsPass on {{.*}}
+
+void foo() {}



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[llvm-branch-commits] [llvm] 35debdf - [NFC] Fix build break by a initializer list converting error

2021-01-13 Thread via llvm-branch-commits


Author: wlei
Date: 2021-01-13T14:28:02-08:00
New Revision: 35debdfcaca10203a67ef3821d272a72d70e0490

URL: 
https://github.com/llvm/llvm-project/commit/35debdfcaca10203a67ef3821d272a72d70e0490
DIFF: 
https://github.com/llvm/llvm-project/commit/35debdfcaca10203a67ef3821d272a72d70e0490.diff

LOG: [NFC] Fix build break by a initializer list converting error

Added: 


Modified: 
llvm/tools/llvm-profgen/PseudoProbe.cpp

Removed: 




diff  --git a/llvm/tools/llvm-profgen/PseudoProbe.cpp 
b/llvm/tools/llvm-profgen/PseudoProbe.cpp
index ae4f7eb08f7b..0b53f1aa02e7 100644
--- a/llvm/tools/llvm-profgen/PseudoProbe.cpp
+++ b/llvm/tools/llvm-profgen/PseudoProbe.cpp
@@ -219,7 +219,7 @@ void PseudoProbeDecoder::buildAddress2ProbeMap(const 
uint8_t *Start,
   Index = readUnsignedNumber();
 }
 // Switch/add to a new tree node(inlinee)
-Cur = Cur->getOrAddNode({Cur->GUID, Index});
+Cur = Cur->getOrAddNode(std::make_tuple(Cur->GUID, Index));
 // Read guid
 Cur->GUID = readUnencodedNumber();
 // Read number of probes in the current node.



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[llvm-branch-commits] [llvm] 82c4153 - Revert "[AsmParser] make .ascii support spaces as separators"

2021-01-13 Thread Jian Cai via llvm-branch-commits


Author: Jian Cai
Date: 2021-01-13T14:38:22-08:00
New Revision: 82c4153e66fa284729da86a8d6c302d4b8cec86c

URL: 
https://github.com/llvm/llvm-project/commit/82c4153e66fa284729da86a8d6c302d4b8cec86c
DIFF: 
https://github.com/llvm/llvm-project/commit/82c4153e66fa284729da86a8d6c302d4b8cec86c.diff

LOG: Revert "[AsmParser] make .ascii support spaces as separators"

This reverts commit e0963ae274be5b071d1e1b00f5e4e019483c09e9. The change
breaks some GDB tests. Revert it while we investigate.

Added: 


Modified: 
llvm/lib/MC/MCParser/AsmParser.cpp
llvm/test/MC/AsmParser/directive_ascii.s

Removed: 




diff  --git a/llvm/lib/MC/MCParser/AsmParser.cpp 
b/llvm/lib/MC/MCParser/AsmParser.cpp
index 98241bc76edf0..42ac0b66ec2ad 100644
--- a/llvm/lib/MC/MCParser/AsmParser.cpp
+++ b/llvm/lib/MC/MCParser/AsmParser.cpp
@@ -3008,20 +3008,13 @@ bool AsmParser::parseAngleBracketString(std::string 
&Data) {
 }
 
 /// parseDirectiveAscii:
-//::= .ascii [ "string"+ ( , "string"+ )* ]
-///   ::= ( .asciz | .string ) [ "string" ( , "string" )* ]
+///   ::= ( .ascii | .asciz | .string ) [ "string" ( , "string" )* ]
 bool AsmParser::parseDirectiveAscii(StringRef IDVal, bool ZeroTerminated) {
   auto parseOp = [&]() -> bool {
 std::string Data;
-if (checkForValidSection())
+if (checkForValidSection() || parseEscapedString(Data))
   return true;
-// Only support spaces as separators for .ascii directive for now. See the
-// discusssion at https://reviews.llvm.org/D91460 for more details
-do {
-  if (parseEscapedString(Data))
-return true;
-  getStreamer().emitBytes(Data);
-} while (!ZeroTerminated && getTok().is(AsmToken::String));
+getStreamer().emitBytes(Data);
 if (ZeroTerminated)
   getStreamer().emitBytes(StringRef("\0", 1));
 return false;

diff  --git a/llvm/test/MC/AsmParser/directive_ascii.s 
b/llvm/test/MC/AsmParser/directive_ascii.s
index e34aa7a8a5618..ea988879819b4 100644
--- a/llvm/test/MC/AsmParser/directive_ascii.s
+++ b/llvm/test/MC/AsmParser/directive_ascii.s
@@ -48,11 +48,3 @@ TEST6:
 TEST7:
 .ascii "\x64\Xa6B"
 .ascii "\xface\x0Fe"
-
-# CHECK-LABEL: TEST8:
-# CHECK-NEXT: .byte 65
-# CHECK-NEXT: .byte 66
-# CHECK-NEXT: .byte 67
-# CHECK-NEXT: .byte 68
-TEST8:
-.ascii "A", "B" "C", "D"



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[llvm-branch-commits] [llvm] 39e6d24 - [NewPM] Only non-trivially loop unswitch at -O3 and for non-optsize functions

2021-01-13 Thread Arthur Eubanks via llvm-branch-commits


Author: Arthur Eubanks
Date: 2021-01-13T14:54:49-08:00
New Revision: 39e6d242378a0b645abbdfc6c02de5ef8dcfb9ed

URL: 
https://github.com/llvm/llvm-project/commit/39e6d242378a0b645abbdfc6c02de5ef8dcfb9ed
DIFF: 
https://github.com/llvm/llvm-project/commit/39e6d242378a0b645abbdfc6c02de5ef8dcfb9ed.diff

LOG: [NewPM] Only non-trivially loop unswitch at -O3 and for non-optsize 
functions

This matches the legacy pipeline/pass.

Reviewed By: asbirlea, SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D94559

Added: 


Modified: 
llvm/lib/Passes/PassBuilder.cpp
llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
llvm/test/Transforms/SimpleLoopUnswitch/ARM/nontrivial-unswitch-cost.ll
llvm/test/Transforms/SimpleLoopUnswitch/pipeline.ll

Removed: 




diff  --git a/llvm/lib/Passes/PassBuilder.cpp b/llvm/lib/Passes/PassBuilder.cpp
index 0d7f442f9ff4..7b2100aef081 100644
--- a/llvm/lib/Passes/PassBuilder.cpp
+++ b/llvm/lib/Passes/PassBuilder.cpp
@@ -724,7 +724,8 @@ 
PassBuilder::buildFunctionSimplificationPipeline(OptimizationLevel Level,
   LPM1.addPass(LoopRotatePass(Level != OptimizationLevel::Oz));
   // TODO: Investigate promotion cap for O1.
   LPM1.addPass(LICMPass(PTO.LicmMssaOptCap, PTO.LicmMssaNoAccForPromotionCap));
-  LPM1.addPass(SimpleLoopUnswitchPass(/* NonTrivial */ true));
+  LPM1.addPass(
+  SimpleLoopUnswitchPass(/* NonTrivial */ Level == OptimizationLevel::O3));
   LPM2.addPass(LoopIdiomRecognizePass());
   LPM2.addPass(IndVarSimplifyPass());
 

diff  --git a/llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp 
b/llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
index 945476a2bdaf..3125f6274848 100644
--- a/llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
+++ b/llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
@@ -2906,6 +2906,10 @@ static bool unswitchLoop(Loop &L, DominatorTree &DT, 
LoopInfo &LI,
   if (!NonTrivial && !EnableNonTrivialUnswitch)
 return false;
 
+  // Skip non-trivial unswitching for optsize functions.
+  if (L.getHeader()->getParent()->hasOptSize())
+return false;
+
   // For non-trivial unswitching, because it often creates new loops, we rely 
on
   // the pass manager to iterate on the loops rather than trying to immediately
   // reach a fixed point. There is no substantial advantage to iterating

diff  --git 
a/llvm/test/Transforms/SimpleLoopUnswitch/ARM/nontrivial-unswitch-cost.ll 
b/llvm/test/Transforms/SimpleLoopUnswitch/ARM/nontrivial-unswitch-cost.ll
index 87f52c01e955..8482adec807c 100644
--- a/llvm/test/Transforms/SimpleLoopUnswitch/ARM/nontrivial-unswitch-cost.ll
+++ b/llvm/test/Transforms/SimpleLoopUnswitch/ARM/nontrivial-unswitch-cost.ll
@@ -111,33 +111,19 @@ loop_exit:
 define void @test_unswitch_minsize(i1* %ptr, i1 %cond) #0 {
 ; CHECK-LABEL: @test_unswitch_minsize(
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:br i1 [[COND:%.*]], label [[ENTRY_SPLIT_US:%.*]], label 
[[ENTRY_SPLIT:%.*]]
-; CHECK:   entry.split.us:
-; CHECK-NEXT:br label [[LOOP_BEGIN_US:%.*]]
-; CHECK:   loop_begin.us:
-; CHECK-NEXT:call void @x()
-; CHECK-NEXT:br label [[LOOP_A_US:%.*]]
-; CHECK:   loop_a.us:
-; CHECK-NEXT:call void @a()
-; CHECK-NEXT:br label [[LOOP_LATCH_US:%.*]]
-; CHECK:   loop_latch.us:
-; CHECK-NEXT:[[V_US:%.*]] = load i1, i1* [[PTR:%.*]], align 1
-; CHECK-NEXT:br i1 [[V_US]], label [[LOOP_BEGIN_US]], label 
[[LOOP_EXIT_SPLIT_US:%.*]]
-; CHECK:   loop_exit.split.us:
-; CHECK-NEXT:br label [[LOOP_EXIT:%.*]]
-; CHECK:   entry.split:
 ; CHECK-NEXT:br label [[LOOP_BEGIN:%.*]]
 ; CHECK:   loop_begin:
 ; CHECK-NEXT:call void @x()
-; CHECK-NEXT:br label [[LOOP_B:%.*]]
+; CHECK-NEXT:br i1 [[COND:%.*]], label [[LOOP_A:%.*]], label [[LOOP_B:%.*]]
+; CHECK:   loop_a:
+; CHECK-NEXT:call void @a()
+; CHECK-NEXT:br label [[LOOP_LATCH:%.*]]
 ; CHECK:   loop_b:
 ; CHECK-NEXT:call void @b()
-; CHECK-NEXT:br label [[LOOP_LATCH:%.*]]
+; CHECK-NEXT:br label [[LOOP_LATCH]]
 ; CHECK:   loop_latch:
-; CHECK-NEXT:[[V:%.*]] = load i1, i1* [[PTR]], align 1
-; CHECK-NEXT:br i1 [[V]], label [[LOOP_BEGIN]], label 
[[LOOP_EXIT_SPLIT:%.*]]
-; CHECK:   loop_exit.split:
-; CHECK-NEXT:br label [[LOOP_EXIT]]
+; CHECK-NEXT:[[V:%.*]] = load i1, i1* [[PTR:%.*]], align 1
+; CHECK-NEXT:br i1 [[V]], label [[LOOP_BEGIN]], label [[LOOP_EXIT:%.*]]
 ; CHECK:   loop_exit:
 ; CHECK-NEXT:ret void
 ;
@@ -235,39 +221,25 @@ loop_exit:
 define void @test_unswitch_non_dup_code_minsize(i1* %ptr, i1 %cond) #0 {
 ; CHECK-LABEL: @test_unswitch_non_dup_code_minsize(
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:br i1 [[COND:%.*]], label [[ENTRY_SPLIT_US:%.*]], label 
[[ENTRY_SPLIT:%.*]]
-; CHECK:   entry.split.us:
-; CHECK-NEXT:br label [[LOOP_BEGIN_US:%.*]]
-; CHECK:   loop_begin.us:
+; CHECK-NEXT:br label [[LOOP_BEGIN:%.*]]
+; CHECK:   loop_begin:
 ; CHECK-NE

[llvm-branch-commits] [llvm] 7ec8f43 - [SPARC] Fix fp128 load/stores

2021-01-13 Thread Craig Topper via llvm-branch-commits


Author: Craig Topper
Date: 2021-01-13T14:59:50-08:00
New Revision: 7ec8f43659861be42f9d600422678196849b6e90

URL: 
https://github.com/llvm/llvm-project/commit/7ec8f43659861be42f9d600422678196849b6e90
DIFF: 
https://github.com/llvm/llvm-project/commit/7ec8f43659861be42f9d600422678196849b6e90.diff

LOG: [SPARC] Fix fp128 load/stores

The generated code for the split fp128 load/stores was missing a small yet 
important adjustment to the pointer metadata being fed into `getStore` and 
`getLoad`, making it out of sync with the effective memory address.
This problem often resulted in instructions being scheduled in the wrong order.

I also took this chance to clean up some "wrong" uses of `getAlignment` as done 
in D77687.

Thanks @jrtc27 for finding the problem and providing a patch.

Patch by LemonBoy and Jessica Clarke(jrtc27)

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D94345

Added: 
llvm/test/CodeGen/SPARC/fp128-split.ll

Modified: 
llvm/lib/Target/Sparc/SparcISelLowering.cpp

Removed: 




diff  --git a/llvm/lib/Target/Sparc/SparcISelLowering.cpp 
b/llvm/lib/Target/Sparc/SparcISelLowering.cpp
index 415c2bed6dd5..e5c7794b7d2f 100644
--- a/llvm/lib/Target/Sparc/SparcISelLowering.cpp
+++ b/llvm/lib/Target/Sparc/SparcISelLowering.cpp
@@ -2733,23 +2733,21 @@ static SDValue LowerF64Op(SDValue SrcReg64, const SDLoc 
&dl, SelectionDAG &DAG,
 static SDValue LowerF128Load(SDValue Op, SelectionDAG &DAG)
 {
   SDLoc dl(Op);
-  LoadSDNode *LdNode = dyn_cast(Op.getNode());
-  assert(LdNode && LdNode->getOffset().isUndef()
- && "Unexpected node type");
+  LoadSDNode *LdNode = cast(Op.getNode());
+  assert(LdNode->getOffset().isUndef() && "Unexpected node type");
 
-  unsigned alignment = LdNode->getAlignment();
-  if (alignment > 8)
-alignment = 8;
+  Align Alignment = commonAlignment(LdNode->getOriginalAlign(), 8);
 
   SDValue Hi64 =
   DAG.getLoad(MVT::f64, dl, LdNode->getChain(), LdNode->getBasePtr(),
-  LdNode->getPointerInfo(), alignment);
+  LdNode->getPointerInfo(), Alignment);
   EVT addrVT = LdNode->getBasePtr().getValueType();
   SDValue LoPtr = DAG.getNode(ISD::ADD, dl, addrVT,
   LdNode->getBasePtr(),
   DAG.getConstant(8, dl, addrVT));
   SDValue Lo64 = DAG.getLoad(MVT::f64, dl, LdNode->getChain(), LoPtr,
- LdNode->getPointerInfo(), alignment);
+ LdNode->getPointerInfo().getWithOffset(8),
+ Alignment);
 
   SDValue SubRegEven = DAG.getTargetConstant(SP::sub_even64, dl, MVT::i32);
   SDValue SubRegOdd  = DAG.getTargetConstant(SP::sub_odd64, dl, MVT::i32);
@@ -2787,9 +2785,9 @@ static SDValue LowerLOAD(SDValue Op, SelectionDAG &DAG)
 // Lower a f128 store into two f64 stores.
 static SDValue LowerF128Store(SDValue Op, SelectionDAG &DAG) {
   SDLoc dl(Op);
-  StoreSDNode *StNode = dyn_cast(Op.getNode());
-  assert(StNode && StNode->getOffset().isUndef()
- && "Unexpected node type");
+  StoreSDNode *StNode = cast(Op.getNode());
+  assert(StNode->getOffset().isUndef() && "Unexpected node type");
+
   SDValue SubRegEven = DAG.getTargetConstant(SP::sub_even64, dl, MVT::i32);
   SDValue SubRegOdd  = DAG.getTargetConstant(SP::sub_odd64, dl, MVT::i32);
 
@@ -2804,20 +2802,20 @@ static SDValue LowerF128Store(SDValue Op, SelectionDAG 
&DAG) {
 StNode->getValue(),
 SubRegOdd);
 
-  unsigned alignment = StNode->getAlignment();
-  if (alignment > 8)
-alignment = 8;
+  Align Alignment = commonAlignment(StNode->getOriginalAlign(), 8);
 
   SDValue OutChains[2];
   OutChains[0] =
   DAG.getStore(StNode->getChain(), dl, SDValue(Hi64, 0),
-   StNode->getBasePtr(), MachinePointerInfo(), alignment);
+   StNode->getBasePtr(), StNode->getPointerInfo(),
+   Alignment);
   EVT addrVT = StNode->getBasePtr().getValueType();
   SDValue LoPtr = DAG.getNode(ISD::ADD, dl, addrVT,
   StNode->getBasePtr(),
   DAG.getConstant(8, dl, addrVT));
   OutChains[1] = DAG.getStore(StNode->getChain(), dl, SDValue(Lo64, 0), LoPtr,
-  MachinePointerInfo(), alignment);
+  StNode->getPointerInfo().getWithOffset(8),
+  Alignment);
   return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
 }
 
@@ -2836,7 +2834,8 @@ static SDValue LowerSTORE(SDValue Op, SelectionDAG &DAG)
 SDValue Val = DAG.getNode(ISD::BITCAST, dl, MVT::v2i32, St->getValue());
 SDValue Chain = DAG.getStore(
 St->getChain(), dl, Val, St->getBasePtr(), St->getPointerInfo(),
-St->getAlignment(), St->getMemOperand()->getFlags(), St->getAAInfo());
+St->getOriginalAlign(), St

[llvm-branch-commits] [llvm] 854f098 - Fix llvm::Optional build breaks in MSVC using std::is_trivially_copyable

2021-01-13 Thread David Blaikie via llvm-branch-commits


Author: James Player
Date: 2021-01-13T15:23:48-08:00
New Revision: 854f0984f0b7ab9a9a541a4bcda7ea173e4113d3

URL: 
https://github.com/llvm/llvm-project/commit/854f0984f0b7ab9a9a541a4bcda7ea173e4113d3
DIFF: 
https://github.com/llvm/llvm-project/commit/854f0984f0b7ab9a9a541a4bcda7ea173e4113d3.diff

LOG: Fix llvm::Optional build breaks in MSVC using std::is_trivially_copyable

Current code breaks this version of MSVC due to a mismatch between 
`std::is_trivially_copyable` and `llvm::is_trivially_copyable` for `std::pair` 
instantiations.  Hence I was attempting to use `std::is_trivially_copyable` to 
set `llvm::is_trivially_copyable::value`.

I spent some time root causing an `llvm::Optional` build error on MSVC 16.8.3 
related to the change described above:

```
62>C:\src\ocg_llvm\llvm-project\llvm\include\llvm/ADT/BreadthFirstIterator.h(96,12):
 error C2280: 'llvm::Optional::NodeSubset> 
*,llvm::Optional::ChildIterator>>> 
&llvm::Optional::NodeSubset> 
*,llvm::Optional::ChildIterator>>>::operator =(const 
llvm::Optional::NodeSubset> 
*,llvm::Optional::ChildIterator>>> &)': attempting to reference 
a deleted function (compiling source file 
C:\src\ocg_llvm\llvm-project\llvm\unittests\ADT\BreadthFirstIteratorTest.cpp)
...
```
The "trivial" specialization of `optional_detail::OptionalStorage` assumes that 
the value type is trivially copy constructible and trivially copy assignable. 
The specialization is invoked based on a check of `is_trivially_copyable` 
alone, which does not imply both `is_trivially_copy_assignable` and 
`is_trivially_copy_constructible` are true.

[[ https://en.cppreference.com/w/cpp/named_req/TriviallyCopyable | According to 
the spec ]], a deleted assignment operator does not make 
`is_trivially_copyable` false. So I think all these properties need to be 
checked explicitly in order to specialize `OptionalStorage` to the "trivial" 
version:
```
/// Storage for any type.
template ::value
  && std::is_trivially_copy_assignable::value>
class OptionalStorage {
```
Above fixed my build break in MSVC, but I think we need to explicitly check 
`is_trivially_copy_constructible` too since it might be possible the copy 
constructor is deleted.  Also would be ideal to move over to 
`std::is_trivially_copyable` instead of the `llvm` namespace verson.

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D93510

Added: 


Modified: 
llvm/include/llvm/ADT/Optional.h
llvm/unittests/ADT/OptionalTest.cpp

Removed: 




diff  --git a/llvm/include/llvm/ADT/Optional.h 
b/llvm/include/llvm/ADT/Optional.h
index daa9ee627fa9..820e586ff7dd 100644
--- a/llvm/include/llvm/ADT/Optional.h
+++ b/llvm/include/llvm/ADT/Optional.h
@@ -33,7 +33,12 @@ namespace optional_detail {
 struct in_place_t {};
 
 /// Storage for any type.
-template ::value>
+template ::value &&
+  std::is_trivially_copy_assignable::value &&
+  (std::is_trivially_move_constructible::value 
||
+   !std::is_move_constructible::value) &&
+  (std::is_trivially_move_assignable::value ||
+   !std::is_move_assignable::value))>
 class OptionalStorage {
   union {
 char empty;

diff  --git a/llvm/unittests/ADT/OptionalTest.cpp 
b/llvm/unittests/ADT/OptionalTest.cpp
index c7fa796a2d7f..235b834887d1 100644
--- a/llvm/unittests/ADT/OptionalTest.cpp
+++ b/llvm/unittests/ADT/OptionalTest.cpp
@@ -390,6 +390,127 @@ TEST(OptionalTest, ImmovableEmplace) {
   EXPECT_EQ(0u, Immovable::Destructions);
 }
 
+// Craft a class which is_trivially_copyable, but not
+// is_trivially_copy_constructible.
+struct NonTCopy {
+  NonTCopy() = default;
+
+  // Delete the volatile copy constructor to engage the "rule of 3" and delete
+  // any unspecified copy assignment or constructor.
+  NonTCopy(volatile NonTCopy const &) = delete;
+
+  // Leave the non-volatile default copy constructor unspecified (deleted by
+  // rule of 3)
+
+  // This template can serve as the copy constructor, but isn't chosen
+  // by =default in a class with a 'NonTCopy' member.
+  template 
+  NonTCopy(Self const &Other) : Val(Other.Val) {}
+
+  NonTCopy &operator=(NonTCopy const &) = default;
+
+  int Val{0};
+};
+
+#if defined(_MSC_VER) && _MSC_VER >= 1927
+// Currently only true on recent MSVC releases.
+static_assert(std::is_trivially_copyable::value,
+  "Expect NonTCopy to be trivially copyable");
+
+static_assert(!std::is_trivially_copy_constructible::value,
+  "Expect NonTCopy not to be trivially copy constructible.");
+#endif // defined(_MSC_VER) && _MSC_VER >= 1927
+
+TEST(OptionalTest, DeletedCopyConstructor) {
+
+  // Expect compile to fail if 'trivial' version of
+  // optional_detail::OptionalStorage is chosen.
+  using NonTCopyOptT = Optional;
+  NonTCopyOptT NonTCopy1;
+
+  // Check that

[llvm-branch-commits] [polly] 8634124 - [NFC] Rename ThinLTOPhase to ThinOrFullLTOPhase and move it from PassBuilder.h

2021-01-13 Thread Wei Mi via llvm-branch-commits


Author: Wei Mi
Date: 2021-01-13T15:55:40-08:00
New Revision: 86341247c4a2ffa4328945b03e7a05b1c51c3889

URL: 
https://github.com/llvm/llvm-project/commit/86341247c4a2ffa4328945b03e7a05b1c51c3889
DIFF: 
https://github.com/llvm/llvm-project/commit/86341247c4a2ffa4328945b03e7a05b1c51c3889.diff

LOG: [NFC] Rename ThinLTOPhase to ThinOrFullLTOPhase and move it from 
PassBuilder.h
to Pass.h.

In some compiler passes like SampleProfileLoaderPass, we want to know which
LTO/ThinLTO phase the pass is in. Currently the phase is represented in enum
class PassBuilder::ThinLTOPhase, so it is only available in PassBuilder and
it also cannot represent phase in full LTO. The patch extends it to include
full LTO phases and move it from PassBuilder.h to Pass.h, then it is much
easier for PassBuilder to communiate with each pass about current LTO phase.

Differential Revision: https://reviews.llvm.org/D94613

Added: 


Modified: 
llvm/include/llvm/Pass.h
llvm/include/llvm/Passes/PassBuilder.h
llvm/include/llvm/Transforms/IPO/SampleProfile.h
llvm/lib/Passes/PassBuilder.cpp
llvm/lib/Passes/PassRegistry.def
llvm/lib/Transforms/IPO/SampleProfile.cpp
polly/lib/Support/RegisterPasses.cpp

Removed: 




diff  --git a/llvm/include/llvm/Pass.h b/llvm/include/llvm/Pass.h
index af583dae58b6..8aa9ba90a9ca 100644
--- a/llvm/include/llvm/Pass.h
+++ b/llvm/include/llvm/Pass.h
@@ -69,6 +69,20 @@ enum PassKind {
   PT_PassManager
 };
 
+/// This enumerates the LLVM full LTO or ThinLTO optimization phases.
+enum class ThinOrFullLTOPhase {
+  /// No LTO/ThinLTO behavior needed.
+  None,
+  /// ThinLTO prelink (summary) phase.
+  ThinLTOPreLink,
+  /// ThinLTO postlink (backend compile) phase.
+  ThinLTOPostLink,
+  /// Full LTO prelink phase.
+  FullLTOPreLink,
+  /// Full LTO postlink (backend compile) phase.
+  FullLTOPostLink
+};
+
 
//===--===//
 /// Pass interface - Implemented by all 'passes'.  Subclass this if you are an
 /// interprocedural optimization or you do not fit into any of the more

diff  --git a/llvm/include/llvm/Passes/PassBuilder.h 
b/llvm/include/llvm/Passes/PassBuilder.h
index fd7f6a2ba3b0..d36212806f0f 100644
--- a/llvm/include/llvm/Passes/PassBuilder.h
+++ b/llvm/include/llvm/Passes/PassBuilder.h
@@ -159,18 +159,6 @@ class PassBuilder {
 std::vector InnerPipeline;
   };
 
-  /// ThinLTO phase.
-  ///
-  /// This enumerates the LLVM ThinLTO optimization phases.
-  enum class ThinLTOPhase {
-/// No ThinLTO behavior needed.
-None,
-/// ThinLTO prelink (summary) phase.
-PreLink,
-/// ThinLTO postlink (backend compile) phase.
-PostLink
-  };
-
   /// LLVM-provided high-level optimization levels.
   ///
   /// This enumerates the LLVM-provided high-level optimization levels. Each
@@ -342,7 +330,7 @@ class PassBuilder {
   /// \p Phase indicates the current ThinLTO phase.
   FunctionPassManager
   buildFunctionSimplificationPipeline(OptimizationLevel Level,
-  ThinLTOPhase Phase);
+  ThinOrFullLTOPhase Phase);
 
   /// Construct the core LLVM module canonicalization and simplification
   /// pipeline.
@@ -360,12 +348,12 @@ class PassBuilder {
   ///
   /// \p Phase indicates the current ThinLTO phase.
   ModulePassManager buildModuleSimplificationPipeline(OptimizationLevel Level,
-  ThinLTOPhase Phase);
+  ThinOrFullLTOPhase 
Phase);
 
   /// Construct the module pipeline that performs inlining as well as
   /// the inlining-driven cleanups.
   ModuleInlinerWrapperPass buildInlinerPipeline(OptimizationLevel Level,
-ThinLTOPhase Phase,
+ThinOrFullLTOPhase Phase,
 bool MandatoryOnly);
 
   /// Construct the core LLVM module optimization pipeline.
@@ -718,7 +706,7 @@ class PassBuilder {
   // O1 pass pipeline
   FunctionPassManager
   buildO1FunctionSimplificationPipeline(OptimizationLevel Level,
-ThinLTOPhase Phase);
+ThinOrFullLTOPhase Phase);
 
   void addRequiredLTOPreLinkPasses(ModulePassManager &MPM);
 

diff  --git a/llvm/include/llvm/Transforms/IPO/SampleProfile.h 
b/llvm/include/llvm/Transforms/IPO/SampleProfile.h
index a5ad44551bf6..3d929b974044 100644
--- a/llvm/include/llvm/Transforms/IPO/SampleProfile.h
+++ b/llvm/include/llvm/Transforms/IPO/SampleProfile.h
@@ -24,17 +24,18 @@ class Module;
 /// The sample profiler data loader pass.
 class SampleProfileLoaderPass : public PassInfoMixin {
 public:
-  SampleProfileLoaderPass(std::string File = "", std::string RemappingFile = 
"",
-  bool IsThinL

[llvm-branch-commits] [llvm] ddd0384 - [SystemZ] Clear Available set in SystemZPostRASchedStrategy::initialize().

2021-01-13 Thread Jonas Paulsson via llvm-branch-commits


Author: Jonas Paulsson
Date: 2021-01-13T18:18:27-06:00
New Revision: ddd03842c3472fedf164274c479272089c426ee5

URL: 
https://github.com/llvm/llvm-project/commit/ddd03842c3472fedf164274c479272089c426ee5
DIFF: 
https://github.com/llvm/llvm-project/commit/ddd03842c3472fedf164274c479272089c426ee5.diff

LOG: [SystemZ]  Clear Available set in SystemZPostRASchedStrategy::initialize().

This needs to be done in order to not crash with -misched-cutoff.

Fixes https://bugs.llvm.org/show_bug.cgi?id=45928

Review: Ulrich Weigand

Differential Revision: https://reviews.llvm.org/D94383

Added: 
llvm/test/CodeGen/SystemZ/misched-cutoff.ll

Modified: 
llvm/lib/Target/SystemZ/SystemZMachineScheduler.cpp

Removed: 




diff  --git a/llvm/lib/Target/SystemZ/SystemZMachineScheduler.cpp 
b/llvm/lib/Target/SystemZ/SystemZMachineScheduler.cpp
index 3fc25034dded..9bee5e8d1864 100644
--- a/llvm/lib/Target/SystemZ/SystemZMachineScheduler.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZMachineScheduler.cpp
@@ -72,6 +72,7 @@ advanceTo(MachineBasicBlock::iterator NextBegin) {
 }
 
 void SystemZPostRASchedStrategy::initialize(ScheduleDAGMI *dag) {
+  Available.clear();  // -misched-cutoff.
   LLVM_DEBUG(HazardRec->dumpState(););
 }
 

diff  --git a/llvm/test/CodeGen/SystemZ/misched-cutoff.ll 
b/llvm/test/CodeGen/SystemZ/misched-cutoff.ll
new file mode 100644
index ..0de80a22c301
--- /dev/null
+++ b/llvm/test/CodeGen/SystemZ/misched-cutoff.ll
@@ -0,0 +1,49 @@
+; RUN: llc -mtriple=s390x-linux-gnu -mcpu=z13 -misched-cutoff=1 -o /dev/null < 
%s
+;
+; Test that the post-ra scheduler does not crash with -misched-cutoff.
+
+@g_184 = external dso_local global i16, align 2
+@g_294 = external dso_local global [1 x [9 x i32*]], align 8
+
+define void @fun() {
+bb:
+  br label %bb1
+
+bb1:  ; preds = %bb1, %bb
+  %i = phi i64 [ 0, %bb ], [ %i22, %bb1 ]
+  %i2 = trunc i64 %i to i32
+  %i3 = lshr i32 %i2, 1
+  %i4 = select i1 false, i32 %i3, i32 undef
+  %i5 = lshr i32 %i4, 1
+  %i6 = xor i32 %i5, -306674912
+  %i7 = select i1 undef, i32 %i5, i32 %i6
+  %i8 = lshr i32 %i7, 1
+  %i9 = xor i32 %i8, -306674912
+  %i10 = select i1 undef, i32 %i8, i32 %i9
+  %i11 = lshr i32 %i10, 1
+  %i12 = xor i32 %i11, -306674912
+  %i13 = select i1 undef, i32 %i11, i32 %i12
+  %i14 = lshr i32 %i13, 1
+  %i15 = select i1 false, i32 %i14, i32 undef
+  %i16 = lshr i32 %i15, 1
+  %i17 = select i1 false, i32 %i16, i32 undef
+  %i18 = lshr i32 %i17, 1
+  %i19 = select i1 false, i32 %i18, i32 undef
+  %i20 = lshr i32 %i19, 1
+  %i21 = select i1 false, i32 %i20, i32 undef
+  store i32 %i21, i32* undef, align 4
+  %i22 = add nuw nsw i64 %i, 1
+  %i23 = icmp ult i64 %i, 255
+  br i1 %i23, label %bb1, label %bb24
+
+bb24: ; preds = %bb1
+  %i25 = load volatile i16, i16* undef
+  store i32* null, i32** undef, align 8
+  store i32 -10, i32* undef, align 4
+  store i32 -10, i32* null, align 4
+  store i32 -10, i32* undef, align 4
+  store i16 0, i16* @g_184, align 2
+  store i32* null, i32** getelementptr inbounds ([1 x [9 x i32*]], [1 x [9 x 
i32*]]* @g_294, i64 0, i64 0, i64 2), align 8
+  store i32* null, i32** getelementptr inbounds ([1 x [9 x i32*]], [1 x [9 x 
i32*]]* @g_294, i64 0, i64 0, i64 5), align 8
+  unreachable
+}



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[llvm-branch-commits] [libunwind] c82deed - [libunwind] Unwind through aarch64/Linux sigreturn frame

2021-01-13 Thread Ryan Prichard via llvm-branch-commits


Author: Ryan Prichard
Date: 2021-01-13T16:38:36-08:00
New Revision: c82deed6764cbc63966374baf9721331901ca958

URL: 
https://github.com/llvm/llvm-project/commit/c82deed6764cbc63966374baf9721331901ca958
DIFF: 
https://github.com/llvm/llvm-project/commit/c82deed6764cbc63966374baf9721331901ca958.diff

LOG: [libunwind] Unwind through aarch64/Linux sigreturn frame

An AArch64 sigreturn trampoline frame can't currently be described
in a DWARF .eh_frame section, because the AArch64 DWARF spec currently
doesn't define a constant for the PC register. (PC and LR may need to
be restored to different values.)

Instead, use the same technique as libgcc or github.com/libunwind and
detect the sigreturn frame by looking for the sigreturn instructions:

mov x8, #0x8b
svc #0x0

If a sigreturn frame is detected, libunwind restores all the GPRs by
assuming that sp points at an rt_sigframe Linux kernel struct. This
behavior is a fallback mode that is only used if there is no ordinary
unwind info for sigreturn.

If libunwind can't find unwind info for a PC, it assumes that the PC is
readable, and would crash if it isn't. This could happen if:
 - The PC points at a function compiled without unwind info, and which
   is part of an execute-only mapping (e.g. using -Wl,--execute-only).
 - The PC is invalid and happens to point to unreadable or unmapped
   memory.

In the tests, ignore a failed dladdr call so that the tests can run on
user-mode qemu for AArch64, which uses a stack-allocated trampoline
instead of a vDSO.

Reviewed By: danielkiss, compnerd, #libunwind

Differential Revision: https://reviews.llvm.org/D90898

Added: 


Modified: 
libunwind/include/__libunwind_config.h
libunwind/src/UnwindCursor.hpp
libunwind/test/signal_unwind.pass.cpp
libunwind/test/unwind_leaffunction.pass.cpp

Removed: 




diff  --git a/libunwind/include/__libunwind_config.h 
b/libunwind/include/__libunwind_config.h
index 71d77ca65118..80be357496c4 100644
--- a/libunwind/include/__libunwind_config.h
+++ b/libunwind/include/__libunwind_config.h
@@ -27,6 +27,9 @@
 #define _LIBUNWIND_HIGHEST_DWARF_REGISTER_RISCV 64
 
 #if defined(_LIBUNWIND_IS_NATIVE_ONLY)
+# if defined(__linux__)
+#  define _LIBUNWIND_TARGET_LINUX 1
+# endif
 # if defined(__i386__)
 #  define _LIBUNWIND_TARGET_I386
 #  define _LIBUNWIND_CONTEXT_SIZE 8

diff  --git a/libunwind/src/UnwindCursor.hpp b/libunwind/src/UnwindCursor.hpp
index 9f8fa65107b4..e537ed84dd93 100644
--- a/libunwind/src/UnwindCursor.hpp
+++ b/libunwind/src/UnwindCursor.hpp
@@ -925,6 +925,25 @@ class UnwindCursor : public AbstractUnwindCursor{
   }
 #endif
 
+#if defined(_LIBUNWIND_TARGET_LINUX) && defined(_LIBUNWIND_TARGET_AARCH64)
+  bool setInfoForSigReturn() {
+R dummy;
+return setInfoForSigReturn(dummy);
+  }
+  int stepThroughSigReturn() {
+R dummy;
+return stepThroughSigReturn(dummy);
+  }
+  bool setInfoForSigReturn(Registers_arm64 &);
+  int stepThroughSigReturn(Registers_arm64 &);
+  template  bool setInfoForSigReturn(Registers &) {
+return false;
+  }
+  template  int stepThroughSigReturn(Registers &) {
+return UNW_STEP_END;
+  }
+#endif
+
 #if defined(_LIBUNWIND_SUPPORT_DWARF_UNWIND)
   bool getInfoFromFdeCie(const typename CFI_Parser::FDE_Info &fdeInfo,
  const typename CFI_Parser::CIE_Info &cieInfo,
@@ -1179,6 +1198,9 @@ class UnwindCursor : public AbstractUnwindCursor{
   unw_proc_info_t  _info;
   bool _unwindInfoMissing;
   bool _isSignalFrame;
+#if defined(_LIBUNWIND_TARGET_LINUX) && defined(_LIBUNWIND_TARGET_AARCH64)
+  bool _isSigReturn = false;
+#endif
 };
 
 
@@ -1873,7 +1895,11 @@ bool UnwindCursor::getInfoFromSEH(pint_t pc) {
 
 template 
 void UnwindCursor::setInfoBasedOnIPRegister(bool isReturnAddress) {
-  pint_t pc = (pint_t)this->getReg(UNW_REG_IP);
+#if defined(_LIBUNWIND_TARGET_LINUX) && defined(_LIBUNWIND_TARGET_AARCH64)
+  _isSigReturn = false;
+#endif
+
+  pint_t pc = static_cast(this->getReg(UNW_REG_IP));
 #if defined(_LIBUNWIND_ARM_EHABI)
   // Remove the thumb bit so the IP represents the actual instruction address.
   // This matches the behaviour of _Unwind_GetIP on arm.
@@ -1971,10 +1997,77 @@ void UnwindCursor::setInfoBasedOnIPRegister(bool 
isReturnAddress) {
   }
 #endif // #if defined(_LIBUNWIND_SUPPORT_DWARF_UNWIND)
 
+#if defined(_LIBUNWIND_TARGET_LINUX) && defined(_LIBUNWIND_TARGET_AARCH64)
+  if (setInfoForSigReturn())
+return;
+#endif
+
   // no unwind info, flag that we can't reliably unwind
   _unwindInfoMissing = true;
 }
 
+#if defined(_LIBUNWIND_TARGET_LINUX) && defined(_LIBUNWIND_TARGET_AARCH64)
+template 
+bool UnwindCursor::setInfoForSigReturn(Registers_arm64 &) {
+  // Look for the sigreturn trampoline. The trampoline's body is two
+  // specific instructions (see below). Typically the trampoline comes from the
+  // vDSO[1] (i.e. the __kernel_rt_sigreturn func

[llvm-branch-commits] [flang] 3de92ca - [flang] Add tests for procedure arguments with implicit interfaces

2021-01-13 Thread Peter Steinfeld via llvm-branch-commits


Author: Peter Steinfeld
Date: 2021-01-13T16:43:09-08:00
New Revision: 3de92ca78cd4e180920acc077452f87c44c7d935

URL: 
https://github.com/llvm/llvm-project/commit/3de92ca78cd4e180920acc077452f87c44c7d935
DIFF: 
https://github.com/llvm/llvm-project/commit/3de92ca78cd4e180920acc077452f87c44c7d935.diff

LOG: [flang] Add tests for procedure arguments with implicit interfaces

It's possible to declare an external procedure and then pass it as an
actual argument to a subprogram expecting a procedure argument.  I added
tests for this and added an error message to distinguish passing an
actual argument with an implicit interface from passing an argument with
a mismatched explicit interface.

Differential Revision: https://reviews.llvm.org/D94505

Added: 


Modified: 
flang/lib/Semantics/check-call.cpp
flang/test/Semantics/call09.f90

Removed: 




diff  --git a/flang/lib/Semantics/check-call.cpp 
b/flang/lib/Semantics/check-call.cpp
index c954dba58fbc..ffae3410a852 100644
--- a/flang/lib/Semantics/check-call.cpp
+++ b/flang/lib/Semantics/check-call.cpp
@@ -537,9 +537,20 @@ static void CheckProcedureArg(evaluate::ActualArgument 
&arg,
   }
   if (interface.HasExplicitInterface()) {
 if (interface != argInterface) {
-  messages.Say(
-  "Actual argument procedure has interface incompatible with 
%s"_err_en_US,
-  dummyName);
+  // 15.5.2.9(1): Explicit interfaces must match
+  if (argInterface.HasExplicitInterface()) {
+messages.Say(
+"Actual procedure argument has interface incompatible with 
%s"_err_en_US,
+dummyName);
+return;
+  } else {
+messages.Say(
+"Actual procedure argument has an implicit interface "
+"which is not known to be compatible with %s which has an "
+"explcit interface"_err_en_US,
+dummyName);
+return;
+  }
 }
   } else { // 15.5.2.9(2,3)
 if (interface.IsSubroutine() && argInterface.IsFunction()) {

diff  --git a/flang/test/Semantics/call09.f90 b/flang/test/Semantics/call09.f90
index 8c21d376fd60..e7f22e32ed44 100644
--- a/flang/test/Semantics/call09.f90
+++ b/flang/test/Semantics/call09.f90
@@ -19,6 +19,9 @@ subroutine s01(p)
   subroutine s02(p)
 procedure(realfunc), pointer :: p
   end subroutine
+  subroutine s03(p)
+procedure(realfunc) :: p
+  end subroutine
 
   subroutine selemental1(p)
 procedure(cos) :: p ! ok
@@ -47,28 +50,33 @@ subroutine test1 ! 15.5.2.9(5)
 procedure(realfunc), pointer :: p
 procedure(intfunc), pointer :: ip
 integer, pointer :: intPtr
+external :: extfunc
+external :: extfuncPtr
+pointer :: extfuncPtr
 p => realfunc
 ip => intfunc
 call s01(realfunc) ! ok
-!ERROR: Actual argument procedure has interface incompatible with dummy 
argument 'p='
+!ERROR: Actual procedure argument has interface incompatible with dummy 
argument 'p='
 call s01(intfunc)
 call s01(p) ! ok
 call s01(procptr()) ! ok
-!ERROR: Actual argument procedure has interface incompatible with dummy 
argument 'p='
+!ERROR: Actual procedure argument has interface incompatible with dummy 
argument 'p='
 call s01(intprocptr())
 call s01(null()) ! ok
 call s01(null(p)) ! ok
-!ERROR: Actual argument procedure has interface incompatible with dummy 
argument 'p='
+!ERROR: Actual procedure argument has interface incompatible with dummy 
argument 'p='
 call s01(null(ip))
 call s01(sin) ! ok
 !ERROR: Actual argument associated with procedure dummy argument 'p=' is 
not a procedure
 call s01(null(intPtr))
 !ERROR: Actual argument associated with procedure dummy argument 'p=' is 
not a procedure
 call s01(B"0101")
+!ERROR: Actual procedure argument has an implicit interface which is not 
known to be compatible with dummy argument 'p=' which has an explcit interface
+call s01(extfunc)
 !ERROR: Actual argument associated with procedure pointer dummy argument 
'p=' must be a POINTER unless INTENT(IN)
 call s02(realfunc)
 call s02(p) ! ok
-!ERROR: Actual argument procedure has interface incompatible with dummy 
argument 'p='
+!ERROR: Actual procedure argument has interface incompatible with dummy 
argument 'p='
 call s02(ip)
 !ERROR: Actual argument associated with procedure pointer dummy argument 
'p=' must be a POINTER unless INTENT(IN)
 call s02(procptr())
@@ -78,6 +86,10 @@ subroutine test1 ! 15.5.2.9(5)
 call s02(null(p))
 !ERROR: Actual argument associated with procedure pointer dummy argument 
'p=' must be a POINTER unless INTENT(IN)
 call s02(sin)
+!ERROR: Actual procedure argument has an implicit interface which

[llvm-branch-commits] [llvm] dfc1901 - [RISCV] Custom lower ISD::VSCALE.

2021-01-13 Thread Craig Topper via llvm-branch-commits


Author: Craig Topper
Date: 2021-01-13T17:14:49-08:00
New Revision: dfc1901d513e1c5b9472d9b3403ca991b3d4a232

URL: 
https://github.com/llvm/llvm-project/commit/dfc1901d513e1c5b9472d9b3403ca991b3d4a232
DIFF: 
https://github.com/llvm/llvm-project/commit/dfc1901d513e1c5b9472d9b3403ca991b3d4a232.diff

LOG: [RISCV] Custom lower ISD::VSCALE.

This patch custom lowers ISD::VSCALE into a csrr vlenb followed
by a shift right by 3 followed by a multiply by the scale amount.

I've added computeKnownBits support to indicate that the csrr vlenb
always produces 3 trailng bits of 0s so the shift right is "exact".
This allows the shift and multiply sequence to be nicely optimized
into a single shift or removed completely when the scale amount is
a power of 2.

The non power of 2 case multiplying by 24 is still producing
suboptimal code. We could remove the right shift and use a
multiply by 3. Hopefully we can improve DAG combine to fix that
since it's not unique to this sequence.

This replaces D94144.

Reviewed By: HsiangKai

Differential Revision: https://reviews.llvm.org/D94249

Added: 
llvm/test/CodeGen/RISCV/rvv/rvv-vscale.i32.ll
llvm/test/CodeGen/RISCV/rvv/rvv-vscale.i64.ll

Modified: 
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/lib/Target/RISCV/RISCVISelLowering.h
llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
llvm/lib/Target/RISCV/RISCVMCInstLower.cpp

Removed: 




diff  --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp 
b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 73bc83b558ad..e84c2e9e368e 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -32,6 +32,7 @@
 #include "llvm/IR/IntrinsicsRISCV.h"
 #include "llvm/Support/Debug.h"
 #include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/KnownBits.h"
 #include "llvm/Support/MathExtras.h"
 #include "llvm/Support/raw_ostream.h"
 
@@ -350,6 +351,8 @@ RISCVTargetLowering::RISCVTargetLowering(const 
TargetMachine &TM,
   if (Subtarget.hasStdExtV()) {
 setBooleanVectorContents(ZeroOrOneBooleanContent);
 
+setOperationAction(ISD::VSCALE, XLenVT, Custom);
+
 // RVV intrinsics may have illegal operands.
 // We also need to custom legalize vmv.x.s.
 setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::i8, Custom);
@@ -686,6 +689,17 @@ SDValue RISCVTargetLowering::LowerOperation(SDValue Op,
   }
   case ISD::SPLAT_VECTOR:
 return lowerSPLATVECTOR(Op, DAG);
+  case ISD::VSCALE: {
+MVT VT = Op.getSimpleValueType();
+SDLoc DL(Op);
+SDValue VLENB = DAG.getNode(RISCVISD::READ_VLENB, DL, VT);
+// We define our scalable vector types for lmul=1 to use a 64 bit known
+// minimum size. e.g. . VLENB is in bytes so we calculate
+// vscale as VLENB / 8.
+SDValue VScale = DAG.getNode(ISD::SRL, DL, VT, VLENB,
+ DAG.getConstant(3, DL, VT));
+return DAG.getNode(ISD::MUL, DL, VT, VScale, Op.getOperand(0));
+  }
   }
 }
 
@@ -1867,6 +1881,30 @@ bool RISCVTargetLowering::isDesirableToCommuteWithShift(
   return true;
 }
 
+void RISCVTargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
+KnownBits &Known,
+const APInt 
&DemandedElts,
+const SelectionDAG 
&DAG,
+unsigned Depth) const {
+  unsigned Opc = Op.getOpcode();
+  assert((Opc >= ISD::BUILTIN_OP_END ||
+  Opc == ISD::INTRINSIC_WO_CHAIN ||
+  Opc == ISD::INTRINSIC_W_CHAIN ||
+  Opc == ISD::INTRINSIC_VOID) &&
+ "Should use MaskedValueIsZero if you don't know whether Op"
+ " is a target node!");
+
+  Known.resetAll();
+  switch (Opc) {
+  default: break;
+  case RISCVISD::READ_VLENB:
+// We assume VLENB is at least 8 bytes.
+// FIXME: The 1.0 draft spec defines minimum VLEN as 128 bits.
+Known.Zero.setLowBits(3);
+break;
+  }
+}
+
 unsigned RISCVTargetLowering::ComputeNumSignBitsForTargetNode(
 SDValue Op, const APInt &DemandedElts, const SelectionDAG &DAG,
 unsigned Depth) const {
@@ -3540,6 +3578,7 @@ const char 
*RISCVTargetLowering::getTargetNodeName(unsigned Opcode) const {
   NODE_NAME_CASE(GORCIW)
   NODE_NAME_CASE(VMV_X_S)
   NODE_NAME_CASE(SPLAT_VECTOR_I64)
+  NODE_NAME_CASE(READ_VLENB)
   }
   // clang-format on
   return nullptr;

diff  --git a/llvm/lib/Target/RISCV/RISCVISelLowering.h 
b/llvm/lib/Target/RISCV/RISCVISelLowering.h
index 3b71ed42b5ca..d7de7e4016b3 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.h
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.h
@@ -85,6 +85,8 @@ enum NodeType : unsigned {
   // Splats an i64 scalar to a vector type (with element type i64) where the
   // scalar is a sign-extended i32.
   SPLAT_VECTOR_I64,
+  // Read VLENB CSR
+  READ_VLENB,

[llvm-branch-commits] [clang] cd4c55c - Fix grammar in diagnostic for wrong arity in a structured binding.

2021-01-13 Thread Richard Smith via llvm-branch-commits


Author: Richard Smith
Date: 2021-01-13T17:41:09-08:00
New Revision: cd4c55c97402246099ae865a66517a36af5c3a7c

URL: 
https://github.com/llvm/llvm-project/commit/cd4c55c97402246099ae865a66517a36af5c3a7c
DIFF: 
https://github.com/llvm/llvm-project/commit/cd4c55c97402246099ae865a66517a36af5c3a7c.diff

LOG: Fix grammar in diagnostic for wrong arity in a structured binding.

Added: 


Modified: 
clang/include/clang/Basic/DiagnosticSemaKinds.td
clang/lib/Sema/SemaDeclCXX.cpp
clang/test/SemaCXX/cxx1z-decomposition.cpp

Removed: 




diff  --git a/clang/include/clang/Basic/DiagnosticSemaKinds.td 
b/clang/include/clang/Basic/DiagnosticSemaKinds.td
index b387736832a9..7d36397a7993 100644
--- a/clang/include/clang/Basic/DiagnosticSemaKinds.td
+++ b/clang/include/clang/Basic/DiagnosticSemaKinds.td
@@ -470,8 +470,9 @@ def err_decomp_decl_not_alone : Error<
 def err_decomp_decl_requires_init : Error<
   "decomposition declaration %0 requires an initializer">;
 def err_decomp_decl_wrong_number_bindings : Error<
-  "type %0 decomposes into %2 elements, but %select{only |}3%1 "
-  "names were provided">;
+  "type %0 decomposes into %3 %plural{1:element|:elements}2, but "
+  "%select{%plural{0:no|:only %1}1|%1}4 "
+  "%plural{1:name was|:names were}1 provided">;
 def err_decomp_decl_unbindable_type : Error<
   "cannot decompose %select{union|non-class, non-array}1 type %2">;
 def err_decomp_decl_multiple_bases_with_members : Error<

diff  --git a/clang/lib/Sema/SemaDeclCXX.cpp b/clang/lib/Sema/SemaDeclCXX.cpp
index 0df022f036f2..27679ac6f8d3 100644
--- a/clang/lib/Sema/SemaDeclCXX.cpp
+++ b/clang/lib/Sema/SemaDeclCXX.cpp
@@ -902,7 +902,8 @@ static bool checkSimpleDecomposition(
 llvm::function_ref GetInit) {
   if ((int64_t)Bindings.size() != NumElems) {
 S.Diag(Src->getLocation(), diag::err_decomp_decl_wrong_number_bindings)
-<< DecompType << (unsigned)Bindings.size() << NumElems.toString(10)
+<< DecompType << (unsigned)Bindings.size()
+<< (unsigned)NumElems.getLimitedValue(UINT_MAX) << 
NumElems.toString(10)
 << (NumElems < Bindings.size());
 return true;
   }
@@ -1148,8 +1149,9 @@ static bool checkTupleLikeDecomposition(Sema &S,
 const llvm::APSInt &TupleSize) {
   if ((int64_t)Bindings.size() != TupleSize) {
 S.Diag(Src->getLocation(), diag::err_decomp_decl_wrong_number_bindings)
-<< DecompType << (unsigned)Bindings.size() << TupleSize.toString(10)
-<< (TupleSize < Bindings.size());
+<< DecompType << (unsigned)Bindings.size()
+<< (unsigned)TupleSize.getLimitedValue(UINT_MAX)
+<< TupleSize.toString(10) << (TupleSize < Bindings.size());
 return true;
   }
 
@@ -1373,7 +1375,7 @@ static bool checkMemberDecomposition(Sema &S, 
ArrayRef Bindings,
   [](FieldDecl *FD) { return !FD->isUnnamedBitfield(); });
 assert(Bindings.size() != NumFields);
 S.Diag(Src->getLocation(), diag::err_decomp_decl_wrong_number_bindings)
-<< DecompType << (unsigned)Bindings.size() << NumFields
+<< DecompType << (unsigned)Bindings.size() << NumFields << NumFields
 << (NumFields < Bindings.size());
 return true;
   };

diff  --git a/clang/test/SemaCXX/cxx1z-decomposition.cpp 
b/clang/test/SemaCXX/cxx1z-decomposition.cpp
index 45a062a916f3..1ce75fe48db3 100644
--- a/clang/test/SemaCXX/cxx1z-decomposition.cpp
+++ b/clang/test/SemaCXX/cxx1z-decomposition.cpp
@@ -4,6 +4,21 @@ void use_from_own_init() {
   auto [a] = a; // expected-error {{binding 'a' cannot appear in the 
initializer of its own decomposition declaration}}
 }
 
+void num_elems() {
+  struct A0 {} a0;
+  int a1[1], a2[2];
+
+  auto [] = a0; // expected-warning {{does not allow a decomposition group to 
be empty}}
+  auto [v1] = a0; // expected-error {{type 'A0' decomposes into 0 elements, 
but 1 name was provided}}
+  auto [] = a1; // expected-error {{type 'int [1]' decomposes into 1 element, 
but no names were provided}} expected-warning {{empty}}
+  auto [v2] = a1;
+  auto [v3, v4] = a1; // expected-error {{type 'int [1]' decomposes into 1 
element, but 2 names were provided}}
+  auto [] = a2; // expected-error {{type 'int [2]' decomposes into 2 elements, 
but no names were provided}} expected-warning {{empty}}
+  auto [v5] = a2; // expected-error {{type 'int [2]' decomposes into 2 
elements, but only 1 name was provided}}
+  auto [v6, v7] = a2;
+  auto [v8, v9, v10] = a2; // expected-error {{type 'int [2]' decomposes into 
2 elements, but 3 names were provided}}
+}
+
 // As a Clang extension, _Complex can be decomposed.
 float decompose_complex(_Complex float cf) {
   static _Complex float scf;



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[llvm-branch-commits] [llvm] 336ab2d - [Support] On Windows, take the affinity mask into account

2021-01-13 Thread Alexandre Ganea via llvm-branch-commits


Author: Alexandre Ganea
Date: 2021-01-13T21:00:09-05:00
New Revision: 336ab2d51dfdd5ca09c2a9c506453db4fe653584

URL: 
https://github.com/llvm/llvm-project/commit/336ab2d51dfdd5ca09c2a9c506453db4fe653584
DIFF: 
https://github.com/llvm/llvm-project/commit/336ab2d51dfdd5ca09c2a9c506453db4fe653584.diff

LOG: [Support] On Windows, take the affinity mask into account

The number of hardware threads available to a ThreadPool can be limited if 
setting an affinity mask.
For example:

> start /B /AFFINITY 0xF lld-link.exe ...

Would let LLD only use 4 hyper-threads.

Previously, there was an outstanding issue on Windows Server 2019 on dual-CPU 
machines, which was preventing from using both CPU sockets. In normal 
conditions, when no affinity mask was set, ProcessorGroup::AllThreads was 
different from ProcessorGroup::UsableThreads. The previous code in 
llvm/lib/Support/Windows/Threading.inc L201 was improperly assuming those two 
values to be equal, and consequently was limiting the execution to only one CPU 
socket.

Differential Revision: https://reviews.llvm.org/D92419

Added: 


Modified: 
llvm/include/llvm/Support/Program.h
llvm/lib/Support/Program.cpp
llvm/lib/Support/Unix/Program.inc
llvm/lib/Support/Windows/Program.inc
llvm/lib/Support/Windows/Threading.inc
llvm/unittests/Support/ThreadPool.cpp

Removed: 




diff  --git a/llvm/include/llvm/Support/Program.h 
b/llvm/include/llvm/Support/Program.h
index b32de47adb57..bfd271958788 100644
--- a/llvm/include/llvm/Support/Program.h
+++ b/llvm/include/llvm/Support/Program.h
@@ -14,6 +14,7 @@
 #define LLVM_SUPPORT_PROGRAM_H
 
 #include "llvm/ADT/ArrayRef.h"
+#include "llvm/ADT/BitVector.h"
 #include "llvm/ADT/Optional.h"
 #include "llvm/ADT/StringRef.h"
 #include "llvm/Config/llvm-config.h"
@@ -125,9 +126,11 @@ namespace sys {
   ///< string is non-empty upon return an error occurred while invoking the
   ///< program.
   bool *ExecutionFailed = nullptr,
-  Optional *ProcStat = nullptr ///< If non-zero, 
provides
-  /// a pointer to a structure in which process execution statistics will 
be
-  /// stored.
+  Optional *ProcStat = nullptr, ///< If non-zero,
+  /// provides a pointer to a structure in which process execution
+  /// statistics will be stored.
+  BitVector *AffinityMask = nullptr ///< CPUs or processors the new
+/// program shall run on.
   );
 
   /// Similar to ExecuteAndWait, but returns immediately.
@@ -140,7 +143,8 @@ namespace sys {
 ArrayRef> Redirects = {},
 unsigned MemoryLimit = 0,
 std::string *ErrMsg = nullptr,
-bool *ExecutionFailed = nullptr);
+bool *ExecutionFailed = nullptr,
+BitVector *AffinityMask = nullptr);
 
   /// Return true if the given arguments fit within system-specific
   /// argument length limits.

diff  --git a/llvm/lib/Support/Program.cpp b/llvm/lib/Support/Program.cpp
index 5294f65bd5a5..c7a59642b27e 100644
--- a/llvm/lib/Support/Program.cpp
+++ b/llvm/lib/Support/Program.cpp
@@ -26,17 +26,20 @@ using namespace sys;
 static bool Execute(ProcessInfo &PI, StringRef Program,
 ArrayRef Args, Optional> 
Env,
 ArrayRef> Redirects,
-unsigned MemoryLimit, std::string *ErrMsg);
+unsigned MemoryLimit, std::string *ErrMsg,
+BitVector *AffinityMask);
 
 int sys::ExecuteAndWait(StringRef Program, ArrayRef Args,
 Optional> Env,
 ArrayRef> Redirects,
 unsigned SecondsToWait, unsigned MemoryLimit,
 std::string *ErrMsg, bool *ExecutionFailed,
-Optional *ProcStat) {
+Optional *ProcStat,
+BitVector *AffinityMask) {
   assert(Redirects.empty() || Redirects.size() == 3);
   ProcessInfo PI;
-  if (Execute(PI, Program, Args, Env, Redirects, MemoryLimit, ErrMsg)) {
+  if (Execute(PI, Program, Args, Env, Redirects, MemoryLimit, ErrMsg,
+  AffinityMask)) {
 if (ExecutionFailed)
   *ExecutionFailed = false;
 ProcessInfo Result =
@@ -55,12 +58,13 @@ ProcessInfo sys::ExecuteNoWait(StringRef Program, 
ArrayRef Args,
Optional> Env,
ArrayRef> Redirects,
unsigned MemoryLimit, std::string *ErrMsg,
-   bool *ExecutionFailed) {
+   bool *ExecutionFailed, BitVector *AffinityMask) 
{
   assert(Redirects.empty() || Redirects.size() == 3);
   ProcessInfo PI;
   if (ExecutionFailed)
 *ExecutionFailed = false;
-  if (!Execute(PI, Program, Args, Env, Redirects, Memor

[llvm-branch-commits] [llvm] ff40fb0 - [PowerPC] Try to fold sqrt/sdiv test results with the branch.

2021-01-13 Thread via llvm-branch-commits


Author: Esme-Yi
Date: 2021-01-14T02:15:19Z
New Revision: ff40fb07ad6309131c2448ca00572a078c7a2d59

URL: 
https://github.com/llvm/llvm-project/commit/ff40fb07ad6309131c2448ca00572a078c7a2d59
DIFF: 
https://github.com/llvm/llvm-project/commit/ff40fb07ad6309131c2448ca00572a078c7a2d59.diff

LOG: [PowerPC] Try to fold sqrt/sdiv test results with the branch.

Summary: The patch tries to fold sqrt/sdiv test node, i.g FTSQRT, XVTDIVDP, and 
the branch, i.e br_cc if they meet these patterns:
(br_cc seteq, (truncateToi1 SWTestOp), 0) -> (BCC PRED_NU, SWTestOp)
(br_cc seteq, (and SWTestOp, 2), 0) -> (BCC PRED_NE, SWTestOp)
(br_cc seteq, (and SWTestOp, 4), 0) -> (BCC PRED_LE, SWTestOp)
(br_cc seteq, (and SWTestOp, 8), 0) -> (BCC PRED_GE, SWTestOp)
(br_cc setne, (truncateToi1 SWTestOp), 0) -> (BCC PRED_UN, SWTestOp)
(br_cc setne, (and SWTestOp, 2), 0) -> (BCC PRED_EQ, SWTestOp)
(br_cc setne, (and SWTestOp, 4), 0) -> (BCC PRED_GT, SWTestOp)
(br_cc setne, (and SWTestOp, 8), 0) -> (BCC PRED_LT, SWTestOp)

Reviewed By: steven.zhang

Differential Revision: https://reviews.llvm.org/D94054

Added: 
llvm/test/CodeGen/PowerPC/fold_swtest_br.ll

Modified: 
llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp

Removed: 




diff  --git a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp 
b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
index 07b81a4325fc..693b0adaede4 100644
--- a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
@@ -352,6 +352,7 @@ namespace {
 
 private:
 bool trySETCC(SDNode *N);
+bool tryFoldSWTestBRCC(SDNode *N);
 bool tryAsSingleRLDICL(SDNode *N);
 bool tryAsSingleRLDICR(SDNode *N);
 bool tryAsSingleRLWINM(SDNode *N);
@@ -4378,6 +4379,81 @@ static bool mayUseP9Setb(SDNode *N, const ISD::CondCode 
&CC, SelectionDAG *DAG,
   return true;
 }
 
+// Return true if it's a software square-root/divide operand.
+static bool isSWTestOp(SDValue N) {
+  if (N.getOpcode() == PPCISD::FTSQRT)
+return true;
+  if (N.getNumOperands() < 1 || !isa(N.getOperand(0)))
+return false;
+  switch (N.getConstantOperandVal(0)) {
+  case Intrinsic::ppc_vsx_xvtdivdp:
+  case Intrinsic::ppc_vsx_xvtdivsp:
+  case Intrinsic::ppc_vsx_xvtsqrtdp:
+  case Intrinsic::ppc_vsx_xvtsqrtsp:
+return true;
+  }
+  return false;
+}
+
+bool PPCDAGToDAGISel::tryFoldSWTestBRCC(SDNode *N) {
+  assert(N->getOpcode() == ISD::BR_CC && "ISD::BR_CC is expected.");
+  // We are looking for following patterns, where `truncate to i1` actually has
+  // the same semantic with `and 1`.
+  // (br_cc seteq, (truncateToi1 SWTestOp), 0) -> (BCC PRED_NU, SWTestOp)
+  // (br_cc seteq, (and SWTestOp, 2), 0) -> (BCC PRED_NE, SWTestOp)
+  // (br_cc seteq, (and SWTestOp, 4), 0) -> (BCC PRED_LE, SWTestOp)
+  // (br_cc seteq, (and SWTestOp, 8), 0) -> (BCC PRED_GE, SWTestOp)
+  // (br_cc setne, (truncateToi1 SWTestOp), 0) -> (BCC PRED_UN, SWTestOp)
+  // (br_cc setne, (and SWTestOp, 2), 0) -> (BCC PRED_EQ, SWTestOp)
+  // (br_cc setne, (and SWTestOp, 4), 0) -> (BCC PRED_GT, SWTestOp)
+  // (br_cc setne, (and SWTestOp, 8), 0) -> (BCC PRED_LT, SWTestOp)
+  ISD::CondCode CC = cast(N->getOperand(1))->get();
+  if (CC != ISD::SETEQ && CC != ISD::SETNE)
+return false;
+
+  SDValue CmpRHS = N->getOperand(3);
+  if (!isa(CmpRHS) ||
+  cast(CmpRHS)->getSExtValue() != 0)
+return false;
+
+  SDValue CmpLHS = N->getOperand(2);
+  if (CmpLHS.getNumOperands() < 1 || !isSWTestOp(CmpLHS.getOperand(0)))
+return false;
+
+  unsigned PCC = 0;
+  bool IsCCNE = CC == ISD::SETNE;
+  if (CmpLHS.getOpcode() == ISD::AND &&
+  isa(CmpLHS.getOperand(1)))
+switch (CmpLHS.getConstantOperandVal(1)) {
+case 1:
+  PCC = IsCCNE ? PPC::PRED_UN : PPC::PRED_NU;
+  break;
+case 2:
+  PCC = IsCCNE ? PPC::PRED_EQ : PPC::PRED_NE;
+  break;
+case 4:
+  PCC = IsCCNE ? PPC::PRED_GT : PPC::PRED_LE;
+  break;
+case 8:
+  PCC = IsCCNE ? PPC::PRED_LT : PPC::PRED_GE;
+  break;
+default:
+  return false;
+}
+  else if (CmpLHS.getOpcode() == ISD::TRUNCATE &&
+   CmpLHS.getValueType() == MVT::i1)
+PCC = IsCCNE ? PPC::PRED_UN : PPC::PRED_NU;
+
+  if (PCC) {
+SDLoc dl(N);
+SDValue Ops[] = {getI32Imm(PCC, dl), CmpLHS.getOperand(0), 
N->getOperand(4),
+ N->getOperand(0)};
+CurDAG->SelectNodeTo(N, PPC::BCC, MVT::Other, Ops);
+return true;
+  }
+  return false;
+}
+
 bool PPCDAGToDAGISel::tryAsSingleRLWINM(SDNode *N) {
   assert(N->getOpcode() == ISD::AND && "ISD::AND SDNode expected");
   unsigned Imm;
@@ -5247,6 +5323,8 @@ void PPCDAGToDAGISel::Select(SDNode *N) {
 return;
   }
   case ISD::BR_CC: {
+if (tryFoldSWTestBRCC(N))
+  return;
 ISD::CondCode CC = cast(N->getOperand(1))->get();
 unsigned PCC =
 getPredicateForSetCC(CC, N->getOperand(2).getValueType(), Subtarget);

diff  --git a/llvm/test/CodeGen/PowerPC/fold_swtest_br.

[llvm-branch-commits] [llvm] eec8568 - Revert "[Support] On Windows, take the affinity mask into account"

2021-01-13 Thread Alexandre Ganea via llvm-branch-commits


Author: Alexandre Ganea
Date: 2021-01-13T21:34:54-05:00
New Revision: eec856848ccc481b2704ebf64d725e635a3d7dca

URL: 
https://github.com/llvm/llvm-project/commit/eec856848ccc481b2704ebf64d725e635a3d7dca
DIFF: 
https://github.com/llvm/llvm-project/commit/eec856848ccc481b2704ebf64d725e635a3d7dca.diff

LOG: Revert "[Support] On Windows, take the affinity mask into account"

This reverts commit 336ab2d51dfdd5ca09c2a9c506453db4fe653584.

Added: 


Modified: 
llvm/include/llvm/Support/Program.h
llvm/lib/Support/Program.cpp
llvm/lib/Support/Unix/Program.inc
llvm/lib/Support/Windows/Program.inc
llvm/lib/Support/Windows/Threading.inc
llvm/unittests/Support/ThreadPool.cpp

Removed: 




diff  --git a/llvm/include/llvm/Support/Program.h 
b/llvm/include/llvm/Support/Program.h
index bfd271958788..b32de47adb57 100644
--- a/llvm/include/llvm/Support/Program.h
+++ b/llvm/include/llvm/Support/Program.h
@@ -14,7 +14,6 @@
 #define LLVM_SUPPORT_PROGRAM_H
 
 #include "llvm/ADT/ArrayRef.h"
-#include "llvm/ADT/BitVector.h"
 #include "llvm/ADT/Optional.h"
 #include "llvm/ADT/StringRef.h"
 #include "llvm/Config/llvm-config.h"
@@ -126,11 +125,9 @@ namespace sys {
   ///< string is non-empty upon return an error occurred while invoking the
   ///< program.
   bool *ExecutionFailed = nullptr,
-  Optional *ProcStat = nullptr, ///< If non-zero,
-  /// provides a pointer to a structure in which process execution
-  /// statistics will be stored.
-  BitVector *AffinityMask = nullptr ///< CPUs or processors the new
-/// program shall run on.
+  Optional *ProcStat = nullptr ///< If non-zero, 
provides
+  /// a pointer to a structure in which process execution statistics will 
be
+  /// stored.
   );
 
   /// Similar to ExecuteAndWait, but returns immediately.
@@ -143,8 +140,7 @@ namespace sys {
 ArrayRef> Redirects = {},
 unsigned MemoryLimit = 0,
 std::string *ErrMsg = nullptr,
-bool *ExecutionFailed = nullptr,
-BitVector *AffinityMask = nullptr);
+bool *ExecutionFailed = nullptr);
 
   /// Return true if the given arguments fit within system-specific
   /// argument length limits.

diff  --git a/llvm/lib/Support/Program.cpp b/llvm/lib/Support/Program.cpp
index c7a59642b27e..5294f65bd5a5 100644
--- a/llvm/lib/Support/Program.cpp
+++ b/llvm/lib/Support/Program.cpp
@@ -26,20 +26,17 @@ using namespace sys;
 static bool Execute(ProcessInfo &PI, StringRef Program,
 ArrayRef Args, Optional> 
Env,
 ArrayRef> Redirects,
-unsigned MemoryLimit, std::string *ErrMsg,
-BitVector *AffinityMask);
+unsigned MemoryLimit, std::string *ErrMsg);
 
 int sys::ExecuteAndWait(StringRef Program, ArrayRef Args,
 Optional> Env,
 ArrayRef> Redirects,
 unsigned SecondsToWait, unsigned MemoryLimit,
 std::string *ErrMsg, bool *ExecutionFailed,
-Optional *ProcStat,
-BitVector *AffinityMask) {
+Optional *ProcStat) {
   assert(Redirects.empty() || Redirects.size() == 3);
   ProcessInfo PI;
-  if (Execute(PI, Program, Args, Env, Redirects, MemoryLimit, ErrMsg,
-  AffinityMask)) {
+  if (Execute(PI, Program, Args, Env, Redirects, MemoryLimit, ErrMsg)) {
 if (ExecutionFailed)
   *ExecutionFailed = false;
 ProcessInfo Result =
@@ -58,13 +55,12 @@ ProcessInfo sys::ExecuteNoWait(StringRef Program, 
ArrayRef Args,
Optional> Env,
ArrayRef> Redirects,
unsigned MemoryLimit, std::string *ErrMsg,
-   bool *ExecutionFailed, BitVector *AffinityMask) 
{
+   bool *ExecutionFailed) {
   assert(Redirects.empty() || Redirects.size() == 3);
   ProcessInfo PI;
   if (ExecutionFailed)
 *ExecutionFailed = false;
-  if (!Execute(PI, Program, Args, Env, Redirects, MemoryLimit, ErrMsg,
-   AffinityMask))
+  if (!Execute(PI, Program, Args, Env, Redirects, MemoryLimit, ErrMsg))
 if (ExecutionFailed)
   *ExecutionFailed = true;
 

diff  --git a/llvm/lib/Support/Unix/Program.inc 
b/llvm/lib/Support/Unix/Program.inc
index fb56fa4b0d1d..8f41fc015163 100644
--- a/llvm/lib/Support/Unix/Program.inc
+++ b/llvm/lib/Support/Unix/Program.inc
@@ -174,8 +174,7 @@ toNullTerminatedCStringArray(ArrayRef Strings, 
StringSaver &Saver) {
 static bool Execute(ProcessInfo &PI, StringRef Program,
 ArrayRef Args, Optional> 
Env,
 ArrayRef> Redirects,
-

[llvm-branch-commits] [llvm] 9abac60 - ADT: Fix reference invalidation in SmallVector::push_back and single-element insert

2021-01-13 Thread Duncan P. N. Exon Smith via llvm-branch-commits


Author: Duncan P. N. Exon Smith
Date: 2021-01-13T18:58:24-08:00
New Revision: 9abac60309006db00eca0af406c2e16bef26807c

URL: 
https://github.com/llvm/llvm-project/commit/9abac60309006db00eca0af406c2e16bef26807c
DIFF: 
https://github.com/llvm/llvm-project/commit/9abac60309006db00eca0af406c2e16bef26807c.diff

LOG: ADT: Fix reference invalidation in SmallVector::push_back and 
single-element insert

For small enough, trivially copyable `T`, take the argument by value in
`SmallVector::push_back` and copy it when forwarding to
`SmallVector::insert_one_impl`. Otherwise, when growing, update the
argument appropriately.

Differential Revision: https://reviews.llvm.org/D93779

Added: 


Modified: 
llvm/include/llvm/ADT/SmallVector.h
llvm/unittests/ADT/SmallVectorTest.cpp

Removed: 




diff  --git a/llvm/include/llvm/ADT/SmallVector.h 
b/llvm/include/llvm/ADT/SmallVector.h
index 803588143d81..f5293970aa9f 100644
--- a/llvm/include/llvm/ADT/SmallVector.h
+++ b/llvm/include/llvm/ADT/SmallVector.h
@@ -220,6 +220,23 @@ class SmallVectorTemplateCommon
   }
   void assertSafeToEmplace() {}
 
+  /// Reserve enough space to add one element, and return the updated element
+  /// pointer in case it was a reference to the storage.
+  template 
+  static const T *reserveForAndGetAddressImpl(U *This, const T &Elt) {
+if (LLVM_LIKELY(This->size() < This->capacity()))
+  return &Elt;
+
+bool ReferencesStorage = false;
+int64_t Index = -1;
+if (LLVM_UNLIKELY(This->isReferenceToStorage(&Elt))) {
+  ReferencesStorage = true;
+  Index = &Elt - This->begin();
+}
+This->grow();
+return ReferencesStorage ? This->begin() + Index : &Elt;
+  }
+
 public:
   using size_type = size_t;
   using 
diff erence_type = ptr
diff _t;
@@ -303,7 +320,12 @@ template ::value) &&
  (is_trivially_move_constructible::value) &&
  std::is_trivially_destructible::value>
 class SmallVectorTemplateBase : public SmallVectorTemplateCommon {
+  friend class SmallVectorTemplateCommon;
+
 protected:
+  static constexpr bool TakesParamByValue = false;
+  using ValueParamT = const T &;
+
   SmallVectorTemplateBase(size_t Size) : SmallVectorTemplateCommon(Size) {}
 
   static void destroy_range(T *S, T *E) {
@@ -333,20 +355,28 @@ class SmallVectorTemplateBase : public 
SmallVectorTemplateCommon {
   /// element, or MinSize more elements if specified.
   void grow(size_t MinSize = 0);
 
+  /// Reserve enough space to add one element, and return the updated element
+  /// pointer in case it was a reference to the storage.
+  const T *reserveForAndGetAddress(const T &Elt) {
+return this->reserveForAndGetAddressImpl(this, Elt);
+  }
+
+  /// Reserve enough space to add one element, and return the updated element
+  /// pointer in case it was a reference to the storage.
+  T *reserveForAndGetAddress(T &Elt) {
+return const_cast(this->reserveForAndGetAddressImpl(this, Elt));
+  }
+
 public:
   void push_back(const T &Elt) {
-this->assertSafeToAdd(&Elt);
-if (LLVM_UNLIKELY(this->size() >= this->capacity()))
-  this->grow();
-::new ((void*) this->end()) T(Elt);
+const T *EltPtr = reserveForAndGetAddress(Elt);
+::new ((void *)this->end()) T(*EltPtr);
 this->set_size(this->size() + 1);
   }
 
   void push_back(T &&Elt) {
-this->assertSafeToAdd(&Elt);
-if (LLVM_UNLIKELY(this->size() >= this->capacity()))
-  this->grow();
-::new ((void*) this->end()) T(::std::move(Elt));
+T *EltPtr = reserveForAndGetAddress(Elt);
+::new ((void *)this->end()) T(::std::move(*EltPtr));
 this->set_size(this->size() + 1);
   }
 
@@ -396,7 +426,18 @@ void SmallVectorTemplateBase::grow(size_t MinSize) {
 /// skipping destruction.
 template 
 class SmallVectorTemplateBase : public SmallVectorTemplateCommon {
+  friend class SmallVectorTemplateCommon;
+
 protected:
+  /// True if it's cheap enough to take parameters by value. Doing so avoids
+  /// overhead related to mitigations for reference invalidation.
+  static constexpr bool TakesParamByValue = sizeof(T) <= 2 * sizeof(void *);
+
+  /// Either const T& or T, depending on whether it's cheap enough to take
+  /// parameters by value.
+  using ValueParamT =
+  typename std::conditional::type;
+
   SmallVectorTemplateBase(size_t Size) : SmallVectorTemplateCommon(Size) {}
 
   // No need to do a destroy loop for POD's.
@@ -437,12 +478,22 @@ class SmallVectorTemplateBase : public 
SmallVectorTemplateCommon {
   /// least one more element or MinSize if specified.
   void grow(size_t MinSize = 0) { this->grow_pod(MinSize, sizeof(T)); }
 
+  /// Reserve enough space to add one element, and return the updated element
+  /// pointer in case it was a reference to the storage.
+  const T *reserveForAndGetAddress(const T &Elt) {
+return this->reserveForAndGetAddressImpl(this, Elt);
+  }
+
+  /// Reserve

[llvm-branch-commits] [llvm] b196dc6 - [NFC] Remove unused entry in PassRegistry.def

2021-01-13 Thread Arthur Eubanks via llvm-branch-commits


Author: Arthur Eubanks
Date: 2021-01-13T19:01:07-08:00
New Revision: b196dc6607233d6235846b4a1bde70a6e0cc8512

URL: 
https://github.com/llvm/llvm-project/commit/b196dc6607233d6235846b4a1bde70a6e0cc8512
DIFF: 
https://github.com/llvm/llvm-project/commit/b196dc6607233d6235846b4a1bde70a6e0cc8512.diff

LOG: [NFC] Remove unused entry in PassRegistry.def

Added: 


Modified: 
llvm/lib/Passes/PassRegistry.def

Removed: 




diff  --git a/llvm/lib/Passes/PassRegistry.def 
b/llvm/lib/Passes/PassRegistry.def
index 3070c84dcb29..5e16f6405833 100644
--- a/llvm/lib/Passes/PassRegistry.def
+++ b/llvm/lib/Passes/PassRegistry.def
@@ -101,8 +101,6 @@ MODULE_PASS("scc-oz-module-inliner",
   buildInlinerPipeline(OptimizationLevel::Oz, ThinOrFullLTOPhase::None, 
   /*MandatoryOnly=*/false))
 MODULE_PASS("loop-extract-single", LoopExtractorPass(1))
-MODULE_PASS("oz-module-optimizer",
-  buildModuleOptimizationPipeline(OptimizationLevel::Oz, /*LTOPreLink*/false))
 MODULE_PASS("strip", StripSymbolsPass())
 MODULE_PASS("strip-dead-debug-info", StripDeadDebugInfoPass())
 MODULE_PASS("pseudo-probe", SampleProfileProbePass(TM))



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[llvm-branch-commits] [llvm] 56d1ffb - Revert "ADT: Fix reference invalidation in SmallVector::push_back and single-element insert"

2021-01-13 Thread Duncan P. N. Exon Smith via llvm-branch-commits


Author: Duncan P. N. Exon Smith
Date: 2021-01-13T19:04:20-08:00
New Revision: 56d1ffb927d03958a7a31442596df749264a7792

URL: 
https://github.com/llvm/llvm-project/commit/56d1ffb927d03958a7a31442596df749264a7792
DIFF: 
https://github.com/llvm/llvm-project/commit/56d1ffb927d03958a7a31442596df749264a7792.diff

LOG: Revert "ADT: Fix reference invalidation in SmallVector::push_back and 
single-element insert"

This reverts commit 9abac60309006db00eca0af406c2e16bef26807c since there
are some bot errors on Windows:
http://lab.llvm.org:8011/#/builders/127/builds/4489

```
FAILED: lib/Support/CMakeFiles/LLVMSupport.dir/IntervalMap.cpp.obj
C:\PROGRA~2\MIB055~1\2017\PROFES~1\VC\Tools\MSVC\1416~1.270\bin\Hostx64\x64\cl.exe
  /nologo /TP -DGTEST_HAS_RTTI=0 -DUNICODE -D_CRT_NONSTDC_NO_DEPRECATE 
-D_CRT_NONSTDC_NO_WARNINGS -D_CRT_SECURE_NO_DEPRECATE -D_CRT_SECURE_NO_WARNINGS 
-D_HAS_EXCEPTIONS=0 -D_SCL_SECURE_NO_DEPRECATE -D_SCL_SECURE_NO_WARNINGS 
-D_UNICODE -D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS 
-D__STDC_LIMIT_MACROS -Ilib\Support 
-IC:\b\slave\sanitizer-windows\llvm-project\llvm\lib\Support -Iinclude 
-IC:\b\slave\sanitizer-windows\llvm-project\llvm\include /DWIN32 /D_WINDOWS   
/Zc:inline /Zc:__cplusplus /Zi /Zc:strictStrings /Oi /Zc:rvalueCast /bigobj /W4 
-wd4141 -wd4146 -wd4244 -wd4267 -wd4291 -wd4351 -wd4456 -wd4457 -wd4458 -wd4459 
-wd4503 -wd4624 -wd4722 -wd4100 -wd4127 -wd4512 -wd4505 -wd4610 -wd4510 -wd4702 
-wd4245 -wd4706 -wd4310 -wd4701 -wd4703 -wd4389 -wd4611 -wd4805 -wd4204 -wd4577 
-wd4091 -wd4592 -wd4319 -wd4709 -wd4324 -w14062 -we4238 /Gw /MD /O2 /Ob2 
-UNDEBUG -std:c++14  /EHs-c- /GR- /showIncludes 
/Folib\Support\CMakeFiles\LLVMSupport.dir\IntervalMap.cpp.obj 
/Fdlib\Support\CMakeFiles\LLVMSupport.dir\LLVMSupport.pdb /FS -c 
C:\b\slave\sanitizer-windows\llvm-project\llvm\lib\Support\IntervalMap.cpp
C:\b\slave\sanitizer-windows\llvm-project\llvm\include\llvm/ADT/SmallVector.h(746):
 error C2672: 'llvm::SmallVectorImpl::insert_one_maybe_copy': no matching 
overloaded function found
with
[
T=llvm::IntervalMapImpl::Path::Entry
]
C:\b\slave\sanitizer-windows\llvm-project\llvm\include\llvm/ADT/SmallVector.h(745):
 note: while compiling class template member function 
'llvm::IntervalMapImpl::Path::Entry 
*llvm::SmallVectorImpl::insert(llvm::IntervalMapImpl::Path::Entry *,T &&)'
with
[
T=llvm::IntervalMapImpl::Path::Entry
]
C:\b\slave\sanitizer-windows\llvm-project\llvm\lib\Support\IntervalMap.cpp(22): 
note: see reference to function template instantiation 
'llvm::IntervalMapImpl::Path::Entry 
*llvm::SmallVectorImpl::insert(llvm::IntervalMapImpl::Path::Entry *,T &&)' 
being compiled
with
[
T=llvm::IntervalMapImpl::Path::Entry
]
C:\b\slave\sanitizer-windows\llvm-project\llvm\include\llvm/ADT/SmallVector.h(1136):
 note: see reference to class template instantiation 'llvm::SmallVectorImpl' 
being compiled
with
[
T=llvm::IntervalMapImpl::Path::Entry
]
C:\b\slave\sanitizer-windows\llvm-project\llvm\include\llvm/ADT/IntervalMap.h(790):
 note: see reference to class template instantiation 
'llvm::SmallVector' being compiled
C:\b\slave\sanitizer-windows\llvm-project\llvm\include\llvm/ADT/SmallVector.h(746):
 error C2783: 'llvm::IntervalMapImpl::Path::Entry 
*llvm::SmallVectorImpl::insert_one_maybe_copy(llvm::IntervalMapImpl::Path::Entry
 *,ArgType &&)': could not deduce template argument for '__formal'
with
[
T=llvm::IntervalMapImpl::Path::Entry
]
C:\b\slave\sanitizer-windows\llvm-project\llvm\include\llvm/ADT/SmallVector.h(727):
 note: see declaration of 'llvm::SmallVectorImpl::insert_one_maybe_copy'
with
[
T=llvm::IntervalMapImpl::Path::Entry
]
```

Added: 


Modified: 
llvm/include/llvm/ADT/SmallVector.h
llvm/unittests/ADT/SmallVectorTest.cpp

Removed: 




diff  --git a/llvm/include/llvm/ADT/SmallVector.h 
b/llvm/include/llvm/ADT/SmallVector.h
index f5293970aa9f..803588143d81 100644
--- a/llvm/include/llvm/ADT/SmallVector.h
+++ b/llvm/include/llvm/ADT/SmallVector.h
@@ -220,23 +220,6 @@ class SmallVectorTemplateCommon
   }
   void assertSafeToEmplace() {}
 
-  /// Reserve enough space to add one element, and return the updated element
-  /// pointer in case it was a reference to the storage.
-  template 
-  static const T *reserveForAndGetAddressImpl(U *This, const T &Elt) {
-if (LLVM_LIKELY(This->size() < This->capacity()))
-  return &Elt;
-
-bool ReferencesStorage = false;
-int64_t Index = -1;
-if (LLVM_UNLIKELY(This->isReferenceToStorage(&Elt))) {
-  ReferencesStorage = true;
-  Index = &Elt - This->begin();
-}
-This->grow();
-return ReferencesStorage ? This->begin() + Index : &Elt;
-  }
-
 public:
   using size_type = size_t;
   using 
diff erence_typ

[llvm-branch-commits] [llvm] 5c1c39e - [llvm] Use *Set::contains (NFC)

2021-01-13 Thread Kazu Hirata via llvm-branch-commits


Author: Kazu Hirata
Date: 2021-01-13T19:14:41-08:00
New Revision: 5c1c39e8d808d7d08a2c3c5ed192d543a55f685c

URL: 
https://github.com/llvm/llvm-project/commit/5c1c39e8d808d7d08a2c3c5ed192d543a55f685c
DIFF: 
https://github.com/llvm/llvm-project/commit/5c1c39e8d808d7d08a2c3c5ed192d543a55f685c.diff

LOG: [llvm] Use *Set::contains (NFC)

Added: 


Modified: 
llvm/include/llvm/ADT/DepthFirstIterator.h
llvm/include/llvm/Analysis/DivergenceAnalysis.h
llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
llvm/lib/Analysis/IRSimilarityIdentifier.cpp
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
llvm/lib/ExecutionEngine/MCJIT/MCJIT.h
llvm/lib/Transforms/IPO/IROutliner.cpp

Removed: 




diff  --git a/llvm/include/llvm/ADT/DepthFirstIterator.h 
b/llvm/include/llvm/ADT/DepthFirstIterator.h
index 11967f5eefcc..5bfea28332b2 100644
--- a/llvm/include/llvm/ADT/DepthFirstIterator.h
+++ b/llvm/include/llvm/ADT/DepthFirstIterator.h
@@ -198,7 +198,7 @@ class df_iterator
   // nodes that a depth first iteration did not find: ie unreachable nodes.
   //
   bool nodeVisited(NodeRef Node) const {
-return this->Visited.count(Node) != 0;
+return this->Visited.contains(Node);
   }
 
   /// getPathLength - Return the length of the path from the entry node to the

diff  --git a/llvm/include/llvm/Analysis/DivergenceAnalysis.h 
b/llvm/include/llvm/Analysis/DivergenceAnalysis.h
index 8a32bfbcc758..2e4ae65d0981 100644
--- a/llvm/include/llvm/Analysis/DivergenceAnalysis.h
+++ b/llvm/include/llvm/Analysis/DivergenceAnalysis.h
@@ -118,7 +118,7 @@ class DivergenceAnalysis {
   ///
   /// (see markBlockJoinDivergent).
   bool isJoinDivergent(const BasicBlock &Block) const {
-return DivergentJoinBlocks.find(&Block) != DivergentJoinBlocks.end();
+return DivergentJoinBlocks.contains(&Block);
   }
 
 private:

diff  --git 
a/llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h 
b/llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
index 7e5a723991d4..2f80b4373b46 100644
--- a/llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
+++ b/llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
@@ -339,7 +339,7 @@ class LoopVectorizationLegality {
 
   /// Returns true if vector representation of the instruction \p I
   /// requires mask.
-  bool isMaskRequired(const Instruction *I) { return (MaskedOp.count(I) != 0); 
}
+  bool isMaskRequired(const Instruction *I) { return MaskedOp.contains(I); }
 
   unsigned getNumStores() const { return LAI->getNumStores(); }
   unsigned getNumLoads() const { return LAI->getNumLoads(); }

diff  --git a/llvm/lib/Analysis/IRSimilarityIdentifier.cpp 
b/llvm/lib/Analysis/IRSimilarityIdentifier.cpp
index 60b4f427e189..d8403abc3027 100644
--- a/llvm/lib/Analysis/IRSimilarityIdentifier.cpp
+++ b/llvm/lib/Analysis/IRSimilarityIdentifier.cpp
@@ -402,7 +402,7 @@ static bool checkNumberingAndReplaceCommutative(
 DenseSet NewSet;
 for (unsigned &Curr : ValueMappingIt->second)
   // If we can find the value in the mapping, we add it to the new set.
-  if (TargetValueNumbers.find(Curr) != TargetValueNumbers.end())
+  if (TargetValueNumbers.contains(Curr))
 NewSet.insert(Curr);
 
 // If we could not find a Value, return 0.

diff  --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp 
b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 7e4ee3bd..24bc7fe7e0ad 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -1928,7 +1928,7 @@ SDValue DAGCombiner::visitTokenFactor(SDNode *N) {
   auto AddToWorklist = [&](unsigned CurIdx, SDNode *Op, unsigned OpNumber) {
 // If this is an Op, we can remove the op from the list. Remark any
 // search associated with it as from the current OpNumber.
-if (SeenOps.count(Op) != 0) {
+if (SeenOps.contains(Op)) {
   Changed = true;
   DidPruneOps = true;
   unsigned OrigOpNumber = 0;

diff  --git a/llvm/lib/ExecutionEngine/MCJIT/MCJIT.h 
b/llvm/lib/ExecutionEngine/MCJIT/MCJIT.h
index 83b64b5171c0..52e7eda90310 100644
--- a/llvm/lib/ExecutionEngine/MCJIT/MCJIT.h
+++ b/llvm/lib/ExecutionEngine/MCJIT/MCJIT.h
@@ -102,22 +102,22 @@ class MCJIT : public ExecutionEngine {
 }
 
 bool hasModuleBeenAddedButNotLoaded(Module *M) {
-  return AddedModules.count(M) != 0;
+  return AddedModules.contains(M);
 }
 
 bool hasModuleBeenLoaded(Module *M) {
   // If the module is in either the "loaded" or "finalized" sections it
   // has been loaded.
-  return (LoadedModules.count(M) != 0 ) || (FinalizedModules.count(M) != 
0);
+  return LoadedModules.contains(M) || FinalizedModules.contains(M);
 }
 
 bool hasModuleBeenFinalized(Module *M) {
-  return FinalizedModules.count(M) != 0;
+  return FinalizedModules.contains(M);
 }
 
 bool ownsModule(

[llvm-branch-commits] [llvm] 125ea20 - [llvm] Use llvm::stable_sort (NFC)

2021-01-13 Thread Kazu Hirata via llvm-branch-commits


Author: Kazu Hirata
Date: 2021-01-13T19:14:43-08:00
New Revision: 125ea20d55c554fbe14eb1f6cff7d44a720a51f5

URL: 
https://github.com/llvm/llvm-project/commit/125ea20d55c554fbe14eb1f6cff7d44a720a51f5
DIFF: 
https://github.com/llvm/llvm-project/commit/125ea20d55c554fbe14eb1f6cff7d44a720a51f5.diff

LOG: [llvm] Use llvm::stable_sort (NFC)

Added: 


Modified: 
llvm/lib/CodeGen/SafeStackLayout.cpp
llvm/lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.cpp
llvm/lib/Transforms/IPO/IROutliner.cpp
llvm/lib/Transforms/Scalar/SROA.cpp
llvm/utils/TableGen/DAGISelEmitter.cpp
llvm/utils/TableGen/GlobalISelEmitter.cpp
llvm/utils/TableGen/RegisterInfoEmitter.cpp
llvm/utils/TableGen/SearchableTableEmitter.cpp

Removed: 




diff  --git a/llvm/lib/CodeGen/SafeStackLayout.cpp 
b/llvm/lib/CodeGen/SafeStackLayout.cpp
index f333e5046ec6..5bd4f4d60d73 100644
--- a/llvm/lib/CodeGen/SafeStackLayout.cpp
+++ b/llvm/lib/CodeGen/SafeStackLayout.cpp
@@ -140,10 +140,10 @@ void StackLayout::computeLayout() {
 
   // Sort objects by size (largest first) to reduce fragmentation.
   if (StackObjects.size() > 2)
-std::stable_sort(StackObjects.begin() + 1, StackObjects.end(),
- [](const StackObject &a, const StackObject &b) {
-   return a.Size > b.Size;
- });
+llvm::stable_sort(drop_begin(StackObjects, 1),
+  [](const StackObject &a, const StackObject &b) {
+return a.Size > b.Size;
+  });
 
   for (auto &Obj : StackObjects)
 layoutObject(Obj);

diff  --git a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.cpp 
b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.cpp
index 2788b86181e2..8a44ba32606e 100644
--- a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.cpp
+++ b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.cpp
@@ -326,7 +326,7 @@ bool 
HexagonShuffler::ValidResourceUsage(HexagonPacketSummary const &Summary) {
   }
 
   // Verify the CVI slot subscriptions.
-  std::stable_sort(begin(), end(), HexagonInstr::lessCVI);
+  llvm::stable_sort(*this, HexagonInstr::lessCVI);
   // create vector of hvx instructions to check
   HVXInstsT hvxInsts;
   hvxInsts.clear();
@@ -609,8 +609,7 @@ llvm::Optional
 HexagonShuffler::tryAuction(HexagonPacketSummary const &Summary) const {
   HexagonPacket PacketResult = Packet;
   HexagonUnitAuction AuctionCore(Summary.ReservedSlotMask);
-  std::stable_sort(PacketResult.begin(), PacketResult.end(),
-   HexagonInstr::lessCore);
+  llvm::stable_sort(PacketResult, HexagonInstr::lessCore);
 
   const bool ValidSlots =
   llvm::all_of(insts(PacketResult), [&AuctionCore](HexagonInstr const &I) {

diff  --git a/llvm/lib/Transforms/IPO/IROutliner.cpp 
b/llvm/lib/Transforms/IPO/IROutliner.cpp
index da9ac99ff802..281b182b8022 100644
--- a/llvm/lib/Transforms/IPO/IROutliner.cpp
+++ b/llvm/lib/Transforms/IPO/IROutliner.cpp
@@ -554,7 +554,7 @@ static void getCodeExtractorArguments(
 
   // Sort the GVNs, since we now have constants included in the \ref InputGVNs
   // we need to make sure they are in a deterministic order.
-  stable_sort(InputGVNs.begin(), InputGVNs.end());
+  stable_sort(InputGVNs);
 }
 
 /// Look over the inputs and map each input argument to an argument in the

diff  --git a/llvm/lib/Transforms/Scalar/SROA.cpp 
b/llvm/lib/Transforms/Scalar/SROA.cpp
index 0805cb52db7b..1a0180a77afb 100644
--- a/llvm/lib/Transforms/Scalar/SROA.cpp
+++ b/llvm/lib/Transforms/Scalar/SROA.cpp
@@ -1076,7 +1076,7 @@ AllocaSlices::AllocaSlices(const DataLayout &DL, 
AllocaInst &AI)
 
   // Sort the uses. This arranges for the offsets to be in ascending order,
   // and the sizes to be in descending order.
-  std::stable_sort(Slices.begin(), Slices.end());
+  llvm::stable_sort(Slices);
 }
 
 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)

diff  --git a/llvm/utils/TableGen/DAGISelEmitter.cpp 
b/llvm/utils/TableGen/DAGISelEmitter.cpp
index 1652281b5193..32ed0bf98743 100644
--- a/llvm/utils/TableGen/DAGISelEmitter.cpp
+++ b/llvm/utils/TableGen/DAGISelEmitter.cpp
@@ -159,8 +159,7 @@ void DAGISelEmitter::run(raw_ostream &OS) {
 
   // We want to process the matches in order of minimal cost.  Sort the 
patterns
   // so the least cost one is at the start.
-  std::stable_sort(Patterns.begin(), Patterns.end(),
-   PatternSortingPredicate(CGP));
+  llvm::stable_sort(Patterns, PatternSortingPredicate(CGP));
 
   // Convert each variant of each pattern into a Matcher.
   Records.startTimer("Convert to matchers");

diff  --git a/llvm/utils/TableGen/GlobalISelEmitter.cpp 
b/llvm/utils/TableGen/GlobalISelEmitter.cpp
index e18de6ebf9e0..a303753d53c7 100644
--- a/llvm/utils/TableGen/GlobalISelEmitter.cpp
+++ b/llvm/utils/TableGen/GlobalISelEmitter.cpp
@@ -5480,15 +5480,13 @@ 
GlobalISelEmitter::buildMatchTable(MutableArrayRef Rules,

[llvm-branch-commits] [llvm] 4c1617d - [llvm] Use std::any_of (NFC)

2021-01-13 Thread Kazu Hirata via llvm-branch-commits


Author: Kazu Hirata
Date: 2021-01-13T19:14:44-08:00
New Revision: 4c1617dac8fa13a8eac9cc4ac13a8f1fb3da512e

URL: 
https://github.com/llvm/llvm-project/commit/4c1617dac8fa13a8eac9cc4ac13a8f1fb3da512e
DIFF: 
https://github.com/llvm/llvm-project/commit/4c1617dac8fa13a8eac9cc4ac13a8f1fb3da512e.diff

LOG: [llvm] Use std::any_of (NFC)

Added: 


Modified: 
llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
llvm/tools/obj2yaml/elf2yaml.cpp

Removed: 




diff  --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp 
b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
index ab5bb88759e5..888d3c113c91 100644
--- a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
+++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
@@ -1281,10 +1281,9 @@ static bool areCFlagsAccessedBetweenInstrs(
 return true;
 
   // From must be above To.
-  assert(std::find_if(++To.getReverse(), To->getParent()->rend(),
-  [From](MachineInstr &MI) {
-return MI.getIterator() == From;
-  }) != To->getParent()->rend());
+  assert(std::any_of(
+  ++To.getReverse(), To->getParent()->rend(),
+  [From](MachineInstr &MI) { return MI.getIterator() == From; }));
 
   // We iterate backward starting at \p To until we hit \p From.
   for (const MachineInstr &Instr :

diff  --git a/llvm/tools/obj2yaml/elf2yaml.cpp 
b/llvm/tools/obj2yaml/elf2yaml.cpp
index 3c7f6dd8319d..494aa5b17b13 100644
--- a/llvm/tools/obj2yaml/elf2yaml.cpp
+++ b/llvm/tools/obj2yaml/elf2yaml.cpp
@@ -187,7 +187,7 @@ bool ELFDumper::shouldPrintSection(const 
ELFYAML::Section &S,
   if (S.Type == ELF::SHT_NULL && (&SHdr == &Sections[0])) {
 const uint8_t *Begin = reinterpret_cast(&SHdr);
 const uint8_t *End = Begin + sizeof(Elf_Shdr);
-return std::find_if(Begin, End, [](uint8_t V) { return V != 0; }) != End;
+return std::any_of(Begin, End, [](uint8_t V) { return V != 0; });
   }
 
   // Normally we use "DWARF:" to describe contents of DWARF sections. Sometimes



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[llvm-branch-commits] [llvm] 4914299 - Reapply "ADT: Fix reference invalidation in SmallVector::push_back and single-element insert"

2021-01-13 Thread Duncan P. N. Exon Smith via llvm-branch-commits


Author: Duncan P. N. Exon Smith
Date: 2021-01-13T19:45:39-08:00
New Revision: 49142991a685bd427d7e877c29c77371dfb7634c

URL: 
https://github.com/llvm/llvm-project/commit/49142991a685bd427d7e877c29c77371dfb7634c
DIFF: 
https://github.com/llvm/llvm-project/commit/49142991a685bd427d7e877c29c77371dfb7634c.diff

LOG: Reapply "ADT: Fix reference invalidation in SmallVector::push_back and 
single-element insert"

This reverts commit 56d1ffb927d03958a7a31442596df749264a7792, reapplying
9abac60309006db00eca0af406c2e16bef26807c, removing insert_one_maybe_copy
and using a helper called forward_value_param instead. This avoids use
of `std::is_same` (or any SFINAE), so I'm hoping it's more portable and
MSVC will be happier.

Original commit message follows:

For small enough, trivially copyable `T`, take the argument by value in
`SmallVector::push_back` and copy it when forwarding to
`SmallVector::insert_one_impl`. Otherwise, when growing, update the
argument appropriately.

Differential Revision: https://reviews.llvm.org/D93779

Added: 


Modified: 
llvm/include/llvm/ADT/SmallVector.h
llvm/unittests/ADT/SmallVectorTest.cpp

Removed: 




diff  --git a/llvm/include/llvm/ADT/SmallVector.h 
b/llvm/include/llvm/ADT/SmallVector.h
index 803588143d81..c91075677b3f 100644
--- a/llvm/include/llvm/ADT/SmallVector.h
+++ b/llvm/include/llvm/ADT/SmallVector.h
@@ -220,6 +220,23 @@ class SmallVectorTemplateCommon
   }
   void assertSafeToEmplace() {}
 
+  /// Reserve enough space to add one element, and return the updated element
+  /// pointer in case it was a reference to the storage.
+  template 
+  static const T *reserveForAndGetAddressImpl(U *This, const T &Elt) {
+if (LLVM_LIKELY(This->size() < This->capacity()))
+  return &Elt;
+
+bool ReferencesStorage = false;
+int64_t Index = -1;
+if (LLVM_UNLIKELY(This->isReferenceToStorage(&Elt))) {
+  ReferencesStorage = true;
+  Index = &Elt - This->begin();
+}
+This->grow();
+return ReferencesStorage ? This->begin() + Index : &Elt;
+  }
+
 public:
   using size_type = size_t;
   using 
diff erence_type = ptr
diff _t;
@@ -303,7 +320,12 @@ template ::value) &&
  (is_trivially_move_constructible::value) &&
  std::is_trivially_destructible::value>
 class SmallVectorTemplateBase : public SmallVectorTemplateCommon {
+  friend class SmallVectorTemplateCommon;
+
 protected:
+  static constexpr bool TakesParamByValue = false;
+  using ValueParamT = const T &;
+
   SmallVectorTemplateBase(size_t Size) : SmallVectorTemplateCommon(Size) {}
 
   static void destroy_range(T *S, T *E) {
@@ -333,20 +355,31 @@ class SmallVectorTemplateBase : public 
SmallVectorTemplateCommon {
   /// element, or MinSize more elements if specified.
   void grow(size_t MinSize = 0);
 
+  /// Reserve enough space to add one element, and return the updated element
+  /// pointer in case it was a reference to the storage.
+  const T *reserveForAndGetAddress(const T &Elt) {
+return this->reserveForAndGetAddressImpl(this, Elt);
+  }
+
+  /// Reserve enough space to add one element, and return the updated element
+  /// pointer in case it was a reference to the storage.
+  T *reserveForAndGetAddress(T &Elt) {
+return const_cast(this->reserveForAndGetAddressImpl(this, Elt));
+  }
+
+  static T &&forward_value_param(T &&V) { return std::move(V); }
+  static const T &forward_value_param(const T &V) { return V; }
+
 public:
   void push_back(const T &Elt) {
-this->assertSafeToAdd(&Elt);
-if (LLVM_UNLIKELY(this->size() >= this->capacity()))
-  this->grow();
-::new ((void*) this->end()) T(Elt);
+const T *EltPtr = reserveForAndGetAddress(Elt);
+::new ((void *)this->end()) T(*EltPtr);
 this->set_size(this->size() + 1);
   }
 
   void push_back(T &&Elt) {
-this->assertSafeToAdd(&Elt);
-if (LLVM_UNLIKELY(this->size() >= this->capacity()))
-  this->grow();
-::new ((void*) this->end()) T(::std::move(Elt));
+T *EltPtr = reserveForAndGetAddress(Elt);
+::new ((void *)this->end()) T(::std::move(*EltPtr));
 this->set_size(this->size() + 1);
   }
 
@@ -396,7 +429,18 @@ void SmallVectorTemplateBase::grow(size_t MinSize) {
 /// skipping destruction.
 template 
 class SmallVectorTemplateBase : public SmallVectorTemplateCommon {
+  friend class SmallVectorTemplateCommon;
+
 protected:
+  /// True if it's cheap enough to take parameters by value. Doing so avoids
+  /// overhead related to mitigations for reference invalidation.
+  static constexpr bool TakesParamByValue = sizeof(T) <= 2 * sizeof(void *);
+
+  /// Either const T& or T, depending on whether it's cheap enough to take
+  /// parameters by value.
+  using ValueParamT =
+  typename std::conditional::type;
+
   SmallVectorTemplateBase(size_t Size) : SmallVectorTemplateCommon(Size) {}
 
   // No need to do a destroy loop for POD's.

[llvm-branch-commits] [llvm] 3043e5a - ADT: Fix reference invalidation in N-element SmallVector::append and insert

2021-01-13 Thread Duncan P. N. Exon Smith via llvm-branch-commits


Author: Duncan P. N. Exon Smith
Date: 2021-01-13T20:00:44-08:00
New Revision: 3043e5a5c33c4c871f4a1dfd621a8839f9a1f0b3

URL: 
https://github.com/llvm/llvm-project/commit/3043e5a5c33c4c871f4a1dfd621a8839f9a1f0b3
DIFF: 
https://github.com/llvm/llvm-project/commit/3043e5a5c33c4c871f4a1dfd621a8839f9a1f0b3.diff

LOG: ADT: Fix reference invalidation in N-element SmallVector::append and insert

For small enough, trivially copyable `T`, take the parameter by-value in
`SmallVector::append` and `SmallVector::insert`.  Otherwise, when
growing, update the arugment appropriately.

Differential Revision: https://reviews.llvm.org/D93780

Added: 


Modified: 
llvm/include/llvm/ADT/SmallVector.h
llvm/unittests/ADT/SmallVectorTest.cpp

Removed: 




diff  --git a/llvm/include/llvm/ADT/SmallVector.h 
b/llvm/include/llvm/ADT/SmallVector.h
index c91075677b3f..fea8a763d48f 100644
--- a/llvm/include/llvm/ADT/SmallVector.h
+++ b/llvm/include/llvm/ADT/SmallVector.h
@@ -223,8 +223,9 @@ class SmallVectorTemplateCommon
   /// Reserve enough space to add one element, and return the updated element
   /// pointer in case it was a reference to the storage.
   template 
-  static const T *reserveForAndGetAddressImpl(U *This, const T &Elt) {
-if (LLVM_LIKELY(This->size() < This->capacity()))
+  static const T *reserveForAndGetAddressImpl(U *This, const T &Elt, size_t N) 
{
+size_t NewSize = This->size() + N;
+if (LLVM_LIKELY(NewSize <= This->capacity()))
   return &Elt;
 
 bool ReferencesStorage = false;
@@ -233,7 +234,7 @@ class SmallVectorTemplateCommon
   ReferencesStorage = true;
   Index = &Elt - This->begin();
 }
-This->grow();
+This->grow(NewSize);
 return ReferencesStorage ? This->begin() + Index : &Elt;
   }
 
@@ -357,14 +358,14 @@ class SmallVectorTemplateBase : public 
SmallVectorTemplateCommon {
 
   /// Reserve enough space to add one element, and return the updated element
   /// pointer in case it was a reference to the storage.
-  const T *reserveForAndGetAddress(const T &Elt) {
-return this->reserveForAndGetAddressImpl(this, Elt);
+  const T *reserveForAndGetAddress(const T &Elt, size_t N = 1) {
+return this->reserveForAndGetAddressImpl(this, Elt, N);
   }
 
   /// Reserve enough space to add one element, and return the updated element
   /// pointer in case it was a reference to the storage.
-  T *reserveForAndGetAddress(T &Elt) {
-return const_cast(this->reserveForAndGetAddressImpl(this, Elt));
+  T *reserveForAndGetAddress(T &Elt, size_t N = 1) {
+return const_cast(this->reserveForAndGetAddressImpl(this, Elt, N));
   }
 
   static T &&forward_value_param(T &&V) { return std::move(V); }
@@ -483,14 +484,14 @@ class SmallVectorTemplateBase : public 
SmallVectorTemplateCommon {
 
   /// Reserve enough space to add one element, and return the updated element
   /// pointer in case it was a reference to the storage.
-  const T *reserveForAndGetAddress(const T &Elt) {
-return this->reserveForAndGetAddressImpl(this, Elt);
+  const T *reserveForAndGetAddress(const T &Elt, size_t N = 1) {
+return this->reserveForAndGetAddressImpl(this, Elt, N);
   }
 
   /// Reserve enough space to add one element, and return the updated element
   /// pointer in case it was a reference to the storage.
-  T *reserveForAndGetAddress(T &Elt) {
-return const_cast(this->reserveForAndGetAddressImpl(this, Elt));
+  T *reserveForAndGetAddress(T &Elt, size_t N = 1) {
+return const_cast(this->reserveForAndGetAddressImpl(this, Elt, N));
   }
 
   /// Copy \p V or return a reference, depending on \a ValueParamT.
@@ -616,12 +617,9 @@ class SmallVectorImpl : public SmallVectorTemplateBase {
   }
 
   /// Append \p NumInputs copies of \p Elt to the end.
-  void append(size_type NumInputs, const T &Elt) {
-this->assertSafeToAdd(&Elt, NumInputs);
-if (NumInputs > this->capacity() - this->size())
-  this->grow(this->size()+NumInputs);
-
-std::uninitialized_fill_n(this->end(), NumInputs, Elt);
+  void append(size_type NumInputs, ValueParamT Elt) {
+const T *EltPtr = this->reserveForAndGetAddress(Elt, NumInputs);
+std::uninitialized_fill_n(this->end(), NumInputs, *EltPtr);
 this->set_size(this->size() + NumInputs);
   }
 
@@ -732,7 +730,7 @@ class SmallVectorImpl : public SmallVectorTemplateBase {
 return insert_one_impl(I, this->forward_value_param(Elt));
   }
 
-  iterator insert(iterator I, size_type NumToInsert, const T &Elt) {
+  iterator insert(iterator I, size_type NumToInsert, ValueParamT Elt) {
 // Convert iterator to elt# to avoid invalidating iterator when we 
reserve()
 size_t InsertElt = I - this->begin();
 
@@ -743,11 +741,9 @@ class SmallVectorImpl : public SmallVectorTemplateBase {
 
 assert(this->isReferenceToStorage(I) && "Insertion iterator is out of 
bounds.");
 
-// Check that adding NumToInsert elements won't invalidate Elt.

[llvm-branch-commits] [llvm] 752fafd - [NFC] Fix -Wsometimes-uninitialized

2021-01-13 Thread Jordan Rupprecht via llvm-branch-commits


Author: Jordan Rupprecht
Date: 2021-01-13T20:32:38-08:00
New Revision: 752fafda3dbf1f4885c64408a13ddb67c91ccb13

URL: 
https://github.com/llvm/llvm-project/commit/752fafda3dbf1f4885c64408a13ddb67c91ccb13
DIFF: 
https://github.com/llvm/llvm-project/commit/752fafda3dbf1f4885c64408a13ddb67c91ccb13.diff

LOG: [NFC] Fix -Wsometimes-uninitialized

After 49142991a685bd427d7e877c29c77371dfb7634c, clang detects that MUL may be 
uninitialized. Set it to nullptr to suppress this check.

Adding an assert to check that it is ultimately set fails two test cases. Since 
this is not a new issue, leave the assertion commented out until a code owner 
can fix the bug. The two failing test cases are noted in the assertion comment.

Added: 


Modified: 
llvm/lib/Target/AArch64/AArch64InstrInfo.cpp

Removed: 




diff  --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp 
b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
index 888d3c113c91..6b38e216a854 100644
--- a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
+++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
@@ -4871,7 +4871,7 @@ void AArch64InstrInfo::genAlternativeCodeSequence(
   MachineFunction &MF = *MBB.getParent();
   const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();
 
-  MachineInstr *MUL;
+  MachineInstr *MUL = nullptr;
   const TargetRegisterClass *RC;
   unsigned Opc;
   switch (Pattern) {
@@ -5692,6 +5692,9 @@ void AArch64InstrInfo::genAlternativeCodeSequence(
   }
   } // end switch (Pattern)
   // Record MUL and ADD/SUB for deletion
+  // FIXME: This assertion fails in CodeGen/AArch64/tailmerging_in_mbp.ll and
+  // CodeGen/AArch64/urem-seteq-nonzero.ll.
+  // assert(MUL && "MUL was never set");
   DelInstrs.push_back(MUL);
   DelInstrs.push_back(&Root);
 }



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[llvm-branch-commits] [llvm] 260a856 - ADT: Fix reference invalidation in SmallVector::resize

2021-01-13 Thread Duncan P. N. Exon Smith via llvm-branch-commits


Author: Duncan P. N. Exon Smith
Date: 2021-01-13T20:48:08-08:00
New Revision: 260a856c2abcef49c7cb3bdcd999701db3e2af38

URL: 
https://github.com/llvm/llvm-project/commit/260a856c2abcef49c7cb3bdcd999701db3e2af38
DIFF: 
https://github.com/llvm/llvm-project/commit/260a856c2abcef49c7cb3bdcd999701db3e2af38.diff

LOG: ADT: Fix reference invalidation in SmallVector::resize

For small enough, trivially copyable `T`, take the parameter by-value in
`SmallVector::resize`.  Otherwise, when growing, update the arugment
appropriately.

Differential Revision: https://reviews.llvm.org/D93781

Added: 


Modified: 
llvm/include/llvm/ADT/SmallVector.h
llvm/unittests/ADT/SmallVectorTest.cpp

Removed: 




diff  --git a/llvm/include/llvm/ADT/SmallVector.h 
b/llvm/include/llvm/ADT/SmallVector.h
index fea8a763d48f..ac445e556ba1 100644
--- a/llvm/include/llvm/ADT/SmallVector.h
+++ b/llvm/include/llvm/ADT/SmallVector.h
@@ -565,7 +565,7 @@ class SmallVectorImpl : public SmallVectorTemplateBase {
   /// Like resize, but \ref T is POD, the new values won't be initialized.
   void resize_for_overwrite(size_type N) { resizeImpl(N); }
 
-  void resize(size_type N, const T &NV) {
+  void resize(size_type N, ValueParamT NV) {
 if (N == this->size())
   return;
 
@@ -575,11 +575,8 @@ class SmallVectorImpl : public SmallVectorTemplateBase {
   return;
 }
 
-this->assertSafeToReferenceAfterResize(&NV, N);
-if (this->capacity() < N)
-  this->grow(N);
-std::uninitialized_fill(this->end(), this->begin() + N, NV);
-this->set_size(N);
+// N > this->size(). Defer to append.
+this->append(N - this->size(), NV);
   }
 
   void reserve(size_type N) {

diff  --git a/llvm/unittests/ADT/SmallVectorTest.cpp 
b/llvm/unittests/ADT/SmallVectorTest.cpp
index c236a68636d0..1f6c7db99fa8 100644
--- a/llvm/unittests/ADT/SmallVectorTest.cpp
+++ b/llvm/unittests/ADT/SmallVectorTest.cpp
@@ -1135,12 +1135,14 @@ TYPED_TEST(SmallVectorReferenceInvalidationTest, 
Resize) {
   auto &V = this->V;
   (void)V;
   int N = this->NumBuiltinElts(V);
-#if !defined(NDEBUG) && GTEST_HAS_DEATH_TEST
-  EXPECT_DEATH(V.resize(N + 1, V.back()), this->AssertionMessage);
-#endif
+  V.resize(N + 1, V.back());
+  EXPECT_EQ(N, V.back());
 
-  // No assertion when shrinking, since the parameter isn't accessed.
-  V.resize(N - 1, V.back());
+  // Resize to add enough elements that V will grow again. If reference
+  // invalidation breaks in the future, sanitizers should be able to catch a
+  // use-after-free here.
+  V.resize(V.capacity() + 1, V.front());
+  EXPECT_EQ(1, V.back());
 }
 
 TYPED_TEST(SmallVectorReferenceInvalidationTest, Append) {



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[llvm-branch-commits] [llvm] c224a83 - ADT: Reduce code duplication in SmallVector::resize by using pop_back_n, NFC

2021-01-13 Thread Duncan P. N. Exon Smith via llvm-branch-commits


Author: Duncan P. N. Exon Smith
Date: 2021-01-13T20:50:00-08:00
New Revision: c224a834583ccbb3f8e8047d409ef3bf356abc01

URL: 
https://github.com/llvm/llvm-project/commit/c224a834583ccbb3f8e8047d409ef3bf356abc01
DIFF: 
https://github.com/llvm/llvm-project/commit/c224a834583ccbb3f8e8047d409ef3bf356abc01.diff

LOG: ADT: Reduce code duplication in SmallVector::resize by using pop_back_n, 
NFC

Added: 


Modified: 
llvm/include/llvm/ADT/SmallVector.h

Removed: 




diff  --git a/llvm/include/llvm/ADT/SmallVector.h 
b/llvm/include/llvm/ADT/SmallVector.h
index ac445e556ba1..32c149c4993f 100644
--- a/llvm/include/llvm/ADT/SmallVector.h
+++ b/llvm/include/llvm/ADT/SmallVector.h
@@ -545,8 +545,7 @@ class SmallVectorImpl : public SmallVectorTemplateBase {
 private:
   template  void resizeImpl(size_type N) {
 if (N < this->size()) {
-  this->destroy_range(this->begin()+N, this->end());
-  this->set_size(N);
+  this->pop_back_n(this->size() - N);
 } else if (N > this->size()) {
   if (this->capacity() < N)
 this->grow(N);
@@ -570,8 +569,7 @@ class SmallVectorImpl : public SmallVectorTemplateBase {
   return;
 
 if (N < this->size()) {
-  this->destroy_range(this->begin()+N, this->end());
-  this->set_size(N);
+  this->pop_back_n(this->size() - N);
   return;
 }
 



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[llvm-branch-commits] [llvm] 3f98b66 - ADT: Reduce code duplication in SmallVector by reusing reserve, NFC

2021-01-13 Thread Duncan P. N. Exon Smith via llvm-branch-commits


Author: Duncan P. N. Exon Smith
Date: 2021-01-13T20:52:57-08:00
New Revision: 3f98b66f23f9844a61f63ee00a81b9914f9a039d

URL: 
https://github.com/llvm/llvm-project/commit/3f98b66f23f9844a61f63ee00a81b9914f9a039d
DIFF: 
https://github.com/llvm/llvm-project/commit/3f98b66f23f9844a61f63ee00a81b9914f9a039d.diff

LOG: ADT: Reduce code duplication in SmallVector by reusing reserve, NFC

Added: 


Modified: 
llvm/include/llvm/ADT/SmallVector.h

Removed: 




diff  --git a/llvm/include/llvm/ADT/SmallVector.h 
b/llvm/include/llvm/ADT/SmallVector.h
index 32c149c4993f..0103798a9a6b 100644
--- a/llvm/include/llvm/ADT/SmallVector.h
+++ b/llvm/include/llvm/ADT/SmallVector.h
@@ -547,8 +547,7 @@ class SmallVectorImpl : public SmallVectorTemplateBase {
 if (N < this->size()) {
   this->pop_back_n(this->size() - N);
 } else if (N > this->size()) {
-  if (this->capacity() < N)
-this->grow(N);
+  this->reserve(N);
   for (auto I = this->end(), E = this->begin() + N; I != E; ++I)
 if (ForOverwrite)
   new (&*I) T;
@@ -628,8 +627,7 @@ class SmallVectorImpl : public SmallVectorTemplateBase {
   void assign(size_type NumElts, const T &Elt) {
 this->assertSafeToReferenceAfterResize(&Elt, 0);
 clear();
-if (this->capacity() < NumElts)
-  this->grow(NumElts);
+this->reserve(NumElts);
 this->set_size(NumElts);
 std::uninitialized_fill(this->begin(), this->end(), Elt);
   }



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[llvm-branch-commits] [clang] 53b3460 - [Driver] -gsplit-dwarf: Produce .dwo regardless of -gN for -fthinlto-index=

2021-01-13 Thread Fangrui Song via llvm-branch-commits


Author: Fangrui Song
Date: 2021-01-13T21:01:53-08:00
New Revision: 53b34601abf1d48e8df210ab8127b16fd35e275a

URL: 
https://github.com/llvm/llvm-project/commit/53b34601abf1d48e8df210ab8127b16fd35e275a
DIFF: 
https://github.com/llvm/llvm-project/commit/53b34601abf1d48e8df210ab8127b16fd35e275a.diff

LOG: [Driver] -gsplit-dwarf: Produce .dwo regardless of -gN for -fthinlto-index=

-g is an IR generation option while -gsplit-dwarf is an object file generation 
option.
For -gsplit-dwarf in the backend phase of a distributed ThinLTO 
(-fthinlto-index=) which does object file generation and no IR generation, -g 
should not be needed.

This patch makes `-fthinlto-index= -gsplit-dwarf` emit .dwo even in the absence 
of -g.
This should fix https://crbug.com/1158215 after D80391.

```
// Distributed ThinLTO usage
clang -g -O2 -c -flto=thin -fthin-link-bitcode=a.indexing.o a.c
clang -g -O2 -c -flto=thin -fthin-link-bitcode=b.indexing.o b.c
clang -fuse-ld=lld -Wl,--thinlto-index-only=a.rsp 
-Wl,--thinlto-prefix-replace=';lto/' 
-Wl,--thinlto-object-suffix-replace='.indexing.o;.o' a.indexing.o b.indexing.o
clang -gsplit-dwarf -O2 -c -fthinlto-index=lto/a.o.thinlto.bc a.o -o lto/a.o
clang -gsplit-dwarf -O2 -c -fthinlto-index=lto/b.o.thinlto.bc b.o -o lto/b.o
clang -fuse-ld=lld @a.rsp -o exe
```

Note: for implicit regular/Thin LTO, .dwo emission works without this patch:
`clang -flto=thin -gsplit-dwarf a.o b.o` passes `-plugin-opt=dwo_dir=` to the 
linker.
The linker forwards the option to LTO. LTOBackend.cpp emits 
`$dwo_dir/[01234].dwo`.

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D94647

Added: 


Modified: 
clang/lib/Driver/ToolChains/Clang.cpp
clang/test/Driver/split-debug.c

Removed: 




diff  --git a/clang/lib/Driver/ToolChains/Clang.cpp 
b/clang/lib/Driver/ToolChains/Clang.cpp
index d83835a0f7b8..0c821b85c229 100644
--- a/clang/lib/Driver/ToolChains/Clang.cpp
+++ b/clang/lib/Driver/ToolChains/Clang.cpp
@@ -3754,7 +3754,12 @@ static void RenderDebugOptions(const ToolChain &TC, 
const Driver &D,
   Args.hasFlag(options::OPT_fsplit_dwarf_inlining,
options::OPT_fno_split_dwarf_inlining, false);
 
-  if (const Arg *A = Args.getLastArg(options::OPT_g_Group)) {
+  // Normally -gsplit-dwarf is only useful with -gN. For -gsplit-dwarf in the
+  // backend phase of a distributed ThinLTO which does object file generation
+  // and no IR generation, -gN should not be needed. So allow -gsplit-dwarf 
with
+  // either -gN or -fthinlto-index=.
+  if (Args.hasArg(options::OPT_g_Group) ||
+  Args.hasArg(options::OPT_fthinlto_index_EQ)) {
 Arg *SplitDWARFArg;
 DwarfFission = getDebugFissionKind(D, Args, SplitDWARFArg);
 if (DwarfFission != DwarfFissionKind::None &&
@@ -3762,7 +3767,8 @@ static void RenderDebugOptions(const ToolChain &TC, const 
Driver &D,
   DwarfFission = DwarfFissionKind::None;
   SplitDWARFInlining = false;
 }
-
+  }
+  if (const Arg *A = Args.getLastArg(options::OPT_g_Group)) {
 DebugInfoKind = codegenoptions::LimitedDebugInfo;
 
 // If the last option explicitly specified a debug-info level, use it.

diff  --git a/clang/test/Driver/split-debug.c b/clang/test/Driver/split-debug.c
index de1258dcb13c..2ce4ca980c3f 100644
--- a/clang/test/Driver/split-debug.c
+++ b/clang/test/Driver/split-debug.c
@@ -24,6 +24,14 @@
 /// -gsplit-dwarf is a no-op if no -g is specified.
 // RUN: %clang -### -c -target x86_64 -gsplit-dwarf %s 2>&1 | FileCheck %s 
--check-prefix=G0
 
+/// ... unless -fthinlto-index= is specified.
+// RUN: echo > %t.bc
+// RUN: %clang -### -c -target x86_64 -fthinlto-index=dummy -gsplit-dwarf 
%t.bc 2>&1 | FileCheck %s --check-prefix=THINLTO
+
+// THINLTO-NOT:  "-debug-info-kind=
+// THINLTO:  "-ggnu-pubnames"
+// THINLTO-SAME: "-split-dwarf-file" "{{.*}}.dwo" "-split-dwarf-output" 
"{{.*}}.dwo"
+
 /// -gno-split-dwarf disables debug fission.
 // RUN: %clang -### -c -target x86_64 -gsplit-dwarf -g -gno-split-dwarf %s 
2>&1 | FileCheck %s --check-prefix=NOSPLIT
 // RUN: %clang -### -c -target x86_64 -gsplit-dwarf=single -g -gno-split-dwarf 
%s 2>&1 | FileCheck %s --check-prefix=NOSPLIT



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[llvm-branch-commits] [llvm] 6ed3083 - ADT: Reduce code duplication in SmallVector by calling reserve and clear, NFC

2021-01-13 Thread Duncan P. N. Exon Smith via llvm-branch-commits


Author: Duncan P. N. Exon Smith
Date: 2021-01-13T21:10:31-08:00
New Revision: 6ed3083a96541a7483cb02bb3b2f52b1d0a37c84

URL: 
https://github.com/llvm/llvm-project/commit/6ed3083a96541a7483cb02bb3b2f52b1d0a37c84
DIFF: 
https://github.com/llvm/llvm-project/commit/6ed3083a96541a7483cb02bb3b2f52b1d0a37c84.diff

LOG: ADT: Reduce code duplication in SmallVector by calling reserve and clear, 
NFC

Added: 


Modified: 
llvm/include/llvm/ADT/SmallVector.h

Removed: 




diff  --git a/llvm/include/llvm/ADT/SmallVector.h 
b/llvm/include/llvm/ADT/SmallVector.h
index 0103798a9a6b7..b9c30abcb579e 100644
--- a/llvm/include/llvm/ADT/SmallVector.h
+++ b/llvm/include/llvm/ADT/SmallVector.h
@@ -603,9 +603,7 @@ class SmallVectorImpl : public SmallVectorTemplateBase {
   void append(in_iter in_start, in_iter in_end) {
 this->assertSafeToAddRange(in_start, in_end);
 size_type NumInputs = std::distance(in_start, in_end);
-if (NumInputs > this->capacity() - this->size())
-  this->grow(this->size()+NumInputs);
-
+this->reserve(this->size() + NumInputs);
 this->uninitialized_copy(in_start, in_end, this->end());
 this->set_size(this->size() + NumInputs);
   }
@@ -888,10 +886,8 @@ void SmallVectorImpl::swap(SmallVectorImpl &RHS) {
 std::swap(this->Capacity, RHS.Capacity);
 return;
   }
-  if (RHS.size() > this->capacity())
-this->grow(RHS.size());
-  if (this->size() > RHS.capacity())
-RHS.grow(this->size());
+  this->reserve(RHS.size());
+  RHS.reserve(this->size());
 
   // Swap the shared elements.
   size_t NumShared = this->size();
@@ -946,8 +942,7 @@ SmallVectorImpl &SmallVectorImpl::
   // FIXME: don't do this if they're efficiently moveable.
   if (this->capacity() < RHSSize) {
 // Destroy current elements.
-this->destroy_range(this->begin(), this->end());
-this->set_size(0);
+this->clear();
 CurSize = 0;
 this->grow(RHSSize);
   } else if (CurSize) {
@@ -1006,8 +1001,7 @@ SmallVectorImpl 
&SmallVectorImpl::operator=(SmallVectorImpl &&RHS) {
   // elements.
   if (this->capacity() < RHSSize) {
 // Destroy current elements.
-this->destroy_range(this->begin(), this->end());
-this->set_size(0);
+this->clear();
 CurSize = 0;
 this->grow(RHSSize);
   } else if (CurSize) {



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[llvm-branch-commits] [llvm] ff5e896 - Fix unused variable in CoroFrame.cpp when building Release with GCC 10

2021-01-13 Thread Xun Li via llvm-branch-commits


Author: Daniel Paoliello
Date: 2021-01-13T22:53:25-08:00
New Revision: ff5e896425577f445ed080d88b582aab0896fba0

URL: 
https://github.com/llvm/llvm-project/commit/ff5e896425577f445ed080d88b582aab0896fba0
DIFF: 
https://github.com/llvm/llvm-project/commit/ff5e896425577f445ed080d88b582aab0896fba0.diff

LOG: Fix unused variable in CoroFrame.cpp when building Release with GCC 10

When building with GCC 10, the following warning is reported:

```
/llvm-project/llvm/lib/Transforms/Coroutines/CoroFrame.cpp:1527:28: warning: 
unused variable ‘CS’ [-Wunused-variable]
 1527 |   if (CatchSwitchInst *CS =
```

This change adds a cast to `void` to avoid the warning.

Reviewed By: lxfind

Differential Revision: https://reviews.llvm.org/D94456

Added: 


Modified: 
llvm/lib/Transforms/Coroutines/CoroFrame.cpp

Removed: 




diff  --git a/llvm/lib/Transforms/Coroutines/CoroFrame.cpp 
b/llvm/lib/Transforms/Coroutines/CoroFrame.cpp
index 84b78fce3f44..16e7e2c2ceaf 100644
--- a/llvm/lib/Transforms/Coroutines/CoroFrame.cpp
+++ b/llvm/lib/Transforms/Coroutines/CoroFrame.cpp
@@ -1535,6 +1535,7 @@ static void rewritePHIs(BasicBlock &BB) {
 for (BasicBlock *Pred : Preds) {
   if (CatchSwitchInst *CS =
   dyn_cast(Pred->getTerminator())) {
+(void)CS;
 // CleanupPad with a CatchSwitch predecessor: therefore this is an
 // unwind destination that needs to be handle specially.
 assert(CS->getUnwindDest() == &BB);



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[llvm-branch-commits] [lldb] 885eae9 - Add func call so we don't instruction-step into the builtin_trap

2021-01-13 Thread Jason Molenda via llvm-branch-commits


Author: Jason Molenda
Date: 2021-01-13T23:41:33-08:00
New Revision: 885eae9d85de4b1b1907ac9b3ecba26565932069

URL: 
https://github.com/llvm/llvm-project/commit/885eae9d85de4b1b1907ac9b3ecba26565932069
DIFF: 
https://github.com/llvm/llvm-project/commit/885eae9d85de4b1b1907ac9b3ecba26565932069.diff

LOG: Add func call so we don't instruction-step into the builtin_trap

The way this test is structured right now, I set a breakpoint on
the instruction before the __builtin_trap.  It hits the breakpoint,
disables the breakpoint, and instruction steps.  This hits the
builtin_trap instruction which debugserver (on arm64) now advances
to the next instruction and reports that address to lldb.  lldb
doesn't recognize this as a proper response to the instruction
step and continues executing until the next trap, and the test fails.

Added: 


Modified: 
lldb/test/API/macosx/builtin-debugtrap/main.cpp

Removed: 




diff  --git a/lldb/test/API/macosx/builtin-debugtrap/main.cpp 
b/lldb/test/API/macosx/builtin-debugtrap/main.cpp
index 2cbe2a48b503..84332d800148 100644
--- a/lldb/test/API/macosx/builtin-debugtrap/main.cpp
+++ b/lldb/test/API/macosx/builtin-debugtrap/main.cpp
@@ -3,6 +3,7 @@ int global = 0;
 int main()
 {
   global = 5; // Set a breakpoint here
+  puts("");
   __builtin_debugtrap();
   global = 10;
   __builtin_trap();



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[llvm-branch-commits] [lldb] 7ad54d1 - [lldb][wasm] Parse DWO section names

2021-01-13 Thread Pavel Labath via llvm-branch-commits


Author: Philip Pfaffe
Date: 2021-01-14T08:45:02+01:00
New Revision: 7ad54d193871ce69968565ea46372e81c9f1ce62

URL: 
https://github.com/llvm/llvm-project/commit/7ad54d193871ce69968565ea46372e81c9f1ce62
DIFF: 
https://github.com/llvm/llvm-project/commit/7ad54d193871ce69968565ea46372e81c9f1ce62.diff

LOG: [lldb][wasm] Parse DWO section names

Mirror ELF section parsing to support DWARF section names for
debug fission.

Reviewed By: labath

Differential Revision: https://reviews.llvm.org/D93621

Added: 


Modified: 
lldb/source/Plugins/ObjectFile/wasm/ObjectFileWasm.cpp
lldb/test/Shell/ObjectFile/wasm/embedded-debug-sections.yaml

Removed: 




diff  --git a/lldb/source/Plugins/ObjectFile/wasm/ObjectFileWasm.cpp 
b/lldb/source/Plugins/ObjectFile/wasm/ObjectFileWasm.cpp
index 91150fa02ebc..6c29c2326212 100644
--- a/lldb/source/Plugins/ObjectFile/wasm/ObjectFileWasm.cpp
+++ b/lldb/source/Plugins/ObjectFile/wasm/ObjectFileWasm.cpp
@@ -253,6 +253,43 @@ bool ObjectFileWasm::ParseHeader() {
 
 Symtab *ObjectFileWasm::GetSymtab() { return nullptr; }
 
+static SectionType GetSectionTypeFromName(llvm::StringRef Name) {
+  if (Name.consume_front(".debug_") || Name.consume_front(".zdebug_")) {
+return llvm::StringSwitch(Name)
+.Case("abbrev", eSectionTypeDWARFDebugAbbrev)
+.Case("abbrev.dwo", eSectionTypeDWARFDebugAbbrevDwo)
+.Case("addr", eSectionTypeDWARFDebugAddr)
+.Case("aranges", eSectionTypeDWARFDebugAranges)
+.Case("cu_index", eSectionTypeDWARFDebugCuIndex)
+.Case("frame", eSectionTypeDWARFDebugFrame)
+.Case("info", eSectionTypeDWARFDebugInfo)
+.Case("info.dwo", eSectionTypeDWARFDebugInfoDwo)
+.Cases("line", "line.dwo", eSectionTypeDWARFDebugLine)
+.Cases("line_str", "line_str.dwo", eSectionTypeDWARFDebugLineStr)
+.Case("loc", eSectionTypeDWARFDebugLoc)
+.Case("loc.dwo", eSectionTypeDWARFDebugLocDwo)
+.Case("loclists", eSectionTypeDWARFDebugLocLists)
+.Case("loclists.dwo", eSectionTypeDWARFDebugLocListsDwo)
+.Case("macinfo", eSectionTypeDWARFDebugMacInfo)
+.Cases("macro", "macro.dwo", eSectionTypeDWARFDebugMacro)
+.Case("names", eSectionTypeDWARFDebugNames)
+.Case("pubnames", eSectionTypeDWARFDebugPubNames)
+.Case("pubtypes", eSectionTypeDWARFDebugPubTypes)
+.Case("ranges", eSectionTypeDWARFDebugRanges)
+.Case("rnglists", eSectionTypeDWARFDebugRngLists)
+.Case("rnglists.dwo", eSectionTypeDWARFDebugRngListsDwo)
+.Case("str", eSectionTypeDWARFDebugStr)
+.Case("str.dwo", eSectionTypeDWARFDebugStrDwo)
+.Case("str_offsets", eSectionTypeDWARFDebugStrOffsets)
+.Case("str_offsets.dwo", eSectionTypeDWARFDebugStrOffsetsDwo)
+.Case("tu_index", eSectionTypeDWARFDebugTuIndex)
+.Case("types", eSectionTypeDWARFDebugTypes)
+.Case("types.dwo", eSectionTypeDWARFDebugTypesDwo)
+.Default(eSectionTypeOther);
+  }
+  return eSectionTypeOther;
+}
+
 void ObjectFileWasm::CreateSections(SectionList &unified_section_list) {
   if (m_sections_up)
 return;
@@ -280,29 +317,7 @@ void ObjectFileWasm::CreateSections(SectionList 
&unified_section_list) {
   // Code section.
   vm_addr = 0;
 } else {
-  section_type =
-  llvm::StringSwitch(sect_info.name.GetStringRef())
-  .Case(".debug_abbrev", eSectionTypeDWARFDebugAbbrev)
-  .Case(".debug_addr", eSectionTypeDWARFDebugAddr)
-  .Case(".debug_aranges", eSectionTypeDWARFDebugAranges)
-  .Case(".debug_cu_index", eSectionTypeDWARFDebugCuIndex)
-  .Case(".debug_frame", eSectionTypeDWARFDebugFrame)
-  .Case(".debug_info", eSectionTypeDWARFDebugInfo)
-  .Case(".debug_line", eSectionTypeDWARFDebugLine)
-  .Case(".debug_line_str", eSectionTypeDWARFDebugLineStr)
-  .Case(".debug_loc", eSectionTypeDWARFDebugLoc)
-  .Case(".debug_loclists", eSectionTypeDWARFDebugLocLists)
-  .Case(".debug_macinfo", eSectionTypeDWARFDebugMacInfo)
-  .Case(".debug_macro", eSectionTypeDWARFDebugMacro)
-  .Case(".debug_names", eSectionTypeDWARFDebugNames)
-  .Case(".debug_pubnames", eSectionTypeDWARFDebugPubNames)
-  .Case(".debug_pubtypes", eSectionTypeDWARFDebugPubTypes)
-  .Case(".debug_ranges", eSectionTypeDWARFDebugRanges)
-  .Case(".debug_rnglists", eSectionTypeDWARFDebugRngLists)
-  .Case(".debug_str", eSectionTypeDWARFDebugStr)
-  .Case(".debug_str_offsets", eSectionTypeDWARFDebugStrOffsets)
-  .Case(".debug_types", eSectionTypeDWARFDebugTypes)
-  .Default(eSectionTypeOther);
+  section_type = GetSectionTypeFromName(sect_info.name.GetStringRef());
   if (section_type == eSectionTypeOther)
 contin

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