[llvm-branch-commits] [mlir] abb4cd3 - [mlir][Python] Initial Affine Map Python Bindings.

[via llvm-branch-commits]

Author: zhanghb97
Date: 2020-12-30T17:36:39+08:00
New Revision: abb4cd3e74954ccb43307c71f7d0f0f937e0e045

URL: 
https://github.com/llvm/llvm-project/commit/abb4cd3e74954ccb43307c71f7d0f0f937e0e045
DIFF: 
https://github.com/llvm/llvm-project/commit/abb4cd3e74954ccb43307c71f7d0f0f937e0e045.diff

LOG: [mlir][Python] Initial Affine Map Python Bindings.

- Add `PyAffineMap` to wrap around `MlirAffineMap`.
- Add `mlirPythonAffineMapToCapsule` and `mlirPythonCapsuleToAffineMap` to 
interoperate with python capsule.
- Add and test some simple bindings of `PyAffineMap`.

Differential Revision: https://reviews.llvm.org/D93200

Added: 
mlir/test/Bindings/Python/ir_affine_map.py

Modified: 
mlir/include/mlir-c/Bindings/Python/Interop.h
mlir/lib/Bindings/Python/IRModules.cpp
mlir/lib/Bindings/Python/IRModules.h

Removed: 




diff  --git a/mlir/include/mlir-c/Bindings/Python/Interop.h 
b/mlir/include/mlir-c/Bindings/Python/Interop.h
index 31265edfb550..ae9d3a84a0a3 100644
--- a/mlir/include/mlir-c/Bindings/Python/Interop.h
+++ b/mlir/include/mlir-c/Bindings/Python/Interop.h
@@ -23,9 +23,11 @@
 
 #include 
 
+#include "mlir-c/AffineMap.h"
 #include "mlir-c/IR.h"
 #include "mlir-c/Pass.h"
 
+#define MLIR_PYTHON_CAPSULE_AFFINE_MAP "mlir.ir.AffineMap._CAPIPtr"
 #define MLIR_PYTHON_CAPSULE_ATTRIBUTE "mlir.ir.Attribute._CAPIPtr"
 #define MLIR_PYTHON_CAPSULE_CONTEXT "mlir.ir.Context._CAPIPtr"
 #define MLIR_PYTHON_CAPSULE_LOCATION "mlir.ir.Location._CAPIPtr"
@@ -198,6 +200,25 @@ static inline MlirType mlirPythonCapsuleToType(PyObject 
*capsule) {
   return type;
 }
 
+/** Creates a capsule object encapsulating the raw C-API MlirAffineMap.
+ * The returned capsule does not extend or affect ownership of any Python
+ * objects that reference the type in any way.
+ */
+static inline PyObject *mlirPythonAffineMapToCapsule(MlirAffineMap affineMap) {
+  return PyCapsule_New(MLIR_PYTHON_GET_WRAPPED_POINTER(affineMap),
+   MLIR_PYTHON_CAPSULE_AFFINE_MAP, NULL);
+}
+
+/** Extracts an MlirAffineMap from a capsule as produced from
+ * mlirPythonAffineMapToCapsule. If the capsule is not of the right type, then
+ * a null type is returned (as checked via mlirAffineMapIsNull). In such a
+ * case, the Python APIs will have already set an error. */
+static inline MlirAffineMap mlirPythonCapsuleToAffineMap(PyObject *capsule) {
+  void *ptr = PyCapsule_GetPointer(capsule, MLIR_PYTHON_CAPSULE_AFFINE_MAP);
+  MlirAffineMap affineMap = {ptr};
+  return affineMap;
+}
+
 #ifdef __cplusplus
 }
 #endif

diff  --git a/mlir/lib/Bindings/Python/IRModules.cpp 
b/mlir/lib/Bindings/Python/IRModules.cpp
index 8fe63f3d1a40..f7a8e8ec3bcb 100644
--- a/mlir/lib/Bindings/Python/IRModules.cpp
+++ b/mlir/lib/Bindings/Python/IRModules.cpp
@@ -2710,6 +2710,27 @@ class PyFunctionType : public 
PyConcreteType {
 
 } // namespace
 
+//--
+// PyAffineMap.
+//--
+
+bool PyAffineMap::operator==(const PyAffineMap &other) {
+  return mlirAffineMapEqual(affineMap, other.affineMap);
+}
+
+py::object PyAffineMap::getCapsule() {
+  return 
py::reinterpret_steal(mlirPythonAffineMapToCapsule(*this));
+}
+
+PyAffineMap PyAffineMap::createFromCapsule(py::object capsule) {
+  MlirAffineMap rawAffineMap = mlirPythonCapsuleToAffineMap(capsule.ptr());
+  if (mlirAffineMapIsNull(rawAffineMap))
+throw py::error_already_set();
+  return PyAffineMap(
+  PyMlirContext::forContext(mlirAffineMapGetContext(rawAffineMap)),
+  rawAffineMap);
+}
+
 
//--
 // Populates the pybind11 IR submodule.
 
//--
@@ -3392,4 +3413,29 @@ void mlir::python::populateIRSubmodule(py::module &m) {
   PyOpResultList::bind(m);
   PyRegionIterator::bind(m);
   PyRegionList::bind(m);
+
+  
//
+  // Mapping of PyAffineMap.
+  
//
+  py::class_(m, "AffineMap")
+  .def_property_readonly(MLIR_PYTHON_CAPI_PTR_ATTR,
+ &PyAffineMap::getCapsule)
+  .def(MLIR_PYTHON_CAPI_FACTORY_ATTR, &PyAffineMap::createFromCapsule)
+  .def_static(
+  "get_empty",
+  [](DefaultingPyMlirContext context) {
+MlirAffineMap affineMap = mlirAffineMapEmptyGet(context->get());
+return PyAffineMap(context->getRef(), affineMap);
+  },
+  py::arg("context") = py::none(), "Gets an empty affine map.")
+  .def_property_readonly(
+  "context",
+  [](PyAffineMap &self) { return self.getContext().getObject(); },
+  "Context that owns the Affine Map")
+  .def(

[llvm-branch-commits] [mlir] abb4cd3 - [mlir][Python] Initial Affine Map Python Bindings.

[via llvm-branch-commits]

Author: zhanghb97
Date: 2020-12-30T17:36:39+08:00
New Revision: abb4cd3e74954ccb43307c71f7d0f0f937e0e045

URL: 
https://github.com/llvm/llvm-project/commit/abb4cd3e74954ccb43307c71f7d0f0f937e0e045
DIFF: 
https://github.com/llvm/llvm-project/commit/abb4cd3e74954ccb43307c71f7d0f0f937e0e045.diff

LOG: [mlir][Python] Initial Affine Map Python Bindings.

- Add `PyAffineMap` to wrap around `MlirAffineMap`.
- Add `mlirPythonAffineMapToCapsule` and `mlirPythonCapsuleToAffineMap` to 
interoperate with python capsule.
- Add and test some simple bindings of `PyAffineMap`.

Differential Revision: https://reviews.llvm.org/D93200

Added: 
mlir/test/Bindings/Python/ir_affine_map.py

Modified: 
mlir/include/mlir-c/Bindings/Python/Interop.h
mlir/lib/Bindings/Python/IRModules.cpp
mlir/lib/Bindings/Python/IRModules.h

Removed: 




diff  --git a/mlir/include/mlir-c/Bindings/Python/Interop.h 
b/mlir/include/mlir-c/Bindings/Python/Interop.h
index 31265edfb550..ae9d3a84a0a3 100644
--- a/mlir/include/mlir-c/Bindings/Python/Interop.h
+++ b/mlir/include/mlir-c/Bindings/Python/Interop.h
@@ -23,9 +23,11 @@
 
 #include 
 
+#include "mlir-c/AffineMap.h"
 #include "mlir-c/IR.h"
 #include "mlir-c/Pass.h"
 
+#define MLIR_PYTHON_CAPSULE_AFFINE_MAP "mlir.ir.AffineMap._CAPIPtr"
 #define MLIR_PYTHON_CAPSULE_ATTRIBUTE "mlir.ir.Attribute._CAPIPtr"
 #define MLIR_PYTHON_CAPSULE_CONTEXT "mlir.ir.Context._CAPIPtr"
 #define MLIR_PYTHON_CAPSULE_LOCATION "mlir.ir.Location._CAPIPtr"
@@ -198,6 +200,25 @@ static inline MlirType mlirPythonCapsuleToType(PyObject 
*capsule) {
   return type;
 }
 
+/** Creates a capsule object encapsulating the raw C-API MlirAffineMap.
+ * The returned capsule does not extend or affect ownership of any Python
+ * objects that reference the type in any way.
+ */
+static inline PyObject *mlirPythonAffineMapToCapsule(MlirAffineMap affineMap) {
+  return PyCapsule_New(MLIR_PYTHON_GET_WRAPPED_POINTER(affineMap),
+   MLIR_PYTHON_CAPSULE_AFFINE_MAP, NULL);
+}
+
+/** Extracts an MlirAffineMap from a capsule as produced from
+ * mlirPythonAffineMapToCapsule. If the capsule is not of the right type, then
+ * a null type is returned (as checked via mlirAffineMapIsNull). In such a
+ * case, the Python APIs will have already set an error. */
+static inline MlirAffineMap mlirPythonCapsuleToAffineMap(PyObject *capsule) {
+  void *ptr = PyCapsule_GetPointer(capsule, MLIR_PYTHON_CAPSULE_AFFINE_MAP);
+  MlirAffineMap affineMap = {ptr};
+  return affineMap;
+}
+
 #ifdef __cplusplus
 }
 #endif

diff  --git a/mlir/lib/Bindings/Python/IRModules.cpp 
b/mlir/lib/Bindings/Python/IRModules.cpp
index 8fe63f3d1a40..f7a8e8ec3bcb 100644
--- a/mlir/lib/Bindings/Python/IRModules.cpp
+++ b/mlir/lib/Bindings/Python/IRModules.cpp
@@ -2710,6 +2710,27 @@ class PyFunctionType : public 
PyConcreteType {
 
 } // namespace
 
+//--
+// PyAffineMap.
+//--
+
+bool PyAffineMap::operator==(const PyAffineMap &other) {
+  return mlirAffineMapEqual(affineMap, other.affineMap);
+}
+
+py::object PyAffineMap::getCapsule() {
+  return 
py::reinterpret_steal(mlirPythonAffineMapToCapsule(*this));
+}
+
+PyAffineMap PyAffineMap::createFromCapsule(py::object capsule) {
+  MlirAffineMap rawAffineMap = mlirPythonCapsuleToAffineMap(capsule.ptr());
+  if (mlirAffineMapIsNull(rawAffineMap))
+throw py::error_already_set();
+  return PyAffineMap(
+  PyMlirContext::forContext(mlirAffineMapGetContext(rawAffineMap)),
+  rawAffineMap);
+}
+
 
//--
 // Populates the pybind11 IR submodule.
 
//--
@@ -3392,4 +3413,29 @@ void mlir::python::populateIRSubmodule(py::module &m) {
   PyOpResultList::bind(m);
   PyRegionIterator::bind(m);
   PyRegionList::bind(m);
+
+  
//
+  // Mapping of PyAffineMap.
+  
//
+  py::class_(m, "AffineMap")
+  .def_property_readonly(MLIR_PYTHON_CAPI_PTR_ATTR,
+ &PyAffineMap::getCapsule)
+  .def(MLIR_PYTHON_CAPI_FACTORY_ATTR, &PyAffineMap::createFromCapsule)
+  .def_static(
+  "get_empty",
+  [](DefaultingPyMlirContext context) {
+MlirAffineMap affineMap = mlirAffineMapEmptyGet(context->get());
+return PyAffineMap(context->getRef(), affineMap);
+  },
+  py::arg("context") = py::none(), "Gets an empty affine map.")
+  .def_property_readonly(
+  "context",
+  [](PyAffineMap &self) { return self.getContext().getObject(); },
+  "Context that owns the Affine Map")
+  .def(

[llvm-branch-commits] [llvm] bfedd5d - [ConstraintElimination] Add support for select form of and/or

[Juneyoung Lee via llvm-branch-commits]

Author: Juneyoung Lee
Date: 2020-12-30T21:27:36+09:00
New Revision: bfedd5d2b650e0fcef9c16907e8b694d9b213181

URL: 
https://github.com/llvm/llvm-project/commit/bfedd5d2b650e0fcef9c16907e8b694d9b213181
DIFF: 
https://github.com/llvm/llvm-project/commit/bfedd5d2b650e0fcef9c16907e8b694d9b213181.diff

LOG: [ConstraintElimination] Add support for select form of and/or

This patch adds support for select form of and/or.
Currently there is an ongoing effort for moving towards using `select a, b, 
false` instead of `and i1 a, b` and
`select a, true, b` instead of `or i1 a, b` as well.
D93065 has links to relevant changes.

Alive2 proof: (undef input was disabled due to timeout :( )
- and: https://alive2.llvm.org/ce/z/AgvFbQ
- or: https://alive2.llvm.org/ce/z/KjLJyb

Differential Revision: https://reviews.llvm.org/D93935

Added: 


Modified: 
llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
llvm/test/Transforms/ConstraintElimination/and.ll
llvm/test/Transforms/ConstraintElimination/or.ll

Removed: 




diff  --git a/llvm/lib/Transforms/Scalar/ConstraintElimination.cpp 
b/llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
index 616518cbcfdc..35c6c415341a 100644
--- a/llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
+++ b/llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
@@ -218,14 +218,15 @@ static bool eliminateConstraints(Function &F, 
DominatorTree &DT) {
 // If the condition is an OR of 2 compares and the false successor only has
 // the current block as predecessor, queue both negated conditions for the
 // false successor.
-if (match(Br->getCondition(), m_Or(m_Cmp(), m_Cmp( {
+Value *Op0, *Op1;
+if (match(Br->getCondition(), m_LogicalOr(m_Value(Op0), m_Value(Op1))) &&
+match(Op0, m_Cmp()) && match(Op1, m_Cmp())) {
   BasicBlock *FalseSuccessor = Br->getSuccessor(1);
   if (FalseSuccessor->getSinglePredecessor()) {
-auto *OrI = cast(Br->getCondition());
-WorkList.emplace_back(DT.getNode(FalseSuccessor),
-  cast(OrI->getOperand(0)), true);
-WorkList.emplace_back(DT.getNode(FalseSuccessor),
-  cast(OrI->getOperand(1)), true);
+WorkList.emplace_back(DT.getNode(FalseSuccessor), cast(Op0),
+  true);
+WorkList.emplace_back(DT.getNode(FalseSuccessor), cast(Op1),
+  true);
   }
   continue;
 }
@@ -233,14 +234,14 @@ static bool eliminateConstraints(Function &F, 
DominatorTree &DT) {
 // If the condition is an AND of 2 compares and the true successor only has
 // the current block as predecessor, queue both conditions for the true
 // successor.
-if (match(Br->getCondition(), m_And(m_Cmp(), m_Cmp( {
+if (match(Br->getCondition(), m_LogicalAnd(m_Value(Op0), m_Value(Op1))) &&
+match(Op0, m_Cmp()) && match(Op1, m_Cmp())) {
   BasicBlock *TrueSuccessor = Br->getSuccessor(0);
   if (TrueSuccessor->getSinglePredecessor()) {
-auto *AndI = cast(Br->getCondition());
-WorkList.emplace_back(DT.getNode(TrueSuccessor),
-  cast(AndI->getOperand(0)), false);
-WorkList.emplace_back(DT.getNode(TrueSuccessor),
-  cast(AndI->getOperand(1)), false);
+WorkList.emplace_back(DT.getNode(TrueSuccessor), cast(Op0),
+  false);
+WorkList.emplace_back(DT.getNode(TrueSuccessor), cast(Op1),
+  false);
   }
   continue;
 }

diff  --git a/llvm/test/Transforms/ConstraintElimination/and.ll 
b/llvm/test/Transforms/ConstraintElimination/and.ll
index c9b633049757..e1ec8490a792 100644
--- a/llvm/test/Transforms/ConstraintElimination/and.ll
+++ b/llvm/test/Transforms/ConstraintElimination/and.ll
@@ -69,6 +69,7 @@ exit:
   ret i32 20
 }
 
+; The result of test_and_ule and test_and_select_ule should be same
 define i32 @test_and_select_ule(i32 %x, i32 %y, i32 %z, i32 %a) {
 ; CHECK-LABEL: @test_and_select_ule(
 ; CHECK-NEXT:  entry:
@@ -78,11 +79,11 @@ define i32 @test_and_select_ule(i32 %x, i32 %y, i32 %z, i32 
%a) {
 ; CHECK-NEXT:br i1 [[AND]], label [[BB1:%.*]], label [[EXIT:%.*]]
 ; CHECK:   bb1:
 ; CHECK-NEXT:[[T_1:%.*]] = icmp ule i32 [[X]], [[Z]]
-; CHECK-NEXT:call void @use(i1 [[T_1]])
+; CHECK-NEXT:call void @use(i1 true)
 ; CHECK-NEXT:[[T_2:%.*]] = icmp ule i32 [[X]], [[Y]]
-; CHECK-NEXT:call void @use(i1 [[T_2]])
+; CHECK-NEXT:call void @use(i1 true)
 ; CHECK-NEXT:[[T_3:%.*]] = icmp ule i32 [[Y]], [[Z]]
-; CHECK-NEXT:call void @use(i1 [[T_3]])
+; CHECK-NEXT:call void @use(i1 true)
 ; CHECK-NEXT:[[C_3:%.*]] = icmp ule i32 [[X]], [[A:%.*]]
 ; CHECK-NEXT:call void @use(i1 [[C_3]])
 ; CHECK-NEXT:ret i32 10

diff  --git a/llvm/test/Transforms/ConstraintElimination/or.ll 
b/llvm/test/Tr

[llvm-branch-commits] [llvm] e6e6404 - [SimplifyCFG] Add tests for select form and/or for creating select from icmps

[Juneyoung Lee via llvm-branch-commits]

Author: Juneyoung Lee
Date: 2020-12-30T22:15:39+09:00
New Revision: e6e6404600281d4ae34162a5853e7a9cdbe50d44

URL: 
https://github.com/llvm/llvm-project/commit/e6e6404600281d4ae34162a5853e7a9cdbe50d44
DIFF: 
https://github.com/llvm/llvm-project/commit/e6e6404600281d4ae34162a5853e7a9cdbe50d44.diff

LOG: [SimplifyCFG] Add tests for select form and/or for creating select from 
icmps

Added: 


Modified: 
llvm/test/Transforms/SimplifyCFG/switch_create.ll

Removed: 




diff  --git a/llvm/test/Transforms/SimplifyCFG/switch_create.ll 
b/llvm/test/Transforms/SimplifyCFG/switch_create.ll
index 3314fc982ae7..cc7a48904482 100644
--- a/llvm/test/Transforms/SimplifyCFG/switch_create.ll
+++ b/llvm/test/Transforms/SimplifyCFG/switch_create.ll
@@ -31,6 +31,31 @@ F:  ; preds = %0
   ret void
 }
 
+define void @test1_select(i32 %V) {
+; CHECK-LABEL: @test1_select(
+; CHECK-NEXT:[[C1:%.*]] = icmp eq i32 [[V:%.*]], 4
+; CHECK-NEXT:[[C2:%.*]] = icmp eq i32 [[V]], 17
+; CHECK-NEXT:[[CN:%.*]] = select i1 [[C1]], i1 true, i1 [[C2]]
+; CHECK-NEXT:br i1 [[CN]], label [[T:%.*]], label [[F:%.*]]
+; CHECK:   T:
+; CHECK-NEXT:call void @foo1()
+; CHECK-NEXT:ret void
+; CHECK:   F:
+; CHECK-NEXT:call void @foo2()
+; CHECK-NEXT:ret void
+;
+  %C1 = icmp eq i32 %V, 4
+  %C2 = icmp eq i32 %V, 17
+  %CN = select i1 %C1, i1 true, i1 %C2
+  br i1 %CN, label %T, label %F
+T:
+  call void @foo1( )
+  ret void
+F:
+  call void @foo2( )
+  ret void
+}
+
 define void @test1_ptr(i32* %V) {
 ; DL-LABEL: @test1_ptr(
 ; DL-NEXT:[[MAGICPTR:%.*]] = ptrtoint i32* [[V:%.*]] to i32
@@ -108,6 +133,31 @@ F:  ; preds = %0
   ret void
 }
 
+define void @test2_select(i32 %V) {
+; CHECK-LABEL: @test2_select(
+; CHECK-NEXT:[[C1:%.*]] = icmp ne i32 [[V:%.*]], 4
+; CHECK-NEXT:[[C2:%.*]] = icmp ne i32 [[V]], 17
+; CHECK-NEXT:[[CN:%.*]] = select i1 [[C1]], i1 [[C2]], i1 false
+; CHECK-NEXT:br i1 [[CN]], label [[T:%.*]], label [[F:%.*]]
+; CHECK:   T:
+; CHECK-NEXT:call void @foo1()
+; CHECK-NEXT:ret void
+; CHECK:   F:
+; CHECK-NEXT:call void @foo2()
+; CHECK-NEXT:ret void
+;
+  %C1 = icmp ne i32 %V, 4
+  %C2 = icmp ne i32 %V, 17
+  %CN = select i1 %C1, i1 %C2, i1 false
+  br i1 %CN, label %T, label %F
+T:
+  call void @foo1( )
+  ret void
+F:
+  call void @foo2( )
+  ret void
+}
+
 define void @test3(i32 %V) {
 ; CHECK-LABEL: @test3(
 ; CHECK-NEXT:switch i32 [[V:%.*]], label [[F:%.*]] [
@@ -208,7 +258,7 @@ define i1 @test6({ i32, i32 }* %I) {
 ; CHECK-LABEL: @test6(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:[[TMP_1_I:%.*]] = getelementptr { i32, i32 }, { i32, i32 }* 
[[I:%.*]], i64 0, i32 1
-; CHECK-NEXT:[[TMP_2_I:%.*]] = load i32, i32* [[TMP_1_I]]
+; CHECK-NEXT:[[TMP_2_I:%.*]] = load i32, i32* [[TMP_1_I]], align 4
 ; CHECK-NEXT:[[TMP_2_I_OFF:%.*]] = add i32 [[TMP_2_I]], -14
 ; CHECK-NEXT:[[SWITCH:%.*]] = icmp ult i32 [[TMP_2_I_OFF]], 6
 ; CHECK-NEXT:[[SPEC_SELECT:%.*]] = select i1 [[SWITCH]], i1 true, i1 false
@@ -253,7 +303,7 @@ define void @test7(i8 zeroext %c, i32 %x) nounwind ssp 
noredzone {
 ; CHECK-NEXT:i8 97, label [[IF_THEN]]
 ; CHECK-NEXT:]
 ; CHECK:   if.then:
-; CHECK-NEXT:tail call void @foo1() #2
+; CHECK-NEXT:tail call void @foo1() [[ATTR2:#.*]]
 ; CHECK-NEXT:ret void
 ; CHECK:   if.end:
 ; CHECK-NEXT:ret void
@@ -289,7 +339,7 @@ define i32 @test8(i8 zeroext %c, i32 %x, i1 %C) nounwind 
ssp noredzone {
 ; CHECK-NEXT:]
 ; CHECK:   if.then:
 ; CHECK-NEXT:[[A:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ 42, 
[[SWITCH_EARLY_TEST]] ], [ 42, [[N]] ], [ 42, [[SWITCH_EARLY_TEST]] ]
-; CHECK-NEXT:tail call void @foo1() #2
+; CHECK-NEXT:tail call void @foo1() [[ATTR2]]
 ; CHECK-NEXT:ret i32 [[A]]
 ; CHECK:   if.end:
 ; CHECK-NEXT:ret i32 0
@@ -413,6 +463,28 @@ F:
 
 }
 
+define i32 @test10_select(i32 %mode, i1 %Cond) {
+; CHECK-LABEL: @test10_select(
+; CHECK-NEXT:  T:
+; CHECK-NEXT:[[A:%.*]] = icmp ne i32 [[MODE:%.*]], 0
+; CHECK-NEXT:[[B:%.*]] = icmp ne i32 [[MODE]], 51
+; CHECK-NEXT:[[C:%.*]] = select i1 [[A]], i1 [[B]], i1 false
+; CHECK-NEXT:[[D:%.*]] = and i1 [[C]], [[COND:%.*]]
+; CHECK-NEXT:[[SPEC_SELECT:%.*]] = select i1 [[D]], i32 123, i32 324
+; CHECK-NEXT:ret i32 [[SPEC_SELECT]]
+;
+  %A = icmp ne i32 %mode, 0
+  %B = icmp ne i32 %mode, 51
+  %C = select i1 %A, i1 %B, i1 false
+  %D = and i1 %C, %Cond
+  br i1 %D, label %T, label %F
+T:
+  ret i32 123
+F:
+  ret i32 324
+
+}
+
 ; PR8780
 define i32 @test11(i32 %bar) nounwind {
 ; CHECK-LABEL: @test11(
@@ -465,8 +537,8 @@ return:   ; preds = 
%if.end, %if.then
 define void @test12() nounwind {
 ; CHECK-LABEL: @test12(
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:[[A_OLD:%.*]] = icmp eq i32 undef, undef
-; CHECK-NEXT:br i1 [[A_OLD]], label [[BB55_US_US:%.*]],

[llvm-branch-commits] [libcxx] 3f0b637 - [libc++] [docs] Mark contract-related papers as removed from C++20.

[Marek Kurdej via llvm-branch-commits]

Author: Marek Kurdej
Date: 2020-12-30T14:24:26+01:00
New Revision: 3f0b637d6b3ef967383610051f040c2a7d40d206

URL: 
https://github.com/llvm/llvm-project/commit/3f0b637d6b3ef967383610051f040c2a7d40d206
DIFF: 
https://github.com/llvm/llvm-project/commit/3f0b637d6b3ef967383610051f040c2a7d40d206.diff

LOG: [libc++] [docs] Mark contract-related papers as removed from C++20.

Added: 


Modified: 
libcxx/docs/Cxx2aStatusPaperStatus.csv

Removed: 




diff  --git a/libcxx/docs/Cxx2aStatusPaperStatus.csv 
b/libcxx/docs/Cxx2aStatusPaperStatus.csv
index fe5b2f5d4771..c2a84a4b4353 100644
--- a/libcxx/docs/Cxx2aStatusPaperStatus.csv
+++ b/libcxx/docs/Cxx2aStatusPaperStatus.csv
@@ -31,7 +31,7 @@
 "`P0475R1 `__","LWG","LWG 2511: guaranteed copy 
elision for piecewise construction","Rapperswil","",""
 "`P0476R2 `__","LWG","Bit-casting object 
representations","Rapperswil","",""
 "`P0528R3 `__","CWG","The Curious Case of Padding 
Bits, Featuring Atomic Compare-and-Exchange","Rapperswil","",""
-"`P0542R5 `__","CWG","Support for contract based 
programming in C++","Rapperswil","",""
+"`P0542R5 `__","CWG","Support for contract based 
programming in C++","Rapperswil","*Removed in Cologne*","n/a"
 "`P0556R3 `__","LWG","Integral power-of-2 
operations","Rapperswil","|Complete|","9.0"
 "`P0619R4 `__","LWG","Reviewing Deprecated 
Facilities of C++17 for C++20","Rapperswil","|Partial| [#note-P0619]_",""
 "`P0646R1 `__","LWG","Improving the Return Value of 
Erase-Like Algorithms","Rapperswil","|Complete|","10.0"
@@ -39,7 +39,7 @@
 "`P0758R1 `__","LWG","Implicit conversion traits 
and utility functions","Rapperswil","|Complete|",""
 "`P0759R1 `__","LWG","fpos 
Requirements","Rapperswil","|Complete|","11.0"
 "`P0769R2 `__","LWG","Add shift to 
","Rapperswil","",""
-"`P0788R3 `__","LWG","Standard Library 
Specification in a Concepts and Contracts World","Rapperswil","",""
+"`P0788R3 `__","LWG","Standard Library 
Specification in a Concepts and Contracts World","Rapperswil","*Removed in 
Cologne*","n/a"
 "`P0879R0 `__","LWG","Constexpr for swap and swap 
related functions Also resolves LWG issue 2800.","Rapperswil","",""
 "`P0887R1 `__","LWG","The identity 
metafunction","Rapperswil","|Complete|","8.0"
 "`P0892R2 
`__","CWG","explicit(bool)","Rapperswil","",""



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[llvm-branch-commits] [mlir] e47e313 - [mlir] Fix a typo MemRefType -> UnrankedMemRefType

[Alexander Belyaev via llvm-branch-commits]

Author: Alexander Belyaev
Date: 2020-12-30T14:35:25+01:00
New Revision: e47e313d647e00ab5fbb4a17f9b69f33c49aafc3

URL: 
https://github.com/llvm/llvm-project/commit/e47e313d647e00ab5fbb4a17f9b69f33c49aafc3
DIFF: 
https://github.com/llvm/llvm-project/commit/e47e313d647e00ab5fbb4a17f9b69f33c49aafc3.diff

LOG: [mlir] Fix a typo MemRefType -> UnrankedMemRefType

Added: 


Modified: 
mlir/include/mlir/IR/OpBase.td

Removed: 




diff  --git a/mlir/include/mlir/IR/OpBase.td b/mlir/include/mlir/IR/OpBase.td
index c65cc22c90f0..dfea9fed70a5 100644
--- a/mlir/include/mlir/IR/OpBase.td
+++ b/mlir/include/mlir/IR/OpBase.td
@@ -656,7 +656,7 @@ class 4DTensorOf allowedTypes> : 
TensorRankOf;
 def AnyUnrankedMemRef :
 ShapedContainerType<[AnyType],
 IsUnrankedMemRefTypePred, "unranked.memref",
-"::mlir::MemRefType">;
+"::mlir::UnrankedMemRefType">;
 // Memref type.
 
 // Memrefs are blocks of data with fixed type and rank.



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[llvm-branch-commits] [llvm] 420d046 - clang-format, address warnings

[Juneyoung Lee via llvm-branch-commits]

Author: Juneyoung Lee
Date: 2020-12-30T23:05:07+09:00
New Revision: 420d046d6bdd8d950dad389a97e31f841052efb2

URL: 
https://github.com/llvm/llvm-project/commit/420d046d6bdd8d950dad389a97e31f841052efb2
DIFF: 
https://github.com/llvm/llvm-project/commit/420d046d6bdd8d950dad389a97e31f841052efb2.diff

LOG: clang-format, address warnings

Added: 


Modified: 
clang/test/CodeGen/X86/avx512-reduceMinMaxIntrin.c
clang/test/CodeGen/X86/avx512f-builtins.c
clang/test/CodeGen/X86/avx512vl-builtins-constrained.c
clang/test/CodeGen/arm64-abi-vector.c
llvm/lib/IR/AutoUpgrade.cpp
llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp
llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp

Removed: 




diff  --git a/clang/test/CodeGen/X86/avx512-reduceMinMaxIntrin.c 
b/clang/test/CodeGen/X86/avx512-reduceMinMaxIntrin.c
index bb43d348205f..d32eb4b00040 100644
--- a/clang/test/CodeGen/X86/avx512-reduceMinMaxIntrin.c
+++ b/clang/test/CodeGen/X86/avx512-reduceMinMaxIntrin.c
@@ -15,16 +15,16 @@ unsigned long long test_mm512_reduce_max_epu64(__m512i __W){
 }
 
 double test_mm512_reduce_max_pd(__m512d __W){
-// CHECK-LABEL: @test_mm512_reduce_max_pd(
-// CHECK:shufflevector <8 x double> %{{.*}}, <8 x double> poison, <4 x 
i32> 
-// CHECK:shufflevector <8 x double> %{{.*}}, <8 x double> poison, <4 x 
i32> 
-// CHECK:call <4 x double> @llvm.x86.avx.max.pd.256(<4 x double> %{{.*}}, 
<4 x double> %{{.*}})
-// CHECK:shufflevector <4 x double> %{{.*}}, <4 x double> poison, <2 x 
i32> 
-// CHECK:shufflevector <4 x double> %{{.*}}, <4 x double> poison, <2 x 
i32> 
-// CHECK:call <2 x double> @llvm.x86.sse2.max.pd(<2 x double> %{{.*}}, <2 
x double> %{{.*}})
-// CHECK:shufflevector <2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x 
i32> 
-// CHECK:call <2 x double> @llvm.x86.sse2.max.pd(<2 x double> %{{.*}}, <2 
x double> %{{.*}})
-// CHECK:extractelement <2 x double> %{{.*}}, i32 0
+  // CHECK-LABEL: @test_mm512_reduce_max_pd(
+  // CHECK:shufflevector <8 x double> %{{.*}}, <8 x double> poison, <4 x 
i32> 
+  // CHECK:shufflevector <8 x double> %{{.*}}, <8 x double> poison, <4 x 
i32> 
+  // CHECK:call <4 x double> @llvm.x86.avx.max.pd.256(<4 x double> 
%{{.*}}, <4 x double> %{{.*}})
+  // CHECK:shufflevector <4 x double> %{{.*}}, <4 x double> poison, <2 x 
i32> 
+  // CHECK:shufflevector <4 x double> %{{.*}}, <4 x double> poison, <2 x 
i32> 
+  // CHECK:call <2 x double> @llvm.x86.sse2.max.pd(<2 x double> %{{.*}}, 
<2 x double> %{{.*}})
+  // CHECK:shufflevector <2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x 
i32> 
+  // CHECK:call <2 x double> @llvm.x86.sse2.max.pd(<2 x double> %{{.*}}, 
<2 x double> %{{.*}})
+  // CHECK:extractelement <2 x double> %{{.*}}, i32 0
   return _mm512_reduce_max_pd(__W); 
 }
 
@@ -41,16 +41,16 @@ unsigned long long test_mm512_reduce_min_epu64(__m512i __W){
 }
 
 double test_mm512_reduce_min_pd(__m512d __W){
-// CHECK-LABEL: @test_mm512_reduce_min_pd(
-// CHECK:shufflevector <8 x double> %{{.*}}, <8 x double> poison, <4 x 
i32> 
-// CHECK:shufflevector <8 x double> %{{.*}}, <8 x double> poison, <4 x 
i32> 
-// CHECK:call <4 x double> @llvm.x86.avx.min.pd.256(<4 x double> %{{.*}}, 
<4 x double> %{{.*}})
-// CHECK:shufflevector <4 x double> %{{.*}}, <4 x double> poison, <2 x 
i32> 
-// CHECK:shufflevector <4 x double> %{{.*}}, <4 x double> poison, <2 x 
i32> 
-// CHECK:call <2 x double> @llvm.x86.sse2.min.pd(<2 x double> %{{.*}}, <2 
x double> %{{.*}})
-// CHECK:shufflevector <2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x 
i32> 
-// CHECK:call <2 x double> @llvm.x86.sse2.min.pd(<2 x double> %{{.*}}, <2 
x double> %{{.*}})
-// CHECK:extractelement <2 x double> %{{.*}}, i32 0
+  // CHECK-LABEL: @test_mm512_reduce_min_pd(
+  // CHECK:shufflevector <8 x double> %{{.*}}, <8 x double> poison, <4 x 
i32> 
+  // CHECK:shufflevector <8 x double> %{{.*}}, <8 x double> poison, <4 x 
i32> 
+  // CHECK:call <4 x double> @llvm.x86.avx.min.pd.256(<4 x double> 
%{{.*}}, <4 x double> %{{.*}})
+  // CHECK:shufflevector <4 x double> %{{.*}}, <4 x double> poison, <2 x 
i32> 
+  // CHECK:shufflevector <4 x double> %{{.*}}, <4 x double> poison, <2 x 
i32> 
+  // CHECK:call <2 x double> @llvm.x86.sse2.min.pd(<2 x double> %{{.*}}, 
<2 x double> %{{.*}})
+  // CHECK:shufflevector <2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x 
i32> 
+  // CHECK:call <2 x double> @llvm.x86.sse2.min.pd(<2 x double> %{{.*}}, 
<2 x double> %{{.*}})
+  // CHECK:extractelement <2 x double> %{{.*}}, i32 0
   return _mm512_reduce_min_pd(__W); 
 }
 
@@ -71,18 +71,18 @@ unsigned long test_mm512_mask_reduce_max_epu64(__mmask8 
__M, __m512i __W){
 }
 
 double test_mm512_mask_reduce_max_pd(__mmask8 __M, __m512d __W){
-// CHECK-LABEL: @test_mm512_

[llvm-branch-commits] [llvm] 16c2067 - [X86][AMX] Fix compilation warning introduced by 981a0bd8.

[via llvm-branch-commits]

Author: Wang, Pengfei
Date: 2020-12-30T22:22:13+08:00
New Revision: 16c2067cf212cd8355d4c274db0fe40b486eb3d3

URL: 
https://github.com/llvm/llvm-project/commit/16c2067cf212cd8355d4c274db0fe40b486eb3d3
DIFF: 
https://github.com/llvm/llvm-project/commit/16c2067cf212cd8355d4c274db0fe40b486eb3d3.diff

LOG: [X86][AMX] Fix compilation warning introduced by 981a0bd8.

Added: 


Modified: 
llvm/lib/Target/Hexagon/HexagonTargetObjectFile.cpp

Removed: 




diff  --git a/llvm/lib/Target/Hexagon/HexagonTargetObjectFile.cpp 
b/llvm/lib/Target/Hexagon/HexagonTargetObjectFile.cpp
index cfc8ed813c92..595cf94e3f1d 100644
--- a/llvm/lib/Target/Hexagon/HexagonTargetObjectFile.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonTargetObjectFile.cpp
@@ -331,6 +331,7 @@ unsigned 
HexagonTargetObjectFile::getSmallestAddressableSize(const Type *Ty,
   case Type::LabelTyID:
   case Type::MetadataTyID:
   case Type::X86_MMXTyID:
+  case Type::X86_AMXTyID:
   case Type::TokenTyID:
 return 0;
   }



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[llvm-branch-commits] [llvm] c6035a7 - Remove functions from *-inseltpoison.ll tests if unnecessary

[Juneyoung Lee via llvm-branch-commits]

Author: Juneyoung Lee
Date: 2020-12-30T23:50:37+09:00
New Revision: c6035a7bdf207dc3c1e12c041d5658770893fc68

URL: 
https://github.com/llvm/llvm-project/commit/c6035a7bdf207dc3c1e12c041d5658770893fc68
DIFF: 
https://github.com/llvm/llvm-project/commit/c6035a7bdf207dc3c1e12c041d5658770893fc68.diff

LOG: Remove functions from *-inseltpoison.ll tests if unnecessary

X-inseltpoison.ll is a copy of X.ll with insertelement/shufflevector's
placeholder replaced with poison.
This commit removes a few redundant functions which do not contain any
shufflevector/insertelement.

Added: 


Modified: 
llvm/test/Transforms/InstCombine/assume-inseltpoison.ll
llvm/test/Transforms/InstCombine/bswap-inseltpoison.ll
llvm/test/Transforms/InstCombine/fmul-inseltpoison.ll

Removed: 




diff  --git a/llvm/test/Transforms/InstCombine/assume-inseltpoison.ll 
b/llvm/test/Transforms/InstCombine/assume-inseltpoison.ll
index 8c04c4af28ced..f49755570ddc9 100644
--- a/llvm/test/Transforms/InstCombine/assume-inseltpoison.ll
+++ b/llvm/test/Transforms/InstCombine/assume-inseltpoison.ll
@@ -4,368 +4,10 @@
 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-unknown-linux-gnu"
 
+; A copy of assume.ll, with undef at insertelement/shufflevector replaced with
+; poison.
 declare void @llvm.assume(i1) #1
 
-; Check that the alignment has been upgraded and that the assume has not
-; been removed:
-
-define i32 @foo1(i32* %a) #0 {
-; CHECK-LABEL: @foo1(
-; CHECK-NEXT:[[T0:%.*]] = load i32, i32* [[A:%.*]], align 32
-; CHECK-NEXT:[[PTRINT:%.*]] = ptrtoint i32* [[A]] to i64
-; CHECK-NEXT:[[MASKEDPTR:%.*]] = and i64 [[PTRINT]], 31
-; CHECK-NEXT:[[MASKCOND:%.*]] = icmp eq i64 [[MASKEDPTR]], 0
-; CHECK-NEXT:tail call void @llvm.assume(i1 [[MASKCOND]])
-; CHECK-NEXT:ret i32 [[T0]]
-;
-  %t0 = load i32, i32* %a, align 4
-  %ptrint = ptrtoint i32* %a to i64
-  %maskedptr = and i64 %ptrint, 31
-  %maskcond = icmp eq i64 %maskedptr, 0
-  tail call void @llvm.assume(i1 %maskcond)
-  ret i32 %t0
-}
-
-; Same check as in @foo1, but make sure it works if the assume is first too.
-
-define i32 @foo2(i32* %a) #0 {
-; CHECK-LABEL: @foo2(
-; CHECK-NEXT:[[PTRINT:%.*]] = ptrtoint i32* [[A:%.*]] to i64
-; CHECK-NEXT:[[MASKEDPTR:%.*]] = and i64 [[PTRINT]], 31
-; CHECK-NEXT:[[MASKCOND:%.*]] = icmp eq i64 [[MASKEDPTR]], 0
-; CHECK-NEXT:tail call void @llvm.assume(i1 [[MASKCOND]])
-; CHECK-NEXT:[[T0:%.*]] = load i32, i32* [[A]], align 32
-; CHECK-NEXT:ret i32 [[T0]]
-;
-  %ptrint = ptrtoint i32* %a to i64
-  %maskedptr = and i64 %ptrint, 31
-  %maskcond = icmp eq i64 %maskedptr, 0
-  tail call void @llvm.assume(i1 %maskcond)
-  %t0 = load i32, i32* %a, align 4
-  ret i32 %t0
-}
-
-define i32 @simple(i32 %a) #1 {
-; CHECK-LABEL: @simple(
-; CHECK-NEXT:[[CMP:%.*]] = icmp eq i32 [[A:%.*]], 4
-; CHECK-NEXT:tail call void @llvm.assume(i1 [[CMP]])
-; CHECK-NEXT:ret i32 4
-;
-  %cmp = icmp eq i32 %a, 4
-  tail call void @llvm.assume(i1 %cmp)
-  ret i32 %a
-}
-
-define i32 @can1(i1 %a, i1 %b, i1 %c) {
-; CHECK-LABEL: @can1(
-; CHECK-NEXT:call void @llvm.assume(i1 [[A:%.*]])
-; CHECK-NEXT:call void @llvm.assume(i1 [[B:%.*]])
-; CHECK-NEXT:call void @llvm.assume(i1 [[C:%.*]])
-; CHECK-NEXT:ret i32 5
-;
-  %and1 = and i1 %a, %b
-  %and  = and i1 %and1, %c
-  tail call void @llvm.assume(i1 %and)
-  ret i32 5
-}
-
-define i32 @can2(i1 %a, i1 %b, i1 %c) {
-; CHECK-LABEL: @can2(
-; CHECK-NEXT:[[TMP1:%.*]] = xor i1 [[A:%.*]], true
-; CHECK-NEXT:call void @llvm.assume(i1 [[TMP1]])
-; CHECK-NEXT:[[TMP2:%.*]] = xor i1 [[B:%.*]], true
-; CHECK-NEXT:call void @llvm.assume(i1 [[TMP2]])
-; CHECK-NEXT:ret i32 5
-;
-  %v = or i1 %a, %b
-  %w = xor i1 %v, 1
-  tail call void @llvm.assume(i1 %w)
-  ret i32 5
-}
-
-define i32 @bar1(i32 %a) #0 {
-; CHECK-LABEL: @bar1(
-; CHECK-NEXT:[[AND:%.*]] = and i32 [[A:%.*]], 7
-; CHECK-NEXT:[[CMP:%.*]] = icmp eq i32 [[AND]], 1
-; CHECK-NEXT:tail call void @llvm.assume(i1 [[CMP]])
-; CHECK-NEXT:ret i32 1
-;
-  %and1 = and i32 %a, 3
-  %and = and i32 %a, 7
-  %cmp = icmp eq i32 %and, 1
-  tail call void @llvm.assume(i1 %cmp)
-  ret i32 %and1
-}
-
-define i32 @bar2(i32 %a) #0 {
-; CHECK-LABEL: @bar2(
-; CHECK-NEXT:[[AND:%.*]] = and i32 [[A:%.*]], 7
-; CHECK-NEXT:[[CMP:%.*]] = icmp eq i32 [[AND]], 1
-; CHECK-NEXT:tail call void @llvm.assume(i1 [[CMP]])
-; CHECK-NEXT:ret i32 1
-;
-  %and = and i32 %a, 7
-  %cmp = icmp eq i32 %and, 1
-  tail call void @llvm.assume(i1 %cmp)
-  %and1 = and i32 %a, 3
-  ret i32 %and1
-}
-
-define i32 @bar3(i32 %a, i1 %x, i1 %y) #0 {
-; CHECK-LABEL: @bar3(
-; CHECK-NEXT:  entry:
-; CHECK-NEXT:tail call void @llvm.assume(i1 [[X:%.*]])
-; CHECK-NEXT:[[AND:%.*]] = and i32 [[A:%.*]], 7
-; CHECK-NEXT:[[CMP:%.*]] = icmp eq i32 [[AND]], 1
-; CHECK-NEXT:tail call void @llvm

[llvm-branch-commits] [llvm] e90ea76 - [IR] remove 'NoNan' param when creating FP reductions

[Sanjay Patel via llvm-branch-commits]

Author: Sanjay Patel
Date: 2020-12-30T09:51:23-05:00
New Revision: e90ea76380d411bf81861228f23e4716ef337100

URL: 
https://github.com/llvm/llvm-project/commit/e90ea76380d411bf81861228f23e4716ef337100
DIFF: 
https://github.com/llvm/llvm-project/commit/e90ea76380d411bf81861228f23e4716ef337100.diff

LOG: [IR] remove 'NoNan' param when creating FP reductions

This is no-functional-change-intended (AFAIK, we can't
isolate this difference in a regression test).

That's because the callers should be setting the IRBuilder's
FMF field when creating the reduction and/or setting those
flags after creating. It doesn't make sense to override this
one flag alone.

This is part of a multi-step process to clean up the FMF
setting/propagation. See PR35538 for an example.

Added: 


Modified: 
llvm/include/llvm/IR/IRBuilder.h
llvm/lib/IR/IRBuilder.cpp
llvm/lib/Transforms/Utils/LoopUtils.cpp

Removed: 




diff  --git a/llvm/include/llvm/IR/IRBuilder.h 
b/llvm/include/llvm/IR/IRBuilder.h
index 4b26299d046c..c9074abe88c2 100644
--- a/llvm/include/llvm/IR/IRBuilder.h
+++ b/llvm/include/llvm/IR/IRBuilder.h
@@ -779,11 +779,11 @@ class IRBuilderBase {
 
   /// Create a vector float max reduction intrinsic of the source
   /// vector.
-  CallInst *CreateFPMaxReduce(Value *Src, bool NoNaN = false);
+  CallInst *CreateFPMaxReduce(Value *Src);
 
   /// Create a vector float min reduction intrinsic of the source
   /// vector.
-  CallInst *CreateFPMinReduce(Value *Src, bool NoNaN = false);
+  CallInst *CreateFPMinReduce(Value *Src);
 
   /// Create a lifetime.start intrinsic.
   ///

diff  --git a/llvm/lib/IR/IRBuilder.cpp b/llvm/lib/IR/IRBuilder.cpp
index e8fa35314a94..51e289165590 100644
--- a/llvm/lib/IR/IRBuilder.cpp
+++ b/llvm/lib/IR/IRBuilder.cpp
@@ -380,24 +380,12 @@ CallInst *IRBuilderBase::CreateIntMinReduce(Value *Src, 
bool IsSigned) {
   return getReductionIntrinsic(this, ID, Src);
 }
 
-CallInst *IRBuilderBase::CreateFPMaxReduce(Value *Src, bool NoNaN) {
-  auto Rdx = getReductionIntrinsic(this, Intrinsic::vector_reduce_fmax, Src);
-  if (NoNaN) {
-FastMathFlags FMF;
-FMF.setNoNaNs();
-Rdx->setFastMathFlags(FMF);
-  }
-  return Rdx;
+CallInst *IRBuilderBase::CreateFPMaxReduce(Value *Src) {
+  return getReductionIntrinsic(this, Intrinsic::vector_reduce_fmax, Src);
 }
 
-CallInst *IRBuilderBase::CreateFPMinReduce(Value *Src, bool NoNaN) {
-  auto Rdx = getReductionIntrinsic(this, Intrinsic::vector_reduce_fmin, Src);
-  if (NoNaN) {
-FastMathFlags FMF;
-FMF.setNoNaNs();
-Rdx->setFastMathFlags(FMF);
-  }
-  return Rdx;
+CallInst *IRBuilderBase::CreateFPMinReduce(Value *Src) {
+  return getReductionIntrinsic(this, Intrinsic::vector_reduce_fmin, Src);
 }
 
 CallInst *IRBuilderBase::CreateLifetimeStart(Value *Ptr, ConstantInt *Size) {

diff  --git a/llvm/lib/Transforms/Utils/LoopUtils.cpp 
b/llvm/lib/Transforms/Utils/LoopUtils.cpp
index 80ae6b37e132..a3665a5636e5 100644
--- a/llvm/lib/Transforms/Utils/LoopUtils.cpp
+++ b/llvm/lib/Transforms/Utils/LoopUtils.cpp
@@ -1039,10 +1039,10 @@ Value *llvm::createSimpleTargetReduction(
   case Instruction::FCmp:
 if (Flags.IsMaxOp) {
   MinMaxKind = RD::MRK_FloatMax;
-  BuildFunc = [&]() { return Builder.CreateFPMaxReduce(Src, Flags.NoNaN); 
};
+  BuildFunc = [&]() { return Builder.CreateFPMaxReduce(Src); };
 } else {
   MinMaxKind = RD::MRK_FloatMin;
-  BuildFunc = [&]() { return Builder.CreateFPMinReduce(Src, Flags.NoNaN); 
};
+  BuildFunc = [&]() { return Builder.CreateFPMinReduce(Src); };
 }
 break;
   default:



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[llvm-branch-commits] [llvm] 2016f2c - Fixes warning 'enumeration value not handled in switch'.

[Jacques Pienaar via llvm-branch-commits]

Author: Bogdan Graur
Date: 2020-12-30T06:56:29-08:00
New Revision: 2016f2c8a76d67d8cd4771796b6cd19fd66e3f37

URL: 
https://github.com/llvm/llvm-project/commit/2016f2c8a76d67d8cd4771796b6cd19fd66e3f37
DIFF: 
https://github.com/llvm/llvm-project/commit/2016f2c8a76d67d8cd4771796b6cd19fd66e3f37.diff

LOG: Fixes warning 'enumeration value not handled in switch'.

This was introduced in commit: 981a0bd85811fe49379fdbef35528e2c2f3511a3.

Differential Revision: https://reviews.llvm.org/D93944

Added: 


Modified: 
llvm/tools/llvm-c-test/echo.cpp

Removed: 




diff  --git a/llvm/tools/llvm-c-test/echo.cpp b/llvm/tools/llvm-c-test/echo.cpp
index e2262c2d575d..a29f360d1fdf 100644
--- a/llvm/tools/llvm-c-test/echo.cpp
+++ b/llvm/tools/llvm-c-test/echo.cpp
@@ -149,6 +149,8 @@ struct TypeCloner {
   LLVMGetVectorSize(Src));
   case LLVMMetadataTypeKind:
 return LLVMMetadataTypeInContext(Ctx);
+  case LLVMX86_AMXTypeKind:
+return LLVMX86AMXTypeInContext(Ctx);
   case LLVMX86_MMXTypeKind:
 return LLVMX86MMXTypeInContext(Ctx);
   case LLVMTokenTypeKind:



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[llvm-branch-commits] [llvm] 3567908 - [SLP] add fadd reduction test to show broken FMF propagation; NFC

[Sanjay Patel via llvm-branch-commits]

Author: Sanjay Patel
Date: 2020-12-30T11:27:50-05:00
New Revision: 3567908d8ceb95afe50961c7a953c202131235c5

URL: 
https://github.com/llvm/llvm-project/commit/3567908d8ceb95afe50961c7a953c202131235c5
DIFF: 
https://github.com/llvm/llvm-project/commit/3567908d8ceb95afe50961c7a953c202131235c5.diff

LOG: [SLP] add fadd reduction test to show broken FMF propagation; NFC

Added: 


Modified: 
llvm/test/Transforms/SLPVectorizer/X86/horizontal.ll

Removed: 




diff  --git a/llvm/test/Transforms/SLPVectorizer/X86/horizontal.ll 
b/llvm/test/Transforms/SLPVectorizer/X86/horizontal.ll
index 5663c88b6366..8e175f1acda9 100644
--- a/llvm/test/Transforms/SLPVectorizer/X86/horizontal.ll
+++ b/llvm/test/Transforms/SLPVectorizer/X86/horizontal.ll
@@ -1766,4 +1766,39 @@ bb.1:
   ret void
 }
 
+; FIXME: This is a miscompile.
+; The FMF on the reduction should match the incoming insts.
+
+define float @fadd_v4f32_fmf(float* %p) {
+; CHECK-LABEL: @fadd_v4f32_fmf(
+; CHECK-NEXT:[[P1:%.*]] = getelementptr inbounds float, float* [[P:%.*]], 
i64 1
+; CHECK-NEXT:[[P2:%.*]] = getelementptr inbounds float, float* [[P]], i64 2
+; CHECK-NEXT:[[P3:%.*]] = getelementptr inbounds float, float* [[P]], i64 3
+; CHECK-NEXT:[[TMP1:%.*]] = bitcast float* [[P]] to <4 x float>*
+; CHECK-NEXT:[[TMP2:%.*]] = load <4 x float>, <4 x float>* [[TMP1]], align 
4
+; CHECK-NEXT:[[TMP3:%.*]] = call fast float 
@llvm.vector.reduce.fadd.v4f32(float -0.00e+00, <4 x float> [[TMP2]])
+; CHECK-NEXT:ret float [[TMP3]]
+;
+; STORE-LABEL: @fadd_v4f32_fmf(
+; STORE-NEXT:[[P1:%.*]] = getelementptr inbounds float, float* [[P:%.*]], 
i64 1
+; STORE-NEXT:[[P2:%.*]] = getelementptr inbounds float, float* [[P]], i64 2
+; STORE-NEXT:[[P3:%.*]] = getelementptr inbounds float, float* [[P]], i64 3
+; STORE-NEXT:[[TMP1:%.*]] = bitcast float* [[P]] to <4 x float>*
+; STORE-NEXT:[[TMP2:%.*]] = load <4 x float>, <4 x float>* [[TMP1]], align 
4
+; STORE-NEXT:[[TMP3:%.*]] = call fast float 
@llvm.vector.reduce.fadd.v4f32(float -0.00e+00, <4 x float> [[TMP2]])
+; STORE-NEXT:ret float [[TMP3]]
+;
+  %p1 = getelementptr inbounds float, float* %p, i64 1
+  %p2 = getelementptr inbounds float, float* %p, i64 2
+  %p3 = getelementptr inbounds float, float* %p, i64 3
+  %t0 = load float, float* %p, align 4
+  %t1 = load float, float* %p1, align 4
+  %t2 = load float, float* %p2, align 4
+  %t3 = load float, float* %p3, align 4
+  %add1 = fadd reassoc nsz float %t1, %t0
+  %add2 = fadd reassoc nsz float %t2, %add1
+  %add3 = fadd reassoc nsz float %t3, %add2
+  ret float %add3
+}
+
 declare i32 @__gxx_personality_v0(...)



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[llvm-branch-commits] [mlir] ed507bc - [mlir] NFC - Fix SubViewOp printing

[Nicolas Vasilache via llvm-branch-commits]

Author: Nicolas Vasilache
Date: 2020-12-30T16:34:37Z
New Revision: ed507bc4d5eee48560d28089ab6e31d91ef3fd88

URL: 
https://github.com/llvm/llvm-project/commit/ed507bc4d5eee48560d28089ab6e31d91ef3fd88
DIFF: 
https://github.com/llvm/llvm-project/commit/ed507bc4d5eee48560d28089ab6e31d91ef3fd88.diff

LOG: [mlir] NFC - Fix SubViewOp printing

Avoid casting the source operand type allows better debugging when conversion 
patterns
fail to produce a proper MemRefType.

Added: 


Modified: 
mlir/lib/Dialect/StandardOps/IR/Ops.cpp

Removed: 




diff  --git a/mlir/lib/Dialect/StandardOps/IR/Ops.cpp 
b/mlir/lib/Dialect/StandardOps/IR/Ops.cpp
index 30bf546807c4..c73a9a41719c 100644
--- a/mlir/lib/Dialect/StandardOps/IR/Ops.cpp
+++ b/mlir/lib/Dialect/StandardOps/IR/Ops.cpp
@@ -3053,7 +3053,7 @@ static void print(OpAsmPrinter &p, SubViewOp op) {
   p << op->getName().getStringRef().drop_front(stdDotLen) << ' ';
   p << op.source();
   printOffsetsSizesAndStrides(p, op);
-  p << " : " << op.getSourceType() << " to " << op.getType();
+  p << " : " << op.source().getType() << " to " << op.getType();
 }
 
 /// Parse a subview op of the form:



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[llvm-branch-commits] [mlir] 9b5a3d6 - [mlir] Fix indexing of first offset operand in ops that implement OffsetSizeAndStrideOpInterface

[Nicolas Vasilache via llvm-branch-commits]

Author: Nicolas Vasilache
Date: 2020-12-30T16:44:26Z
New Revision: 9b5a3d67b496ce92729c61b7b2a99e8dc8d39ca3

URL: 
https://github.com/llvm/llvm-project/commit/9b5a3d67b496ce92729c61b7b2a99e8dc8d39ca3
DIFF: 
https://github.com/llvm/llvm-project/commit/9b5a3d67b496ce92729c61b7b2a99e8dc8d39ca3.diff

LOG: [mlir] Fix indexing of first offset operand in ops that implement 
OffsetSizeAndStrideOpInterface

OffsetSizeAndStrideOpInterface ops may have a varying number of operands before 
the first
offset operand. This revision adds a method that such ops much implement to 
properly specify
the position of the first offset operand.

Differential Revision: https://reviews.llvm.org/D93947

Added: 


Modified: 
mlir/include/mlir/Dialect/StandardOps/IR/Ops.td
mlir/include/mlir/Interfaces/ViewLikeInterface.td

Removed: 




diff  --git a/mlir/include/mlir/Dialect/StandardOps/IR/Ops.td 
b/mlir/include/mlir/Dialect/StandardOps/IR/Ops.td
index ba78db68214f..1f7b888167cd 100644
--- a/mlir/include/mlir/Dialect/StandardOps/IR/Ops.td
+++ b/mlir/include/mlir/Dialect/StandardOps/IR/Ops.td
@@ -2177,6 +2177,10 @@ def MemRefReinterpretCastOp:
   unsigned resultRank = getResult().getType().cast().getRank();
   return {1, resultRank, resultRank};
 }
+
+/// Return the number of leading operands before the `offsets`, `sizes` and
+/// and `strides` operands.
+static unsigned getOffsetSizeAndStrideStartOperandIndex() { return 1; }
   }];
 }
 
@@ -3031,7 +3035,8 @@ def SubIOp : IntArithmeticOp<"subi"> {
 
//===--===//
 
 def SubViewOp : BaseOpWithOffsetSizesAndStrides<
-"subview", [DeclareOpInterfaceMethods, 
OffsetSizeAndStrideOpInterface] >  {
+"subview", [DeclareOpInterfaceMethods,
+OffsetSizeAndStrideOpInterface] >  {
   let summary = "memref subview operation";
   let description = [{
 The "subview" operation converts a memref type to another memref type
@@ -3217,6 +3222,10 @@ def SubViewOp : BaseOpWithOffsetSizesAndStrides<
   unsigned rank = getSourceType().getRank();
   return {rank, rank, rank};
 }
+
+/// Return the number of leading operands before the `offsets`, `sizes` and
+/// and `strides` operands.
+static unsigned getOffsetSizeAndStrideStartOperandIndex() { return 1; }
   }];
 
   let hasCanonicalizer = 1;
@@ -3227,7 +3236,8 @@ def SubViewOp : BaseOpWithOffsetSizesAndStrides<
 // SubTensorOp
 
//===--===//
 
-def SubTensorOp : BaseOpWithOffsetSizesAndStrides<"subtensor", 
[OffsetSizeAndStrideOpInterface]> {
+def SubTensorOp : BaseOpWithOffsetSizesAndStrides<
+"subtensor", [OffsetSizeAndStrideOpInterface]> {
   let summary = "subtensor operation";
   let description = [{
 The "subtensor" operation extract a tensor from another tensor as
@@ -3279,12 +3289,12 @@ def SubTensorOp : 
BaseOpWithOffsetSizesAndStrides<"subtensor", [OffsetSizeAndStr
   let results = (outs AnyRankedTensor:$result);
 
   let builders = [
-// Build a SubViewOp with mixed static and dynamic entries.
+// Build a SubTensorOp with mixed static and dynamic entries.
 OpBuilderDAG<(ins "Value":$source, "ArrayRef":$staticOffsets,
   "ArrayRef":$staticSizes, "ArrayRef":$staticStrides,
   "ValueRange":$offsets, "ValueRange":$sizes, "ValueRange":$strides,
   CArg<"ArrayRef", "{}">:$attrs)>,
-// Build a SubViewOp with all dynamic entries.
+// Build a SubTensorOp with all dynamic entries.
 OpBuilderDAG<(ins "Value":$source, "ValueRange":$offsets,
   "ValueRange":$sizes, "ValueRange":$strides,
   CArg<"ArrayRef", "{}">:$attrs)>
@@ -3315,6 +3325,10 @@ def SubTensorOp : 
BaseOpWithOffsetSizesAndStrides<"subtensor", [OffsetSizeAndStr
   unsigned rank = getSourceType().getRank();
   return {rank, rank, rank};
 }
+
+/// Return the number of leading operands before the `offsets`, `sizes` and
+/// and `strides` operands.
+static unsigned getOffsetSizeAndStrideStartOperandIndex() { return 1; }
   }];
 
   let hasCanonicalizer = 1;
@@ -3324,7 +3338,8 @@ def SubTensorOp : 
BaseOpWithOffsetSizesAndStrides<"subtensor", [OffsetSizeAndStr
 // SubTensorInsertOp
 
//===--===//
 
-def SubTensorInsertOp : BaseOpWithOffsetSizesAndStrides<"subtensor_insert", 
[OffsetSizeAndStrideOpInterface]> {
+def SubTensorInsertOp : BaseOpWithOffsetSizesAndStrides<
+"subtensor_insert", [OffsetSizeAndStrideOpInterface]> {
   let summary = "subtensor_insert operation";
   let description = [{
 The "subtensor_insert" operation insert a tensor `source` into another
@@ -3369,13 +3384,13 @@ def SubTensorInsertOp : 
BaseOpWithOffsetSizesAndStrides<"subtensor_insert", [Off
   let results = (outs AnyRankedTensor:$result);
 
   let builders = [
-// Build 

[llvm-branch-commits] [lld] b0d6beb - [ELF] Drop '>>> defined in ' for locations of linker synthesized symbols

[Fangrui Song via llvm-branch-commits]

Author: Fangrui Song
Date: 2020-12-30T09:16:26-08:00
New Revision: b0d6bebe90ddce73e58824ba5cb294cb663b5c27

URL: 
https://github.com/llvm/llvm-project/commit/b0d6bebe90ddce73e58824ba5cb294cb663b5c27
DIFF: 
https://github.com/llvm/llvm-project/commit/b0d6bebe90ddce73e58824ba5cb294cb663b5c27.diff

LOG: [ELF] Drop '>>> defined in ' for locations of linker synthesized symbols

Reviewed By: grimar

Differential Revision: https://reviews.llvm.org/D93925

Added: 


Modified: 
lld/ELF/Relocations.cpp
lld/test/ELF/x86-64-gotpc-err.s

Removed: 




diff  --git a/lld/ELF/Relocations.cpp b/lld/ELF/Relocations.cpp
index 875ecf78ca2c..4cfd97dad941 100644
--- a/lld/ELF/Relocations.cpp
+++ b/lld/ELF/Relocations.cpp
@@ -74,12 +74,12 @@ static Optional getLinkerScriptLocation(const 
Symbol &sym) {
 }
 
 static std::string getDefinedLocation(const Symbol &sym) {
-  std::string msg = "\n>>> defined in ";
+  const char msg[] = "\n>>> defined in ";
   if (sym.file)
-msg += toString(sym.file);
-  else if (Optional loc = getLinkerScriptLocation(sym))
-msg += *loc;
-  return msg;
+return msg + toString(sym.file);
+  if (Optional loc = getLinkerScriptLocation(sym))
+return msg + *loc;
+  return "";
 }
 
 // Construct a message in the following format.

diff  --git a/lld/test/ELF/x86-64-gotpc-err.s b/lld/test/ELF/x86-64-gotpc-err.s
index 7dcbbc5a3378..1dbfc4584dd5 100644
--- a/lld/test/ELF/x86-64-gotpc-err.s
+++ b/lld/test/ELF/x86-64-gotpc-err.s
@@ -3,23 +3,24 @@
 # RUN: llvm-mc -filetype=obj -triple=x86_64 %t/a.s -o %t/a.o
 # RUN: not ld.lld -T %t/lds %t/a.o -o /dev/null 2>&1 | FileCheck %s
 
-# CHECK: error: {{.*}}:(.text+0x2): relocation R_X86_64_GOTPCRELX out of 
range: 2147483655 is not in [-2147483648, 2147483647]; references data
-# CHECK: error: {{.*}}:(.text+0x9): relocation R_X86_64_REX_GOTPCRELX out 
of range: 2147483648 is not in [-2147483648, 2147483647]; references data
+## Test diagnostics for GOTPCRELX overflows. In addition, test that there is no
+## `>>> defined in` for linker synthesized __stop_* symbols (there is no
+## associated file or linker script line number).
+
+# CHECK:  error: {{.*}}:(.text+0x2): relocation R_X86_64_GOTPCRELX out of 
range: 2147483655 is not in [-2147483648, 2147483647]; references __stop_data
+# CHECK-NEXT: error: {{.*}}:(.text+0x9): relocation R_X86_64_REX_GOTPCRELX out 
of range: 2147483648 is not in [-2147483648, 2147483647]; references __stop_data
 # CHECK-NOT: error:
 
 #--- a.s
-  movl data@GOTPCREL(%rip), %eax  # out of range
-  movq data@GOTPCREL(%rip), %rax  # out of range
-  movq data@GOTPCREL(%rip), %rax  # in range
+  movl __stop_data@GOTPCREL(%rip), %eax  # out of range
+  movq __stop_data@GOTPCREL(%rip), %rax  # out of range
+  movq __stop_data@GOTPCREL(%rip), %rax  # in range
 
-.data
+.section data,"aw",@progbits
 .space 13
-.globl data
-data:
-  .long 0
 
 #--- lds
 SECTIONS {
   .text 0x20 : { *(.text) }
-  .data 0x8020 : { *(.data) }
+  data 0x8020 : { *(data) }
 }



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[llvm-branch-commits] [compiler-rt] 9c0c123 - [CMake][tsan] Remove --sysroot=.

[Fangrui Song via llvm-branch-commits]

Author: Fangrui Song
Date: 2020-12-30T09:30:58-08:00
New Revision: 9c0c123b0b48772973f8864e36e451ab0c8c7419

URL: 
https://github.com/llvm/llvm-project/commit/9c0c123b0b48772973f8864e36e451ab0c8c7419
DIFF: 
https://github.com/llvm/llvm-project/commit/9c0c123b0b48772973f8864e36e451ab0c8c7419.diff

LOG: [CMake][tsan] Remove --sysroot=.

rL254966 added `--sysroot=.` to prevent accidental including system headers.
It caused hassle to FreeBSD (D17383)/NetBSD. The next problem is that
we want to include `features.h` (usually `/usr/include/features.h`) to detect 
`__GLIBC__`.

At this point it seems that `--sysroot=.` adds lots of inconvenience so we 
disable it for now.
If there is a better way preventing accidental system header inclusion we can 
consider it again.

Reviewed By: #sanitizers, vitalybuka

Differential Revision: https://reviews.llvm.org/D93921

Added: 


Modified: 
compiler-rt/lib/tsan/CMakeLists.txt

Removed: 




diff  --git a/compiler-rt/lib/tsan/CMakeLists.txt 
b/compiler-rt/lib/tsan/CMakeLists.txt
index c99b16d8aaa3a..88c6f09e88aa3 100644
--- a/compiler-rt/lib/tsan/CMakeLists.txt
+++ b/compiler-rt/lib/tsan/CMakeLists.txt
@@ -238,21 +238,6 @@ else()
   endforeach()
 endif()
 
-# Make sure that non-platform-specific files don't include any system headers.
-# FreeBSD/NetBSD do not install a number of Clang-provided headers for the
-# compiler in the base system due to incompatibilities between FreeBSD/NetBSD's
-# and Clang's versions. As a workaround do not use --sysroot=. on 
FreeBSD/NetBSD
-# until this is addressed.
-if(COMPILER_RT_HAS_SYSROOT_FLAG AND NOT CMAKE_SYSTEM_NAME MATCHES "FreeBSD"
-   AND NOT CMAKE_SYSTEM_NAME MATCHES "NetBSD")
-  file(GLOB _tsan_generic_sources rtl/tsan*)
-  file(GLOB _tsan_platform_sources rtl/tsan*posix* rtl/tsan*mac*
-   rtl/tsan*linux*)
-  list(REMOVE_ITEM _tsan_generic_sources ${_tsan_platform_sources})
-  set_source_files_properties(${_tsan_generic_sources}
-PROPERTIES COMPILE_FLAGS "--sysroot=.")
-endif()
-
 # Build libcxx instrumented with TSan.
 if(COMPILER_RT_LIBCXX_PATH AND
COMPILER_RT_LIBCXXABI_PATH AND



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[llvm-branch-commits] [llvm] fe43110 - [IROutliner] Adding option to enable outlining from linkonceodr functions

[Andrew Litteken via llvm-branch-commits]

Author: Andrew Litteken
Date: 2020-12-30T12:08:04-06:00
New Revision: fe431103b633278da9ece1e03d6b441c1d44d977

URL: 
https://github.com/llvm/llvm-project/commit/fe431103b633278da9ece1e03d6b441c1d44d977
DIFF: 
https://github.com/llvm/llvm-project/commit/fe431103b633278da9ece1e03d6b441c1d44d977.diff

LOG: [IROutliner] Adding option to enable outlining from linkonceodr functions

There are functions that the linker is able to automatically
deduplicate, we do not outline from these functions by default. This
allows for outlining from those functions.

Tests:
llvm/test/Transforms/IROutliner/outlining-odr.ll

Reviewers: jroelofs, paquette

Differential Revision: https://reviews.llvm.org/D87309

Added: 
llvm/test/Transforms/IROutliner/outlining-odr.ll

Modified: 
llvm/include/llvm/Transforms/IPO/IROutliner.h
llvm/lib/Transforms/IPO/IROutliner.cpp

Removed: 




diff  --git a/llvm/include/llvm/Transforms/IPO/IROutliner.h 
b/llvm/include/llvm/Transforms/IPO/IROutliner.h
index 6291af741184..947a70866b04 100644
--- a/llvm/include/llvm/Transforms/IPO/IROutliner.h
+++ b/llvm/include/llvm/Transforms/IPO/IROutliner.h
@@ -258,6 +258,10 @@ class IROutliner {
 std::vector &FuncsToRemove,
 unsigned &OutlinedFunctionNum);
 
+  /// If true, enables us to outline from functions that have LinkOnceFromODR
+  /// linkages.
+  bool OutlineFromLinkODRs = false;
+
   /// If false, we do not worry if the cost is greater than the benefit.  This
   /// is for debugging and testing, so that we can test small cases to ensure
   /// that the outlining is being done correctly.

diff  --git a/llvm/lib/Transforms/IPO/IROutliner.cpp 
b/llvm/lib/Transforms/IPO/IROutliner.cpp
index 5289826f4a9a..908ba0c70e70 100644
--- a/llvm/lib/Transforms/IPO/IROutliner.cpp
+++ b/llvm/lib/Transforms/IPO/IROutliner.cpp
@@ -30,6 +30,16 @@
 using namespace llvm;
 using namespace IRSimilarity;
 
+// Set to true if the user wants the ir outliner to run on linkonceodr linkage
+// functions. This is false by default because the linker can dedupe 
linkonceodr
+// functions. Since the outliner is confined to a single module (modulo LTO),
+// this is off by default. It should, however, be the default behavior in
+// LTO.
+static cl::opt EnableLinkOnceODRIROutlining(
+"enable-linkonceodr-ir-outlining", cl::Hidden,
+cl::desc("Enable the IR outliner on linkonceodr functions"),
+cl::init(false));
+
 // This is a debug option to test small pieces of code to ensure that outlining
 // works correctly.
 static cl::opt NoCostModel(
@@ -1243,6 +1253,10 @@ void IROutliner::pruneIncompatibleRegions(
 if (IRSC.getStartBB()->hasAddressTaken())
   continue;
 
+if (IRSC.front()->Inst->getFunction()->hasLinkOnceODRLinkage() &&
+!OutlineFromLinkODRs)
+  continue;
+
 // Greedily prune out any regions that will overlap with already chosen
 // regions.
 if (CurrentEndIdx != 0 && StartIdx <= CurrentEndIdx)
@@ -1659,6 +1673,7 @@ unsigned IROutliner::doOutline(Module &M) {
 
 bool IROutliner::run(Module &M) {
   CostModel = !NoCostModel;
+  OutlineFromLinkODRs = EnableLinkOnceODRIROutlining;
 
   return doOutline(M) > 0;
 }

diff  --git a/llvm/test/Transforms/IROutliner/outlining-odr.ll 
b/llvm/test/Transforms/IROutliner/outlining-odr.ll
new file mode 100644
index ..074de37c40bf
--- /dev/null
+++ b/llvm/test/Transforms/IROutliner/outlining-odr.ll
@@ -0,0 +1,70 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -S -verify -iroutliner --ir-outlining-no-cost < %s | FileCheck %s
+; RUN: opt -S -verify -iroutliner -enable-linkonceodr-ir-outlining 
--ir-outlining-no-cost < %s | FileCheck -check-prefix=ODR %s
+
+; This test looks at the constants in the regions, and if it they are the
+; same it outlines them as constants rather than elevating them to arguments.
+
+define linkonce_odr void @outline_odr1() {
+; ODR-LABEL: @outline_odr1(
+; ODR-NEXT:  entry:
+; ODR-NEXT:[[A:%.*]] = alloca i32, align 4
+; ODR-NEXT:[[B:%.*]] = alloca i32, align 4
+; ODR-NEXT:[[C:%.*]] = alloca i32, align 4
+; ODR-NEXT:call void @outlined_ir_func_0(i32* [[A]], i32* [[B]], i32* 
[[C]])
+; ODR-NEXT:ret void
+; CHECK-LABEL: @outline_odr1(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:[[A:%.*]] = alloca i32, align 4
+; CHECK-NEXT:[[B:%.*]] = alloca i32, align 4
+; CHECK-NEXT:[[C:%.*]] = alloca i32, align 4
+; CHECK-NEXT:store i32 2, i32* [[A]], align 4
+; CHECK-NEXT:store i32 3, i32* [[B]], align 4
+; CHECK-NEXT:store i32 4, i32* [[C]], align 4
+; CHECK-NEXT:[[AL:%.*]] = load i32, i32* [[A]], align 4
+; CHECK-NEXT:[[BL:%.*]] = load i32, i32* [[B]], align 4
+; CHECK-NEXT:[[CL:%.*]] = load i32, i32* [[C]], align 4
+entry:
+  %a = alloca i32, align 4
+  %b = alloca i32, align 4
+  %c = alloca i32, align 4
+  store i32 

[llvm-branch-commits] [compiler-rt] 70de7e0 - [compiler-rt] FuzzedDataProvider: Add PickValueInArray for std::array

[Max Moroz via llvm-branch-commits]

Author: Max Moroz
Date: 2020-12-30T10:25:26-08:00
New Revision: 70de7e0d9a95b7fcd7c105b06bd90fdf4e01f563

URL: 
https://github.com/llvm/llvm-project/commit/70de7e0d9a95b7fcd7c105b06bd90fdf4e01f563
DIFF: 
https://github.com/llvm/llvm-project/commit/70de7e0d9a95b7fcd7c105b06bd90fdf4e01f563.diff

LOG: [compiler-rt] FuzzedDataProvider: Add PickValueInArray for std::array

This makes `PickValueInArray` work for `std::array` (C++11). I've also 
tested the C++17 `std::array` (with compiler-deduced template parameters)

```
Author:
MarcoFalke 
```

Reviewed By: Dor1s

Differential Revision: https://reviews.llvm.org/D93412

Added: 


Modified: 
compiler-rt/include/fuzzer/FuzzedDataProvider.h
compiler-rt/lib/fuzzer/tests/FuzzedDataProviderUnittest.cpp

Removed: 




diff  --git a/compiler-rt/include/fuzzer/FuzzedDataProvider.h 
b/compiler-rt/include/fuzzer/FuzzedDataProvider.h
index 83bcd0134a7d..744a9d78cec0 100644
--- a/compiler-rt/include/fuzzer/FuzzedDataProvider.h
+++ b/compiler-rt/include/fuzzer/FuzzedDataProvider.h
@@ -14,6 +14,7 @@
 #define LLVM_FUZZER_FUZZED_DATA_PROVIDER_H_
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -71,6 +72,8 @@ class FuzzedDataProvider {
 
   // Returns a value from the given array.
   template  T PickValueInArray(const T 
(&array)[size]);
+  template 
+  T PickValueInArray(const std::array &array);
   template  T PickValueInArray(std::initializer_list 
list);
 
   // Writes data to the given destination and returns number of bytes written.
@@ -301,6 +304,12 @@ T FuzzedDataProvider::PickValueInArray(const T 
(&array)[size]) {
   return array[ConsumeIntegralInRange(0, size - 1)];
 }
 
+template 
+T FuzzedDataProvider::PickValueInArray(const std::array &array) {
+  static_assert(size > 0, "The array must be non empty.");
+  return array[ConsumeIntegralInRange(0, size - 1)];
+}
+
 template 
 T FuzzedDataProvider::PickValueInArray(std::initializer_list list) {
   // TODO(Dor1s): switch to static_assert once C++14 is allowed.

diff  --git a/compiler-rt/lib/fuzzer/tests/FuzzedDataProviderUnittest.cpp 
b/compiler-rt/lib/fuzzer/tests/FuzzedDataProviderUnittest.cpp
index 99d9d8ecbe9b..ea6774e5a5cd 100644
--- a/compiler-rt/lib/fuzzer/tests/FuzzedDataProviderUnittest.cpp
+++ b/compiler-rt/lib/fuzzer/tests/FuzzedDataProviderUnittest.cpp
@@ -283,6 +283,20 @@ TEST(FuzzedDataProvider, ConsumeBool) {
   EXPECT_EQ(false, DataProv.ConsumeBool());
 }
 
+TEST(FuzzedDataProvider, PickValueInStdArray) {
+  FuzzedDataProvider DataProv(Data, sizeof(Data));
+  const std::array Array = {1, 2, 3, 4, 5};
+  EXPECT_EQ(5, DataProv.PickValueInArray(Array));
+  EXPECT_EQ(2, DataProv.PickValueInArray(Array));
+  EXPECT_EQ(2, DataProv.PickValueInArray(Array));
+  EXPECT_EQ(3, DataProv.PickValueInArray(Array));
+  EXPECT_EQ(3, DataProv.PickValueInArray(Array));
+  EXPECT_EQ(3, DataProv.PickValueInArray(Array));
+  EXPECT_EQ(1, DataProv.PickValueInArray(Array));
+  EXPECT_EQ(3, DataProv.PickValueInArray(Array));
+  EXPECT_EQ(2, DataProv.PickValueInArray(Array));
+}
+
 TEST(FuzzedDataProvider, PickValueInArray) {
   FuzzedDataProvider DataProv(Data, sizeof(Data));
   const int Array[] = {1, 2, 3, 4, 5};



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[llvm-branch-commits] [mlir] 453b6aa - [mlir] Add option to read reproducer options from file

[Jacques Pienaar via llvm-branch-commits]

Author: Jacques Pienaar
Date: 2020-12-30T10:46:01-08:00
New Revision: 453b6aadcef9625599d6099011bede710d4524f1

URL: 
https://github.com/llvm/llvm-project/commit/453b6aadcef9625599d6099011bede710d4524f1
DIFF: 
https://github.com/llvm/llvm-project/commit/453b6aadcef9625599d6099011bede710d4524f1.diff

LOG: [mlir] Add option to read reproducer options from file

Add command line option to read the configuration dumped by the MLIR crash
reproducer and adds those to the other command line options parsed by mlir-opt.

Simple convenience that enables `mlir-opt --run-reproducer /tmp/repro.mlir`
instead of needing to copy&paste the configuration.

Differential Revision: https://reviews.llvm.org/D93924

Added: 
mlir/test/Pass/run-reproducer.mlir

Modified: 
mlir/docs/PassManagement.md
mlir/lib/Support/MlirOptMain.cpp

Removed: 




diff  --git a/mlir/docs/PassManagement.md b/mlir/docs/PassManagement.md
index a3a5a49444a9..b71859f7d974 100644
--- a/mlir/docs/PassManagement.md
+++ b/mlir/docs/PassManagement.md
@@ -1138,6 +1138,10 @@ module {
 }
 ```
 
+The configuration dumped can be passed to `mlir-opt` by specifying
+`-run-reproducer` flag. This will result in parsing the first line 
configuration
+of the reproducer and adding those to the command line options.
+
 ### Local Reproducer Generation
 
 An additional flag may be passed to

diff  --git a/mlir/lib/Support/MlirOptMain.cpp 
b/mlir/lib/Support/MlirOptMain.cpp
index 5d852292fd06..f7d837259f65 100644
--- a/mlir/lib/Support/MlirOptMain.cpp
+++ b/mlir/lib/Support/MlirOptMain.cpp
@@ -29,6 +29,7 @@
 #include "llvm/Support/InitLLVM.h"
 #include "llvm/Support/Regex.h"
 #include "llvm/Support/SourceMgr.h"
+#include "llvm/Support/StringSaver.h"
 #include "llvm/Support/ToolOutputFile.h"
 
 using namespace mlir;
@@ -182,6 +183,11 @@ LogicalResult mlir::MlirOptMain(int argc, char **argv, 
llvm::StringRef toolName,
   "show-dialects", cl::desc("Print the list of registered dialects"),
   cl::init(false));
 
+  static cl::opt runRepro(
+  "run-reproducer",
+  cl::desc("Append the command line options of the reproducer"),
+  cl::init(false));
+
   InitLLVM y(argc, argv);
 
   // Register any command line options.
@@ -219,6 +225,23 @@ LogicalResult mlir::MlirOptMain(int argc, char **argv, 
llvm::StringRef toolName,
 return failure();
   }
 
+  // Parse reproducer options.
+  BumpPtrAllocator a;
+  StringSaver saver(a);
+  if (runRepro) {
+auto pair = file->getBuffer().split('\n');
+if (!pair.first.consume_front("// configuration:")) {
+  llvm::errs() << "Failed to find repro configuration, expect file to "
+  "begin with '// configuration:'\n";
+  return failure();
+}
+// Tokenize & parse the first line.
+SmallVector newArgv;
+newArgv.push_back(argv[0]);
+llvm::cl::TokenizeGNUCommandLine(pair.first, saver, newArgv);
+cl::ParseCommandLineOptions(newArgv.size(), &newArgv[0], helpHeader);
+  }
+
   auto output = openOutputFile(outputFilename, &errorMessage);
   if (!output) {
 llvm::errs() << errorMessage << "\n";

diff  --git a/mlir/test/Pass/run-reproducer.mlir 
b/mlir/test/Pass/run-reproducer.mlir
new file mode 100644
index ..9caa3f68abef
--- /dev/null
+++ b/mlir/test/Pass/run-reproducer.mlir
@@ -0,0 +1,22 @@
+// configuration: -mlir-disable-threading=true 
-pass-pipeline='func(cse,canonicalize)' -print-ir-before=cse -o /dev/null
+
+// Test of the reproducer run option. The first line has to be the
+// configuration (matching what is produced by reproducer).
+
+// RUN: mlir-opt %s -run-reproducer 2>&1 | FileCheck -check-prefix=BEFORE %s
+
+func @foo() {
+  %0 = constant 0 : i32
+  return
+}
+
+func @bar() {
+  return
+}
+
+// BEFORE: *** IR Dump Before{{.*}}CSE ***
+// BEFORE-NEXT: func @foo()
+// BEFORE: *** IR Dump Before{{.*}}CSE ***
+// BEFORE-NEXT: func @bar()
+// BEFORE-NOT: *** IR Dump Before{{.*}}Canonicalizer ***
+// BEFORE-NOT: *** IR Dump After



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[llvm-branch-commits] [llvm] 277ebe4 - Fix `LLVM_ENABLE_MODULES=On` build

[Yuanfang Chen via llvm-branch-commits]

Author: Yuanfang Chen
Date: 2020-12-30T10:54:04-08:00
New Revision: 277ebe46c6665a8717c5c6e7d767bbec31becfb8

URL: 
https://github.com/llvm/llvm-project/commit/277ebe46c6665a8717c5c6e7d767bbec31becfb8
DIFF: 
https://github.com/llvm/llvm-project/commit/277ebe46c6665a8717c5c6e7d767bbec31becfb8.diff

LOG: Fix `LLVM_ENABLE_MODULES=On` build

for commit 480936e741d588d53b9e2d9c5935b5daa0fdee25.

Added: 


Modified: 
llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
llvm/include/llvm/CodeGen/MachinePassRegistry.def
llvm/include/llvm/module.modulemap
llvm/lib/Transforms/IPO/PassManagerBuilder.cpp

Removed: 




diff  --git a/llvm/include/llvm/CodeGen/CodeGenPassBuilder.h 
b/llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
index e09cbf95793d..b47aaa53eb89 100644
--- a/llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
+++ b/llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
@@ -49,6 +49,7 @@
 #include "llvm/Transforms/Scalar/LowerConstantIntrinsics.h"
 #include "llvm/Transforms/Scalar/MergeICmps.h"
 #include "llvm/Transforms/Scalar/PartiallyInlineLibCalls.h"
+#include "llvm/Transforms/Scalar/ScalarizeMaskedMemIntrin.h"
 #include "llvm/Transforms/Utils.h"
 #include "llvm/Transforms/Utils/EntryExitInstrumenter.h"
 #include "llvm/Transforms/Utils/LowerInvoke.h"

diff  --git a/llvm/include/llvm/CodeGen/MachinePassRegistry.def 
b/llvm/include/llvm/CodeGen/MachinePassRegistry.def
index b68fcc684b76..e9eaa5f77000 100644
--- a/llvm/include/llvm/CodeGen/MachinePassRegistry.def
+++ b/llvm/include/llvm/CodeGen/MachinePassRegistry.def
@@ -44,6 +44,7 @@ FUNCTION_PASS("ee-instrument", EntryExitInstrumenterPass, 
(false))
 FUNCTION_PASS("post-inline-ee-instrument", EntryExitInstrumenterPass, (true))
 FUNCTION_PASS("expand-reductions", ExpandReductionsPass, ())
 FUNCTION_PASS("lowerinvoke", LowerInvokePass, ())
+FUNCTION_PASS("scalarize-masked-mem-intrin", ScalarizeMaskedMemIntrinPass, ())
 FUNCTION_PASS("verify", VerifierPass, ())
 #undef FUNCTION_PASS
 
@@ -103,7 +104,6 @@ MACHINE_FUNCTION_ANALYSIS("pass-instrumentation", 
PassInstrumentationAnalysis, (
 DUMMY_FUNCTION_PASS("expandmemcmp", ExpandMemCmpPass, ())
 DUMMY_FUNCTION_PASS("gc-lowering", GCLoweringPass, ())
 DUMMY_FUNCTION_PASS("shadow-stack-gc-lowering", ShadowStackGCLoweringPass, ())
-DUMMY_FUNCTION_PASS("scalarize-masked-mem-intrin", 
ScalarizeMaskedMemIntrinPass, ())
 DUMMY_FUNCTION_PASS("sjljehprepare", SjLjEHPreparePass, ())
 DUMMY_FUNCTION_PASS("dwarfehprepare", DwarfEHPass, ())
 DUMMY_FUNCTION_PASS("winehprepare", WinEHPass, ())

diff  --git a/llvm/include/llvm/module.modulemap 
b/llvm/include/llvm/module.modulemap
index b1d0a703850b..0fd63b00fd0d 100644
--- a/llvm/include/llvm/module.modulemap
+++ b/llvm/include/llvm/module.modulemap
@@ -30,6 +30,7 @@ module LLVM_Backend {
 
 // These are intended for (repeated) textual inclusion.
 textual header "CodeGen/DIEValue.def"
+textual header "CodeGen/MachinePassRegistry.def"
   }
 }
 

diff  --git a/llvm/lib/Transforms/IPO/PassManagerBuilder.cpp 
b/llvm/lib/Transforms/IPO/PassManagerBuilder.cpp
index 282ce5132944..e7b5414a3841 100644
--- a/llvm/lib/Transforms/IPO/PassManagerBuilder.cpp
+++ b/llvm/lib/Transforms/IPO/PassManagerBuilder.cpp
@@ -73,15 +73,15 @@ cl::opt RunNewGVN("enable-newgvn", cl::init(false), 
cl::Hidden,
 
 // Experimental option to use CFL-AA
 enum class CFLAAType { None, Steensgaard, Andersen, Both };
-static cl::opt
-UseCFLAA("use-cfl-aa", cl::init(CFLAAType::None), cl::Hidden,
+static cl::opt<::CFLAAType>
+UseCFLAA("use-cfl-aa", cl::init(::CFLAAType::None), cl::Hidden,
  cl::desc("Enable the new, experimental CFL alias analysis"),
- cl::values(clEnumValN(CFLAAType::None, "none", "Disable CFL-AA"),
-clEnumValN(CFLAAType::Steensgaard, "steens",
+ cl::values(clEnumValN(::CFLAAType::None, "none", "Disable 
CFL-AA"),
+clEnumValN(::CFLAAType::Steensgaard, "steens",
"Enable unification-based CFL-AA"),
-clEnumValN(CFLAAType::Andersen, "anders",
+clEnumValN(::CFLAAType::Andersen, "anders",
"Enable inclusion-based CFL-AA"),
-clEnumValN(CFLAAType::Both, "both",
+clEnumValN(::CFLAAType::Both, "both",
"Enable both variants of CFL-AA")));
 
 static cl::opt EnableLoopInterchange(
@@ -276,13 +276,13 @@ void 
PassManagerBuilder::addExtensionsToPM(ExtensionPointTy ETy,
 void PassManagerBuilder::addInitialAliasAnalysisPasses(
 legacy::PassManagerBase &PM) const {
   switch (UseCFLAA) {
-  case CFLAAType::Steensgaard:
+  case ::CFLAAType::Steensgaard:
 PM.add(createCFLSteensAAWrapperPass());
 break;
-  case CFLAAType::Andersen:
+  case ::CFLAAType::Andersen:
 PM.add(createCFLAndersAAWrapperPass());
 brea

[llvm-branch-commits] [llvm] 51a292d - [gn build] Switch copy_bundle_data from pax to cpio

[Nico Weber via llvm-branch-commits]

Author: Nico Weber
Date: 2020-12-30T13:59:03-05:00
New Revision: 51a292d994535d14af1873f09534a352da1d5456

URL: 
https://github.com/llvm/llvm-project/commit/51a292d994535d14af1873f09534a352da1d5456
DIFF: 
https://github.com/llvm/llvm-project/commit/51a292d994535d14af1873f09534a352da1d5456.diff

LOG: [gn build] Switch copy_bundle_data from pax to cpio

This will hopefully fix the build not becoming clean when using Ninja
1.9+. Ninja 1.9 enabled high-resolution time stamps, but pax doesn't
correctly set high-resolution timestamps on its output.

See https://github.com/nico/hack/blob/master/notes/copydir.md for a
detailed writeup of problem and alternatives.

Added: 


Modified: 
llvm/utils/gn/build/toolchain/BUILD.gn

Removed: 




diff  --git a/llvm/utils/gn/build/toolchain/BUILD.gn 
b/llvm/utils/gn/build/toolchain/BUILD.gn
index 570ab1d31fdd..d01cad98e190 100644
--- a/llvm/utils/gn/build/toolchain/BUILD.gn
+++ b/llvm/utils/gn/build/toolchain/BUILD.gn
@@ -143,9 +143,9 @@ template("unix_toolchain") {
 
 if (current_os == "ios" || current_os == "mac") {
   tool("copy_bundle_data") {
-# http://serverfault.com/q/209888/43689
-_copydir = "mkdir -p {{output}} && cd {{source}} && " +
-   "pax -rwl . \"\$OLDPWD\"/{{output}}"
+# https://github.com/nico/hack/blob/master/notes/copydir.md
+_copydir = "cd {{source}} && " +
+   "find . | cpio -pdl \"\$OLDPWD\"/{{output}} 2>/dev/null"
 command = "rm -rf {{output}} && if [[ -d {{source}} ]]; then " +
   _copydir + "; else " + copy_command + "; fi"
 description = "COPY_BUNDLE_DATA {{source}} {{output}}"



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[llvm-branch-commits] [llvm] 294a196 - [update_llc_test_checks] Support .Lfunc$local for x86 -relocation-model=pic dsolocal tests

[Fangrui Song via llvm-branch-commits]

Author: Fangrui Song
Date: 2020-12-30T11:59:36-08:00
New Revision: 294a196b0488c737544411bf570f4aa2a23f727e

URL: 
https://github.com/llvm/llvm-project/commit/294a196b0488c737544411bf570f4aa2a23f727e
DIFF: 
https://github.com/llvm/llvm-project/commit/294a196b0488c737544411bf570f4aa2a23f727e.diff

LOG: [update_llc_test_checks] Support .Lfunc$local for x86 
-relocation-model=pic dsolocal tests

Added: 


Modified: 

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86_function_name.ll

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86_function_name.ll.expected
llvm/utils/UpdateTestChecks/asm.py

Removed: 




diff  --git 
a/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86_function_name.ll
 
b/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86_function_name.ll
index 231aa54d6978..046de36137b0 100644
--- 
a/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86_function_name.ll
+++ 
b/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86_function_name.ll
@@ -1,8 +1,15 @@
-; Check that we accept functions with '$' in the name.
-;
-; RUN: llc -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
-;
+;; Check that we accept functions with '$' in the name.
+; RUN: llc -mtriple=x86_64 < %s | FileCheck %s
+
+;; Check that we accept .Ldsolocal$local: below the function label.
+; RUN: llc -mtriple=x86_64 -relocation-model=pic < %s | FileCheck %s 
--check-prefix=PIC
+
 define hidden i32 @"_Z54bar$ompvariant$bar"() {
 entry:
   ret i32 2
 }
+
+define dso_local i32 @dsolocal() {
+entry:
+  ret i32 2
+}

diff  --git 
a/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86_function_name.ll.expected
 
b/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86_function_name.ll.expected
index 32b05fccf62b..64eaf90ed33b 100644
--- 
a/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86_function_name.ll.expected
+++ 
b/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86_function_name.ll.expected
@@ -1,13 +1,34 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; Check that we accept functions with '$' in the name.
-;
-; RUN: llc -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
-;
+;; Check that we accept functions with '$' in the name.
+; RUN: llc -mtriple=x86_64 < %s | FileCheck %s
+
+;; Check that we accept .Ldsolocal$local: below the function label.
+; RUN: llc -mtriple=x86_64 -relocation-model=pic < %s | FileCheck %s 
--check-prefix=PIC
+
 define hidden i32 @"_Z54bar$ompvariant$bar"() {
 ; CHECK-LABEL: _Z54bar$ompvariant$bar:
 ; CHECK:   # %bb.0: # %entry
 ; CHECK-NEXT:movl $2, %eax
 ; CHECK-NEXT:retq
+;
+; PIC-LABEL: _Z54bar$ompvariant$bar:
+; PIC:   # %bb.0: # %entry
+; PIC-NEXT:movl $2, %eax
+; PIC-NEXT:retq
+entry:
+  ret i32 2
+}
+
+define dso_local i32 @dsolocal() {
+; CHECK-LABEL: dsolocal:
+; CHECK:   # %bb.0: # %entry
+; CHECK-NEXT:movl $2, %eax
+; CHECK-NEXT:retq
+;
+; PIC-LABEL: dsolocal:
+; PIC:   # %bb.0: # %entry
+; PIC-NEXT:movl $2, %eax
+; PIC-NEXT:retq
 entry:
   ret i32 2
 }

diff  --git a/llvm/utils/UpdateTestChecks/asm.py 
b/llvm/utils/UpdateTestChecks/asm.py
index 839b72730459..7cfd31865a34 100644
--- a/llvm/utils/UpdateTestChecks/asm.py
+++ b/llvm/utils/UpdateTestChecks/asm.py
@@ -15,7 +15,9 @@ class string:
 # Assembly parser
 
 ASM_FUNCTION_X86_RE = re.compile(
-r'^_?(?P[^:]+):[ \t]*#+[ \t]*(@"?(?P=func)"?| -- Begin function 
(?P=func))\n(?:\s*\.?Lfunc_begin[^:\n]*:\n)?[^:]*?'
+r'^_?(?P[^:]+):[ \t]*#+[ \t]*(@"?(?P=func)"?| -- Begin function 
(?P=func))\n(?:\s*\.?Lfunc_begin[^:\n]*:\n)?'
+r'(?:\.L[^$]+\$local:\n)?'  # drop .L$local:
+r'(?:[ \t]+.cfi_startproc\n)?'  # drop optional cfi noise
 r'(?P^##?[ \t]+[^:]+:.*?)\s*'
 
r'^\s*(?:[^:\n]+?:\s*\n\s*\.size|\.cfi_endproc|\.globl|\.comm|\.(?:sub)?section|#+
 -- End function)',
 flags=(re.M | re.S))



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[llvm-branch-commits] [llvm] 5ced712 - [LoopVectorizer] add test to show wrong FMF propagation; NFC

[Sanjay Patel via llvm-branch-commits]

Author: Sanjay Patel
Date: 2020-12-30T15:13:57-05:00
New Revision: 5ced712e9851f00ecd81ba4dc235811bbc9ec5a2

URL: 
https://github.com/llvm/llvm-project/commit/5ced712e9851f00ecd81ba4dc235811bbc9ec5a2
DIFF: 
https://github.com/llvm/llvm-project/commit/5ced712e9851f00ecd81ba4dc235811bbc9ec5a2.diff

LOG: [LoopVectorizer] add test to show wrong FMF propagation; NFC

Added: 


Modified: 
llvm/test/Transforms/LoopVectorize/X86/reduction-fastmath.ll

Removed: 




diff  --git a/llvm/test/Transforms/LoopVectorize/X86/reduction-fastmath.ll 
b/llvm/test/Transforms/LoopVectorize/X86/reduction-fastmath.ll
index fbbbd59f41c5..f35024b4361b 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/reduction-fastmath.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/reduction-fastmath.ll
@@ -261,3 +261,92 @@ loop.exit:
   %sum.lcssa = phi float [ %sum.inc, %loop ], [ 0.00e+00, %entry ]
   ret float %sum.lcssa
 }
+
+; FIXME: Some fcmp are 'nnan ninf', some are 'fast', but the reduction is 
sequential?
+
+define float @PR35538(float* nocapture readonly %a, i32 %N) #0 {
+; CHECK-LABEL: @PR35538(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:[[CMP12:%.*]] = icmp sgt i32 [[N:%.*]], 0
+; CHECK-NEXT:br i1 [[CMP12]], label [[FOR_BODY_LR_PH:%.*]], label 
[[FOR_COND_CLEANUP:%.*]]
+; CHECK:   for.body.lr.ph:
+; CHECK-NEXT:[[WIDE_TRIP_COUNT:%.*]] = zext i32 [[N]] to i64
+; CHECK-NEXT:[[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[WIDE_TRIP_COUNT]], 8
+; CHECK-NEXT:br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label 
[[VECTOR_PH:%.*]]
+; CHECK:   vector.ph:
+; CHECK-NEXT:[[N_MOD_VF:%.*]] = urem i64 [[WIDE_TRIP_COUNT]], 8
+; CHECK-NEXT:[[N_VEC:%.*]] = sub i64 [[WIDE_TRIP_COUNT]], [[N_MOD_VF]]
+; CHECK-NEXT:br label [[VECTOR_BODY:%.*]]
+; CHECK:   vector.body:
+; CHECK-NEXT:[[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ 
[[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
+; CHECK-NEXT:[[VEC_PHI:%.*]] = phi <4 x float> [ , [[VECTOR_PH]] 
], [ [[TMP10:%.*]], [[VECTOR_BODY]] ]
+; CHECK-NEXT:[[VEC_PHI1:%.*]] = phi <4 x float> [ , [[VECTOR_PH]] 
], [ [[TMP11:%.*]], [[VECTOR_BODY]] ]
+; CHECK-NEXT:[[TMP0:%.*]] = add i64 [[INDEX]], 0
+; CHECK-NEXT:[[TMP1:%.*]] = add i64 [[INDEX]], 4
+; CHECK-NEXT:[[TMP2:%.*]] = getelementptr inbounds float, float* 
[[A:%.*]], i64 [[TMP0]]
+; CHECK-NEXT:[[TMP3:%.*]] = getelementptr inbounds float, float* [[A]], 
i64 [[TMP1]]
+; CHECK-NEXT:[[TMP4:%.*]] = getelementptr inbounds float, float* [[TMP2]], 
i32 0
+; CHECK-NEXT:[[TMP5:%.*]] = bitcast float* [[TMP4]] to <4 x float>*
+; CHECK-NEXT:[[WIDE_LOAD:%.*]] = load <4 x float>, <4 x float>* [[TMP5]], 
align 4
+; CHECK-NEXT:[[TMP6:%.*]] = getelementptr inbounds float, float* [[TMP2]], 
i32 4
+; CHECK-NEXT:[[TMP7:%.*]] = bitcast float* [[TMP6]] to <4 x float>*
+; CHECK-NEXT:[[WIDE_LOAD2:%.*]] = load <4 x float>, <4 x float>* [[TMP7]], 
align 4
+; CHECK-NEXT:[[TMP8:%.*]] = fcmp nnan ninf oge <4 x float> [[WIDE_LOAD]], 
[[VEC_PHI]]
+; CHECK-NEXT:[[TMP9:%.*]] = fcmp nnan ninf oge <4 x float> [[WIDE_LOAD2]], 
[[VEC_PHI1]]
+; CHECK-NEXT:[[TMP10]] = select <4 x i1> [[TMP8]], <4 x float> 
[[WIDE_LOAD]], <4 x float> [[VEC_PHI]]
+; CHECK-NEXT:[[TMP11]] = select <4 x i1> [[TMP9]], <4 x float> 
[[WIDE_LOAD2]], <4 x float> [[VEC_PHI1]]
+; CHECK-NEXT:[[INDEX_NEXT]] = add i64 [[INDEX]], 8
+; CHECK-NEXT:[[TMP12:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
+; CHECK-NEXT:br i1 [[TMP12]], label [[MIDDLE_BLOCK:%.*]], label 
[[VECTOR_BODY]], [[LOOP8:!llvm.loop !.*]]
+; CHECK:   middle.block:
+; CHECK-NEXT:[[RDX_MINMAX_CMP:%.*]] = fcmp fast ogt <4 x float> [[TMP10]], 
[[TMP11]]
+; CHECK-NEXT:[[RDX_MINMAX_SELECT:%.*]] = select fast <4 x i1> 
[[RDX_MINMAX_CMP]], <4 x float> [[TMP10]], <4 x float> [[TMP11]]
+; CHECK-NEXT:[[TMP13:%.*]] = call float @llvm.vector.reduce.fmax.v4f32(<4 
x float> [[RDX_MINMAX_SELECT]])
+; CHECK-NEXT:[[CMP_N:%.*]] = icmp eq i64 [[WIDE_TRIP_COUNT]], [[N_VEC]]
+; CHECK-NEXT:br i1 [[CMP_N]], label [[FOR_COND_CLEANUP_LOOPEXIT:%.*]], 
label [[SCALAR_PH]]
+; CHECK:   scalar.ph:
+; CHECK-NEXT:[[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] 
], [ 0, [[FOR_BODY_LR_PH]] ]
+; CHECK-NEXT:[[BC_MERGE_RDX:%.*]] = phi float [ -1.00e+00, 
[[FOR_BODY_LR_PH]] ], [ [[TMP13]], [[MIDDLE_BLOCK]] ]
+; CHECK-NEXT:br label [[FOR_BODY:%.*]]
+; CHECK:   for.cond.cleanup.loopexit:
+; CHECK-NEXT:[[MAX_0__LCSSA:%.*]] = phi float [ [[MAX_0_:%.*]], 
[[FOR_BODY]] ], [ [[TMP13]], [[MIDDLE_BLOCK]] ]
+; CHECK-NEXT:br label [[FOR_COND_CLEANUP]]
+; CHECK:   for.cond.cleanup:
+; CHECK-NEXT:[[MAX_0_LCSSA:%.*]] = phi float [ -1.00e+00, 
[[ENTRY:%.*]] ], [ [[MAX_0__LCSSA]], [[FOR_COND_CLEANUP_LOOPEXIT]] ]
+; CHECK-NEXT:ret float [[MAX_0_LCSSA]]
+; CHECK:   for.body:
+; CHECK-NEXT:[[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_V

[llvm-branch-commits] [llvm] 8ca60db - [LoopUtils] reduce FMF and min/max complexity when forming reductions

[Sanjay Patel via llvm-branch-commits]

Author: Sanjay Patel
Date: 2020-12-30T15:22:26-05:00
New Revision: 8ca60db40bd944dc5f67e0f200a403b4e03818ea

URL: 
https://github.com/llvm/llvm-project/commit/8ca60db40bd944dc5f67e0f200a403b4e03818ea
DIFF: 
https://github.com/llvm/llvm-project/commit/8ca60db40bd944dc5f67e0f200a403b4e03818ea.diff

LOG: [LoopUtils] reduce FMF and min/max complexity when forming reductions

I don't know if there's some way this changes what the vectorizers
may produce for reductions, but I have added test coverage with
3567908 and 5ced712 to show that both passes already have bugs in
this area. Hopefully this does not make things worse before we can
really fix it.

Added: 


Modified: 
llvm/include/llvm/Transforms/Utils/LoopUtils.h
llvm/lib/Transforms/Utils/LoopUtils.cpp
llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp

Removed: 




diff  --git a/llvm/include/llvm/Transforms/Utils/LoopUtils.h 
b/llvm/include/llvm/Transforms/Utils/LoopUtils.h
index ef348ed56129..ba2bb0a4c6b0 100644
--- a/llvm/include/llvm/Transforms/Utils/LoopUtils.h
+++ b/llvm/include/llvm/Transforms/Utils/LoopUtils.h
@@ -365,24 +365,21 @@ Value *getShuffleReduction(IRBuilderBase &Builder, Value 
*Src, unsigned Op,
 
 /// Create a target reduction of the given vector. The reduction operation
 /// is described by the \p Opcode parameter. min/max reductions require
-/// additional information supplied in \p Flags.
+/// additional information supplied in \p MinMaxKind.
 /// The target is queried to determine if intrinsics or shuffle sequences are
 /// required to implement the reduction.
 /// Fast-math-flags are propagated using the IRBuilder's setting.
-Value *createSimpleTargetReduction(IRBuilderBase &B,
-   const TargetTransformInfo *TTI,
-   unsigned Opcode, Value *Src,
-   TargetTransformInfo::ReductionFlags Flags =
-   TargetTransformInfo::ReductionFlags(),
-   ArrayRef RedOps = None);
+Value *createSimpleTargetReduction(
+IRBuilderBase &B, const TargetTransformInfo *TTI, unsigned Opcode,
+Value *Src, RecurrenceDescriptor::MinMaxRecurrenceKind MinMaxKind,
+ArrayRef RedOps = None);
 
 /// Create a generic target reduction using a recurrence descriptor \p Desc
 /// The target is queried to determine if intrinsics or shuffle sequences are
 /// required to implement the reduction.
 /// Fast-math-flags are propagated using the RecurrenceDescriptor.
 Value *createTargetReduction(IRBuilderBase &B, const TargetTransformInfo *TTI,
- RecurrenceDescriptor &Desc, Value *Src,
- bool NoNaN = false);
+ RecurrenceDescriptor &Desc, Value *Src);
 
 /// Get the intersection (logical and) of all of the potential IR flags
 /// of each scalar operation (VL) that will be converted into a vector (I).

diff  --git a/llvm/lib/Transforms/Utils/LoopUtils.cpp 
b/llvm/lib/Transforms/Utils/LoopUtils.cpp
index a3665a5636e5..8dc7709c6e55 100644
--- a/llvm/lib/Transforms/Utils/LoopUtils.cpp
+++ b/llvm/lib/Transforms/Utils/LoopUtils.cpp
@@ -985,14 +985,12 @@ llvm::getShuffleReduction(IRBuilderBase &Builder, Value 
*Src, unsigned Op,
 /// flags (if generating min/max reductions).
 Value *llvm::createSimpleTargetReduction(
 IRBuilderBase &Builder, const TargetTransformInfo *TTI, unsigned Opcode,
-Value *Src, TargetTransformInfo::ReductionFlags Flags,
+Value *Src, RecurrenceDescriptor::MinMaxRecurrenceKind MinMaxKind,
 ArrayRef RedOps) {
   auto *SrcVTy = cast(Src->getType());
 
   std::function BuildFunc;
   using RD = RecurrenceDescriptor;
-  RD::MinMaxRecurrenceKind MinMaxKind = RD::MRK_Invalid;
-
   switch (Opcode) {
   case Instruction::Add:
 BuildFunc = [&]() { return Builder.CreateAddReduce(Src); };
@@ -1024,33 +1022,42 @@ Value *llvm::createSimpleTargetReduction(
 };
 break;
   case Instruction::ICmp:
-if (Flags.IsMaxOp) {
-  MinMaxKind = Flags.IsSigned ? RD::MRK_SIntMax : RD::MRK_UIntMax;
-  BuildFunc = [&]() {
-return Builder.CreateIntMaxReduce(Src, Flags.IsSigned);
-  };
-} else {
-  MinMaxKind = Flags.IsSigned ? RD::MRK_SIntMin : RD::MRK_UIntMin;
-  BuildFunc = [&]() {
-return Builder.CreateIntMinReduce(Src, Flags.IsSigned);
-  };
+switch (MinMaxKind) {
+case RD::MRK_SIntMax:
+  BuildFunc = [&]() { return Builder.CreateIntMaxReduce(Src, true); };
+  break;
+case RD::MRK_SIntMin:
+  BuildFunc = [&]() { return Builder.CreateIntMinReduce(Src, true); };
+  break;
+case RD::MRK_UIntMax:
+  BuildFunc = [&]() { return Builder.CreateIntMaxReduce(Src, false); };
+  break;
+case RD::MRK_UIntMin:
+  BuildFunc = [&]() { return Builder.CreateIntMinReduce(Src, false); 

[llvm-branch-commits] [llvm] 7181df1 - [update_llc_test_checks] Support Windows .seh_proc for x86

[Fangrui Song via llvm-branch-commits]

Author: Fangrui Song
Date: 2020-12-30T12:32:47-08:00
New Revision: 7181df1e4990bdeb55ebe38a0238db1e8c2f2001

URL: 
https://github.com/llvm/llvm-project/commit/7181df1e4990bdeb55ebe38a0238db1e8c2f2001
DIFF: 
https://github.com/llvm/llvm-project/commit/7181df1e4990bdeb55ebe38a0238db1e8c2f2001.diff

LOG: [update_llc_test_checks] Support Windows .seh_proc for x86

Added: 


Modified: 

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86_function_name.ll

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86_function_name.ll.expected
llvm/utils/UpdateTestChecks/asm.py

Removed: 




diff  --git 
a/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86_function_name.ll
 
b/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86_function_name.ll
index 046de36137b0..1488c9f5b229 100644
--- 
a/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86_function_name.ll
+++ 
b/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86_function_name.ll
@@ -4,6 +4,9 @@
 ;; Check that we accept .Ldsolocal$local: below the function label.
 ; RUN: llc -mtriple=x86_64 -relocation-model=pic < %s | FileCheck %s 
--check-prefix=PIC
 
+;; Check that we accept .seh_proc below the function label.
+; RUN: llc -mtriple=x86_64-windows -relocation-model=pic < %s | FileCheck %s 
--check-prefix=WIN
+
 define hidden i32 @"_Z54bar$ompvariant$bar"() {
 entry:
   ret i32 2
@@ -11,5 +14,8 @@ entry:
 
 define dso_local i32 @dsolocal() {
 entry:
+  call void @ext()
   ret i32 2
 }
+
+declare void @ext()

diff  --git 
a/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86_function_name.ll.expected
 
b/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86_function_name.ll.expected
index 64eaf90ed33b..000e780cb59c 100644
--- 
a/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86_function_name.ll.expected
+++ 
b/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86_function_name.ll.expected
@@ -5,6 +5,9 @@
 ;; Check that we accept .Ldsolocal$local: below the function label.
 ; RUN: llc -mtriple=x86_64 -relocation-model=pic < %s | FileCheck %s 
--check-prefix=PIC
 
+;; Check that we accept .seh_proc below the function label.
+; RUN: llc -mtriple=x86_64-windows -relocation-model=pic < %s | FileCheck %s 
--check-prefix=WIN
+
 define hidden i32 @"_Z54bar$ompvariant$bar"() {
 ; CHECK-LABEL: _Z54bar$ompvariant$bar:
 ; CHECK:   # %bb.0: # %entry
@@ -15,6 +18,11 @@ define hidden i32 @"_Z54bar$ompvariant$bar"() {
 ; PIC:   # %bb.0: # %entry
 ; PIC-NEXT:movl $2, %eax
 ; PIC-NEXT:retq
+;
+; WIN-LABEL: _Z54bar$ompvariant$bar:
+; WIN:   # %bb.0: # %entry
+; WIN-NEXT:movl $2, %eax
+; WIN-NEXT:retq
 entry:
   ret i32 2
 }
@@ -22,13 +30,37 @@ entry:
 define dso_local i32 @dsolocal() {
 ; CHECK-LABEL: dsolocal:
 ; CHECK:   # %bb.0: # %entry
+; CHECK-NEXT:pushq %rax
+; CHECK-NEXT:.cfi_def_cfa_offset 16
+; CHECK-NEXT:callq ext@PLT
 ; CHECK-NEXT:movl $2, %eax
+; CHECK-NEXT:popq %rcx
+; CHECK-NEXT:.cfi_def_cfa_offset 8
 ; CHECK-NEXT:retq
 ;
 ; PIC-LABEL: dsolocal:
 ; PIC:   # %bb.0: # %entry
+; PIC-NEXT:pushq %rax
+; PIC-NEXT:.cfi_def_cfa_offset 16
+; PIC-NEXT:callq ext@PLT
 ; PIC-NEXT:movl $2, %eax
+; PIC-NEXT:popq %rcx
+; PIC-NEXT:.cfi_def_cfa_offset 8
 ; PIC-NEXT:retq
+;
+; WIN-LABEL: dsolocal:
+; WIN:   # %bb.0: # %entry
+; WIN-NEXT:subq $40, %rsp
+; WIN-NEXT:.seh_stackalloc 40
+; WIN-NEXT:.seh_endprologue
+; WIN-NEXT:callq ext
+; WIN-NEXT:movl $2, %eax
+; WIN-NEXT:addq $40, %rsp
+; WIN-NEXT:retq
+; WIN-NEXT:.seh_endproc
 entry:
+  call void @ext()
   ret i32 2
 }
+
+declare void @ext()

diff  --git a/llvm/utils/UpdateTestChecks/asm.py 
b/llvm/utils/UpdateTestChecks/asm.py
index 7cfd31865a34..a42a75ed26bf 100644
--- a/llvm/utils/UpdateTestChecks/asm.py
+++ b/llvm/utils/UpdateTestChecks/asm.py
@@ -17,7 +17,7 @@ class string:
 ASM_FUNCTION_X86_RE = re.compile(
 r'^_?(?P[^:]+):[ \t]*#+[ \t]*(@"?(?P=func)"?| -- Begin function 
(?P=func))\n(?:\s*\.?Lfunc_begin[^:\n]*:\n)?'
 r'(?:\.L[^$]+\$local:\n)?'  # drop .L$local:
-r'(?:[ \t]+.cfi_startproc\n)?'  # drop optional cfi noise
+r'(?:[ \t]+.cfi_startproc\n|.seh_proc[^\n]+\n)?'  # drop optional cfi
 r'(?P^##?[ \t]+[^:]+:.*?)\s*'
 
r'^\s*(?:[^:\n]+?:\s*\n\s*\.size|\.cfi_endproc|\.globl|\.comm|\.(?:sub)?section|#+
 -- End function)',
 flags=(re.M | re.S))



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[llvm-branch-commits] [llvm] c45f765 - [SimplifyCFG] Teach SimplifyBranchOnICmpChain() to preserve DomTree

[Roman Lebedev via llvm-branch-commits]

Author: Roman Lebedev
Date: 2020-12-30T23:58:40+03:00
New Revision: c45f765c0d41ad94b857ee4b7e007d58b41ed650

URL: 
https://github.com/llvm/llvm-project/commit/c45f765c0d41ad94b857ee4b7e007d58b41ed650
DIFF: 
https://github.com/llvm/llvm-project/commit/c45f765c0d41ad94b857ee4b7e007d58b41ed650.diff

LOG: [SimplifyCFG] Teach SimplifyBranchOnICmpChain() to preserve DomTree

Added: 


Modified: 
llvm/lib/Transforms/Utils/SimplifyCFG.cpp
llvm/test/Transforms/SimplifyCFG/switch_msan.ll

Removed: 




diff  --git a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp 
b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
index 5b60faee751a..c730c1427ec8 100644
--- a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
+++ b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
@@ -4101,12 +4101,16 @@ bool 
SimplifyCFGOpt::SimplifyBranchOnICmpChain(BranchInst *BI,
 << " cases into SWITCH.  BB is:\n"
 << *BB);
 
+  SmallVector Updates;
+
   // If there are any extra values that couldn't be folded into the switch
   // then we evaluate them with an explicit branch first. Split the block
   // right before the condbr to handle it.
   if (ExtraCase) {
 BasicBlock *NewBB =
-BB->splitBasicBlock(BI->getIterator(), "switch.early.test");
+SplitBlock(BB, BI, DTU ? &DTU->getDomTree() : nullptr, /*LI=*/nullptr,
+   /*MSSAU=*/nullptr, "switch.early.test");
+
 // Remove the uncond branch added to the old block.
 Instruction *OldTI = BB->getTerminator();
 Builder.SetInsertPoint(OldTI);
@@ -4118,6 +4122,8 @@ bool SimplifyCFGOpt::SimplifyBranchOnICmpChain(BranchInst 
*BI,
 
 OldTI->eraseFromParent();
 
+Updates.push_back({DominatorTree::Insert, BB, EdgeBB});
+
 // If there are PHI nodes in EdgeBB, then we need to add a new entry to 
them
 // for the edge we just added.
 AddPredecessorToBlock(EdgeBB, BB, NewBB);
@@ -4144,6 +4150,7 @@ bool SimplifyCFGOpt::SimplifyBranchOnICmpChain(BranchInst 
*BI,
   // We added edges from PI to the EdgeBB.  As such, if there were any
   // PHI nodes in EdgeBB, they need entries to be added corresponding to
   // the number of edges added.
+  Updates.push_back({DominatorTree::Insert, BB, EdgeBB});
   for (BasicBlock::iterator BBI = EdgeBB->begin(); isa(BBI); ++BBI) {
 PHINode *PN = cast(BBI);
 Value *InVal = PN->getIncomingValueForBlock(BB);
@@ -4153,6 +4160,8 @@ bool SimplifyCFGOpt::SimplifyBranchOnICmpChain(BranchInst 
*BI,
 
   // Erase the old branch instruction.
   EraseTerminatorAndDCECond(BI);
+  if (DTU)
+DTU->applyUpdatesPermissive(Updates);
 
   LLVM_DEBUG(dbgs() << "  ** 'icmp' chain result is:\n" << *BB << '\n');
   return true;

diff  --git a/llvm/test/Transforms/SimplifyCFG/switch_msan.ll 
b/llvm/test/Transforms/SimplifyCFG/switch_msan.ll
index 96e798289772..a59515ed463a 100644
--- a/llvm/test/Transforms/SimplifyCFG/switch_msan.ll
+++ b/llvm/test/Transforms/SimplifyCFG/switch_msan.ll
@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -S -simplifycfg < %s | FileCheck %s
+; RUN: opt -S -simplifycfg -simplifycfg-require-and-preserve-domtree=1 < %s | 
FileCheck %s
 
 declare i8 @next_char();
 



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[llvm-branch-commits] [llvm] 7f221c9 - [SimplifyCFG] Teach SwitchToLookupTable() to preserve DomTree

[Roman Lebedev via llvm-branch-commits]

Author: Roman Lebedev
Date: 2020-12-30T23:58:41+03:00
New Revision: 7f221c9196de2f042030e2a31f81089889d705bd

URL: 
https://github.com/llvm/llvm-project/commit/7f221c9196de2f042030e2a31f81089889d705bd
DIFF: 
https://github.com/llvm/llvm-project/commit/7f221c9196de2f042030e2a31f81089889d705bd.diff

LOG: [SimplifyCFG] Teach SwitchToLookupTable() to preserve DomTree

Added: 


Modified: 
llvm/lib/Transforms/Utils/SimplifyCFG.cpp
llvm/test/Transforms/SimplifyCFG/X86/CoveredLookupTable.ll
llvm/test/Transforms/SimplifyCFG/X86/disable-lookup-table.ll
llvm/test/Transforms/SimplifyCFG/X86/switch-covered-bug.ll
llvm/test/Transforms/SimplifyCFG/X86/switch-table-bug.ll
llvm/test/Transforms/SimplifyCFG/rangereduce.ll

Removed: 




diff  --git a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp 
b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
index 2b631175f55e..7e49d3a1524c 100644
--- a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
+++ b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
@@ -5716,7 +5716,7 @@ static void reuseTableCompare(
 /// successor block with 
diff erent constant values, replace the switch with
 /// lookup tables.
 static bool SwitchToLookupTable(SwitchInst *SI, IRBuilder<> &Builder,
-const DataLayout &DL,
+DomTreeUpdater *DTU, const DataLayout &DL,
 const TargetTransformInfo &TTI) {
   assert(SI->getNumCases() > 1 && "Degenerate switch?");
 
@@ -5814,6 +5814,8 @@ static bool SwitchToLookupTable(SwitchInst *SI, 
IRBuilder<> &Builder,
   if (!ShouldBuildLookupTable(SI, TableSize, TTI, DL, ResultTypes))
 return false;
 
+  std::vector Updates;
+
   // Create the BB that does the lookups.
   Module &Mod = *CommonDest->getParent()->getParent();
   BasicBlock *LookupBB = BasicBlock::Create(
@@ -5846,6 +5848,7 @@ static bool SwitchToLookupTable(SwitchInst *SI, 
IRBuilder<> &Builder,
 
   if (!DefaultIsReachable || GeneratingCoveredLookupTable) {
 Builder.CreateBr(LookupBB);
+Updates.push_back({DominatorTree::Insert, SI->getParent(), LookupBB});
 // Note: We call removeProdecessor later since we need to be able to get 
the
 // PHI value for the default case in case we're using a bit mask.
   } else {
@@ -5853,6 +5856,9 @@ static bool SwitchToLookupTable(SwitchInst *SI, 
IRBuilder<> &Builder,
 TableIndex, ConstantInt::get(MinCaseVal->getType(), TableSize));
 RangeCheckBranch =
 Builder.CreateCondBr(Cmp, LookupBB, SI->getDefaultDest());
+Updates.push_back({DominatorTree::Insert, SI->getParent(), LookupBB});
+Updates.push_back(
+{DominatorTree::Insert, SI->getParent(), SI->getDefaultDest()});
   }
 
   // Populate the BB that does the lookups.
@@ -5890,7 +5896,8 @@ static bool SwitchToLookupTable(SwitchInst *SI, 
IRBuilder<> &Builder,
 Value *LoBit = Builder.CreateTrunc(
 Shifted, Type::getInt1Ty(Mod.getContext()), "switch.lobit");
 Builder.CreateCondBr(LoBit, LookupBB, SI->getDefaultDest());
-
+Updates.push_back({DominatorTree::Insert, MaskBB, LookupBB});
+Updates.push_back({DominatorTree::Insert, MaskBB, SI->getDefaultDest()});
 Builder.SetInsertPoint(LookupBB);
 AddPredecessorToBlock(SI->getDefaultDest(), MaskBB, SI->getParent());
   }
@@ -5900,6 +5907,8 @@ static bool SwitchToLookupTable(SwitchInst *SI, 
IRBuilder<> &Builder,
 // do not delete PHINodes here.
 SI->getDefaultDest()->removePredecessor(SI->getParent(),
 /*KeepOneInputPHIs=*/true);
+Updates.push_back(
+{DominatorTree::Delete, SI->getParent(), SI->getDefaultDest()});
   }
 
   bool ReturnedEarly = false;
@@ -5936,8 +5945,10 @@ static bool SwitchToLookupTable(SwitchInst *SI, 
IRBuilder<> &Builder,
 PHI->addIncoming(Result, LookupBB);
   }
 
-  if (!ReturnedEarly)
+  if (!ReturnedEarly) {
 Builder.CreateBr(CommonDest);
+Updates.push_back({DominatorTree::Insert, LookupBB, CommonDest});
+  }
 
   // Remove the switch.
   for (unsigned i = 0, e = SI->getNumSuccessors(); i < e; ++i) {
@@ -5946,8 +5957,11 @@ static bool SwitchToLookupTable(SwitchInst *SI, 
IRBuilder<> &Builder,
 if (Succ == SI->getDefaultDest())
   continue;
 Succ->removePredecessor(SI->getParent());
+Updates.push_back({DominatorTree::Delete, SI->getParent(), Succ});
   }
   SI->eraseFromParent();
+  if (DTU)
+DTU->applyUpdatesPermissive(Updates);
 
   ++NumLookupTables;
   if (NeedMask)
@@ -6099,7 +6113,7 @@ bool SimplifyCFGOpt::simplifySwitch(SwitchInst *SI, 
IRBuilder<> &Builder) {
   // CVP. Therefore, only apply this transformation during late stages of the
   // optimisation pipeline.
   if (Options.ConvertSwitchToLookupTable &&
-  SwitchToLookupTable(SI, Builder, DL, TTI))
+  SwitchToLookupTable(SI, Builder, DTU, DL, TTI))
 return requestResimplify();
 
   if (ReduceSwitchRange(SI, Builder, DL, TTI))

[llvm-branch-commits] [llvm] a17025a - [SimplifyCFG] Teach switchToSelect() to preserve DomTree

[Roman Lebedev via llvm-branch-commits]

Author: Roman Lebedev
Date: 2020-12-30T23:58:40+03:00
New Revision: a17025aa61b16021ee85ff5deec47a9ed40ae1d4

URL: 
https://github.com/llvm/llvm-project/commit/a17025aa61b16021ee85ff5deec47a9ed40ae1d4
DIFF: 
https://github.com/llvm/llvm-project/commit/a17025aa61b16021ee85ff5deec47a9ed40ae1d4.diff

LOG: [SimplifyCFG] Teach switchToSelect() to preserve DomTree

Added: 


Modified: 
llvm/lib/Transforms/Utils/SimplifyCFG.cpp
llvm/test/Transforms/SimplifyCFG/switch-to-select-two-case.ll

Removed: 




diff  --git a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp 
b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
index c730c1427ec8..2b631175f55e 100644
--- a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
+++ b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
@@ -5282,7 +5282,8 @@ static Value *ConvertTwoCaseSwitch(const 
SwitchCaseResultVectorTy &ResultVector,
 // a select, fixing up PHI nodes and basic blocks.
 static void RemoveSwitchAfterSelectConversion(SwitchInst *SI, PHINode *PHI,
   Value *SelectValue,
-  IRBuilder<> &Builder) {
+  IRBuilder<> &Builder,
+  DomTreeUpdater *DTU) {
   BasicBlock *SelectBB = SI->getParent();
   while (PHI->getBasicBlockIndex(SelectBB) >= 0)
 PHI->removeIncomingValue(SelectBB);
@@ -5290,6 +5291,8 @@ static void RemoveSwitchAfterSelectConversion(SwitchInst 
*SI, PHINode *PHI,
 
   Builder.CreateBr(PHI->getParent());
 
+  std::vector Updates;
+
   // Remove the switch.
   for (unsigned i = 0, e = SI->getNumSuccessors(); i < e; ++i) {
 BasicBlock *Succ = SI->getSuccessor(i);
@@ -5297,15 +5300,18 @@ static void 
RemoveSwitchAfterSelectConversion(SwitchInst *SI, PHINode *PHI,
 if (Succ == PHI->getParent())
   continue;
 Succ->removePredecessor(SelectBB);
+Updates.push_back({DominatorTree::Delete, SelectBB, Succ});
   }
   SI->eraseFromParent();
+  if (DTU)
+DTU->applyUpdatesPermissive(Updates);
 }
 
 /// If the switch is only used to initialize one or more
 /// phi nodes in a common successor block with only two 
diff erent
 /// constant values, replace the switch with select.
 static bool switchToSelect(SwitchInst *SI, IRBuilder<> &Builder,
-   const DataLayout &DL,
+   DomTreeUpdater *DTU, const DataLayout &DL,
const TargetTransformInfo &TTI) {
   Value *const Cond = SI->getCondition();
   PHINode *PHI = nullptr;
@@ -5325,7 +5331,7 @@ static bool switchToSelect(SwitchInst *SI, IRBuilder<> 
&Builder,
   Value *SelectValue =
   ConvertTwoCaseSwitch(UniqueResults, DefaultResult, Cond, Builder);
   if (SelectValue) {
-RemoveSwitchAfterSelectConversion(SI, PHI, SelectValue, Builder);
+RemoveSwitchAfterSelectConversion(SI, PHI, SelectValue, Builder, DTU);
 return true;
   }
   // The switch couldn't be converted into a select.
@@ -6081,7 +6087,7 @@ bool SimplifyCFGOpt::simplifySwitch(SwitchInst *SI, 
IRBuilder<> &Builder) {
   if (eliminateDeadSwitchCases(SI, Options.AC, DL))
 return requestResimplify();
 
-  if (switchToSelect(SI, Builder, DL, TTI))
+  if (switchToSelect(SI, Builder, DTU, DL, TTI))
 return requestResimplify();
 
   if (Options.ForwardSwitchCondToPhi && ForwardSwitchConditionToPHI(SI))

diff  --git a/llvm/test/Transforms/SimplifyCFG/switch-to-select-two-case.ll 
b/llvm/test/Transforms/SimplifyCFG/switch-to-select-two-case.ll
index 31f5410bae40..bd3d5dff94d3 100644
--- a/llvm/test/Transforms/SimplifyCFG/switch-to-select-two-case.ll
+++ b/llvm/test/Transforms/SimplifyCFG/switch-to-select-two-case.ll
@@ -1,4 +1,4 @@
-; RUN: opt < %s -simplifycfg -S | FileCheck %s
+; RUN: opt < %s -simplifycfg -simplifycfg-require-and-preserve-domtree=1 -S | 
FileCheck %s
 
 ; int foo1_with_default(int a) {
 ;   switch(a) {



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[llvm-branch-commits] [llvm] 51879a5 - [LoopIdiom] 'left-shift until bittest': don't forget to check that PHI node is in loop header

[Roman Lebedev via llvm-branch-commits]

Author: Roman Lebedev
Date: 2020-12-30T23:58:41+03:00
New Revision: 51879a525649c8151f7e841b66a5cea0e1c8e74e

URL: 
https://github.com/llvm/llvm-project/commit/51879a525649c8151f7e841b66a5cea0e1c8e74e
DIFF: 
https://github.com/llvm/llvm-project/commit/51879a525649c8151f7e841b66a5cea0e1c8e74e.diff

LOG: [LoopIdiom] 'left-shift until bittest': don't forget to check that PHI 
node is in loop header

Fixes an issue reported by Peter Collingbourne in
https://reviews.llvm.org/D91726#2475301

Added: 


Modified: 
llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
llvm/test/Transforms/LoopIdiom/X86/left-shift-until-bittest.ll

Removed: 




diff  --git a/llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp 
b/llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
index 3612f8cc1a71..8064c02e2b39 100644
--- a/llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
+++ b/llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
@@ -2024,8 +2024,8 @@ static bool detectShiftUntilBitTestIdiom(Loop *CurLoop, 
Value *&BaseX,
 
   // Step 3: Check if the recurrence is in desirable form.
   auto *CurrXPN = dyn_cast(CurrX);
-  if (!CurrXPN) {
-LLVM_DEBUG(dbgs() << DEBUG_TYPE " Not a PHI node.\n");
+  if (!CurrXPN || CurrXPN->getParent() != LoopHeaderBB) {
+LLVM_DEBUG(dbgs() << DEBUG_TYPE " Not an expected PHI node.\n");
 return false;
   }
 

diff  --git a/llvm/test/Transforms/LoopIdiom/X86/left-shift-until-bittest.ll 
b/llvm/test/Transforms/LoopIdiom/X86/left-shift-until-bittest.ll
index 17ff7fc7663b..82dc8451382f 100644
--- a/llvm/test/Transforms/LoopIdiom/X86/left-shift-until-bittest.ll
+++ b/llvm/test/Transforms/LoopIdiom/X86/left-shift-until-bittest.ll
@@ -1812,3 +1812,84 @@ end:
   call void @use1(i1 %x.curr.isbitunset)
   ret i32 %x.curr
 }
+
+; %x.curr is not a PHI node
+define i32 @n33(i32 %x, i32 %bit, i32 %x.curr) {
+; ALL-LABEL: @n33(
+; ALL-NEXT:  entry:
+; ALL-NEXT:[[BITMASK:%.*]] = shl i32 1, [[BIT:%.*]], [[DBG507:!dbg !.*]]
+; ALL-NEXT:call void @llvm.dbg.value(metadata i32 [[BITMASK]], 
[[META503:metadata !.*]], metadata !DIExpression()), [[DBG507]]
+; ALL-NEXT:br label [[LOOP:%.*]], [[DBG508:!dbg !.*]]
+; ALL:   loop:
+; ALL-NEXT:[[X_CURR_BITMASKED:%.*]] = and i32 [[X_CURR:%.*]], [[BITMASK]], 
[[DBG509:!dbg !.*]]
+; ALL-NEXT:call void @llvm.dbg.value(metadata i32 [[X_CURR_BITMASKED]], 
[[META504:metadata !.*]], metadata !DIExpression()), [[DBG509]]
+; ALL-NEXT:[[X_CURR_ISBITUNSET:%.*]] = icmp eq i32 [[X_CURR_BITMASKED]], 
0, [[DBG510:!dbg !.*]]
+; ALL-NEXT:call void @llvm.dbg.value(metadata i1 [[X_CURR_ISBITUNSET]], 
[[META505:metadata !.*]], metadata !DIExpression()), [[DBG510]]
+; ALL-NEXT:[[X_NEXT:%.*]] = shl i32 [[X_CURR]], 1, [[DBG511:!dbg !.*]]
+; ALL-NEXT:call void @llvm.dbg.value(metadata i32 [[X_NEXT]], 
[[META506:metadata !.*]], metadata !DIExpression()), [[DBG511]]
+; ALL-NEXT:br i1 [[X_CURR_ISBITUNSET]], label [[LOOP]], label [[END:%.*]], 
[[DBG512:!dbg !.*]]
+; ALL:   end:
+; ALL-NEXT:ret i32 [[X_CURR]], [[DBG513:!dbg !.*]]
+;
+entry:
+  %bitmask = shl i32 1, %bit
+  br label %loop
+
+loop:
+  %x.curr.bitmasked = and i32 %x.curr, %bitmask
+  %x.curr.isbitunset = icmp eq i32 %x.curr.bitmasked, 0
+  %x.next = shl i32 %x.curr, 1
+  br i1 %x.curr.isbitunset, label %loop, label %end
+
+end:
+  ret i32 %x.curr
+}
+
+; %x.curr is a PHI node in a wrong block
+define i32 @n34(i32 %bit, i1 %c, i32 %x0, i32 %x1) {
+; ALL-LABEL: @n34(
+; ALL-NEXT:  entry:
+; ALL-NEXT:[[BITMASK:%.*]] = shl i32 1, [[BIT:%.*]], [[DBG521:!dbg !.*]]
+; ALL-NEXT:call void @llvm.dbg.value(metadata i32 [[BITMASK]], 
[[META516:metadata !.*]], metadata !DIExpression()), [[DBG521]]
+; ALL-NEXT:br i1 [[C:%.*]], label [[BB0:%.*]], label [[BB1:%.*]], 
[[DBG522:!dbg !.*]]
+; ALL:   bb0:
+; ALL-NEXT:br label [[MERGE:%.*]], [[DBG523:!dbg !.*]]
+; ALL:   bb1:
+; ALL-NEXT:br label [[MERGE]], [[DBG524:!dbg !.*]]
+; ALL:   merge:
+; ALL-NEXT:[[X_CURR:%.*]] = phi i32 [ [[X0:%.*]], [[BB0]] ], [ [[X1:%.*]], 
[[BB1]] ], [[DBG525:!dbg !.*]]
+; ALL-NEXT:call void @llvm.dbg.value(metadata i32 [[X_CURR]], 
[[META517:metadata !.*]], metadata !DIExpression()), [[DBG525]]
+; ALL-NEXT:br label [[LOOP:%.*]], [[DBG526:!dbg !.*]]
+; ALL:   loop:
+; ALL-NEXT:[[X_CURR_BITMASKED:%.*]] = and i32 [[X_CURR]], [[BITMASK]], 
[[DBG527:!dbg !.*]]
+; ALL-NEXT:call void @llvm.dbg.value(metadata i32 [[X_CURR_BITMASKED]], 
[[META518:metadata !.*]], metadata !DIExpression()), [[DBG527]]
+; ALL-NEXT:[[X_CURR_ISBITUNSET:%.*]] = icmp eq i32 [[X_CURR_BITMASKED]], 
0, [[DBG528:!dbg !.*]]
+; ALL-NEXT:call void @llvm.dbg.value(metadata i1 [[X_CURR_ISBITUNSET]], 
[[META519:metadata !.*]], metadata !DIExpression()), [[DBG528]]
+; ALL-NEXT:[[X_NEXT:%.*]] = shl i32 [[X_CURR]], 1, [[DBG529:!dbg !.*]]
+; ALL-NEXT:call void @llvm.dbg.value(metadata i32 [[X_NEXT]], 
[[META520:meta

[llvm-branch-commits] [libc] cc07d52 - [libc][NFC] Use ASSERT_FP_EQ to compare nan values in tests.

[Siva Chandra Reddy via llvm-branch-commits]

Author: Siva Chandra Reddy
Date: 2020-12-30T13:06:40-08:00
New Revision: cc07d5251144e12cc089748ec66af0423ba57ad1

URL: 
https://github.com/llvm/llvm-project/commit/cc07d5251144e12cc089748ec66af0423ba57ad1
DIFF: 
https://github.com/llvm/llvm-project/commit/cc07d5251144e12cc089748ec66af0423ba57ad1.diff

LOG: [libc][NFC] Use ASSERT_FP_EQ to compare nan values in tests.

This change "fixes" one of the uses that was missed in
0524da67b448dcce6569fae0f54c10f208c2dc56.

Added: 


Modified: 
libc/test/src/math/RemQuoTest.h

Removed: 




diff  --git a/libc/test/src/math/RemQuoTest.h b/libc/test/src/math/RemQuoTest.h
index 66f2f0956348..1e00ee14927e 100644
--- a/libc/test/src/math/RemQuoTest.h
+++ b/libc/test/src/math/RemQuoTest.h
@@ -123,7 +123,7 @@ class RemQuoTestTemplate : public 
__llvm_libc::testing::Test {
   // In normal range on x86 platforms, the long double implicit 1 bit can 
be
   // zero making the numbers NaN. Hence we test for them separately.
   if (isnan(x) || isnan(y)) {
-ASSERT_NE(isnan(result.f), 0);
+ASSERT_FP_EQ(result.f, nan);
 continue;
   }
 



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[llvm-branch-commits] [llvm] f07b95e - [PowerPC] Add addtional test that retroactively catches PR47259

[Brandon Bergren via llvm-branch-commits]

Author: Brandon Bergren
Date: 2020-12-30T15:23:48-06:00
New Revision: f07b95e8bcd1584167eaa8bd41ef8ee96422df65

URL: 
https://github.com/llvm/llvm-project/commit/f07b95e8bcd1584167eaa8bd41ef8ee96422df65
DIFF: 
https://github.com/llvm/llvm-project/commit/f07b95e8bcd1584167eaa8bd41ef8ee96422df65.diff

LOG: [PowerPC] Add addtional test that retroactively catches PR47259

Due to the unfortunate way the bug could only be triggered when reading 
SPRG[0-3] into a register lower than %r4 with the "mfsprg %rX, 0" syntax, the 
tests did not detect it.

(It could not be triggered for "mfsprg0, %r2" because that pattern was already 
in the table, so the earlier "correct" match took effect)

As a canary, add an intentionally ambiguous "mfsprg 2, 2" and "mtsprg 2, 2" 
check that would have caught the problem.

Reviewed By: ZhangKang

Differential Revision: https://reviews.llvm.org/D86489

Added: 


Modified: 
llvm/test/MC/PowerPC/ppc64-encoding-ext.s

Removed: 




diff  --git a/llvm/test/MC/PowerPC/ppc64-encoding-ext.s 
b/llvm/test/MC/PowerPC/ppc64-encoding-ext.s
index 6284ca0efb09..6edad4c31bed 100644
--- a/llvm/test/MC/PowerPC/ppc64-encoding-ext.s
+++ b/llvm/test/MC/PowerPC/ppc64-encoding-ext.s
@@ -3571,6 +3571,11 @@
 # CHECK-LE: mfspr 4, 275# encoding: [0xa6,0x42,0x93,0x7c]
 mfsprg %r4, 3
 
+# Bug PR47259
+# CHECK-BE: mfspr 2, 274# encoding: [0x7c,0x52,0x42,0xa6]
+# CHECK-LE: mfspr 2, 274# encoding: [0xa6,0x42,0x52,0x7c]
+mfsprg 2, 2
+
 # CHECK-BE: mfspr 2, 272# encoding: [0x7c,0x50,0x42,0xa6]
 # CHECK-LE: mfspr 2, 272# encoding: [0xa6,0x42,0x50,0x7c]
 mfsprg0 %r2
@@ -3600,6 +3605,11 @@
 # CHECK-LE: mtspr 275, 4# encoding: [0xa6,0x43,0x93,0x7c]
 mtsprg 3, %r4
 
+# Bug PR47259
+# CHECK-BE: mtspr 274, 2# encoding: [0x7c,0x52,0x43,0xa6]
+# CHECK-LE: mtspr 274, 2# encoding: [0xa6,0x43,0x52,0x7c]
+mtsprg 2, 2
+
 # CHECK-BE: mtspr 272, 4# encoding: [0x7c,0x90,0x43,0xa6]
 # CHECK-LE: mtspr 272, 4# encoding: [0xa6,0x43,0x90,0x7c]
 mtsprg0 %r4



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[llvm-branch-commits] [openmp] 6b316fe - [OpenMP] libomp: Handle implicit conversion warnings

[via llvm-branch-commits]

Author: Terry Wilmarth
Date: 2020-12-31T00:39:57+03:00
New Revision: 6b316febb4388764789677f81f03aff373ec35b2

URL: 
https://github.com/llvm/llvm-project/commit/6b316febb4388764789677f81f03aff373ec35b2
DIFF: 
https://github.com/llvm/llvm-project/commit/6b316febb4388764789677f81f03aff373ec35b2.diff

LOG: [OpenMP] libomp: Handle implicit conversion warnings

This patch partially prepares the runtime source code to be built with
-Wconversion, which should trigger warnings if any implicit conversions
can possibly change a value. For builds done with icc or gcc, all such
warnings are handled in this patch. clang gives a much longer list of
warnings, particularly for sign conversions, which the other compilers
don't report. The -Wconversion flag is commented into cmake files, but
I'm not going to turn it on. If someone thinks it is important, and wants
to fix all the clang warnings, they are welcome to.

Types of changes made here involve either improving the consistency of types
used so that no conversion is needed, or else performing careful explicit
conversions, when we're sure a problem won't arise.

Patch is a combination of changes by Terry Wilmarth and Johnny Peyton.

Differential Revision: https://reviews.llvm.org/D92942

Added: 


Modified: 
openmp/runtime/cmake/LibompHandleFlags.cmake
openmp/runtime/cmake/config-ix.cmake
openmp/runtime/src/kmp.h
openmp/runtime/src/kmp_affinity.cpp
openmp/runtime/src/kmp_affinity.h
openmp/runtime/src/kmp_alloc.cpp
openmp/runtime/src/kmp_atomic.cpp
openmp/runtime/src/kmp_barrier.cpp
openmp/runtime/src/kmp_csupport.cpp
openmp/runtime/src/kmp_dispatch.cpp
openmp/runtime/src/kmp_dispatch_hier.h
openmp/runtime/src/kmp_environment.cpp
openmp/runtime/src/kmp_ftn_entry.h
openmp/runtime/src/kmp_gsupport.cpp
openmp/runtime/src/kmp_i18n.h
openmp/runtime/src/kmp_itt.inl
openmp/runtime/src/kmp_lock.cpp
openmp/runtime/src/kmp_runtime.cpp
openmp/runtime/src/kmp_settings.cpp
openmp/runtime/src/kmp_stats.cpp
openmp/runtime/src/kmp_stats.h
openmp/runtime/src/kmp_str.cpp
openmp/runtime/src/kmp_str.h
openmp/runtime/src/kmp_stub.cpp
openmp/runtime/src/kmp_stub.h
openmp/runtime/src/kmp_taskdeps.cpp
openmp/runtime/src/kmp_tasking.cpp
openmp/runtime/src/kmp_threadprivate.cpp
openmp/runtime/src/kmp_utility.cpp
openmp/runtime/src/kmp_wait_release.h
openmp/runtime/src/ompt-specific.cpp
openmp/runtime/src/z_Linux_util.cpp

Removed: 




diff  --git a/openmp/runtime/cmake/LibompHandleFlags.cmake 
b/openmp/runtime/cmake/LibompHandleFlags.cmake
index 9f0fc6b6390e..4a25359a788c 100644
--- a/openmp/runtime/cmake/LibompHandleFlags.cmake
+++ b/openmp/runtime/cmake/LibompHandleFlags.cmake
@@ -36,6 +36,7 @@ function(libomp_get_cxxflags cxxflags)
   libomp_append(flags_local -Wno-switch LIBOMP_HAVE_WNO_SWITCH_FLAG)
   libomp_append(flags_local -Wno-uninitialized 
LIBOMP_HAVE_WNO_UNINITIALIZED_FLAG)
   libomp_append(flags_local -Wno-unused-but-set-variable 
LIBOMP_HAVE_WNO_UNUSED_BUT_SET_VARIABLE_FLAG)
+  # libomp_append(flags_local -Wconversion LIBOMP_HAVE_WCONVERSION_FLAG)
   libomp_append(flags_local /GS LIBOMP_HAVE_GS_FLAG)
   libomp_append(flags_local /EHsc LIBOMP_HAVE_EHSC_FLAG)
   libomp_append(flags_local /Oy- LIBOMP_HAVE_OY__FLAG)

diff  --git a/openmp/runtime/cmake/config-ix.cmake 
b/openmp/runtime/cmake/config-ix.cmake
index b5bf39b07728..7dcd68eb8852 100644
--- a/openmp/runtime/cmake/config-ix.cmake
+++ b/openmp/runtime/cmake/config-ix.cmake
@@ -59,6 +59,7 @@ check_cxx_compiler_flag(-Wno-stringop-truncation 
LIBOMP_HAVE_WNO_STRINGOP_TRUNCA
 check_cxx_compiler_flag(-Wno-switch LIBOMP_HAVE_WNO_SWITCH_FLAG)
 check_cxx_compiler_flag(-Wno-uninitialized LIBOMP_HAVE_WNO_UNINITIALIZED_FLAG)
 check_cxx_compiler_flag(-Wno-unused-but-set-variable 
LIBOMP_HAVE_WNO_UNUSED_BUT_SET_VARIABLE_FLAG)
+# check_cxx_compiler_flag(-Wconversion LIBOMP_HAVE_WCONVERSION_FLAG)
 check_cxx_compiler_flag(-msse2 LIBOMP_HAVE_MSSE2_FLAG)
 check_cxx_compiler_flag(-ftls-model=initial-exec LIBOMP_HAVE_FTLS_MODEL_FLAG)
 libomp_check_architecture_flag(-mmic LIBOMP_HAVE_MMIC_FLAG)

diff  --git a/openmp/runtime/src/kmp.h b/openmp/runtime/src/kmp.h
index ece7aa06006a..de83ec0eccff 100644
--- a/openmp/runtime/src/kmp.h
+++ b/openmp/runtime/src/kmp.h
@@ -66,6 +66,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 /* include  don't use; problems with /MD on Windows* OS NT due to bad
Microsoft library. Some macros provided below to replace these functions  */
 #ifndef __ABSOFT_WIN
@@ -2379,7 +2381,7 @@ struct kmp_taskdata { /* aligned during dynamic 
allocation   */
   kmp_depnode_t
   *td_depnode; // Pointer to graph node if this task has dependencies
   kmp_task_team_t *td_task_team;
-  kmp_int32 td_size_alloc; // The size of task structure, including shareds 
etc.
+  size_t td_size_alloc; // Size of tas

[llvm-branch-commits] [mlir] 8c1f553 - Avoid using /dev/null in test

[Jacques Pienaar via llvm-branch-commits]

Author: Jacques Pienaar
Date: 2020-12-30T14:16:13-08:00
New Revision: 8c1f55384450a26f6ca391dd25905c32f9ed5644

URL: 
https://github.com/llvm/llvm-project/commit/8c1f55384450a26f6ca391dd25905c32f9ed5644
DIFF: 
https://github.com/llvm/llvm-project/commit/8c1f55384450a26f6ca391dd25905c32f9ed5644.diff

LOG: Avoid using /dev/null in test

Windows build bot was not happy with this
(http://lab.llvm.org:8011/#/builders/13/builds/3327/steps/7/logs/FAIL__MLIR__run-reproducer_mlir)

Added: 


Modified: 
mlir/test/Pass/run-reproducer.mlir

Removed: 




diff  --git a/mlir/test/Pass/run-reproducer.mlir 
b/mlir/test/Pass/run-reproducer.mlir
index 9caa3f68abef..af36c5bb65f2 100644
--- a/mlir/test/Pass/run-reproducer.mlir
+++ b/mlir/test/Pass/run-reproducer.mlir
@@ -1,4 +1,4 @@
-// configuration: -mlir-disable-threading=true 
-pass-pipeline='func(cse,canonicalize)' -print-ir-before=cse -o /dev/null
+// configuration: -mlir-disable-threading=true 
-pass-pipeline='func(cse,canonicalize)' -print-ir-before=cse
 
 // Test of the reproducer run option. The first line has to be the
 // configuration (matching what is produced by reproducer).



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[llvm-branch-commits] [llvm] e0f70ee - [test] Fix linux-preemption.ll

[Fangrui Song via llvm-branch-commits]

Author: Fangrui Song
Date: 2020-12-30T14:44:43-08:00
New Revision: e0f70ee01c6b83ce1b49a8d38bb1fe62e9302854

URL: 
https://github.com/llvm/llvm-project/commit/e0f70ee01c6b83ce1b49a8d38bb1fe62e9302854
DIFF: 
https://github.com/llvm/llvm-project/commit/e0f70ee01c6b83ce1b49a8d38bb1fe62e9302854.diff

LOG: [test] Fix linux-preemption.ll

Added: 


Modified: 
llvm/test/CodeGen/X86/linux-preemption.ll

Removed: 




diff  --git a/llvm/test/CodeGen/X86/linux-preemption.ll 
b/llvm/test/CodeGen/X86/linux-preemption.ll
index 326c00bc8d5f..4739e6cec011 100644
--- a/llvm/test/CodeGen/X86/linux-preemption.ll
+++ b/llvm/test/CodeGen/X86/linux-preemption.ll
@@ -12,8 +12,8 @@
 
 ; globals
 
-@strong_default_global = dso_local global i32 42
-define dso_local i32* @get_strong_default_global() {
+@strong_default_global = global i32 42
+define i32* @get_strong_default_global() {
   ret i32* @strong_default_global
 }
 ; CHECK: movq strong_default_global@GOTPCREL(%rip), %rax
@@ -21,15 +21,15 @@ define dso_local i32* @get_strong_default_global() {
 ; CHECK32: movl strong_default_global@GOT(%eax), %eax
 
 @strong_hidden_global = hidden global i32 42
-define dso_local i32* @get_hidden_default_global() {
+define i32* @get_hidden_default_global() {
   ret i32* @strong_hidden_global
 }
 ; CHECK: leaq strong_hidden_global(%rip), %rax
 ; STATIC: movl $strong_hidden_global, %eax
 ; CHECK32: leal strong_hidden_global@GOTOFF(%eax), %eax
 
-@weak_default_global = weak dso_local global i32 42
-define dso_local i32* @get_weak_default_global() {
+@weak_default_global = weak global i32 42
+define i32* @get_weak_default_global() {
   ret i32* @weak_default_global
 }
 ; CHECK: movq weak_default_global@GOTPCREL(%rip), %rax
@@ -37,7 +37,7 @@ define dso_local i32* @get_weak_default_global() {
 ; CHECK32: movl weak_default_global@GOT(%eax), %eax
 
 @external_default_global = external global i32
-define dso_local i32* @get_external_default_global() {
+define i32* @get_external_default_global() {
   ret i32* @external_default_global
 }
 ; CHECK: movq external_default_global@GOTPCREL(%rip), %rax
@@ -45,7 +45,7 @@ define dso_local i32* @get_external_default_global() {
 ; CHECK32: movl external_default_global@GOT(%eax), %eax
 
 @strong_local_global = dso_local global i32 42
-define dso_local i32* @get_strong_local_global() {
+define i32* @get_strong_local_global() {
   ret i32* @strong_local_global
 }
 ; CHECK: leaq .Lstrong_local_global$local(%rip), %rax
@@ -53,7 +53,7 @@ define dso_local i32* @get_strong_local_global() {
 ; CHECK32: leal .Lstrong_local_global$local@GOTOFF(%eax), %eax
 
 @weak_local_global = weak dso_local global i32 42
-define dso_local i32* @get_weak_local_global() {
+define i32* @get_weak_local_global() {
   ret i32* @weak_local_global
 }
 ; CHECK: leaq weak_local_global(%rip), %rax
@@ -61,7 +61,7 @@ define dso_local i32* @get_weak_local_global() {
 ; CHECK32: leal weak_local_global@GOTOFF(%eax), %eax
 
 @external_local_global = external dso_local global i32
-define dso_local i32* @get_external_local_global() {
+define i32* @get_external_local_global() {
   ret i32* @external_local_global
 }
 ; CHECK: leaq external_local_global(%rip), %rax
@@ -70,7 +70,7 @@ define dso_local i32* @get_external_local_global() {
 
 
 @strong_preemptable_global = dso_preemptable global i32 42
-define dso_local i32* @get_strong_preemptable_global() {
+define i32* @get_strong_preemptable_global() {
   ret i32* @strong_preemptable_global
 }
 ; CHECK: movq strong_preemptable_global@GOTPCREL(%rip), %rax
@@ -78,7 +78,7 @@ define dso_local i32* @get_strong_preemptable_global() {
 ; CHECK32: movl strong_preemptable_global@GOT(%eax), %eax
 
 @weak_preemptable_global = weak dso_preemptable global i32 42
-define dso_local i32* @get_weak_preemptable_global() {
+define i32* @get_weak_preemptable_global() {
   ret i32* @weak_preemptable_global
 }
 ; CHECK: movq weak_preemptable_global@GOTPCREL(%rip), %rax
@@ -86,7 +86,7 @@ define dso_local i32* @get_weak_preemptable_global() {
 ; CHECK32: movl weak_preemptable_global@GOT(%eax), %eax
 
 @external_preemptable_global = external dso_preemptable global i32
-define dso_local i32* @get_external_preemptable_global() {
+define i32* @get_external_preemptable_global() {
   ret i32* @external_preemptable_global
 }
 ; CHECK: movq external_preemptable_global@GOTPCREL(%rip), %rax
@@ -94,10 +94,10 @@ define dso_local i32* @get_external_preemptable_global() {
 ; CHECK32: movl external_preemptable_global@GOT(%eax), %eax
 
 ; aliases
-@aliasee = dso_local global i32 42
+@aliasee = global i32 42
 
 @strong_default_alias = alias i32, i32* @aliasee
-define dso_local i32* @get_strong_default_alias() {
+define i32* @get_strong_default_alias() {
   ret i32* @strong_default_alias
 }
 ; CHECK: movq strong_default_alias@GOTPCREL(%rip), %rax
@@ -105,7 +105,7 @@ define dso_local i32* @get_strong_default_alias() {
 ; CHECK32: movl strong_default_alias@GOT(%e

[llvm-branch-commits] [llvm] a64b89e - [ARM][test] Add explicit dso_local to definitions in ELF static relocation model tests

[Fangrui Song via llvm-branch-commits]

Author: Fangrui Song
Date: 2020-12-30T15:23:21-08:00
New Revision: a64b89e69e3e3d9884e135082a80b6010e127219

URL: 
https://github.com/llvm/llvm-project/commit/a64b89e69e3e3d9884e135082a80b6010e127219
DIFF: 
https://github.com/llvm/llvm-project/commit/a64b89e69e3e3d9884e135082a80b6010e127219.diff

LOG: [ARM][test] Add explicit dso_local to definitions in ELF static relocation 
model tests

TargetMachine::shouldAssumeDSOLocal currently implies dso_local for such 
definitions.

Adding explicit dso_local makes these tests align with the clang -fno-pic 
behavior
and allow the removal of the TargetMachine::shouldAssumeDSOLocal special case.

Added: 


Modified: 
llvm/test/CodeGen/ARM/aeabi-read-tp.ll
llvm/test/CodeGen/ARM/cortex-a57-misched-ldm-wrback.ll
llvm/test/CodeGen/ARM/cortex-a57-misched-vldm-wrback.ll
llvm/test/CodeGen/ARM/cortex-a57-misched-vstm-wrback.ll
llvm/test/CodeGen/ARM/fast-isel-pie.ll
llvm/test/CodeGen/ARM/global-merge-alignment.ll
llvm/test/CodeGen/ARM/global-merge-external-2.ll
llvm/test/CodeGen/ARM/global-merge-external.ll
llvm/test/CodeGen/ARM/ldm-base-writeback.ll
llvm/test/CodeGen/ARM/pie.ll
llvm/test/CodeGen/ARM/tls1.ll

Removed: 




diff  --git a/llvm/test/CodeGen/ARM/aeabi-read-tp.ll 
b/llvm/test/CodeGen/ARM/aeabi-read-tp.ll
index 5f9815b6cd77..d15755a837fc 100644
--- a/llvm/test/CodeGen/ARM/aeabi-read-tp.ll
+++ b/llvm/test/CodeGen/ARM/aeabi-read-tp.ll
@@ -3,9 +3,9 @@
 ; RUN: llc -mtriple armv7---eabi -mattr=+long-calls -filetype asm -o - %s | 
FileCheck %s -check-prefix CHECK -check-prefix CHECK-LONG
 ; RUN: llc -mtriple thumbv7---eabi -mattr=+long-calls -filetype asm -o - %s | 
FileCheck %s -check-prefix CHECK -check-prefix CHECK-LONG
 
-@i = thread_local local_unnamed_addr global i32 0, align 4
+@i = dso_local thread_local local_unnamed_addr global i32 0, align 4
 
-define i32 @f() local_unnamed_addr {
+define dso_local i32 @f() local_unnamed_addr {
 entry:
   %0 = load i32, i32* @i, align 4
   ret i32 %0

diff  --git a/llvm/test/CodeGen/ARM/cortex-a57-misched-ldm-wrback.ll 
b/llvm/test/CodeGen/ARM/cortex-a57-misched-ldm-wrback.ll
index be3df4aae506..ddcd72d9d67a 100644
--- a/llvm/test/CodeGen/ARM/cortex-a57-misched-ldm-wrback.ll
+++ b/llvm/test/CodeGen/ARM/cortex-a57-misched-ldm-wrback.ll
@@ -2,9 +2,9 @@
 ; RUN: llc < %s -mtriple=armv8r-eabi -mcpu=cortex-a57 -mattr=use-misched 
-verify-misched -debug-only=machine-scheduler -o - 2>&1 > /dev/null | FileCheck 
%s
 ; 
 
-@a = global i32 0, align 4
-@b = global i32 0, align 4
-@c = global i32 0, align 4
+@a = dso_local global i32 0, align 4
+@b = dso_local global i32 0, align 4
+@c = dso_local global i32 0, align 4
 
 ; CHECK:   ** MI Scheduling **
 ; We need second, post-ra scheduling to have LDM instruction combined from 
single-loads
@@ -21,7 +21,7 @@
 ; CHECK-SAME:  Latency=0
 ; CHECK-NEXT:  Data
 ; CHECK-SAME:  Latency=0
-define i32 @bar(i32 %a1, i32 %b1, i32 %c1) minsize optsize {
+define dso_local i32 @bar(i32 %a1, i32 %b1, i32 %c1) minsize optsize {
   %1 = load i32, i32* @a, align 4
   %2 = load i32, i32* @b, align 4
   %3 = load i32, i32* @c, align 4

diff  --git a/llvm/test/CodeGen/ARM/cortex-a57-misched-vldm-wrback.ll 
b/llvm/test/CodeGen/ARM/cortex-a57-misched-vldm-wrback.ll
index 88b772cc294e..bf923eab4c89 100644
--- a/llvm/test/CodeGen/ARM/cortex-a57-misched-vldm-wrback.ll
+++ b/llvm/test/CodeGen/ARM/cortex-a57-misched-vldm-wrback.ll
@@ -2,9 +2,9 @@
 ; RUN: llc < %s -mtriple=armv8r-eabi -mcpu=cortex-a57 -mattr=use-misched 
-verify-misched -debug-only=machine-scheduler -o - 2>&1 > /dev/null | FileCheck 
%s
 ; 
 
-@a = global double 0.0, align 4
-@b = global double 0.0, align 4
-@c = global double 0.0, align 4
+@a = dso_local global double 0.0, align 4
+@b = dso_local global double 0.0, align 4
+@c = dso_local global double 0.0, align 4
 
 ; CHECK:   ** MI Scheduling **
 ; We need second, post-ra scheduling to have VLDM instruction combined from 
single-loads
@@ -23,7 +23,7 @@
 ; CHECK-SAME:  Latency=0
 ; CHECK-NEXT:  Data
 ; CHECK-SAME:  Latency=0
-define i32 @bar(i32* %iptr) minsize optsize {
+define dso_local i32 @bar(i32* %iptr) minsize optsize {
   %1 = load double, double* @a, align 8
   %2 = load double, double* @b, align 8
   %3 = load double, double* @c, align 8

diff  --git a/llvm/test/CodeGen/ARM/cortex-a57-misched-vstm-wrback.ll 
b/llvm/test/CodeGen/ARM/cortex-a57-misched-vstm-wrback.ll
index c517f46e5614..afa43eac95c7 100644
--- a/llvm/test/CodeGen/ARM/cortex-a57-misched-vstm-wrback.ll
+++ b/llvm/test/CodeGen/ARM/cortex-a57-misched-vstm-wrback.ll
@@ -12,11 +12,11 @@
 ; CHECK:   Data
 ; CHECK-SAME:  Latency=1
 
-@a = global double 0.0, align 4
-@b = global double 0.0, align 4
-@c = global double 0.0, align 4
+@a = dso_local global double 0.0, align 4
+@b = dso_local global double 0.0, align 4
+@c = dso_local global double 0.0, align 4
 

[llvm-branch-commits] [llvm] a90e5a8 - [SystemZ][test] Add explicit dso_local to definitions in ELF static relocation model tests

[Fangrui Song via llvm-branch-commits]

Author: Fangrui Song
Date: 2020-12-30T15:26:09-08:00
New Revision: a90e5a8f0d010c339e4f14e0b098a2a147ef8e67

URL: 
https://github.com/llvm/llvm-project/commit/a90e5a8f0d010c339e4f14e0b098a2a147ef8e67
DIFF: 
https://github.com/llvm/llvm-project/commit/a90e5a8f0d010c339e4f14e0b098a2a147ef8e67.diff

LOG: [SystemZ][test] Add explicit dso_local to definitions in ELF static 
relocation model tests

Added: 


Modified: 
llvm/test/CodeGen/SystemZ/and-08.ll
llvm/test/CodeGen/SystemZ/branch-06.ll
llvm/test/CodeGen/SystemZ/int-cmp-36.ll
llvm/test/CodeGen/SystemZ/int-cmp-37.ll
llvm/test/CodeGen/SystemZ/int-cmp-38.ll
llvm/test/CodeGen/SystemZ/int-cmp-39.ll
llvm/test/CodeGen/SystemZ/int-cmp-40.ll
llvm/test/CodeGen/SystemZ/int-cmp-41.ll
llvm/test/CodeGen/SystemZ/int-cmp-42.ll
llvm/test/CodeGen/SystemZ/int-cmp-43.ll
llvm/test/CodeGen/SystemZ/int-move-08.ll
llvm/test/CodeGen/SystemZ/int-move-09.ll
llvm/test/CodeGen/SystemZ/int-move-10.ll
llvm/test/CodeGen/SystemZ/la-01.ll
llvm/test/CodeGen/SystemZ/memcpy-02.ll
llvm/test/CodeGen/SystemZ/pie.ll
llvm/test/CodeGen/SystemZ/prefetch-01.ll
llvm/test/CodeGen/SystemZ/spill-01.ll
llvm/test/CodeGen/SystemZ/tls-01.ll

Removed: 




diff  --git a/llvm/test/CodeGen/SystemZ/and-08.ll 
b/llvm/test/CodeGen/SystemZ/and-08.ll
index ad5351fa331f..4b3d83bdb2e2 100644
--- a/llvm/test/CodeGen/SystemZ/and-08.ll
+++ b/llvm/test/CodeGen/SystemZ/and-08.ll
@@ -2,13 +2,13 @@
 ;
 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
 
-@g1src = global i8 1
-@g1dst = global i8 1
-@g2src = global i16 2
-@g2dst = global i16 2
+@g1src = dso_local global i8 1
+@g1dst = dso_local global i8 1
+@g2src = dso_local global i16 2
+@g2dst = dso_local global i16 2
 
 ; Test the simple i8 case.
-define void @f1(i8 *%ptr1) {
+define dso_local void @f1(i8 *%ptr1) {
 ; CHECK-LABEL: f1:
 ; CHECK: nc 1(1,%r2), 0(%r2)
 ; CHECK: br %r14
@@ -21,7 +21,7 @@ define void @f1(i8 *%ptr1) {
 }
 
 ; ...and again in reverse.
-define void @f2(i8 *%ptr1) {
+define dso_local void @f2(i8 *%ptr1) {
 ; CHECK-LABEL: f2:
 ; CHECK: nc 1(1,%r2), 0(%r2)
 ; CHECK: br %r14
@@ -35,7 +35,7 @@ define void @f2(i8 *%ptr1) {
 
 ; Test i8 cases where one value is zero-extended to 32 bits and the other
 ; sign-extended.
-define void @f3(i8 *%ptr1) {
+define dso_local void @f3(i8 *%ptr1) {
 ; CHECK-LABEL: f3:
 ; CHECK: nc 1(1,%r2), 0(%r2)
 ; CHECK: br %r14
@@ -51,7 +51,7 @@ define void @f3(i8 *%ptr1) {
 }
 
 ; ...and again with the extension types reversed.
-define void @f4(i8 *%ptr1) {
+define dso_local void @f4(i8 *%ptr1) {
 ; CHECK-LABEL: f4:
 ; CHECK: nc 1(1,%r2), 0(%r2)
 ; CHECK: br %r14
@@ -67,7 +67,7 @@ define void @f4(i8 *%ptr1) {
 }
 
 ; ...and again with two sign extensions.
-define void @f5(i8 *%ptr1) {
+define dso_local void @f5(i8 *%ptr1) {
 ; CHECK-LABEL: f5:
 ; CHECK: nc 1(1,%r2), 0(%r2)
 ; CHECK: br %r14
@@ -83,7 +83,7 @@ define void @f5(i8 *%ptr1) {
 }
 
 ; ...and again with two zero extensions.
-define void @f6(i8 *%ptr1) {
+define dso_local void @f6(i8 *%ptr1) {
 ; CHECK-LABEL: f6:
 ; CHECK: nc 1(1,%r2), 0(%r2)
 ; CHECK: br %r14
@@ -100,7 +100,7 @@ define void @f6(i8 *%ptr1) {
 
 ; Test i8 cases where the value is extended to 64 bits (just one case
 ; this time).
-define void @f7(i8 *%ptr1) {
+define dso_local void @f7(i8 *%ptr1) {
 ; CHECK-LABEL: f7:
 ; CHECK: nc 1(1,%r2), 0(%r2)
 ; CHECK: br %r14
@@ -116,7 +116,7 @@ define void @f7(i8 *%ptr1) {
 }
 
 ; Test the simple i16 case.
-define void @f8(i16 *%ptr1) {
+define dso_local void @f8(i16 *%ptr1) {
 ; CHECK-LABEL: f8:
 ; CHECK: nc 2(2,%r2), 0(%r2)
 ; CHECK: br %r14
@@ -129,7 +129,7 @@ define void @f8(i16 *%ptr1) {
 }
 
 ; Test i16 cases where the value is extended to 32 bits.
-define void @f9(i16 *%ptr1) {
+define dso_local void @f9(i16 *%ptr1) {
 ; CHECK-LABEL: f9:
 ; CHECK: nc 2(2,%r2), 0(%r2)
 ; CHECK: br %r14
@@ -145,7 +145,7 @@ define void @f9(i16 *%ptr1) {
 }
 
 ; Test i16 cases where the value is extended to 64 bits.
-define void @f10(i16 *%ptr1) {
+define dso_local void @f10(i16 *%ptr1) {
 ; CHECK-LABEL: f10:
 ; CHECK: nc 2(2,%r2), 0(%r2)
 ; CHECK: br %r14
@@ -161,7 +161,7 @@ define void @f10(i16 *%ptr1) {
 }
 
 ; Test the simple i32 case.
-define void @f11(i32 *%ptr1) {
+define dso_local void @f11(i32 *%ptr1) {
 ; CHECK-LABEL: f11:
 ; CHECK: nc 4(4,%r2), 0(%r2)
 ; CHECK: br %r14
@@ -174,7 +174,7 @@ define void @f11(i32 *%ptr1) {
 }
 
 ; Test i32 cases where the value is extended to 64 bits.
-define void @f12(i32 *%ptr1) {
+define dso_local void @f12(i32 *%ptr1) {
 ; CHECK-LABEL: f12:
 ; CHECK: nc 4(4,%r2), 0(%r2)
 ; CHECK: br %r14
@@ -190,7 +190,7 @@ define void @f12(i32 *%ptr1) {
 }
 
 ; Test the i64 case.
-define void @f13(i64 *%ptr1) {
+define dso_local void @f13(i64 *%ptr1) {
 ; CHECK-LABEL: f13:
 ; CHECK: nc 8(8,%r2), 0(%r2)
 ; CHECK: br %r14
@@ -203,7 +203,7 @@ define void @f13(i64 *%ptr1) {
 }
 
 ; Make s

[llvm-branch-commits] [llvm] 7e5508e - [RISCV][test] Add explicit dso_local to definitions in ELF static relocation model tests

[Fangrui Song via llvm-branch-commits]

Author: Fangrui Song
Date: 2020-12-30T15:28:11-08:00
New Revision: 7e5508e6a8a5e6f70634a5631affe646c8836690

URL: 
https://github.com/llvm/llvm-project/commit/7e5508e6a8a5e6f70634a5631affe646c8836690
DIFF: 
https://github.com/llvm/llvm-project/commit/7e5508e6a8a5e6f70634a5631affe646c8836690.diff

LOG: [RISCV][test] Add explicit dso_local to definitions in ELF static 
relocation model tests

Added: 


Modified: 
llvm/test/CodeGen/RISCV/double-mem.ll
llvm/test/CodeGen/RISCV/float-mem.ll
llvm/test/CodeGen/RISCV/fold-addi-loadstore.ll
llvm/test/CodeGen/RISCV/half-mem.ll
llvm/test/CodeGen/RISCV/mem.ll
llvm/test/CodeGen/RISCV/mem64.ll
llvm/test/CodeGen/RISCV/zext-with-load-is-free.ll

Removed: 




diff  --git a/llvm/test/CodeGen/RISCV/double-mem.ll 
b/llvm/test/CodeGen/RISCV/double-mem.ll
index fa6f791b7591..b9302dcfd98e 100644
--- a/llvm/test/CodeGen/RISCV/double-mem.ll
+++ b/llvm/test/CodeGen/RISCV/double-mem.ll
@@ -4,7 +4,7 @@
 ; RUN: llc -mtriple=riscv64 -mattr=+d -verify-machineinstrs < %s \
 ; RUN:   | FileCheck -check-prefix=RV64IFD %s
 
-define double @fld(double *%a) nounwind {
+define dso_local double @fld(double *%a) nounwind {
 ; RV32IFD-LABEL: fld:
 ; RV32IFD:   # %bb.0:
 ; RV32IFD-NEXT:addi sp, sp, -16
@@ -33,7 +33,7 @@ define double @fld(double *%a) nounwind {
   ret double %4
 }
 
-define void @fsd(double *%a, double %b, double %c) nounwind {
+define dso_local void @fsd(double *%a, double %b, double %c) nounwind {
 ; RV32IFD-LABEL: fsd:
 ; RV32IFD:   # %bb.0:
 ; RV32IFD-NEXT:addi sp, sp, -16
@@ -67,9 +67,9 @@ define void @fsd(double *%a, double %b, double %c) nounwind {
 }
 
 ; Check load and store to a global
-@G = global double 0.0
+@G = dso_local global double 0.0
 
-define double @fld_fsd_global(double %a, double %b) nounwind {
+define dso_local double @fld_fsd_global(double %a, double %b) nounwind {
 ; RV32IFD-LABEL: fld_fsd_global:
 ; RV32IFD:   # %bb.0:
 ; RV32IFD-NEXT:addi sp, sp, -16
@@ -117,7 +117,7 @@ define double @fld_fsd_global(double %a, double %b) 
nounwind {
 }
 
 ; Ensure that 1 is added to the high 20 bits if bit 11 of the low part is 1
-define double @fld_fsd_constant(double %a) nounwind {
+define dso_local double @fld_fsd_constant(double %a) nounwind {
 ; RV32IFD-LABEL: fld_fsd_constant:
 ; RV32IFD:   # %bb.0:
 ; RV32IFD-NEXT:addi sp, sp, -16
@@ -154,7 +154,7 @@ define double @fld_fsd_constant(double %a) nounwind {
 
 declare void @notdead(i8*)
 
-define double @fld_stack(double %a) nounwind {
+define dso_local double @fld_stack(double %a) nounwind {
 ; RV32IFD-LABEL: fld_stack:
 ; RV32IFD:   # %bb.0:
 ; RV32IFD-NEXT:addi sp, sp, -32
@@ -198,7 +198,7 @@ define double @fld_stack(double %a) nounwind {
   ret double %4
 }
 
-define void @fsd_stack(double %a, double %b) nounwind {
+define dso_local void @fsd_stack(double %a, double %b) nounwind {
 ; RV32IFD-LABEL: fsd_stack:
 ; RV32IFD:   # %bb.0:
 ; RV32IFD-NEXT:addi sp, sp, -32
@@ -239,7 +239,7 @@ define void @fsd_stack(double %a, double %b) nounwind {
 }
 
 ; Test selection of store, ..
-define void @fsd_trunc(float* %a, double %b) nounwind noinline optnone {
+define dso_local void @fsd_trunc(float* %a, double %b) nounwind noinline 
optnone {
 ; RV32IFD-LABEL: fsd_trunc:
 ; RV32IFD:   # %bb.0:
 ; RV32IFD-NEXT:addi sp, sp, -16

diff  --git a/llvm/test/CodeGen/RISCV/float-mem.ll 
b/llvm/test/CodeGen/RISCV/float-mem.ll
index c609f6c0a88f..2d47fc8776fb 100644
--- a/llvm/test/CodeGen/RISCV/float-mem.ll
+++ b/llvm/test/CodeGen/RISCV/float-mem.ll
@@ -4,7 +4,7 @@
 ; RUN: llc -mtriple=riscv64 -mattr=+f -verify-machineinstrs < %s \
 ; RUN:   | FileCheck -check-prefix=RV64IF %s
 
-define float @flw(float *%a) nounwind {
+define dso_local float @flw(float *%a) nounwind {
 ; RV32IF-LABEL: flw:
 ; RV32IF:   # %bb.0:
 ; RV32IF-NEXT:flw ft0, 0(a0)
@@ -29,7 +29,7 @@ define float @flw(float *%a) nounwind {
   ret float %4
 }
 
-define void @fsw(float *%a, float %b, float %c) nounwind {
+define dso_local void @fsw(float *%a, float %b, float %c) nounwind {
 ; Use %b and %c in an FP op to ensure floating point registers are used, even
 ; for the soft float ABI
 ; RV32IF-LABEL: fsw:
@@ -57,9 +57,9 @@ define void @fsw(float *%a, float %b, float %c) nounwind {
 }
 
 ; Check load and store to a global
-@G = global float 0.0
+@G = dso_local global float 0.0
 
-define float @flw_fsw_global(float %a, float %b) nounwind {
+define dso_local float @flw_fsw_global(float %a, float %b) nounwind {
 ; Use %a and %b in an FP op to ensure floating point registers are used, even
 ; for the soft float ABI
 ; RV32IF-LABEL: flw_fsw_global:
@@ -99,7 +99,7 @@ define float @flw_fsw_global(float %a, float %b) nounwind {
 }
 
 ; Ensure that 1 is added to the high 20 bits if bit 11 of the low part is 1
-define float @flw_fsw_constant(float %a) nounwind {
+define dso_local float @flw_fsw_constant

[llvm-branch-commits] [llvm] a14c955 - [ORC] Remove some stale debugging output.

[Lang Hames via llvm-branch-commits]

Author: Lang Hames
Date: 2020-12-31T10:34:38+11:00
New Revision: a14c955af8602e450d75f4049eaa153387961ae1

URL: 
https://github.com/llvm/llvm-project/commit/a14c955af8602e450d75f4049eaa153387961ae1
DIFF: 
https://github.com/llvm/llvm-project/commit/a14c955af8602e450d75f4049eaa153387961ae1.diff

LOG: [ORC] Remove some stale debugging output.

Added: 


Modified: 
llvm/include/llvm/ExecutionEngine/Orc/Shared/FDRawByteChannel.h

Removed: 




diff  --git a/llvm/include/llvm/ExecutionEngine/Orc/Shared/FDRawByteChannel.h 
b/llvm/include/llvm/ExecutionEngine/Orc/Shared/FDRawByteChannel.h
index f90b71db108b..3f96fe3da49d 100644
--- a/llvm/include/llvm/ExecutionEngine/Orc/Shared/FDRawByteChannel.h
+++ b/llvm/include/llvm/ExecutionEngine/Orc/Shared/FDRawByteChannel.h
@@ -15,9 +15,6 @@
 
 #include "llvm/ExecutionEngine/Orc/Shared/RawByteChannel.h"
 
-#include "llvm/Support/FormatVariadic.h"
-#include "llvm/Support/raw_ostream.h"
-
 #if !defined(_MSC_VER) && !defined(__MINGW32__)
 #include 
 #else
@@ -34,13 +31,11 @@ class FDRawByteChannel final : public RawByteChannel {
   FDRawByteChannel(int InFD, int OutFD) : InFD(InFD), OutFD(OutFD) {}
 
   llvm::Error readBytes(char *Dst, unsigned Size) override {
-// dbgs() << "Reading " << Size << " bytes: [";
 assert(Dst && "Attempt to read into null.");
 ssize_t Completed = 0;
 while (Completed < static_cast(Size)) {
   ssize_t Read = ::read(InFD, Dst + Completed, Size - Completed);
   if (Read <= 0) {
-// dbgs() << " <<<\n";
 auto ErrNo = errno;
 if (ErrNo == EAGAIN || ErrNo == EINTR)
   continue;
@@ -48,22 +43,17 @@ class FDRawByteChannel final : public RawByteChannel {
   return llvm::errorCodeToError(
   std::error_code(errno, std::generic_category()));
   }
-  // for (size_t I = 0; I != Read; ++I)
-  //  dbgs() << " " << formatv("{0:x2}", Dst[Completed + I]);
   Completed += Read;
 }
-// dbgs() << " ]\n";
 return llvm::Error::success();
   }
 
   llvm::Error appendBytes(const char *Src, unsigned Size) override {
-// dbgs() << "Appending " << Size << " bytes: [";
 assert(Src && "Attempt to append from null.");
 ssize_t Completed = 0;
 while (Completed < static_cast(Size)) {
   ssize_t Written = ::write(OutFD, Src + Completed, Size - Completed);
   if (Written < 0) {
-// dbgs() << " <<<\n";
 auto ErrNo = errno;
 if (ErrNo == EAGAIN || ErrNo == EINTR)
   continue;
@@ -71,11 +61,8 @@ class FDRawByteChannel final : public RawByteChannel {
   return llvm::errorCodeToError(
   std::error_code(errno, std::generic_category()));
   }
-  // for (size_t I = 0; I != Written; ++I)
-  //  dbgs() << " " << formatv("{0:x2}", Src[Completed + I]);
   Completed += Written;
 }
-// dbgs() << " ]\n";
 return llvm::Error::success();
   }
 



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[llvm-branch-commits] [llvm] a964e0f - [test] Add explicit dso_local to definitions in ELF static relocation model tests

[Fangrui Song via llvm-branch-commits]

Author: Fangrui Song
Date: 2020-12-30T15:47:16-08:00
New Revision: a964e0f085000dc90c6175f21ac455263ed76d68

URL: 
https://github.com/llvm/llvm-project/commit/a964e0f085000dc90c6175f21ac455263ed76d68
DIFF: 
https://github.com/llvm/llvm-project/commit/a964e0f085000dc90c6175f21ac455263ed76d68.diff

LOG: [test] Add explicit dso_local to definitions in ELF static relocation 
model tests

Added: 
llvm/test/CodeGen/Mips/tls-static.ll

Modified: 
llvm/test/CodeGen/Hexagon/tls_static.ll
llvm/test/CodeGen/Mips/tls.ll
llvm/test/CodeGen/PowerPC/dsolocal-static.ll
llvm/test/CodeGen/Thumb2/tls1.ll
llvm/test/CodeGen/WebAssembly/offset-folding.ll
llvm/test/CodeGen/XCore/codemodel.ll
llvm/test/DebugInfo/X86/debug-loc-frame.ll
llvm/test/DebugInfo/X86/live-debug-values.ll
llvm/test/DebugInfo/X86/machinecse-wrongdebug-hoist.ll
llvm/test/MC/AArch64/elf-globaladdress.ll
llvm/test/MC/X86/intel-syntax-var-offset.ll

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/aarch64_generated_funcs.ll

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/aarch64_generated_funcs.ll.generated.expected

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/aarch64_generated_funcs.ll.nogenerated.expected

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_generated_funcs.ll

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_generated_funcs.ll.generated.expected

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_generated_funcs.ll.nogenerated.expected

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/arm_generated_funcs.ll

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/arm_generated_funcs.ll.generated.expected

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/arm_generated_funcs.ll.nogenerated.expected

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/hexagon_generated_funcs.ll

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/hexagon_generated_funcs.ll.generated.expected

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/hexagon_generated_funcs.ll.nogenerated.expected

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/lanai_generated_funcs.ll

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/lanai_generated_funcs.ll.generated.expected

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/lanai_generated_funcs.ll.nogenerated.expected

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/mips_generated_funcs.ll

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/mips_generated_funcs.ll.generated.expected

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/mips_generated_funcs.ll.nogenerated.expected

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/msp430_generated_funcs.ll

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/msp430_generated_funcs.ll.generated.expected

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/msp430_generated_funcs.ll.nogenerated.expected

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ppc_generated_funcs.ll

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ppc_generated_funcs.ll.generated.expected

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ppc_generated_funcs.ll.nogenerated.expected

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/sparc_generated_funcs.ll

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/sparc_generated_funcs.ll.generated.expected

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/sparc_generated_funcs.ll.nogenerated.expected

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/systemz_generated_funcs.ll

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/systemz_generated_funcs.ll.generated.expected

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/systemz_generated_funcs.ll.nogenerated.expected

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/wasm_generated_funcs.ll

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/wasm_generated_funcs.ll.generated.expected

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/wasm_generated_funcs.ll.nogenerated.expected

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86_generated_funcs.ll

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86_generated_funcs.ll.generated.expected

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86_generated_funcs.ll.nogenerated.expected

Removed: 




diff  --git a/llvm/test/CodeGen/Hexagon/tls_static.ll 
b/llvm/test/CodeGen/Hexagon/tls_static.ll
index f4e882b4ff28..

[llvm-branch-commits] [llvm] f731839 - [LowerEmuTls] Copy dso_local from to __emutls_v.

[Fangrui Song via llvm-branch-commits]

Author: Fangrui Song
Date: 2020-12-30T16:11:32-08:00
New Revision: f73183958482602c4588b0f4a1c3a096e7542947

URL: 
https://github.com/llvm/llvm-project/commit/f73183958482602c4588b0f4a1c3a096e7542947
DIFF: 
https://github.com/llvm/llvm-project/commit/f73183958482602c4588b0f4a1c3a096e7542947.diff

LOG: [LowerEmuTls] Copy dso_local from  to __emutls_v.

This effect is not testable until we drop the implied dso_local for ELF
static/PIE defined symbols from TargetMachine::shouldAssumeDSOLocal.

Added: 


Modified: 
llvm/lib/CodeGen/LowerEmuTLS.cpp

Removed: 




diff  --git a/llvm/lib/CodeGen/LowerEmuTLS.cpp 
b/llvm/lib/CodeGen/LowerEmuTLS.cpp
index 0afdee45cda7..a06d1d6255c7 100644
--- a/llvm/lib/CodeGen/LowerEmuTLS.cpp
+++ b/llvm/lib/CodeGen/LowerEmuTLS.cpp
@@ -44,6 +44,7 @@ class LowerEmuTLS : public ModulePass {
 GlobalVariable *to) {
 to->setLinkage(from->getLinkage());
 to->setVisibility(from->getVisibility());
+to->setDSOLocal(from->isDSOLocal());
 if (from->hasComdat()) {
   to->setComdat(M.getOrInsertComdat(to->getName()));
   to->getComdat()->setSelectionKind(from->getComdat()->getSelectionKind());



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[llvm-branch-commits] [llvm] bf1160c - [test] Add explicit dso_local to definitions in ELF static relocation model tests

[Fangrui Song via llvm-branch-commits]

Author: Fangrui Song
Date: 2020-12-30T16:52:23-08:00
New Revision: bf1160c1d6b23bd5290584b158ea204adb41b7d0

URL: 
https://github.com/llvm/llvm-project/commit/bf1160c1d6b23bd5290584b158ea204adb41b7d0
DIFF: 
https://github.com/llvm/llvm-project/commit/bf1160c1d6b23bd5290584b158ea204adb41b7d0.diff

LOG: [test] Add explicit dso_local to definitions in ELF static relocation 
model tests

Added: 


Modified: 
llvm/test/CodeGen/ARM/fast-isel-intrinsic.ll
llvm/test/CodeGen/PowerPC/dsolocal-static.ll
llvm/test/CodeGen/X86/avx512-regcall-NoMask.ll

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/aarch64_generated_funcs.ll

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/aarch64_generated_funcs.ll.generated.expected

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/aarch64_generated_funcs.ll.nogenerated.expected

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/on_the_fly_arg_change.ll

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/on_the_fly_arg_change.ll.expected

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/systemz_generated_funcs.ll

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/systemz_generated_funcs.ll.generated.expected

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/systemz_generated_funcs.ll.nogenerated.expected

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86_generated_funcs.ll

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86_generated_funcs.ll.generated.expected

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/x86_generated_funcs.ll.nogenerated.expected

Removed: 




diff  --git a/llvm/test/CodeGen/ARM/fast-isel-intrinsic.ll 
b/llvm/test/CodeGen/ARM/fast-isel-intrinsic.ll
index bda4c6d47237..e8ac7b6bbf5e 100644
--- a/llvm/test/CodeGen/ARM/fast-isel-intrinsic.ll
+++ b/llvm/test/CodeGen/ARM/fast-isel-intrinsic.ll
@@ -56,12 +56,14 @@ define void @t2() nounwind ssp {
 ; ARM-MACHO: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr r0, .LCPI)}}
 ; ARM-MACHO: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}}
 ; ARM-MACHO: ldr [[REG1:r[0-9]+]], [r0]
+; ARM-MACHO:  add r0, [[REG1]], #4
+; ARM-MACHO-NEXT: add r1, [[REG1]], #16
 
 ; ARM-ELF: movw [[REG1:r[0-9]+]], :lower16:temp
 ; ARM-ELF: movt [[REG1]], :upper16:temp
+; ARM-ELF:  add r0, [[REG1]], #4
+; ARM-ELF-NEXT: add r1, [[REG1]], #16
 
-; ARM: add r0, [[REG1]], #4
-; ARM: add r1, [[REG1]], #16
 ; ARM: movw r2, #17
 ; ARM: bl {{_?}}memcpy
 ; ARM-LONG-LABEL: t2:
@@ -99,13 +101,14 @@ define void @t3() nounwind ssp {
 ; ARM-MACHO: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr r0, .LCPI)}}
 ; ARM-MACHO: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}}
 ; ARM-MACHO: ldr [[REG0:r[0-9]+]], [r0]
+; ARM-MACHO:  add r0, [[REG0]], #4
+; ARM-MACHO-NEXT: add r1, [[REG0]], #16
 
 ; ARM-ELF: movw [[REG0:r[0-9]+]], :lower16:temp
 ; ARM-ELF: movt [[REG0]], :upper16:temp
+; ARM-ELF:  add r0, [[REG0]], #4
+; ARM-ELF-NEXT: add r1, r1, #16
 
-
-; ARM: add r0, [[REG0]], #4
-; ARM: add r1, [[REG0]], #16
 ; ARM: movw r2, #10
 ; ARM: bl {{_?}}memmove
 ; ARM-LONG-LABEL: t3:
@@ -140,17 +143,17 @@ define void @t4() nounwind ssp {
 
 ; ARM-MACHO: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr r0, .LCPI)}}
 ; ARM-MACHO: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}}
-; ARM-MACHO: ldr [[REG0:r[0-9]+]], [r0]
+; ARM-MACHO:  ldr [[REG0:r[0-9]+]], [r0]
+; ARM-MACHO-NEXT: ldr [[REG1:r[0-9]+]], {{\[}}[[REG0]], #16]
+; ARM-MACHO-NEXT: str [[REG1]], {{\[}}[[REG0]], #4]
+; ARM-MACHO-NEXT: ldr [[REG2:r[0-9]+]], {{\[}}[[REG0]], #20]
+; ARM-MACHO-NEXT: str [[REG2]], {{\[}}[[REG0]], #8]
+; ARM-MACHO-NEXT: ldrh [[REG3:r[0-9]+]], {{\[}}[[REG0]], #24]
+; ARM-MACHO-NEXT: strh [[REG3]], {{\[}}[[REG0]], #12]
 
 ; ARM-ELF: movw [[REG0:r[0-9]+]], :lower16:temp
 ; ARM-ELF: movt [[REG0]], :upper16:temp
 
-; ARM: ldr [[REG1:r[0-9]+]], {{\[}}[[REG0]], #16]
-; ARM: str [[REG1]], {{\[}}[[REG0]], #4]
-; ARM: ldr [[REG2:r[0-9]+]], {{\[}}[[REG0]], #20]
-; ARM: str [[REG2]], {{\[}}[[REG0]], #8]
-; ARM: ldrh [[REG3:r[0-9]+]], {{\[}}[[REG0]], #24]
-; ARM: strh [[REG3]], {{\[}}[[REG0]], #12]
 ; ARM: bx lr
 ; THUMB-LABEL: t4:
 ; THUMB: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr.n r0, .LCPI)}}
@@ -175,20 +178,20 @@ define void @t5() nounwind ssp {
 ; ARM-MACHO: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr r0, .LCPI)}}
 ; ARM-MACHO: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}}
 ; ARM-MACHO: ldr [[REG0:r[0-9]+]], [r0]
+; ARM-MACHO: ldrh [[REG1:r[0-9]+]], {{\[}}[[REG0]], #16]
+; ARM-MACHO-NEXT: strh [[REG1]], {{\[}}[[REG0]], #4]
+; ARM-MACHO-NEXT: ldrh [[REG2:r[0-9]+]], {{\[}}[[REG0]], #18]
+; ARM-MACHO-NEXT: strh [[REG2]], {{\[}}[[REG0]], #6]
+; ARM-MACHO-NEXT: ldrh [[REG3:r[0-9]+]], {{\[}}[[REG0]], #20]
+; ARM-MACHO-NEXT: strh [[REG3]], {{\[}}[[REG0]], #8]
+; ARM-MACHO-NEXT: ldrh [[REG4

[llvm-branch-commits] [llvm] 2047c10 - [TargetMachine] Drop implied dso_local for definitions in ELF static relocation model/PIE

[Fangrui Song via llvm-branch-commits]

Author: Fangrui Song
Date: 2020-12-30T16:57:50-08:00
New Revision: 2047c10c22b07157a7e2779d6603512e9113

URL: 
https://github.com/llvm/llvm-project/commit/2047c10c22b07157a7e2779d6603512e9113
DIFF: 
https://github.com/llvm/llvm-project/commit/2047c10c22b07157a7e2779d6603512e9113.diff

LOG: [TargetMachine] Drop implied dso_local for definitions in ELF static 
relocation model/PIE

TargetMachine::shouldAssumeDSOLocal currently implies dso_local for such 
definitions.

Since clang -fno-pic add the dso_local specifier, we don't need to special case.

Added: 


Modified: 
llvm/lib/Target/TargetMachine.cpp
llvm/test/CodeGen/ARM/fast-isel-intrinsic.ll
llvm/test/CodeGen/PowerPC/dsolocal-static.ll
llvm/test/CodeGen/X86/linux-preemption.ll

Removed: 




diff  --git a/llvm/lib/Target/TargetMachine.cpp 
b/llvm/lib/Target/TargetMachine.cpp
index b45b8e354b3a..da295a8a3de9 100644
--- a/llvm/lib/Target/TargetMachine.cpp
+++ b/llvm/lib/Target/TargetMachine.cpp
@@ -156,16 +156,6 @@ bool TargetMachine::shouldAssumeDSOLocal(const Module &M,
 
   assert(TT.isOSBinFormatELF() || TT.isOSBinFormatWasm());
   assert(RM != Reloc::DynamicNoPIC);
-
-  bool IsExecutable =
-  RM == Reloc::Static || M.getPIELevel() != PIELevel::Default;
-  if (IsExecutable) {
-// If the symbol is defined, it cannot be preempted.
-if (!GV->isDeclarationForLinker())
-  return true;
-  }
-
-  // ELF & wasm support preemption of other symbols.
   return false;
 }
 

diff  --git a/llvm/test/CodeGen/ARM/fast-isel-intrinsic.ll 
b/llvm/test/CodeGen/ARM/fast-isel-intrinsic.ll
index e8ac7b6bbf5e..e739d94cd9ab 100644
--- a/llvm/test/CodeGen/ARM/fast-isel-intrinsic.ll
+++ b/llvm/test/CodeGen/ARM/fast-isel-intrinsic.ll
@@ -61,8 +61,8 @@ define void @t2() nounwind ssp {
 
 ; ARM-ELF: movw [[REG1:r[0-9]+]], :lower16:temp
 ; ARM-ELF: movt [[REG1]], :upper16:temp
-; ARM-ELF:  add r0, [[REG1]], #4
-; ARM-ELF-NEXT: add r1, [[REG1]], #16
+; ARM-ELF:  add [[REG1]], r1, #4
+; ARM-ELF-NEXT: add r1, r1, #16
 
 ; ARM: movw r2, #17
 ; ARM: bl {{_?}}memcpy
@@ -106,7 +106,7 @@ define void @t3() nounwind ssp {
 
 ; ARM-ELF: movw [[REG0:r[0-9]+]], :lower16:temp
 ; ARM-ELF: movt [[REG0]], :upper16:temp
-; ARM-ELF:  add r0, [[REG0]], #4
+; ARM-ELF:  add [[REG0]], r1, #4
 ; ARM-ELF-NEXT: add r1, r1, #16
 
 ; ARM: movw r2, #10

diff  --git a/llvm/test/CodeGen/PowerPC/dsolocal-static.ll 
b/llvm/test/CodeGen/PowerPC/dsolocal-static.ll
index a4ef632f6877..e5002cc59b30 100644
--- a/llvm/test/CodeGen/PowerPC/dsolocal-static.ll
+++ b/llvm/test/CodeGen/PowerPC/dsolocal-static.ll
@@ -3,8 +3,8 @@
 @default = global i32 55
 define dso_local i32* @get_default_global() {
 ; CHECK-LABEL: get_default_global:
-; CHECK: addis 3, 2, default@toc@ha
-; CHECK-NEXT:addi 3, 3, default@toc@l
+; CHECK: addis 3, 2, .LC{{.*}}@toc@ha
+; CHECK-NEXT:ld 3, .LC{{.*}}@toc@l(3)
 ; CHECK-NEXT:blr
   ret i32* @default
 }
@@ -21,8 +21,8 @@ define dso_local i32* @get_local_global() {
 @preemptable_global = dso_preemptable global i32 42
 define dso_local i32* @get_preemptable_global() {
 ; CHECK-LABEL: get_preemptable_global:
-; CHECK: addis 3, 2, preemptable_global@toc@ha
-; CHECK-NEXT:addi 3, 3, preemptable_global@toc@l
+; CHECK: addis 3, 2, .LC{{.*}}@toc@ha
+; CHECK-NEXT:ld 3, .LC{{.*}}@toc@l(3)
 ; CHECK-NEXT:blr
   ret i32* @preemptable_global
 }
@@ -63,8 +63,7 @@ define signext i32 @default_function(i32 %i) {
 define dso_local signext i32 @default_function_caller(i32 %i) {
 ; CHECK-LABEL: default_function_caller:
 ; CHECK: bl default_function
-; CHECK-NOT: nop
-; CHECK: blr
+; CHECK-NEXT:nop
   %call = notail call signext i32 @default_function(i32 signext %i)
   ret i32 %call
 }
@@ -87,8 +86,7 @@ define dso_preemptable signext i32 @preemptable_function(i32 
%i) {
 define dso_local signext i32 @preemptable_function_caller(i32 %i) {
 ; CHECK-LABEL: preemptable_function_caller:
 ; CHECK: bl preemptable_function
-; CHECK-NOT: nop
-; CHECK: blr
+; CHECK-NEXT:nop
   %call = notail call signext i32 @preemptable_function(i32 signext %i)
   ret i32 %call
 }

diff  --git a/llvm/test/CodeGen/X86/linux-preemption.ll 
b/llvm/test/CodeGen/X86/linux-preemption.ll
index 4739e6cec011..eae14f98cf0d 100644
--- a/llvm/test/CodeGen/X86/linux-preemption.ll
+++ b/llvm/test/CodeGen/X86/linux-preemption.ll
@@ -17,7 +17,7 @@ define i32* @get_strong_default_global() {
   ret i32* @strong_default_global
 }
 ; CHECK: movq strong_default_global@GOTPCREL(%rip), %rax
-; STATIC: movl $strong_default_global, %eax
+; STATIC: movq strong_default_global@GOTPCREL(%rip), %rax
 ; CHECK32: movl strong_default_global@GOT(%eax), %eax
 
 @strong_hidden_global = hidden global i32 42
@@ -33,7 +33,7 @@ define i32* @get_weak_default_global() {
   ret i32* @weak_default_global
 }
 ; CHECK: movq weak_default_global@GO

[llvm-branch-commits] [llvm] 52aa4e2 - [ThinLTO][test] Add visibility related tests

[Fangrui Song via llvm-branch-commits]

Author: Fangrui Song
Date: 2020-12-30T16:58:20-08:00
New Revision: 52aa4e210744361a5ed6dc50fef78ed91706e508

URL: 
https://github.com/llvm/llvm-project/commit/52aa4e210744361a5ed6dc50fef78ed91706e508
DIFF: 
https://github.com/llvm/llvm-project/commit/52aa4e210744361a5ed6dc50fef78ed91706e508.diff

LOG: [ThinLTO][test] Add visibility related tests

Reviewed By: tejohnson

Differential Revision: https://reviews.llvm.org/D92899

Added: 
llvm/test/ThinLTO/X86/visibility-elf.ll
llvm/test/ThinLTO/X86/visibility-macho.ll

Modified: 


Removed: 




diff  --git a/llvm/test/ThinLTO/X86/visibility-elf.ll 
b/llvm/test/ThinLTO/X86/visibility-elf.ll
new file mode 100644
index ..8b2e36afcac6
--- /dev/null
+++ b/llvm/test/ThinLTO/X86/visibility-elf.ll
@@ -0,0 +1,137 @@
+; RUN: split-file %s %t
+; RUN: opt -module-summary %t/a.ll -o %ta.bc
+; RUN: opt -module-summary %t/b.ll -o %tb.bc
+
+;; Test visibility propagation. The prevailing definitions are all from %tb.bc.
+; RUN: llvm-lto2 run -save-temps -o %t1.bc %ta.bc %tb.bc \
+; RUN:   -r=%ta.bc,var1,l -r=%ta.bc,var2,l \
+; RUN:   -r=%ta.bc,hidden_def_weak_def,l -r=%ta.bc,protected_def_weak_def,l 
-r=%ta.bc,protected_def_weak_hidden_def,l \
+; RUN:   -r=%ta.bc,protected_def_hidden_ref,l -r=%ta.bc,not_imported,l 
-r=%ta.bc,hidden_def_ref,l \
+; RUN:   -r=%ta.bc,hidden_def_weak_ref,l \
+; RUN:   -r=%ta.bc,ext, -r=%ta.bc,main,plx \
+; RUN:   -r=%tb.bc,var1,plx -r=%tb.bc,var2,plx \
+; RUN:   -r=%tb.bc,hidden_def_weak_def,pl -r=%tb.bc,protected_def_weak_def,pl 
-r=%tb.bc,protected_def_weak_hidden_def,pl \
+; RUN:   -r=%tb.bc,protected_def_hidden_ref,pl -r=%tb.bc,not_imported,pl 
-r=%tb.bc,hidden_def_ref,pl \
+; RUN:   -r=%tb.bc,hidden_def_weak_ref,pl
+; RUN: llvm-dis < %t1.bc.1.3.import.bc | FileCheck %s
+
+;; %tb.bc does not import anything, so we just check 1.promote.
+; RUN: llvm-dis < %t1.bc.2.1.promote.bc | FileCheck %s --check-prefix=CHECK2
+
+;--- a.ll
+target datalayout = 
"e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-linux-gnu"
+
+; CHECK:  @var1 = external global i32, align 4
+; CHECK-NEXT: @var2 = available_externally hidden global i32 1, align 4
+
+@var1 = weak global i32 1, align 4
+@var2 = extern_weak global i32
+
+declare void @ext(void ()*)
+
+; CHECK: declare i32 @hidden_def_weak_def()
+; CHECK: declare void @protected_def_weak_def()
+; CHECK: declare hidden void @protected_def_weak_hidden_def()
+;; Currently the visibility is not propagated onto an unimported function,
+;; because we don't have summaries for declarations.
+; CHECK: declare extern_weak void @not_imported()
+; CHECK: define available_externally hidden void @hidden_def_ref() 
!thinlto_src_module !0
+; CHECK: define available_externally hidden void @hidden_def_weak_ref() 
!thinlto_src_module !0
+;; This can be hidden, but we cannot communicate the declaration's visibility
+;; to other modules because declarations don't have summaries, and the IRLinker
+;; overrides it when importing the protected def.
+; CHECK: define available_externally protected void 
@protected_def_hidden_ref() !thinlto_src_module !0
+
+; CHECK2: define hidden i32 @hidden_def_weak_def()
+; CHECK2: define protected void @protected_def_weak_def()
+; CHECK2: define protected void @protected_def_weak_hidden_def()
+; CHECK2: define hidden void @hidden_def_ref()
+; CHECK2: define hidden void @hidden_def_weak_ref()
+; CHECK2: define protected void @protected_def_hidden_ref()
+; CHECK2: define hidden void @not_imported()
+
+define weak i32 @hidden_def_weak_def() {
+entry:
+  %0 = load i32, i32* @var2
+  ret i32 %0
+}
+
+define weak void @protected_def_weak_def() {
+entry:
+  ret void
+}
+
+define weak hidden void @protected_def_weak_hidden_def() {
+entry:
+  ret void
+}
+
+declare extern_weak void @not_imported()
+
+declare void @hidden_def_ref()
+declare extern_weak void @hidden_def_weak_ref()
+declare hidden void @protected_def_hidden_ref()
+
+define i32 @main() {
+entry:
+  call void @ext(void ()* bitcast (i32 ()* @hidden_def_weak_def to void ()*))
+  call void @ext(void ()* @protected_def_weak_def)
+  call void @ext(void ()* @protected_def_weak_hidden_def)
+  call void @ext(void ()* @hidden_def_ref)
+  call void @ext(void ()* @hidden_def_weak_ref)
+  call void @ext(void ()* @protected_def_hidden_ref)
+  call void @ext(void ()* @not_imported)
+
+  ;; Calls ensure the functions are imported.
+  call i32 @hidden_def_weak_def()
+  call void @protected_def_weak_def()
+  call void @protected_def_weak_hidden_def()
+  call void @hidden_def_ref()
+  call void @hidden_def_weak_ref()
+  call void @protected_def_hidden_ref()
+  ret i32 0
+}
+
+;--- b.ll
+target datalayout = 
"e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-linux-gnu"
+
+@var1 = hidden global i32 1, align 4
+@var2 = hidden global i32 1, align 4
+
+defi

[llvm-branch-commits] [llvm] 331c28f - [ARM] Declare Op within an if statement (NFC)

[Kazu Hirata via llvm-branch-commits]

Author: Kazu Hirata
Date: 2020-12-30T17:45:36-08:00
New Revision: 331c28f60dbbb09136c2e86e8a4ed8d066f2d271

URL: 
https://github.com/llvm/llvm-project/commit/331c28f60dbbb09136c2e86e8a4ed8d066f2d271
DIFF: 
https://github.com/llvm/llvm-project/commit/331c28f60dbbb09136c2e86e8a4ed8d066f2d271.diff

LOG: [ARM] Declare Op within an if statement (NFC)

Added: 


Modified: 
llvm/lib/Target/ARM/MVEGatherScatterLowering.cpp

Removed: 




diff  --git a/llvm/lib/Target/ARM/MVEGatherScatterLowering.cpp 
b/llvm/lib/Target/ARM/MVEGatherScatterLowering.cpp
index f36b34115703..b33e98e8f1ca 100644
--- a/llvm/lib/Target/ARM/MVEGatherScatterLowering.cpp
+++ b/llvm/lib/Target/ARM/MVEGatherScatterLowering.cpp
@@ -939,11 +939,10 @@ bool MVEGatherScatterLowering::optimiseOffsets(Value 
*Offsets, BasicBlock *BB,
 return false;
 
   // The phi must be an induction variable
-  Instruction *Op;
   int IncrementingBlock = -1;
 
   for (int i = 0; i < 2; i++)
-if ((Op = dyn_cast(Phi->getIncomingValue(i))) != nullptr)
+if (auto *Op = dyn_cast(Phi->getIncomingValue(i)))
   if (Op->getOpcode() == Instruction::Add &&
   (Op->getOperand(0) == Phi || Op->getOperand(1) == Phi))
 IncrementingBlock = i;



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[llvm-branch-commits] [llvm] 95ea865 - [PGO] Use isa instead of dyn_cast (NFC)

[Kazu Hirata via llvm-branch-commits]

Author: Kazu Hirata
Date: 2020-12-30T17:45:38-08:00
New Revision: 95ea86587c54240b3f1b7ed5a18d2f3660cb7573

URL: 
https://github.com/llvm/llvm-project/commit/95ea86587c54240b3f1b7ed5a18d2f3660cb7573
DIFF: 
https://github.com/llvm/llvm-project/commit/95ea86587c54240b3f1b7ed5a18d2f3660cb7573.diff

LOG: [PGO] Use isa instead of dyn_cast (NFC)

Added: 


Modified: 
llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
llvm/lib/Transforms/Instrumentation/PGOMemOPSizeOpt.cpp

Removed: 




diff  --git a/llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp 
b/llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
index 480de5483358..9efc7d1ac500 100644
--- a/llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
+++ b/llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
@@ -269,7 +269,7 @@ class PGOCounterPromoter {
 // FIXME: add other heuristics to detect long running loops.
 if (SkipRetExitBlock) {
   for (auto BB : ExitBlocks)
-if (dyn_cast(BB->getTerminator()) != nullptr)
+if (isa(BB->getTerminator()))
   return false;
 }
 

diff  --git a/llvm/lib/Transforms/Instrumentation/PGOMemOPSizeOpt.cpp 
b/llvm/lib/Transforms/Instrumentation/PGOMemOPSizeOpt.cpp
index 7acbdb9f55b7..55a93b6152dc 100644
--- a/llvm/lib/Transforms/Instrumentation/PGOMemOPSizeOpt.cpp
+++ b/llvm/lib/Transforms/Instrumentation/PGOMemOPSizeOpt.cpp
@@ -254,7 +254,7 @@ class MemOPSizeOpt : public InstVisitor {
 LibFunc Func;
 if (TLI.getLibFunc(CI, Func) &&
 (Func == LibFunc_memcmp || Func == LibFunc_bcmp) &&
-!dyn_cast(CI.getArgOperand(2))) {
+!isa(CI.getArgOperand(2))) {
   WorkList.push_back(MemOp(&CI));
 }
   }



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[llvm-branch-commits] [llvm] a87c700 - [Analysis] Remove unused code recursivelySimplifyInstruction (NFC)

[Kazu Hirata via llvm-branch-commits]

Author: Kazu Hirata
Date: 2020-12-30T17:45:40-08:00
New Revision: a87c7003ac260424092e5ee8bcb0059e39cd2db0

URL: 
https://github.com/llvm/llvm-project/commit/a87c7003ac260424092e5ee8bcb0059e39cd2db0
DIFF: 
https://github.com/llvm/llvm-project/commit/a87c7003ac260424092e5ee8bcb0059e39cd2db0.diff

LOG: [Analysis] Remove unused code recursivelySimplifyInstruction (NFC)

The last use of the function, located in RemovePredecessorAndSimplify,
was removed on Dec 25, 2020 in commit
46bea9b29714ba77010612b04ba13aff56d62e7b.

The last use of RemovePredecessorAndSimplify was removed on Sep 29,
2010 in commit 99c985c37dd45dd0fbd03863037d8e93153783e6.

Added: 


Modified: 
llvm/include/llvm/Analysis/InstructionSimplify.h
llvm/lib/Analysis/InstructionSimplify.cpp

Removed: 




diff  --git a/llvm/include/llvm/Analysis/InstructionSimplify.h 
b/llvm/include/llvm/Analysis/InstructionSimplify.h
index a4cee8b29d9e..17d6f30a35cb 100644
--- a/llvm/include/llvm/Analysis/InstructionSimplify.h
+++ b/llvm/include/llvm/Analysis/InstructionSimplify.h
@@ -313,17 +313,6 @@ bool replaceAndRecursivelySimplify(
 const DominatorTree *DT = nullptr, AssumptionCache *AC = nullptr,
 SmallSetVector *UnsimplifiedUsers = nullptr);
 
-/// Recursively attempt to simplify an instruction.
-///
-/// This routine uses SimplifyInstruction to simplify 'I', and if successful
-/// replaces uses of 'I' with the simplified value. It then recurses on each
-/// of the users impacted. It returns true if any simplifications were
-/// performed.
-bool recursivelySimplifyInstruction(Instruction *I,
-const TargetLibraryInfo *TLI = nullptr,
-const DominatorTree *DT = nullptr,
-AssumptionCache *AC = nullptr);
-
 // These helper functions return a SimplifyQuery structure that contains as
 // many of the optional analysis we use as are currently valid.  This is the
 // strongly preferred way of constructing SimplifyQuery in passes.

diff  --git a/llvm/lib/Analysis/InstructionSimplify.cpp 
b/llvm/lib/Analysis/InstructionSimplify.cpp
index 30c7ecff7940..9fed2600b3ab 100644
--- a/llvm/lib/Analysis/InstructionSimplify.cpp
+++ b/llvm/lib/Analysis/InstructionSimplify.cpp
@@ -5951,13 +5951,6 @@ static bool replaceAndRecursivelySimplifyImpl(
   return Simplified;
 }
 
-bool llvm::recursivelySimplifyInstruction(Instruction *I,
-  const TargetLibraryInfo *TLI,
-  const DominatorTree *DT,
-  AssumptionCache *AC) {
-  return replaceAndRecursivelySimplifyImpl(I, nullptr, TLI, DT, AC, nullptr);
-}
-
 bool llvm::replaceAndRecursivelySimplify(
 Instruction *I, Value *SimpleV, const TargetLibraryInfo *TLI,
 const DominatorTree *DT, AssumptionCache *AC,



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[llvm-branch-commits] [lld] 8886be2 - [lld/mac] Add -adhoc_codesign / -no_adhoc_codesign flags

[Nico Weber via llvm-branch-commits]

Author: Nico Weber
Date: 2020-12-30T20:57:25-05:00
New Revision: 8886be242de8af6531204e2586b023f03b56992a

URL: 
https://github.com/llvm/llvm-project/commit/8886be242de8af6531204e2586b023f03b56992a
DIFF: 
https://github.com/llvm/llvm-project/commit/8886be242de8af6531204e2586b023f03b56992a.diff

LOG: [lld/mac] Add -adhoc_codesign / -no_adhoc_codesign flags

These are new in Xcode 12's ld64. lld never codesigns at the moment, so
-no_adhoc_codesign doesn't even have to warn that it's not implemented.

Added: 


Modified: 
lld/MachO/Options.td

Removed: 




diff  --git a/lld/MachO/Options.td b/lld/MachO/Options.td
index 8e88c74efc0e..6928cf209eb1 100644
--- a/lld/MachO/Options.td
+++ b/lld/MachO/Options.td
@@ -512,6 +512,13 @@ def grp_rare : OptionGroup<"rare">, HelpText<"RARELY 
USED">;
 def v : Flag<["-"], "v">,
  HelpText<"Print the linker version and search paths and exit">,
  Group;
+def adhoc_codesign : Flag<["-"], "adhoc_codesign">,
+ HelpText<"Write an ad-hocd code signature to the output file.">,
+ Flags<[HelpHidden]>,
+ Group;
+def no_adhoc_codesign : Flag<["-"], "no_adhoc_codesign">,
+ HelpText<"Do not write an ad-hocd code signature to the output file.">,
+ Group;
 def version_details : Flag<["-"], "version_details">,
  HelpText<"Print the linker version in JSON form">,
  Flags<[HelpHidden]>,



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[llvm-branch-commits] [llvm] 6f1503d - [LoopDeletion] Allows deletion of possibly infinite side-effect free loops

[via llvm-branch-commits]

Author: Atmn Patel
Date: 2020-12-30T21:43:01-05:00
New Revision: 6f1503d59854b331f1f970d39839619b0a26bbc7

URL: 
https://github.com/llvm/llvm-project/commit/6f1503d59854b331f1f970d39839619b0a26bbc7
DIFF: 
https://github.com/llvm/llvm-project/commit/6f1503d59854b331f1f970d39839619b0a26bbc7.diff

LOG: [LoopDeletion] Allows deletion of possibly infinite side-effect free loops

>From C11 and C++11 onwards, a forward-progress requirement has been
introduced for both languages. In the case of C, loops with non-constant
conditionals that do not have any observable side-effects (as defined by
6.8.5p6) can be assumed by the implementation to terminate, and in the
case of C++, this assumption extends to all functions. The clang
frontend will emit the `mustprogress` function attribute for C++
functions (D86233, D85393, D86841) and emit the loop metadata
`llvm.loop.mustprogress` for every loop in C11 or later that has a
non-constant conditional.

This patch modifies LoopDeletion so that only loops with
the `llvm.loop.mustprogress` metadata or loops contained in functions
that are required to make progress (`mustprogress` or `willreturn`) are
checked for observable side-effects. If these loops do not have an
observable side-effect, then we delete them.

Loops without observable side-effects that do not satisfy the above
conditions will not be deleted.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D86844

Added: 
llvm/test/Transforms/LoopDeletion/mustprogress.ll

Modified: 
clang/test/Misc/loop-opt-setup.c
llvm/include/llvm/Transforms/Utils/LoopUtils.h
llvm/lib/Transforms/Scalar/LoopDeletion.cpp
llvm/lib/Transforms/Utils/LoopUtils.cpp
llvm/test/Transforms/LoopDeletion/no-exit-blocks.ll

Removed: 




diff  --git a/clang/test/Misc/loop-opt-setup.c 
b/clang/test/Misc/loop-opt-setup.c
index c5c2ec4fda84..660eea25c6af 100644
--- a/clang/test/Misc/loop-opt-setup.c
+++ b/clang/test/Misc/loop-opt-setup.c
@@ -1,4 +1,5 @@
 // RUN: %clang -O1 -fno-unroll-loops -S -o - %s -emit-llvm | FileCheck %s
+// RUN: %clang -std=c99 -O1 -fno-unroll-loops -S -o - %s -emit-llvm | 
FileCheck %s --check-prefix C99
 
 extern int a[16];
 int b = 0;
@@ -24,7 +25,12 @@ void Helper() {
 }
 
 // Check br i1 to make sure the loop is gone, there will still be a label 
branch for the infinite loop.
+// In C99, there was no forward progress requirement, so we expect the 
infinite loop to still exist,
+// but for C11 and onwards, the infinite loop can be deleted.
 // CHECK-LABEL: Helper
-// CHECK: br label
-// CHECK-NOT: br i1
-// CHECK: br label
+// C99: br label
+// C99-NOT: br i1
+// C99: br label
+// CHECK: entry:
+// CHECK-NOT: br i1
+// CHECK-NEXT: ret void

diff  --git a/llvm/include/llvm/Transforms/Utils/LoopUtils.h 
b/llvm/include/llvm/Transforms/Utils/LoopUtils.h
index ba2bb0a4c6b0..fc6b72eb28af 100644
--- a/llvm/include/llvm/Transforms/Utils/LoopUtils.h
+++ b/llvm/include/llvm/Transforms/Utils/LoopUtils.h
@@ -255,6 +255,9 @@ bool hasDisableAllTransformsHint(const Loop *L);
 /// Look for the loop attribute that disables the LICM transformation 
heuristics.
 bool hasDisableLICMTransformsHint(const Loop *L);
 
+/// Look for the loop attribute that requires progress within the loop.
+bool hasMustProgress(const Loop *L);
+
 /// The mode sets how eager a transformation should be applied.
 enum TransformationMode {
   /// The pass can use heuristics to determine whether a transformation should

diff  --git a/llvm/lib/Transforms/Scalar/LoopDeletion.cpp 
b/llvm/lib/Transforms/Scalar/LoopDeletion.cpp
index 065db647561e..814cfc7ac6a9 100644
--- a/llvm/lib/Transforms/Scalar/LoopDeletion.cpp
+++ b/llvm/lib/Transforms/Scalar/LoopDeletion.cpp
@@ -128,10 +128,11 @@ static bool isLoopNeverExecuted(Loop *L) {
 
 /// Remove a loop if it is dead.
 ///
-/// A loop is considered dead if it does not impact the observable behavior of
-/// the program other than finite running time. This never removes a loop that
-/// might be infinite (unless it is never executed), as doing so could change
-/// the halting/non-halting nature of a program.
+/// A loop is considered dead either if it does not impact the observable
+/// behavior of the program other than finite running time, or if it is
+/// required to make progress by an attribute such as 'mustprogress' or
+/// 'llvm.loop.mustprogress' and does not make any. This may remove
+/// infinite loops that have been required to make progress.
 ///
 /// This entire process relies pretty heavily on LoopSimplify form and LCSSA in
 /// order to make various safety checks work.
@@ -207,11 +208,13 @@ static LoopDeletionResult deleteLoopIfDead(Loop *L, 
DominatorTree &DT,
: LoopDeletionResult::Unmodified;
   }
 
-  // Don't remove loops for which we can't solve the trip count.
-  // They could be infinite, in which case we'd be changing program behavior.
+  // D

[llvm-branch-commits] [llvm] 6be0b9a - [X86] Don't fold negative offset into 32-bit absolute address (e.g. movl $foo-1, %eax)

[Fangrui Song via llvm-branch-commits]

Author: Fangrui Song
Date: 2020-12-30T18:47:26-08:00
New Revision: 6be0b9a8ddca0b2c937b31e0ee33fcbb7eb03dda

URL: 
https://github.com/llvm/llvm-project/commit/6be0b9a8ddca0b2c937b31e0ee33fcbb7eb03dda
DIFF: 
https://github.com/llvm/llvm-project/commit/6be0b9a8ddca0b2c937b31e0ee33fcbb7eb03dda.diff

LOG: [X86] Don't fold negative offset into 32-bit absolute address (e.g. movl 
$foo-1, %eax)

When building abseil-cpp `bin/absl_hash_test` with Clang in -fno-pic
mode, an instruction like `movl $foo-2147483648, $eax` may be produced
(subtracting a number from the address of a static variable). If foo's
address is smaller than 2147483648, GNU ld/gold/LLD will error because
R_X86_64_32 cannot represent a negative value.

```
using absl::Hash;
struct NoOp {
  template < typename HashCode >
  friend HashCode AbslHashValue(HashCode , NoOp );
};
template  class HashIntTest : public testing::Test {};
TYPED_TEST_SUITE_P(HashIntTest);
TYPED_TEST_P(HashIntTest, BasicUsage) {
  if (std::numeric_limits< TypeParam >::min )
EXPECT_NE(Hash< NoOp >()({}),
  Hash< TypeParam >()(std::numeric_limits< TypeParam >::min()));
}
REGISTER_TYPED_TEST_CASE_P(HashIntTest, BasicUsage);
using IntTypes = testing::Types< int32_t>;
INSTANTIATE_TYPED_TEST_CASE_P(My, HashIntTest, IntTypes);

ld: error: hash_test.cc:(function (anonymous 
namespace)::gtest_suite_HashIntTest_::BasicUsage::TestBody(): 
.text+0x4E472): relocation R_X86_64_32 out of range: 18446744071564237392 is 
not in [0, 4294967295]; references absl::hash_internal::HashState::kSeed
```

Actually any negative offset is not allowed because the symbol address
can be zero (e.g. set by `-Wl,--defsym=foo=0`). So disallow such folding.

Reviewed By: pengfei

Differential Revision: https://reviews.llvm.org/D93931

Added: 


Modified: 
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/lib/Target/X86/X86ISelLowering.h
llvm/test/CodeGen/X86/fold-add.ll

Removed: 




diff  --git a/llvm/lib/Target/X86/X86ISelLowering.cpp 
b/llvm/lib/Target/X86/X86ISelLowering.cpp
index f1803c429fbb..811318054fe1 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -19102,9 +19102,12 @@ SDValue 
X86TargetLowering::LowerGlobalOrExternal(SDValue Op, SelectionDAG &DAG,
   if (GV) {
 // Create a target global address if this is a global. If possible, fold 
the
 // offset into the global address reference. Otherwise, ADD it on later.
+// Suppress the folding if Offset is negative: movl foo-1, %eax is not
+// allowed because if the address of foo is 0, the ELF R_X86_64_32
+// relocation will compute to a negative value, which is invalid.
 int64_t GlobalOffset = 0;
-if (OpFlags == X86II::MO_NO_FLAG &&
-X86::isOffsetSuitableForCodeModel(Offset, M)) {
+if (OpFlags == X86II::MO_NO_FLAG && Offset >= 0 &&
+X86::isOffsetSuitableForCodeModel(Offset, M, true)) {
   std::swap(GlobalOffset, Offset);
 }
 Result = DAG.getTargetGlobalAddress(GV, dl, PtrVT, GlobalOffset, OpFlags);

diff  --git a/llvm/lib/Target/X86/X86ISelLowering.h 
b/llvm/lib/Target/X86/X86ISelLowering.h
index faf2cc6fdba6..668132239dd3 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.h
+++ b/llvm/lib/Target/X86/X86ISelLowering.h
@@ -855,7 +855,7 @@ namespace llvm {
 /// Returns true of the given offset can be
 /// fit into displacement field of the instruction.
 bool isOffsetSuitableForCodeModel(int64_t Offset, CodeModel::Model M,
-  bool hasSymbolicDisplacement = true);
+  bool hasSymbolicDisplacement);
 
 /// Determines whether the callee is required to pop its
 /// own arguments. Callee pop is necessary to support tail calls.

diff  --git a/llvm/test/CodeGen/X86/fold-add.ll 
b/llvm/test/CodeGen/X86/fold-add.ll
index fc21e3b6e372..5dfbccdbe9b5 100644
--- a/llvm/test/CodeGen/X86/fold-add.ll
+++ b/llvm/test/CodeGen/X86/fold-add.ll
@@ -54,10 +54,12 @@ entry:
   ret i64 add (i64 ptrtoint (i32* @foo to i64), i64 1701208431)
 }
 
+;; Test we don't emit movl foo-1, %eax. ELF R_X86_64_32 does not allow
+;; a negative value.
 define dso_local i64 @neg_1() #0 {
 ; CHECK-LABEL: neg_1:
 ; CHECK:   # %bb.0:
-; STATIC-NEXT:   movl $foo-1, %eax
+; STATIC-NEXT:   leaq foo-1(%rip), %rax
 ; PIC-NEXT:  leaq foo-1(%rip), %rax
 ; MSTATIC-NEXT:  movabsq $foo, %rax
 ; MSTATIC-NEXT:  decq %rax
@@ -68,10 +70,12 @@ entry:
   ret i64 add (i64 ptrtoint (i32* @foo to i64), i64 -1)
 }
 
+;; Test we don't emit movl foo-2147483648, %eax. ELF R_X86_64_32 does not allow
+;; a negative value.
 define dso_local i64 @neg_0x8000() #0 {
 ; CHECK-LABEL: neg_0x8000:
 ; CHECK:   # %bb.0:
-; STATIC-NEXT:   movl $foo-2147483648, %eax
+; STATIC-NEXT:   leaq foo-2147483648(%rip), %rax
 ; PIC-NEXT:  leaq foo-2147483648(%rip), %rax
 ; MSTATIC-NEXT:  movabsq $foo, %rax
 ; MSTATI

[llvm-branch-commits] [clang] 809a1e0 - [CodeGenModule] Set dso_local for Mach-O GlobalValue

[Fangrui Song via llvm-branch-commits]

Author: Fangrui Song
Date: 2020-12-30T20:52:01-08:00
New Revision: 809a1e0ffd7af40ee27270ff8ba2ffc927330e71

URL: 
https://github.com/llvm/llvm-project/commit/809a1e0ffd7af40ee27270ff8ba2ffc927330e71
DIFF: 
https://github.com/llvm/llvm-project/commit/809a1e0ffd7af40ee27270ff8ba2ffc927330e71.diff

LOG: [CodeGenModule] Set dso_local for Mach-O GlobalValue

* static relocation model: always
* other relocation models: if isStrongDefinitionForLinker

This will make LLVM IR emitted for COFF/Mach-O and executable ELF similar.

Added: 


Modified: 
clang/lib/CodeGen/CodeGenModule.cpp
clang/test/CodeGenCXX/const-init.cpp
clang/test/CodeGenCXX/linkage.cpp
clang/test/CodeGenCXX/type_visibility.cpp
clang/test/CodeGenCXX/visibility.cpp

Removed: 




diff  --git a/clang/lib/CodeGen/CodeGenModule.cpp 
b/clang/lib/CodeGen/CodeGenModule.cpp
index 6d14298d9f5f..bf0a38bf83ab 100644
--- a/clang/lib/CodeGen/CodeGenModule.cpp
+++ b/clang/lib/CodeGen/CodeGenModule.cpp
@@ -946,14 +946,20 @@ static bool shouldAssumeDSOLocal(const CodeGenModule &CGM,
   if (TT.isOSBinFormatCOFF() || (TT.isOSWindows() && TT.isOSBinFormatMachO()))
 return true;
 
+  const auto &CGOpts = CGM.getCodeGenOpts();
+  llvm::Reloc::Model RM = CGOpts.RelocationModel;
+  const auto &LOpts = CGM.getLangOpts();
+
+  if (TT.isOSBinFormatMachO()) {
+if (RM == llvm::Reloc::Static)
+  return true;
+return GV->isStrongDefinitionForLinker();
+  }
+
   // Only handle COFF and ELF for now.
   if (!TT.isOSBinFormatELF())
 return false;
 
-  // If this is not an executable, don't assume anything is local.
-  const auto &CGOpts = CGM.getCodeGenOpts();
-  llvm::Reloc::Model RM = CGOpts.RelocationModel;
-  const auto &LOpts = CGM.getLangOpts();
   if (RM != llvm::Reloc::Static && !LOpts.PIE) {
 // On ELF, if -fno-semantic-interposition is specified, we can set 
dso_local
 // if using a local alias is preferable (can avoid GOT indirection).

diff  --git a/clang/test/CodeGenCXX/const-init.cpp 
b/clang/test/CodeGenCXX/const-init.cpp
index f5c9dae7ba4b..5b305bc5e4d6 100644
--- a/clang/test/CodeGenCXX/const-init.cpp
+++ b/clang/test/CodeGenCXX/const-init.cpp
@@ -2,17 +2,17 @@
 // RUN: %clang_cc1 -triple x86_64-apple-darwin -emit-llvm -std=c++98 -o - %s | 
FileCheck %s
 // RUN: %clang_cc1 -triple x86_64-apple-darwin -emit-llvm -std=c++11 -o - %s | 
FileCheck %s
 
-// CHECK: @a = global i32 10
+// CHECK: @a = dso_local global i32 10
 int a = 10;
-// CHECK: @ar = constant i32* @a
+// CHECK: @ar = dso_local constant i32* @a
 int &ar = a;
 
 void f();
-// CHECK: @fr = constant void ()* @_Z1fv
+// CHECK: @fr = dso_local constant void ()* @_Z1fv
 void (&fr)() = f;
 
 struct S { int& a; };
-// CHECK: @s = global %struct.S { i32* @a }
+// CHECK: @s = dso_local global %struct.S { i32* @a }
 S s = { a };
 
 // PR5581
@@ -23,7 +23,7 @@ class C {
   unsigned f;
 };
 
-// CHECK: @_ZN6PR55812g0E = global %"class.PR5581::C" { i32 1 }
+// CHECK: @_ZN6PR55812g0E = dso_local global %"class.PR5581::C" { i32 1 }
 C g0 = { C::e1 };
 }
 
@@ -39,10 +39,10 @@ namespace test2 {
 static int g();
   } a;
 
-  // CHECK: @_ZN5test22t0E = global double {{1\.0+e\+0+}}, align 8
-  // CHECK: @_ZN5test22t1E = global [2 x double] [double {{1\.0+e\+0+}}, 
double {{5\.0+e-0*}}1], align 16
-  // CHECK: @_ZN5test22t2E = global double* @_ZN5test21A1d
-  // CHECK: @_ZN5test22t3E = global {{.*}} @_ZN5test21A1g
+  // CHECK: @_ZN5test22t0E = dso_local global double {{1\.0+e\+0+}}, align 8
+  // CHECK: @_ZN5test22t1E = dso_local global [2 x double] [double 
{{1\.0+e\+0+}}, double {{5\.0+e-0*}}1], align 16
+  // CHECK: @_ZN5test22t2E = dso_local global double* @_ZN5test21A1d
+  // CHECK: @_ZN5test22t3E = dso_local global {{.*}} @_ZN5test21A1g
   double t0 = A::d;
   double t1[] = { A::d, A::f };
   const double *t2 = &a.d;
@@ -50,7 +50,7 @@ namespace test2 {
 }
 
 // We don't expect to fold this in the frontend, but make sure it doesn't 
crash.
-// CHECK: @PR9558 = global float 0.00e+0
+// CHECK: @PR9558 = dso_local global float 0.00e+0
 float PR9558 = reinterpret_cast("asd");
 
 // An initialized const automatic variable cannot be promoted to a constant
@@ -66,7 +66,7 @@ int writeToMutable() {
 
 // Make sure we don't try to fold this in the frontend; the backend can't
 // handle it.
-// CHECK: @PR11705 = global i128 0
+// CHECK: @PR11705 = dso_local global i128 0
 __int128_t PR11705 = (__int128_t)&PR11705;
 
 // Make sure we don't try to fold this either.
@@ -77,11 +77,11 @@ void UnfoldableAddrLabelDiff() { static __int128_t x = 
(long)&&a-(long)&&b; a:b:
 // CHECK: @_ZZ21FoldableAddrLabelDiffvE1x = internal global i64 sub (i64 
ptrtoint (i8* blockaddress(@_Z21FoldableAddrLabelDiffv
 void FoldableAddrLabelDiff() { static long x = (long)&&a-(long)&&b; 
a:b:return;}
 
-// CHECK: @i = constant i32* bitcast (float* @PR9558 to i32*)
+// CHECK: @i = dso_local constant i32* bitcast (

[llvm-branch-commits] [llvm] 08665b1 - Support tilezero intrinsic and c interface for AMX.

[via llvm-branch-commits]

Author: Luo, Yuanke
Date: 2020-12-31T13:24:57+08:00
New Revision: 08665b180568c82a1b2b8bd38a1e5769a862c2a9

URL: 
https://github.com/llvm/llvm-project/commit/08665b180568c82a1b2b8bd38a1e5769a862c2a9
DIFF: 
https://github.com/llvm/llvm-project/commit/08665b180568c82a1b2b8bd38a1e5769a862c2a9.diff

LOG: Support tilezero intrinsic and c interface for AMX.

Differential Revision: https://reviews.llvm.org/D92837

Added: 
llvm/test/CodeGen/X86/AMX/amx-tile-basic.ll

Modified: 
clang/include/clang/Basic/BuiltinsX86_64.def
clang/lib/Headers/amxintrin.h
clang/test/CodeGen/X86/amx_api.c
llvm/include/llvm/IR/IntrinsicsX86.td
llvm/lib/Target/X86/X86ExpandPseudo.cpp
llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
llvm/lib/Target/X86/X86InstrAMX.td
llvm/lib/Target/X86/X86PreTileConfig.cpp
llvm/lib/Target/X86/X86RegisterInfo.cpp

Removed: 




diff  --git a/clang/include/clang/Basic/BuiltinsX86_64.def 
b/clang/include/clang/Basic/BuiltinsX86_64.def
index 98327ade17e8..974ba35b3233 100644
--- a/clang/include/clang/Basic/BuiltinsX86_64.def
+++ b/clang/include/clang/Basic/BuiltinsX86_64.def
@@ -104,6 +104,7 @@ TARGET_BUILTIN(__builtin_ia32_senduipi, "vUWi", "n", 
"uintr")
 TARGET_BUILTIN(__builtin_ia32_tileloadd64_internal, "V256iUsUsvC*z", "n", 
"amx-tile")
 TARGET_BUILTIN(__builtin_ia32_tdpbssd_internal, "V256iUsUsUsV256iV256iV256i", 
"n", "amx-int8")
 TARGET_BUILTIN(__builtin_ia32_tilestored64_internal, "vUsUsv*zV256i", "n", 
"amx-tile")
+TARGET_BUILTIN(__builtin_ia32_tilezero_internal, "V256iUsUs", "n", "amx-tile")
 // AMX
 TARGET_BUILTIN(__builtin_ia32_tile_loadconfig, "vvC*", "n", "amx-tile")
 TARGET_BUILTIN(__builtin_ia32_tile_storeconfig, "vvC*", "n", "amx-tile")

diff  --git a/clang/lib/Headers/amxintrin.h b/clang/lib/Headers/amxintrin.h
index 03a468ef15b1..901488a17e8c 100644
--- a/clang/lib/Headers/amxintrin.h
+++ b/clang/lib/Headers/amxintrin.h
@@ -251,7 +251,7 @@ typedef struct __tile1024i_str {
   _tile1024i tile;
 } __tile1024i;
 
-__DEFAULT_FN_ATTRS_INT8
+__DEFAULT_FN_ATTRS_TILE
 static void __tile_loadd(__tile1024i *dst, const void *base,
  __SIZE_TYPE__ stride) {
   dst->tile = _tile_loadd_internal(dst->row, dst->col, base, stride);
@@ -264,10 +264,15 @@ static void __tile_dpbsud(__tile1024i *dst, __tile1024i 
src1,
 src1.tile, src2.tile);
 }
 
-__DEFAULT_FN_ATTRS_INT8
+__DEFAULT_FN_ATTRS_TILE
 static void __tile_stored(void *base, __SIZE_TYPE__ stride, __tile1024i src) {
   _tile_stored_internal(src.row, src.col, base, stride, src.tile);
 }
 
+__DEFAULT_FN_ATTRS_TILE
+static void __tile_zero(__tile1024i *dst) {
+  dst->tile = __builtin_ia32_tilezero_internal(dst->row, dst->col);
+}
+
 #endif /* __x86_64__ */
 #endif /* __AMXINTRIN_H */

diff  --git a/clang/test/CodeGen/X86/amx_api.c 
b/clang/test/CodeGen/X86/amx_api.c
index 52eb9542228d..55290f3fa6fb 100644
--- a/clang/test/CodeGen/X86/amx_api.c
+++ b/clang/test/CodeGen/X86/amx_api.c
@@ -52,3 +52,10 @@ void test_tile_stored(__tile1024i c) {
   //CHECK-NEXT: call void @llvm.x86.tilestored64.internal
   __tile_stored(buf, STRIDE, c);
 }
+
+void test_tile_zero(__tile1024i c) {
+  //CHECK-LABEL: @test_tile_zero
+  //CHECK: call x86_amx @llvm.x86.tilezero.internal
+  //CHECK-NEXT bitcast x86_amx {{%.*}} to <256 x i32>
+  __tile_zero(&c);
+}

diff  --git a/llvm/include/llvm/IR/IntrinsicsX86.td 
b/llvm/include/llvm/IR/IntrinsicsX86.td
index dba44523e153..68b076c594be 100644
--- a/llvm/include/llvm/IR/IntrinsicsX86.td
+++ b/llvm/include/llvm/IR/IntrinsicsX86.td
@@ -5057,6 +5057,10 @@ let TargetPrefix = "x86" in {
   GCCBuiltin<"__builtin_ia32_tilestored64_internal">,
   Intrinsic<[], [llvm_i16_ty, llvm_i16_ty, llvm_ptr_ty,
  llvm_i64_ty, llvm_x86amx_ty], []>;
+  def int_x86_tilezero_internal :
+  GCCBuiltin<"__builtin_ia32_tilezero_internal">,
+  Intrinsic<[llvm_x86amx_ty], [llvm_i16_ty, llvm_i16_ty],
+[]>;
 }
 
 
//===--===//

diff  --git a/llvm/lib/Target/X86/X86ExpandPseudo.cpp 
b/llvm/lib/Target/X86/X86ExpandPseudo.cpp
index a2fe09aecc49..15af0fb2e888 100644
--- a/llvm/lib/Target/X86/X86ExpandPseudo.cpp
+++ b/llvm/lib/Target/X86/X86ExpandPseudo.cpp
@@ -494,6 +494,12 @@ bool X86ExpandPseudo::ExpandMI(MachineBasicBlock &MBB,
 MI.setDesc(TII->get(X86::TILESTORED));
 return true;
   }
+  case X86::PTILEZEROV: {
+for (int i = 3; i > 0; --i) // Remove row, col, $tmmcfg
+  MI.RemoveOperand(i);
+MI.setDesc(TII->get(X86::TILEZERO));
+return true;
+  }
   }
   llvm_unreachable("Previous switch has a fallthrough?");
 }

diff  --git a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp 
b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
index 883b6bfc145d..a96f73df855d 100644
--- a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
+++ b/llv

[llvm-branch-commits] [lld] 4a290a5 - [lld/mac] fix typo

[Thorsten Schütt via llvm-branch-commits]

Author: Thorsten Schütt
Date: 2020-12-31T08:23:29+01:00
New Revision: 4a290a59051bc07a5b806371ee6f70c31e5ce266

URL: 
https://github.com/llvm/llvm-project/commit/4a290a59051bc07a5b806371ee6f70c31e5ce266
DIFF: 
https://github.com/llvm/llvm-project/commit/4a290a59051bc07a5b806371ee6f70c31e5ce266.diff

LOG: [lld/mac] fix typo

Added: 


Modified: 
lld/MachO/Options.td

Removed: 




diff  --git a/lld/MachO/Options.td b/lld/MachO/Options.td
index 6928cf209eb1..2ea4c53e0166 100644
--- a/lld/MachO/Options.td
+++ b/lld/MachO/Options.td
@@ -513,11 +513,11 @@ def v : Flag<["-"], "v">,
  HelpText<"Print the linker version and search paths and exit">,
  Group;
 def adhoc_codesign : Flag<["-"], "adhoc_codesign">,
- HelpText<"Write an ad-hocd code signature to the output file.">,
+ HelpText<"Write an ad-hoc code signature to the output file.">,
  Flags<[HelpHidden]>,
  Group;
 def no_adhoc_codesign : Flag<["-"], "no_adhoc_codesign">,
- HelpText<"Do not write an ad-hocd code signature to the output file.">,
+ HelpText<"Do not write an ad-hoc code signature to the output file.">,
  Group;
 def version_details : Flag<["-"], "version_details">,
  HelpText<"Print the linker version in JSON form">,



___
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[llvm-branch-commits] [mlir] 42c57dc - [mlir][python] Tweaks to make python extensions packagable/distributable.

[Stella Laurenzo via llvm-branch-commits]

Author: Stella Laurenzo
Date: 2020-12-30T23:35:46-08:00
New Revision: 42c57dcc35ea9d6a09469c61473b17c95edcaa2e

URL: 
https://github.com/llvm/llvm-project/commit/42c57dcc35ea9d6a09469c61473b17c95edcaa2e
DIFF: 
https://github.com/llvm/llvm-project/commit/42c57dcc35ea9d6a09469c61473b17c95edcaa2e.diff

LOG: [mlir][python] Tweaks to make python extensions packagable/distributable.

* Works in tandem with prototype packaging scripts here: 
https://github.com/stellaraccident/mlir-py-release
* The `mlir` top-level now differentiates between in-tree builds where all 
packages are co-located and distribution mode where all native components are 
under a top-level `_mlir_libs` package.
* Also fixes the generated dialect python installation again. Hopefully the 
last tweak.
* With this, I am able to install and generate archives with the above setup 
script on Linux. Archive size=31M with just host codegen and 
headers/shared-libraries. Will need more linker tweaks when wiring up the next 
dependent project.

Differential Revision: https://reviews.llvm.org/D93936

Added: 


Modified: 
mlir/lib/Bindings/Python/CMakeLists.txt
mlir/lib/Bindings/Python/mlir/__init__.py
mlir/lib/Bindings/Python/mlir/transforms/__init__.py

Removed: 




diff  --git a/mlir/lib/Bindings/Python/CMakeLists.txt 
b/mlir/lib/Bindings/Python/CMakeLists.txt
index 83e978a6e046..0c34f5b55415 100644
--- a/mlir/lib/Bindings/Python/CMakeLists.txt
+++ b/mlir/lib/Bindings/Python/CMakeLists.txt
@@ -1,15 +1,6 @@
 include(AddMLIRPythonExtension)
 add_custom_target(MLIRBindingsPythonExtension)
 
-
-# Generate dialect-specific bindings.
-
-
-add_mlir_dialect_python_bindings(MLIRBindingsPythonStandardOps
-  StandardOps.td
-  std)
-add_dependencies(MLIRBindingsPythonExtension MLIRBindingsPythonStandardOps)
-
 

 # Copy python source tree.
 

@@ -40,6 +31,15 @@ foreach(PY_SRC_FILE ${PY_SRC_FILES})
   )
 endforeach()
 
+
+# Generate dialect-specific bindings.
+
+
+add_mlir_dialect_python_bindings(MLIRBindingsPythonStandardOps
+  StandardOps.td
+  std)
+add_dependencies(MLIRBindingsPythonSources MLIRBindingsPythonStandardOps)
+
 

 # Build core python extension
 


diff  --git a/mlir/lib/Bindings/Python/mlir/__init__.py 
b/mlir/lib/Bindings/Python/mlir/__init__.py
index 8e027f64bdb6..5ae8151e18f1 100644
--- a/mlir/lib/Bindings/Python/mlir/__init__.py
+++ b/mlir/lib/Bindings/Python/mlir/__init__.py
@@ -13,18 +13,35 @@
   "passmanager",
 ]
 
-# The _dlloader takes care of platform specific setup before we try to
-# load a shared library.
-from . import _dlloader
-_dlloader.preload_dependency("MLIRPublicAPI")
+# Packaged installs have a top-level _mlir_libs package with symbols:
+#   load_extension(name): Loads a named extension module
+#   preload_dependency(public_name): Loads a shared-library/DLL into the
+# namespace. TODO: Remove this in favor of a more robust mechanism.
+# Conditionally switch based on whether we are in a package context.
+try:
+  import _mlir_libs
+except ModuleNotFoundError:
+  # Assume that we are in-tree.
+  # The _dlloader takes care of platform specific setup before we try to
+  # load a shared library.
+  from ._dlloader import preload_dependency as _preload_dependency
 
+  def _load_extension(name):
+import importlib
+return importlib.import_module(name)  # i.e. '_mlir' at the top level
+else:
+  # Packaged distribution.
+  _load_extension = _mlir_libs.load_extension
+  _preload_dependency = _mlir_libs.preload_dependency
+
+_preload_dependency("MLIRPublicAPI")
 # Expose the corresponding C-Extension module with a well-known name at this
 # top-level module. This allows relative imports like the following to
 # function:
 #   from .. import _cext
 # This reduces coupling, allowing embedding of the python sources into another
 # project that can just vary based on this top-level loader module.
-import _mlir as _cext
+_cext = _load_extension("_mlir")
 
 def _reexport_cext(cext_module_name, target_module_name):
   """Re-exports a named sub-module of the C-Extension into another module.

diff  --git a/mlir/lib/Bindings/Python/mlir/transforms/__init__.py 
b/mlir/lib/Bindings/Python/mlir/transforms/__init__.py
index d6172521295a..1155c6392eb8 100644
--- a/mlir/lib/Bindings/Python/mlir/transforms/__init__.