[llvm-branch-commits] [llvm] 7df3544 - [GlobalISel] Fix assertion failures after "GlobalISel: Return APInt from getConstantVRegVal" landed.
Author: Amara Emerson
Date: 2020-12-26T23:51:44-08:00
New Revision: 7df3544e80fb40c742707613cd39ca77f7fea558
URL:
https://github.com/llvm/llvm-project/commit/7df3544e80fb40c742707613cd39ca77f7fea558
DIFF:
https://github.com/llvm/llvm-project/commit/7df3544e80fb40c742707613cd39ca77f7fea558.diff
LOG: [GlobalISel] Fix assertion failures after "GlobalISel: Return APInt from
getConstantVRegVal" landed.
APInt binary ops don't promote types but instead assert, which a combine was
relying on.
Added:
llvm/test/CodeGen/AArch64/GlobalISel/combine-shift-immed-mismatch-crash.mir
Modified:
llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
Removed:
diff --git a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
index 90b1dcea2648..abc23da3d418 100644
--- a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
@@ -1570,7 +1570,8 @@ bool CombinerHelper::matchShiftImmedChain(MachineInstr
&MI,
return false;
// Pass the combined immediate to the apply function.
- MatchInfo.Imm = (MaybeImmVal->Value + MaybeImm2Val->Value).getSExtValue();
+ MatchInfo.Imm =
+ (MaybeImmVal->Value.getSExtValue() + MaybeImm2Val->Value).getSExtValue();
MatchInfo.Reg = Base;
// There is no simple replacement for a saturating unsigned left shift that
diff --git
a/llvm/test/CodeGen/AArch64/GlobalISel/combine-shift-immed-mismatch-crash.mir
b/llvm/test/CodeGen/AArch64/GlobalISel/combine-shift-immed-mismatch-crash.mir
new file mode 100644
index ..481c71fbed60
--- /dev/null
+++
b/llvm/test/CodeGen/AArch64/GlobalISel/combine-shift-immed-mismatch-crash.mir
@@ -0,0 +1,58 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs
-mtriple aarch64-unknown-unknown %s -o - | FileCheck %s
+---
+name:shift_immed_chain_mismatch_size_crash
+alignment: 4
+tracksRegLiveness: true
+liveins:
+ - { reg: '$x0' }
+body: |
+ ; CHECK-LABEL: name: shift_immed_chain_mismatch_size_crash
+ ; CHECK: bb.0:
+ ; CHECK: successors: %bb.1(0x4000), %bb.2(0x4000)
+ ; CHECK: liveins: $x0
+ ; CHECK: [[DEF:%[0-9]+]]:_(p0) = G_IMPLICIT_DEF
+ ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
+ ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 9
+ ; CHECK: [[DEF1:%[0-9]+]]:_(s1) = G_IMPLICIT_DEF
+ ; CHECK: G_BRCOND [[DEF1]](s1), %bb.2
+ ; CHECK: G_BR %bb.1
+ ; CHECK: bb.1:
+ ; CHECK: successors:
+ ; CHECK: bb.2:
+ ; CHECK: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[DEF]](p0) :: (load 4 from
`i32* undef`, align 8)
+ ; CHECK: [[MUL:%[0-9]+]]:_(s32) = nsw G_MUL [[C]], [[LOAD]]
+ ; CHECK: [[MUL1:%[0-9]+]]:_(s32) = nsw G_MUL [[MUL]], [[C1]]
+ ; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 2
+ ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[MUL1]], [[C2]](s64)
+ ; CHECK: $w0 = COPY [[SHL]](s32)
+ ; CHECK: RET_ReallyLR implicit $w0
+ bb.1:
+liveins: $x0
+
+%0:_(p0) = COPY $x0
+%1:_(s1) = G_IMPLICIT_DEF
+%3:_(p0) = G_IMPLICIT_DEF
+%4:_(s32) = G_CONSTANT i32 16
+%6:_(s32) = G_CONSTANT i32 9
+%8:_(s32) = G_CONSTANT i32 2
+%11:_(s64) = G_CONSTANT i64 2
+G_BRCOND %1(s1), %bb.2
+G_BR %bb.3
+
+ bb.2:
+successors:
+
+
+ bb.3:
+%2:_(s32) = G_LOAD %3(p0) :: (load 4 from `i32* undef`, align 8)
+%5:_(s32) = nsw G_MUL %4, %2
+%7:_(s32) = nsw G_MUL %5, %6
+%9:_(s32) = nsw G_MUL %7, %8
+%10:_(s64) = G_SEXT %9(s32)
+%12:_(s64) = G_MUL %10, %11
+%13:_(s32) = G_TRUNC %12(s64)
+$w0 = COPY %13(s32)
+RET_ReallyLR implicit $w0
+
+...
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[llvm-branch-commits] [lldb] aca4488 - [lldb] Surpress "ingoring result" warning in reproducer_handler
Author: Pavel Labath
Date: 2020-12-27T13:58:05+01:00
New Revision: aca4488847b4ddceeda8d4ddb2cd9cb3defbab0c
URL:
https://github.com/llvm/llvm-project/commit/aca4488847b4ddceeda8d4ddb2cd9cb3defbab0c
DIFF:
https://github.com/llvm/llvm-project/commit/aca4488847b4ddceeda8d4ddb2cd9cb3defbab0c.diff
LOG: [lldb] Surpress "ingoring result" warning in reproducer_handler
Added:
Modified:
lldb/tools/driver/Driver.cpp
Removed:
diff --git a/lldb/tools/driver/Driver.cpp b/lldb/tools/driver/Driver.cpp
index 870f763436a4..e4a60127b65e 100644
--- a/lldb/tools/driver/Driver.cpp
+++ b/lldb/tools/driver/Driver.cpp
@@ -732,7 +732,8 @@ void sigcont_handler(int signo) {
void reproducer_handler(void *finalize_cmd) {
if (SBReproducer::Generate()) {
-std::system(static_cast(finalize_cmd));
+int result = std::system(static_cast(finalize_cmd));
+(void)result;
fflush(stdout);
}
}
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[llvm-branch-commits] [lldb] bd39a5c - [lldb/test] Automatically skip remote lldb-server tests when applicable
Author: Pavel Labath
Date: 2020-12-27T13:58:10+01:00
New Revision: bd39a5cb30a34547eb56a81eb7ca8aca23544099
URL:
https://github.com/llvm/llvm-project/commit/bd39a5cb30a34547eb56a81eb7ca8aca23544099
DIFF:
https://github.com/llvm/llvm-project/commit/bd39a5cb30a34547eb56a81eb7ca8aca23544099.diff
LOG: [lldb/test] Automatically skip remote lldb-server tests when applicable
The tests don't work with remote debugservers. This isn't a problem with
any particular test, but the test infrastructure itself, which is why
each of these tests has a @skipIfDarwinEmbedded decorator.
This patch replaces that with a central category-based solution. It also
moves the ad-hoc windows skipping mechanism there too.
Added:
Modified:
lldb/packages/Python/lldbsuite/test/dotest.py
lldb/packages/Python/lldbsuite/test/tools/lldb-server/gdbremote_testcase.py
lldb/test/API/tools/lldb-server/TestGdbRemoteAttach.py
lldb/test/API/tools/lldb-server/TestGdbRemoteAuxvSupport.py
lldb/test/API/tools/lldb-server/TestGdbRemoteCompletion.py
lldb/test/API/tools/lldb-server/TestGdbRemoteExitCode.py
lldb/test/API/tools/lldb-server/TestGdbRemoteExpeditedRegisters.py
lldb/test/API/tools/lldb-server/TestGdbRemoteHostInfo.py
lldb/test/API/tools/lldb-server/TestGdbRemoteKill.py
lldb/test/API/tools/lldb-server/TestGdbRemoteProcessInfo.py
lldb/test/API/tools/lldb-server/TestGdbRemoteRegisterState.py
lldb/test/API/tools/lldb-server/TestGdbRemoteSingleStep.py
lldb/test/API/tools/lldb-server/TestGdbRemoteThreadsInStopReply.py
lldb/test/API/tools/lldb-server/TestGdbRemote_qThreadStopInfo.py
lldb/test/API/tools/lldb-server/TestLldbGdbServer.py
lldb/test/API/tools/lldb-server/commandline/TestGdbRemoteConnection.py
lldb/test/API/tools/lldb-server/inferior-crash/TestGdbRemoteAbort.py
lldb/test/API/tools/lldb-server/inferior-crash/TestGdbRemoteSegFault.py
lldb/test/API/tools/lldb-server/register-reading/TestGdbRemoteGPacket.py
Removed:
diff --git a/lldb/packages/Python/lldbsuite/test/dotest.py
b/lldb/packages/Python/lldbsuite/test/dotest.py
index 86ea34ee2582..c728bf329202 100644
--- a/lldb/packages/Python/lldbsuite/test/dotest.py
+++ b/lldb/packages/Python/lldbsuite/test/dotest.py
@@ -852,11 +852,20 @@ def checkDebugInfoSupport():
def checkDebugServerSupport():
from lldbsuite.test import lldbplatformutil
+import lldb
+skip_msg = "Skipping %s tests, as they are not compatible with remote
testing on this platform"
if lldbplatformutil.platformIsDarwin():
configuration.skip_categories.append("llgs")
+if lldb.remote_platform:
+#
+configuration.skip_categories.append("debugserver")
+print(skip_msg%"debugserver");
else:
configuration.skip_categories.append("debugserver")
+if lldb.remote_platform and lldbplatformutil.getPlatform() ==
"windows":
+configuration.skip_categories.append("llgs")
+print(skip_msg%"lldb-server");
def run_suite():
# On MacOS X, check to make sure that domain for com.apple.DebugSymbols
defaults
diff --git
a/lldb/packages/Python/lldbsuite/test/tools/lldb-server/gdbremote_testcase.py
b/lldb/packages/Python/lldbsuite/test/tools/lldb-server/gdbremote_testcase.py
index d9289251d89d..71e75adbecb7 100644
---
a/lldb/packages/Python/lldbsuite/test/tools/lldb-server/gdbremote_testcase.py
+++
b/lldb/packages/Python/lldbsuite/test/tools/lldb-server/gdbremote_testcase.py
@@ -199,9 +199,7 @@ def _init_llgs_test(self):
# Reverse connections may be tricky due to firewalls/NATs.
reverse_connect = False
-triple = self.dbg.GetSelectedPlatform().GetTriple()
-if re.match(".*-.*-windows", triple):
-self.skipTest("Remotely testing is not supported on Windows
yet.")
+# FIXME: This is extremely linux-oriented
# Grab the ppid from /proc/[shell pid]/stat
err, retcode, shell_stat = self.run_platform_command(
diff --git a/lldb/test/API/tools/lldb-server/TestGdbRemoteAttach.py
b/lldb/test/API/tools/lldb-server/TestGdbRemoteAttach.py
index 84d44b5e0b84..9ffa7e26fab7 100644
--- a/lldb/test/API/tools/lldb-server/TestGdbRemoteAttach.py
+++ b/lldb/test/API/tools/lldb-server/TestGdbRemoteAttach.py
@@ -11,7 +11,6 @@ class
TestGdbRemoteAttach(gdbremote_testcase.GdbRemoteTestCaseBase):
mydir = TestBase.compute_mydir(__file__)
-@skipIfDarwinEmbedded # lldb-server tests not
updated to work on ios etc yet
def attach_with_vAttach(self):
# Start the inferior, start the debug monitor, nothing is attached yet.
procs = self.prep_debug_monitor_and_inferior(
diff --git a/lldb/test/API/tools/lldb-server/TestGdbRemoteAuxvSupport.py
b/lldb/test/API/tools/lldb-server/TestGdbRemoteAuxvSupport.py
index f9c8fadc15b9..9d9c4d89e0b5 100644
[llvm-branch-commits] [llvm] fb77d95 - [AArch64] Fix legalization of i128 ctpop without neon
Author: Nikita Popov
Date: 2020-12-27T17:24:41+01:00
New Revision: fb77d95022198edebde3e4cb2807eaeea2156d85
URL:
https://github.com/llvm/llvm-project/commit/fb77d95022198edebde3e4cb2807eaeea2156d85
DIFF:
https://github.com/llvm/llvm-project/commit/fb77d95022198edebde3e4cb2807eaeea2156d85.diff
LOG: [AArch64] Fix legalization of i128 ctpop without neon
If neon is disabled, LowerCTPOP will return SDValue() to indicate
that normal legalization should be used. However, ReplaceNodeResults
does not check for this and pushes the empty SDValue() onto the
result vector, which will subsequently result in a crash.
Differential Revision: https://reviews.llvm.org/D93825
Added:
llvm/test/CodeGen/AArch64/ctpop-nonean.ll
Modified:
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Removed:
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index 48fbea840bad..2012f1247a0f 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -15905,7 +15905,8 @@ void AArch64TargetLowering::ReplaceNodeResults(
return;
case ISD::CTPOP:
-Results.push_back(LowerCTPOP(SDValue(N, 0), DAG));
+if (SDValue Result = LowerCTPOP(SDValue(N, 0), DAG))
+ Results.push_back(Result);
return;
case AArch64ISD::SADDV:
ReplaceReductionResults(N, Results, DAG, ISD::ADD, AArch64ISD::SADDV);
diff --git a/llvm/test/CodeGen/AArch64/ctpop-nonean.ll
b/llvm/test/CodeGen/AArch64/ctpop-nonean.ll
new file mode 100644
index ..a6cc9c6fa9be
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/ctpop-nonean.ll
@@ -0,0 +1,36 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=-neon < %s | FileCheck %s
+
+declare i128 @llvm.ctpop.i128(i128)
+
+define i128 @ctpop_i128(i128 %i) {
+; CHECK-LABEL: ctpop_i128:
+; CHECK: // %bb.0:
+; CHECK-NEXT:lsr x8, x1, #1
+; CHECK-NEXT:and x8, x8, #0x
+; CHECK-NEXT:sub x8, x1, x8
+; CHECK-NEXT:lsr x10, x0, #1
+; CHECK-NEXT:and x10, x10, #0x
+; CHECK-NEXT:and x11, x8, #0x
+; CHECK-NEXT:lsr x8, x8, #2
+; CHECK-NEXT:sub x10, x0, x10
+; CHECK-NEXT:and x8, x8, #0x
+; CHECK-NEXT:add x8, x11, x8
+; CHECK-NEXT:and x11, x10, #0x
+; CHECK-NEXT:lsr x10, x10, #2
+; CHECK-NEXT:and x10, x10, #0x
+; CHECK-NEXT:add x10, x11, x10
+; CHECK-NEXT:add x8, x8, x8, lsr #4
+; CHECK-NEXT:add x10, x10, x10, lsr #4
+; CHECK-NEXT:mov x9, #72340172838076673
+; CHECK-NEXT:and x8, x8, #0xf0f0f0f0f0f0f0f
+; CHECK-NEXT:and x10, x10, #0xf0f0f0f0f0f0f0f
+; CHECK-NEXT:mul x8, x8, x9
+; CHECK-NEXT:mul x9, x10, x9
+; CHECK-NEXT:lsr x9, x9, #56
+; CHECK-NEXT:add x0, x9, x8, lsr #56
+; CHECK-NEXT:mov x1, xzr
+; CHECK-NEXT:ret
+ %c = call i128 @llvm.ctpop.i128(i128 %i)
+ ret i128 %c
+}
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[llvm-branch-commits] [llvm] 0af42d3 - [PatternMatch][LVI] Handle select-form and/or in LVI
Author: Nikita Popov
Date: 2020-12-27T17:39:02+01:00
New Revision: 0af42d3dc73e8f08e37811131c31358ecb9adf20
URL:
https://github.com/llvm/llvm-project/commit/0af42d3dc73e8f08e37811131c31358ecb9adf20
DIFF:
https://github.com/llvm/llvm-project/commit/0af42d3dc73e8f08e37811131c31358ecb9adf20.diff
LOG: [PatternMatch][LVI] Handle select-form and/or in LVI
Following the discussion in D93065, this adds m_LogicalAnd() and
m_LogicalOr() matchers, that match A && B and A || B logical
operations, either as bitwise operations or select expressions.
As an example usage, LVI is adapted to use these matchers for its
condition reasoning.
The plan here is to switch other parts of LLVM that reason about
and/or of conditions to also support the select forms, and then
merge D93065 (or a variant thereof) to disable the poison-unsafe
select to and/or transform.
Differential Revision: https://reviews.llvm.org/D93827
Added:
Modified:
llvm/include/llvm/IR/PatternMatch.h
llvm/lib/Analysis/LazyValueInfo.cpp
llvm/test/Transforms/CorrelatedValuePropagation/basic.ll
Removed:
diff --git a/llvm/include/llvm/IR/PatternMatch.h
b/llvm/include/llvm/IR/PatternMatch.h
index c40f5d1d15d1..166ad23de969 100644
--- a/llvm/include/llvm/IR/PatternMatch.h
+++ b/llvm/include/llvm/IR/PatternMatch.h
@@ -2387,6 +2387,58 @@ inline VScaleVal_match m_VScale(const DataLayout &DL) {
return VScaleVal_match(DL);
}
+template
+struct LogicalOp_match {
+ LHS L;
+ RHS R;
+
+ LogicalOp_match(const LHS &L, const RHS &R) : L(L), R(R) {}
+
+ template bool match(T *V) {
+if (auto *I = dyn_cast(V)) {
+ if (!I->getType()->isIntOrIntVectorTy(1))
+return false;
+
+ if (I->getOpcode() == Opcode && L.match(I->getOperand(0)) &&
+ R.match(I->getOperand(1)))
+return true;
+
+ if (auto *SI = dyn_cast(I)) {
+if (Opcode == Instruction::And) {
+ if (const auto *C = dyn_cast(SI->getFalseValue()))
+if (C->isNullValue() && L.match(SI->getCondition()) &&
+R.match(SI->getTrueValue()))
+ return true;
+} else {
+ assert(Opcode == Instruction::Or);
+ if (const auto *C = dyn_cast(SI->getTrueValue()))
+if (C->isOneValue() && L.match(SI->getCondition()) &&
+R.match(SI->getFalseValue()))
+ return true;
+}
+ }
+}
+
+return false;
+ }
+};
+
+/// Matches L && R either in the form of L & R or L ? R : false.
+/// Note that the latter form is poison-blocking.
+template
+inline LogicalOp_match
+m_LogicalAnd(const LHS &L, const RHS &R) {
+ return LogicalOp_match(L, R);
+}
+
+/// Matches L || R either in the form of L | R or L ? true : R.
+/// Note that the latter form is poison-blocking.
+template
+inline LogicalOp_match
+m_LogicalOr(const LHS &L, const RHS &R) {
+ return LogicalOp_match(L, R);
+}
+
} // end namespace PatternMatch
} // end namespace llvm
diff --git a/llvm/lib/Analysis/LazyValueInfo.cpp
b/llvm/lib/Analysis/LazyValueInfo.cpp
index a2f0bd872573..aadb90d372f4 100644
--- a/llvm/lib/Analysis/LazyValueInfo.cpp
+++ b/llvm/lib/Analysis/LazyValueInfo.cpp
@@ -1205,22 +1205,20 @@ getValueFromConditionImpl(Value *Val, Value *Cond, bool
isTrueDest,
// true dest path both of the conditions hold. Similarly for conditions of
// the form (cond1 || cond2), we know that on the false dest path neither
// condition holds.
- BinaryOperator *BO = dyn_cast(Cond);
- if (!BO || (isTrueDest && BO->getOpcode() != BinaryOperator::And) ||
- (!isTrueDest && BO->getOpcode() != BinaryOperator::Or))
+ Value *L, *R;
+ if (isTrueDest ? !match(Cond, m_LogicalAnd(m_Value(L), m_Value(R)))
+ : !match(Cond, m_LogicalOr(m_Value(L), m_Value(R
return ValueLatticeElement::getOverdefined();
// Prevent infinite recursion if Cond references itself as in this example:
// Cond: "%tmp4 = and i1 %tmp4, undef"
//BL: "%tmp4 = and i1 %tmp4, undef"
//BR: "i1 undef"
- Value *BL = BO->getOperand(0);
- Value *BR = BO->getOperand(1);
- if (BL == Cond || BR == Cond)
+ if (L == Cond || R == Cond)
return ValueLatticeElement::getOverdefined();
- return intersect(getValueFromCondition(Val, BL, isTrueDest, Visited),
- getValueFromCondition(Val, BR, isTrueDest, Visited));
+ return intersect(getValueFromCondition(Val, L, isTrueDest, Visited),
+ getValueFromCondition(Val, R, isTrueDest, Visited));
}
static ValueLatticeElement
diff --git a/llvm/test/Transforms/CorrelatedValuePropagation/basic.ll
b/llvm/test/Transforms/CorrelatedValuePropagation/basic.ll
index e4748e71baa5..bec6f9431c9d 100644
--- a/llvm/test/Transforms/CorrelatedValuePropagation/basic.ll
+++ b/llvm/test/Transforms/CorrelatedValuePropagation/basic.ll
@@ -1069,10 +1069,8 @@ define void @select_and(i32 %a, i1* %p) {
; CHECK-NEXT:[[
[llvm-branch-commits] [llvm] 0799233 - [llvm-cov] Use is_contained (NFC)
Author: Kazu Hirata
Date: 2020-12-27T09:57:25-08:00
New Revision: 079923309c6e8ef054555f015a49f41f46b41b2e
URL:
https://github.com/llvm/llvm-project/commit/079923309c6e8ef054555f015a49f41f46b41b2e
DIFF:
https://github.com/llvm/llvm-project/commit/079923309c6e8ef054555f015a49f41f46b41b2e.diff
LOG: [llvm-cov] Use is_contained (NFC)
Added:
Modified:
llvm/tools/llvm-size/llvm-size.cpp
Removed:
diff --git a/llvm/tools/llvm-size/llvm-size.cpp
b/llvm/tools/llvm-size/llvm-size.cpp
index 987270e98c48..4f98a4c0ec10 100644
--- a/llvm/tools/llvm-size/llvm-size.cpp
+++ b/llvm/tools/llvm-size/llvm-size.cpp
@@ -542,9 +542,7 @@ static bool checkMachOAndArchFlags(ObjectFile *O, StringRef
Filename) {
H = MachO->MachOObjectFile::getHeader();
T = MachOObjectFile::getArchTriple(H.cputype, H.cpusubtype);
}
- if (none_of(ArchFlags, [&](const std::string &Name) {
-return Name == T.getArchName();
- })) {
+ if (!is_contained(ArchFlags, T.getArchName())) {
error("no architecture specified", Filename);
return false;
}
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[llvm-branch-commits] [llvm] 789d250 - [CodeGen, Transforms] Use *Map::lookup (NFC)
Author: Kazu Hirata
Date: 2020-12-27T09:57:27-08:00
New Revision: 789d25061363a737d6211f86f1e4a4bb10c6e4f8
URL:
https://github.com/llvm/llvm-project/commit/789d25061363a737d6211f86f1e4a4bb10c6e4f8
DIFF:
https://github.com/llvm/llvm-project/commit/789d25061363a737d6211f86f1e4a4bb10c6e4f8.diff
LOG: [CodeGen, Transforms] Use *Map::lookup (NFC)
Added:
Modified:
llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h
llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h
llvm/lib/CodeGen/MIRParser/MIParser.cpp
llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
llvm/lib/Transforms/Utils/Evaluator.cpp
llvm/lib/Transforms/Utils/SSAUpdater.cpp
llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
llvm/lib/Transforms/Vectorize/VPlan.h
Removed:
diff --git a/llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h
b/llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h
index 8a038752da0c..50b186de2b05 100644
--- a/llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h
+++ b/llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h
@@ -388,10 +388,7 @@ namespace llvm {
/// Returns an existing SUnit for this MI, or nullptr.
inline SUnit *ScheduleDAGInstrs::getSUnit(MachineInstr *MI) const {
-DenseMap::const_iterator I = MISUnitMap.find(MI);
-if (I == MISUnitMap.end())
- return nullptr;
-return I->second;
+return MISUnitMap.lookup(MI);
}
} // end namespace llvm
diff --git a/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h
b/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h
index eb8f2013f0b2..502aef481a3a 100644
--- a/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h
+++ b/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h
@@ -787,8 +787,7 @@ class DwarfDebug : public DebugHandlerBase {
}
unsigned getStringTypeLoc(const DIStringType *ST) const {
-auto I = StringTypeLocMap.find(ST);
-return I != StringTypeLocMap.end() ? I->second : 0;
+return StringTypeLocMap.lookup(ST);
}
void addStringTypeLoc(const DIStringType *ST, unsigned Loc) {
diff --git a/llvm/lib/CodeGen/MIRParser/MIParser.cpp
b/llvm/lib/CodeGen/MIRParser/MIParser.cpp
index 5ba896b7037c..43eaf86e50a6 100644
--- a/llvm/lib/CodeGen/MIRParser/MIParser.cpp
+++ b/llvm/lib/CodeGen/MIRParser/MIParser.cpp
@@ -369,10 +369,7 @@ static void initSlots2Values(const Function &F,
const Value* PerFunctionMIParsingState::getIRValue(unsigned Slot) {
if (Slots2Values.empty())
initSlots2Values(MF.getFunction(), Slots2Values);
- auto ValueInfo = Slots2Values.find(Slot);
- if (ValueInfo == Slots2Values.end())
-return nullptr;
- return ValueInfo->second;
+ return Slots2Values.lookup(Slot);
}
namespace {
@@ -3169,10 +3166,7 @@ static void initSlots2BasicBlocks(
static const BasicBlock *getIRBlockFromSlot(
unsigned Slot,
const DenseMap &Slots2BasicBlocks) {
- auto BlockInfo = Slots2BasicBlocks.find(Slot);
- if (BlockInfo == Slots2BasicBlocks.end())
-return nullptr;
- return BlockInfo->second;
+ return Slots2BasicBlocks.lookup(Slot);
}
const BasicBlock *MIParser::getIRBlock(unsigned Slot) {
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
b/llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
index ac617ecd4fd1..6bc2a6832abd 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
@@ -273,12 +273,7 @@ bool PointerReplacer::collectUsers(Instruction &I) {
return true;
}
-Value *PointerReplacer::getReplacement(Value *V) {
- auto Loc = WorkMap.find(V);
- if (Loc != WorkMap.end())
-return Loc->second;
- return nullptr;
-}
+Value *PointerReplacer::getReplacement(Value *V) { return WorkMap.lookup(V); }
void PointerReplacer::replace(Instruction *I) {
if (getReplacement(I))
diff --git a/llvm/lib/Transforms/Utils/Evaluator.cpp
b/llvm/lib/Transforms/Utils/Evaluator.cpp
index a01dc7a4e609..732b00635e29 100644
--- a/llvm/lib/Transforms/Utils/Evaluator.cpp
+++ b/llvm/lib/Transforms/Utils/Evaluator.cpp
@@ -210,11 +210,7 @@ static Constant *getInitializer(Constant *C) {
Constant *Evaluator::ComputeLoadResult(Constant *P) {
// If this memory location has been recently stored, use the stored value: it
// is the most up-to-date.
- auto findMemLoc = [this](Constant *Ptr) {
-DenseMap::const_iterator I =
-MutatedMemory.find(Ptr);
-return I != MutatedMemory.end() ? I->second : nullptr;
- };
+ auto findMemLoc = [this](Constant *Ptr) { return MutatedMemory.lookup(Ptr);
};
if (Constant *Val = findMemLoc(P))
return Val;
diff --git a/llvm/lib/Transforms/Utils/SSAUpdater.cpp
b/llvm/lib/Transforms/Utils/SSAUpdater.cpp
index 57df2334c750..c3add49a7ccd 100644
--- a/llvm/lib/Transforms/Utils/SSAUpdater.cpp
+++ b/llvm/lib/Transforms/Utils/SSAUpdater.cpp
@@ -64,8 +64,7 @@ bool SSAUpdater::HasValueForBlock(BasicBlock *BB) const {
}
Value *SSAUpdater::FindValueForBlock(BasicBlock
[llvm-branch-commits] [llvm] 8299fb8 - [Transforms] Use llvm::append_range (NFC)
Author: Kazu Hirata
Date: 2020-12-27T09:57:29-08:00
New Revision: 8299fb8f2564b807f7fd349f31d947930eabcaab
URL:
https://github.com/llvm/llvm-project/commit/8299fb8f2564b807f7fd349f31d947930eabcaab
DIFF:
https://github.com/llvm/llvm-project/commit/8299fb8f2564b807f7fd349f31d947930eabcaab.diff
LOG: [Transforms] Use llvm::append_range (NFC)
Added:
Modified:
llvm/lib/Transforms/IPO/ArgumentPromotion.cpp
llvm/lib/Transforms/IPO/LowerTypeTests.cpp
llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
llvm/lib/Transforms/Instrumentation/ControlHeightReduction.cpp
llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
llvm/lib/Transforms/Scalar/GuardWidening.cpp
llvm/lib/Transforms/Scalar/LoopSink.cpp
llvm/lib/Transforms/Scalar/LoopUnswitch.cpp
llvm/lib/Transforms/Scalar/PlaceSafepoints.cpp
llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
llvm/lib/Transforms/Utils/BuildLibCalls.cpp
llvm/lib/Transforms/Utils/InlineFunction.cpp
Removed:
diff --git a/llvm/lib/Transforms/IPO/ArgumentPromotion.cpp
b/llvm/lib/Transforms/IPO/ArgumentPromotion.cpp
index 260eb437a64a..11c8d3b7a8d6 100644
--- a/llvm/lib/Transforms/IPO/ArgumentPromotion.cpp
+++ b/llvm/lib/Transforms/IPO/ArgumentPromotion.cpp
@@ -142,7 +142,7 @@ doPromotion(Function *F, SmallPtrSetImpl
&ArgsToPromote,
// Simple byval argument? Just add all the struct element types.
Type *AgTy = cast(I->getType())->getElementType();
StructType *STy = cast(AgTy);
- Params.insert(Params.end(), STy->element_begin(), STy->element_end());
+ llvm::append_range(Params, STy->elements());
ArgAttrVec.insert(ArgAttrVec.end(), STy->getNumElements(),
AttributeSet());
++NumByValArgsPromoted;
@@ -825,7 +825,7 @@ static bool canPaddingBeAccessed(Argument *arg) {
WorkList.pop_back();
if (isa(V) || isa(V)) {
if (PtrValues.insert(V).second)
-WorkList.insert(WorkList.end(), V->user_begin(), V->user_end());
+llvm::append_range(WorkList, V->users());
} else if (StoreInst *Store = dyn_cast(V)) {
Stores.push_back(Store);
} else if (!isa(V)) {
diff --git a/llvm/lib/Transforms/IPO/LowerTypeTests.cpp
b/llvm/lib/Transforms/IPO/LowerTypeTests.cpp
index 17ffb27efa5a..8bd3036f1fc3 100644
--- a/llvm/lib/Transforms/IPO/LowerTypeTests.cpp
+++ b/llvm/lib/Transforms/IPO/LowerTypeTests.cpp
@@ -198,7 +198,7 @@ void GlobalLayoutBuilder::addFragment(const
std::set &F) {
// indices from the old fragment in this fragment do not insert any more
// indices.
std::vector &OldFragment = Fragments[OldFragmentIndex];
- Fragment.insert(Fragment.end(), OldFragment.begin(), OldFragment.end());
+ llvm::append_range(Fragment, OldFragment);
OldFragment.clear();
}
}
diff --git a/llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
b/llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
index 5c3d060f4ba1..9e962a2e0d68 100644
--- a/llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
+++ b/llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
@@ -1289,7 +1289,7 @@ void DevirtModule::applyICallBranchFunnel(VTableSlotInfo
&SlotInfo,
IRBuilder<> IRB(&CB);
std::vector Args;
Args.push_back(IRB.CreateBitCast(VCallSite.VTable, Int8PtrTy));
- Args.insert(Args.end(), CB.arg_begin(), CB.arg_end());
+ llvm::append_range(Args, CB.args());
CallBase *NewCS = nullptr;
if (isa(CB))
diff --git a/llvm/lib/Transforms/Instrumentation/ControlHeightReduction.cpp
b/llvm/lib/Transforms/Instrumentation/ControlHeightReduction.cpp
index fd734df053cd..d9416072793a 100644
--- a/llvm/lib/Transforms/Instrumentation/ControlHeightReduction.cpp
+++ b/llvm/lib/Transforms/Instrumentation/ControlHeightReduction.cpp
@@ -1247,7 +1247,7 @@ SmallVector CHR::splitScope(
SmallVector SubSplits = splitScope(
Sub, Split, &SplitConditionValues, SplitInsertPoint, Output,
SplitUnhoistables);
- NewSubs.insert(NewSubs.end(), SubSplits.begin(), SubSplits.end());
+ llvm::append_range(NewSubs, SubSplits);
}
Split->Subs = NewSubs;
}
diff --git a/llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
b/llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
index 597f413e9043..1b14b8d56994 100644
--- a/llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
+++ b/llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
@@ -581,8 +581,7 @@ class DFSanVisitor : public InstVisitor {
DataFlowSanitizer::DataFlowSanitizer(
const std::vector &ABIListFiles) {
std::vector AllABIListFiles(std::move(ABIListFiles));
- AllABIListFiles.insert(AllABIListFiles.end(), ClABIListFiles.begin(),
- ClABIListFiles.end());
+ llvm::append_range(AllABIListFiles, ClABIListFiles);
// FIXME: should we propagate vfs::FileSystem to this constructor?
ABIList.set(
[llvm-branch-commits] [llvm] 0ea3749 - [LV] Set up branch from middle block earlier.
Author: Florian Hahn
Date: 2020-12-27T18:21:12Z
New Revision: 0ea3749b3cde16d70c5f66357b623c8edf521f2b
URL:
https://github.com/llvm/llvm-project/commit/0ea3749b3cde16d70c5f66357b623c8edf521f2b
DIFF:
https://github.com/llvm/llvm-project/commit/0ea3749b3cde16d70c5f66357b623c8edf521f2b.diff
LOG: [LV] Set up branch from middle block earlier.
Previously the branch from the middle block to the scalar preheader & exit
was being set-up at the end of skeleton creation in completeLoopSkeleton.
Inserting SCEV or runtime checks may result in LCSSA phis being created,
if they are required. Adjusting branches afterwards may break those
PHIs.
To avoid this, we can instead create the branch from the middle block
to the exit after we created the middle block, so we have the final CFG
before potentially adjusting/creating PHIs.
This fixes a crash for the included test case. For the non-crashing
case, this is almost a NFC with respect to the generated code. The
only change is the order of the predecessors of the involved branch
targets.
Note an assertion was moved from LoopVersioning() to
LoopVersioning::versionLoop. Adjusting the branches means loop-simplify
form may be broken before constructing LoopVersioning. But LV only uses
LoopVersioning to annotate the loop instructions with !noalias metadata,
which does not require loop-simplify form.
This is a fix for an existing issue uncovered by D93317.
Added:
llvm/test/Transforms/LoopVectorize/skeleton-lcssa-crash.ll
Modified:
llvm/lib/Transforms/Utils/LoopVersioning.cpp
llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
llvm/test/Transforms/LoopVectorize/SystemZ/predicated-first-order-recurrence.ll
llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
Removed:
diff --git a/llvm/lib/Transforms/Utils/LoopVersioning.cpp
b/llvm/lib/Transforms/Utils/LoopVersioning.cpp
index 06e204060cb0..b54aee35d56d 100644
--- a/llvm/lib/Transforms/Utils/LoopVersioning.cpp
+++ b/llvm/lib/Transforms/Utils/LoopVersioning.cpp
@@ -45,11 +45,13 @@ LoopVersioning::LoopVersioning(const LoopAccessInfo &LAI,
Preds(LAI.getPSE().getUnionPredicate()), LAI(LAI), LI(LI), DT(DT),
SE(SE) {
assert(L->getExitBlock() && "No single exit block");
- assert(L->isLoopSimplifyForm() && "Loop is not in loop-simplify form");
}
void LoopVersioning::versionLoop(
const SmallVectorImpl &DefsUsedOutside) {
+ assert(VersionedLoop->isLoopSimplifyForm() &&
+ "Loop is not in loop-simplify form");
+
Instruction *FirstCheckInst;
Instruction *MemRuntimeCheck;
Value *SCEVRuntimeCheck;
diff --git a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
index 6ab8e5884a76..5889d5e55339 100644
--- a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+++ b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
@@ -3311,6 +3311,16 @@ Loop
*InnerLoopVectorizer::createVectorLoopSkeleton(StringRef Prefix) {
LoopScalarPreHeader =
SplitBlock(LoopMiddleBlock, LoopMiddleBlock->getTerminator(), DT, LI,
nullptr, Twine(Prefix) + "scalar.ph");
+
+ // Set up branch from middle block to the exit and scalar preheader blocks.
+ // completeLoopSkeleton will update the condition to use an iteration check,
+ // if required to decide whether to execute the remainder.
+ BranchInst *BrInst =
+ BranchInst::Create(LoopExitBlock, LoopScalarPreHeader,
Builder.getTrue());
+ auto *ScalarLatchTerm = OrigLoop->getLoopLatch()->getTerminator();
+ BrInst->setDebugLoc(ScalarLatchTerm->getDebugLoc());
+ ReplaceInstWithInst(LoopMiddleBlock->getTerminator(), BrInst);
+
// We intentionally don't let SplitBlock to update LoopInfo since
// LoopVectorBody should belong to another loop than LoopVectorPreHeader.
// LoopVectorBody is explicitly added to the correct place few lines later.
@@ -3419,24 +3429,19 @@ BasicBlock
*InnerLoopVectorizer::completeLoopSkeleton(Loop *L,
// all of the iterations in the first vector loop.
// If (N - N%VF) == N, then we *don't* need to run the remainder.
// If tail is to be folded, we know we don't need to run the remainder.
- Value *CmpN = Builder.getTrue();
if (!Cost->foldTailByMasking()) {
-CmpN = CmpInst::Create(Instruction::ICmp, CmpInst::ICMP_EQ, Count,
- VectorTripCount, "cmp.n",
- LoopMiddleBlock->getTerminator());
+Instruction *CmpN = CmpInst::Create(Instruction::ICmp, CmpInst::ICMP_EQ,
+Count, VectorTripCount, "cmp.n",
+LoopMiddleBlock->getTerminator());
// Here we use the same DebugLoc as the scalar loop latch terminator
instead
// of the corresponding compare because they may have ended up with
//
diff erent line numbers and we want to avoid awkward line stepping while
// debugging. Eg. if the compare has
[llvm-branch-commits] [llvm] 0d05c1f - [GVN] Add tests for select form of and/or (NFC)
Author: Juneyoung Lee
Date: 2020-12-28T03:39:57+09:00
New Revision: 0d05c1f40d691ad492383b6bc2fd7b0703099e07
URL:
https://github.com/llvm/llvm-project/commit/0d05c1f40d691ad492383b6bc2fd7b0703099e07
DIFF:
https://github.com/llvm/llvm-project/commit/0d05c1f40d691ad492383b6bc2fd7b0703099e07.diff
LOG: [GVN] Add tests for select form of and/or (NFC)
Added:
Modified:
llvm/test/Transforms/GVN/condprop.ll
Removed:
diff --git a/llvm/test/Transforms/GVN/condprop.ll
b/llvm/test/Transforms/GVN/condprop.ll
index 1c07ad8441ee..c2b2c9eeaeb0 100644
--- a/llvm/test/Transforms/GVN/condprop.ll
+++ b/llvm/test/Transforms/GVN/condprop.ll
@@ -79,6 +79,72 @@ nope:
ret void
}
+; CHECK-LABEL: @test3_select(
+define void @test3_select(i32 %x, i32 %y) {
+ %xz = icmp eq i32 %x, 0
+ %yz = icmp eq i32 %y, 0
+ %z = select i1 %xz, i1 %yz, i1 false
+ br i1 %z, label %both_zero, label %nope
+both_zero:
+ call void @foo(i1 %xz)
+; CHECK: call void @foo(i1 %xz)
+ call void @foo(i1 %yz)
+; CHECK: call void @foo(i1 %yz)
+ call void @bar(i32 %x)
+; CHECK: call void @bar(i32 %x)
+ call void @bar(i32 %y)
+; CHECK: call void @bar(i32 %y)
+ ret void
+nope:
+ call void @foo(i1 %z)
+; CHECK: call void @foo(i1 false)
+ ret void
+}
+
+; CHECK-LABEL: @test3_or(
+define void @test3_or(i32 %x, i32 %y) {
+ %xz = icmp ne i32 %x, 0
+ %yz = icmp ne i32 %y, 0
+ %z = or i1 %xz, %yz
+ br i1 %z, label %nope, label %both_zero
+both_zero:
+ call void @foo(i1 %xz)
+; CHECK: call void @foo(i1 false)
+ call void @foo(i1 %yz)
+; CHECK: call void @foo(i1 false)
+ call void @bar(i32 %x)
+; CHECK: call void @bar(i32 0)
+ call void @bar(i32 %y)
+; CHECK: call void @bar(i32 0)
+ ret void
+nope:
+ call void @foo(i1 %z)
+; CHECK: call void @foo(i1 true)
+ ret void
+}
+
+; CHECK-LABEL: @test3_or_select(
+define void @test3_or_select(i32 %x, i32 %y) {
+ %xz = icmp ne i32 %x, 0
+ %yz = icmp ne i32 %y, 0
+ %z = select i1 %xz, i1 true, i1 %yz
+ br i1 %z, label %nope, label %both_zero
+both_zero:
+ call void @foo(i1 %xz)
+; CHECK: call void @foo(i1 %xz)
+ call void @foo(i1 %yz)
+; CHECK: call void @foo(i1 %yz)
+ call void @bar(i32 %x)
+; CHECK: call void @bar(i32 %x)
+ call void @bar(i32 %y)
+; CHECK: call void @bar(i32 %y)
+ ret void
+nope:
+ call void @foo(i1 %z)
+; CHECK: call void @foo(i1 true)
+ ret void
+}
+
; CHECK-LABEL: @test4(
define void @test4(i1 %b, i32 %x) {
br i1 %b, label %sw, label %case3
___
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[llvm-branch-commits] [llvm] 0060f10 - [EarlyCSE] Add tests for select form of and/or (NFC)
Author: Juneyoung Lee
Date: 2020-12-28T04:19:22+09:00
New Revision: 0060f1013453d4ecaac8b62fb54044285a16a379
URL:
https://github.com/llvm/llvm-project/commit/0060f1013453d4ecaac8b62fb54044285a16a379
DIFF:
https://github.com/llvm/llvm-project/commit/0060f1013453d4ecaac8b62fb54044285a16a379.diff
LOG: [EarlyCSE] Add tests for select form of and/or (NFC)
Added:
Modified:
llvm/test/Transforms/EarlyCSE/and_or.ll
Removed:
diff --git a/llvm/test/Transforms/EarlyCSE/and_or.ll
b/llvm/test/Transforms/EarlyCSE/and_or.ll
index b70d0cea3f7f..4a63e28b5ffa 100644
--- a/llvm/test/Transforms/EarlyCSE/and_or.ll
+++ b/llvm/test/Transforms/EarlyCSE/and_or.ll
@@ -55,6 +55,35 @@ if.false:
ret i32 %y
}
+define i32 @test_02_select(i32 %a, i32 %b, i1 %c) {
+; CHECK-LABEL: @test_02_select(
+; CHECK-NEXT: entry:
+; CHECK-NEXT:[[COND:%.*]] = icmp slt i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:[[AND_COND:%.*]] = select i1 [[COND]], i1 [[C:%.*]], i1 false
+; CHECK-NEXT:br i1 [[AND_COND]], label [[IF_TRUE:%.*]], label
[[IF_FALSE:%.*]]
+; CHECK: if.true:
+; CHECK-NEXT:[[X:%.*]] = select i1 [[COND]], i32 [[A]], i32 [[B]]
+; CHECK-NEXT:ret i32 [[X]]
+; CHECK: if.false:
+; CHECK-NEXT:[[Y:%.*]] = select i1 [[COND]], i32 [[A]], i32 [[B]]
+; CHECK-NEXT:ret i32 [[Y]]
+;
+entry:
+ %cond = icmp slt i32 %a, %b
+ %and.cond = select i1 %cond, i1 %c, i1 false
+ br i1 %and.cond, label %if.true, label %if.false
+
+if.true:
+ %cond2 = icmp slt i32 %a, %b
+ %x = select i1 %cond2, i32 %a, i32 %b
+ ret i32 %x
+
+if.false:
+ %cond3 = icmp slt i32 %a, %b
+ %y = select i1 %cond3, i32 %a, i32 %b
+ ret i32 %y
+}
+
define i32 @test_03(i32 %a, i32 %b, i1 %c) {
; CHECK-LABEL: @test_03(
; CHECK-NEXT: entry:
@@ -83,6 +112,35 @@ if.false:
ret i32 %y
}
+define i32 @test_03_select(i32 %a, i32 %b, i1 %c) {
+; CHECK-LABEL: @test_03_select(
+; CHECK-NEXT: entry:
+; CHECK-NEXT:[[COND:%.*]] = icmp slt i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:[[OR_COND:%.*]] = select i1 [[COND]], i1 true, i1 [[C:%.*]]
+; CHECK-NEXT:br i1 [[OR_COND]], label [[IF_TRUE:%.*]], label
[[IF_FALSE:%.*]]
+; CHECK: if.true:
+; CHECK-NEXT:[[X:%.*]] = select i1 [[COND]], i32 [[A]], i32 [[B]]
+; CHECK-NEXT:ret i32 [[X]]
+; CHECK: if.false:
+; CHECK-NEXT:[[Y:%.*]] = select i1 [[COND]], i32 [[A]], i32 [[B]]
+; CHECK-NEXT:ret i32 [[Y]]
+;
+entry:
+ %cond = icmp slt i32 %a, %b
+ %or.cond = select i1 %cond, i1 true, i1 %c
+ br i1 %or.cond, label %if.true, label %if.false
+
+if.true:
+ %cond2 = icmp slt i32 %a, %b
+ %x = select i1 %cond2, i32 %a, i32 %b
+ ret i32 %x
+
+if.false:
+ %cond3 = icmp slt i32 %a, %b
+ %y = select i1 %cond3, i32 %a, i32 %b
+ ret i32 %y
+}
+
define i32 @test_04(i32 %a, i32 %b, i1 %c1, i1 %c2) {
; CHECK-LABEL: @test_04(
; CHECK-NEXT: entry:
@@ -113,6 +171,37 @@ if.false:
ret i32 %y
}
+define i32 @test_04_select(i32 %a, i32 %b, i1 %c1, i1 %c2) {
+; CHECK-LABEL: @test_04_select(
+; CHECK-NEXT: entry:
+; CHECK-NEXT:[[COND:%.*]] = icmp slt i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:[[AND_COND1:%.*]] = select i1 [[COND]], i1 [[C1:%.*]], i1
false
+; CHECK-NEXT:[[AND_COND2:%.*]] = select i1 [[AND_COND1]], i1 [[C2:%.*]],
i1 false
+; CHECK-NEXT:br i1 [[AND_COND2]], label [[IF_TRUE:%.*]], label
[[IF_FALSE:%.*]]
+; CHECK: if.true:
+; CHECK-NEXT:[[X:%.*]] = select i1 [[COND]], i32 [[A]], i32 [[B]]
+; CHECK-NEXT:ret i32 [[X]]
+; CHECK: if.false:
+; CHECK-NEXT:[[Y:%.*]] = select i1 [[COND]], i32 [[A]], i32 [[B]]
+; CHECK-NEXT:ret i32 [[Y]]
+;
+entry:
+ %cond = icmp slt i32 %a, %b
+ %and.cond1 = select i1 %cond, i1 %c1, i1 false
+ %and.cond2 = select i1 %and.cond1, i1 %c2, i1 false
+ br i1 %and.cond2, label %if.true, label %if.false
+
+if.true:
+ %cond2 = icmp slt i32 %a, %b
+ %x = select i1 %cond2, i32 %a, i32 %b
+ ret i32 %x
+
+if.false:
+ %cond3 = icmp slt i32 %a, %b
+ %y = select i1 %cond3, i32 %a, i32 %b
+ ret i32 %y
+}
+
define i32 @test_05(i32 %a, i32 %b, i1 %c1, i1 %c2) {
; CHECK-LABEL: @test_05(
; CHECK-NEXT: entry:
@@ -142,3 +231,34 @@ if.false:
%y = select i1 %cond3, i32 %a, i32 %b
ret i32 %y
}
+
+define i32 @test_05_select(i32 %a, i32 %b, i1 %c1, i1 %c2) {
+; CHECK-LABEL: @test_05_select(
+; CHECK-NEXT: entry:
+; CHECK-NEXT:[[COND:%.*]] = icmp slt i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:[[OR_COND1:%.*]] = select i1 [[COND]], i1 true, i1 [[C1:%.*]]
+; CHECK-NEXT:[[OR_COND2:%.*]] = select i1 [[OR_COND1]], i1 true, i1
[[C2:%.*]]
+; CHECK-NEXT:br i1 [[OR_COND2]], label [[IF_TRUE:%.*]], label
[[IF_FALSE:%.*]]
+; CHECK: if.true:
+; CHECK-NEXT:[[X:%.*]] = select i1 [[COND]], i32 [[A]], i32 [[B]]
+; CHECK-NEXT:ret i32 [[X]]
+; CHECK: if.false:
+; CHECK-NEXT:[[Y:%.*]] = select i1 [[COND]], i32 [[A]], i32 [[B]]
+; CHECK-NEXT:ret i32 [[Y]]
+;
+entry:
+ %cond = icm
[llvm-branch-commits] [llvm] f1d648b - [GVN] Use m_LogicalAnd/Or to propagate equality from branch conditions
Author: Juneyoung Lee
Date: 2020-12-28T05:28:38+09:00
New Revision: f1d648b973d32ab0e70ef20efb0f146240e50f58
URL:
https://github.com/llvm/llvm-project/commit/f1d648b973d32ab0e70ef20efb0f146240e50f58
DIFF:
https://github.com/llvm/llvm-project/commit/f1d648b973d32ab0e70ef20efb0f146240e50f58.diff
LOG: [GVN] Use m_LogicalAnd/Or to propagate equality from branch conditions
This patch makes GVN recognize `select c1, c2, false` as well as `select c1,
true, c2`
branch condition and propagate equality from these.
See llvm.org/pr48353, D93065
Differential Revision: https://reviews.llvm.org/D93841
Added:
Modified:
llvm/lib/Transforms/Scalar/GVN.cpp
llvm/test/Transforms/GVN/condprop.ll
Removed:
diff --git a/llvm/lib/Transforms/Scalar/GVN.cpp
b/llvm/lib/Transforms/Scalar/GVN.cpp
index 32b38fd97f31..5d37eb73f9b1 100644
--- a/llvm/lib/Transforms/Scalar/GVN.cpp
+++ b/llvm/lib/Transforms/Scalar/GVN.cpp
@@ -2087,8 +2087,8 @@ bool GVN::propagateEquality(Value *LHS, Value *RHS, const
BasicBlockEdge &Root,
// If "A && B" is known true then both A and B are known true. If "A || B"
// is known false then both A and B are known false.
Value *A, *B;
-if ((isKnownTrue && match(LHS, m_And(m_Value(A), m_Value(B ||
-(isKnownFalse && match(LHS, m_Or(m_Value(A), m_Value(B) {
+if ((isKnownTrue && match(LHS, m_LogicalAnd(m_Value(A), m_Value(B ||
+(isKnownFalse && match(LHS, m_LogicalOr(m_Value(A), m_Value(B) {
Worklist.push_back(std::make_pair(A, RHS));
Worklist.push_back(std::make_pair(B, RHS));
continue;
diff --git a/llvm/test/Transforms/GVN/condprop.ll
b/llvm/test/Transforms/GVN/condprop.ll
index c2b2c9eeaeb0..bb7befce9e82 100644
--- a/llvm/test/Transforms/GVN/condprop.ll
+++ b/llvm/test/Transforms/GVN/condprop.ll
@@ -87,13 +87,13 @@ define void @test3_select(i32 %x, i32 %y) {
br i1 %z, label %both_zero, label %nope
both_zero:
call void @foo(i1 %xz)
-; CHECK: call void @foo(i1 %xz)
+; CHECK: call void @foo(i1 true)
call void @foo(i1 %yz)
-; CHECK: call void @foo(i1 %yz)
+; CHECK: call void @foo(i1 true)
call void @bar(i32 %x)
-; CHECK: call void @bar(i32 %x)
+; CHECK: call void @bar(i32 0)
call void @bar(i32 %y)
-; CHECK: call void @bar(i32 %y)
+; CHECK: call void @bar(i32 0)
ret void
nope:
call void @foo(i1 %z)
@@ -131,13 +131,13 @@ define void @test3_or_select(i32 %x, i32 %y) {
br i1 %z, label %nope, label %both_zero
both_zero:
call void @foo(i1 %xz)
-; CHECK: call void @foo(i1 %xz)
+; CHECK: call void @foo(i1 false)
call void @foo(i1 %yz)
-; CHECK: call void @foo(i1 %yz)
+; CHECK: call void @foo(i1 false)
call void @bar(i32 %x)
-; CHECK: call void @bar(i32 %x)
+; CHECK: call void @bar(i32 0)
call void @bar(i32 %y)
-; CHECK: call void @bar(i32 %y)
+; CHECK: call void @bar(i32 0)
ret void
nope:
call void @foo(i1 %z)
___
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[llvm-branch-commits] [llvm] d3f1f7b - [EarlyCSE] Use m_LogicalAnd/Or matchers to handle branch conditions
Author: Juneyoung Lee
Date: 2020-12-28T05:36:26+09:00
New Revision: d3f1f7b6bca585b76d40422e8076d59113e3bb80
URL:
https://github.com/llvm/llvm-project/commit/d3f1f7b6bca585b76d40422e8076d59113e3bb80
DIFF:
https://github.com/llvm/llvm-project/commit/d3f1f7b6bca585b76d40422e8076d59113e3bb80.diff
LOG: [EarlyCSE] Use m_LogicalAnd/Or matchers to handle branch conditions
EarlyCSE's handleBranchCondition says:
```
// If the condition is AND operation, we can propagate its operands into the
// true branch. If it is OR operation, we can propagate them into the false
// branch.
```
This holds for the corresponding select patterns as well.
This is a part of an ongoing work for disabling buggy select->and/or
transformations.
See llvm.org/pr48353 and D93065 for more context
Proof:
and: https://alive2.llvm.org/ce/z/MQWodU
or: https://alive2.llvm.org/ce/z/9GLbB_
Reviewed By: nikic
Differential Revision: https://reviews.llvm.org/D93842
Added:
Modified:
llvm/lib/Transforms/Scalar/EarlyCSE.cpp
llvm/test/Transforms/EarlyCSE/and_or.ll
Removed:
diff --git a/llvm/lib/Transforms/Scalar/EarlyCSE.cpp
b/llvm/lib/Transforms/Scalar/EarlyCSE.cpp
index be2860960500..f005f69519f7 100644
--- a/llvm/lib/Transforms/Scalar/EarlyCSE.cpp
+++ b/llvm/lib/Transforms/Scalar/EarlyCSE.cpp
@@ -1033,9 +1033,14 @@ bool EarlyCSE::handleBranchCondition(Instruction
*CondInst,
auto *TorF = (BI->getSuccessor(0) == BB)
? ConstantInt::getTrue(BB->getContext())
: ConstantInt::getFalse(BB->getContext());
- auto MatchBinOp = [](Instruction *I, unsigned Opcode) {
-if (BinaryOperator *BOp = dyn_cast(I))
- return BOp->getOpcode() == Opcode;
+ auto MatchBinOp = [](Instruction *I, unsigned Opcode, Value *&LHS,
+ Value *&RHS) {
+if (Opcode == Instruction::And &&
+match(I, m_LogicalAnd(m_Value(LHS), m_Value(RHS
+ return true;
+else if (Opcode == Instruction::Or &&
+ match(I, m_LogicalOr(m_Value(LHS), m_Value(RHS
+ return true;
return false;
};
// If the condition is AND operation, we can propagate its operands into the
@@ -1066,8 +1071,9 @@ bool EarlyCSE::handleBranchCondition(Instruction
*CondInst,
}
}
-if (MatchBinOp(Curr, PropagateOpcode))
- for (auto &Op : cast(Curr)->operands())
+Value *LHS, *RHS;
+if (MatchBinOp(Curr, PropagateOpcode, LHS, RHS))
+ for (auto &Op : { LHS, RHS })
if (Instruction *OPI = dyn_cast(Op))
if (SimpleValue::canHandle(OPI) && Visited.insert(OPI).second)
WorkList.push_back(OPI);
diff --git a/llvm/test/Transforms/EarlyCSE/and_or.ll
b/llvm/test/Transforms/EarlyCSE/and_or.ll
index 4a63e28b5ffa..2c04e7e3cf90 100644
--- a/llvm/test/Transforms/EarlyCSE/and_or.ll
+++ b/llvm/test/Transforms/EarlyCSE/and_or.ll
@@ -62,8 +62,7 @@ define i32 @test_02_select(i32 %a, i32 %b, i1 %c) {
; CHECK-NEXT:[[AND_COND:%.*]] = select i1 [[COND]], i1 [[C:%.*]], i1 false
; CHECK-NEXT:br i1 [[AND_COND]], label [[IF_TRUE:%.*]], label
[[IF_FALSE:%.*]]
; CHECK: if.true:
-; CHECK-NEXT:[[X:%.*]] = select i1 [[COND]], i32 [[A]], i32 [[B]]
-; CHECK-NEXT:ret i32 [[X]]
+; CHECK-NEXT:ret i32 [[A]]
; CHECK: if.false:
; CHECK-NEXT:[[Y:%.*]] = select i1 [[COND]], i32 [[A]], i32 [[B]]
; CHECK-NEXT:ret i32 [[Y]]
@@ -122,8 +121,7 @@ define i32 @test_03_select(i32 %a, i32 %b, i1 %c) {
; CHECK-NEXT:[[X:%.*]] = select i1 [[COND]], i32 [[A]], i32 [[B]]
; CHECK-NEXT:ret i32 [[X]]
; CHECK: if.false:
-; CHECK-NEXT:[[Y:%.*]] = select i1 [[COND]], i32 [[A]], i32 [[B]]
-; CHECK-NEXT:ret i32 [[Y]]
+; CHECK-NEXT:ret i32 [[B]]
;
entry:
%cond = icmp slt i32 %a, %b
@@ -179,8 +177,7 @@ define i32 @test_04_select(i32 %a, i32 %b, i1 %c1, i1 %c2) {
; CHECK-NEXT:[[AND_COND2:%.*]] = select i1 [[AND_COND1]], i1 [[C2:%.*]],
i1 false
; CHECK-NEXT:br i1 [[AND_COND2]], label [[IF_TRUE:%.*]], label
[[IF_FALSE:%.*]]
; CHECK: if.true:
-; CHECK-NEXT:[[X:%.*]] = select i1 [[COND]], i32 [[A]], i32 [[B]]
-; CHECK-NEXT:ret i32 [[X]]
+; CHECK-NEXT:ret i32 [[A]]
; CHECK: if.false:
; CHECK-NEXT:[[Y:%.*]] = select i1 [[COND]], i32 [[A]], i32 [[B]]
; CHECK-NEXT:ret i32 [[Y]]
@@ -243,8 +240,7 @@ define i32 @test_05_select(i32 %a, i32 %b, i1 %c1, i1 %c2) {
; CHECK-NEXT:[[X:%.*]] = select i1 [[COND]], i32 [[A]], i32 [[B]]
; CHECK-NEXT:ret i32 [[X]]
; CHECK: if.false:
-; CHECK-NEXT:[[Y:%.*]] = select i1 [[COND]], i32 [[A]], i32 [[B]]
-; CHECK-NEXT:ret i32 [[Y]]
+; CHECK-NEXT:ret i32 [[B]]
;
entry:
%cond = icmp slt i32 %a, %b
___
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[llvm-branch-commits] [llvm] eca40c3 - [ValueTracking] Add unit tests for isKnownNonZero, isImpliedCondition (NFC)
Author: Juneyoung Lee
Date: 2020-12-28T06:32:57+09:00
New Revision: eca40c36ef1c02877d957e12135faec12a5b3c26
URL:
https://github.com/llvm/llvm-project/commit/eca40c36ef1c02877d957e12135faec12a5b3c26
DIFF:
https://github.com/llvm/llvm-project/commit/eca40c36ef1c02877d957e12135faec12a5b3c26.diff
LOG: [ValueTracking] Add unit tests for isKnownNonZero, isImpliedCondition (NFC)
Added:
Modified:
llvm/unittests/Analysis/ValueTrackingTest.cpp
Removed:
diff --git a/llvm/unittests/Analysis/ValueTrackingTest.cpp
b/llvm/unittests/Analysis/ValueTrackingTest.cpp
index 721a342040ba..e9d53efbf76f 100644
--- a/llvm/unittests/Analysis/ValueTrackingTest.cpp
+++ b/llvm/unittests/Analysis/ValueTrackingTest.cpp
@@ -67,6 +67,9 @@ class ValueTrackingTest : public testing::Test {
A = findInstructionByNameOrNull(F, "A");
ASSERT_TRUE(A) << "@test must have an instruction %A";
+A2 = findInstructionByNameOrNull(F, "A2");
+A3 = findInstructionByNameOrNull(F, "A3");
+A4 = findInstructionByNameOrNull(F, "A4");
CxtI = findInstructionByNameOrNull(F, "CxtI");
CxtI2 = findInstructionByNameOrNull(F, "CxtI2");
@@ -77,6 +80,8 @@ class ValueTrackingTest : public testing::Test {
std::unique_ptr M;
Function *F = nullptr;
Instruction *A = nullptr;
+ // Instructions (optional)
+ Instruction *A2 = nullptr, *A3 = nullptr, *A4 = nullptr;
// Context instructions (optional)
Instruction *CxtI = nullptr, *CxtI2 = nullptr, *CxtI3 = nullptr;
@@ -1004,6 +1009,68 @@ TEST_F(ComputeKnownBitsTest, ComputeKnownMulBits) {
expectKnownBits(/*zero*/ 95u, /*one*/ 32u);
}
+TEST_F(ValueTrackingTest, KnownNonZeroFromDomCond) {
+ parseAssembly(R"(
+declare i8* @f_i8()
+define void @test(i1 %c) {
+ %A = call i8* @f_i8()
+ %B = call i8* @f_i8()
+ %c1 = icmp ne i8* %A, null
+ %cond = and i1 %c1, %c
+ br i1 %cond, label %T, label %Q
+T:
+ %CxtI = add i32 0, 0
+ ret void
+Q:
+ %CxtI2 = add i32 0, 0
+ ret void
+}
+ )");
+ AssumptionCache AC(*F);
+ DominatorTree DT(*F);
+ DataLayout DL = M->getDataLayout();
+ EXPECT_EQ(isKnownNonZero(A, DL, 0, &AC, CxtI, &DT), true);
+ EXPECT_EQ(isKnownNonZero(A, DL, 0, &AC, CxtI2, &DT), false);
+}
+
+TEST_F(ValueTrackingTest, IsImpliedConditionAnd) {
+ parseAssembly(R"(
+define void @test(i32 %x, i32 %y) {
+ %c1 = icmp ult i32 %x, 10
+ %c2 = icmp ult i32 %y, 15
+ %A = and i1 %c1, %c2
+ ; x < 10 /\ y < 15
+ %A2 = icmp ult i32 %x, 20
+ %A3 = icmp uge i32 %y, 20
+ %A4 = icmp ult i32 %x, 5
+ ret void
+}
+ )");
+ DataLayout DL = M->getDataLayout();
+ EXPECT_EQ(isImpliedCondition(A, A2, DL), true);
+ EXPECT_EQ(isImpliedCondition(A, A3, DL), false);
+ EXPECT_EQ(isImpliedCondition(A, A4, DL), None);
+}
+
+TEST_F(ValueTrackingTest, IsImpliedConditionOr) {
+ parseAssembly(R"(
+define void @test(i32 %x, i32 %y) {
+ %c1 = icmp ult i32 %x, 10
+ %c2 = icmp ult i32 %y, 15
+ %A = or i1 %c1, %c2 ; negated
+ ; x >= 10 /\ y >= 15
+ %A2 = icmp ult i32 %x, 5
+ %A3 = icmp uge i32 %y, 10
+ %A4 = icmp ult i32 %x, 15
+ ret void
+}
+ )");
+ DataLayout DL = M->getDataLayout();
+ EXPECT_EQ(isImpliedCondition(A, A2, DL, false), false);
+ EXPECT_EQ(isImpliedCondition(A, A3, DL, false), true);
+ EXPECT_EQ(isImpliedCondition(A, A4, DL, false), None);
+}
+
TEST_F(ComputeKnownBitsTest, KnownNonZeroShift) {
// %q is known nonzero without known bits.
// Because %q is nonzero, %A[0] is known to be zero.
___
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[llvm-branch-commits] [llvm] 4ad4190 - [GVN] Correctly set modified status when doing PRE on indices.
Author: Florian Hahn
Date: 2020-12-27T21:58:31Z
New Revision: 4ad41902e8c7481ccf3cdf6e618dfcd1e1fc10fc
URL:
https://github.com/llvm/llvm-project/commit/4ad41902e8c7481ccf3cdf6e618dfcd1e1fc10fc
DIFF:
https://github.com/llvm/llvm-project/commit/4ad41902e8c7481ccf3cdf6e618dfcd1e1fc10fc.diff
LOG: [GVN] Correctly set modified status when doing PRE on indices.
This patch updates GVN to correctly return the modified status, if PRE
is performed on indices. It fixes a crash when building the test-suite
with EXPENSIVE_CHECKS and LTO.
Added:
llvm/test/Transforms/GVN/PRE/modified-status.ll
Modified:
llvm/lib/Transforms/Scalar/GVN.cpp
llvm/test/Transforms/GVN/PRE/pre-gep-load.ll
Removed:
diff --git a/llvm/lib/Transforms/Scalar/GVN.cpp
b/llvm/lib/Transforms/Scalar/GVN.cpp
index 5d37eb73f9b1..30d00758c662 100644
--- a/llvm/lib/Transforms/Scalar/GVN.cpp
+++ b/llvm/lib/Transforms/Scalar/GVN.cpp
@@ -1472,13 +1472,14 @@ bool GVN::processNonLocalLoad(LoadInst *LI) {
return false;
}
+ bool Changed = false;
// If this load follows a GEP, see if we can PRE the indices before
analyzing.
if (GetElementPtrInst *GEP = dyn_cast(LI->getOperand(0)))
{
for (GetElementPtrInst::op_iterator OI = GEP->idx_begin(),
OE = GEP->idx_end();
OI != OE; ++OI)
if (Instruction *I = dyn_cast(OI->get()))
-performScalarPRE(I);
+Changed |= performScalarPRE(I);
}
// Step 2: Analyze the availability of the load
@@ -1489,7 +1490,7 @@ bool GVN::processNonLocalLoad(LoadInst *LI) {
// If we have no predecessors that produce a known value for this load, exit
// early.
if (ValuesPerBlock.empty())
-return false;
+return Changed;
// Step 3: Eliminate fully redundancy.
//
@@ -1521,12 +1522,12 @@ bool GVN::processNonLocalLoad(LoadInst *LI) {
// Step 4: Eliminate partial redundancy.
if (!isPREEnabled() || !isLoadPREEnabled())
-return false;
+return Changed;
if (!isLoadInLoopPREEnabled() && this->LI &&
this->LI->getLoopFor(LI->getParent()))
-return false;
+return Changed;
- return PerformLoadPRE(LI, ValuesPerBlock, UnavailableBlocks);
+ return Changed || PerformLoadPRE(LI, ValuesPerBlock, UnavailableBlocks);
}
static bool impliesEquivalanceIfTrue(CmpInst* Cmp) {
diff --git a/llvm/test/Transforms/GVN/PRE/modified-status.ll
b/llvm/test/Transforms/GVN/PRE/modified-status.ll
new file mode 100644
index ..6a329db51d7c
--- /dev/null
+++ b/llvm/test/Transforms/GVN/PRE/modified-status.ll
@@ -0,0 +1,60 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -gvn -S %s | FileCheck %s
+
+; Make sure GVN correctly sets the modified status when doing PRE.
+
+define i32 @test(i64 %v, i32* %ptr.1, i32** %ptr.2, i1 %c) {
+; CHECK-LABEL: @test(
+; CHECK-NEXT: entry:
+; CHECK-NEXT:[[L_0:%.*]] = load i32, i32* [[PTR_1:%.*]], align 4
+; CHECK-NEXT:br i1 [[C:%.*]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
+; CHECK: if.then:
+; CHECK-NEXT:ret i32 10
+; CHECK: if.end:
+; CHECK-NEXT:[[L_0_EXT:%.*]] = zext i32 [[L_0]] to i64
+; CHECK-NEXT:[[C_2:%.*]] = icmp eq i64 [[L_0_EXT]], 10
+; CHECK-NEXT:br i1 [[C_2]], label [[IF_2_END:%.*]], label [[IF_2_THEN:%.*]]
+; CHECK: if.2.then:
+; CHECK-NEXT:[[GEP_1:%.*]] = getelementptr inbounds i32, i32* [[PTR_1]],
i64 [[V:%.*]]
+; CHECK-NEXT:[[L_2:%.*]] = load i32, i32* [[GEP_1]], align 4
+; CHECK-NEXT:[[DOTPRE:%.*]] = zext i32 [[L_2]] to i64
+; CHECK-NEXT:br label [[IF_2_END]]
+; CHECK: if.2.end:
+; CHECK-NEXT:[[REP_0_EXT_PRE_PHI:%.*]] = phi i64 [ [[DOTPRE]],
[[IF_2_THEN]] ], [ 10, [[IF_END]] ]
+; CHECK-NEXT:[[REP_0:%.*]] = phi i32 [ [[L_2]], [[IF_2_THEN]] ], [
[[L_0]], [[IF_END]] ]
+; CHECK-NEXT:[[L_3:%.*]] = load i32*, i32** [[PTR_2:%.*]], align 8
+; CHECK-NEXT:[[GEP_2:%.*]] = getelementptr inbounds i32, i32* [[PTR_1]],
i64 [[REP_0_EXT_PRE_PHI]]
+; CHECK-NEXT:[[L_4:%.*]] = load i32, i32* [[GEP_2]], align 4
+; CHECK-NEXT:[[GEP_3:%.*]] = getelementptr inbounds i32, i32* [[L_3]], i64
10
+; CHECK-NEXT:[[L_5:%.*]] = load i32, i32* [[GEP_3]], align 4
+; CHECK-NEXT:[[R:%.*]] = add i32 [[L_4]], [[L_5]]
+; CHECK-NEXT:ret i32 [[R]]
+;
+entry:
+ %l.0 = load i32, i32* %ptr.1, align 4
+ br i1 %c, label %if.then, label %if.end
+
+if.then: ; preds = %entry
+ ret i32 10
+
+if.end: ; preds = %entry
+ %l.0.ext = zext i32 %l.0 to i64
+ %c.2 = icmp eq i64 %l.0.ext, 10
+ br i1 %c.2, label %if.2.end, label %if.2.then
+
+if.2.then: ; preds = %if.end
+ %gep.1 = getelementptr inbounds i32, i32* %ptr.1, i64 %v
+ %l.2 = load i32, i32* %gep.1, align 4
+ br label %if.2.end
+
+if.2.end:
[llvm-branch-commits] [llvm] 860199d - [ValueTracking] Use m_LogicalAnd/Or to look into conditions
Author: Juneyoung Lee
Date: 2020-12-28T08:32:45+09:00
New Revision: 860199dfbe60d78a7da6406622b635a2d4435db3
URL:
https://github.com/llvm/llvm-project/commit/860199dfbe60d78a7da6406622b635a2d4435db3
DIFF:
https://github.com/llvm/llvm-project/commit/860199dfbe60d78a7da6406622b635a2d4435db3.diff
LOG: [ValueTracking] Use m_LogicalAnd/Or to look into conditions
This patch updates isImpliedCondition/isKnownNonZero to look into select form of
and/or as well.
See llvm.org/pr48353 and D93065 for more context
Reviewed By: nikic
Differential Revision: https://reviews.llvm.org/D93845
Added:
Modified:
llvm/lib/Analysis/ValueTracking.cpp
llvm/unittests/Analysis/ValueTrackingTest.cpp
Removed:
diff --git a/llvm/lib/Analysis/ValueTracking.cpp
b/llvm/lib/Analysis/ValueTracking.cpp
index 29091806cff3..25f6be2b10dd 100644
--- a/llvm/lib/Analysis/ValueTracking.cpp
+++ b/llvm/lib/Analysis/ValueTracking.cpp
@@ -2131,13 +2131,12 @@ static bool isKnownNonNullFromDominatingCondition(const
Value *V,
// correct to assume that all conditions of AND are met in true branch.
// TODO: Support similar logic of OR and EQ predicate?
if (NonNullIfTrue)
- if (auto *BO = dyn_cast(Curr))
-if (BO->getOpcode() == Instruction::And) {
- for (auto *BOU : BO->users())
-if (Visited.insert(BOU).second)
- WorkList.push_back(BOU);
- continue;
-}
+ if (match(Curr, m_LogicalAnd(m_Value(), m_Value( {
+for (auto *CurrU : Curr->users())
+ if (Visited.insert(CurrU).second)
+WorkList.push_back(CurrU);
+continue;
+ }
if (const BranchInst *BI = dyn_cast(Curr)) {
assert(BI->isConditional() && "uses a comparison!");
@@ -6156,25 +6155,25 @@ static Optional isImpliedCondICmps(const ICmpInst
*LHS,
/// Return true if LHS implies RHS is true. Return false if LHS implies RHS is
/// false. Otherwise, return None if we can't infer anything. We expect the
-/// RHS to be an icmp and the LHS to be an 'and' or an 'or' instruction.
+/// RHS to be an icmp and the LHS to be an 'and', 'or', or a 'select'
instruction.
static Optional
-isImpliedCondAndOr(const BinaryOperator *LHS, CmpInst::Predicate RHSPred,
+isImpliedCondAndOr(const Instruction *LHS, CmpInst::Predicate RHSPred,
const Value *RHSOp0, const Value *RHSOp1,
-
const DataLayout &DL, bool LHSIsTrue, unsigned Depth) {
- // The LHS must be an 'or' or an 'and' instruction.
+ // The LHS must be an 'or', 'and', or a 'select' instruction.
assert((LHS->getOpcode() == Instruction::And ||
- LHS->getOpcode() == Instruction::Or) &&
- "Expected LHS to be 'and' or 'or'.");
+ LHS->getOpcode() == Instruction::Or ||
+ LHS->getOpcode() == Instruction::Select) &&
+ "Expected LHS to be 'and', 'or', or 'select'.");
assert(Depth <= MaxAnalysisRecursionDepth && "Hit recursion limit");
// If the result of an 'or' is false, then we know both legs of the 'or' are
// false. Similarly, if the result of an 'and' is true, then we know both
// legs of the 'and' are true.
- Value *ALHS, *ARHS;
- if ((!LHSIsTrue && match(LHS, m_Or(m_Value(ALHS), m_Value(ARHS ||
- (LHSIsTrue && match(LHS, m_And(m_Value(ALHS), m_Value(ARHS) {
+ const Value *ALHS, *ARHS;
+ if ((!LHSIsTrue && match(LHS, m_LogicalOr(m_Value(ALHS), m_Value(ARHS ||
+ (LHSIsTrue && match(LHS, m_LogicalAnd(m_Value(ALHS), m_Value(ARHS) {
// FIXME: Make this non-recursion.
if (Optional Implication = isImpliedCondition(
ALHS, RHSPred, RHSOp0, RHSOp1, DL, LHSIsTrue, Depth + 1))
@@ -6215,13 +6214,14 @@ llvm::isImpliedCondition(const Value *LHS,
CmpInst::Predicate RHSPred,
return isImpliedCondICmps(LHSCmp, RHSPred, RHSOp0, RHSOp1, DL, LHSIsTrue,
Depth);
- /// The LHS should be an 'or' or an 'and' instruction. We expect the RHS to
- /// be / an icmp. FIXME: Add support for and/or on the RHS.
- const BinaryOperator *LHSBO = dyn_cast(LHS);
- if (LHSBO) {
-if ((LHSBO->getOpcode() == Instruction::And ||
- LHSBO->getOpcode() == Instruction::Or))
- return isImpliedCondAndOr(LHSBO, RHSPred, RHSOp0, RHSOp1, DL, LHSIsTrue,
+ /// The LHS should be an 'or', 'and', or a 'select' instruction. We expect
+ /// the RHS to be an icmp.
+ /// FIXME: Add support for and/or/select on the RHS.
+ if (const Instruction *LHSI = dyn_cast(LHS)) {
+if ((LHSI->getOpcode() == Instruction::And ||
+ LHSI->getOpcode() == Instruction::Or ||
+ LHSI->getOpcode() == Instruction::Select))
+ return isImpliedCondAndOr(LHSI, RHSPred, RHSOp0, RHSOp1, DL, LHSIsTrue,
Depth);
}
return None;
diff --git a/llvm/unittests/Analys
[llvm-branch-commits] [llvm] d76c1d2 - [RS4GC] Lazily set changed flag when folding single entry phis
Author: Yevgeny Rouban
Date: 2020-12-28T10:54:21+07:00
New Revision: d76c1d2247af599a67fcfee6b1ebfcffed99ee7c
URL:
https://github.com/llvm/llvm-project/commit/d76c1d2247af599a67fcfee6b1ebfcffed99ee7c
DIFF:
https://github.com/llvm/llvm-project/commit/d76c1d2247af599a67fcfee6b1ebfcffed99ee7c.diff
LOG: [RS4GC] Lazily set changed flag when folding single entry phis
The function FoldSingleEntryPHINodes() is changed to return if
it has changed IR or not. This return value is used by RS4GC to
set the MadeChange flag respectively.
Reviewed By: reames
Differential Revision: https://reviews.llvm.org/D93810
Added:
Modified:
llvm/include/llvm/Transforms/Utils/BasicBlockUtils.h
llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
Removed:
diff --git a/llvm/include/llvm/Transforms/Utils/BasicBlockUtils.h
b/llvm/include/llvm/Transforms/Utils/BasicBlockUtils.h
index 7b8e2be17fa2..64c569de1f58 100644
--- a/llvm/include/llvm/Transforms/Utils/BasicBlockUtils.h
+++ b/llvm/include/llvm/Transforms/Utils/BasicBlockUtils.h
@@ -74,7 +74,7 @@ bool EliminateUnreachableBlocks(Function &F, DomTreeUpdater
*DTU = nullptr,
/// in it, fold them away. This handles the case when all entries to the PHI
/// nodes in a block are guaranteed equal, such as when the block has exactly
/// one predecessor.
-void FoldSingleEntryPHINodes(BasicBlock *BB,
+bool FoldSingleEntryPHINodes(BasicBlock *BB,
MemoryDependenceResults *MemDep = nullptr);
/// Examine each PHI in the given block and delete it if it is dead. Also
diff --git a/llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
b/llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
index 663770298ee0..68ddebf113d1 100644
--- a/llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
+++ b/llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
@@ -2735,10 +2735,8 @@ bool RewriteStatepointsForGC::runOnFunction(Function &F,
DominatorTree &DT,
// of liveness sets for no good reason. It may be harder to do this post
// insertion since relocations and base phis can confuse things.
for (BasicBlock &BB : F)
-if (BB.getUniquePredecessor()) {
- MadeChange = true;
- FoldSingleEntryPHINodes(&BB);
-}
+if (BB.getUniquePredecessor())
+ MadeChange |= FoldSingleEntryPHINodes(&BB);
// Before we start introducing relocations, we want to tweak the IR a bit to
// avoid unfortunate code generation effects. The main example is that we
diff --git a/llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
b/llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
index 14795d450d3d..5b8bc184daca 100644
--- a/llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
+++ b/llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
@@ -136,9 +136,10 @@ bool llvm::EliminateUnreachableBlocks(Function &F,
DomTreeUpdater *DTU,
return !DeadBlocks.empty();
}
-void llvm::FoldSingleEntryPHINodes(BasicBlock *BB,
+bool llvm::FoldSingleEntryPHINodes(BasicBlock *BB,
MemoryDependenceResults *MemDep) {
- if (!isa(BB->begin())) return;
+ if (!isa(BB->begin()))
+return false;
while (PHINode *PN = dyn_cast(BB->begin())) {
if (PN->getIncomingValue(0) != PN)
@@ -151,6 +152,7 @@ void llvm::FoldSingleEntryPHINodes(BasicBlock *BB,
PN->eraseFromParent();
}
+ return true;
}
bool llvm::DeleteDeadPHIs(BasicBlock *BB, const TargetLibraryInfo *TLI,
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[llvm-branch-commits] [llvm] 31c2b93 - [MachineSink] add threshold in machinesink pass to reduce compiling time.
Author: Chen Zheng
Date: 2020-12-27T23:23:07-05:00
New Revision: 31c2b93d83f63ce7f9bb4977f58de2e00bf18e0f
URL:
https://github.com/llvm/llvm-project/commit/31c2b93d83f63ce7f9bb4977f58de2e00bf18e0f
DIFF:
https://github.com/llvm/llvm-project/commit/31c2b93d83f63ce7f9bb4977f58de2e00bf18e0f.diff
LOG: [MachineSink] add threshold in machinesink pass to reduce compiling time.
Added:
Modified:
llvm/lib/CodeGen/MachineSink.cpp
Removed:
diff --git a/llvm/lib/CodeGen/MachineSink.cpp
b/llvm/lib/CodeGen/MachineSink.cpp
index 0abdf897b319..265ca6dcb894 100644
--- a/llvm/lib/CodeGen/MachineSink.cpp
+++ b/llvm/lib/CodeGen/MachineSink.cpp
@@ -79,6 +79,18 @@ static cl::opt SplitEdgeProbabilityThreshold(
"splitted critical edge"),
cl::init(40), cl::Hidden);
+static cl::opt SinkLoadInstsPerBlockThreshold(
+"machine-sink-load-instrs-threshold",
+cl::desc("Do not try to find alias store for a load if there is a in-path "
+ "block whose instruction number is higher than this threshold."),
+cl::init(2000), cl::Hidden);
+
+static cl::opt SinkLoadBlocksThreshold(
+"machine-sink-load-blocks-threshold",
+cl::desc("Do not try to find alias store for a load if the block number in
"
+ "the straight line is higher than this threshold."),
+cl::init(20), cl::Hidden);
+
STATISTIC(NumSunk, "Number of machine instructions sunk");
STATISTIC(NumSplit, "Number of critical edges split");
STATISTIC(NumCoalesces, "Number of copies coalesced");
@@ -1020,6 +1032,7 @@ bool MachineSinking::hasStoreBetween(MachineBasicBlock
*From,
bool SawStore = false;
bool HasAliasedStore = false;
DenseSet HandledBlocks;
+ DenseSet HandledDomBlocks;
// Go through all reachable blocks from From.
for (MachineBasicBlock *BB : depth_first(From)) {
// We insert the instruction at the start of block To, so no need to worry
@@ -1036,10 +1049,33 @@ bool MachineSinking::hasStoreBetween(MachineBasicBlock
*From,
HandledBlocks.insert(BB);
// To post dominates BB, it must be a path from block From.
if (PDT->dominates(To, BB)) {
+ if (!HandledDomBlocks.count(BB))
+HandledDomBlocks.insert(BB);
+
+ // If this BB is too big or the block number in straight line between
From
+ // and To is too big, stop searching to save compiling time.
+ if (BB->size() > SinkLoadInstsPerBlockThreshold ||
+ HandledDomBlocks.size() > SinkLoadBlocksThreshold) {
+for (auto *DomBB : HandledDomBlocks) {
+ if (DomBB != BB && DT->dominates(DomBB, BB))
+HasStoreCache[std::make_pair(DomBB, To)] = true;
+ else if(DomBB != BB && DT->dominates(BB, DomBB))
+HasStoreCache[std::make_pair(From, DomBB)] = true;
+}
+HasStoreCache[BlockPair] = true;
+return true;
+ }
+
for (MachineInstr &I : *BB) {
// Treat as alias conservatively for a call or an ordered memory
// operation.
if (I.isCall() || I.hasOrderedMemoryRef()) {
+ for (auto *DomBB : HandledDomBlocks) {
+if (DomBB != BB && DT->dominates(DomBB, BB))
+ HasStoreCache[std::make_pair(DomBB, To)] = true;
+else if(DomBB != BB && DT->dominates(BB, DomBB))
+ HasStoreCache[std::make_pair(From, DomBB)] = true;
+ }
HasStoreCache[BlockPair] = true;
return true;
}
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[llvm-branch-commits] [compiler-rt] fde3ae8 - [asan][memprof] Declare _DYNAMIC and fix -Wparentheses
Author: Fangrui Song
Date: 2020-12-27T20:28:59-08:00
New Revision: fde3ae88ee4236d6ecb8178c6c893df5a5a04437
URL:
https://github.com/llvm/llvm-project/commit/fde3ae88ee4236d6ecb8178c6c893df5a5a04437
DIFF:
https://github.com/llvm/llvm-project/commit/fde3ae88ee4236d6ecb8178c6c893df5a5a04437.diff
LOG: [asan][memprof] Declare _DYNAMIC and fix -Wparentheses
Declare `extern ElfW(Dyn) _DYNAMIC[];` so that it will trivially work on musl.
Added:
Modified:
compiler-rt/lib/asan/asan_linux.cpp
compiler-rt/lib/memprof/memprof_linux.cpp
compiler-rt/lib/memprof/memprof_mapping.h
Removed:
diff --git a/compiler-rt/lib/asan/asan_linux.cpp
b/compiler-rt/lib/asan/asan_linux.cpp
index fb1a442b3d43..4bcbe5d02e33 100644
--- a/compiler-rt/lib/asan/asan_linux.cpp
+++ b/compiler-rt/lib/asan/asan_linux.cpp
@@ -55,6 +55,7 @@ extern Elf_Dyn _DYNAMIC;
#else
#include
#include
+extern ElfW(Dyn) _DYNAMIC[];
#endif
// x86-64 FreeBSD 9.2 and older define 'ucontext_t' incorrectly in
@@ -84,7 +85,7 @@ bool IsSystemHeapAddress (uptr addr) { return false; }
void *AsanDoesNotSupportStaticLinkage() {
// This will fail to link with -static.
- return &_DYNAMIC; // defined in link.h
+ return &_DYNAMIC;
}
#if ASAN_PREMAP_SHADOW
diff --git a/compiler-rt/lib/memprof/memprof_linux.cpp
b/compiler-rt/lib/memprof/memprof_linux.cpp
index 4846e988f58e..61c833bfdf64 100644
--- a/compiler-rt/lib/memprof/memprof_linux.cpp
+++ b/compiler-rt/lib/memprof/memprof_linux.cpp
@@ -39,6 +39,8 @@
#include
#include
+extern ElfW(Dyn) _DYNAMIC[];
+
typedef enum {
MEMPROF_RT_VERSION_UNDEFINED = 0,
MEMPROF_RT_VERSION_DYNAMIC,
@@ -58,7 +60,7 @@ void InitializePlatformExceptionHandlers() {}
void *MemprofDoesNotSupportStaticLinkage() {
// This will fail to link with -static.
- return &_DYNAMIC; // defined in link.h
+ return &_DYNAMIC;
}
uptr FindDynamicShadowStart() {
diff --git a/compiler-rt/lib/memprof/memprof_mapping.h
b/compiler-rt/lib/memprof/memprof_mapping.h
index f48018b1a8f2..ba05b88db307 100644
--- a/compiler-rt/lib/memprof/memprof_mapping.h
+++ b/compiler-rt/lib/memprof/memprof_mapping.h
@@ -37,7 +37,7 @@ extern uptr kHighMemEnd; // Initialized in __memprof_init.
#define SHADOW_MASK ~(MEM_GRANULARITY - 1)
#define MEM_TO_SHADOW(mem)
\
- (((mem & SHADOW_MASK) >> SHADOW_SCALE) + (SHADOW_OFFSET))
+ mem) & SHADOW_MASK) >> SHADOW_SCALE) + (SHADOW_OFFSET))
#define kLowMemBeg 0
#define kLowMemEnd (SHADOW_OFFSET ? SHADOW_OFFSET - 1 : 0)
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[llvm-branch-commits] [compiler-rt] 0b56e3c - [sanitizer] Defined SANITIZER_TEST_HAS_PVALLOC only on glibc
Author: Fangrui Song
Date: 2020-12-27T21:33:41-08:00
New Revision: 0b56e3cdda501b19bbfee6ee3899f72d9bce121c
URL:
https://github.com/llvm/llvm-project/commit/0b56e3cdda501b19bbfee6ee3899f72d9bce121c
DIFF:
https://github.com/llvm/llvm-project/commit/0b56e3cdda501b19bbfee6ee3899f72d9bce121c.diff
LOG: [sanitizer] Defined SANITIZER_TEST_HAS_PVALLOC only on glibc
This simplifies the condition and makes it work on musl.
Added:
Modified:
compiler-rt/lib/sanitizer_common/tests/sanitizer_test_utils.h
Removed:
diff --git a/compiler-rt/lib/sanitizer_common/tests/sanitizer_test_utils.h
b/compiler-rt/lib/sanitizer_common/tests/sanitizer_test_utils.h
index 525b1e485852..016ce9e67d9f 100644
--- a/compiler-rt/lib/sanitizer_common/tests/sanitizer_test_utils.h
+++ b/compiler-rt/lib/sanitizer_common/tests/sanitizer_test_utils.h
@@ -107,9 +107,7 @@ static inline uint32_t my_rand() {
# define SANITIZER_TEST_HAS_MEMALIGN 0
#endif
-#if !defined(__APPLE__) && !defined(__FreeBSD__) && !defined(__ANDROID__) && \
-!defined(__NetBSD__) && !defined(_WIN32) && \
-!(defined(__sun__) && defined(__svr4__))
+#if defined(__GLIBC__)
# define SANITIZER_TEST_HAS_PVALLOC 1
# define SANITIZER_TEST_HAS_MALLOC_USABLE_SIZE 1
#else
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[llvm-branch-commits] [compiler-rt] 99d650b - [compiler-rt][test] Make glibc-* feature detection work on a musl distribution
Author: Fangrui Song
Date: 2020-12-27T21:50:47-08:00
New Revision: 99d650b3699eaf23adcff6b28ebbc7ec4b890b3b
URL:
https://github.com/llvm/llvm-project/commit/99d650b3699eaf23adcff6b28ebbc7ec4b890b3b
DIFF:
https://github.com/llvm/llvm-project/commit/99d650b3699eaf23adcff6b28ebbc7ec4b890b3b.diff
LOG: [compiler-rt][test] Make glibc-* feature detection work on a musl
distribution
... where `ldd --version` has empty stdout and non-empty stderr.
Added:
Modified:
compiler-rt/test/lit.common.cfg.py
Removed:
diff --git a/compiler-rt/test/lit.common.cfg.py
b/compiler-rt/test/lit.common.cfg.py
index e2de463f85c0..e487b4d955bf 100644
--- a/compiler-rt/test/lit.common.cfg.py
+++ b/compiler-rt/test/lit.common.cfg.py
@@ -363,7 +363,7 @@ def get_macos_aligned_version(macos_vers):
for required in [26, 28, 30]:
if android_api_level >= required:
config.available_features.add('android-%s' % required)
- # FIXME: Replace with appropriate version when availible.
+ # FIXME: Replace with appropriate version when availible.
if android_api_level > 30 or (android_api_level == 30 and
android_api_codename == 'S'):
config.available_features.add('android-thread-properties-api')
@@ -380,18 +380,18 @@ def get_macos_aligned_version(macos_vers):
if config.host_os == 'Linux':
# detect whether we are using glibc, and which version
- # NB: 'ldd' is just one of the tools commonly installed as part of glibc
+ # NB: 'ldd' is just one of the tools commonly installed as part of glibc/musl
ldd_ver_cmd = subprocess.Popen(['ldd', '--version'],
stdout=subprocess.PIPE,
env={'LANG': 'C'})
sout, _ = ldd_ver_cmd.communicate()
- ver_line = sout.splitlines()[0]
- if not config.android and ver_line.startswith(b"ldd "):
+ ver_lines = sout.splitlines()
+ if not config.android and len(ver_lines) and ver_lines[0].startswith(b"ldd
"):
from distutils.version import LooseVersion
-ver = LooseVersion(ver_line.split()[-1].decode())
+ver = LooseVersion(ver_lines[0].split()[-1].decode())
for required in ["2.27", "2.30"]:
if ver >= LooseVersion(required):
-config.available_features.add("glibc-" + required)
+config.available_features.add("glibc-" + required)
sancovcc_path = os.path.join(config.llvm_tools_dir, "sancov")
if os.path.exists(sancovcc_path):
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[llvm-branch-commits] [compiler-rt] 60afb58 - [msan] Delete unused glibc header
Author: Fangrui Song Date: 2020-12-27T21:59:23-08:00 New Revision: 60afb58bfee6eed7b14d1a7c0594ae3688fb921a URL: https://github.com/llvm/llvm-project/commit/60afb58bfee6eed7b14d1a7c0594ae3688fb921a DIFF: https://github.com/llvm/llvm-project/commit/60afb58bfee6eed7b14d1a7c0594ae3688fb921a.diff LOG: [msan] Delete unused glibc header The file does not call backtrace/backtrace_symbols. Added: Modified: compiler-rt/lib/msan/msan_linux.cpp Removed: diff --git a/compiler-rt/lib/msan/msan_linux.cpp b/compiler-rt/lib/msan/msan_linux.cpp index bfdae0b920c9..d5baee38e710 100644 --- a/compiler-rt/lib/msan/msan_linux.cpp +++ b/compiler-rt/lib/msan/msan_linux.cpp @@ -26,7 +26,6 @@ #include #include #include -#include #include #include ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] d85a198 - [RISCV] Pattern-match more vector-splatted constants
Author: Fraser Cormack
Date: 2020-12-28T07:11:10Z
New Revision: d85a198e85253b6b39d9b86eb7afd3332637bcbe
URL:
https://github.com/llvm/llvm-project/commit/d85a198e85253b6b39d9b86eb7afd3332637bcbe
DIFF:
https://github.com/llvm/llvm-project/commit/d85a198e85253b6b39d9b86eb7afd3332637bcbe.diff
LOG: [RISCV] Pattern-match more vector-splatted constants
This patch extends the pattern-matching capability of vector-splatted
constants. When illegally-typed constants are legalized they are
canonically sign-extended to XLenVT. This preserves the sign and allows
us to match simm5. If they were zero-extended for whatever reason we'd
lose that ability: e.g. `(i8 -1) -> (XLenVT 255)` would not be matched
under the current logic.
To address this we first manually sign-extend the splatted constant from
the vector element type to int64_t. This preserves the semantics while
removing any implicitly-truncated bits.
The corresponding logic for uimm5 was not updated, the rationale being
that neither sign- nor zero-extending a legal uimm5 immediate should
change that (unless we expect actual "garbage" upper bits).
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D93837
Added:
Modified:
llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
Removed:
diff --git a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
index 0d58a4a7e03c..2a815863a81c 100644
--- a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
@@ -448,16 +448,25 @@ bool RISCVDAGToDAGISel::selectVSplatSimm5(SDValue N,
SDValue &SplatVal) {
int64_t SplatImm = cast(N.getOperand(0))->getSExtValue();
- // TODO: First truncate the constant to the vector element type since the
- // bits will be implicitly truncated anyway. This would catch cases where the
- // immediate was zero-extended instead of sign-extended: we would still want
- // to match (i8 -1) -> (XLenVT 255) as a simm5, for example
+ // Both ISD::SPLAT_VECTOR and RISCVISD::SPLAT_VECTOR_I64 share semantics when
+ // the operand type is wider than the resulting vector element type: an
+ // implicit truncation first takes place. Therefore, perform a manual
+ // truncation/sign-extension in order to ignore any truncated bits and catch
+ // any zero-extended immediate.
+ // For example, we wish to match (i8 -1) -> (XLenVT 255) as a simm5 by first
+ // sign-extending to (XLenVT -1).
+ auto XLenVT = Subtarget->getXLenVT();
+ assert(XLenVT == N.getOperand(0).getSimpleValueType() &&
+ "Unexpected splat operand type");
+ auto EltVT = N.getValueType().getVectorElementType();
+ if (EltVT.bitsLT(XLenVT)) {
+SplatImm = SignExtend64(SplatImm, EltVT.getSizeInBits());
+ }
+
if (!isInt<5>(SplatImm))
return false;
- SplatVal =
- CurDAG->getTargetConstant(SplatImm, SDLoc(N), Subtarget->getXLenVT());
-
+ SplatVal = CurDAG->getTargetConstant(SplatImm, SDLoc(N), XLenVT);
return true;
}
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