[llvm-branch-commits] [clang] 6f26a6d - Reland "[clang][cli] CompilerInvocationTest: add tests for boolean options"

[Jan Svoboda via llvm-branch-commits]

Author: Jan Svoboda
Date: 2020-12-12T09:46:20+01:00
New Revision: 6f26a6de489e66830c3181b747f6b18e439f36be

URL: 
https://github.com/llvm/llvm-project/commit/6f26a6de489e66830c3181b747f6b18e439f36be
DIFF: 
https://github.com/llvm/llvm-project/commit/6f26a6de489e66830c3181b747f6b18e439f36be.diff

LOG: Reland "[clang][cli] CompilerInvocationTest: add tests for boolean options"

Add more tests of the command line marshalling infrastructure.

The new tests now make a "round-trip": from arguments, to CompilerInvocation 
instance to arguments again in a single test case.

The TODOs are resolved in a follow-up patch.

Depends on D92830.

Reviewed By: dexonsmith

Differential Revision: https://reviews.llvm.org/D92774

Added: 


Modified: 
clang/unittests/Frontend/CompilerInvocationTest.cpp

Removed: 




diff  --git a/clang/unittests/Frontend/CompilerInvocationTest.cpp 
b/clang/unittests/Frontend/CompilerInvocationTest.cpp
index c3bdd6bff65c..c2dc35ce5d32 100644
--- a/clang/unittests/Frontend/CompilerInvocationTest.cpp
+++ b/clang/unittests/Frontend/CompilerInvocationTest.cpp
@@ -77,6 +77,155 @@ TEST_F(CommandLineTest, 
BoolOptionDefaultTrueSingleFlagUnknownPresent) {
   ASSERT_TRUE(Invocation.getFrontendOpts().UseTemporary);
 }
 
+// Boolean option with a keypath that defaults to true.
+// The flag with negative spelling can set the keypath to false.
+// The flag with positive spelling can reset the keypath to true.
+
+TEST_F(CommandLineTest, BoolOptionDefaultTruePresentNone) {
+  const char *Args[] = {""};
+
+  CompilerInvocation::CreateFromArgs(Invocation, Args, *Diags);
+  ASSERT_FALSE(Diags->hasErrorOccurred());
+  ASSERT_TRUE(Invocation.getCodeGenOpts().Autolink);
+
+  // TODO: Test argument generation.
+}
+
+TEST_F(CommandLineTest, BoolOptionDefaultTruePresentNegChange) {
+  const char *Args[] = {"-fno-autolink"};
+
+  CompilerInvocation::CreateFromArgs(Invocation, Args, *Diags);
+  ASSERT_FALSE(Diags->hasErrorOccurred());
+  ASSERT_FALSE(Invocation.getCodeGenOpts().Autolink);
+
+  // TODO: Test argument generation.
+}
+
+TEST_F(CommandLineTest, BoolOptionDefaultTruePresentPosReset) {
+  const char *Args[] = {"-fautolink"};
+
+  CompilerInvocation::CreateFromArgs(Invocation, Args, *Diags);
+  ASSERT_TRUE(Diags->hasErrorOccurred()); // Driver-only flag.
+  ASSERT_TRUE(Invocation.getCodeGenOpts().Autolink);
+}
+
+// Boolean option with a keypath that defaults to false.
+// The flag with negative spelling can set the keypath to true.
+// The flag with positive spelling can reset the keypath to false.
+
+TEST_F(CommandLineTest, BoolOptionDefaultFalsePresentNone) {
+  const char *Args[] = {""};
+
+  CompilerInvocation::CreateFromArgs(Invocation, Args, *Diags);
+  ASSERT_FALSE(Diags->hasErrorOccurred());
+  ASSERT_FALSE(Invocation.getCodeGenOpts().NoInlineLineTables);
+
+  // TODO: Test argument generation.
+}
+
+TEST_F(CommandLineTest, BoolOptionDefaultFalsePresentNegChange) {
+  const char *Args[] = {"-gno-inline-line-tables"};
+
+  CompilerInvocation::CreateFromArgs(Invocation, Args, *Diags);
+  ASSERT_FALSE(Diags->hasErrorOccurred());
+  ASSERT_TRUE(Invocation.getCodeGenOpts().NoInlineLineTables);
+
+  // TODO: Test argument generation.
+}
+
+TEST_F(CommandLineTest, BoolOptionDefaultFalsePresentPosReset) {
+  const char *Args[] = {"-ginline-line-tables"};
+
+  CompilerInvocation::CreateFromArgs(Invocation, Args, *Diags);
+  ASSERT_TRUE(Diags->hasErrorOccurred()); // Driver-only flag.
+  ASSERT_FALSE(Invocation.getCodeGenOpts().NoInlineLineTables);
+}
+
+// Boolean option with a keypath that defaults to false.
+// The flag with positive spelling can set the keypath to true.
+// The flag with negative spelling can reset the keypath to false.
+
+TEST_F(CommandLineTest, BoolOptionDefaultFalsePresentNoneX) {
+  const char *Args[] = {""};
+
+  CompilerInvocation::CreateFromArgs(Invocation, Args, *Diags);
+  ASSERT_FALSE(Diags->hasErrorOccurred());
+  ASSERT_FALSE(Invocation.getCodeGenOpts().CodeViewGHash);
+
+  // TODO: Test argument generation.
+}
+
+TEST_F(CommandLineTest, BoolOptionDefaultFalsePresentPosChange) {
+  const char *Args[] = {"-gcodeview-ghash"};
+
+  CompilerInvocation::CreateFromArgs(Invocation, Args, *Diags);
+  ASSERT_FALSE(Diags->hasErrorOccurred());
+  ASSERT_TRUE(Invocation.getCodeGenOpts().CodeViewGHash);
+
+  // TODO: Test argument generation.
+}
+
+TEST_F(CommandLineTest, BoolOptionDefaultFalsePresentNegReset) {
+  const char *Args[] = {"-gno-codeview-ghash"};
+
+  CompilerInvocation::CreateFromArgs(Invocation, Args, *Diags);
+  ASSERT_TRUE(Diags->hasErrorOccurred()); // Driver-only flag.
+  ASSERT_FALSE(Invocation.getCodeGenOpts().CodeViewGHash);
+}
+
+// Boolean option with a keypath that defaults to an arbitrary expression.
+// The flag with positive spelling can set the keypath to true.
+// The flag with negative spelling can set the keypath to false.
+
+static constexpr unsigned PassManagerDefa

[llvm-branch-commits] [llvm] 10f4057 - [clang][cli] Don't always emit -f[no-]legacy-pass-manager

[Jan Svoboda via llvm-branch-commits]

Author: Jan Svoboda
Date: 2020-12-12T10:11:23+01:00
New Revision: 10f40576f7b482dc55b9a0ba780c294c4e45817c

URL: 
https://github.com/llvm/llvm-project/commit/10f40576f7b482dc55b9a0ba780c294c4e45817c
DIFF: 
https://github.com/llvm/llvm-project/commit/10f40576f7b482dc55b9a0ba780c294c4e45817c.diff

LOG: [clang][cli] Don't always emit -f[no-]legacy-pass-manager

We don't need to always generate `-f[no-]experimental-new-pass-manager`.

This patch does not change the behavior of any other command line flag. (For 
example `-triple` is still being always generated.)

Reviewed By: dexonsmith, Bigcheese

Differential Revision: https://reviews.llvm.org/D92857

Added: 


Modified: 
clang/unittests/Frontend/CompilerInvocationTest.cpp
llvm/include/llvm/Option/OptParser.td

Removed: 




diff  --git a/clang/unittests/Frontend/CompilerInvocationTest.cpp 
b/clang/unittests/Frontend/CompilerInvocationTest.cpp
index c2dc35ce5d32..d5b5d15b1071 100644
--- a/clang/unittests/Frontend/CompilerInvocationTest.cpp
+++ b/clang/unittests/Frontend/CompilerInvocationTest.cpp
@@ -198,7 +198,7 @@ TEST_F(CommandLineTest, 
BoolOptionDefaultArbitraryTwoFlagsPresentNone) {
 
   Invocation.generateCC1CommandLine(GeneratedArgs, *this);
 
-  ASSERT_THAT(GeneratedArgs, Contains(StrEq(PassManagerResetByFlag)));
+  ASSERT_THAT(GeneratedArgs, Not(Contains(StrEq(PassManagerResetByFlag;
   ASSERT_THAT(GeneratedArgs, Not(Contains(StrEq(PassManagerChangedByFlag;
 }
 
@@ -222,7 +222,7 @@ TEST_F(CommandLineTest, 
BoolOptionDefaultArbitraryTwoFlagsPresentReset) {
   ASSERT_EQ(Invocation.getCodeGenOpts().LegacyPassManager, PassManagerDefault);
 
   Invocation.generateCC1CommandLine(GeneratedArgs, *this);
-  ASSERT_THAT(GeneratedArgs, Contains(StrEq(PassManagerResetByFlag)));
+  ASSERT_THAT(GeneratedArgs, Not(Contains(StrEq(PassManagerResetByFlag;
   ASSERT_THAT(GeneratedArgs, Not(Contains(StrEq(PassManagerChangedByFlag;
 }
 

diff  --git a/llvm/include/llvm/Option/OptParser.td 
b/llvm/include/llvm/Option/OptParser.td
index 9a935b5d9e6e..f08dfd3ccf04 100644
--- a/llvm/include/llvm/Option/OptParser.td
+++ b/llvm/include/llvm/Option/OptParser.td
@@ -173,7 +173,6 @@ class MarshallingInfoBitfieldFlag
 
 class MarshallingInfoBooleanFlag
   : MarshallingInfoFlag {
-  bit ShouldAlwaysEmit = 1;
   code Normalizer = "makeBooleanFlagNormalizer(OPT_"#neg_name#")";
   code Denormalizer = "makeBooleanFlagDenormalizer(\""#neg_spelling#"\")";
 }



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[llvm-branch-commits] [llvm] 6baa976 - [clang][cli] Add flexible TableGen multiclass for boolean options

[Jan Svoboda via llvm-branch-commits]

Author: Jan Svoboda
Date: 2020-12-12T10:53:28+01:00
New Revision: 6baa9769ed573741290fb186d02df7cf676fc8de

URL: 
https://github.com/llvm/llvm-project/commit/6baa9769ed573741290fb186d02df7cf676fc8de
DIFF: 
https://github.com/llvm/llvm-project/commit/6baa9769ed573741290fb186d02df7cf676fc8de.diff

LOG: [clang][cli] Add flexible TableGen multiclass for boolean options

This introduces more flexible multiclass for declaring two flags controlling 
the same boolean keypath.

Compared to existing Opt{In,Out}FFlag multiclasses, the new syntax makes it 
easier to read option declarations and reason about the keypath.

This also makes specifying common properties of both flags possible.

I'm open to suggestions on the class names. Not 100% sure the benefits are 
worth the added complexity.

Depends on D92774.

Reviewed By: dexonsmith

Differential Revision: https://reviews.llvm.org/D92775

Added: 


Modified: 
clang/include/clang/Driver/Options.td
clang/lib/Frontend/CompilerInvocation.cpp
clang/unittests/Frontend/CompilerInvocationTest.cpp
llvm/include/llvm/Option/OptParser.td

Removed: 




diff  --git a/clang/include/clang/Driver/Options.td 
b/clang/include/clang/Driver/Options.td
index 725afc7e1bb3..86760d0f400e 100644
--- a/clang/include/clang/Driver/Options.td
+++ b/clang/include/clang/Driver/Options.td
@@ -268,10 +268,234 @@ multiclass OptOutFFlag;
 }
 
-multiclass BooleanMarshalledFFlag {
-  def fno_#NAME : Flag<["-"], "fno-"#name>, HelpText;
-  def f#NAME : Flag<["-"], "f"#name>, HelpText,
-MarshallingInfoBooleanFlag;
+//===--===//
+// BoolOptionBase
+//===--===//
+
+// Default value of the keypath associated with a marshalled bool option.
+class Default { code Value = value; }
+
+class FlagPolarity { bit Value = value; }
+def PosFlag : FlagPolarity {}
+def NegFlag : FlagPolarity {}
+
+// Definition of a single command line flag.
+class FlagDef option_flags,
+  string help, list implied_by_options = []> {
+  // Negative polarity (false) implies a command line spelling prefixed with
+  // "no-" and a TableGen record whose name is prefixed with "no_".
+  FlagPolarity Polarity = polarity;
+
+  // The value assigned to keypath when the flag is present on the command 
line.
+  bit Value = value;
+
+  // List of OptionFlag records that control the visibility of the flag in
+  // 
diff erent scenarios.
+  list OptionFlags = option_flags;
+
+  // The help text associated with the flag.
+  string Help = help;
+
+  // List of options that imply this flag when present on command line.
+  list ImpliedBy = implied_by_options;
+}
+
+// Information extending a FlagDef.
+class FlagDefSuffix option_flags, string help> {
+  list OptionFlags = option_flags;
+  string Help = help;
+}
+
+// Extend the flag definition with a suffix.
+class ApplySuffix {
+  FlagDef Result
+= FlagDef;
+}
+
+// FlagDef extension. Convenient for creation of TableGen records.
+class FlagDefExpanded
+  : FlagDef {
+  // Name of the TableGen record.
+  string RecordName = prefix#!cond(flag.Polarity.Value : "", true : 
"no_")#name;
+
+  // Spelling of the flag.
+  string Spelling
+= prefix#!cond(flag.Polarity.Value : "", true : "no-")#spelling;
+
+  // Does the flag have CC1Option?
+  bit IsCC1 = !not(!empty(!filter(opt_flag, flag.OptionFlags,
+  !eq(opt_flag, CC1Option;
+
+  // Can the flag be implied by another flag?
+  bit CanBeImplied = !not(!empty(flag.ImpliedBy));
+
+  // C++ code that will be assigned to the keypath when the flag is present.
+  code ValueAsCode = !cond(flag.Value : "true", true: "false");
+}
+
+// Creates simple flag record.
+class BoolOptionFlag
+  : Flag<["-"], flag.Spelling>, Flags, HelpText {}
+
+// Creates marshalled flag record.
+class CC1BoolOptionFlag
+  : Flag<["-"], flag.Spelling>, Flags, HelpText,
+MarshallingInfoBooleanFlag,
+ImpliedByAnyOf {}
+
+// Generates TableGen records for two command line flags that control the same
+// keypath via the marshalling infrastructure.
+// Names of the records consist of the specified prefix, "no_" for the negative
+// flag, and NAME.
+// BoolOption is the API that should be used most of the time. Use this only
+// when you need more control (e.g. to represent a marshalled option whose
+// keypath defaults to an arbitrarily complex boolean expression).
+multiclass BoolOptionBase,
+  string prefix = ""> {
+  defvar flag1 = FlagDefExpanded.Result,
+ prefix, NAME, spelling_base>;
+
+  defvar flag2 = FlagDefExpanded.Result,
+ prefix, NAME, spelling_base>;
+
+  // TODO: Assert that the flags have 
diff erent polarity.
+  // TODO: Assert that the flags have 
diff erent value.
+  // TODO: Assert that 

[llvm-branch-commits] [clang] adf3c27 - [clang][cli] Revert accidental access-control flag rename

[Jan Svoboda via llvm-branch-commits]

Author: Jan Svoboda
Date: 2020-12-12T11:26:53+01:00
New Revision: adf3c27742ed272e0785a305995a70078eda6fe3

URL: 
https://github.com/llvm/llvm-project/commit/adf3c27742ed272e0785a305995a70078eda6fe3
DIFF: 
https://github.com/llvm/llvm-project/commit/adf3c27742ed272e0785a305995a70078eda6fe3.diff

LOG: [clang][cli] Revert accidental access-control flag rename

This commit 
 
introduced an accidental change, which renames `-faccess-control` and 
`-fno-access-control` to `-fno-access-control` and `-fno-no-access-control`.

Reviewed By: dexonsmith, MaskRay

Differential Revision: https://reviews.llvm.org/D93104

Added: 


Modified: 
clang/include/clang/Driver/Options.td

Removed: 




diff  --git a/clang/include/clang/Driver/Options.td 
b/clang/include/clang/Driver/Options.td
index 86760d0f400e..f7f5dd3547e3 100644
--- a/clang/include/clang/Driver/Options.td
+++ b/clang/include/clang/Driver/Options.td
@@ -1000,7 +1000,7 @@ def fPIC : Flag<["-"], "fPIC">, Group;
 def fno_PIC : Flag<["-"], "fno-PIC">, Group;
 def fPIE : Flag<["-"], "fPIE">, Group;
 def fno_PIE : Flag<["-"], "fno-PIE">, Group;
-defm access_control : OptOutFFlag<"no-access-control", "", "Disable C++ access 
control">;
+defm access_control : OptOutFFlag<"access-control", "", "Disable C++ access 
control">;
 def falign_functions : Flag<["-"], "falign-functions">, Group;
 def falign_functions_EQ : Joined<["-"], "falign-functions=">, Group;
 def fno_align_functions: Flag<["-"], "fno-align-functions">, Group;



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[llvm-branch-commits] [llvm] f6e885a - [ARM] Test for showing scalar vector costs. NFC

[David Green via llvm-branch-commits]

Author: David Green
Date: 2020-12-12T11:43:14Z
New Revision: f6e885ad2a94357f6f4d18ddf26a8111b3df7ed3

URL: 
https://github.com/llvm/llvm-project/commit/f6e885ad2a94357f6f4d18ddf26a8111b3df7ed3
DIFF: 
https://github.com/llvm/llvm-project/commit/f6e885ad2a94357f6f4d18ddf26a8111b3df7ed3.diff

LOG: [ARM] Test for showing scalar vector costs. NFC

Added: 
llvm/test/Transforms/LoopVectorize/ARM/scalar-block-cost.ll

Modified: 


Removed: 




diff  --git a/llvm/test/Transforms/LoopVectorize/ARM/scalar-block-cost.ll 
b/llvm/test/Transforms/LoopVectorize/ARM/scalar-block-cost.ll
new file mode 100644
index ..959fbe676e67
--- /dev/null
+++ b/llvm/test/Transforms/LoopVectorize/ARM/scalar-block-cost.ll
@@ -0,0 +1,101 @@
+; RUN: opt -loop-vectorize -debug-only=loop-vectorize 
-enable-arm-maskedgatscat -tail-predication=force-enabled -disable-output < %s 
2>&1 | FileCheck %s --check-prefixes=CHECK-COST,CHECK-COST-2
+; REQUIRES: asserts
+
+target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
+target triple = "thumbv8.1m.main-none-none-eabi"
+
+define void @pred_loop(i32* %off, i32* %data, i32* %dst, i32 %n) #0 {
+
+; CHECK-COST: LV: Found an estimated cost of 0 for VF 1 For instruction:   
%i.09 = phi i32 [ %add, %for.body ], [ 0, %for.body.preheader ]
+; CHECK-COST-NEXT: LV: Found an estimated cost of 1 for VF 1 For instruction:  
 %add = add nuw nsw i32 %i.09, 1
+; CHECK-COST-NEXT: LV: Found an estimated cost of 0 for VF 1 For instruction:  
 %arrayidx = getelementptr inbounds i32, i32* %data, i32 %add
+; CHECK-COST-NEXT: LV: Found an estimated cost of 1 for VF 1 For instruction:  
 %0 = load i32, i32* %arrayidx, align 4
+; CHECK-COST-NEXT: LV: Found an estimated cost of 1 for VF 1 For instruction:  
 %add1 = add nsw i32 %0, 5
+; CHECK-COST-NEXT: LV: Found an estimated cost of 0 for VF 1 For instruction:  
 %arrayidx2 = getelementptr inbounds i32, i32* %dst, i32 %i.09
+; CHECK-COST-NEXT: LV: Found an estimated cost of 1 for VF 1 For instruction:  
 store i32 %add1, i32* %arrayidx2, align 4
+; CHECK-COST-NEXT: LV: Found an estimated cost of 1 for VF 1 For instruction:  
 %exitcond.not = icmp eq i32 %add, %n
+; CHECK-COST-NEXT: LV: Found an estimated cost of 0 for VF 1 For instruction:  
 br i1 %exitcond.not, label %exit.loopexit, label %for.body
+; CHECK-COST-NEXT: LV: Scalar loop costs: 2.
+
+entry:
+  %cmp8 = icmp sgt i32 %n, 0
+  br i1 %cmp8, label %for.body, label %exit
+
+exit: ; preds = %for.body, %entry
+  ret void
+
+for.body: ; preds = %entry, %for.body
+  %i.09 = phi i32 [ %add, %for.body ], [ 0, %entry ]
+  %add = add nuw nsw i32 %i.09, 1
+  %arrayidx = getelementptr inbounds i32, i32* %data, i32 %add
+  %0 = load i32, i32* %arrayidx, align 4
+  %add1 = add nsw i32 %0, 5
+  %arrayidx2 = getelementptr inbounds i32, i32* %dst, i32 %i.09
+  store i32 %add1, i32* %arrayidx2, align 4
+  %exitcond.not = icmp eq i32 %add, %n
+  br i1 %exitcond.not, label %exit, label %for.body
+}
+
+define i32 @if_convert(i32* %a, i32* %b, i32 %start, i32 %end) #0 {
+
+; CHECK-COST-2: LV: Found an estimated cost of 0 for VF 1 For instruction:   
%i.032 = phi i32 [ %inc, %if.end ], [ %start, %for.body.preheader ]
+; CHECK-COST-2-NEXT: LV: Found an estimated cost of 0 for VF 1 For 
instruction:   %arrayidx = getelementptr inbounds i32, i32* %a, i32 %i.032
+; CHECK-COST-2-NEXT: LV: Found an estimated cost of 1 for VF 1 For 
instruction:   %0 = load i32, i32* %arrayidx, align 4
+; CHECK-COST-2-NEXT: LV: Found an estimated cost of 0 for VF 1 For 
instruction:   %arrayidx2 = getelementptr inbounds i32, i32* %b, i32 %i.032
+; CHECK-COST-2-NEXT: LV: Found an estimated cost of 1 for VF 1 For 
instruction:   %1 = load i32, i32* %arrayidx2, align 4
+; CHECK-COST-2-NEXT: LV: Found an estimated cost of 1 for VF 1 For 
instruction:   %cmp3 = icmp sgt i32 %0, %1
+; CHECK-COST-2-NEXT: LV: Found an estimated cost of 0 for VF 1 For 
instruction:   br i1 %cmp3, label %if.then, label %if.end
+; CHECK-COST-2-NEXT: LV: Found an estimated cost of 1 for VF 1 For 
instruction:   %mul = mul nsw i32 %0, 5
+; CHECK-COST-2-NEXT: LV: Found an estimated cost of 1 for VF 1 For 
instruction:   %add = add nsw i32 %mul, 3
+; CHECK-COST-2-NEXT: LV: Found an estimated cost of 0 for VF 1 For 
instruction:   %factor = shl i32 %add, 1
+; CHECK-COST-2-NEXT: LV: Found an estimated cost of 1 for VF 1 For 
instruction:   %sub = sub i32 %0, %1
+; CHECK-COST-2-NEXT: LV: Found an estimated cost of 1 for VF 1 For 
instruction:   %add7 = add i32 %sub, %factor
+; CHECK-COST-2-NEXT: LV: Found an estimated cost of 1 for VF 1 For 
instruction:   store i32 %add7, i32* %arrayidx2, align 4
+; CHECK-COST-2-NEXT: LV: Found an estimated cost of 0 for VF 1 For 
instruction:   br label %if.end
+; CHECK-COST-2-NEXT: LV: Found an estimated cost of 0 for VF 1 For 
instruction:   %k.0 = phi i32 [ %add

[llvm-branch-commits] [llvm] 0e5bfff - [YAML] Support extended spellings when parsing bools.

[Nathan James via llvm-branch-commits]

Author: Nathan James
Date: 2020-12-12T12:50:34Z
New Revision: 0e5bfffb1361727eb163c4ecdd5836818064240f

URL: 
https://github.com/llvm/llvm-project/commit/0e5bfffb1361727eb163c4ecdd5836818064240f
DIFF: 
https://github.com/llvm/llvm-project/commit/0e5bfffb1361727eb163c4ecdd5836818064240f.diff

LOG: [YAML] Support extended spellings when parsing bools.

Support all the spellings of boolean datatypes according to 
https://yaml.org/type/bool.html

Reviewed By: silvas

Differential Revision: https://reviews.llvm.org/D92755

Added: 


Modified: 
llvm/include/llvm/Support/YAMLParser.h
llvm/include/llvm/Support/YAMLTraits.h
llvm/lib/Support/YAMLParser.cpp
llvm/lib/Support/YAMLTraits.cpp
llvm/unittests/Support/YAMLParserTest.cpp

Removed: 




diff  --git a/llvm/include/llvm/Support/YAMLParser.h 
b/llvm/include/llvm/Support/YAMLParser.h
index a449d35abfd8..759e11afd447 100644
--- a/llvm/include/llvm/Support/YAMLParser.h
+++ b/llvm/include/llvm/Support/YAMLParser.h
@@ -78,6 +78,9 @@ bool scanTokens(StringRef Input);
 /// escaped, but emitted verbatim.
 std::string escape(StringRef Input, bool EscapePrintable = true);
 
+/// Parse \p S as a bool according to https://yaml.org/type/bool.html.
+llvm::Optional parseBool(StringRef S);
+
 /// This class represents a YAML stream potentially containing multiple
 ///documents.
 class Stream {

diff  --git a/llvm/include/llvm/Support/YAMLTraits.h 
b/llvm/include/llvm/Support/YAMLTraits.h
index 586cd64284ce..92fc4cff7e45 100644
--- a/llvm/include/llvm/Support/YAMLTraits.h
+++ b/llvm/include/llvm/Support/YAMLTraits.h
@@ -638,6 +638,7 @@ inline bool isNull(StringRef S) {
 }
 
 inline bool isBool(StringRef S) {
+  // FIXME: using parseBool is causing multiple tests to fail.
   return S.equals("true") || S.equals("True") || S.equals("TRUE") ||
  S.equals("false") || S.equals("False") || S.equals("FALSE");
 }

diff  --git a/llvm/lib/Support/YAMLParser.cpp b/llvm/lib/Support/YAMLParser.cpp
index 3111c7198958..d037cdf850ef 100644
--- a/llvm/lib/Support/YAMLParser.cpp
+++ b/llvm/lib/Support/YAMLParser.cpp
@@ -746,6 +746,92 @@ std::string yaml::escape(StringRef Input, bool 
EscapePrintable) {
   return EscapedInput;
 }
 
+llvm::Optional yaml::parseBool(StringRef S) {
+  switch (S.size()) {
+  case 1:
+switch (S.front()) {
+case 'y':
+case 'Y':
+  return true;
+case 'n':
+case 'N':
+  return false;
+default:
+  return None;
+}
+  case 2:
+switch (S.front()) {
+case 'O':
+  if (S[1] == 'N') // ON
+return true;
+  LLVM_FALLTHROUGH;
+case 'o':
+  if (S[1] == 'n') //[Oo]n
+return true;
+  return None;
+case 'N':
+  if (S[1] == 'O') // NO
+return false;
+  LLVM_FALLTHROUGH;
+case 'n':
+  if (S[1] == 'o') //[Nn]o
+return false;
+  return None;
+default:
+  return None;
+}
+  case 3:
+switch (S.front()) {
+case 'O':
+  if (S.drop_front() == "FF") // OFF
+return false;
+  LLVM_FALLTHROUGH;
+case 'o':
+  if (S.drop_front() == "ff") //[Oo]ff
+return false;
+  return None;
+case 'Y':
+  if (S.drop_front() == "ES") // YES
+return true;
+  LLVM_FALLTHROUGH;
+case 'y':
+  if (S.drop_front() == "es") //[Yy]es
+return true;
+  return None;
+default:
+  return None;
+}
+  case 4:
+switch (S.front()) {
+case 'T':
+  if (S.drop_front() == "RUE") // TRUE
+return true;
+  LLVM_FALLTHROUGH;
+case 't':
+  if (S.drop_front() == "rue") //[Tt]rue
+return true;
+  return None;
+default:
+  return None;
+}
+  case 5:
+switch (S.front()) {
+case 'F':
+  if (S.drop_front() == "ALSE") // FALSE
+return false;
+  LLVM_FALLTHROUGH;
+case 'f':
+  if (S.drop_front() == "alse") //[Ff]alse
+return false;
+  return None;
+default:
+  return None;
+}
+  default:
+return None;
+  }
+}
+
 Scanner::Scanner(StringRef Input, SourceMgr &sm, bool ShowColors,
  std::error_code *EC)
 : SM(sm), ShowColors(ShowColors), EC(EC) {

diff  --git a/llvm/lib/Support/YAMLTraits.cpp b/llvm/lib/Support/YAMLTraits.cpp
index 5b24e08e4453..b00357cc3b7e 100644
--- a/llvm/lib/Support/YAMLTraits.cpp
+++ b/llvm/lib/Support/YAMLTraits.cpp
@@ -885,11 +885,8 @@ void ScalarTraits::output(const bool &Val, void *, 
raw_ostream &Out) {
 }
 
 StringRef ScalarTraits::input(StringRef Scalar, void *, bool &Val) {
-  if (Scalar.equals("true")) {
-Val = true;
-return StringRef();
-  } else if (Scalar.equals("false")) {
-Val = false;
+  if (llvm::Optional Parsed = parseBool(Scalar)) {
+Val = *Parsed;
 return StringRef();
   }
   return "invalid boolean";

diff  --git a/llvm/unittests/Support/YAMLParserTest.cpp 
b/llvm/unittests/Support/YAMLParserTest.cpp
index 938a6

[llvm-branch-commits] [llvm] e52bc1d - [X86] Add chain in ISel for x86_tdpbssd_internal intrinsic.

[via llvm-branch-commits]

Author: Luo, Yuanke
Date: 2020-12-12T21:14:38+08:00
New Revision: e52bc1d2bba794bfb004d35a395a2e3a8e69f9cb

URL: 
https://github.com/llvm/llvm-project/commit/e52bc1d2bba794bfb004d35a395a2e3a8e69f9cb
DIFF: 
https://github.com/llvm/llvm-project/commit/e52bc1d2bba794bfb004d35a395a2e3a8e69f9cb.diff

LOG: [X86] Add chain in ISel for x86_tdpbssd_internal intrinsic.

Added: 


Modified: 
llvm/lib/Target/X86/X86ISelDAGToDAG.cpp

Removed: 




diff  --git a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp 
b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
index e0f54a2f4c1f..5d197e4d5f76 100644
--- a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
+++ b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
@@ -4601,6 +4601,7 @@ void X86DAGToDAGISel::Select(SDNode *Node) {
 case Intrinsic::x86_tdpbssd_internal: {
   if (!Subtarget->hasAMXTILE())
 break;
+  SDValue Chain = Node->getOperand(0);
   unsigned Opc = X86::PTDPBSSDV;
   SDValue CFG = CurDAG->getRegister(0, MVT::Untyped);
   SDValue Ops[] = {Node->getOperand(2),
@@ -4609,7 +4610,8 @@ void X86DAGToDAGISel::Select(SDNode *Node) {
Node->getOperand(5),
Node->getOperand(6),
Node->getOperand(7),
-   CFG};
+   CFG,
+   Chain};
   MachineSDNode *CNode =
   CurDAG->getMachineNode(Opc, dl, {MVT::v256i32, MVT::Other}, Ops);
   ReplaceNode(Node, CNode);



___
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llvm-branch-commits@lists.llvm.org
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[llvm-branch-commits] [lldb] 7832d7e - [lldb] Modernize TargetList for-loops, NFC

[Tatyana Krasnukha via llvm-branch-commits]

Author: Tatyana Krasnukha
Date: 2020-12-12T16:40:58+03:00
New Revision: 7832d7e95ace589b2275bafe701ccb377a16b1b2

URL: 
https://github.com/llvm/llvm-project/commit/7832d7e95ace589b2275bafe701ccb377a16b1b2
DIFF: 
https://github.com/llvm/llvm-project/commit/7832d7e95ace589b2275bafe701ccb377a16b1b2.diff

LOG: [lldb] Modernize TargetList for-loops, NFC

Replace loops with standard algorithms or range-based loops.

Added: 


Modified: 
lldb/source/Target/TargetList.cpp

Removed: 




diff  --git a/lldb/source/Target/TargetList.cpp 
b/lldb/source/Target/TargetList.cpp
index bbef3b63ba42..5bb6ca2a73e9 100644
--- a/lldb/source/Target/TargetList.cpp
+++ b/lldb/source/Target/TargetList.cpp
@@ -405,80 +405,76 @@ Status TargetList::CreateTargetInternal(Debugger 
&debugger,
 
 bool TargetList::DeleteTarget(TargetSP &target_sp) {
   std::lock_guard guard(m_target_list_mutex);
-  collection::iterator pos, end = m_target_list.end();
+  auto it = std::find(m_target_list.begin(), m_target_list.end(), target_sp);
+  if (it == m_target_list.end())
+return false;
 
-  for (pos = m_target_list.begin(); pos != end; ++pos) {
-if (pos->get() == target_sp.get()) {
-  m_target_list.erase(pos);
-  return true;
-}
-  }
-  return false;
+  m_target_list.erase(it);
+  return true;
 }
 
 TargetSP TargetList::FindTargetWithExecutableAndArchitecture(
 const FileSpec &exe_file_spec, const ArchSpec *exe_arch_ptr) const {
   std::lock_guard guard(m_target_list_mutex);
-  TargetSP target_sp;
-  collection::const_iterator pos, end = m_target_list.end();
-  for (pos = m_target_list.begin(); pos != end; ++pos) {
-Module *exe_module = (*pos)->GetExecutableModulePointer();
-
-if (exe_module) {
-  if (FileSpec::Match(exe_file_spec, exe_module->GetFileSpec())) {
-if (exe_arch_ptr) {
-  if (!exe_arch_ptr->IsCompatibleMatch(exe_module->GetArchitecture()))
-continue;
-}
-target_sp = *pos;
-break;
-  }
-}
-  }
-  return target_sp;
+  auto it = std::find_if(m_target_list.begin(), m_target_list.end(),
+  [&exe_file_spec, exe_arch_ptr](const TargetSP &item) {
+Module *exe_module = item->GetExecutableModulePointer();
+if (!exe_module ||
+!FileSpec::Match(exe_file_spec, exe_module->GetFileSpec()))
+  return false;
+
+return !exe_arch_ptr ||
+   exe_arch_ptr->IsCompatibleMatch(exe_module->GetArchitecture());
+  });
+
+  if (it != m_target_list.end())
+return *it;
+
+  return TargetSP();
 }
 
 TargetSP TargetList::FindTargetWithProcessID(lldb::pid_t pid) const {
   std::lock_guard guard(m_target_list_mutex);
-  TargetSP target_sp;
-  collection::const_iterator pos, end = m_target_list.end();
-  for (pos = m_target_list.begin(); pos != end; ++pos) {
-Process *process = (*pos)->GetProcessSP().get();
-if (process && process->GetID() == pid) {
-  target_sp = *pos;
-  break;
-}
-  }
-  return target_sp;
+  auto it = std::find_if(m_target_list.begin(), m_target_list.end(),
+  [pid](const TargetSP &item) {
+auto *process_ptr = item->GetProcessSP().get();
+return process_ptr && (process_ptr->GetID() == pid);
+  });
+
+  if (it != m_target_list.end())
+return *it;
+
+  return TargetSP();
 }
 
 TargetSP TargetList::FindTargetWithProcess(Process *process) const {
   TargetSP target_sp;
-  if (process) {
-std::lock_guard guard(m_target_list_mutex);
-collection::const_iterator pos, end = m_target_list.end();
-for (pos = m_target_list.begin(); pos != end; ++pos) {
-  if (process == (*pos)->GetProcessSP().get()) {
-target_sp = *pos;
-break;
-  }
-}
-  }
+  if (!process)
+return target_sp;
+
+  std::lock_guard guard(m_target_list_mutex);
+  auto it = std::find_if(m_target_list.begin(), m_target_list.end(),
+  [process](const TargetSP &item) {
+return item->GetProcessSP().get() == process;
+  });
+
+  if (it != m_target_list.end())
+target_sp = *it;
+
   return target_sp;
 }
 
 TargetSP TargetList::GetTargetSP(Target *target) const {
   TargetSP target_sp;
-  if (target) {
-std::lock_guard guard(m_target_list_mutex);
-collection::const_iterator pos, end = m_target_list.end();
-for (pos = m_target_list.begin(); pos != end; ++pos) {
-  if (target == (*pos).get()) {
-target_sp = *pos;
-break;
-  }
-}
-  }
+  if (!target)
+return target_sp;
+
+  std::lock_guard guard(m_target_list_mutex);
+  auto it = std::find_if(m_target_list.begin(), m_target_list.end(),
+  [target](const TargetSP &item) { return item.get() == target; });
+  if (it != m_target_list.end())
+target_sp = *it;
+
   return target_sp;
 }
 
@@ -509,14 +505,11 @@ uint32_t TargetList::SignalIfRunning(lldb::pid_t pid, int 
signo) {
   if (pid == LLDB_INVALID_PROCESS_ID) {
 // Signal all processes with sig

[llvm-branch-commits] [lldb] 2634ec6 - [lldb] "target create" shouldn't save target if the command failed

[Tatyana Krasnukha via llvm-branch-commits]

Author: Tatyana Krasnukha
Date: 2020-12-12T16:40:58+03:00
New Revision: 2634ec6ce9007f2406545ca28b4c72961f1e8f67

URL: 
https://github.com/llvm/llvm-project/commit/2634ec6ce9007f2406545ca28b4c72961f1e8f67
DIFF: 
https://github.com/llvm/llvm-project/commit/2634ec6ce9007f2406545ca28b4c72961f1e8f67.diff

LOG: [lldb] "target create" shouldn't save target if the command failed

TargetList::CreateTarget automatically adds created target to the list, however,
CommandObjectTargetCreate does some additional preparation after creating a 
target
and which can fail. The command should remove created target if it failed. Since
the function has many ways to return, scope guard does this work safely.

Changes to the TargetList make target adding and selection more transparent.

Other changes remove unnecessary SetSelectedTarget after CreateTarget.

Differential Revision: https://reviews.llvm.org/D93052

Added: 


Modified: 
lldb/include/lldb/Target/TargetList.h
lldb/source/API/SBDebugger.cpp
lldb/source/Commands/CommandObjectProcess.cpp
lldb/source/Commands/CommandObjectTarget.cpp
lldb/source/Plugins/Platform/POSIX/PlatformPOSIX.cpp
lldb/source/Plugins/Platform/Windows/PlatformWindows.cpp
lldb/source/Plugins/Platform/gdb-server/PlatformRemoteGDBServer.cpp
lldb/source/Target/Platform.cpp
lldb/source/Target/TargetList.cpp
lldb/source/Target/TraceSessionFileParser.cpp
lldb/unittests/Process/ProcessEventDataTest.cpp
lldb/unittests/Thread/ThreadTest.cpp

Removed: 




diff  --git a/lldb/include/lldb/Target/TargetList.h 
b/lldb/include/lldb/Target/TargetList.h
index 94b25f65863a..903ca4bcefbc 100644
--- a/lldb/include/lldb/Target/TargetList.h
+++ b/lldb/include/lldb/Target/TargetList.h
@@ -173,7 +173,9 @@ class TargetList : public Broadcaster {
 
   uint32_t SignalIfRunning(lldb::pid_t pid, int signo);
 
-  uint32_t SetSelectedTarget(Target *target);
+  void SetSelectedTarget(uint32_t index);
+
+  void SetSelectedTarget(const lldb::TargetSP &target);
 
   lldb::TargetSP GetSelectedTarget();
 
@@ -185,17 +187,21 @@ class TargetList : public Broadcaster {
   uint32_t m_selected_target_idx;
 
 private:
-  Status CreateTargetInternal(Debugger &debugger, llvm::StringRef 
user_exe_path,
-  llvm::StringRef triple_str,
-  LoadDependentFiles load_dependent_files,
-  const OptionGroupPlatform *platform_options,
-  lldb::TargetSP &target_sp);
-
-  Status CreateTargetInternal(Debugger &debugger, llvm::StringRef 
user_exe_path,
-  const ArchSpec &arch,
-  LoadDependentFiles get_dependent_modules,
-  lldb::PlatformSP &platform_sp,
-  lldb::TargetSP &target_sp);
+  static Status CreateTargetInternal(
+  Debugger &debugger, llvm::StringRef user_exe_path,
+  llvm::StringRef triple_str, LoadDependentFiles load_dependent_files,
+  const OptionGroupPlatform *platform_options, lldb::TargetSP &target_sp);
+
+  static Status CreateTargetInternal(Debugger &debugger,
+ llvm::StringRef user_exe_path,
+ const ArchSpec &arch,
+ LoadDependentFiles get_dependent_modules,
+ lldb::PlatformSP &platform_sp,
+ lldb::TargetSP &target_sp);
+
+  void AddTargetInternal(lldb::TargetSP target_sp, bool do_select);
+
+  void SetSelectedTargetInternal(uint32_t index);
 
   TargetList(const TargetList &) = delete;
   const TargetList &operator=(const TargetList &) = delete;

diff  --git a/lldb/source/API/SBDebugger.cpp b/lldb/source/API/SBDebugger.cpp
index a5bf457e90f9..dc1cc91c705c 100644
--- a/lldb/source/API/SBDebugger.cpp
+++ b/lldb/source/API/SBDebugger.cpp
@@ -811,10 +811,8 @@ SBTarget SBDebugger::CreateTargetWithFileAndArch(const 
char *filename,
 add_dependent_modules ? eLoadDependentsYes : eLoadDependentsNo, 
nullptr,
 target_sp);
 
-if (error.Success()) {
-  m_opaque_sp->GetTargetList().SetSelectedTarget(target_sp.get());
+if (error.Success())
   sb_target.SetSP(target_sp);
-}
   }
 
   LLDB_LOGF(log,
@@ -840,10 +838,8 @@ SBTarget SBDebugger::CreateTarget(const char *filename) {
 add_dependent_modules ? eLoadDependentsYes : eLoadDependentsNo, 
nullptr,
 target_sp);
 
-if (error.Success()) {
-  m_opaque_sp->GetTargetList().SetSelectedTarget(target_sp.get());
+if (error.Success())
   sb_target.SetSP(target_sp);
-}
   }
   Log *log(GetLogIfAllCategoriesSet(LIBLLDB_LOG_API));
   LLDB_LOGF(log,
@@ -998,7 +994,7 @@ void SBDebugger::SetSelectedTarget(SBTarget &sb_target) {
 
   TargetSP target_sp(sb_target.GetSP());
   if (m_opaque_sp) {
-m_opaque_sp

[llvm-branch-commits] [lldb] a01b26f - [lldb] Make CommandInterpreter's execution context the same as debugger's one.

[Tatyana Krasnukha via llvm-branch-commits]

Author: Tatyana Krasnukha
Date: 2020-12-12T16:40:59+03:00
New Revision: a01b26fb51c710a3a8ef88cc83b0701461f5b9ab

URL: 
https://github.com/llvm/llvm-project/commit/a01b26fb51c710a3a8ef88cc83b0701461f5b9ab
DIFF: 
https://github.com/llvm/llvm-project/commit/a01b26fb51c710a3a8ef88cc83b0701461f5b9ab.diff

LOG: [lldb] Make CommandInterpreter's execution context the same as debugger's 
one.

Currently, the interpreter's context is not updated until a command is executed.
This has resulted in the behavior of SB-interface functions and some commands
depends on previous user actions. The interpreter's context can stay 
uninitialized,
point to a currently selected target, or point to one of previously selected 
targets.

This patch removes any usages of CommandInterpreter::UpdateExecutionContext.
CommandInterpreter::HandleCommand* functions still may override context 
temporarily,
but now they always restore it before exiting. CommandInterpreter saves 
overriden
contexts to the stack, that makes nesting commands possible.

Added test reproduces one of the issues. Without this fix, the last assertion 
fails
because interpreter's execution context is empty until running "target list", 
so,
the value of the global property was updated instead of process's local 
instance.

Differential Revision: https://reviews.llvm.org/D92164

Added: 
lldb/test/API/python_api/debugger/Makefile
lldb/test/API/python_api/debugger/main.cpp

Modified: 
lldb/include/lldb/Interpreter/CommandInterpreter.h
lldb/source/API/SBCommandInterpreter.cpp
lldb/source/Breakpoint/BreakpointOptions.cpp
lldb/source/Commands/CommandObjectCommands.cpp
lldb/source/Commands/CommandObjectExpression.cpp
lldb/source/Commands/CommandObjectProcess.cpp
lldb/source/Commands/CommandObjectRegexCommand.cpp
lldb/source/Commands/CommandObjectSettings.cpp
lldb/source/Commands/CommandObjectWatchpointCommand.cpp
lldb/source/Core/IOHandlerCursesGUI.cpp
lldb/source/Interpreter/CommandInterpreter.cpp
lldb/source/Target/Target.cpp
lldb/test/API/python_api/debugger/TestDebuggerAPI.py

Removed: 




diff  --git a/lldb/include/lldb/Interpreter/CommandInterpreter.h 
b/lldb/include/lldb/Interpreter/CommandInterpreter.h
index d35f7e22b9ea..40b649411f7f 100644
--- a/lldb/include/lldb/Interpreter/CommandInterpreter.h
+++ b/lldb/include/lldb/Interpreter/CommandInterpreter.h
@@ -24,7 +24,9 @@
 #include "lldb/Utility/StringList.h"
 #include "lldb/lldb-forward.h"
 #include "lldb/lldb-private.h"
+
 #include 
+#include 
 
 namespace lldb_private {
 class CommandInterpreter;
@@ -245,7 +247,7 @@ class CommandInterpreter : public Broadcaster,
 
   CommandInterpreter(Debugger &debugger, bool synchronous_execution);
 
-  ~CommandInterpreter() override;
+  ~CommandInterpreter() override = default;
 
   // These two functions fill out the Broadcaster interface:
 
@@ -300,10 +302,11 @@ class CommandInterpreter : public Broadcaster,
   CommandReturnObject &result);
 
   bool HandleCommand(const char *command_line, LazyBool add_to_history,
- CommandReturnObject &result,
- ExecutionContext *override_context = nullptr,
- bool repeat_on_empty_command = true,
- bool no_context_switching = false);
+ const ExecutionContext &override_context,
+ CommandReturnObject &result);
+
+  bool HandleCommand(const char *command_line, LazyBool add_to_history,
+ CommandReturnObject &result);
 
   bool WasInterrupted() const;
 
@@ -312,9 +315,7 @@ class CommandInterpreter : public Broadcaster,
   /// \param[in] commands
   ///The list of commands to execute.
   /// \param[in,out] context
-  ///The execution context in which to run the commands. Can be nullptr in
-  ///which case the default
-  ///context will be used.
+  ///The execution context in which to run the commands.
   /// \param[in] options
   ///This object holds the options used to control when to stop, whether to
   ///execute commands,
@@ -324,8 +325,13 @@ class CommandInterpreter : public Broadcaster,
   ///safely,
   ///and failed with some explanation if we aborted executing the commands
   ///at some point.
-  void HandleCommands(const StringList &commands, ExecutionContext *context,
-  CommandInterpreterRunOptions &options,
+  void HandleCommands(const StringList &commands,
+  const ExecutionContext &context,
+  const CommandInterpreterRunOptions &options,
+  CommandReturnObject &result);
+
+  void HandleCommands(const StringList &commands,
+  const CommandInterpreterRunOptions &options,
   CommandReturnObject &result);
 
   /// Execute a list of commands from a file.
@@ -333,9 +339,7 @

[llvm-branch-commits] [clang] 320af6b - Create SPIRABIInfo to enable SPIR_FUNC calling convention.

[Melanie Blower via llvm-branch-commits]

Author: Melanie Blower
Date: 2020-12-12T05:48:20-08:00
New Revision: 320af6b138391d289fe70db39c51da92e8d3d9df

URL: 
https://github.com/llvm/llvm-project/commit/320af6b138391d289fe70db39c51da92e8d3d9df
DIFF: 
https://github.com/llvm/llvm-project/commit/320af6b138391d289fe70db39c51da92e8d3d9df.diff

LOG: Create SPIRABIInfo to enable SPIR_FUNC calling convention.

Background: Call to library arithmetic functions for div is emitted by the
compiler and it set wrong “C” calling convention for calls to these functions,
whereas library functions are declared with `spir_function` calling convention.
InstCombine optimization replaces such calls with “unreachable” instruction.
It looks like clang lacks SPIRABIInfo class which should specify default
calling conventions for “system” function calls. SPIR supports only
SPIR_FUNC and SPIR_KERNEL calling convention.

Reviewers: Erich Keane, Anastasia

Differential Revision: https://reviews.llvm.org/D92721

Added: 


Modified: 
clang/lib/CodeGen/CGBuiltin.cpp
clang/lib/CodeGen/TargetInfo.cpp
clang/test/CodeGen/complex-math.c
clang/test/CodeGenOpenCL/builtins.cl
clang/test/CodeGenOpenCL/cl20-device-side-enqueue.cl
clang/test/CodeGenOpenCL/to_addr_builtin.cl
clang/test/CodeGenOpenCLCXX/atexit.cl

Removed: 




diff  --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp
index db7ae582b1d6..316a60c31fd4 100644
--- a/clang/lib/CodeGen/CGBuiltin.cpp
+++ b/clang/lib/CodeGen/CGBuiltin.cpp
@@ -4313,8 +4313,8 @@ RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl 
GD, unsigned BuiltinID,
   Int32Ty, llvm::ArrayRef(ArgTys), false);
   Value *BCast = Builder.CreatePointerCast(Arg1, I8PTy);
   return RValue::get(
-  Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name),
- {Arg0, BCast, PacketSize, PacketAlign}));
+  EmitRuntimeCall(CGM.CreateRuntimeFunction(FTy, Name),
+  {Arg0, BCast, PacketSize, PacketAlign}));
 } else {
   assert(4 == E->getNumArgs() &&
  "Illegal number of parameters to pipe function");
@@ -4332,9 +4332,9 @@ RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl 
GD, unsigned BuiltinID,
   // it to i32.
   if (Arg2->getType() != Int32Ty)
 Arg2 = Builder.CreateZExtOrTrunc(Arg2, Int32Ty);
-  return RValue::get(Builder.CreateCall(
-  CGM.CreateRuntimeFunction(FTy, Name),
-  {Arg0, Arg1, Arg2, BCast, PacketSize, PacketAlign}));
+  return RValue::get(
+  EmitRuntimeCall(CGM.CreateRuntimeFunction(FTy, Name),
+  {Arg0, Arg1, Arg2, BCast, PacketSize, PacketAlign}));
 }
   }
   // OpenCL v2.0 s6.13.16 ,s9.17.3.5 - Built-in pipe reserve read and write
@@ -4375,9 +4375,8 @@ RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl 
GD, unsigned BuiltinID,
 // it to i32.
 if (Arg1->getType() != Int32Ty)
   Arg1 = Builder.CreateZExtOrTrunc(Arg1, Int32Ty);
-return RValue::get(
-Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name),
-   {Arg0, Arg1, PacketSize, PacketAlign}));
+return RValue::get(EmitRuntimeCall(CGM.CreateRuntimeFunction(FTy, Name),
+   {Arg0, Arg1, PacketSize, PacketAlign}));
   }
   // OpenCL v2.0 s6.13.16, s9.17.3.5 - Built-in pipe commit read and write
   // functions
@@ -4413,9 +4412,8 @@ RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl 
GD, unsigned BuiltinID,
 llvm::FunctionType::get(llvm::Type::getVoidTy(getLLVMContext()),
 llvm::ArrayRef(ArgTys), false);
 
-return RValue::get(
-Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name),
-   {Arg0, Arg1, PacketSize, PacketAlign}));
+return RValue::get(EmitRuntimeCall(CGM.CreateRuntimeFunction(FTy, Name),
+   {Arg0, Arg1, PacketSize, PacketAlign}));
   }
   // OpenCL v2.0 s6.13.16.4 Built-in pipe query functions
   case Builtin::BIget_pipe_num_packets:
@@ -4438,8 +4436,8 @@ RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl 
GD, unsigned BuiltinID,
 llvm::FunctionType *FTy = llvm::FunctionType::get(
 Int32Ty, llvm::ArrayRef(ArgTys), false);
 
-return RValue::get(Builder.CreateCall(CGM.CreateRuntimeFunction(FTy, Name),
-  {Arg0, PacketSize, PacketAlign}));
+return RValue::get(EmitRuntimeCall(CGM.CreateRuntimeFunction(FTy, Name),
+   {Arg0, PacketSize, PacketAlign}));
   }
 
   // OpenCL v2.0 s6.13.9 - Address space qualifier functions.
@@ -4461,7 +4459,7 @@ RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl 
GD, unsigned BuiltinID,
   NewArg = Builder.CreateBitOrPointerCast(Arg0, NewArgT);
 auto NewName = std::string("__") + E->getDirectCallee()->getName().str();

[llvm-branch-commits] [llvm] b0ce2b7 - [BasicAA] Add tests for non-zero var index (NFC)

[Nikita Popov via llvm-branch-commits]

Author: Nikita Popov
Date: 2020-12-12T15:00:46+01:00
New Revision: b0ce2b72e8b70a4fb4b6ef385e0989955bd7e01b

URL: 
https://github.com/llvm/llvm-project/commit/b0ce2b72e8b70a4fb4b6ef385e0989955bd7e01b
DIFF: 
https://github.com/llvm/llvm-project/commit/b0ce2b72e8b70a4fb4b6ef385e0989955bd7e01b.diff

LOG: [BasicAA] Add tests for non-zero var index (NFC)

Added: 


Modified: 
llvm/test/Analysis/BasicAA/sequential-gep.ll

Removed: 




diff  --git a/llvm/test/Analysis/BasicAA/sequential-gep.ll 
b/llvm/test/Analysis/BasicAA/sequential-gep.ll
index bc455a04adc4..2b61b5327c10 100644
--- a/llvm/test/Analysis/BasicAA/sequential-gep.ll
+++ b/llvm/test/Analysis/BasicAA/sequential-gep.ll
@@ -110,4 +110,31 @@ define void @add_non_zero_with_offset(i32* %p, i32 
%addend, i32* %q) {
   ret void
 }
 
+; CHECK-LABEL: non_zero_index_simple
+; CHECK: MayAlias: i32* %gep, i32* %p
+; CHECK: MayAlias: i16* %gep.16, i32* %p
+; CHECK: MayAlias: i32* %p, i64* %gep.64
+; TODO: First two could be NoAlias.
+define void @non_zero_index_simple(i32* %p, i32* %q) {
+  %knownnonzero = load i32, i32* %q, !range !0
+  %gep = getelementptr i32, i32* %p, i32 %knownnonzero
+  %gep.16 = bitcast i32* %gep to i16*
+  %gep.64 = bitcast i32* %gep to i64*
+  ret void
+}
+
+; CHECK-LABEL: non_zero_index_with_offset
+; CHECK: MayAlias: i32* %gep, i32* %p
+; CHECK: MayAlias: i16* %gep.16, i32* %p
+; TODO: Last could be NoAlias.
+define void @non_zero_index_with_offset(i32* %p, i32* %q) {
+  %knownnonzero = load i32, i32* %q, !range !0
+  %p.8 = bitcast i32* %p to i8*
+  %p.off.8 = getelementptr i8, i8* %p.8, i32 2
+  %p.off = bitcast i8* %p.off.8 to i32*
+  %gep = getelementptr i32, i32* %p.off, i32 %knownnonzero
+  %gep.16 = bitcast i32* %gep to i16*
+  ret void
+}
+
 !0 = !{ i32 1, i32 5 }



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[llvm-branch-commits] [llvm] d716eab - [BasicAA] Make non-equal index handling simpler to extend (NFC)

[Nikita Popov via llvm-branch-commits]

Author: Nikita Popov
Date: 2020-12-12T15:00:47+01:00
New Revision: d716eab197abec0b9aab4a76cd1a52b248b8c3b1

URL: 
https://github.com/llvm/llvm-project/commit/d716eab197abec0b9aab4a76cd1a52b248b8c3b1
DIFF: 
https://github.com/llvm/llvm-project/commit/d716eab197abec0b9aab4a76cd1a52b248b8c3b1.diff

LOG: [BasicAA] Make non-equal index handling simpler to extend (NFC)

Added: 


Modified: 
llvm/lib/Analysis/BasicAliasAnalysis.cpp

Removed: 




diff  --git a/llvm/lib/Analysis/BasicAliasAnalysis.cpp 
b/llvm/lib/Analysis/BasicAliasAnalysis.cpp
index caf540bb7fd9..9ba61ad64178 100644
--- a/llvm/lib/Analysis/BasicAliasAnalysis.cpp
+++ b/llvm/lib/Analysis/BasicAliasAnalysis.cpp
@@ -1285,24 +1285,27 @@ AliasResult BasicAAResult::aliasGEP(
 (-DecompGEP1.Offset).uge(V1Size.getValue()))
   return NoAlias;
 
-// Try to determine whether the variable part of the GEP is non-zero, in
-// which case we can add/subtract a minimum scale from the offset.
-// TODO: Currently this handles the case of Scale*V0-Scale*V1 where V0!=V1.
-// We could also handle Scale*V0 where V0!=0.
-if (V1Size.hasValue() && V2Size.hasValue() &&
-DecompGEP1.VarIndices.size() == 2) {
-  const VariableGEPIndex &Var0 = DecompGEP1.VarIndices[0];
-  const VariableGEPIndex &Var1 = DecompGEP1.VarIndices[1];
-  // Check that VisitedPhiBBs is empty, to avoid reasoning about inequality
-  // of values across loop iterations.
-  if (Var0.Scale == -Var1.Scale && Var0.ZExtBits == Var1.ZExtBits &&
-  Var0.SExtBits == Var1.SExtBits && VisitedPhiBBs.empty() &&
-  isKnownNonEqual(Var0.V, Var1.V, DL)) {
-// If the indexes are not equal, the actual offset will have at least
-// Scale or -Scale added to it.
-APInt Scale = Var0.Scale.abs();
-APInt OffsetLo = DecompGEP1.Offset - Scale;
-APInt OffsetHi = DecompGEP1.Offset + Scale;
+if (V1Size.hasValue() && V2Size.hasValue()) {
+  // Try to determine whether abs(VarIndex) > 0.
+  Optional MinAbsVarIndex;
+  // TODO: Could handle single non-zero index as well.
+  if (DecompGEP1.VarIndices.size() == 2) {
+// VarIndex = Scale*V0 + (-Scale)*V1.
+// If V0 != V1 then abs(VarIndex) >= abs(Scale).
+// Check that VisitedPhiBBs is empty, to avoid reasoning about
+// inequality of values across loop iterations.
+const VariableGEPIndex &Var0 = DecompGEP1.VarIndices[0];
+const VariableGEPIndex &Var1 = DecompGEP1.VarIndices[1];
+if (Var0.Scale == -Var1.Scale && Var0.ZExtBits == Var1.ZExtBits &&
+Var0.SExtBits == Var1.SExtBits && VisitedPhiBBs.empty() &&
+isKnownNonEqual(Var0.V, Var1.V, DL))
+  MinAbsVarIndex = Var0.Scale.abs();
+  }
+
+  if (MinAbsVarIndex) {
+// The constant offset will have added at least +/-MinAbsVarIndex to 
it.
+APInt OffsetLo = DecompGEP1.Offset - *MinAbsVarIndex;
+APInt OffsetHi = DecompGEP1.Offset + *MinAbsVarIndex;
 // Check that an access at OffsetLo or lower, and an access at OffsetHi
 // or higher both do not alias.
 if (OffsetLo.isNegative() && (-OffsetLo).uge(V1Size.getValue()) &&



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[llvm-branch-commits] [llvm] ab97c9b - [LV] Fix scalar cost for tail predicated loops

[David Green via llvm-branch-commits]

Author: David Green
Date: 2020-12-12T14:21:40Z
New Revision: ab97c9bdb747c873cd35a18229e2694156a7607d

URL: 
https://github.com/llvm/llvm-project/commit/ab97c9bdb747c873cd35a18229e2694156a7607d
DIFF: 
https://github.com/llvm/llvm-project/commit/ab97c9bdb747c873cd35a18229e2694156a7607d.diff

LOG: [LV] Fix scalar cost for tail predicated loops

When it comes to the scalar cost of any predicated block, the loop
vectorizer by default regards this predication as a sign that it is
looking at an if-conversion and divides the scalar cost of the block by
2, assuming it would only be executed half the time. This however makes
no sense if the predication has been introduced to tail predicate the
loop.

Original patch by Anna Welker

Differential Revision: https://reviews.llvm.org/D86452

Added: 


Modified: 
llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
llvm/test/Transforms/LoopVectorize/ARM/scalar-block-cost.ll

Removed: 




diff  --git a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp 
b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
index c381377b67c9..663ea50c4c02 100644
--- a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+++ b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
@@ -6483,9 +6483,10 @@ LoopVectorizationCostModel::expectedCost(ElementCount 
VF) {
 // if-converted. This means that the block's instructions (aside from
 // stores and instructions that may divide by zero) will now be
 // unconditionally executed. For the scalar case, we may not always execute
-// the predicated block. Thus, scale the block's cost by the probability of
-// executing it.
-if (VF.isScalar() && blockNeedsPredication(BB))
+// the predicated block, if it is an if-else block. Thus, scale the block's
+// cost by the probability of executing it. blockNeedsPredication from
+// Legal is used so as to not include all blocks in tail folded loops.
+if (VF.isScalar() && Legal->blockNeedsPredication(BB))
   BlockCost.first /= getReciprocalPredBlockProb();
 
 Cost.first += BlockCost.first;

diff  --git a/llvm/test/Transforms/LoopVectorize/ARM/scalar-block-cost.ll 
b/llvm/test/Transforms/LoopVectorize/ARM/scalar-block-cost.ll
index 959fbe676e67..fc8ea4fc938c 100644
--- a/llvm/test/Transforms/LoopVectorize/ARM/scalar-block-cost.ll
+++ b/llvm/test/Transforms/LoopVectorize/ARM/scalar-block-cost.ll
@@ -15,7 +15,7 @@ define void @pred_loop(i32* %off, i32* %data, i32* %dst, i32 
%n) #0 {
 ; CHECK-COST-NEXT: LV: Found an estimated cost of 1 for VF 1 For instruction:  
 store i32 %add1, i32* %arrayidx2, align 4
 ; CHECK-COST-NEXT: LV: Found an estimated cost of 1 for VF 1 For instruction:  
 %exitcond.not = icmp eq i32 %add, %n
 ; CHECK-COST-NEXT: LV: Found an estimated cost of 0 for VF 1 For instruction:  
 br i1 %exitcond.not, label %exit.loopexit, label %for.body
-; CHECK-COST-NEXT: LV: Scalar loop costs: 2.
+; CHECK-COST-NEXT: LV: Scalar loop costs: 5.
 
 entry:
   %cmp8 = icmp sgt i32 %n, 0



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[llvm-branch-commits] [llvm] f61e5ec - [X86] Avoid data16 prefix for lea in x32 mode

[Harald van Dijk via llvm-branch-commits]

Author: Harald van Dijk
Date: 2020-12-12T17:05:24Z
New Revision: f61e5ecb919b3901590328e69d3e4a557eefd788

URL: 
https://github.com/llvm/llvm-project/commit/f61e5ecb919b3901590328e69d3e4a557eefd788
DIFF: 
https://github.com/llvm/llvm-project/commit/f61e5ecb919b3901590328e69d3e4a557eefd788.diff

LOG: [X86] Avoid data16 prefix for lea in x32 mode

The ABI demands a data16 prefix for lea in 64-bit LP64 mode, but not in
64-bit ILP32 mode. In both modes this prefix would ordinarily be
ignored, but the instructions may be changed by the linker to
instructions that are affected by the prefix.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D93157

Added: 


Modified: 
llvm/lib/Target/X86/X86MCInstLower.cpp
llvm/test/CodeGen/X86/pic.ll

Removed: 




diff  --git a/llvm/lib/Target/X86/X86MCInstLower.cpp 
b/llvm/lib/Target/X86/X86MCInstLower.cpp
index 6602d819929e..29faaa2dad36 100644
--- a/llvm/lib/Target/X86/X86MCInstLower.cpp
+++ b/llvm/lib/Target/X86/X86MCInstLower.cpp
@@ -979,6 +979,8 @@ void X86AsmPrinter::LowerTlsAddr(X86MCInstLower 
&MCInstLowering,
   NoAutoPaddingScope NoPadScope(*OutStreamer);
   bool Is64Bits = MI.getOpcode() != X86::TLS_addr32 &&
   MI.getOpcode() != X86::TLS_base_addr32;
+  bool Is64BitsLP64 = MI.getOpcode() == X86::TLS_addr64 ||
+  MI.getOpcode() == X86::TLS_base_addr64;
   MCContext &Ctx = OutStreamer->getContext();
 
   MCSymbolRefExpr::VariantKind SRVK;
@@ -1012,7 +1014,7 @@ void X86AsmPrinter::LowerTlsAddr(X86MCInstLower 
&MCInstLowering,
 
   if (Is64Bits) {
 bool NeedsPadding = SRVK == MCSymbolRefExpr::VK_TLSGD;
-if (NeedsPadding)
+if (NeedsPadding && Is64BitsLP64)
   EmitAndCountInstruction(MCInstBuilder(X86::DATA16_PREFIX));
 EmitAndCountInstruction(MCInstBuilder(X86::LEA64r)
 .addReg(X86::RDI)

diff  --git a/llvm/test/CodeGen/X86/pic.ll b/llvm/test/CodeGen/X86/pic.ll
index 3f3417e89ad8..101c749633bc 100644
--- a/llvm/test/CodeGen/X86/pic.ll
+++ b/llvm/test/CodeGen/X86/pic.ll
@@ -285,6 +285,7 @@ entry:
 ; CHECK-I686-DAG:  calll   ___tls_get_addr@PLT
 ; CHECK-I686-DAG:  lealtlssrcgd@TLSGD(,%ebx), %eax
 ; CHECK-I686-DAG:  calll   ___tls_get_addr@PLT
+; CHECK-X32-NOT:   data16
 ; CHECK-X32-DAG:   leaqtlsdstgd@TLSGD(%rip), %rdi
 ; CHECK-X32-DAG:   callq   __tls_get_addr@PLT
 ; CHECK-X32-DAG:   leaqtlsptrgd@TLSGD(%rip), %rdi



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[llvm-branch-commits] [llvm] 67c97ed - [UpdateTestChecks] Add --(no-)x86_scrub_sp option.

[Harald van Dijk via llvm-branch-commits]

Author: Harald van Dijk
Date: 2020-12-12T17:11:13Z
New Revision: 67c97ed4a5a99315b305750a7fc0aaa6744e3d37

URL: 
https://github.com/llvm/llvm-project/commit/67c97ed4a5a99315b305750a7fc0aaa6744e3d37
DIFF: 
https://github.com/llvm/llvm-project/commit/67c97ed4a5a99315b305750a7fc0aaa6744e3d37.diff

LOG: [UpdateTestChecks] Add --(no-)x86_scrub_sp option.

This makes it possible to use update_llc_test_checks to manage tests
that check for incorrect x86 stack offsets. It does not yet modify any
test to make use of this new option.

Added: 


Modified: 
llvm/utils/UpdateTestChecks/asm.py
llvm/utils/update_llc_test_checks.py

Removed: 




diff  --git a/llvm/utils/UpdateTestChecks/asm.py 
b/llvm/utils/UpdateTestChecks/asm.py
index 24090fc2ea7e..476e7f1c75c9 100644
--- a/llvm/utils/UpdateTestChecks/asm.py
+++ b/llvm/utils/UpdateTestChecks/asm.py
@@ -177,8 +177,9 @@ def scrub_asm_x86(asm, args):
   # Detect stack spills and reloads and hide their exact offset and whether
   # they used the stack pointer or frame pointer.
   asm = SCRUB_X86_SPILL_RELOAD_RE.sub(r'{{[-0-9]+}}(%\1{{[sb]}}p)\2', asm)
-  # Generically match the stack offset of a memory operand.
-  asm = SCRUB_X86_SP_RE.sub(r'{{[0-9]+}}(%\1)', asm)
+  if getattr(args, 'x86_scrub_sp', True):
+# Generically match the stack offset of a memory operand.
+asm = SCRUB_X86_SP_RE.sub(r'{{[0-9]+}}(%\1)', asm)
   if getattr(args, 'x86_scrub_rip', False):
 # Generically match a RIP-relative memory operand.
 asm = SCRUB_X86_RIP_RE.sub(r'{{.*}}(%rip)', asm)

diff  --git a/llvm/utils/update_llc_test_checks.py 
b/llvm/utils/update_llc_test_checks.py
index b5422bd18791..2826b16fea2c 100755
--- a/llvm/utils/update_llc_test_checks.py
+++ b/llvm/utils/update_llc_test_checks.py
@@ -27,9 +27,14 @@ def main():
   parser.add_argument(
   '--extra_scrub', action='store_true',
   help='Always use additional regex to further reduce 
diff s between various subtargets')
+  parser.add_argument(
+  '--x86_scrub_sp', action='store_true', default=True,
+  help='Use regex for x86 sp matching to reduce 
diff s between various subtargets')
+  parser.add_argument(
+  '--no_x86_scrub_sp', action='store_false', dest='x86_scrub_sp')
   parser.add_argument(
   '--x86_scrub_rip', action='store_true', default=True,
-  help='Use more regex for x86 matching to reduce 
diff s between various subtargets')
+  help='Use more regex for x86 rip matching to reduce 
diff s between various subtargets')
   parser.add_argument(
   '--no_x86_scrub_rip', action='store_false', dest='x86_scrub_rip')
   parser.add_argument(



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[llvm-branch-commits] [llvm] 2cf5310 - [Hexagon] Create vector masks for scalar loads/stores

[Krzysztof Parzyszek via llvm-branch-commits]

Author: Krzysztof Parzyszek
Date: 2020-12-12T11:12:17-06:00
New Revision: 2cf53104711ec0bd8355ea42158f5bdc9400036c

URL: 
https://github.com/llvm/llvm-project/commit/2cf53104711ec0bd8355ea42158f5bdc9400036c
DIFF: 
https://github.com/llvm/llvm-project/commit/2cf53104711ec0bd8355ea42158f5bdc9400036c.diff

LOG: [Hexagon] Create vector masks for scalar loads/stores

AlignVectors treats all loaded/stored values as vectors of bytes,
and masks as corresponding vectors of booleans, so make getMask
produce a 1-element vector for scalars from the start.

Added: 
llvm/test/CodeGen/Hexagon/autohvx/vector-align-scalar-mask.ll

Modified: 
llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp

Removed: 




diff  --git a/llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp 
b/llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp
index cee620e03b00..fb716ef5bbc2 100644
--- a/llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp
@@ -416,7 +416,8 @@ auto AlignVectors::getMask(Value *Val) const -> Value * {
 int ElemCount = VecTy->getElementCount().getFixedValue();
 return HVC.getFullValue(HVC.getBoolTy(ElemCount));
   }
-  return HVC.getFullValue(HVC.getBoolTy());
+  // For scalars, return a vector <1 x i1>.
+  return HVC.getFullValue(HVC.getBoolTy(1));
 }
 
 auto AlignVectors::getPassThrough(Value *Val) const -> Value * {

diff  --git a/llvm/test/CodeGen/Hexagon/autohvx/vector-align-scalar-mask.ll 
b/llvm/test/CodeGen/Hexagon/autohvx/vector-align-scalar-mask.ll
new file mode 100644
index ..0cb74905a28c
--- /dev/null
+++ b/llvm/test/CodeGen/Hexagon/autohvx/vector-align-scalar-mask.ll
@@ -0,0 +1,30 @@
+; RUN: llc -march=hexagon < %s | FileCheck %s
+
+; Check that this doesn't crash.
+; CHECK: vmem
+
+target datalayout = 
"e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"
+target triple = "hexagon"
+
+define dllexport void @f0(i32* %a0, i32 %a1, i32 %a2, <32 x i32> %a3) 
local_unnamed_addr #0 {
+b0:
+  %v0 = add nuw nsw i32 0, 96
+  %v1 = getelementptr inbounds i32, i32* %a0, i32 %v0
+  %v2 = bitcast i32* %v1 to <32 x i32>*
+  %v3 = add nuw nsw i32 0, 225
+  %v4 = getelementptr inbounds i32, i32* %a0, i32 %v3
+  %v5 = add nuw nsw i32 0, 226
+  %v6 = getelementptr inbounds i32, i32* %a0, i32 %v5
+  br label %b1
+
+b1:   ; preds = %b1, %b0
+  br i1 undef, label %b2, label %b1
+
+b2:   ; preds = %b1
+  store <32 x i32> %a3, <32 x i32>* %v2, align 4
+  store i32 %a1, i32* %v4, align 4
+  store i32 %a2, i32* %v6, align 4
+  ret void
+}
+
+attributes #0 = { "target-features"="+hvxv66,+hvx-length128b" }



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[llvm-branch-commits] [llvm] 215c1b1 - [Transforms] Use is_contained (NFC)

[Kazu Hirata via llvm-branch-commits]

Author: Kazu Hirata
Date: 2020-12-12T09:37:49-08:00
New Revision: 215c1b19359e2fcc7f01e97b742cbb26aeb678a0

URL: 
https://github.com/llvm/llvm-project/commit/215c1b19359e2fcc7f01e97b742cbb26aeb678a0
DIFF: 
https://github.com/llvm/llvm-project/commit/215c1b19359e2fcc7f01e97b742cbb26aeb678a0.diff

LOG: [Transforms] Use is_contained (NFC)

Added: 


Modified: 
llvm/lib/Transforms/IPO/HotColdSplitting.cpp
llvm/lib/Transforms/IPO/Inliner.cpp
llvm/lib/Transforms/Vectorize/VPlanValue.h

Removed: 




diff  --git a/llvm/lib/Transforms/IPO/HotColdSplitting.cpp 
b/llvm/lib/Transforms/IPO/HotColdSplitting.cpp
index 042a8dbad6bd..49078b9baead 100644
--- a/llvm/lib/Transforms/IPO/HotColdSplitting.cpp
+++ b/llvm/lib/Transforms/IPO/HotColdSplitting.cpp
@@ -283,7 +283,7 @@ static int getOutliningPenalty(ArrayRef 
Region,
 }
 
 for (BasicBlock *SuccBB : successors(BB)) {
-  if (find(Region, SuccBB) == Region.end()) {
+  if (!is_contained(Region, SuccBB)) {
 NoBlocksReturn = false;
 SuccsOutsideRegion.insert(SuccBB);
   }

diff  --git a/llvm/lib/Transforms/IPO/Inliner.cpp 
b/llvm/lib/Transforms/IPO/Inliner.cpp
index ae4441b07c4c..b0ac3d31f468 100644
--- a/llvm/lib/Transforms/IPO/Inliner.cpp
+++ b/llvm/lib/Transforms/IPO/Inliner.cpp
@@ -906,7 +906,7 @@ PreservedAnalyses InlinerPass::run(LazyCallGraph::SCC 
&InitialC,
   // Note that after this point, it is an error to do anything other
   // than use the callee's address or delete it.
   Callee.dropAllReferences();
-  assert(find(DeadFunctions, &Callee) == DeadFunctions.end() &&
+  assert(!is_contained(DeadFunctions, &Callee) &&
  "Cannot put cause a function to become dead twice!");
   DeadFunctions.push_back(&Callee);
   CalleeWasDeleted = true;

diff  --git a/llvm/lib/Transforms/Vectorize/VPlanValue.h 
b/llvm/lib/Transforms/Vectorize/VPlanValue.h
index a7e874009dc4..b1f2439882f7 100644
--- a/llvm/lib/Transforms/Vectorize/VPlanValue.h
+++ b/llvm/lib/Transforms/Vectorize/VPlanValue.h
@@ -260,7 +260,7 @@ class VPDef {
   void removeDefinedValue(VPValue *V) {
 assert(V->getDef() == this &&
"can only remove VPValue linked with this VPDef");
-assert(find(DefinedValues, V) != DefinedValues.end() &&
+assert(is_contained(DefinedValues, V) &&
"VPValue to remove must be in DefinedValues");
 erase_value(DefinedValues, V);
 V->Def = nullptr;



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[llvm-branch-commits] [llvm] 9293b25 - [Analysis/Interval] Remove isLoop (NFC)

[Kazu Hirata via llvm-branch-commits]

Author: Kazu Hirata
Date: 2020-12-12T10:09:35-08:00
New Revision: 9293b251b55bdc87a14b4b3be6874624cb83cfd9

URL: 
https://github.com/llvm/llvm-project/commit/9293b251b55bdc87a14b4b3be6874624cb83cfd9
DIFF: 
https://github.com/llvm/llvm-project/commit/9293b251b55bdc87a14b4b3be6874624cb83cfd9.diff

LOG: [Analysis/Interval] Remove isLoop (NFC)

The last use of isLoop was removed on Apr 29, 2002 in commit
09bbb5c015c6e40b3d45da057f955ddb7c8f8485 as part of an effort to
remove "old induction varaible cannonicalization pass built on top of
interval analysis".

Added: 


Modified: 
llvm/include/llvm/Analysis/Interval.h
llvm/lib/Analysis/Interval.cpp

Removed: 




diff  --git a/llvm/include/llvm/Analysis/Interval.h 
b/llvm/include/llvm/Analysis/Interval.h
index 5c9a4535bc7f..9afe659d00dd 100644
--- a/llvm/include/llvm/Analysis/Interval.h
+++ b/llvm/include/llvm/Analysis/Interval.h
@@ -89,9 +89,6 @@ class Interval {
 return HeaderNode == I.HeaderNode;
   }
 
-  /// isLoop - Find out if there is a back edge in this interval...
-  bool isLoop() const;
-
   /// print - Show contents in human readable format...
   void print(raw_ostream &O) const;
 };

diff  --git a/llvm/lib/Analysis/Interval.cpp b/llvm/lib/Analysis/Interval.cpp
index 07d6e27c13be..e228ec4f2126 100644
--- a/llvm/lib/Analysis/Interval.cpp
+++ b/llvm/lib/Analysis/Interval.cpp
@@ -22,17 +22,6 @@ using namespace llvm;
 // Interval Implementation
 
//===--===//
 
-// isLoop - Find out if there is a back edge in this interval...
-bool Interval::isLoop() const {
-  // There is a loop in this interval iff one of the predecessors of the header
-  // node lives in the interval.
-  for (::pred_iterator I = ::pred_begin(HeaderNode), E = 
::pred_end(HeaderNode);
-   I != E; ++I)
-if (contains(*I))
-  return true;
-  return false;
-}
-
 void Interval::print(raw_ostream &OS) const {
   OS << "-\n"
<< "Interval Contents:\n";



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[llvm-branch-commits] [mlir] 09b0e08 - [mlir] Print bad size in AttrSizedOperandSegments

[Brian Gesiak via llvm-branch-commits]

Author: Brian Gesiak
Date: 2020-12-12T13:12:31-05:00
New Revision: 09b0e0884a3ea561f11a97644a9cf6c15eac6ec0

URL: 
https://github.com/llvm/llvm-project/commit/09b0e0884a3ea561f11a97644a9cf6c15eac6ec0
DIFF: 
https://github.com/llvm/llvm-project/commit/09b0e0884a3ea561f11a97644a9cf6c15eac6ec0.diff

LOG: [mlir] Print bad size in AttrSizedOperandSegments

When printing verification errors for ops with the incorrect number of
operand segments, print the required number as well as the actual
number. Split off from D93005.

Differential Revision: https://reviews.llvm.org/D93145

Added: 


Modified: 
mlir/test/IR/traits.mlir
mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp

Removed: 




diff  --git a/mlir/test/IR/traits.mlir b/mlir/test/IR/traits.mlir
index c023db338a73..e3604b7b5387 100644
--- a/mlir/test/IR/traits.mlir
+++ b/mlir/test/IR/traits.mlir
@@ -448,7 +448,7 @@ func @failedResultSizeAttrWrongTotalSize() {
 // -
 
 func @failedResultSizeAttrWrongCount() {
-  // expected-error @+1 {{'result_segment_sizes' attribute for specifying 
result segments must have 4 elements}}
+  // expected-error @+1 {{'result_segment_sizes' attribute for specifying 
result segments must have 4 elements, but got 3}}
   %0:4 = "test.attr_sized_results"() {result_segment_sizes = dense<[2, 1, 1]>: 
vector<3xi32>} : () -> (i32, i32, i32, i32)
 }
 

diff  --git a/mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp 
b/mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
index 04bc10d338d7..c97aa043bb6c 100644
--- a/mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
+++ b/mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
@@ -2211,7 +2211,7 @@ void OpOperandAdaptorEmitter::addVerification() {
 auto numElements = 
sizeAttr.getType().cast<::mlir::ShapedType>().getNumElements();
 if (numElements != {1})
   return emitError(loc, "'{0}' attribute for specifying {2} segments "
-   "must have {1} elements");
+   "must have {1} elements, but got ") << numElements;
   }
   )";
 



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[llvm-branch-commits] [llvm] 87a4e14 - [NFC][AMDGPU] AMDGPUUsage updates

[via llvm-branch-commits]

Author: Tony
Date: 2020-12-12T18:19:02Z
New Revision: 87a4e14e40ee2d1dbad79092cd5744ad84c972c2

URL: 
https://github.com/llvm/llvm-project/commit/87a4e14e40ee2d1dbad79092cd5744ad84c972c2
DIFF: 
https://github.com/llvm/llvm-project/commit/87a4e14e40ee2d1dbad79092cd5744ad84c972c2.diff

LOG: [NFC][AMDGPU] AMDGPUUsage updates

- Document which processors are supported by which runtimes.
- Add missing mappings for code object V2 note records

Differential Revision: https://reviews.llvm.org/D93016

Added: 


Modified: 
llvm/docs/AMDGPUUsage.rst

Removed: 




diff  --git a/llvm/docs/AMDGPUUsage.rst b/llvm/docs/AMDGPUUsage.rst
index bcb960dd75fb..e4469dc4c143 100644
--- a/llvm/docs/AMDGPUUsage.rst
+++ b/llvm/docs/AMDGPUUsage.rst
@@ -71,15 +71,18 @@ to specify the target triple:
  ``amdhsa`` Compute kernels executed on HSA [HSA]_ compatible runtimes
 such as:
 
-- AMD's ROCm runtime [AMD-ROCm]_ on Linux. See *AMD ROCm
-  Release Notes* [AMD-ROCm-Release-Notes]_ for supported
-  hardware and software.
-- AMD's PAL runtime using the *amdhsa* loader on Windows.
+- AMD's ROCm™ runtime [AMD-ROCm]_ using the *rocm-amdhsa*
+  loader on Linux. See *AMD ROCm Platform Release Notes*
+  [AMD-ROCm-Release-Notes]_ for supported hardware and
+  software.
+- AMD's PAL runtime using the *pal-amdhsa* loader on
+  Windows.
 
  ``amdpal`` Graphic shaders and compute kernels executed on AMD's PAL
-runtime using the *amdpal* loader on Windows and Linux Pro.
- ``mesa3d`` Graphic shaders and compute kernels executed on Mesa 3D
-runtime.
+runtime using the *pal-amdpal* loader on Windows and Linux
+Pro.
+ ``mesa3d`` Graphic shaders and compute kernels executed on AMD's Mesa
+3D runtime using the *mesa-mesa3d* loader on Linux.
  == 

 
   .. table:: AMDGPU Environments
@@ -104,23 +107,21 @@ specific information.
   .. table:: AMDGPU Processors
  :name: amdgpu-processor-table
 
- === ===  = = 
=== == ==
- Processor   Alternative Target   dGPU/ TargetTarget   
   OS Example
- Processor   Triple   APU   Features  
Properties  SupportProducts
- Architecture   Supported  
   ()
-   
   *(see*
-   
   `amdgpu-os`_
+ === ===  = = 
=== === ==
+ Processor   Alternative Target   dGPU/ TargetTarget   
   OS Support  Example
+ Processor   Triple   APU   Features  
Properties  *(see*  Products
+ Architecture   Supported  
   `amdgpu-os`_

   *and

   corresponding
-   
   runtime
-   
   release notes
-   
   for current
-   
   information
-   
   and level of
+   
   runtime release
+   
   notes for
+   
   current
+   
   information and
+   
   level of

   support)*
- === ===  = = 
=== == ==
+ === ===  = = 
=== === ==
  **Radeon HD 2000/3000 Series (R600)** [AMD-RADEON-HD-2000-3

[llvm-branch-commits] [clang] 7beee56 - [AMDGPU] Add missing targets to target-invalid-cpu-note.c

[via llvm-branch-commits]

Author: Tony
Date: 2020-12-12T18:19:03Z
New Revision: 7beee561e23db56c7e24462a9870a3ba58a9b2b3

URL: 
https://github.com/llvm/llvm-project/commit/7beee561e23db56c7e24462a9870a3ba58a9b2b3
DIFF: 
https://github.com/llvm/llvm-project/commit/7beee561e23db56c7e24462a9870a3ba58a9b2b3.diff

LOG: [AMDGPU] Add missing targets to target-invalid-cpu-note.c

Differential Revision: https://reviews.llvm.org/D93018

Added: 


Modified: 
clang/test/Misc/target-invalid-cpu-note.c

Removed: 




diff  --git a/clang/test/Misc/target-invalid-cpu-note.c 
b/clang/test/Misc/target-invalid-cpu-note.c
index 3abf51b1c783..c61f17986ec5 100644
--- a/clang/test/Misc/target-invalid-cpu-note.c
+++ b/clang/test/Misc/target-invalid-cpu-note.c
@@ -73,9 +73,9 @@
 
 // RUN: not %clang_cc1 -triple r600--- -target-cpu not-a-cpu -fsyntax-only %s 
2>&1 | FileCheck %s --check-prefix R600
 // R600: error: unknown target CPU 'not-a-cpu'
-// R600: note: valid target CPU values are: r600, rv630, rv635, r630, rs780, 
-// R600-SAME: rs880, rv610, rv620, rv670, rv710, rv730, rv740, rv770, cedar, 
-// R600-SAME: palm, cypress, hemlock, juniper, redwood, sumo, sumo2, barts, 
+// R600: note: valid target CPU values are: r600, rv630, rv635, r630, rs780,
+// R600-SAME: rs880, rv610, rv620, rv670, rv710, rv730, rv740, rv770, cedar,
+// R600-SAME: palm, cypress, hemlock, juniper, redwood, sumo, sumo2, barts,
 // R600-SAME: caicos, aruba, cayman, turks
 
 
@@ -83,9 +83,11 @@
 // AMDGCN: error: unknown target CPU 'not-a-cpu'
 // AMDGCN: note: valid target CPU values are: gfx600, tahiti, gfx601, 
pitcairn, verde,
 // AMDGCN-SAME: gfx602, hainan, oland, gfx700, kaveri, gfx701, hawaii, gfx702,
-// AMDGCN-SAME: gfx703, kabini, mullins, gfx704, bonaire, gfx705, gfx801, 
carrizo, 
+// AMDGCN-SAME: gfx703, kabini, mullins, gfx704, bonaire, gfx705, gfx801, 
carrizo,
 // AMDGCN-SAME: gfx802, iceland, tonga, gfx803, fiji, polaris10, polaris11,
-// AMDGCN-SAME: gfx805, tongapro, gfx810, stoney, gfx900, gfx902
+// AMDGCN-SAME: gfx805, tongapro, gfx810, stoney, gfx900, gfx902, gfx904, 
gfx906,
+// AMDGCN-SAME: gfx908, gfx909, gfx90c, gfx1010, gfx1011, gfx1012, gfx1030, 
gfx1031,
+// AMDGCN-SAME: gfx1032, gfx1033
 
 // RUN: not %clang_cc1 -triple wasm64--- -target-cpu not-a-cpu -fsyntax-only 
%s 2>&1 | FileCheck %s --check-prefix WEBASM
 // WEBASM: error: unknown target CPU 'not-a-cpu'



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[llvm-branch-commits] [clang] 92ab6ed - [AMDGPU] Add missing targets to amdgpu-features.cl

[via llvm-branch-commits]

Author: Tony
Date: 2020-12-12T18:19:02Z
New Revision: 92ab6ed6672b99549f8fd63e3a442db47b1982fe

URL: 
https://github.com/llvm/llvm-project/commit/92ab6ed6672b99549f8fd63e3a442db47b1982fe
DIFF: 
https://github.com/llvm/llvm-project/commit/92ab6ed6672b99549f8fd63e3a442db47b1982fe.diff

LOG: [AMDGPU] Add missing targets to amdgpu-features.cl

Differential Revision: https://reviews.llvm.org/D93017

Added: 


Modified: 
clang/test/CodeGenOpenCL/amdgpu-features.cl

Removed: 




diff  --git a/clang/test/CodeGenOpenCL/amdgpu-features.cl 
b/clang/test/CodeGenOpenCL/amdgpu-features.cl
index 813b39d9ec7b..740521aa3bca 100644
--- a/clang/test/CodeGenOpenCL/amdgpu-features.cl
+++ b/clang/test/CodeGenOpenCL/amdgpu-features.cl
@@ -7,7 +7,18 @@
 // RUN: %clang_cc1 -triple amdgcn -target-cpu gfx601 -S -emit-llvm -o - %s | 
FileCheck --check-prefix=GFX601 %s
 // RUN: %clang_cc1 -triple amdgcn -target-cpu gfx602 -S -emit-llvm -o - %s | 
FileCheck --check-prefix=GFX602 %s
 // RUN: %clang_cc1 -triple amdgcn -target-cpu gfx700 -S -emit-llvm -o - %s | 
FileCheck --check-prefix=GFX700 %s
+// RUN: %clang_cc1 -triple amdgcn -target-cpu gfx701 -S -emit-llvm -o - %s | 
FileCheck --check-prefix=GFX701 %s
+// RUN: %clang_cc1 -triple amdgcn -target-cpu gfx702 -S -emit-llvm -o - %s | 
FileCheck --check-prefix=GFX702 %s
+// RUN: %clang_cc1 -triple amdgcn -target-cpu gfx703 -S -emit-llvm -o - %s | 
FileCheck --check-prefix=GFX703 %s
+// RUN: %clang_cc1 -triple amdgcn -target-cpu gfx704 -S -emit-llvm -o - %s | 
FileCheck --check-prefix=GFX704 %s
+// RUN: %clang_cc1 -triple amdgcn -target-cpu gfx705 -S -emit-llvm -o - %s | 
FileCheck --check-prefix=GFX705 %s
 // RUN: %clang_cc1 -triple amdgcn -target-cpu gfx801 -S -emit-llvm -o - %s | 
FileCheck --check-prefix=GFX801 %s
+// RUN: %clang_cc1 -triple amdgcn -target-cpu gfx802 -S -emit-llvm -o - %s | 
FileCheck --check-prefix=GFX802 %s
+// RUN: %clang_cc1 -triple amdgcn -target-cpu gfx803 -S -emit-llvm -o - %s | 
FileCheck --check-prefix=GFX803 %s
+// RUN: %clang_cc1 -triple amdgcn -target-cpu gfx805 -S -emit-llvm -o - %s | 
FileCheck --check-prefix=GFX805 %s
+// RUN: %clang_cc1 -triple amdgcn -target-cpu gfx810 -S -emit-llvm -o - %s | 
FileCheck --check-prefix=GFX810 %s
+// RUN: %clang_cc1 -triple amdgcn -target-cpu gfx900 -S -emit-llvm -o - %s | 
FileCheck --check-prefix=GFX900 %s
+// RUN: %clang_cc1 -triple amdgcn -target-cpu gfx902 -S -emit-llvm -o - %s | 
FileCheck --check-prefix=GFX902 %s
 // RUN: %clang_cc1 -triple amdgcn -target-cpu gfx904 -S -emit-llvm -o - %s | 
FileCheck --check-prefix=GFX904 %s
 // RUN: %clang_cc1 -triple amdgcn -target-cpu gfx906 -S -emit-llvm -o - %s | 
FileCheck --check-prefix=GFX906 %s
 // RUN: %clang_cc1 -triple amdgcn -target-cpu gfx908 -S -emit-llvm -o - %s | 
FileCheck --check-prefix=GFX908 %s



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[llvm-branch-commits] [llvm] baf931a - [Hexagon] Reconsider getMask fix, return original mask, convert later

[Krzysztof Parzyszek via llvm-branch-commits]

Author: Krzysztof Parzyszek
Date: 2020-12-12T13:27:22-06:00
New Revision: baf931a8427dc29532aa42460604f23bf9a39708

URL: 
https://github.com/llvm/llvm-project/commit/baf931a8427dc29532aa42460604f23bf9a39708
DIFF: 
https://github.com/llvm/llvm-project/commit/baf931a8427dc29532aa42460604f23bf9a39708.diff

LOG: [Hexagon] Reconsider getMask fix, return original mask, convert later

The getPayload/getMask/getPassThrough functions should return values
that could be composed into a masked load/store without any additional
type casts. The previous fix violated that.
Instead, convert scalar mask to a vector right before rescaling.

Added: 


Modified: 
llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp

Removed: 




diff  --git a/llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp 
b/llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp
index fb716ef5bbc2..4c0c202be4be 100644
--- a/llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp
@@ -416,8 +416,7 @@ auto AlignVectors::getMask(Value *Val) const -> Value * {
 int ElemCount = VecTy->getElementCount().getFixedValue();
 return HVC.getFullValue(HVC.getBoolTy(ElemCount));
   }
-  // For scalars, return a vector <1 x i1>.
-  return HVC.getFullValue(HVC.getBoolTy(1));
+  return HVC.getFullValue(HVC.getBoolTy());
 }
 
 auto AlignVectors::getPassThrough(Value *Val) const -> Value * {
@@ -811,14 +810,24 @@ auto AlignVectors::realignGroup(const MoveGroup &Move) 
const -> bool {
 // Stores.
 ByteSpan ASpanV, ASpanM;
 
+// Return a vector value corresponding to the input value Val:
+// either <1 x Val> for scalar Val, or Val itself for vector Val.
+auto MakeVec = [](IRBuilder<> &Builder, Value *Val) -> Value * {
+  Type *Ty = Val->getType();
+  if (Ty->isVectorTy())
+return Val;
+  auto *VecTy = VectorType::get(Ty, 1, /*Scalable*/ false);
+  return Builder.CreateBitCast(Val, VecTy);
+};
+
 for (int i = -1; i != NumSectors; ++i) {
   ByteSpan Section = VSpan.section(i * ScLen, ScLen).normalize();
   Value *AccumV = UndefValue::get(SecTy);
   Value *AccumM = HVC.getNullValue(SecTy);
   for (ByteSpan::Block &S : Section) {
 Value *Pay = getPayload(S.Seg.Val);
-Value *Mask = HVC.rescale(Builder, getMask(S.Seg.Val), Pay->getType(),
-  HVC.getByteTy());
+Value *Mask = HVC.rescale(Builder, MakeVec(Builder, 
getMask(S.Seg.Val)),
+  Pay->getType(), HVC.getByteTy());
 AccumM = HVC.insertb(Builder, AccumM, HVC.vbytes(Builder, Mask),
  S.Seg.Start, S.Seg.Size, S.Pos);
 AccumV = HVC.insertb(Builder, AccumV, HVC.vbytes(Builder, Pay),



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[llvm-branch-commits] [llvm] ff523aa - [CVP] Add additional switch tests (NFC)

[Nikita Popov via llvm-branch-commits]

Author: Nikita Popov
Date: 2020-12-12T20:58:00+01:00
New Revision: ff523aa441fe65971a0815cef43ec63eba749947

URL: 
https://github.com/llvm/llvm-project/commit/ff523aa441fe65971a0815cef43ec63eba749947
DIFF: 
https://github.com/llvm/llvm-project/commit/ff523aa441fe65971a0815cef43ec63eba749947.diff

LOG: [CVP] Add additional switch tests (NFC)

These cover cases handled by getPredicateAt(), but not by the
current implementation:

 * Assumes based on context instruction.
 * Value from phi node in same block (using per-pred reasoning).
 * Value from non-phi node in same block (using block-val reasoning).

Added: 


Modified: 
llvm/test/Transforms/CorrelatedValuePropagation/basic.ll

Removed: 




diff  --git a/llvm/test/Transforms/CorrelatedValuePropagation/basic.ll 
b/llvm/test/Transforms/CorrelatedValuePropagation/basic.ll
index ce8f7853e97b..20d285641da1 100644
--- a/llvm/test/Transforms/CorrelatedValuePropagation/basic.ll
+++ b/llvm/test/Transforms/CorrelatedValuePropagation/basic.ll
@@ -278,6 +278,117 @@ next:
   ret void
 }
 
+define void @switch_nonzero_zext(i8 %s) {
+; CHECK-LABEL: @switch_nonzero_zext(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:[[CMP:%.*]] = icmp ne i8 [[S:%.*]], 0
+; CHECK-NEXT:br i1 [[CMP]], label [[SWITCH:%.*]], label [[EXIT:%.*]]
+; CHECK:   switch:
+; CHECK-NEXT:[[S_EXT:%.*]] = zext i8 [[S]] to i32
+; CHECK-NEXT:switch i32 [[S_EXT]], label [[EXIT]] [
+; CHECK-NEXT:i32 0, label [[UNREACHABLE:%.*]]
+; CHECK-NEXT:i32 1, label [[EXIT]]
+; CHECK-NEXT:i32 -1, label [[EXIT]]
+; CHECK-NEXT:]
+; CHECK:   exit:
+; CHECK-NEXT:ret void
+; CHECK:   unreachable:
+; CHECK-NEXT:ret void
+;
+entry:
+  %cmp = icmp ne i8 %s, 0
+  br i1 %cmp, label %switch, label %exit
+
+switch:
+  %s.ext = zext i8 %s to i32
+  switch i32 %s.ext, label %exit [
+  i32 0, label %unreachable
+  i32 1, label %exit
+  i32 -1, label %exit
+  ]
+
+exit:
+  ret void
+
+unreachable:
+  ret void
+}
+
+define void @switch_assume_nonzero(i32 %s) {
+; CHECK-LABEL: @switch_assume_nonzero(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:[[CMP:%.*]] = icmp ne i32 [[S:%.*]], 0
+; CHECK-NEXT:call void @llvm.assume(i1 [[CMP]])
+; CHECK-NEXT:switch i32 [[S]], label [[EXIT:%.*]] [
+; CHECK-NEXT:i32 0, label [[UNREACHABLE:%.*]]
+; CHECK-NEXT:i32 1, label [[EXIT]]
+; CHECK-NEXT:i32 -1, label [[EXIT]]
+; CHECK-NEXT:]
+; CHECK:   exit:
+; CHECK-NEXT:ret void
+; CHECK:   unreachable:
+; CHECK-NEXT:ret void
+;
+entry:
+  %cmp = icmp ne i32 %s, 0
+  call void @llvm.assume(i1 %cmp)
+  switch i32 %s, label %exit [
+  i32 0, label %unreachable
+  i32 1, label %exit
+  i32 -1, label %exit
+  ]
+
+exit:
+  ret void
+
+unreachable:
+  ret void
+}
+
+define void @switch_nonzero_phi(i1 %cond) {
+; CHECK-LABEL: @switch_nonzero_phi(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:br i1 [[COND:%.*]], label [[IF:%.*]], label [[ELSE:%.*]]
+; CHECK:   if:
+; CHECK-NEXT:br label [[SWITCH:%.*]]
+; CHECK:   else:
+; CHECK-NEXT:br label [[SWITCH]]
+; CHECK:   switch:
+; CHECK-NEXT:[[S:%.*]] = phi i32 [ 1, [[IF]] ], [ -1, [[ELSE]] ]
+; CHECK-NEXT:switch i32 [[S]], label [[EXIT:%.*]] [
+; CHECK-NEXT:i32 0, label [[UNREACHABLE:%.*]]
+; CHECK-NEXT:i32 1, label [[EXIT]]
+; CHECK-NEXT:i32 -1, label [[EXIT]]
+; CHECK-NEXT:]
+; CHECK:   exit:
+; CHECK-NEXT:ret void
+; CHECK:   unreachable:
+; CHECK-NEXT:ret void
+;
+entry:
+  br i1 %cond, label %if, label %else
+
+if:
+  br label %switch
+
+else:
+  br label %switch
+
+switch:
+  %s = phi i32 [ 1, %if ], [ -1, %else ]
+  switch i32 %s, label %exit [
+  i32 0, label %unreachable
+  i32 1, label %exit
+  i32 -1, label %exit
+  ]
+
+exit:
+  ret void
+
+unreachable:
+  ret void
+}
+
 define i1 @arg_attribute(i8* nonnull %a) {
 ; CHECK-LABEL: @arg_attribute(
 ; CHECK-NEXT:ret i1 false
@@ -966,3 +1077,4 @@ declare i32 @llvm.uadd.sat.i32(i32, i32)
 declare i32 @llvm.usub.sat.i32(i32, i32)
 declare i32 @llvm.sadd.sat.i32(i32, i32)
 declare i32 @llvm.ssub.sat.i32(i32, i32)
+declare void @llvm.assume(i1)



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[llvm-branch-commits] [clang] a5c65de - mac/arm: XFAIL the last 3 failing tests

[Nico Weber via llvm-branch-commits]

Author: Nico Weber
Date: 2020-12-12T15:09:17-05:00
New Revision: a5c65de2953e755532da2e171e452d11e80d4714

URL: 
https://github.com/llvm/llvm-project/commit/a5c65de2953e755532da2e171e452d11e80d4714
DIFF: 
https://github.com/llvm/llvm-project/commit/a5c65de2953e755532da2e171e452d11e80d4714.diff

LOG: mac/arm: XFAIL the last 3 failing tests

We should fix them, but let's XFAIL them for now so that we can start
running check-clang on bots and lock in the passing tests.

Part of 46644.

Added: 


Modified: 
clang/test/CodeGen/2004-02-13-IllegalVararg.c
clang/test/Driver/aarch64-cpus.c
clang/test/Index/pch-from-libclang.c

Removed: 




diff  --git a/clang/test/CodeGen/2004-02-13-IllegalVararg.c 
b/clang/test/CodeGen/2004-02-13-IllegalVararg.c
index cbc9151ec631..b3acda1f9e72 100644
--- a/clang/test/CodeGen/2004-02-13-IllegalVararg.c
+++ b/clang/test/CodeGen/2004-02-13-IllegalVararg.c
@@ -1,5 +1,8 @@
 // RUN: %clang_cc1  %s -w -emit-llvm -o -
 
+// https://bugs.llvm.org/show_bug.cgi?id=46644#c6
+// XFAIL: arm64-apple
+
 float test(int X, ...) {
   __builtin_va_list ap;
   float F;

diff  --git a/clang/test/Driver/aarch64-cpus.c 
b/clang/test/Driver/aarch64-cpus.c
index 967a4902bd1c..0019e38efa62 100644
--- a/clang/test/Driver/aarch64-cpus.c
+++ b/clang/test/Driver/aarch64-cpus.c
@@ -1,5 +1,8 @@
 // Check target CPUs are correctly passed.
 
+// https://PR46644
+// XFAIL: arm64-apple
+
 // RUN: %clang -target aarch64 -### -c %s 2>&1 | FileCheck 
-check-prefix=GENERIC %s
 // RUN: %clang -target aarch64 -mcpu=generic -### -c %s 2>&1 | FileCheck 
-check-prefix=GENERIC %s
 // RUN: %clang -target aarch64 -mlittle-endian -### -c %s 2>&1 | FileCheck 
-check-prefix=GENERIC %s

diff  --git a/clang/test/Index/pch-from-libclang.c 
b/clang/test/Index/pch-from-libclang.c
index ec6286da2ae3..5ad5ecb9157a 100644
--- a/clang/test/Index/pch-from-libclang.c
+++ b/clang/test/Index/pch-from-libclang.c
@@ -1,5 +1,8 @@
 // Check that clang can use a PCH created from libclang.
 
+// https://PR46644
+// XFAIL: arm64-apple
+
 // This test doesn't use -fdisable-module-hash and hence requires that
 // CompilerInvocation::getModuleHash() computes exactly the same hash
 // for c-index-test and clang, which in turn requires that the both use



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[llvm-branch-commits] [llvm] afbb6d9 - [CVP] Simplify and generalize switch handling

[Nikita Popov via llvm-branch-commits]

Author: Nikita Popov
Date: 2020-12-12T21:12:27+01:00
New Revision: afbb6d97b501502b89bedc3da2a5d7ec00f56dba

URL: 
https://github.com/llvm/llvm-project/commit/afbb6d97b501502b89bedc3da2a5d7ec00f56dba
DIFF: 
https://github.com/llvm/llvm-project/commit/afbb6d97b501502b89bedc3da2a5d7ec00f56dba.diff

LOG: [CVP] Simplify and generalize switch handling

CVP currently handles switches by checking an equality predicate
on all edges from predecessor blocks. Of course, this can only
work if the value being switched over is defined in a different block.

Replace this implementation with a call to getPredicateAt(), which
also does the predecessor edge predicate check (if not defined in
the same block), but can also do quite a bit more: It can reason
about phi-nodes by checking edge predicates for incoming values,
it can reason about assumes, and it can reason about block values.

As such, this makes the implementation both simpler and more
powerful. The compile-time impact on CTMark is in the noise.

Added: 


Modified: 
llvm/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp
llvm/test/Transforms/CorrelatedValuePropagation/basic.ll

Removed: 




diff  --git a/llvm/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp 
b/llvm/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp
index b7b1b9c6aa58..b671d68031a8 100644
--- a/llvm/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp
+++ b/llvm/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp
@@ -330,15 +330,6 @@ static bool processSwitch(SwitchInst *I, LazyValueInfo 
*LVI,
   Value *Cond = I->getCondition();
   BasicBlock *BB = I->getParent();
 
-  // If the condition was defined in same block as the switch then 
LazyValueInfo
-  // currently won't say anything useful about it, though in theory it could.
-  if (isa(Cond) && cast(Cond)->getParent() == BB)
-return false;
-
-  // If the switch is unreachable then trying to improve it is a waste of time.
-  pred_iterator PB = pred_begin(BB), PE = pred_end(BB);
-  if (PB == PE) return false;
-
   // Analyse each switch case in turn.
   bool Changed = false;
   DenseMap SuccessorsCount;
@@ -351,35 +342,9 @@ static bool processSwitch(SwitchInst *I, LazyValueInfo 
*LVI,
 
 for (auto CI = SI->case_begin(), CE = SI->case_end(); CI != CE;) {
   ConstantInt *Case = CI->getCaseValue();
-
-  // Check to see if the switch condition is equal to/not equal to the case
-  // value on every incoming edge, equal/not equal being the same each 
time.
-  LazyValueInfo::Tristate State = LazyValueInfo::Unknown;
-  for (pred_iterator PI = PB; PI != PE; ++PI) {
-// Is the switch condition equal to the case value?
-LazyValueInfo::Tristate Value = 
LVI->getPredicateOnEdge(CmpInst::ICMP_EQ,
-Cond, Case, 
*PI,
-BB, SI);
-// Give up on this case if nothing is known.
-if (Value == LazyValueInfo::Unknown) {
-  State = LazyValueInfo::Unknown;
-  break;
-}
-
-// If this was the first edge to be visited, record that all other 
edges
-// need to give the same result.
-if (PI == PB) {
-  State = Value;
-  continue;
-}
-
-// If this case is known to fire for some edges and known not to fire 
for
-// others then there is nothing we can do - give up.
-if (Value != State) {
-  State = LazyValueInfo::Unknown;
-  break;
-}
-  }
+  LazyValueInfo::Tristate State =
+  LVI->getPredicateAt(CmpInst::ICMP_EQ, Cond, Case, I,
+  /* UseBlockValue */ true);
 
   if (State == LazyValueInfo::False) {
 // This case never fires - remove it.

diff  --git a/llvm/test/Transforms/CorrelatedValuePropagation/basic.ll 
b/llvm/test/Transforms/CorrelatedValuePropagation/basic.ll
index 20d285641da1..0c41bb6270f9 100644
--- a/llvm/test/Transforms/CorrelatedValuePropagation/basic.ll
+++ b/llvm/test/Transforms/CorrelatedValuePropagation/basic.ll
@@ -285,11 +285,7 @@ define void @switch_nonzero_zext(i8 %s) {
 ; CHECK-NEXT:br i1 [[CMP]], label [[SWITCH:%.*]], label [[EXIT:%.*]]
 ; CHECK:   switch:
 ; CHECK-NEXT:[[S_EXT:%.*]] = zext i8 [[S]] to i32
-; CHECK-NEXT:switch i32 [[S_EXT]], label [[EXIT]] [
-; CHECK-NEXT:i32 0, label [[UNREACHABLE:%.*]]
-; CHECK-NEXT:i32 1, label [[EXIT]]
-; CHECK-NEXT:i32 -1, label [[EXIT]]
-; CHECK-NEXT:]
+; CHECK-NEXT:br label [[EXIT]]
 ; CHECK:   exit:
 ; CHECK-NEXT:ret void
 ; CHECK:   unreachable:
@@ -319,11 +315,7 @@ define void @switch_assume_nonzero(i32 %s) {
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:[[CMP:%.*]] = icmp ne i32 [[S:%.*]], 0
 ; CHECK-NEXT:call void @llvm.assume(i1 [[CMP]])
-; CHECK-NEXT:switch i32 [[S]], label [[EXIT:%.*]] [
-; CHECK-NE

[llvm-branch-commits] [clang] 956034c - [mac/arm] XFAIL two more tests on arm64-apple

[Nico Weber via llvm-branch-commits]

Author: Nico Weber
Date: 2020-12-12T15:20:50-05:00
New Revision: 956034c6c894d1291306baed2e59e51c16e5df70

URL: 
https://github.com/llvm/llvm-project/commit/956034c6c894d1291306baed2e59e51c16e5df70
DIFF: 
https://github.com/llvm/llvm-project/commit/956034c6c894d1291306baed2e59e51c16e5df70.diff

LOG: [mac/arm] XFAIL two more tests on arm64-apple

Part of PR46644

Added: 


Modified: 
clang/test/Driver/openmp-offload-gpu.c
clang/test/Driver/openmp-offload.c

Removed: 




diff  --git a/clang/test/Driver/openmp-offload-gpu.c 
b/clang/test/Driver/openmp-offload-gpu.c
index 6415f1d61b72..4418bcc42047 100644
--- a/clang/test/Driver/openmp-offload-gpu.c
+++ b/clang/test/Driver/openmp-offload-gpu.c
@@ -2,6 +2,9 @@
 /// Perform several driver tests for OpenMP offloading
 ///
 
+// https://PR46644
+// XFAIL: arm64-apple
+
 // REQUIRES: clang-driver
 // REQUIRES: x86-registered-target
 // REQUIRES: powerpc-registered-target

diff  --git a/clang/test/Driver/openmp-offload.c 
b/clang/test/Driver/openmp-offload.c
index a93ef24d7e0a..d32632059f58 100644
--- a/clang/test/Driver/openmp-offload.c
+++ b/clang/test/Driver/openmp-offload.c
@@ -2,6 +2,9 @@
 /// Perform several driver tests for OpenMP offloading
 ///
 
+// https://PR46644
+// XFAIL: arm64-apple
+
 // REQUIRES: clang-driver
 // REQUIRES: x86-registered-target
 // REQUIRES: powerpc-registered-target



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[llvm-branch-commits] [clang] a500a43 - [CodeGen][AMDGPU] Fix ICE for static initializer IR generation

[Alexey Bader via llvm-branch-commits]

Author: Alexey Bader
Date: 2020-12-12T23:26:54+03:00
New Revision: a500a4358789d1794bc672421c55900ea2bbc938

URL: 
https://github.com/llvm/llvm-project/commit/a500a4358789d1794bc672421c55900ea2bbc938
DIFF: 
https://github.com/llvm/llvm-project/commit/a500a4358789d1794bc672421c55900ea2bbc938.diff

LOG: [CodeGen][AMDGPU] Fix ICE for static initializer IR generation

Differential Revision: https://reviews.llvm.org/D92782

Added: 


Modified: 
clang/lib/CodeGen/CGDecl.cpp
clang/test/CodeGen/address-space.c

Removed: 




diff  --git a/clang/lib/CodeGen/CGDecl.cpp b/clang/lib/CodeGen/CGDecl.cpp
index 478821665e45..a01638f0b67b 100644
--- a/clang/lib/CodeGen/CGDecl.cpp
+++ b/clang/lib/CodeGen/CGDecl.cpp
@@ -353,12 +353,11 @@ CodeGenFunction::AddInitializerToStaticVarDecl(const 
VarDecl &D,
   if (GV->getValueType() != Init->getType()) {
 llvm::GlobalVariable *OldGV = GV;
 
-GV = new llvm::GlobalVariable(CGM.getModule(), Init->getType(),
-  OldGV->isConstant(),
-  OldGV->getLinkage(), Init, "",
-  /*InsertBefore*/ OldGV,
-  OldGV->getThreadLocalMode(),
-   
CGM.getContext().getTargetAddressSpace(D.getType()));
+GV = new llvm::GlobalVariable(
+CGM.getModule(), Init->getType(), OldGV->isConstant(),
+OldGV->getLinkage(), Init, "",
+/*InsertBefore*/ OldGV, OldGV->getThreadLocalMode(),
+OldGV->getType()->getPointerAddressSpace());
 GV->setVisibility(OldGV->getVisibility());
 GV->setDSOLocal(OldGV->isDSOLocal());
 GV->setComdat(OldGV->getComdat());

diff  --git a/clang/test/CodeGen/address-space.c 
b/clang/test/CodeGen/address-space.c
index c66dfc87c0c0..baefb4b983fc 100644
--- a/clang/test/CodeGen/address-space.c
+++ b/clang/test/CodeGen/address-space.c
@@ -59,3 +59,14 @@ void __attribute__((address_space(1)))*
 void_ptr_arithmetic_test(void __attribute__((address_space(1))) *arg) {
 return arg + 4;
 }
+
+// CHECK-LABEL: define i32* @test5(
+const unsigned *test5() {
+  // Intentionally leave a part of an array uninitialized. This triggers a
+  // 
diff erent code path contrary to a fully initialized array.
+  // CHECK: ret i32* getelementptr inbounds ([256 x i32]
+  static const unsigned bars[256] = {
+  0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10,
+  11, 12, 13, 14, 15, 16, 17, 18, 19, 20};
+  return &bars[0];
+}



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[llvm-branch-commits] [llvm] ce4040a - [PPC] Check for PPC64 when emitting 64bit specific VSX nodes when pattern matching built vectors

[Zarko Todorovski via llvm-branch-commits]

Author: Zarko Todorovski
Date: 2020-12-12T15:28:28-05:00
New Revision: ce4040a43d54b45c924b109d0e44f0064937e539

URL: 
https://github.com/llvm/llvm-project/commit/ce4040a43d54b45c924b109d0e44f0064937e539
DIFF: 
https://github.com/llvm/llvm-project/commit/ce4040a43d54b45c924b109d0e44f0064937e539.diff

LOG: [PPC] Check for PPC64 when emitting 64bit specific VSX nodes when pattern 
matching built vectors

Some of the pattern matching in PPCInstrVSX.td and node lowering involving 
vectors assumes 64bit mode.  This patch disables some of the unsafe pattern 
matching and lowering of BUILD_VECTOR in 32bit mode.

Reviewed By: Xiangling_L

Differential Revision: https://reviews.llvm.org/D92789

Added: 
llvm/test/CodeGen/PowerPC/ppc-32bit-build-vector.ll

Modified: 
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
llvm/lib/Target/PowerPC/PPCInstrVSX.td

Removed: 




diff  --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp 
b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index 8f5c593226e7..10cf7d7f5e02 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -9397,10 +9397,10 @@ SDValue PPCTargetLowering::LowerBUILD_VECTOR(SDValue Op,
   }
 }
 
-// BUILD_VECTOR nodes that are not constant splats of up to 32-bits can be
-// lowered to VSX instructions under certain conditions.
+// In 64BIT mode BUILD_VECTOR nodes that are not constant splats of up to
+// 32-bits can be lowered to VSX instructions under certain conditions.
 // Without VSX, there is no pattern more efficient than expanding the node.
-if (Subtarget.hasVSX() &&
+if (Subtarget.hasVSX() && Subtarget.isPPC64() &&
 haveEfficientBuildVectorPattern(BVN, Subtarget.hasDirectMove(),
 Subtarget.hasP8Vector()))
   return Op;

diff  --git a/llvm/lib/Target/PowerPC/PPCInstrVSX.td 
b/llvm/lib/Target/PowerPC/PPCInstrVSX.td
index 35a0abcfd632..4e086366af24 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrVSX.td
+++ b/llvm/lib/Target/PowerPC/PPCInstrVSX.td
@@ -145,6 +145,7 @@ def PPCSToV : SDNode<"PPCISD::SCALAR_TO_VECTOR_PERMUTED",
 def HasVSX : Predicate<"Subtarget->hasVSX()">;
 def IsLittleEndian : Predicate<"Subtarget->isLittleEndian()">;
 def IsBigEndian : Predicate<"!Subtarget->isLittleEndian()">;
+def IsPPC64 : Predicate<"Subtarget->isPPC64()">;
 def HasOnlySwappingMemOps : Predicate<"!Subtarget->hasP9Vector()">;
 def HasP8Vector : Predicate<"Subtarget->hasP8Vector()">;
 def HasDirectMove : Predicate<"Subtarget->hasDirectMove()">;
@@ -2414,24 +2415,24 @@ def MrgWords {
 // [HasVSX, HasOnlySwappingMemOps]
 // [HasVSX, HasOnlySwappingMemOps, IsBigEndian]
 // [HasVSX, HasP8Vector]
-// [HasVSX, HasP8Vector, IsBigEndian]
+// [HasVSX, HasP8Vector, IsBigEndian, IsPPC64]
 // [HasVSX, HasP8Vector, IsLittleEndian]
-// [HasVSX, HasP8Vector, NoP9Vector, IsBigEndian]
+// [HasVSX, HasP8Vector, NoP9Vector, IsBigEndian, IsPPC64]
 // [HasVSX, HasP8Vector, NoP9Vector, IsLittleEndian]
 // [HasVSX, HasDirectMove]
 // [HasVSX, HasDirectMove, IsBigEndian]
 // [HasVSX, HasDirectMove, IsLittleEndian]
-// [HasVSX, HasDirectMove, NoP9Altivec, IsBigEndian]
+// [HasVSX, HasDirectMove, NoP9Altivec, IsBigEndian, IsPPC64]
+// [HasVSX, HasDirectMove, NoP9Vector, IsBigEndian, IsPPC64]
 // [HasVSX, HasDirectMove, NoP9Altivec, IsLittleEndian]
-// [HasVSX, HasDirectMove, NoP9Vector, IsBigEndian]
 // [HasVSX, HasDirectMove, NoP9Vector, IsLittleEndian]
 // [HasVSX, HasP9Vector]
-// [HasVSX, HasP9Vector, IsBigEndian]
+// [HasVSX, HasP9Vector, IsBigEndian, IsPPC64]
 // [HasVSX, HasP9Vector, IsLittleEndian]
 // [HasVSX, HasP9Altivec]
-// [HasVSX, HasP9Altivec, IsBigEndian]
+// [HasVSX, HasP9Altivec, IsBigEndian, IsPPC64]
 // [HasVSX, HasP9Altivec, IsLittleEndian]
-// [HasVSX, IsISA3_0, HasDirectMove, IsBigEndian]
+// [HasVSX, IsISA3_0, HasDirectMove, IsBigEndian, IsPPC64]
 // [HasVSX, IsISA3_0, HasDirectMove, IsLittleEndian]
 
 let AddedComplexity = 400 in {
@@ -3015,8 +3016,8 @@ let Predicates = [HasVSX, HasOnlySwappingMemOps] in {
   def : Pat<(PPCstxvd2x v2f64:$rS, xoaddr:$dst), (STXVD2X $rS, xoaddr:$dst)>;
 } // HasVSX, HasOnlySwappingMemOps
 
-// Big endian VSX subtarget that only has loads and stores that always load
-// in big endian order. Really big endian pre-Power9 subtargets.
+// Big endian VSX subtarget that only has loads and stores that always
+// load in big endian order. Really big endian pre-Power9 subtargets.
 let Predicates = [HasVSX, HasOnlySwappingMemOps, IsBigEndian] in {
   def : Pat<(v2f64 (load xoaddr:$src)), (LXVD2X xoaddr:$src)>;
   def : Pat<(v2i64 (load xoaddr:$src)), (LXVD2X xoaddr:$src)>;
@@ -3109,7 +3110,7 @@ def : Pat<(v16i8 (bitconvert (v16i8 immAllOnesV))),
 } // HasVSX, HasP8Vector
 
 // Big endian Power8 VSX subtarget.
-let Predicates = [HasVSX, HasP8Vector, IsBigEndian] in {
+let Predicates = [HasVSX, HasP8Vector, IsBigEndian, IsPPC64] in {

[llvm-branch-commits] [llvm] d382051 - [SimplifyCFG] FoldBranchToCommonDest(): bonus instrns must only be used by PHI nodes in successors (PR48450)

[Roman Lebedev via llvm-branch-commits]

Author: Roman Lebedev
Date: 2020-12-13T00:06:57+03:00
New Revision: d38205144febf4dc42c9270c6aa3d978f1ef65e1

URL: 
https://github.com/llvm/llvm-project/commit/d38205144febf4dc42c9270c6aa3d978f1ef65e1
DIFF: 
https://github.com/llvm/llvm-project/commit/d38205144febf4dc42c9270c6aa3d978f1ef65e1.diff

LOG: [SimplifyCFG] FoldBranchToCommonDest(): bonus instrns must only be used by 
PHI nodes in successors (PR48450)

In particular, if the successor block, which is about to get a new
predecessor block, currently only has a single predecessor,
then the bonus instructions will be directly used within said successor,
which is fine, since the block with bonus instructions dominates that
successor. But once there's a new predecessor, the IR is no longer valid,
and we don't fix it, because we only update PHI nodes.

Which means, the live-out bonus instructions must be exclusively used
by the PHI nodes in successor blocks. So we have to form trivial PHI nodes.
which will then be successfully updated to recieve cloned bonus instns.

This all works fine, except for the fact that we don't have access to
the dominator tree, and we don't ignore unreachable code,
so we sometimes do end up having to deal with some weird IR.

Fixes https://bugs.llvm.org/show_bug.cgi?id=48450

Added: 


Modified: 
llvm/lib/Transforms/Utils/SimplifyCFG.cpp
llvm/test/Transforms/SimplifyCFG/fold-branch-to-common-dest.ll

Removed: 




diff  --git a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp 
b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
index 3083b6929307..073a43faadd9 100644
--- a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
+++ b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
@@ -68,6 +68,7 @@
 #include "llvm/Support/raw_ostream.h"
 #include "llvm/Transforms/Utils/BasicBlockUtils.h"
 #include "llvm/Transforms/Utils/Local.h"
+#include "llvm/Transforms/Utils/SSAUpdater.h"
 #include "llvm/Transforms/Utils/ValueMapper.h"
 #include 
 #include 
@@ -2709,6 +2710,66 @@ static bool extractPredSuccWeights(BranchInst *PBI, 
BranchInst *BI,
   }
 }
 
+/// Given \p BB block, for each instruction in said block, insert trivial
+/// (single value) PHI nodes into each successor block of \p BB block, and
+/// rewrite all the the non-PHI (or PHI uses not in successors of \p BB block)
+/// uses of instructions of \p BB block to use newly-inserted PHI nodes.
+/// NOTE: even though it would be correct to not deal with multi-predecessor
+///   successor blocks, or uses within the \p BB block, we may be dealing
+///   with an unreachable IR, where many invariants don't hold...
+static void FormTrivialSSAPHI(BasicBlock *BB) {
+  SmallSetVector Successors(succ_begin(BB), succ_end(BB));
+
+  // Process instructions in reverse order. There is no correctness reason for
+  // that order, but it allows us to consistently insert new PHI nodes
+  // at the top of blocks, while maintaining their relative order.
+  for (Instruction &DefInstr : make_range(BB->rbegin(), BB->rend())) {
+SmallVector, 16> UsesToRewrite;
+
+// Cache which uses we'll want to rewrite.
+copy_if(DefInstr.uses(), std::back_inserter(UsesToRewrite),
+[BB, &DefInstr, &Successors](Use &U) {
+  auto *User = cast(U.getUser());
+  auto *UserBB = User->getParent();
+  // Generally, ignore users in the same block as the instruction
+  // itself, unless the use[r] either comes before, or is [by] the
+  // instruction itself, which means we are in an unreachable IR.
+  if (UserBB == BB)
+return !DefInstr.comesBefore(User);
+  // Otherwise, rewrite all non-PHI users,
+  // or PHI users in non-successor blocks.
+  return !isa(User) || !Successors.contains(UserBB);
+});
+
+// So, do we have uses to rewrite?
+if (UsesToRewrite.empty())
+  continue; // Check next remaining instruction.
+
+SSAUpdater SSAUpdate;
+SSAUpdate.Initialize(DefInstr.getType(), DefInstr.getName());
+
+// Create a new PHI node in each successor block.
+// WARNING: the iteration order is externally-observable,
+//  and therefore must be stable!
+for (BasicBlock *Successor : Successors) {
+  IRBuilder<> Builder(&Successor->front());
+  auto *PN = Builder.CreatePHI(DefInstr.getType(), pred_size(Successor),
+   DefInstr.getName());
+  // By default, have an 'undef' incoming value for each predecessor.
+  for (BasicBlock *PredsOfSucc : predecessors(Successor))
+PN->addIncoming(UndefValue::get(DefInstr.getType()), PredsOfSucc);
+  // .. but receive the correct value when coming from the right block.
+  PN->setIncomingValueForBlock(BB, &DefInstr);
+  // And make note of that PHI.
+  SSAUpdate.AddAvailableValue(Successor, PN);
+}
+
+// And finally, rewrite all the problematic uses to use 

[llvm-branch-commits] [llvm] 21de99d - [[GlobalISel][IRTranslator] Fix a crash when the use of an extractvalue is a non-dominated metadata use.

[Amara Emerson via llvm-branch-commits]

Author: Amara Emerson
Date: 2020-12-12T14:58:54-08:00
New Revision: 21de99d43c88c00c007a2b3e350d56328f26660e

URL: 
https://github.com/llvm/llvm-project/commit/21de99d43c88c00c007a2b3e350d56328f26660e
DIFF: 
https://github.com/llvm/llvm-project/commit/21de99d43c88c00c007a2b3e350d56328f26660e.diff

LOG: [[GlobalISel][IRTranslator] Fix a crash when the use of an extractvalue is 
a non-dominated metadata use.

We don't expect uses to come before defs in the CFG, so allocateVRegs() 
asserted.

Fixes PR48211

Added: 
llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-extract-used-by-dbg.ll

Modified: 
llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp

Removed: 




diff  --git a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp 
b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
index a912b9c1bd00..202163ff9507 100644
--- a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
@@ -170,7 +170,9 @@ void IRTranslator::getAnalysisUsage(AnalysisUsage &AU) 
const {
 
 IRTranslator::ValueToVRegInfo::VRegListT &
 IRTranslator::allocateVRegs(const Value &Val) {
-  assert(!VMap.contains(Val) && "Value already allocated in VMap");
+  auto VRegsIt = VMap.findVRegs(Val);
+  if (VRegsIt != VMap.vregs_end())
+return *VRegsIt->second;
   auto *Regs = VMap.getVRegs(Val);
   auto *Offsets = VMap.getOffsets(Val);
   SmallVector SplitTys;

diff  --git 
a/llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-extract-used-by-dbg.ll 
b/llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-extract-used-by-dbg.ll
new file mode 100644
index ..dae85e6404b2
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-extract-used-by-dbg.ll
@@ -0,0 +1,400 @@
+; RUN: llc -O0 -stop-after=irtranslator -global-isel -verify-machineinstrs %s 
-o - 2>&1 | FileCheck %s
+
+target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
+target triple = "aarch64-unknown-fuchsia"
+
+declare void @llvm.dbg.value(metadata, metadata, metadata) #0
+; Check that we don't crash when we have a metadata use of %i not being 
dominated by the def.
+; CHECK-LABEL: @foo
+; CHECK: DBG_VALUE %1:_(p0), $noreg, !370, !DIExpression(DW_OP_LLVM_fragment, 
0, 64)
+define hidden void @foo() unnamed_addr #1 !dbg !230 {
+  br i1 undef, label %bb4, label %bb5
+
+bb4:  ; preds = %bb3
+  %i = extractvalue { i8*, i64 } undef, 0
+  ret void
+
+bb5:  ; preds = %bb3
+  call void @llvm.dbg.value(metadata i8* %i, metadata !370, metadata 
!DIExpression(DW_OP_LLVM_fragment, 0, 64)), !dbg !372
+  ret void
+}
+
+attributes #0 = { nofree nosync nounwind readnone speculatable willreturn }
+attributes #1 = { "target-cpu"="generic" }
+
+!llvm.dbg.cu = !{!0}
+!llvm.module.flags = !{!229}
+
+!0 = distinct !DICompileUnit(language: DW_LANG_Rust, file: !1, producer: 
"rustc", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: 
!2, globals: !228)
+!1 = !DIFile(filename: "library/std/src/lib.rs", directory: 
"/b/s/w/ir/x/w/rust")
+!2 = !{!3, !11, !16, !25, !31, !36, !45, !68, !75, !83, !90, !97, !106, !115, 
!121, !131, !153, !159, !163, !168, !179, !184, !189, !192, !194, !210}
+!3 = !DICompositeType(tag: DW_TAG_enumeration_type, name: "c_void", scope: !5, 
file: !4, baseType: !7, size: 8, align: 8, flags: DIFlagEnumClass, elements: !8)
+!4 = !DIFile(filename: "", directory: "")
+!5 = !DINamespace(name: "ffi", scope: !6)
+!6 = !DINamespace(name: "core", scope: null)
+!7 = !DIBasicType(name: "u8", size: 8, encoding: DW_ATE_unsigned)
+!8 = !{!9, !10}
+!9 = !DIEnumerator(name: "__variant1", value: 0, isUnsigned: true)
+!10 = !DIEnumerator(name: "__variant2", value: 1, isUnsigned: true)
+!11 = !DICompositeType(tag: DW_TAG_enumeration_type, name: "Option", scope: 
!12, file: !4, baseType: !7, size: 8, align: 8, flags: DIFlagEnumClass, 
elements: !13)
+!12 = !DINamespace(name: "option", scope: !6)
+!13 = !{!14, !15}
+!14 = !DIEnumerator(name: "None", value: 0)
+!15 = !DIEnumerator(name: "Some", value: 1)
+!16 = !DICompositeType(tag: DW_TAG_enumeration_type, name: 
"EscapeUnicodeState", scope: !17, file: !4, baseType: !7, size: 8, align: 8, 
flags: DIFlagEnumClass, elements: !18)
+!17 = !DINamespace(name: "char", scope: !6)
+!18 = !{!19, !20, !21, !22, !23, !24}
+!19 = !DIEnumerator(name: "Done", value: 0)
+!20 = !DIEnumerator(name: "RightBrace", value: 1)
+!21 = !DIEnumerator(name: "Value", value: 2)
+!22 = !DIEnumerator(name: "LeftBrace", value: 3)
+!23 = !DIEnumerator(name: "Type", value: 4)
+!24 = !DIEnumerator(name: "Backslash", value: 5)
+!25 = !DICompositeType(tag: DW_TAG_enumeration_type, name: "Format", scope: 
!26, file: !4, baseType: !7, size: 8, align: 8, flags: DIFlagEnumClass, 
elements: !28)
+!26 = !DINamespace(name: "common", scope: !27)
+!27 = !DINamespace(name: "gimli", scope: null)
+!28 = !{!29, !30}
+!29 = !DIEnumerator(name: "Dwarf6

[llvm-branch-commits] [llvm] 7977fee - [X86] Autogenerate complete checks. NFC

[Craig Topper via llvm-branch-commits]

Author: Craig Topper
Date: 2020-12-12T16:37:28-08:00
New Revision: 7977fee43cb8d26da21d8fb0b97671721ff00f40

URL: 
https://github.com/llvm/llvm-project/commit/7977fee43cb8d26da21d8fb0b97671721ff00f40
DIFF: 
https://github.com/llvm/llvm-project/commit/7977fee43cb8d26da21d8fb0b97671721ff00f40.diff

LOG: [X86] Autogenerate complete checks. NFC

Added: 


Modified: 
llvm/test/CodeGen/X86/splat-const.ll

Removed: 




diff  --git a/llvm/test/CodeGen/X86/splat-const.ll 
b/llvm/test/CodeGen/X86/splat-const.ll
index 19997b03ad5e..b2b27347f234 100644
--- a/llvm/test/CodeGen/X86/splat-const.ll
+++ b/llvm/test/CodeGen/X86/splat-const.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mcpu=penryn | FileCheck %s --check-prefix=SSE
 ; RUN: llc < %s -mcpu=sandybridge | FileCheck %s --check-prefix=AVX
 ; RUN: llc < %s -mcpu=haswell | FileCheck %s --check-prefix=AVX2
@@ -7,14 +8,19 @@ target triple = "x86_64-unknown-unknown"
 
 define <4 x i32> @zero_vector() {
 ; SSE-LABEL: zero_vector:
-; SSE: xorps %xmm0, %xmm0
-; SSE-NEXT: retq
+; SSE:   # %bb.0:
+; SSE-NEXT:xorps %xmm0, %xmm0
+; SSE-NEXT:retq
+;
 ; AVX-LABEL: zero_vector:
-; AVX: vxorps %xmm0, %xmm0, %xmm0
-; AVX-NEXT: retq
+; AVX:   # %bb.0:
+; AVX-NEXT:vxorps %xmm0, %xmm0, %xmm0
+; AVX-NEXT:retq
+;
 ; AVX2-LABEL: zero_vector:
-; AVX2: vxorps %xmm0, %xmm0, %xmm0
-; AVX2-NEXT: retq
+; AVX2:   # %bb.0:
+; AVX2-NEXT:vxorps %xmm0, %xmm0, %xmm0
+; AVX2-NEXT:retq
   %zero = insertelement <4 x i32> undef, i32 0, i32 0
   %splat = shufflevector <4 x i32> %zero, <4 x i32> undef, <4 x i32> 
zeroinitializer
   ret <4 x i32> %splat
@@ -26,14 +32,19 @@ define <4 x i32> @zero_vector() {
 ; However, this is not the current preferred lowering.
 define <4 x i32> @const_vector() {
 ; SSE-LABEL: const_vector:
-; SSE: movaps {{.*}}, %xmm0 # xmm0 = [42,42,42,42]
-; SSE-NEXT: retq
+; SSE:   # %bb.0:
+; SSE-NEXT:movaps {{.*#+}} xmm0 = [42,42,42,42]
+; SSE-NEXT:retq
+;
 ; AVX-LABEL: const_vector:
-; AVX: vmovaps {{.*}}, %xmm0 # xmm0 = [42,42,42,42]
-; AVX-NEXT: retq
+; AVX:   # %bb.0:
+; AVX-NEXT:vmovaps {{.*#+}} xmm0 = [42,42,42,42]
+; AVX-NEXT:retq
+;
 ; AVX2-LABEL: const_vector:
-; AVX2: vbroadcastss {{[^%].*}}, %xmm0
-; AVX2-NEXT: retq
+; AVX2:   # %bb.0:
+; AVX2-NEXT:vbroadcastss {{.*#+}} xmm0 = [42,42,42,42]
+; AVX2-NEXT:retq
   %const = insertelement <4 x i32> undef, i32 42, i32 0
   %splat = shufflevector <4 x i32> %const, <4 x i32> undef, <4 x i32> 
zeroinitializer
   ret <4 x i32> %splat



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[llvm-branch-commits] [llvm] eaa0982 - [mac/arm] skip MappedMemoryTest that try to map w+x

[Nico Weber via llvm-branch-commits]

Author: Nico Weber
Date: 2020-12-12T19:46:32-05:00
New Revision: eaa09823348a7ba20417c109f4d7b26258c6abe6

URL: 
https://github.com/llvm/llvm-project/commit/eaa09823348a7ba20417c109f4d7b26258c6abe6
DIFF: 
https://github.com/llvm/llvm-project/commit/eaa09823348a7ba20417c109f4d7b26258c6abe6.diff

LOG: [mac/arm] skip MappedMemoryTest that try to map w+x

macOS/arm is w^x, so these tests don't work. Fixes these failures:

  LLVM-Unit :: 
Support/./SupportTests/AllocationTests/MappedMemoryTest.AllocAndRelease/5
  LLVM-Unit :: 
Support/./SupportTests/AllocationTests/MappedMemoryTest.AllocAndReleaseHuge/5
  LLVM-Unit :: 
Support/./SupportTests/AllocationTests/MappedMemoryTest.BasicWrite/5
  LLVM-Unit :: 
Support/./SupportTests/AllocationTests/MappedMemoryTest.DuplicateNear/5
  LLVM-Unit :: 
Support/./SupportTests/AllocationTests/MappedMemoryTest.EnabledWrite/3
  LLVM-Unit :: 
Support/./SupportTests/AllocationTests/MappedMemoryTest.EnabledWrite/4
  LLVM-Unit :: 
Support/./SupportTests/AllocationTests/MappedMemoryTest.EnabledWrite/5
  LLVM-Unit :: 
Support/./SupportTests/AllocationTests/MappedMemoryTest.MultipleAllocAndRelease/5
  LLVM-Unit :: 
Support/./SupportTests/AllocationTests/MappedMemoryTest.MultipleWrite/5
  LLVM-Unit :: 
Support/./SupportTests/AllocationTests/MappedMemoryTest.SuccessiveNear/5
  LLVM-Unit :: 
Support/./SupportTests/AllocationTests/MappedMemoryTest.UnalignedNear/5
  LLVM-Unit :: 
Support/./SupportTests/AllocationTests/MappedMemoryTest.ZeroNear/5
  LLVM-Unit :: 
Support/./SupportTests/AllocationTests/MappedMemoryTest.ZeroSizeNear/5

Part of PR46647.

Added: 


Modified: 
llvm/unittests/Support/MemoryTest.cpp

Removed: 




diff  --git a/llvm/unittests/Support/MemoryTest.cpp 
b/llvm/unittests/Support/MemoryTest.cpp
index af33dc32c81b..6e5f7472e454 100644
--- a/llvm/unittests/Support/MemoryTest.cpp
+++ b/llvm/unittests/Support/MemoryTest.cpp
@@ -41,6 +41,8 @@ bool IsMPROTECT() {
 err(EXIT_FAILURE, "sysctl");
 
   return !!(paxflags & CTL_PROC_PAXFLAGS_MPROTECT);
+#elif defined(__APPLE__) && defined(__aarch64__)
+  return true;
 #else
   return false;
 #endif



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[llvm-branch-commits] [lld] 5d1c723 - [ELF][test] Rewrite st_value=0 copy relocation tests

[Fangrui Song via llvm-branch-commits]

Author: Fangrui Song
Date: 2020-12-12T16:50:25-08:00
New Revision: 5d1c723b73aff4a33c4653b9f675cf18dea8c7d6

URL: 
https://github.com/llvm/llvm-project/commit/5d1c723b73aff4a33c4653b9f675cf18dea8c7d6
DIFF: 
https://github.com/llvm/llvm-project/commit/5d1c723b73aff4a33c4653b9f675cf18dea8c7d6.diff

LOG: [ELF][test] Rewrite st_value=0 copy relocation tests

The original tests have unneeded symbols and copy-relocation-zero-abs-addr.s
does not actually test anything.

Rewrite them and add copy-relocation-zero-addr.s instead.

Add --soname=b so that the address 0x203400 will be stable.  (When linking an
executable with %t.so, the path %t.so will be recorded in the DT_NEEDED entry if
%t.so doesn't have DT_SONAME. .dynstr will have varying lengths on different
systems.)

Added: 
lld/test/ELF/copy-relocation-zero-addr.s

Modified: 


Removed: 
lld/test/ELF/Inputs/copy-relocation-zero-abs-addr.s
lld/test/ELF/Inputs/copy-relocation-zero-nonabs-addr.s
lld/test/ELF/Inputs/copy-relocation-zero-nonabs-addr.script
lld/test/ELF/copy-relocation-zero-abs-addr.s
lld/test/ELF/copy-relocation-zero-nonabs-addr.s



diff  --git a/lld/test/ELF/Inputs/copy-relocation-zero-abs-addr.s 
b/lld/test/ELF/Inputs/copy-relocation-zero-abs-addr.s
deleted file mode 100644
index da81e0372d8b..
--- a/lld/test/ELF/Inputs/copy-relocation-zero-abs-addr.s
+++ /dev/null
@@ -1,7 +0,0 @@
-.globl ver1
-.globl ver2
- ver1 = 0x0
- ver2 = 0x0
-
-.type foo,@object
-.comm foo,16,16

diff  --git a/lld/test/ELF/Inputs/copy-relocation-zero-nonabs-addr.s 
b/lld/test/ELF/Inputs/copy-relocation-zero-nonabs-addr.s
deleted file mode 100644
index 26ac7bed195b..
--- a/lld/test/ELF/Inputs/copy-relocation-zero-nonabs-addr.s
+++ /dev/null
@@ -1,7 +0,0 @@
-.balign 1024
-.type foo,@object
-.globl foo
-goo:
-foo:
-  .long 0
-  .size foo,4

diff  --git a/lld/test/ELF/Inputs/copy-relocation-zero-nonabs-addr.script 
b/lld/test/ELF/Inputs/copy-relocation-zero-nonabs-addr.script
deleted file mode 100644
index a5807231acd6..
--- a/lld/test/ELF/Inputs/copy-relocation-zero-nonabs-addr.script
+++ /dev/null
@@ -1,3 +0,0 @@
-SECTIONS {
-  goo = 0;
-};

diff  --git a/lld/test/ELF/copy-relocation-zero-abs-addr.s 
b/lld/test/ELF/copy-relocation-zero-abs-addr.s
deleted file mode 100644
index c0b7abd8eeec..
--- a/lld/test/ELF/copy-relocation-zero-abs-addr.s
+++ /dev/null
@@ -1,44 +0,0 @@
-// REQUIRES: x86
-// RUN: llvm-mc -filetype=obj -triple=x86_64-pc-linux 
%p/Inputs/copy-relocation-zero-abs-addr.s -o %t.o
-// RUN: ld.lld -shared -o %t2.so %t.o
-// RUN: llvm-mc -filetype=obj -triple=x86_64-pc-linux %s -o %t3.o
-// RUN: ld.lld %t2.so %t3.o -o %t4
-// RUN: llvm-readobj --symbols %t2.so | FileCheck -check-prefix=ABSADDR %s
-// RUN: llvm-readobj -S -r --expand-relocs %t4 | FileCheck %s
-
-// This tests that symbols with absolute addresses are properly
-// handled. Normal DSO symbols are handled as usual.
-
-.text
-.globl _start
-_start:
-  movl $5, foo
-
-// ABSADDR:Name: ver1
-// ABSADDR-NEXT:   Value: 0x0
-// ABSADDR-NEXT:   Size: 0
-// ABSADDR-NEXT:   Binding: Global
-// ABSADDR-NEXT:   Type: None
-// ABSADDR-NEXT:   Other: 0
-// ABSADDR-NEXT:   Section: Absolute (0xFFF1)
-// ABSADDR-NEXT: }
-// ABSADDR-NEXT: Symbol {
-// ABSADDR-NEXT:   Name: ver2
-// ABSADDR-NEXT:   Value: 0x0
-// ABSADDR-NEXT:   Size: 0
-// ABSADDR-NEXT:   Binding: Global
-// ABSADDR-NEXT:   Type: None
-// ABSADDR-NEXT:   Other: 0
-// ABSADDR-NEXT:   Section: Absolute (0xFFF1)
-// ABSADDR-NEXT: }
-
-// CHECK:  Relocations [
-// CHECK-NEXT:   Section (5) .rela.dyn {
-// CHECK-NEXT: Relocation {
-// CHECK-NEXT:   Offset:
-// CHECK-NEXT:   Type: R_X86_64_COPY
-// CHECK-NEXT:   Symbol: foo
-// CHECK-NEXT:   Addend:
-// CHECK-NEXT: }
-// CHECK-NEXT:   }
-// CHECK-NEXT: ]

diff  --git a/lld/test/ELF/copy-relocation-zero-addr.s 
b/lld/test/ELF/copy-relocation-zero-addr.s
new file mode 100644
index ..9a1c6c7062ef
--- /dev/null
+++ b/lld/test/ELF/copy-relocation-zero-addr.s
@@ -0,0 +1,44 @@
+# REQUIRES: x86
+# RUN: split-file %s %t
+# RUN: llvm-mc -filetype=obj -triple=x86_64 %t/a.s -o %t/a.o
+# RUN: llvm-mc -filetype=obj -triple=x86_64 %t/b.s -o %t/b.o
+# RUN: llvm-mc -filetype=obj -triple=x86_64 %t/c.s -o %t/c.o
+# RUN: ld.lld -shared -soname=b -Ttext=0 %t/b.o -o %t/b.so
+
+# RUN: ld.lld %t/a.o %t/b.so -o %t1
+# RUN: llvm-readelf -r -s %t1 | FileCheck %s
+
+## In %t/b.so, foo has st_value==0 and its section alignment is 0x400. The
+## alignment of the copy relocated foo is thus 0x400.
+# CHECK: R_X86_64_COPY {{.*}} foo + 0
+# CHECK: 00203400  4 OBJECT GLOBAL DEFAULT [[#]] foo
+
+## Error if attempting to copy relocate a SHN_ABS symbol (even if st_size is 
non-zero).
+# RUN: ld.lld -shared -soname=c %t/c.o -o %t/c.so
+# RUN: llvm-readelf -s %t/c.so | FileCheck %s --check-prefix=ABSADDR
+# RUN: not ld.lld %t/a.o %t/c

[llvm-branch-commits] [llvm] de1bca4 - mac/arm: XFAIL the last 2 failing check-llvm tests

[Nico Weber via llvm-branch-commits]

Author: Nico Weber
Date: 2020-12-12T20:12:02-05:00
New Revision: de1bca4b36deb2a405bed85f7a7c71c09ab3c586

URL: 
https://github.com/llvm/llvm-project/commit/de1bca4b36deb2a405bed85f7a7c71c09ab3c586
DIFF: 
https://github.com/llvm/llvm-project/commit/de1bca4b36deb2a405bed85f7a7c71c09ab3c586.diff

LOG: mac/arm: XFAIL the last 2 failing check-llvm tests

We should fix them, but let's XFAIL them for now so that we can start
running check-llvm on bots and lock in the passing tests.

Part of PR46647.

Added: 


Modified: 
llvm/test/MC/ELF/cfi-version.ll
llvm/unittests/ExecutionEngine/MCJIT/MCJITCAPITest.cpp

Removed: 




diff  --git a/llvm/test/MC/ELF/cfi-version.ll b/llvm/test/MC/ELF/cfi-version.ll
index 3c3c9ab2179f..753ca80848a2 100644
--- a/llvm/test/MC/ELF/cfi-version.ll
+++ b/llvm/test/MC/ELF/cfi-version.ll
@@ -3,6 +3,9 @@
 ; RUN: %llc_dwarf %s -o - -dwarf-version 4 -filetype=obj | llvm-dwarfdump -v - 
| FileCheck %s --check-prefix=DWARF4
 ; RUN: %llc_dwarf %s -o - -dwarf-version 5 -filetype=obj | llvm-dwarfdump -v - 
| FileCheck %s --check-prefix=DWARF4
 
+; PR46647
+; XFAIL: arm64-apple
+
 ; .debug_frame is not emitted for targeting Windows x64.
 ; REQUIRES: debug_frame
 ; REQUIRES: default_triple

diff  --git a/llvm/unittests/ExecutionEngine/MCJIT/MCJITCAPITest.cpp 
b/llvm/unittests/ExecutionEngine/MCJIT/MCJITCAPITest.cpp
index 29130ec1e56b..09c48dfc865f 100644
--- a/llvm/unittests/ExecutionEngine/MCJIT/MCJITCAPITest.cpp
+++ b/llvm/unittests/ExecutionEngine/MCJIT/MCJITCAPITest.cpp
@@ -424,9 +424,15 @@ TEST_F(MCJITCAPITest, 
stackmap_creates_compact_unwind_on_darwin) {
 didAllocateCompactUnwindSection);
 }
 
-TEST_F(MCJITCAPITest, reserve_allocation_space) {
+#if defined(__APPLE__) && defined(__aarch64__)
+// FIXME: Figure out why this fails on mac/arm, PR46647
+#define MAYBE_reserve_allocation_space DISABLED_reserve_allocation_space
+#else
+#define MAYBE_reserve_allocation_space reserve_allocation_space
+#endif
+TEST_F(MCJITCAPITest, MAYBE_reserve_allocation_space) {
   SKIP_UNSUPPORTED_PLATFORM;
-  
+
   TestReserveAllocationSpaceMemoryManager* MM = new 
TestReserveAllocationSpaceMemoryManager();
   
   buildModuleWithCodeAndData();



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[llvm-branch-commits] [lld] 9c6a884 - fix typo to cycle bots

[Nico Weber via llvm-branch-commits]

Author: Nico Weber
Date: 2020-12-12T20:16:14-05:00
New Revision: 9c6a884f67f55aa09098a1c7386a67e7dd164e97

URL: 
https://github.com/llvm/llvm-project/commit/9c6a884f67f55aa09098a1c7386a67e7dd164e97
DIFF: 
https://github.com/llvm/llvm-project/commit/9c6a884f67f55aa09098a1c7386a67e7dd164e97.diff

LOG: fix typo to cycle bots

Added: 


Modified: 
lld/COFF/DebugTypes.cpp

Removed: 




diff  --git a/lld/COFF/DebugTypes.cpp b/lld/COFF/DebugTypes.cpp
index 9db61fc63bcd..0c8bfd8ae5b8 100644
--- a/lld/COFF/DebugTypes.cpp
+++ b/lld/COFF/DebugTypes.cpp
@@ -1051,7 +1051,7 @@ void TypeMerger::mergeTypesWithGHash() {
   // the contents of the hash table cell, but we can remember the insertion
   // position. Because the table does not rehash, the position will not change
   // under insertion. After insertion is done, the value of the cell can be 
read
-  // to retreive the final PDB type index.
+  // to retrieve the final PDB type index.
   parallelForEachN(0, TpiSource::instances.size(), [&](size_t tpiSrcIdx) {
 TpiSource *source = TpiSource::instances[tpiSrcIdx];
 source->indexMapStorage.resize(source->ghashes.size());



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[llvm-branch-commits] [llvm] cf16437 - fix typos to cycle bots

[Nico Weber via llvm-branch-commits]

Author: Nico Weber
Date: 2020-12-12T20:19:33-05:00
New Revision: cf16437e05b4378bfee899b7371bf55d36566ca8

URL: 
https://github.com/llvm/llvm-project/commit/cf16437e05b4378bfee899b7371bf55d36566ca8
DIFF: 
https://github.com/llvm/llvm-project/commit/cf16437e05b4378bfee899b7371bf55d36566ca8.diff

LOG: fix typos to cycle bots

Added: 


Modified: 
llvm/lib/DebugInfo/PDB/Native/GSIStreamBuilder.cpp
llvm/lib/DebugInfo/PDB/Native/NativeSourceFile.cpp
llvm/lib/DebugInfo/PDB/Native/NativeTypeUDT.cpp
llvm/lib/DebugInfo/PDB/Native/SymbolCache.cpp
llvm/lib/DebugInfo/PDB/PDBInterfaceAnchors.cpp

Removed: 




diff  --git a/llvm/lib/DebugInfo/PDB/Native/GSIStreamBuilder.cpp 
b/llvm/lib/DebugInfo/PDB/Native/GSIStreamBuilder.cpp
index 4e58489f1401..52df26b67916 100644
--- a/llvm/lib/DebugInfo/PDB/Native/GSIStreamBuilder.cpp
+++ b/llvm/lib/DebugInfo/PDB/Native/GSIStreamBuilder.cpp
@@ -162,7 +162,7 @@ static int gsiRecordCmp(StringRef S1, StringRef S2) {
   if (LLVM_UNLIKELY(!isAsciiString(S1) || !isAsciiString(S2)))
 return memcmp(S1.data(), S2.data(), LS);
 
-  // Both strings are ascii, perform a case-insenstive comparison.
+  // Both strings are ascii, perform a case-insensitive comparison.
   return S1.compare_lower(S2.data());
 }
 

diff  --git a/llvm/lib/DebugInfo/PDB/Native/NativeSourceFile.cpp 
b/llvm/lib/DebugInfo/PDB/Native/NativeSourceFile.cpp
index 6473207e058a..fd813dee6b9f 100644
--- a/llvm/lib/DebugInfo/PDB/Native/NativeSourceFile.cpp
+++ b/llvm/lib/DebugInfo/PDB/Native/NativeSourceFile.cpp
@@ -1,4 +1,4 @@
-//===- NativeSourceFile.cpp - Native line number implementaiton -*- C++ 
-*-===//
+//===- NativeSourceFile.cpp - Native line number implementation -*- C++ 
-*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.

diff  --git a/llvm/lib/DebugInfo/PDB/Native/NativeTypeUDT.cpp 
b/llvm/lib/DebugInfo/PDB/Native/NativeTypeUDT.cpp
index b0be7f76e86e..917ec14e58d6 100644
--- a/llvm/lib/DebugInfo/PDB/Native/NativeTypeUDT.cpp
+++ b/llvm/lib/DebugInfo/PDB/Native/NativeTypeUDT.cpp
@@ -120,7 +120,7 @@ PDB_UdtType NativeTypeUDT::getUdtKind() const {
   case TypeRecordKind::Interface:
 return PDB_UdtType::Interface;
   default:
-llvm_unreachable("Unexected udt kind");
+llvm_unreachable("Unexpected udt kind");
   }
 }
 

diff  --git a/llvm/lib/DebugInfo/PDB/Native/SymbolCache.cpp 
b/llvm/lib/DebugInfo/PDB/Native/SymbolCache.cpp
index 3cab59e24a29..113fce6e1200 100644
--- a/llvm/lib/DebugInfo/PDB/Native/SymbolCache.cpp
+++ b/llvm/lib/DebugInfo/PDB/Native/SymbolCache.cpp
@@ -246,7 +246,7 @@ SymbolCache::getSymbolById(SymIndexId SymbolId) const {
 return nullptr;
 
   // Make sure to handle the case where we've inserted a placeholder symbol
-  // for types we don't yet suppport.
+  // for types we don't yet support.
   NativeRawSymbol *NRS = Cache[SymbolId].get();
   if (!NRS)
 return nullptr;

diff  --git a/llvm/lib/DebugInfo/PDB/PDBInterfaceAnchors.cpp 
b/llvm/lib/DebugInfo/PDB/PDBInterfaceAnchors.cpp
index 8eb3311b09e3..d51091d80933 100644
--- a/llvm/lib/DebugInfo/PDB/PDBInterfaceAnchors.cpp
+++ b/llvm/lib/DebugInfo/PDB/PDBInterfaceAnchors.cpp
@@ -1,4 +1,4 @@
-//===- PDBInterfaceAnchors.h - defines class anchor funcions *- C++ 
-*-===//
+//===- PDBInterfaceAnchors.h - defines class anchor functions ---*- C++ 
-*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
@@ -7,7 +7,7 @@
 
//===--===//
 // Class anchors are necessary per the LLVM Coding style guide, to ensure that
 // the vtable is only generated in this object file, and not in every object
-// file that incldues the corresponding header.
+// file that includes the corresponding header.
 
//===--===//
 
 #include "llvm/DebugInfo/PDB/IPDBDataStream.h"



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[llvm-branch-commits] [llvm] 36a23b3 - X86: Correcting X86OutgoingValueHandler typo (NFC)

[Matt Arsenault via llvm-branch-commits]

Author: Chris Sears
Date: 2020-12-12T20:28:37-05:00
New Revision: 36a23b33aa5ef2600e53772680fc14b4e5c676f0

URL: 
https://github.com/llvm/llvm-project/commit/36a23b33aa5ef2600e53772680fc14b4e5c676f0
DIFF: 
https://github.com/llvm/llvm-project/commit/36a23b33aa5ef2600e53772680fc14b4e5c676f0.diff

LOG: X86: Correcting X86OutgoingValueHandler typo (NFC)

https://reviews.llvm.org/D92631

Added: 


Modified: 
llvm/lib/Target/X86/X86CallLowering.cpp

Removed: 




diff  --git a/llvm/lib/Target/X86/X86CallLowering.cpp 
b/llvm/lib/Target/X86/X86CallLowering.cpp
index bfb7d4ee79e8..dee629a1ab28 100644
--- a/llvm/lib/Target/X86/X86CallLowering.cpp
+++ b/llvm/lib/Target/X86/X86CallLowering.cpp
@@ -95,11 +95,11 @@ bool X86CallLowering::splitToValueTypes(const ArgInfo 
&OrigArg,
 
 namespace {
 
-struct X86OutgoingValueHandler : public CallLowering::IncomingValueHandler {
+struct X86OutgoingValueHandler : public CallLowering::OutgoingValueHandler {
   X86OutgoingValueHandler(MachineIRBuilder &MIRBuilder,
   MachineRegisterInfo &MRI, MachineInstrBuilder &MIB,
   CCAssignFn *AssignFn)
-  : IncomingValueHandler(MIRBuilder, MRI, AssignFn), MIB(MIB),
+  : OutgoingValueHandler(MIRBuilder, MRI, AssignFn), MIB(MIB),
 DL(MIRBuilder.getMF().getDataLayout()),
 STI(MIRBuilder.getMF().getSubtarget()) {}
 



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[llvm-branch-commits] [llvm] ba3bc2f - [mac/arm] Deflake 3 check-llvm tests

[Nico Weber via llvm-branch-commits]

Author: Nico Weber
Date: 2020-12-12T21:14:45-05:00
New Revision: ba3bc2fd41b8428904fc779e353d3769074d8982

URL: 
https://github.com/llvm/llvm-project/commit/ba3bc2fd41b8428904fc779e353d3769074d8982
DIFF: 
https://github.com/llvm/llvm-project/commit/ba3bc2fd41b8428904fc779e353d3769074d8982.diff

LOG: [mac/arm] Deflake 3 check-llvm tests

On macOS/arm, signature verification has kill semantics by default.
Signature verification is cached with a file's inode (actually, vnode),
and if a new executable is copied over an existing file (which reuses
the inode), the cache isn't invalidated. So when the new executable
is executed, the kernel still has the old content's signature cached
and the kills the executable because the old signatue doesn't match
the new contents (https://openradar.appspot.com/FB8914243).

As workaround, rm the desitnation files first, to ensure they have
a fresh vnode (and hence no stale cached signature) after the copy.

Part of PR46647. See also e0e334a9c1ac for a similar change.

Added: 


Modified: 
llvm/test/tools/llvm-isel-fuzzer/aarch64-execname-options.ll
llvm/test/tools/llvm-isel-fuzzer/execname-options.ll
llvm/test/tools/llvm-opt-fuzzer/exec-options.ll

Removed: 




diff  --git a/llvm/test/tools/llvm-isel-fuzzer/aarch64-execname-options.ll 
b/llvm/test/tools/llvm-isel-fuzzer/aarch64-execname-options.ll
index 2cab8c747999..a4a8f9737715 100644
--- a/llvm/test/tools/llvm-isel-fuzzer/aarch64-execname-options.ll
+++ b/llvm/test/tools/llvm-isel-fuzzer/aarch64-execname-options.ll
@@ -8,6 +8,11 @@
 
 ; RUN: echo > %t.input
 
+; workaround for https://openradar.appspot.com/FB8914243
+; RUN: rm -f %t.bin--aarch64
+; RUN: rm -f %t.bin--aarch64-O1
+; RUN: rm -f %t.bin--O3-aarch64
+
 ; RUN: cp llvm-isel-fuzzer %t.bin--aarch64
 ; RUN: %t.bin--aarch64 %t.input 2>&1 | FileCheck -check-prefix=AARCH64 %s
 ; AARCH64: Injected args: -mtriple=aarch64

diff  --git a/llvm/test/tools/llvm-isel-fuzzer/execname-options.ll 
b/llvm/test/tools/llvm-isel-fuzzer/execname-options.ll
index dfce73ed2e24..3dc9892fdc4d 100644
--- a/llvm/test/tools/llvm-isel-fuzzer/execname-options.ll
+++ b/llvm/test/tools/llvm-isel-fuzzer/execname-options.ll
@@ -7,6 +7,11 @@
 
 ; RUN: echo > %t.input
 
+; workaround for https://openradar.appspot.com/FB8914243
+; RUN: rm -f %t.bin--gisel
+; RUN: rm -f %t.bin--gisel-O2
+; RUN: rm -f %t.bin--unexist
+
 ; RUN: cp llvm-isel-fuzzer %t.bin--gisel
 ; RUN: not %t.bin--gisel %t.input 2>&1 | FileCheck -check-prefix=GISEL %s
 ; GISEL: Injected args: -global-isel -O0

diff  --git a/llvm/test/tools/llvm-opt-fuzzer/exec-options.ll 
b/llvm/test/tools/llvm-opt-fuzzer/exec-options.ll
index 1dd0fa5c46b7..ab2f1d1f349a 100644
--- a/llvm/test/tools/llvm-opt-fuzzer/exec-options.ll
+++ b/llvm/test/tools/llvm-opt-fuzzer/exec-options.ll
@@ -15,6 +15,12 @@
 ; Temporary bitcode file
 ; RUN: opt -o %t.input %s
 
+; workaround for https://openradar.appspot.com/FB8914243
+; RUN: rm -f %t.bin--
+; RUN: rm -f %t.bin--x86_64
+; RUN: rm -f %t.bin--x86_64-unknown
+; RUN: rm -f %t.bin--x86_64-instcombine
+
 ; RUN: cp llvm-opt-fuzzer %t.bin--
 ; RUN: not %t.bin-- %t.input 2>&1 | FileCheck -check-prefix=EMPTY %s
 ; EMPTY: -mtriple must be specified



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[llvm-branch-commits] [mlir] c84b53c - [mlir] Add Python binding for MLIR Dict Attribute

[Mehdi Amini via llvm-branch-commits]

Author: kweisamx
Date: 2020-12-13T04:30:35Z
New Revision: c84b53ca9bcddcbaa8b726be0a4d6cb684dedbd5

URL: 
https://github.com/llvm/llvm-project/commit/c84b53ca9bcddcbaa8b726be0a4d6cb684dedbd5
DIFF: 
https://github.com/llvm/llvm-project/commit/c84b53ca9bcddcbaa8b726be0a4d6cb684dedbd5.diff

LOG: [mlir] Add Python binding for MLIR Dict Attribute

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D93004

Added: 


Modified: 
mlir/lib/Bindings/Python/IRModules.cpp
mlir/test/Bindings/Python/ir_attributes.py

Removed: 




diff  --git a/mlir/lib/Bindings/Python/IRModules.cpp 
b/mlir/lib/Bindings/Python/IRModules.cpp
index 66443bf89072..8a77d60741b4 100644
--- a/mlir/lib/Bindings/Python/IRModules.cpp
+++ b/mlir/lib/Bindings/Python/IRModules.cpp
@@ -1968,6 +1968,58 @@ class PyDenseIntElementsAttribute
   }
 };
 
+class PyDictAttribute : public PyConcreteAttribute {
+public:
+  static constexpr IsAFunctionTy isaFunction = mlirAttributeIsADictionary;
+  static constexpr const char *pyClassName = "DictAttr";
+  using PyConcreteAttribute::PyConcreteAttribute;
+
+  intptr_t dunderLen() { return mlirDictionaryAttrGetNumElements(*this); }
+
+  static void bindDerived(ClassTy &c) {
+c.def("__len__", &PyDictAttribute::dunderLen);
+c.def_static(
+"get",
+[](py::dict attributes, DefaultingPyMlirContext context) {
+  SmallVector mlirNamedAttributes;
+  mlirNamedAttributes.reserve(attributes.size());
+  for (auto &it : attributes) {
+auto &mlir_attr = it.second.cast();
+auto name = it.first.cast();
+mlirNamedAttributes.push_back(mlirNamedAttributeGet(
+mlirIdentifierGet(mlirAttributeGetContext(mlir_attr),
+  toMlirStringRef(name)),
+mlir_attr));
+  }
+  MlirAttribute attr =
+  mlirDictionaryAttrGet(context->get(), mlirNamedAttributes.size(),
+mlirNamedAttributes.data());
+  return PyDictAttribute(context->getRef(), attr);
+},
+py::arg("value"), py::arg("context") = py::none(),
+"Gets an uniqued dict attribute");
+c.def("__getitem__", [](PyDictAttribute &self, const std::string &name) {
+  MlirAttribute attr =
+  mlirDictionaryAttrGetElementByName(self, toMlirStringRef(name));
+  if (mlirAttributeIsNull(attr)) {
+throw SetPyError(PyExc_KeyError,
+ "attempt to access a non-existent attribute");
+  }
+  return PyAttribute(self.getContext(), attr);
+});
+c.def("__getitem__", [](PyDictAttribute &self, intptr_t index) {
+  if (index < 0 || index >= self.dunderLen()) {
+throw SetPyError(PyExc_IndexError,
+ "attempt to access out of bounds attribute");
+  }
+  MlirNamedAttribute namedAttr = mlirDictionaryAttrGetElement(self, index);
+  return PyNamedAttribute(
+  namedAttr.attribute,
+  std::string(mlirIdentifierStr(namedAttr.name).data));
+});
+  }
+};
+
 /// Refinement of PyDenseElementsAttribute for attributes containing
 /// floating-point values. Supports element access.
 class PyDenseFPElementsAttribute
@@ -3181,6 +3233,7 @@ void mlir::python::populateIRSubmodule(py::module &m) {
   PyDenseElementsAttribute::bind(m);
   PyDenseIntElementsAttribute::bind(m);
   PyDenseFPElementsAttribute::bind(m);
+  PyDictAttribute::bind(m);
   PyTypeAttribute::bind(m);
   PyUnitAttribute::bind(m);
 

diff  --git a/mlir/test/Bindings/Python/ir_attributes.py 
b/mlir/test/Bindings/Python/ir_attributes.py
index 642c1f6a836c..84f313912547 100644
--- a/mlir/test/Bindings/Python/ir_attributes.py
+++ b/mlir/test/Bindings/Python/ir_attributes.py
@@ -257,6 +257,47 @@ def testDenseFPAttr():
 run(testDenseFPAttr)
 
 
+# CHECK-LABEL: TEST: testDictAttr
+def testDictAttr():
+  with Context():
+dict_attr = {
+  'stringattr':  StringAttr.get('string'),
+  'integerattr' : IntegerAttr.get(
+IntegerType.get_signless(32), 42)
+}
+
+a = DictAttr.get(dict_attr)
+
+# CHECK attr: {integerattr = 42 : i32, stringattr = "string"}
+print("attr:", a)
+
+assert len(a) == 2
+
+# CHECK: 42 : i32
+print(a['integerattr'])
+
+# CHECK: "string"
+print(a['stringattr'])
+
+# Check that exceptions are raised as expected.
+try:
+  _ = a['does_not_exist']
+except KeyError:
+  pass
+else:
+  assert False, "Exception not produced"
+
+try:
+  _ = a[42]
+except IndexError:
+  pass
+else:
+  assert False, "expected IndexError on accessing an out-of-bounds 
attribute"
+
+
+
+run(testDictAttr)
+
 # CHECK-LABEL: TEST: testTypeAttr
 def testTypeAttr():
   with Context():



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[llvm-branch-commits] [mlir] a44e630 - [AsmParser] Fix support for zero bit integer types.

[Chris Lattner via llvm-branch-commits]

Author: Chris Lattner
Date: 2020-12-12T21:24:18-08:00
New Revision: a44e630353b83fea89b7d6e61cba5d34800d86d5

URL: 
https://github.com/llvm/llvm-project/commit/a44e630353b83fea89b7d6e61cba5d34800d86d5
DIFF: 
https://github.com/llvm/llvm-project/commit/a44e630353b83fea89b7d6e61cba5d34800d86d5.diff

LOG: [AsmParser] Fix support for zero bit integer types.

Zero bit integer types are supported by IntegerType for consistency,
but the asmparser never got updated. Allow them to be parsed, as
required to fix CIRCT issue #316

Differential Revision: https://reviews.llvm.org/D93089

Added: 


Modified: 
mlir/lib/Parser/Token.cpp
mlir/test/Dialect/Quant/parse-any-invalid.mlir
mlir/test/Dialect/Quant/parse-uniform-invalid.mlir
mlir/test/IR/invalid.mlir
mlir/test/IR/parser.mlir

Removed: 




diff  --git a/mlir/lib/Parser/Token.cpp b/mlir/lib/Parser/Token.cpp
index b4ac30f2c388..00bc7dbd6bd9 100644
--- a/mlir/lib/Parser/Token.cpp
+++ b/mlir/lib/Parser/Token.cpp
@@ -60,9 +60,7 @@ Optional Token::getIntTypeBitwidth() const {
   assert(getKind() == inttype);
   unsigned bitwidthStart = (spelling[0] == 'i' ? 1 : 2);
   unsigned result = 0;
-  if (spelling[bitwidthStart] == '0' ||
-  spelling.drop_front(bitwidthStart).getAsInteger(10, result) ||
-  result == 0)
+  if (spelling.drop_front(bitwidthStart).getAsInteger(10, result))
 return None;
   return result;
 }

diff  --git a/mlir/test/Dialect/Quant/parse-any-invalid.mlir 
b/mlir/test/Dialect/Quant/parse-any-invalid.mlir
index d90423ef4085..850174b4bd98 100644
--- a/mlir/test/Dialect/Quant/parse-any-invalid.mlir
+++ b/mlir/test/Dialect/Quant/parse-any-invalid.mlir
@@ -36,9 +36,9 @@
 !qalias = type !quant.any:f32>
 
 // -
-// Unrecognized storage type: storage size == 0
+// Unrecognized storage type: storage size
 // expected-error@+1 {{invalid integer width}}
-!qalias = type !quant.any:f32>
+!qalias = type !quant.any:f32>
 
 // -
 // Illegal storage min/max: max - min < 0

diff  --git a/mlir/test/Dialect/Quant/parse-uniform-invalid.mlir 
b/mlir/test/Dialect/Quant/parse-uniform-invalid.mlir
index 114ab7dc0d7b..f43496f85e0f 100644
--- a/mlir/test/Dialect/Quant/parse-uniform-invalid.mlir
+++ b/mlir/test/Dialect/Quant/parse-uniform-invalid.mlir
@@ -56,9 +56,9 @@
 !qalias = type !quant.uniform:f32, 0.99872:127>
 
 // -
-// Unrecognized storage type: storage size == 0
+// Unrecognized storage type: storage size
 // expected-error@+1 {{invalid integer width}}
-!qalias = type !quant.uniform:f32, 0.99872:127>
+!qalias = type !quant.uniform:f32, 0.99872:127>
 
 // -
 // Illegal storage min/max: max - min < 0

diff  --git a/mlir/test/IR/invalid.mlir b/mlir/test/IR/invalid.mlir
index 6b28b33e7c78..86245ad25c3b 100644
--- a/mlir/test/IR/invalid.mlir
+++ b/mlir/test/IR/invalid.mlir
@@ -201,7 +201,7 @@ func @no_terminator() {
 
 // -
 
-func @illegaltype(i0) // expected-error {{invalid integer width}}
+func @illegaltype(i21312312323120) // expected-error {{invalid integer width}}
 
 // -
 

diff  --git a/mlir/test/IR/parser.mlir b/mlir/test/IR/parser.mlir
index 9098e9ace5fa..8fcb7863726f 100644
--- a/mlir/test/IR/parser.mlir
+++ b/mlir/test/IR/parser.mlir
@@ -58,8 +58,8 @@ func private @baz() -> (i1, index, f32)
 // CHECK: func private @missingReturn()
 func private @missingReturn()
 
-// CHECK: func private @int_types(i1, i2, i4, i7, i87) -> (i1, index, i19)
-func private @int_types(i1, i2, i4, i7, i87) -> (i1, index, i19)
+// CHECK: func private @int_types(i0, i1, i2, i4, i7, i87) -> (i1, index, i19)
+func private @int_types(i0, i1, i2, i4, i7, i87) -> (i1, index, i19)
 
 // CHECK: func private @sint_types(si2, si4) -> (si7, si1023)
 func private @sint_types(si2, si4) -> (si7, si1023)



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