[llvm-branch-commits] [llvm] 78a5706 - [CodeGen] Restore accessing __stack_chk_guard via a .refptr stub on mingw after 2518433f861fcb87

[Martin Storsjö via llvm-branch-commits]

Author: Martin Storsjö
Date: 2020-12-07T09:35:12+02:00
New Revision: 78a57069b53a08d5aef98a8472fcfa73dbbc8771

URL: 
https://github.com/llvm/llvm-project/commit/78a57069b53a08d5aef98a8472fcfa73dbbc8771
DIFF: 
https://github.com/llvm/llvm-project/commit/78a57069b53a08d5aef98a8472fcfa73dbbc8771.diff

LOG: [CodeGen] Restore accessing __stack_chk_guard via a .refptr stub on mingw 
after 2518433f861fcb87

Add tests for this particular detail for x86 and arm (similar tests
already existed for x86_64 and aarch64).

The libssp implementation may be located in a separate DLL, and in
those cases, the references need to be in a .refptr stub, to avoid
needing to touch up code in the text section at runtime (which is
supported but inefficient for x86, and unsupported for arm).

Differential Revision: https://reviews.llvm.org/D92738

Added: 
llvm/test/CodeGen/ARM/win32-ssp.ll

Modified: 
llvm/lib/CodeGen/TargetLoweringBase.cpp
llvm/test/CodeGen/X86/win32-ssp.ll

Removed: 




diff  --git a/llvm/lib/CodeGen/TargetLoweringBase.cpp 
b/llvm/lib/CodeGen/TargetLoweringBase.cpp
index 61a2de711af8..7dfd76ce5de0 100644
--- a/llvm/lib/CodeGen/TargetLoweringBase.cpp
+++ b/llvm/lib/CodeGen/TargetLoweringBase.cpp
@@ -1973,7 +1973,8 @@ void TargetLoweringBase::insertSSPDeclarations(Module &M) 
const {
 auto *GV = new GlobalVariable(M, Type::getInt8PtrTy(M.getContext()), false,
   GlobalVariable::ExternalLinkage, nullptr,
   "__stack_chk_guard");
-if (getTargetMachine().getRelocationModel() == Reloc::Static)
+if (TM.getRelocationModel() == Reloc::Static &&
+!TM.getTargetTriple().isWindowsGNUEnvironment())
   GV->setDSOLocal(true);
   }
 }

diff  --git a/llvm/test/CodeGen/ARM/win32-ssp.ll 
b/llvm/test/CodeGen/ARM/win32-ssp.ll
new file mode 100644
index ..292ef9f65df1
--- /dev/null
+++ b/llvm/test/CodeGen/ARM/win32-ssp.ll
@@ -0,0 +1,23 @@
+; RUN: llc -mtriple=thumbv7-w64-mingw32 < %s -o - | FileCheck 
--check-prefix=MINGW %s
+
+declare void @llvm.lifetime.start.p0i8(i64, i8* nocapture)
+declare dso_local void @other(i8*)
+declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture)
+
+define dso_local void @func() sspstrong {
+entry:
+; MINGW-LABEL: func:
+; MINGW: movw [[REG:r[0-9]+]], :lower16:.refptr.__stack_chk_guard
+; MINGW: movt [[REG]], :upper16:.refptr.__stack_chk_guard
+; MINGW: ldr [[REG2:r[0-9]+]], {{\[}}[[REG]]]
+; MINGW: ldr {{r[0-9]+}}, {{\[}}[[REG2]]]
+; MINGW: bl other
+; MINGW: ldr {{r[0-9]+}}, {{\[}}[[REG2]]]
+; MINGW: bl __stack_chk_fail
+
+  %c = alloca i8, align 1
+  call void @llvm.lifetime.start.p0i8(i64 1, i8* nonnull %c)
+  call void @other(i8* nonnull %c)
+  call void @llvm.lifetime.end.p0i8(i64 1, i8* nonnull %c)
+  ret void
+}

diff  --git a/llvm/test/CodeGen/X86/win32-ssp.ll 
b/llvm/test/CodeGen/X86/win32-ssp.ll
index b3e6333000ad..0626bd98a3e3 100644
--- a/llvm/test/CodeGen/X86/win32-ssp.ll
+++ b/llvm/test/CodeGen/X86/win32-ssp.ll
@@ -1,6 +1,7 @@
 ; RUN: llc -mtriple=x86_64-w64-mingw32< %s -o - | FileCheck 
--check-prefix=MINGW %s
 ; RUN: llc -mtriple=x86_64-pc-windows-itanium < %s -o - | FileCheck 
--check-prefix=MSVC  %s
 ; RUN: llc -mtriple=x86_64-pc-windows-msvc< %s -o - | FileCheck 
--check-prefix=MSVC  %s
+; RUN: llc -mtriple=i686-w64-mingw32  < %s -o - | FileCheck 
--check-prefix=MINGW %s
 
 declare void @llvm.lifetime.start.p0i8(i64, i8* nocapture)
 declare dso_local void @other(i8*)
@@ -9,12 +10,11 @@ declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture)
 define dso_local void @func() sspstrong {
 entry:
 ; MINGW-LABEL: func:
-; MINGW: mov{{l|q}}  .refptr.__stack_chk_guard(%rip), [[REG:%[a-z]+]]
+; MINGW: mov{{l|q}}  .refptr.[[PREFIX:_?]]__stack_chk_guard{{(\(%rip\))?}}, 
[[REG:%[a-z]+]]
 ; MINGW: mov{{l|q}}  ([[REG]])
-; MINGW: callq other
+; MINGW: call{{l|q}} [[PREFIX]]other
 ; MINGW: mov{{l|q}}  ([[REG]])
-; MINGW: callq __stack_chk_fail
-; MINGW: .seh_endproc
+; MINGW: call{{l|q}} [[PREFIX]]__stack_chk_fail
 
 ; MSVC-LABEL: func:
 ; MSVC: mov{{l|q}} __security_cookie



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[llvm-branch-commits] [lldb] ce279e0 - [lldb/test] Simplify TestGdbRemoteExitCode.py

[Pavel Labath via llvm-branch-commits]

Author: Pavel Labath
Date: 2020-12-07T09:24:12+01:00
New Revision: ce279e0c80eb3af913bc2cd08c2bcf4632252675

URL: 
https://github.com/llvm/llvm-project/commit/ce279e0c80eb3af913bc2cd08c2bcf4632252675
DIFF: 
https://github.com/llvm/llvm-project/commit/ce279e0c80eb3af913bc2cd08c2bcf4632252675.diff

LOG: [lldb/test] Simplify TestGdbRemoteExitCode.py

Reuse the existing code to launch a debug server + inferior.

Added: 


Modified: 
lldb/test/API/tools/lldb-server/TestGdbRemoteExitCode.py

Removed: 




diff  --git a/lldb/test/API/tools/lldb-server/TestGdbRemoteExitCode.py 
b/lldb/test/API/tools/lldb-server/TestGdbRemoteExitCode.py
index 24fb0d58b8f6..90a131e64531 100644
--- a/lldb/test/API/tools/lldb-server/TestGdbRemoteExitCode.py
+++ b/lldb/test/API/tools/lldb-server/TestGdbRemoteExitCode.py
@@ -12,66 +12,8 @@ class TestGdbRemoteExitCode(GdbRemoteTestCaseBase):
 
 mydir = TestBase.compute_mydir(__file__)
 
-FAILED_LAUNCH_CODE = "E08"
-
-def get_launch_fail_reason(self):
-self.reset_test_sequence()
-self.test_sequence.add_log_lines(
-["read packet: $qLaunchSuccess#00"],
-True)
-self.test_sequence.add_log_lines(
-[{"direction": "send", "regex": r"^\$(.+)#[0-9a-fA-F]{2}$",
-  "capture": {1: "launch_result"}}],
-True)
-context = self.expect_gdbremote_sequence()
-self.assertIsNotNone(context)
-return context.get("launch_result")[1:]
-
-def start_inferior(self):
-launch_args = self.install_and_create_launch_args()
-
-server = self.connect_to_debug_monitor()
-self.assertIsNotNone(server)
-
-self.add_no_ack_remote_stream()
-self.test_sequence.add_log_lines(
-["read packet: %s" % lldbgdbserverutils.build_gdbremote_A_packet(
-launch_args)],
-True)
-self.test_sequence.add_log_lines(
-[{"direction": "send", "regex": r"^\$(.+)#[0-9a-fA-F]{2}$",
-  "capture": {1: "A_result"}}],
-True)
-context = self.expect_gdbremote_sequence()
-self.assertIsNotNone(context)
-
-launch_result = context.get("A_result")
-self.assertIsNotNone(launch_result)
-if launch_result == self.FAILED_LAUNCH_CODE:
-fail_reason = self.get_launch_fail_reason()
-self.fail("failed to launch inferior: " + fail_reason)
-
-@debugserver_test
-@skipIfDarwinEmbedded #  lldb-server tests not 
updated to work on ios etc yet
-def test_start_inferior_debugserver(self):
-self.init_debugserver_test()
-self.build()
-self.start_inferior()
-
-@llgs_test
-def test_start_inferior_llgs(self):
-self.init_llgs_test()
-self.build()
-self.start_inferior()
-
 def inferior_exit_0(self):
-launch_args = self.install_and_create_launch_args()
-
-server = self.connect_to_debug_monitor()
-self.assertIsNotNone(server)
-
-self.add_no_ack_remote_stream()
-self.add_verified_launch_packets(launch_args)
+self.prep_debug_monitor_and_inferior()
 self.test_sequence.add_log_lines(
 ["read packet: $vCont;c#a8",
  "send packet: $W00#00"],
@@ -93,18 +35,11 @@ def test_inferior_exit_0_llgs(self):
 self.inferior_exit_0()
 
 def inferior_exit_42(self):
-launch_args = self.install_and_create_launch_args()
-
-server = self.connect_to_debug_monitor()
-self.assertIsNotNone(server)
-
 RETVAL = 42
 
-# build launch args
-launch_args += ["retval:%d" % RETVAL]
+procs = self.prep_debug_monitor_and_inferior(
+inferior_args=["retval:%d" % RETVAL])
 
-self.add_no_ack_remote_stream()
-self.add_verified_launch_packets(launch_args)
 self.test_sequence.add_log_lines(
 ["read packet: $vCont;c#a8",
  "send packet: $W{0:02x}#00".format(RETVAL)],



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[llvm-branch-commits] [lldb] 174b09e - [lldb/test] Simplify TestLldbGdbServer.py

[Pavel Labath via llvm-branch-commits]

Author: Pavel Labath
Date: 2020-12-07T09:24:13+01:00
New Revision: 174b09e9153894903c13bd4f40c6dab07b2558ba

URL: 
https://github.com/llvm/llvm-project/commit/174b09e9153894903c13bd4f40c6dab07b2558ba
DIFF: 
https://github.com/llvm/llvm-project/commit/174b09e9153894903c13bd4f40c6dab07b2558ba.diff

LOG: [lldb/test] Simplify TestLldbGdbServer.py

Reuse existing code to start server+inferior.

Added: 


Modified: 
lldb/test/API/tools/lldb-server/TestLldbGdbServer.py

Removed: 




diff  --git a/lldb/test/API/tools/lldb-server/TestLldbGdbServer.py 
b/lldb/test/API/tools/lldb-server/TestLldbGdbServer.py
index 609931e1f892..2bcf54ec19e4 100644
--- a/lldb/test/API/tools/lldb-server/TestLldbGdbServer.py
+++ b/lldb/test/API/tools/lldb-server/TestLldbGdbServer.py
@@ -35,24 +35,6 @@ def test_exe_starts_llgs(self):
 self.init_llgs_test()
 server = self.connect_to_debug_monitor()
 
-def start_no_ack_mode(self):
-server = self.connect_to_debug_monitor()
-self.assertIsNotNone(server)
-
-self.add_no_ack_remote_stream()
-self.expect_gdbremote_sequence()
-
-@debugserver_test
-@skipIfDarwinEmbedded #  lldb-server tests not 
updated to work on ios etc yet
-def test_start_no_ack_mode_debugserver(self):
-self.init_debugserver_test()
-self.start_no_ack_mode()
-
-@llgs_test
-def test_start_no_ack_mode_llgs(self):
-self.init_llgs_test()
-self.start_no_ack_mode()
-
 def thread_suffix_supported(self):
 server = self.connect_to_debug_monitor()
 self.assertIsNotNone(server)
@@ -99,13 +81,7 @@ def test_list_threads_in_stop_reply_supported_llgs(self):
 self.list_threads_in_stop_reply_supported()
 
 def c_packet_works(self):
-launch_args = self.install_and_create_launch_args()
-
-server = self.connect_to_debug_monitor()
-self.assertIsNotNone(server)
-
-self.add_no_ack_remote_stream()
-self.add_verified_launch_packets(launch_args)
+procs = self.prep_debug_monitor_and_inferior()
 self.test_sequence.add_log_lines(
 ["read packet: $c#63",
  "send packet: $W00#00"],
@@ -127,16 +103,8 @@ def test_c_packet_works_llgs(self):
 self.c_packet_works()
 
 def inferior_print_exit(self):
-launch_args = self.install_and_create_launch_args()
-
-server = self.connect_to_debug_monitor()
-self.assertIsNotNone(server)
-
-# build launch args
-launch_args += ["hello, world"]
-
-self.add_no_ack_remote_stream()
-self.add_verified_launch_packets(launch_args)
+procs = self.prep_debug_monitor_and_inferior(
+inferior_args=["hello, world"])
 self.test_sequence.add_log_lines(
 ["read packet: $vCont;c#a8",
  {"type": "output_match", "regex": 
self.maybe_strict_output_regex(r"hello, world\r\n")},
@@ -162,16 +130,7 @@ def test_inferior_print_exit_llgs(self):
 self.inferior_print_exit()
 
 def first_launch_stop_reply_thread_matches_first_qC(self):
-launch_args = self.install_and_create_launch_args()
-
-server = self.connect_to_debug_monitor()
-self.assertIsNotNone(server)
-
-# build launch args
-launch_args += ["hello, world"]
-
-self.add_no_ack_remote_stream()
-self.add_verified_launch_packets(launch_args)
+procs = self.prep_debug_monitor_and_inferior()
 self.test_sequence.add_log_lines(["read packet: $qC#00",
   {"direction": "send",
"regex": r"^\$QC([0-9a-fA-F]+)#",
@@ -235,14 +194,7 @@ def test_attach_commandline_continue_app_exits_llgs(self):
 self.attach_commandline_continue_app_exits()
 
 def qRegisterInfo_returns_one_valid_result(self):
-launch_args = self.install_and_create_launch_args()
-
-server = self.connect_to_debug_monitor()
-self.assertIsNotNone(server)
-
-# Build the expected protocol stream
-self.add_no_ack_remote_stream()
-self.add_verified_launch_packets(launch_args)
+self.prep_debug_monitor_and_inferior()
 self.test_sequence.add_log_lines(
 ["read packet: $qRegisterInfo0#00",
  {"direction": "send", "regex": r"^\$(.+);#[0-9A-Fa-f]{2}", 
"capture": {1: "reginfo_0"}}],
@@ -271,14 +223,7 @@ def test_qRegisterInfo_returns_one_valid_result_llgs(self):
 self.qRegisterInfo_returns_one_valid_result()
 
 def qRegisterInfo_returns_all_valid_results(self):
-launch_args = self.install_and_create_launch_args()
-
-server = self.connect_to_debug_monitor()
-self.assertIsNotNone(server)
-
-# Build the expected protocol stream.
-self.add_no_ack_remote_stream()
-self.add_verified_launch_packets(launch_args)
+self.pre

[llvm-branch-commits] [lldb] a2f4f7d - [lldb/test] Refactor socket_packet_pump

[Pavel Labath via llvm-branch-commits]

Author: Pavel Labath
Date: 2020-12-07T09:24:13+01:00
New Revision: a2f4f7daf76c767efd668390bc7f8b99bdb1218c

URL: 
https://github.com/llvm/llvm-project/commit/a2f4f7daf76c767efd668390bc7f8b99bdb1218c
DIFF: 
https://github.com/llvm/llvm-project/commit/a2f4f7daf76c767efd668390bc7f8b99bdb1218c.diff

LOG: [lldb/test] Refactor socket_packet_pump

Now that the class does not use a thread, the name is no longer
appropriate. Rename the class to "Server" and make it a long-lived
object (instead of recreating it for every expect_gdbremote_sequence
call). The idea is to make this class a wrapper for all communication
with debug/lldb-server. This will enable some additional cleanups as we
had some duplication between socket_pump non-pump code paths.

Also squeeze in some small improvements:
- use python-level timeouts on sockets instead of the manual select
  calls
- use byte arrays instead of strings when working with raw packets

Added: 


Modified: 
lldb/packages/Python/lldbsuite/test/tools/lldb-server/gdbremote_testcase.py
lldb/packages/Python/lldbsuite/test/tools/lldb-server/lldbgdbserverutils.py
lldb/test/API/tools/lldb-server/TestGdbRemoteCompletion.py

Removed: 
lldb/packages/Python/lldbsuite/test/tools/lldb-server/socket_packet_pump.py



diff  --git 
a/lldb/packages/Python/lldbsuite/test/tools/lldb-server/gdbremote_testcase.py 
b/lldb/packages/Python/lldbsuite/test/tools/lldb-server/gdbremote_testcase.py
index 2f278289988c..d7bfb7fbda32 100644
--- 
a/lldb/packages/Python/lldbsuite/test/tools/lldb-server/gdbremote_testcase.py
+++ 
b/lldb/packages/Python/lldbsuite/test/tools/lldb-server/gdbremote_testcase.py
@@ -87,7 +87,6 @@ def setUp(self):
 
 self.setUpBaseLogging()
 self.debug_monitor_extra_args = []
-self._pump_queues = socket_packet_pump.PumpQueues()
 
 if self.isVerboseLoggingRequested():
 # If requested, full logs go to a log file
@@ -118,8 +117,6 @@ def setUp(self):
 self.stub_hostname = "localhost"
 
 def tearDown(self):
-self._pump_queues.verify_queues_empty()
-
 self.logger.removeHandler(self._verbose_log_handler)
 self._verbose_log_handler = None
 TestBase.tearDown(self)
@@ -342,6 +339,7 @@ def launch_debug_monitor(self, attach_pid=None, 
logfile=None):
 
 if self.reverse_connect:
 self.sock = sock.accept()[0]
+self.sock.settimeout(self.DEFAULT_TIMEOUT)
 
 return server
 
@@ -354,6 +352,7 @@ def connect_to_debug_monitor(self, attach_pid=None):
 # Schedule debug monitor to be shut down during teardown.
 logger = self.logger
 
+self._server = Server(self.sock, server)
 return server
 
 # We're using a random port algorithm to try not to collide with other 
ports,
@@ -375,6 +374,7 @@ def connect_to_debug_monitor(self, attach_pid=None):
 try:
 logger.info("Connect attempt %d", connect_attemps + 1)
 self.sock = self.create_socket()
+self._server = Server(self.sock, server)
 return server
 except _ConnectionRefused as serr:
 # Ignore, and try again.
@@ -632,9 +632,8 @@ def parse_register_info_packets(self, context):
 def expect_gdbremote_sequence(self):
 return expect_lldb_gdbserver_replay(
 self,
-self.sock,
+self._server,
 self.test_sequence,
-self._pump_queues,
 self.DEFAULT_TIMEOUT * len(self.test_sequence),
 self.logger)
 

diff  --git 
a/lldb/packages/Python/lldbsuite/test/tools/lldb-server/lldbgdbserverutils.py 
b/lldb/packages/Python/lldbsuite/test/tools/lldb-server/lldbgdbserverutils.py
index b5c635a77b5c..07136108b2a4 100644
--- 
a/lldb/packages/Python/lldbsuite/test/tools/lldb-server/lldbgdbserverutils.py
+++ 
b/lldb/packages/Python/lldbsuite/test/tools/lldb-server/lldbgdbserverutils.py
@@ -3,19 +3,18 @@
 
 from __future__ import division, print_function
 
-
+import binascii
 import os
 import os.path
 import platform
 import re
 import six
-import socket_packet_pump
+import socket
 import subprocess
+from lldbsuite.support import seven
 from lldbsuite.test.lldbtest import *
 from lldbsuite.test import configuration
-
-from six.moves import queue
-
+from textwrap import dedent
 
 def _get_debug_monitor_from_lldb(lldb_exe, debug_monitor_basename):
 """Return the debug monitor exe path given the lldb exe path.
@@ -165,9 +164,8 @@ def assert_packets_equal(asserter, actual_packet, 
expected_packet):
 
 def expect_lldb_gdbserver_replay(
 asserter,
-sock,
+server,
 test_sequence,
-pump_queues,
 timeout_seconds,
 logger=None):
 """Replay socket communication with lldb-gdbserver and verify responses.
@@ -175,8 +173,6 @@ def expect

[llvm-branch-commits] [compiler-rt] 414d3dc - [VE][compiler-rt] Support VE in clear_cache.c

[Kazushi Marukawa via llvm-branch-commits]

Author: Kazushi (Jam) Marukawa
Date: 2020-12-07T17:38:23+09:00
New Revision: 414d3dc62c706f41226b0d552210c79f5080df43

URL: 
https://github.com/llvm/llvm-project/commit/414d3dc62c706f41226b0d552210c79f5080df43
DIFF: 
https://github.com/llvm/llvm-project/commit/414d3dc62c706f41226b0d552210c79f5080df43.diff

LOG: [VE][compiler-rt] Support VE in clear_cache.c

Support SX Aurora VE by __clear_cache() function.  This modification
allows VE to run written data, e.g. clear_cache_test.c under compiler-rt
test.  We still have code alignment problem in enable_execute_stack_test.c,
though.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D92703

Added: 


Modified: 
compiler-rt/lib/builtins/clear_cache.c

Removed: 




diff  --git a/compiler-rt/lib/builtins/clear_cache.c 
b/compiler-rt/lib/builtins/clear_cache.c
index e9e291467bd9..5a443ddd4b03 100644
--- a/compiler-rt/lib/builtins/clear_cache.c
+++ b/compiler-rt/lib/builtins/clear_cache.c
@@ -167,6 +167,8 @@ void __clear_cache(void *start, void *end) {
 #if __APPLE__
   // On Darwin, sys_icache_invalidate() provides this functionality
   sys_icache_invalidate(start, end - start);
+#elif defined(__ve__)
+  __asm__ volatile("fencec 2");
 #else
   compilerrt_abort();
 #endif



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[llvm-branch-commits] [llvm] 53401e8 - [TableGen][SchedModels] Simplify the code. NFC

[Evgeny Leviant via llvm-branch-commits]

Author: Evgeny Leviant
Date: 2020-12-07T11:53:33+03:00
New Revision: 53401e8e88641941fee0876d234f9a9fc70ef6ce

URL: 
https://github.com/llvm/llvm-project/commit/53401e8e88641941fee0876d234f9a9fc70ef6ce
DIFF: 
https://github.com/llvm/llvm-project/commit/53401e8e88641941fee0876d234f9a9fc70ef6ce.diff

LOG: [TableGen][SchedModels] Simplify the code. NFC

Differential revision: https://reviews.llvm.org/D92304

Added: 


Modified: 
llvm/utils/TableGen/CodeGenSchedule.cpp
llvm/utils/TableGen/CodeGenSchedule.h
llvm/utils/TableGen/SubtargetEmitter.cpp

Removed: 




diff  --git a/llvm/utils/TableGen/CodeGenSchedule.cpp 
b/llvm/utils/TableGen/CodeGenSchedule.cpp
index 50ee9462d1d1..49a7575dce95 100644
--- a/llvm/utils/TableGen/CodeGenSchedule.cpp
+++ b/llvm/utils/TableGen/CodeGenSchedule.cpp
@@ -1314,16 +1314,12 @@ struct PredTransition {
   SmallVector PredTerm;
   SmallVector, 16> WriteSequences;
   SmallVector, 16> ReadSequences;
-  SmallVector ProcIndices;
+  unsigned ProcIndex = 0;
 
   PredTransition() = default;
-  PredTransition(ArrayRef PT) {
+  PredTransition(ArrayRef PT, unsigned ProcId) {
 PredTerm.assign(PT.begin(), PT.end());
-ProcIndices.assign(1, 0);
-  }
-  PredTransition(ArrayRef PT, ArrayRef PIds) {
-PredTerm.assign(PT.begin(), PT.end());
-ProcIndices.assign(PIds.begin(), PIds.end());
+ProcIndex = ProcId;
   }
 };
 
@@ -1413,16 +1409,11 @@ bool PredTransitions::mutuallyExclusive(Record *PredDef,
 }
 
 static std::vector getAllPredicates(ArrayRef Variants,
-  ArrayRef ProcIndices) {
+  unsigned ProcId) {
   std::vector Preds;
   for (auto &Variant : Variants) {
 if (!Variant.VarOrSeqDef->isSubClassOf("SchedVar"))
   continue;
-
-if (ProcIndices[0] && Variant.ProcIdx)
-  if (!llvm::count(ProcIndices, Variant.ProcIdx))
-continue;
-
 Preds.push_back(Variant.VarOrSeqDef->getValueAsDef("Predicate"));
   }
   return Preds;
@@ -1444,12 +1435,14 @@ void PredTransitions::getIntersectingVariants(
   Record *ModelDef = SchedRW.TheDef->getValueAsDef("SchedModel");
   VarProcIdx = SchedModels.getProcModel(ModelDef).Index;
 }
-// Push each variant. Assign TransVecIdx later.
-const RecVec VarDefs = SchedRW.TheDef->getValueAsListOfDefs("Variants");
-for (Record *VarDef : VarDefs)
-  Variants.emplace_back(VarDef, SchedRW.Index, VarProcIdx, 0);
-if (VarProcIdx == 0)
-  GenericRW = true;
+if (VarProcIdx == 0 || VarProcIdx == TransVec[TransIdx].ProcIndex) {
+  // Push each variant. Assign TransVecIdx later.
+  const RecVec VarDefs = SchedRW.TheDef->getValueAsListOfDefs("Variants");
+  for (Record *VarDef : VarDefs)
+Variants.emplace_back(VarDef, SchedRW.Index, VarProcIdx, 0);
+  if (VarProcIdx == 0)
+GenericRW = true;
+}
   }
   for (RecIter AI = SchedRW.Aliases.begin(), AE = SchedRW.Aliases.end();
AI != AE; ++AI) {
@@ -1461,6 +1454,17 @@ void PredTransitions::getIntersectingVariants(
   Record *ModelDef = (*AI)->getValueAsDef("SchedModel");
   AliasProcIdx = SchedModels.getProcModel(ModelDef).Index;
 }
+if (AliasProcIdx && AliasProcIdx != TransVec[TransIdx].ProcIndex)
+  continue;
+if (!Variants.empty()) {
+  const CodeGenProcModel &PM =
+  *(SchedModels.procModelBegin() + AliasProcIdx);
+  PrintFatalError((*AI)->getLoc(),
+  "Multiple variants defined for processor " +
+  PM.ModelName +
+  " Ensure only one SchedAlias exists per RW.");
+}
+
 const CodeGenSchedRW &AliasRW =
   SchedModels.getSchedRW((*AI)->getValueAsDef("AliasRW"));
 
@@ -1475,25 +1479,10 @@ void PredTransitions::getIntersectingVariants(
   GenericRW = true;
   }
   std::vector AllPreds =
-  getAllPredicates(Variants, TransVec[TransIdx].ProcIndices);
+  getAllPredicates(Variants, TransVec[TransIdx].ProcIndex);
   for (TransVariant &Variant : Variants) {
 // Don't expand variants if the processor models don't intersect.
 // A zero processor index means any processor.
-SmallVectorImpl &ProcIndices = TransVec[TransIdx].ProcIndices;
-if (ProcIndices[0] && Variant.ProcIdx) {
-  unsigned Cnt = std::count(ProcIndices.begin(), ProcIndices.end(),
-Variant.ProcIdx);
-  if (!Cnt)
-continue;
-  if (Cnt > 1) {
-const CodeGenProcModel &PM =
-  *(SchedModels.procModelBegin() + Variant.ProcIdx);
-PrintFatalError(Variant.VarOrSeqDef->getLoc(),
-"Multiple variants defined for processor " +
-PM.ModelName +
-" Ensure only one SchedAlias exists per RW.");
-  }
-}
 if (Variant.VarOrSeqDef->isSubClassOf("SchedVar")) {
   Record *PredDef = Variant.VarOr

[llvm-branch-commits] [lldb] 266c90f - [lldb] [test] Link FreeBSD test failures to bugs

[Michał Górny via llvm-branch-commits]

Author: Michał Górny
Date: 2020-12-07T09:56:50+01:00
New Revision: 266c90fec899356aa2c88f1e614d40d554db6fb3

URL: 
https://github.com/llvm/llvm-project/commit/266c90fec899356aa2c88f1e614d40d554db6fb3
DIFF: 
https://github.com/llvm/llvm-project/commit/266c90fec899356aa2c88f1e614d40d554db6fb3.diff

LOG: [lldb] [test] Link FreeBSD test failures to bugs

Differential Revision: https://reviews.llvm.org/D92740

Added: 


Modified: 
lldb/test/API/api/multithreaded/TestMultithreaded.py

lldb/test/API/commands/expression/multiline-navigation/TestMultilineNavigation.py

lldb/test/API/commands/process/launch-with-shellexpand/TestLaunchWithShellExpand.py
lldb/test/API/commands/register/register/register_command/TestRegisters.py
lldb/test/API/commands/target/create-deps/TestTargetCreateDeps.py

lldb/test/API/functionalities/breakpoint/breakpoint_callback_command_source/TestBreakpointCallbackCommandSource.py

lldb/test/API/functionalities/breakpoint/global_constructor/TestBreakpointInGlobalConstructor.py
lldb/test/API/functionalities/deleted-executable/TestDeletedExecutable.py

lldb/test/API/functionalities/dlopen_other_executable/TestDlopenOtherExecutable.py

lldb/test/API/functionalities/plugins/python_os_plugin/stepping_plugin_threads/TestOSPluginStepping.py
lldb/test/API/functionalities/return-value/TestReturnValue.py

lldb/test/API/functionalities/thread/create_after_attach/TestCreateAfterAttach.py

lldb/test/API/functionalities/thread/exit_during_expression/TestExitDuringExpression.py

lldb/test/API/functionalities/thread/state_after_expression/TestStateAfterExpression.py
lldb/test/API/lang/c/conflicting-symbol/TestConflictingSymbol.py
lldb/test/API/python_api/event/TestEvents.py
lldb/test/API/tools/lldb-server/TestGdbRemote_qThreadStopInfo.py
lldb/test/API/tools/lldb-server/TestLldbGdbServer.py
lldb/test/API/tools/lldb-server/register-reading/TestGdbRemoteGPacket.py
lldb/test/API/tools/lldb-vscode/breakpoint/TestVSCode_setBreakpoints.py
lldb/test/API/tools/lldb-vscode/launch/TestVSCode_launch.py

Removed: 




diff  --git a/lldb/test/API/api/multithreaded/TestMultithreaded.py 
b/lldb/test/API/api/multithreaded/TestMultithreaded.py
index 1dc44b9a9448..c6c75de386fa 100644
--- a/lldb/test/API/api/multithreaded/TestMultithreaded.py
+++ b/lldb/test/API/api/multithreaded/TestMultithreaded.py
@@ -31,7 +31,7 @@ def setUp(self):
 @skipIfNoSBHeaders
 # clang-cl does not support throw or catch (llvm.org/pr24538)
 @skipIfWindows
-@expectedFailureAll(oslist=['freebsd'])
+@expectedFailureAll(oslist=['freebsd'], bugnumber='llvm.org/pr48370')
 def test_python_stop_hook(self):
 """Test that you can run a python command in a stop-hook when stdin is 
File based. """
 self.build_and_test('driver.cpp test_stop-hook.cpp',

diff  --git 
a/lldb/test/API/commands/expression/multiline-navigation/TestMultilineNavigation.py
 
b/lldb/test/API/commands/expression/multiline-navigation/TestMultilineNavigation.py
index b932abab82a2..d95e69fc8aa5 100644
--- 
a/lldb/test/API/commands/expression/multiline-navigation/TestMultilineNavigation.py
+++ 
b/lldb/test/API/commands/expression/multiline-navigation/TestMultilineNavigation.py
@@ -18,7 +18,7 @@ class TestCase(PExpectTest):
 # under ASAN on a loaded machine..
 @skipIfAsan
 @skipIfEditlineSupportMissing
-@expectedFailureAll(oslist=['freebsd'])
+@expectedFailureAll(oslist=['freebsd'], bugnumber='llvm.org/pr48316')
 def test_nav_arrow_up(self):
 """Tests that we can navigate back to the previous line with the up 
arrow"""
 self.launch()
@@ -41,7 +41,7 @@ def test_nav_arrow_up(self):
 
 @skipIfAsan
 @skipIfEditlineSupportMissing
-@expectedFailureAll(oslist=['freebsd'])
+@expectedFailureAll(oslist=['freebsd'], bugnumber='llvm.org/pr48316')
 def test_nav_arrow_down(self):
 """Tests that we can navigate to the next line with the down arrow"""
 self.launch()

diff  --git 
a/lldb/test/API/commands/process/launch-with-shellexpand/TestLaunchWithShellExpand.py
 
b/lldb/test/API/commands/process/launch-with-shellexpand/TestLaunchWithShellExpand.py
index 9ade3dba12c5..ca0990ed47e9 100644
--- 
a/lldb/test/API/commands/process/launch-with-shellexpand/TestLaunchWithShellExpand.py
+++ 
b/lldb/test/API/commands/process/launch-with-shellexpand/TestLaunchWithShellExpand.py
@@ -20,7 +20,7 @@ class LaunchWithShellExpandTestCase(TestBase):
 "windows",
 "linux",
 "freebsd"],
-bugnumber="llvm.org/pr24778 llvm.org/pr22627")
+bugnumber="llvm.org/pr24778 llvm.org/pr22627 llvm.org/pr48349")
 @skipIfDarwinEmbedded # iOS etc don't launch the binary via a shell, so 
arg expansion won't happen
 @expectedFailureNetBSD
 def test(self):

diff  --git 
a/lldb/test/API/commands/register/re

[llvm-branch-commits] [lldb] 09b0883 - [lldb] [POSIX-DYLD] Add libraries from initial eTakeSnapshot action

[Michał Górny via llvm-branch-commits]

Author: Michał Górny
Date: 2020-12-07T09:56:51+01:00
New Revision: 09b08833f301ea375137931d26b7193101f82ceb

URL: 
https://github.com/llvm/llvm-project/commit/09b08833f301ea375137931d26b7193101f82ceb
DIFF: 
https://github.com/llvm/llvm-project/commit/09b08833f301ea375137931d26b7193101f82ceb.diff

LOG: [lldb] [POSIX-DYLD] Add libraries from initial eTakeSnapshot action

Explicitly consider the libraries reported on the initial eTakeSnapshot
action added, through adding them to the added soentry list
in DYLDRendezvous::SaveSOEntriesFromRemote().  This is necessary
on FreeBSD since the dynamic loader issues only a single 'consistent'
state rendezvous breakpoint hit for all the libraries present
in DT_NEEDED (while Linux issues an added-consistent event pair).

Reenable memory maps on FreeBSD since this fixed the issue triggered
by them.

Differential Revision: https://reviews.llvm.org/D92187

Added: 


Modified: 
lldb/source/Plugins/DynamicLoader/POSIX-DYLD/DYLDRendezvous.cpp
lldb/source/Plugins/Process/FreeBSDRemote/NativeProcessFreeBSD.cpp
lldb/test/API/api/multithreaded/TestMultithreaded.py

lldb/test/API/functionalities/breakpoint/global_constructor/TestBreakpointInGlobalConstructor.py
lldb/test/API/functionalities/memory-region/TestMemoryRegion.py
lldb/test/API/tools/lldb-server/TestLldbGdbServer.py

lldb/test/API/tools/lldb-server/libraries-svr4/TestGdbRemoteLibrariesSvr4Support.py
lldb/test/Shell/Unwind/thread-step-out-ret-addr-check.test

Removed: 




diff  --git a/lldb/source/Plugins/DynamicLoader/POSIX-DYLD/DYLDRendezvous.cpp 
b/lldb/source/Plugins/DynamicLoader/POSIX-DYLD/DYLDRendezvous.cpp
index 15b3805003a5..c06d640c654c 100644
--- a/lldb/source/Plugins/DynamicLoader/POSIX-DYLD/DYLDRendezvous.cpp
+++ b/lldb/source/Plugins/DynamicLoader/POSIX-DYLD/DYLDRendezvous.cpp
@@ -295,8 +295,15 @@ bool DYLDRendezvous::SaveSOEntriesFromRemote(
   return false;
 
 // Only add shared libraries and not the executable.
-if (!SOEntryIsMainExecutable(entry))
+if (!SOEntryIsMainExecutable(entry)) {
   m_soentries.push_back(entry);
+  // This function is called only once, at the very beginning
+  // of the program.  Make sure to add all soentries that are
+  // already present at this point.  This is necessary to cover
+  // DT_NEEDED on FreeBSD since (unlike Linux) it does not report
+  // loading these libraries separately.
+  m_added_soentries.push_back(entry);
+}
   }
 
   m_loaded_modules = module_list;

diff  --git 
a/lldb/source/Plugins/Process/FreeBSDRemote/NativeProcessFreeBSD.cpp 
b/lldb/source/Plugins/Process/FreeBSDRemote/NativeProcessFreeBSD.cpp
index fd3c05ab411e..b8ddd1a013e3 100644
--- a/lldb/source/Plugins/Process/FreeBSDRemote/NativeProcessFreeBSD.cpp
+++ b/lldb/source/Plugins/Process/FreeBSDRemote/NativeProcessFreeBSD.cpp
@@ -485,9 +485,6 @@ Status NativeProcessFreeBSD::Kill() {
 Status NativeProcessFreeBSD::GetMemoryRegionInfo(lldb::addr_t load_addr,
  MemoryRegionInfo &range_info) 
{
 
-  // TODO: figure out why it breaks stuff
-  return Status("currently breaks determining module list");
-
   if (m_supports_mem_region == LazyBool::eLazyBoolNo) {
 // We're done.
 return Status("unsupported");

diff  --git a/lldb/test/API/api/multithreaded/TestMultithreaded.py 
b/lldb/test/API/api/multithreaded/TestMultithreaded.py
index c6c75de386fa..60c2c3b372cb 100644
--- a/lldb/test/API/api/multithreaded/TestMultithreaded.py
+++ b/lldb/test/API/api/multithreaded/TestMultithreaded.py
@@ -31,7 +31,6 @@ def setUp(self):
 @skipIfNoSBHeaders
 # clang-cl does not support throw or catch (llvm.org/pr24538)
 @skipIfWindows
-@expectedFailureAll(oslist=['freebsd'], bugnumber='llvm.org/pr48370')
 def test_python_stop_hook(self):
 """Test that you can run a python command in a stop-hook when stdin is 
File based. """
 self.build_and_test('driver.cpp test_stop-hook.cpp',

diff  --git 
a/lldb/test/API/functionalities/breakpoint/global_constructor/TestBreakpointInGlobalConstructor.py
 
b/lldb/test/API/functionalities/breakpoint/global_constructor/TestBreakpointInGlobalConstructor.py
index 81c3798ebba7..4439607d91cf 100644
--- 
a/lldb/test/API/functionalities/breakpoint/global_constructor/TestBreakpointInGlobalConstructor.py
+++ 
b/lldb/test/API/functionalities/breakpoint/global_constructor/TestBreakpointInGlobalConstructor.py
@@ -15,7 +15,6 @@ class TestBreakpointInGlobalConstructors(TestBase):
 mydir = TestBase.compute_mydir(__file__)
 NO_DEBUG_INFO_TESTCASE = True
 
-@expectedFailureAll(oslist=["freebsd"], bugnumber='llvm.org/pr48373')
 @expectedFailureNetBSD
 def test(self):
 self.build()

diff  --git a/lldb/test/API/functionalities/memory-region/TestMemoryRegion.py 
b/lldb/test/API/functionalities/memory-region/TestMemoryRegion.py
index 

[llvm-branch-commits] [lldb] 276638e - [lldb] [Process/FreeBSDRemote] Implement GetLoadedModuleFileSpec() and GetFileLoadAddress()

[Michał Górny via llvm-branch-commits]

Author: Michał Górny
Date: 2020-12-07T09:56:51+01:00
New Revision: 276638ecaf226a9931c55e835f18b592bdfbea86

URL: 
https://github.com/llvm/llvm-project/commit/276638ecaf226a9931c55e835f18b592bdfbea86
DIFF: 
https://github.com/llvm/llvm-project/commit/276638ecaf226a9931c55e835f18b592bdfbea86.diff

LOG: [lldb] [Process/FreeBSDRemote] Implement GetLoadedModuleFileSpec() and 
GetFileLoadAddress()

Copy the Linux implementation of GetLoadedModuleFileSpec()
and GetFileLoadAddress() into NativeProcessFreeBSD.  This does not seem
to change anything at the moment but reducing the differences between
the plugins should help us in the long term.

Differential Revision: https://reviews.llvm.org/D92314

Added: 


Modified: 
lldb/source/Plugins/Process/FreeBSDRemote/NativeProcessFreeBSD.cpp
lldb/source/Plugins/Process/FreeBSDRemote/NativeProcessFreeBSD.h

Removed: 




diff  --git 
a/lldb/source/Plugins/Process/FreeBSDRemote/NativeProcessFreeBSD.cpp 
b/lldb/source/Plugins/Process/FreeBSDRemote/NativeProcessFreeBSD.cpp
index b8ddd1a013e3..163093c2ab1f 100644
--- a/lldb/source/Plugins/Process/FreeBSDRemote/NativeProcessFreeBSD.cpp
+++ b/lldb/source/Plugins/Process/FreeBSDRemote/NativeProcessFreeBSD.cpp
@@ -630,14 +630,40 @@ Status NativeProcessFreeBSD::SetBreakpoint(lldb::addr_t 
addr, uint32_t size,
 
 Status NativeProcessFreeBSD::GetLoadedModuleFileSpec(const char *module_path,
  FileSpec &file_spec) {
-  return Status("Unimplemented");
+  Status error = PopulateMemoryRegionCache();
+  if (error.Fail())
+return error;
+
+  FileSpec module_file_spec(module_path);
+  FileSystem::Instance().Resolve(module_file_spec);
+
+  file_spec.Clear();
+  for (const auto &it : m_mem_region_cache) {
+if (it.second.GetFilename() == module_file_spec.GetFilename()) {
+  file_spec = it.second;
+  return Status();
+}
+  }
+  return Status("Module file (%s) not found in process' memory map!",
+module_file_spec.GetFilename().AsCString());
 }
 
 Status
 NativeProcessFreeBSD::GetFileLoadAddress(const llvm::StringRef &file_name,
  lldb::addr_t &load_addr) {
   load_addr = LLDB_INVALID_ADDRESS;
-  return Status();
+  Status error = PopulateMemoryRegionCache();
+  if (error.Fail())
+return error;
+
+  FileSpec file(file_name);
+  for (const auto &it : m_mem_region_cache) {
+if (it.second == file) {
+  load_addr = it.first.GetRange().GetRangeBase();
+  return Status();
+}
+  }
+  return Status("No load address found for file %s.", file_name.str().c_str());
 }
 
 void NativeProcessFreeBSD::SigchldHandler() {

diff  --git a/lldb/source/Plugins/Process/FreeBSDRemote/NativeProcessFreeBSD.h 
b/lldb/source/Plugins/Process/FreeBSDRemote/NativeProcessFreeBSD.h
index 4b6e9af140d0..3c7a9400f9c4 100644
--- a/lldb/source/Plugins/Process/FreeBSDRemote/NativeProcessFreeBSD.h
+++ b/lldb/source/Plugins/Process/FreeBSDRemote/NativeProcessFreeBSD.h
@@ -67,9 +67,13 @@ class NativeProcessFreeBSD : public NativeProcessELF {
   Status SetBreakpoint(lldb::addr_t addr, uint32_t size,
bool hardware) override;
 
+  // The two following methods are probably not necessary and probably
+  // will never be called.  Nevertheless, we implement them right now
+  // to reduce the 
diff erences between 
diff erent platforms and reduce
+  // the risk of the lack of implementation actually breaking something,
+  // at least for the time being.
   Status GetLoadedModuleFileSpec(const char *module_path,
  FileSpec &file_spec) override;
-
   Status GetFileLoadAddress(const llvm::StringRef &file_name,
 lldb::addr_t &load_addr) override;
 



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[llvm-branch-commits] [lldb] 1a1cc0b - [lldb] [Platform/POSIX] Use gdb-remote plugin when attaching

[Michał Górny via llvm-branch-commits]

Author: Michał Górny
Date: 2020-12-07T09:56:51+01:00
New Revision: 1a1cc0ba7db549025ab1a504633ae4554042fd60

URL: 
https://github.com/llvm/llvm-project/commit/1a1cc0ba7db549025ab1a504633ae4554042fd60
DIFF: 
https://github.com/llvm/llvm-project/commit/1a1cc0ba7db549025ab1a504633ae4554042fd60.diff

LOG: [lldb] [Platform/POSIX] Use gdb-remote plugin when attaching

Force gdb-remote plugin when attaching using the derivatives
of PlatformPOSIX class.  This is consistent with the behavior
for launching processes (via DebugProcess() method) and guarantees
consistent plugin choice on FreeBSD.

Differential Revision: https://reviews.llvm.org/D92667

Added: 


Modified: 
lldb/source/Plugins/Platform/POSIX/PlatformPOSIX.cpp
lldb/test/API/commands/process/attach-resume/TestAttachResume.py
lldb/test/API/functionalities/deleted-executable/TestDeletedExecutable.py

Removed: 




diff  --git a/lldb/source/Plugins/Platform/POSIX/PlatformPOSIX.cpp 
b/lldb/source/Plugins/Platform/POSIX/PlatformPOSIX.cpp
index f717eaa2b47d..cad5a803ec2e 100644
--- a/lldb/source/Plugins/Platform/POSIX/PlatformPOSIX.cpp
+++ b/lldb/source/Plugins/Platform/POSIX/PlatformPOSIX.cpp
@@ -388,8 +388,7 @@ lldb::ProcessSP PlatformPOSIX::Attach(ProcessAttachInfo 
&attach_info,
 
   process_sp =
   target->CreateProcess(attach_info.GetListenerForProcess(debugger),
-attach_info.GetProcessPluginName(), nullptr,
-false);
+"gdb-remote", nullptr, true);
 
   if (process_sp) {
 ListenerSP listener_sp = attach_info.GetHijackListener();

diff  --git a/lldb/test/API/commands/process/attach-resume/TestAttachResume.py 
b/lldb/test/API/commands/process/attach-resume/TestAttachResume.py
index ff1bb8c6921d..a73b6566c747 100644
--- a/lldb/test/API/commands/process/attach-resume/TestAttachResume.py
+++ b/lldb/test/API/commands/process/attach-resume/TestAttachResume.py
@@ -18,7 +18,6 @@ class AttachResumeTestCase(TestBase):
 NO_DEBUG_INFO_TESTCASE = True
 
 @skipIfRemote
-@expectedFailureAll(oslist=['freebsd'], bugnumber='llvm.org/pr19310')
 @expectedFailureNetBSD
 @skipIfWindows # llvm.org/pr24778, llvm.org/pr21753
 @skipIfReproducer # FIXME: Unexpected packet during (active) replay

diff  --git 
a/lldb/test/API/functionalities/deleted-executable/TestDeletedExecutable.py 
b/lldb/test/API/functionalities/deleted-executable/TestDeletedExecutable.py
index 10edae860ed4..51681d65d210 100644
--- a/lldb/test/API/functionalities/deleted-executable/TestDeletedExecutable.py
+++ b/lldb/test/API/functionalities/deleted-executable/TestDeletedExecutable.py
@@ -19,7 +19,6 @@ class TestDeletedExecutable(TestBase):
 @expectedFailureAll(oslist=["linux"],
 triple=no_match('aarch64-.*-android'))
 # determining the architecture of the process fails
-@expectedFailureAll(oslist=["freebsd"], bugnumber="llvm.org/pr48374")
 @skipIfReproducer # File synchronization is not supported during replay.
 def test(self):
 self.build()



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[llvm-branch-commits] [lldb] 77f0ea4 - [lldb] [test] Fix continue_to_breakpoint() args in TestThreadStepOut

[Michał Górny via llvm-branch-commits]

Author: Michał Górny
Date: 2020-12-07T09:56:51+01:00
New Revision: 77f0ea4b5b978c7caa0788ae8b1a2429089021bd

URL: 
https://github.com/llvm/llvm-project/commit/77f0ea4b5b978c7caa0788ae8b1a2429089021bd
DIFF: 
https://github.com/llvm/llvm-project/commit/77f0ea4b5b978c7caa0788ae8b1a2429089021bd.diff

LOG: [lldb] [test] Fix continue_to_breakpoint() args in TestThreadStepOut

The test is skipped/xfailing on all platforms, so it seems that the API
got out of sync.  Fix that so it returns to a 'proper' failure
on FreeBSD.

Differential Revision: https://reviews.llvm.org/D92746

Added: 


Modified: 
lldb/test/API/functionalities/thread/step_out/TestThreadStepOut.py

Removed: 




diff  --git 
a/lldb/test/API/functionalities/thread/step_out/TestThreadStepOut.py 
b/lldb/test/API/functionalities/thread/step_out/TestThreadStepOut.py
index eb2d264ec2e3..e273cc4be31b 100644
--- a/lldb/test/API/functionalities/thread/step_out/TestThreadStepOut.py
+++ b/lldb/test/API/functionalities/thread/step_out/TestThreadStepOut.py
@@ -145,7 +145,8 @@ def step_out_test(self, step_out_func):
 if len(breakpoint_threads) == 1:
 success = thread.Suspend()
 self.assertTrue(success, "Couldn't suspend a thread")
-bkpt_threads = lldbutil.continue_to_breakpoint(bkpt)
+bkpt_threads = 
lldbutil.continue_to_breakpoint(self.inferior_process,
+   bkpt)
 self.assertEqual(len(bkpt_threads), 1, "Second thread stopped")
 success = thread.Resume()
 self.assertTrue(success, "Couldn't resume a thread")



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[llvm-branch-commits] [llvm] 7d04e70 - [Lit] Fix flaky test on heavily loaded bots

[Oliver Stannard via llvm-branch-commits]

Author: Oliver Stannard
Date: 2020-12-07T09:05:55Z
New Revision: 7d04e70627aa0734ce820bec0dcb7fa28a9ea457

URL: 
https://github.com/llvm/llvm-project/commit/7d04e70627aa0734ce820bec0dcb7fa28a9ea457
DIFF: 
https://github.com/llvm/llvm-project/commit/7d04e70627aa0734ce820bec0dcb7fa28a9ea457.diff

LOG: [Lit] Fix flaky test on heavily loaded bots

On some of the slow or heavily-loaded bots, this test was failing
intermittently because the infinite_loop.py script might not emit
anything to stdout before the 1 second timeout, so the "Command Output"
line isn't present in the output. That output isn't really important to
this test, we just care that the process is killed, so we can just rmove
that check line from  the test.

Differential revision: https://reviews.llvm.org/D92563

Added: 


Modified: 
llvm/utils/lit/tests/shtest-timeout.py

Removed: 




diff  --git a/llvm/utils/lit/tests/shtest-timeout.py 
b/llvm/utils/lit/tests/shtest-timeout.py
index 558aca5f05bf..f229c286088b 100644
--- a/llvm/utils/lit/tests/shtest-timeout.py
+++ b/llvm/utils/lit/tests/shtest-timeout.py
@@ -42,7 +42,6 @@
 
 # CHECK-OUT-COMMON: TIMEOUT: per_test_timeout :: infinite_loop.py
 # CHECK-OUT-COMMON: Timeout: Reached timeout of 1 seconds
-# CHECK-OUT-COMMON: Command {{([0-9]+ )?}}Output
 # CHECK-OUT-COMMON: Timed Out: 1
 
 



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[llvm-branch-commits] [clang] 275592e - Provide default location of sysroot for Baremetal toolchain.

[Hafiz Abid Qadeer via llvm-branch-commits]

Author: Hafiz Abid Qadeer
Date: 2020-12-07T09:19:52Z
New Revision: 275592e714130345a481a5cb889c89b73a98614f

URL: 
https://github.com/llvm/llvm-project/commit/275592e714130345a481a5cb889c89b73a98614f
DIFF: 
https://github.com/llvm/llvm-project/commit/275592e714130345a481a5cb889c89b73a98614f.diff

LOG: Provide default location of sysroot for Baremetal  toolchain.

Currently, Baremetal toolchain requires user to pass a sysroot location
using a --sysroot flag. This is not very convenient for the user. It also
creates problem for toolchain vendors who don't have a fixed location to
put the sysroot bits.

Clang does provide 'DEFAULT_SYSROOT' which can be used by the toolchain
builder to provide the default location. But it does not work if toolchain
is targeting multiple targets e.g. arm-none-eabi/riscv64-unknown-elf which
clang is capable of doing.

This patch tries to solve this problem by providing a default location of
the toolchain if user does not explicitly provides --sysroot. The exact
location and name can be different but it should fulfill these conditions:

1. The sysroot path should have a target triple element so that multi-target
toolchain problem (as I described above) could be addressed.

2. The location should not be $TOP/$Triple as this is used by gcc generally
and will be a problem for installing both gcc and clang based toolchain at
the same location.

Reviewed By: jroelofs

Differential Revision: https://reviews.llvm.org/D92677

Added: 
clang/test/Driver/baremetal-sysroot.cpp

Modified: 
clang/lib/Driver/ToolChains/BareMetal.cpp
clang/lib/Driver/ToolChains/BareMetal.h

Removed: 




diff  --git a/clang/lib/Driver/ToolChains/BareMetal.cpp 
b/clang/lib/Driver/ToolChains/BareMetal.cpp
index 20ffd4b2cd57..7429c822b7e9 100644
--- a/clang/lib/Driver/ToolChains/BareMetal.cpp
+++ b/clang/lib/Driver/ToolChains/BareMetal.cpp
@@ -33,7 +33,7 @@ BareMetal::BareMetal(const Driver &D, const llvm::Triple 
&Triple,
   getProgramPaths().push_back(getDriver().getInstalledDir());
   if (getDriver().getInstalledDir() != getDriver().Dir)
 getProgramPaths().push_back(getDriver().Dir);
-  SmallString<128> SysRoot(getDriver().SysRoot);
+  SmallString<128> SysRoot(computeSysRoot());
   if (!SysRoot.empty()) {
 llvm::sys::path::append(SysRoot, "lib");
 getFilePaths().push_back(std::string(SysRoot));
@@ -94,6 +94,17 @@ std::string BareMetal::getRuntimesDir() const {
   return std::string(Dir.str());
 }
 
+std::string BareMetal::computeSysRoot() const {
+  if (!getDriver().SysRoot.empty())
+return getDriver().SysRoot;
+
+  SmallString<128> SysRootDir;
+  llvm::sys::path::append(SysRootDir, getDriver().Dir, "../lib/clang-runtimes",
+  getDriver().getTargetTriple());
+
+  return std::string(SysRootDir);
+}
+
 void BareMetal::AddClangSystemIncludeArgs(const ArgList &DriverArgs,
   ArgStringList &CC1Args) const {
   if (DriverArgs.hasArg(options::OPT_nostdinc))
@@ -106,7 +117,7 @@ void BareMetal::AddClangSystemIncludeArgs(const ArgList 
&DriverArgs,
   }
 
   if (!DriverArgs.hasArg(options::OPT_nostdlibinc)) {
-SmallString<128> Dir(getDriver().SysRoot);
+SmallString<128> Dir(computeSysRoot());
 if (!Dir.empty()) {
   llvm::sys::path::append(Dir, "include");
   addSystemInclude(DriverArgs, CC1Args, Dir.str());
@@ -127,7 +138,7 @@ void BareMetal::AddClangCXXStdlibIncludeArgs(
   DriverArgs.hasArg(options::OPT_nostdincxx))
 return;
 
-  StringRef SysRoot = getDriver().SysRoot;
+  std::string SysRoot(computeSysRoot());
   if (SysRoot.empty())
 return;
 

diff  --git a/clang/lib/Driver/ToolChains/BareMetal.h 
b/clang/lib/Driver/ToolChains/BareMetal.h
index 0be9377134ce..3f4fadf8a7c3 100644
--- a/clang/lib/Driver/ToolChains/BareMetal.h
+++ b/clang/lib/Driver/ToolChains/BareMetal.h
@@ -67,6 +67,7 @@ class LLVM_LIBRARY_VISIBILITY BareMetal : public ToolChain {
llvm::opt::ArgStringList &CmdArgs) const override;
   void AddLinkRuntimeLib(const llvm::opt::ArgList &Args,
  llvm::opt::ArgStringList &CmdArgs) const;
+  std::string computeSysRoot() const override;
 };
 
 } // namespace toolchains

diff  --git a/clang/test/Driver/baremetal-sysroot.cpp 
b/clang/test/Driver/baremetal-sysroot.cpp
new file mode 100644
index ..ae174e01417e
--- /dev/null
+++ b/clang/test/Driver/baremetal-sysroot.cpp
@@ -0,0 +1,22 @@
+// REQUIRES: shell
+// UNSUPPORTED: system-windows
+
+// Test that when a --sysroot is not provided, driver picks the default
+// location correctly if available.
+
+// RUN: rm -rf %T/baremetal_default_sysroot
+// RUN: mkdir -p %T/baremetal_default_sysroot/bin
+// RUN: mkdir -p 
%T/baremetal_default_sysroot/lib/clang-runtimes/armv6m-none-eabi
+// RUN: ln -s %clang %T/baremetal_default_sysroot/bin/clang
+
+// RUN: %T/baremetal_default_sysroot/bin/clang -no-canonica

[llvm-branch-commits] [clang-tools-extra] 1df0677 - [clangd] Add language metrics for recovery AST usage.

[Haojian Wu via llvm-branch-commits]

Author: Haojian Wu
Date: 2020-12-07T10:52:05+01:00
New Revision: 1df0677e6ac65e18da54b1dd5c391bf17a4c2737

URL: 
https://github.com/llvm/llvm-project/commit/1df0677e6ac65e18da54b1dd5c391bf17a4c2737
DIFF: 
https://github.com/llvm/llvm-project/commit/1df0677e6ac65e18da54b1dd5c391bf17a4c2737.diff

LOG: [clangd] Add language metrics for recovery AST usage.

Differential Revision: https://reviews.llvm.org/D92157

Added: 


Modified: 
clang-tools-extra/clangd/Selection.cpp
clang-tools-extra/clangd/unittests/SelectionTests.cpp

Removed: 




diff  --git a/clang-tools-extra/clangd/Selection.cpp 
b/clang-tools-extra/clangd/Selection.cpp
index fbd72be320a7..9f84b4729182 100644
--- a/clang-tools-extra/clangd/Selection.cpp
+++ b/clang-tools-extra/clangd/Selection.cpp
@@ -38,21 +38,24 @@ using Node = SelectionTree::Node;
 using ast_type_traits::DynTypedNode;
 
 // Measure the fraction of selections that were enabled by recovery AST.
-void recordMetrics(const SelectionTree &S) {
+void recordMetrics(const SelectionTree &S, const LangOptions &Lang) {
+  if (!trace::enabled())
+return;
+  const char *LanguageLabel = Lang.CPlusPlus ? "C++" : Lang.ObjC ? "ObjC" : 
"C";
   static constexpr trace::Metric SelectionUsedRecovery(
-  "selection_recovery", trace::Metric::Distribution);
-  static constexpr trace::Metric RecoveryType("selection_recovery_type",
-  trace::Metric::Distribution);
+  "selection_recovery", trace::Metric::Distribution, "language");
+  static constexpr trace::Metric RecoveryType(
+  "selection_recovery_type", trace::Metric::Distribution, "language");
   const auto *Common = S.commonAncestor();
   for (const auto *N = Common; N; N = N->Parent) {
 if (const auto *RE = N->ASTNode.get()) {
-  SelectionUsedRecovery.record(1); // used recovery ast.
-  RecoveryType.record(RE->isTypeDependent() ? 0 : 1);
+  SelectionUsedRecovery.record(1, LanguageLabel); // used recovery ast.
+  RecoveryType.record(RE->isTypeDependent() ? 0 : 1, LanguageLabel);
   return;
 }
   }
   if (Common)
-SelectionUsedRecovery.record(0); // unused.
+SelectionUsedRecovery.record(0, LanguageLabel); // unused.
 }
 
 // An IntervalSet maintains a set of disjoint subranges of an array.
@@ -834,7 +837,7 @@ SelectionTree::SelectionTree(ASTContext &AST, const 
syntax::TokenBuffer &Tokens,
.printToString(SM));
   Nodes = SelectionVisitor::collect(AST, Tokens, PrintPolicy, Begin, End, FID);
   Root = Nodes.empty() ? nullptr : &Nodes.front();
-  recordMetrics(*this);
+  recordMetrics(*this, AST.getLangOpts());
   dlog("Built selection tree\n{0}", *this);
 }
 

diff  --git a/clang-tools-extra/clangd/unittests/SelectionTests.cpp 
b/clang-tools-extra/clangd/unittests/SelectionTests.cpp
index 55b05ebe11ab..efe06383b04a 100644
--- a/clang-tools-extra/clangd/unittests/SelectionTests.cpp
+++ b/clang-tools-extra/clangd/unittests/SelectionTests.cpp
@@ -18,6 +18,7 @@
 namespace clang {
 namespace clangd {
 namespace {
+using ::testing::ElementsAreArray;
 using ::testing::UnorderedElementsAreArray;
 
 // Create a selection tree corresponding to a point or pair of points.
@@ -452,7 +453,8 @@ TEST(SelectionTest, CommonAncestor) {
 if (Test.ranges().empty()) {
   // If no [[range]] is marked in the example, there should be no 
selection.
   EXPECT_FALSE(T.commonAncestor()) << C.Code << "\n" << T;
-  EXPECT_THAT(Tracer.takeMetric("selection_recovery"), testing::IsEmpty());
+  EXPECT_THAT(Tracer.takeMetric("selection_recovery", "C++"),
+  testing::IsEmpty());
 } else {
   // If there is an expected selection, common ancestor should exist
   // with the appropriate node type.
@@ -468,8 +470,8 @@ TEST(SelectionTest, CommonAncestor) {
   // and no nodes outside it are selected.
   EXPECT_TRUE(verifyCommonAncestor(T.root(), T.commonAncestor(), C.Code))
   << C.Code;
-  EXPECT_THAT(Tracer.takeMetric("selection_recovery"),
-  testing::ElementsAreArray({0}));
+  EXPECT_THAT(Tracer.takeMetric("selection_recovery", "C++"),
+  ElementsAreArray({0}));
 }
   }
 }
@@ -494,10 +496,10 @@ TEST(SelectionTree, Metrics) {
   auto AST = TestTU::withCode(Annotations(Code).code()).build();
   trace::TestTracer Tracer;
   auto T = makeSelectionTree(Code, AST);
-  EXPECT_THAT(Tracer.takeMetric("selection_recovery"),
-  testing::ElementsAreArray({1}));
-  EXPECT_THAT(Tracer.takeMetric("selection_recovery_type"),
-  testing::ElementsAreArray({1}));
+  EXPECT_THAT(Tracer.takeMetric("selection_recovery", "C++"),
+  ElementsAreArray({1}));
+  EXPECT_THAT(Tracer.takeMetric("selection_recovery_type", "C++"),
+  ElementsAreArray({1}));
 }
 
 // FIXME: Doesn't select the binary operator node in



__

[llvm-branch-commits] [clang-tools-extra] fed9af2 - [clangd] Publish config file errors over LSP

[Sam McCall via llvm-branch-commits]

Author: Sam McCall
Date: 2020-12-07T11:07:32+01:00
New Revision: fed9af29c2b5f289744254390c7372e8871e45e5

URL: 
https://github.com/llvm/llvm-project/commit/fed9af29c2b5f289744254390c7372e8871e45e5
DIFF: 
https://github.com/llvm/llvm-project/commit/fed9af29c2b5f289744254390c7372e8871e45e5.diff

LOG: [clangd] Publish config file errors over LSP

We don't act as a language server for these files (e.g. don't get open/close
notifications for them), but just blindly publish diagnostics for them.

This works reasonably well in coc.nvim and vscode: they show up in the
workspace diagnostic list and when you open the file.
The only update after the file is reparsed, not as you type which is a bit
janky, but seems a lot better than nothing.

Fixes https://github.com/clangd/clangd/issues/614

Differential Revision: https://reviews.llvm.org/D92704

Added: 
clang-tools-extra/clangd/test/config.test

Modified: 
clang-tools-extra/clangd/ClangdServer.cpp
clang-tools-extra/clangd/ClangdServer.h
clang-tools-extra/clangd/ConfigProvider.h
clang-tools-extra/clangd/ConfigYAML.cpp
clang-tools-extra/clangd/Diagnostics.cpp
clang-tools-extra/clangd/Diagnostics.h
clang-tools-extra/clangd/unittests/ConfigProviderTests.cpp
clang-tools-extra/clangd/unittests/ConfigTesting.h
clang-tools-extra/clangd/unittests/ConfigYAMLTests.cpp

Removed: 




diff  --git a/clang-tools-extra/clangd/ClangdServer.cpp 
b/clang-tools-extra/clangd/ClangdServer.cpp
index aa19a9485e17..8b0d0591abe7 100644
--- a/clang-tools-extra/clangd/ClangdServer.cpp
+++ b/clang-tools-extra/clangd/ClangdServer.cpp
@@ -139,7 +139,7 @@ ClangdServer::Options::operator TUScheduler::Options() 
const {
 ClangdServer::ClangdServer(const GlobalCompilationDatabase &CDB,
const ThreadsafeFS &TFS, const Options &Opts,
Callbacks *Callbacks)
-: ConfigProvider(Opts.ConfigProvider), TFS(TFS),
+: ConfigProvider(Opts.ConfigProvider), TFS(TFS), 
ServerCallbacks(Callbacks),
   DynamicIdx(Opts.BuildDynamicSymbolIndex
  ? new FileIndex(Opts.HeavyweightDynamicSymbolIndex,
  Opts.CollectMainFileRefs)
@@ -829,16 +829,44 @@ Context ClangdServer::createProcessingContext(PathRef 
File) const {
 Params.Path = PosixPath.str();
   }
 
-  auto DiagnosticHandler = [](const llvm::SMDiagnostic &Diag) {
-if (Diag.getKind() == llvm::SourceMgr::DK_Error) {
-  elog("config error at {0}:{1}:{2}: {3}", Diag.getFilename(),
-   Diag.getLineNo(), Diag.getColumnNo(), Diag.getMessage());
-} else {
-  log("config warning at {0}:{1}:{2}: {3}", Diag.getFilename(),
-  Diag.getLineNo(), Diag.getColumnNo(), Diag.getMessage());
+  llvm::StringMap> ReportableDiagnostics;
+  auto ConfigDiagnosticHandler = [&](const llvm::SMDiagnostic &D) {
+// Ensure we create the map entry even for note diagnostics we don't 
report.
+// This means that when the file is parsed with no warnings, we'll
+// publish an empty set of diagnostics, clearing any the client has.
+auto *Reportable = D.getFilename().empty()
+   ? nullptr
+   : &ReportableDiagnostics[D.getFilename()];
+switch (D.getKind()) {
+case llvm::SourceMgr::DK_Error:
+  elog("config error at {0}:{1}:{2}: {3}", D.getFilename(), D.getLineNo(),
+   D.getColumnNo(), D.getMessage());
+  if (Reportable)
+Reportable->push_back(toDiag(D, Diag::ClangdConfig));
+  break;
+case llvm::SourceMgr::DK_Warning:
+  log("config warning at {0}:{1}:{2}: {3}", D.getFilename(), D.getLineNo(),
+  D.getColumnNo(), D.getMessage());
+  if (Reportable)
+Reportable->push_back(toDiag(D, Diag::ClangdConfig));
+  break;
+case llvm::SourceMgr::DK_Note:
+case llvm::SourceMgr::DK_Remark:
+  vlog("config note at {0}:{1}:{2}: {3}", D.getFilename(), D.getLineNo(),
+   D.getColumnNo(), D.getMessage());
+  break;
 }
   };
-  Config C = ConfigProvider->getConfig(Params, DiagnosticHandler);
+  Config C = ConfigProvider->getConfig(Params, ConfigDiagnosticHandler);
+  // Blindly publish diagnostics for the (unopened) parsed config files.
+  // We must avoid reporting diagnostics for *the same file* concurrently.
+  // Source file diags are published elsewhere, but those are 
diff erent files.
+  if (!ReportableDiagnostics.empty()) {
+std::lock_guard Lock(ConfigDiagnosticsMu);
+for (auto &Entry : ReportableDiagnostics)
+  ServerCallbacks->onDiagnosticsReady(Entry.first(), /*Version=*/"",
+  std::move(Entry.second));
+  }
   return Context::current().derive(Config::Key, std::move(C));
 }
 

diff  --git a/clang-tools-extra/clangd/ClangdServer.h 
b/clang-tools-extra/clangd/ClangdServer.h
index 35ba4686cc9a..ff2fc8578103 100644
--- a/clang-tool

[llvm-branch-commits] [lldb] cf884c1 - [lldb] [test] Remove duplicate xfail for Testtypedef

[Michał Górny via llvm-branch-commits]

Author: Michał Górny
Date: 2020-12-07T11:22:06+01:00
New Revision: cf884c1035c79973e7297fcd13495b78e00ef919

URL: 
https://github.com/llvm/llvm-project/commit/cf884c1035c79973e7297fcd13495b78e00ef919
DIFF: 
https://github.com/llvm/llvm-project/commit/cf884c1035c79973e7297fcd13495b78e00ef919.diff

LOG: [lldb] [test] Remove duplicate xfail for Testtypedef

The @expectedFailureAll(compiler="clang") decorator works correctly
on FreeBSD these days, so it is sufficient.

Added: 


Modified: 
lldb/test/API/lang/c/typedef/Testtypedef.py

Removed: 




diff  --git a/lldb/test/API/lang/c/typedef/Testtypedef.py 
b/lldb/test/API/lang/c/typedef/Testtypedef.py
index cbbb6362381e..29a3c5af9e4a 100644
--- a/lldb/test/API/lang/c/typedef/Testtypedef.py
+++ b/lldb/test/API/lang/c/typedef/Testtypedef.py
@@ -13,9 +13,6 @@ class TypedefTestCase(TestBase):
 mydir = TestBase.compute_mydir(__file__)
 
 @expectedFailureAll(compiler="clang", bugnumber="llvm.org/pr19238")
-@expectedFailureAll(
-oslist=["freebsd"],
-bugnumber="llvm.org/pr25626 expectedFailureClang fails on FreeBSD")
 def test_typedef(self):
 """Test 'image lookup -t a' and check for correct display at 
diff erent scopes."""
 self.build()



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[llvm-branch-commits] [clang] 6bf29db - [PowerPC] [Clang] Enable float128 feature on P9 by default

[Qiu Chaofan via llvm-branch-commits]

Author: Qiu Chaofan
Date: 2020-12-07T18:31:00+08:00
New Revision: 6bf29dbb1541aff717e52b5c5fb12b84f5b38f21

URL: 
https://github.com/llvm/llvm-project/commit/6bf29dbb1541aff717e52b5c5fb12b84f5b38f21
DIFF: 
https://github.com/llvm/llvm-project/commit/6bf29dbb1541aff717e52b5c5fb12b84f5b38f21.diff

LOG: [PowerPC] [Clang] Enable float128 feature on P9 by default

As Power9 introduced hardware support for IEEE quad-precision FP type,
the feature should be enabled by default on Power9 or newer targets.

Reviewed By: steven.zhang

Differential Revision: https://reviews.llvm.org/D90213

Added: 


Modified: 
clang/lib/Basic/Targets/PPC.cpp
clang/test/Driver/ppc-f128-support-check.c

Removed: 




diff  --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp
index 7f6f3d7e0c9fa..a6997324acf97 100644
--- a/clang/lib/Basic/Targets/PPC.cpp
+++ b/clang/lib/Basic/Targets/PPC.cpp
@@ -317,6 +317,9 @@ bool PPCTargetInfo::initFeatureMap(
 .Case("pwr9", true)
 .Case("pwr8", true)
 .Default(false);
+  Features["float128"] = llvm::StringSwitch(CPU)
+.Case("pwr9", true)
+.Default(false);
 
   Features["spe"] = llvm::StringSwitch(CPU)
 .Case("8548", true)

diff  --git a/clang/test/Driver/ppc-f128-support-check.c 
b/clang/test/Driver/ppc-f128-support-check.c
index 24748905612ff..2e4b7a7ae09ce 100644
--- a/clang/test/Driver/ppc-f128-support-check.c
+++ b/clang/test/Driver/ppc-f128-support-check.c
@@ -1,7 +1,7 @@
 // RUN: not %clang -target powerpc64le-unknown-linux-gnu -fsyntax-only \
-// RUN:   -mcpu=pwr9 -mfloat128 %s 2>&1 | FileCheck %s --check-prefix=HASF128
+// RUN:   -mcpu=pwr9 %s 2>&1 | FileCheck %s --check-prefix=HASF128
 // RUN: not %clang -target powerpc64le-unknown-linux-gnu -fsyntax-only \
-// RUN:   -mcpu=power9 -mfloat128 %s 2>&1 | FileCheck %s --check-prefix=HASF128
+// RUN:   -mcpu=power9 %s 2>&1 | FileCheck %s --check-prefix=HASF128
 
 // RUN: not %clang -target powerpc64le-unknown-linux-gnu -fsyntax-only \
 // RUN:   -mcpu=pwr8 -mfloat128 %s 2>&1 | FileCheck %s --check-prefix=NOF128



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[llvm-branch-commits] [llvm] 9b01896 - [IR] Support scalable vectors in ShuffleVectorInst::increasesLength

[Cullen Rhodes via llvm-branch-commits]

Author: Cullen Rhodes
Date: 2020-12-07T10:42:48Z
New Revision: 9b0189655500c30c4ccb0fb5f3ce14a2ac9c6682

URL: 
https://github.com/llvm/llvm-project/commit/9b0189655500c30c4ccb0fb5f3ce14a2ac9c6682
DIFF: 
https://github.com/llvm/llvm-project/commit/9b0189655500c30c4ccb0fb5f3ce14a2ac9c6682.diff

LOG: [IR] Support scalable vectors in ShuffleVectorInst::increasesLength

Since the length of the llvm::SmallVector shufflemask is related to the
minimum number of elements in a scalable vector, it is fine to just get
the Min field of the ElementCount. This is already done for the similar
function changesLength, tests have been added for both.

Reviewed By: sdesmalen

Differential Revision: https://reviews.llvm.org/D92472

Added: 


Modified: 
llvm/include/llvm/IR/Instructions.h
llvm/unittests/IR/InstructionsTest.cpp

Removed: 




diff  --git a/llvm/include/llvm/IR/Instructions.h 
b/llvm/include/llvm/IR/Instructions.h
index 4b08de66e398..00ecc2aa7f37 100644
--- a/llvm/include/llvm/IR/Instructions.h
+++ b/llvm/include/llvm/IR/Instructions.h
@@ -2081,8 +2081,9 @@ class ShuffleVectorInst : public Instruction {
   /// elements than its source vectors.
   /// Example: shufflevector <2 x n> A, <2 x n> B, <1,2,3>
   bool increasesLength() const {
-unsigned NumSourceElts =
-cast(Op<0>()->getType())->getNumElements();
+unsigned NumSourceElts = cast(Op<0>()->getType())
+ ->getElementCount()
+ .getKnownMinValue();
 unsigned NumMaskElts = ShuffleMask.size();
 return NumSourceElts < NumMaskElts;
   }

diff  --git a/llvm/unittests/IR/InstructionsTest.cpp 
b/llvm/unittests/IR/InstructionsTest.cpp
index f98ef4b52ccd..09260d347840 100644
--- a/llvm/unittests/IR/InstructionsTest.cpp
+++ b/llvm/unittests/IR/InstructionsTest.cpp
@@ -1083,7 +1083,19 @@ TEST(InstructionsTest, ShuffleMaskQueries) {
 Constant::getNullValue(VScaleV4Int32Ty));
   int Index = 0;
   EXPECT_FALSE(Id13->isExtractSubvectorMask(Index));
+  EXPECT_FALSE(Id13->changesLength());
+  EXPECT_FALSE(Id13->increasesLength());
   delete Id13;
+
+  // Result has twice as many operands.
+  Type *VScaleV2Int32Ty = ScalableVectorType::get(Int32Ty, 2);
+  ShuffleVectorInst *Id14 =
+  new ShuffleVectorInst(Constant::getAllOnesValue(VScaleV2Int32Ty),
+UndefValue::get(VScaleV2Int32Ty),
+Constant::getNullValue(VScaleV4Int32Ty));
+  EXPECT_TRUE(Id14->changesLength());
+  EXPECT_TRUE(Id14->increasesLength());
+  delete Id14;
 }
 
 TEST(InstructionsTest, GetSplat) {



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[llvm-branch-commits] [llvm] 7b1cb47 - [IR] Bail out for scalable vectors in ShuffleVectorInst::isConcat

[Cullen Rhodes via llvm-branch-commits]

Author: Cullen Rhodes
Date: 2020-12-07T10:48:35Z
New Revision: 7b1cb4715063679531e51127eee869cd03df88da

URL: 
https://github.com/llvm/llvm-project/commit/7b1cb4715063679531e51127eee869cd03df88da
DIFF: 
https://github.com/llvm/llvm-project/commit/7b1cb4715063679531e51127eee869cd03df88da.diff

LOG: [IR] Bail out for scalable vectors in ShuffleVectorInst::isConcat

Shuffle mask for concat can't be expressed for scalable vectors, so we
should bail out. A test has been added that previously crashed, also
tested isIdentityWithPadding and isIdentityWithExtract where we already
bail out.

Reviewed By: sdesmalen

Differential Revision: https://reviews.llvm.org/D92475

Added: 


Modified: 
llvm/lib/IR/Instructions.cpp
llvm/unittests/IR/InstructionsTest.cpp

Removed: 




diff  --git a/llvm/lib/IR/Instructions.cpp b/llvm/lib/IR/Instructions.cpp
index 10427b22d5d7..5de1addabbe2 100644
--- a/llvm/lib/IR/Instructions.cpp
+++ b/llvm/lib/IR/Instructions.cpp
@@ -2274,6 +2274,11 @@ bool ShuffleVectorInst::isConcat() const {
   isa(Op<2>()))
 return false;
 
+  // FIXME: Not currently possible to express a shuffle mask for a scalable
+  // vector for this case.
+  if (isa(getType()))
+return false;
+
   int NumOpElts = cast(Op<0>()->getType())->getNumElements();
   int NumMaskElts = cast(getType())->getNumElements();
   if (NumMaskElts != NumOpElts * 2)

diff  --git a/llvm/unittests/IR/InstructionsTest.cpp 
b/llvm/unittests/IR/InstructionsTest.cpp
index 09260d347840..2c67ff4286e7 100644
--- a/llvm/unittests/IR/InstructionsTest.cpp
+++ b/llvm/unittests/IR/InstructionsTest.cpp
@@ -1096,6 +1096,17 @@ TEST(InstructionsTest, ShuffleMaskQueries) {
   EXPECT_TRUE(Id14->changesLength());
   EXPECT_TRUE(Id14->increasesLength());
   delete Id14;
+
+  // Not possible to express these masks for scalable vectors, make sure we
+  // don't crash.
+  ShuffleVectorInst *Id15 =
+  new ShuffleVectorInst(Constant::getAllOnesValue(VScaleV2Int32Ty),
+Constant::getNullValue(VScaleV2Int32Ty),
+Constant::getNullValue(VScaleV2Int32Ty));
+  EXPECT_FALSE(Id15->isIdentityWithPadding());
+  EXPECT_FALSE(Id15->isIdentityWithExtract());
+  EXPECT_FALSE(Id15->isConcat());
+  delete Id15;
 }
 
 TEST(InstructionsTest, GetSplat) {



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[llvm-branch-commits] [lldb] 280ae10 - [LLDB] fix error message for one-line breakpoint scripts

[Pedro Tammela via llvm-branch-commits]

Author: Pedro Tammela
Date: 2020-12-07T11:21:07Z
New Revision: 280ae10774abac63d4c9fdaf99598afe3053540a

URL: 
https://github.com/llvm/llvm-project/commit/280ae10774abac63d4c9fdaf99598afe3053540a
DIFF: 
https://github.com/llvm/llvm-project/commit/280ae10774abac63d4c9fdaf99598afe3053540a.diff

LOG: [LLDB] fix error message for one-line breakpoint scripts

LLDB is ignoring compilation errors for one-line breakpoint scripts.
This patch fixes the issues and now the error message of the
ScriptInterpreter is shown to the user.

I had to remove a new-line character for the Lua interpreter since it
was duplicated.

Differential Revision: https://reviews.llvm.org/D92729

Added: 
lldb/test/Shell/ScriptInterpreter/Lua/fail_breakpoint_oneline.test
lldb/test/Shell/ScriptInterpreter/Python/fail_breakpoint_oneline.test

Modified: 
lldb/source/Commands/CommandObjectBreakpointCommand.cpp
lldb/source/Plugins/ScriptInterpreter/Lua/Lua.cpp

Removed: 




diff  --git a/lldb/source/Commands/CommandObjectBreakpointCommand.cpp 
b/lldb/source/Commands/CommandObjectBreakpointCommand.cpp
index 792e90ff27a1..caaf3bfb482f 100644
--- a/lldb/source/Commands/CommandObjectBreakpointCommand.cpp
+++ b/lldb/source/Commands/CommandObjectBreakpointCommand.cpp
@@ -414,22 +414,23 @@ are no syntax errors may indicate that a function was 
declared but never called.
   // to set or collect command callback.  Otherwise, call the methods
   // associated with this object.
   if (m_options.m_use_script_language) {
+Status error;
 ScriptInterpreter *script_interp = GetDebugger().GetScriptInterpreter(
 /*can_create=*/true, m_options.m_script_language);
 // Special handling for one-liner specified inline.
 if (m_options.m_use_one_liner) {
-  script_interp->SetBreakpointCommandCallback(
+  error = script_interp->SetBreakpointCommandCallback(
   m_bp_options_vec, m_options.m_one_liner.c_str());
 } else if (!m_func_options.GetName().empty()) {
-  Status error = script_interp->SetBreakpointCommandCallbackFunction(
+  error = script_interp->SetBreakpointCommandCallbackFunction(
   m_bp_options_vec, m_func_options.GetName().c_str(),
   m_func_options.GetStructuredData());
-  if (!error.Success())
-result.SetError(error);
 } else {
   script_interp->CollectDataForBreakpointCommandCallback(
   m_bp_options_vec, result);
 }
+if (!error.Success())
+  result.SetError(error);
   } else {
 // Special handling for one-liner specified inline.
 if (m_options.m_use_one_liner)

diff  --git a/lldb/source/Plugins/ScriptInterpreter/Lua/Lua.cpp 
b/lldb/source/Plugins/ScriptInterpreter/Lua/Lua.cpp
index ca1d181a6940..fb3628a3107c 100644
--- a/lldb/source/Plugins/ScriptInterpreter/Lua/Lua.cpp
+++ b/lldb/source/Plugins/ScriptInterpreter/Lua/Lua.cpp
@@ -86,7 +86,7 @@ llvm::Error Lua::RegisterBreakpointCallback(void *baton, 
const char *body) {
   std::string func_str = llvm::formatv(fmt_str, body).str();
   if (luaL_dostring(m_lua_state, func_str.c_str()) != LUA_OK) {
 llvm::Error e = llvm::make_error(
-llvm::formatv("{0}\n", lua_tostring(m_lua_state, -1)),
+llvm::formatv("{0}", lua_tostring(m_lua_state, -1)),
 llvm::inconvertibleErrorCode());
 // Pop error message from the stack.
 lua_pop(m_lua_state, 2);

diff  --git 
a/lldb/test/Shell/ScriptInterpreter/Lua/fail_breakpoint_oneline.test 
b/lldb/test/Shell/ScriptInterpreter/Lua/fail_breakpoint_oneline.test
new file mode 100644
index ..b418889345d7
--- /dev/null
+++ b/lldb/test/Shell/ScriptInterpreter/Lua/fail_breakpoint_oneline.test
@@ -0,0 +1,5 @@
+# REQUIRES: lua
+# RUN: %lldb -s %s --script-language lua 2>&1 | FileCheck %s
+b main
+breakpoint command add -s lua -o '1234_foo'
+# CHECK: error: {{.*}} unexpected symbol near '1234'

diff  --git 
a/lldb/test/Shell/ScriptInterpreter/Python/fail_breakpoint_oneline.test 
b/lldb/test/Shell/ScriptInterpreter/Python/fail_breakpoint_oneline.test
new file mode 100644
index ..d38df16aaf1f
--- /dev/null
+++ b/lldb/test/Shell/ScriptInterpreter/Python/fail_breakpoint_oneline.test
@@ -0,0 +1,7 @@
+# REQUIRES: python
+# UNSUPPORTED: lldb-repro
+#
+# RUN: %lldb -s %s --script-language python 2>&1 | FileCheck %s
+b main
+breakpoint command add -s python -o "1234_foo"
+# CHECK: error: SyntaxError({{.*}})



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[llvm-branch-commits] [llvm] 03898b7 - [VE] Add vrcp, vrsqrt, vcvt, vmrg, and vshf intrinsic instructions

[Kazushi Marukawa via llvm-branch-commits]

Author: Kazushi (Jam) Marukawa
Date: 2020-12-07T20:30:12+09:00
New Revision: 03898b79fb76e0a4dabf9f35d7dc51b4c497adb0

URL: 
https://github.com/llvm/llvm-project/commit/03898b79fb76e0a4dabf9f35d7dc51b4c497adb0
DIFF: 
https://github.com/llvm/llvm-project/commit/03898b79fb76e0a4dabf9f35d7dc51b4c497adb0.diff

LOG: [VE] Add vrcp, vrsqrt, vcvt, vmrg, and vshf intrinsic instructions

Add vrcp, vrsqrt, vcvt, vmrg, and vshf intrinsic instructions and
regression tests.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D92750

Added: 
llvm/test/CodeGen/VE/VELIntrinsics/vcvt.ll
llvm/test/CodeGen/VE/VELIntrinsics/vmrg.ll
llvm/test/CodeGen/VE/VELIntrinsics/vrcp.ll
llvm/test/CodeGen/VE/VELIntrinsics/vrsqrt.ll
llvm/test/CodeGen/VE/VELIntrinsics/vshf.ll

Modified: 
llvm/include/llvm/IR/IntrinsicsVEVL.gen.td
llvm/lib/Target/VE/VEInstrIntrinsicVL.gen.td

Removed: 




diff  --git a/llvm/include/llvm/IR/IntrinsicsVEVL.gen.td 
b/llvm/include/llvm/IR/IntrinsicsVEVL.gen.td
index f8f422f4ef2b..f62d7cdafdd0 100644
--- a/llvm/include/llvm/IR/IntrinsicsVEVL.gen.td
+++ b/llvm/include/llvm/IR/IntrinsicsVEVL.gen.td
@@ -722,3 +722,79 @@ let TargetPrefix = "ve" in def int_ve_vl_pvfnmsb_vvsvvl : 
GCCBuiltin<"__builtin_
 let TargetPrefix = "ve" in def int_ve_vl_pvfnmsb_Mvl : 
GCCBuiltin<"__builtin_ve_vl_pvfnmsb_Mvl">, Intrinsic<[LLVMType], 
[LLVMType, LLVMType, LLVMType, LLVMType, 
LLVMType, LLVMType], [IntrNoMem]>;
 let TargetPrefix = "ve" in def int_ve_vl_pvfnmsb_vsvvMvl : 
GCCBuiltin<"__builtin_ve_vl_pvfnmsb_vsvvMvl">, Intrinsic<[LLVMType], 
[LLVMType, LLVMType, LLVMType, LLVMType, 
LLVMType, LLVMType], [IntrNoMem]>;
 let TargetPrefix = "ve" in def int_ve_vl_pvfnmsb_vvsvMvl : 
GCCBuiltin<"__builtin_ve_vl_pvfnmsb_vvsvMvl">, Intrinsic<[LLVMType], 
[LLVMType, LLVMType, LLVMType, LLVMType, 
LLVMType, LLVMType], [IntrNoMem]>;
+let TargetPrefix = "ve" in def int_ve_vl_vrcpd_vvl : 
GCCBuiltin<"__builtin_ve_vl_vrcpd_vvl">, Intrinsic<[LLVMType], 
[LLVMType, LLVMType], [IntrNoMem]>;
+let TargetPrefix = "ve" in def int_ve_vl_vrcpd_vvvl : 
GCCBuiltin<"__builtin_ve_vl_vrcpd_vvvl">, Intrinsic<[LLVMType], 
[LLVMType, LLVMType, LLVMType], [IntrNoMem]>;
+let TargetPrefix = "ve" in def int_ve_vl_vrcps_vvl : 
GCCBuiltin<"__builtin_ve_vl_vrcps_vvl">, Intrinsic<[LLVMType], 
[LLVMType, LLVMType], [IntrNoMem]>;
+let TargetPrefix = "ve" in def int_ve_vl_vrcps_vvvl : 
GCCBuiltin<"__builtin_ve_vl_vrcps_vvvl">, Intrinsic<[LLVMType], 
[LLVMType, LLVMType, LLVMType], [IntrNoMem]>;
+let TargetPrefix = "ve" in def int_ve_vl_pvrcp_vvl : 
GCCBuiltin<"__builtin_ve_vl_pvrcp_vvl">, Intrinsic<[LLVMType], 
[LLVMType, LLVMType], [IntrNoMem]>;
+let TargetPrefix = "ve" in def int_ve_vl_pvrcp_vvvl : 
GCCBuiltin<"__builtin_ve_vl_pvrcp_vvvl">, Intrinsic<[LLVMType], 
[LLVMType, LLVMType, LLVMType], [IntrNoMem]>;
+let TargetPrefix = "ve" in def int_ve_vl_vrsqrtd_vvl : 
GCCBuiltin<"__builtin_ve_vl_vrsqrtd_vvl">, Intrinsic<[LLVMType], 
[LLVMType, LLVMType], [IntrNoMem]>;
+let TargetPrefix = "ve" in def int_ve_vl_vrsqrtd_vvvl : 
GCCBuiltin<"__builtin_ve_vl_vrsqrtd_vvvl">, Intrinsic<[LLVMType], 
[LLVMType, LLVMType, LLVMType], [IntrNoMem]>;
+let TargetPrefix = "ve" in def int_ve_vl_vrsqrts_vvl : 
GCCBuiltin<"__builtin_ve_vl_vrsqrts_vvl">, Intrinsic<[LLVMType], 
[LLVMType, LLVMType], [IntrNoMem]>;
+let TargetPrefix = "ve" in def int_ve_vl_vrsqrts_vvvl : 
GCCBuiltin<"__builtin_ve_vl_vrsqrts_vvvl">, Intrinsic<[LLVMType], 
[LLVMType, LLVMType, LLVMType], [IntrNoMem]>;
+let TargetPrefix = "ve" in def int_ve_vl_pvrsqrt_vvl : 
GCCBuiltin<"__builtin_ve_vl_pvrsqrt_vvl">, Intrinsic<[LLVMType], 
[LLVMType, LLVMType], [IntrNoMem]>;
+let TargetPrefix = "ve" in def int_ve_vl_pvrsqrt_vvvl : 
GCCBuiltin<"__builtin_ve_vl_pvrsqrt_vvvl">, Intrinsic<[LLVMType], 
[LLVMType, LLVMType, LLVMType], [IntrNoMem]>;
+let TargetPrefix = "ve" in def int_ve_vl_vrsqrtdnex_vvl : 
GCCBuiltin<"__builtin_ve_vl_vrsqrtdnex_vvl">, Intrinsic<[LLVMType], 
[LLVMType, LLVMType], [IntrNoMem]>;
+let TargetPrefix = "ve" in def int_ve_vl_vrsqrtdnex_vvvl : 
GCCBuiltin<"__builtin_ve_vl_vrsqrtdnex_vvvl">, Intrinsic<[LLVMType], 
[LLVMType, LLVMType, LLVMType], [IntrNoMem]>;
+let TargetPrefix = "ve" in def int_ve_vl_vrsqrtsnex_vvl : 
GCCBuiltin<"__builtin_ve_vl_vrsqrtsnex_vvl">, Intrinsic<[LLVMType], 
[LLVMType, LLVMType], [IntrNoMem]>;
+let TargetPrefix = "ve" in def int_ve_vl_vrsqrtsnex_vvvl : 
GCCBuiltin<"__builtin_ve_vl_vrsqrtsnex_vvvl">, Intrinsic<[LLVMType], 
[LLVMType, LLVMType, LLVMType], [IntrNoMem]>;
+let TargetPrefix = "ve" in def int_ve_vl_pvrsqrtnex_vvl : 
GCCBuiltin<"__builtin_ve_vl_pvrsqrtnex_vvl">, Intrinsic<[LLVMType], 
[LLVMType, LLVMType], [IntrNoMem]>;
+let TargetPrefix = "ve" in def int_ve_vl_pvrsqrtnex_vvvl : 
GCCBuiltin<"__builtin_ve_vl_pvrsqrtnex_vvvl">, Intrinsic<[LLVMType], 
[LLVMType, LLVMType, LLVMType], [IntrNoMem]>;
+let TargetPrefix = "ve" in def int_ve_vl_vcvtwdsx_vv

[llvm-branch-commits] [llvm] 55009a0 - [Test] Auto-update test checks

[Max Kazantsev via llvm-branch-commits]

Author: Max Kazantsev
Date: 2020-12-07T18:33:47+07:00
New Revision: 55009a0ff8bc3ff9ec91075726d44579dedaf8d3

URL: 
https://github.com/llvm/llvm-project/commit/55009a0ff8bc3ff9ec91075726d44579dedaf8d3
DIFF: 
https://github.com/llvm/llvm-project/commit/55009a0ff8bc3ff9ec91075726d44579dedaf8d3.diff

LOG: [Test] Auto-update test checks

Added: 


Modified: 
llvm/test/Transforms/LoopStrengthReduce/X86/sibling-loops.ll

Removed: 




diff  --git a/llvm/test/Transforms/LoopStrengthReduce/X86/sibling-loops.ll 
b/llvm/test/Transforms/LoopStrengthReduce/X86/sibling-loops.ll
index a69d6adc0f03..dd99b4ea1e0f 100644
--- a/llvm/test/Transforms/LoopStrengthReduce/X86/sibling-loops.ll
+++ b/llvm/test/Transforms/LoopStrengthReduce/X86/sibling-loops.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt -loop-reduce -S < %s | FileCheck %s
 ; We find it is very bad to allow LSR formula containing SCEVAddRecExpr Reg
 ; from siblings of current loop. When one loop is LSR optimized, it can
@@ -9,10 +10,75 @@ target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
 @cond = common local_unnamed_addr global i64 0, align 8
 
 ; Check there is no extra lsr.iv generated in foo.
+define void @foo(i64 %N) local_unnamed_addr {
 ; CHECK-LABEL: @foo(
-; CHECK-NOT: lsr.iv{{[0-9]+}} =
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:br label [[DO_BODY:%.*]]
+; CHECK:   do.body:
+; CHECK-NEXT:[[I_0:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], 
[[DO_BODY]] ]
+; CHECK-NEXT:tail call void @goo(i64 [[I_0]], i64 [[I_0]])
+; CHECK-NEXT:[[INC]] = add nuw nsw i64 [[I_0]], 1
+; CHECK-NEXT:[[T0:%.*]] = load i64, i64* @cond, align 8
+; CHECK-NEXT:[[TOBOOL:%.*]] = icmp eq i64 [[T0]], 0
+; CHECK-NEXT:br i1 [[TOBOOL]], label [[DO_BODY2_PREHEADER:%.*]], label 
[[DO_BODY]]
+; CHECK:   do.body2.preheader:
+; CHECK-NEXT:br label [[DO_BODY2:%.*]]
+; CHECK:   do.body2:
+; CHECK-NEXT:[[I_1:%.*]] = phi i64 [ [[INC3:%.*]], [[DO_BODY2]] ], [ 0, 
[[DO_BODY2_PREHEADER]] ]
+; CHECK-NEXT:[[TMP0:%.*]] = add i64 [[INC]], [[I_1]]
+; CHECK-NEXT:tail call void @goo(i64 [[I_1]], i64 [[TMP0]])
+; CHECK-NEXT:[[INC3]] = add nuw nsw i64 [[I_1]], 1
+; CHECK-NEXT:[[T1:%.*]] = load i64, i64* @cond, align 8
+; CHECK-NEXT:[[TOBOOL6:%.*]] = icmp eq i64 [[T1]], 0
+; CHECK-NEXT:br i1 [[TOBOOL6]], label [[DO_BODY8_PREHEADER:%.*]], label 
[[DO_BODY2]]
+; CHECK:   do.body8.preheader:
+; CHECK-NEXT:[[TMP1:%.*]] = add i64 [[INC]], [[INC3]]
+; CHECK-NEXT:br label [[DO_BODY8:%.*]]
+; CHECK:   do.body8:
+; CHECK-NEXT:[[I_2:%.*]] = phi i64 [ [[INC9:%.*]], [[DO_BODY8]] ], [ 0, 
[[DO_BODY8_PREHEADER]] ]
+; CHECK-NEXT:[[J_2:%.*]] = phi i64 [ [[INC10:%.*]], [[DO_BODY8]] ], [ 
[[TMP1]], [[DO_BODY8_PREHEADER]] ]
+; CHECK-NEXT:tail call void @goo(i64 [[I_2]], i64 [[J_2]])
+; CHECK-NEXT:[[INC9]] = add nuw nsw i64 [[I_2]], 1
+; CHECK-NEXT:[[INC10]] = add nsw i64 [[J_2]], 1
+; CHECK-NEXT:[[T2:%.*]] = load i64, i64* @cond, align 8
+; CHECK-NEXT:[[TOBOOL12:%.*]] = icmp eq i64 [[T2]], 0
+; CHECK-NEXT:br i1 [[TOBOOL12]], label [[DO_BODY14_PREHEADER:%.*]], label 
[[DO_BODY8]]
+; CHECK:   do.body14.preheader:
+; CHECK-NEXT:br label [[DO_BODY14:%.*]]
+; CHECK:   do.body14:
+; CHECK-NEXT:[[I_3:%.*]] = phi i64 [ [[INC15:%.*]], [[DO_BODY14]] ], [ 0, 
[[DO_BODY14_PREHEADER]] ]
+; CHECK-NEXT:[[J_3:%.*]] = phi i64 [ [[INC16:%.*]], [[DO_BODY14]] ], [ 
[[INC10]], [[DO_BODY14_PREHEADER]] ]
+; CHECK-NEXT:tail call void @goo(i64 [[I_3]], i64 [[J_3]])
+; CHECK-NEXT:[[INC15]] = add nuw nsw i64 [[I_3]], 1
+; CHECK-NEXT:[[INC16]] = add nsw i64 [[J_3]], 1
+; CHECK-NEXT:[[T3:%.*]] = load i64, i64* @cond, align 8
+; CHECK-NEXT:[[TOBOOL18:%.*]] = icmp eq i64 [[T3]], 0
+; CHECK-NEXT:br i1 [[TOBOOL18]], label [[DO_BODY20_PREHEADER:%.*]], label 
[[DO_BODY14]]
+; CHECK:   do.body20.preheader:
+; CHECK-NEXT:br label [[DO_BODY20:%.*]]
+; CHECK:   do.body20:
+; CHECK-NEXT:[[I_4:%.*]] = phi i64 [ [[INC21:%.*]], [[DO_BODY20]] ], [ 0, 
[[DO_BODY20_PREHEADER]] ]
+; CHECK-NEXT:[[J_4:%.*]] = phi i64 [ [[INC22:%.*]], [[DO_BODY20]] ], [ 
[[INC16]], [[DO_BODY20_PREHEADER]] ]
+; CHECK-NEXT:tail call void @goo(i64 [[I_4]], i64 [[J_4]])
+; CHECK-NEXT:[[INC21]] = add nuw nsw i64 [[I_4]], 1
+; CHECK-NEXT:[[INC22]] = add nsw i64 [[J_4]], 1
+; CHECK-NEXT:[[T4:%.*]] = load i64, i64* @cond, align 8
+; CHECK-NEXT:[[TOBOOL24:%.*]] = icmp eq i64 [[T4]], 0
+; CHECK-NEXT:br i1 [[TOBOOL24]], label [[DO_BODY26_PREHEADER:%.*]], label 
[[DO_BODY20]]
+; CHECK:   do.body26.preheader:
+; CHECK-NEXT:br label [[DO_BODY26:%.*]]
+; CHECK:   do.body26:
+; CHECK-NEXT:[[I_5:%.*]] = phi i64 [ [[INC27:%.*]], [[DO_BODY26]] ], [ 0, 
[[DO_BODY26_PREHEADER]] ]
+; CHECK-NEXT:[[J_5:%.*]] = phi i64 [ [[INC28:%.*]], [

[llvm-branch-commits] [clang-tools-extra] f135726 - [clangd] Temporarily test that uncovered broken behavior on windows

[Sam McCall via llvm-branch-commits]

Author: Sam McCall
Date: 2020-12-07T12:34:17+01:00
New Revision: f1357264b8e3070bef5bb4ff35ececa4d6c76108

URL: 
https://github.com/llvm/llvm-project/commit/f1357264b8e3070bef5bb4ff35ececa4d6c76108
DIFF: 
https://github.com/llvm/llvm-project/commit/f1357264b8e3070bef5bb4ff35ececa4d6c76108.diff

LOG: [clangd] Temporarily test that uncovered broken behavior on windows

Added: 


Modified: 
clang-tools-extra/clangd/unittests/ConfigProviderTests.cpp

Removed: 




diff  --git a/clang-tools-extra/clangd/unittests/ConfigProviderTests.cpp 
b/clang-tools-extra/clangd/unittests/ConfigProviderTests.cpp
index b2217bbc55da..4e44af6fad58 100644
--- a/clang-tools-extra/clangd/unittests/ConfigProviderTests.cpp
+++ b/clang-tools-extra/clangd/unittests/ConfigProviderTests.cpp
@@ -144,8 +144,11 @@ TEST(ProviderTest, FromAncestorRelativeYAMLFiles) {
   Cfg = P->getConfig(ABCParams, Diags.callback());
   EXPECT_THAT(Diags.Diagnostics,
   ElementsAre(DiagMessage("Unknown CompileFlags key Unknown")));
+#ifdef LLVM_ON_UNIX
+  // FIXME: fails on windows: paths have mixed slashes like C:\a/b\c.yaml
   EXPECT_THAT(Diags.Files,
   ElementsAre(testPath("a/foo.yaml"), testPath("a/b/c/foo.yaml")));
+#endif
   EXPECT_THAT(getAddedArgs(Cfg), ElementsAre("foo", "bar", "baz"));
   Diags.clear();
 



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[llvm-branch-commits] [clang-tools-extra] 2542ef8 - [clangd] Fix windows slashes in project config diagnostics

[Sam McCall via llvm-branch-commits]

Author: Sam McCall
Date: 2020-12-07T12:54:38+01:00
New Revision: 2542ef83ed7c5a10f8b394ec8e7764558dc71d32

URL: 
https://github.com/llvm/llvm-project/commit/2542ef83ed7c5a10f8b394ec8e7764558dc71d32
DIFF: 
https://github.com/llvm/llvm-project/commit/2542ef83ed7c5a10f8b394ec8e7764558dc71d32.diff

LOG: [clangd] Fix windows slashes in project config diagnostics

Added: 


Modified: 
clang-tools-extra/clangd/ConfigProvider.cpp
clang-tools-extra/clangd/unittests/ConfigProviderTests.cpp

Removed: 




diff  --git a/clang-tools-extra/clangd/ConfigProvider.cpp 
b/clang-tools-extra/clangd/ConfigProvider.cpp
index 8a3991ed1c1e..0933e7e2c283 100644
--- a/clang-tools-extra/clangd/ConfigProvider.cpp
+++ b/clang-tools-extra/clangd/ConfigProvider.cpp
@@ -83,7 +83,7 @@ Provider::fromAncestorRelativeYAMLFiles(llvm::StringRef 
RelPath,
 const ThreadsafeFS &FS;
 
 mutable std::mutex Mu;
-// Keys are the ancestor directory, not the actual config path within it.
+// Keys are the (posix-style) ancestor directory, not the config within it.
 // We only insert into this map, so pointers to values are stable forever.
 // Mutex guards the map itself, not the values (which are threadsafe).
 mutable llvm::StringMap Cache;
@@ -117,6 +117,8 @@ Provider::fromAncestorRelativeYAMLFiles(llvm::StringRef 
RelPath,
   if (It == Cache.end()) {
 llvm::SmallString<256> ConfigPath = Ancestor;
 path::append(ConfigPath, RelPath);
+// Use native slashes for reading the file, affects diagnostics.
+llvm::sys::path::native(ConfigPath);
 It = Cache.try_emplace(Ancestor, ConfigPath.str(), Ancestor).first;
   }
   Caches.push_back(&It->second);

diff  --git a/clang-tools-extra/clangd/unittests/ConfigProviderTests.cpp 
b/clang-tools-extra/clangd/unittests/ConfigProviderTests.cpp
index 4e44af6fad58..9c45266d1a83 100644
--- a/clang-tools-extra/clangd/unittests/ConfigProviderTests.cpp
+++ b/clang-tools-extra/clangd/unittests/ConfigProviderTests.cpp
@@ -144,11 +144,9 @@ TEST(ProviderTest, FromAncestorRelativeYAMLFiles) {
   Cfg = P->getConfig(ABCParams, Diags.callback());
   EXPECT_THAT(Diags.Diagnostics,
   ElementsAre(DiagMessage("Unknown CompileFlags key Unknown")));
-#ifdef LLVM_ON_UNIX
   // FIXME: fails on windows: paths have mixed slashes like C:\a/b\c.yaml
   EXPECT_THAT(Diags.Files,
   ElementsAre(testPath("a/foo.yaml"), testPath("a/b/c/foo.yaml")));
-#endif
   EXPECT_THAT(getAddedArgs(Cfg), ElementsAre("foo", "bar", "baz"));
   Diags.clear();
 



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[llvm-branch-commits] [llvm] 347ea1a - [llvm-readobj/elf] - Refine the implementation of "printFunctionStackSize".

[Georgii Rymar via llvm-branch-commits]

Author: Georgii Rymar
Date: 2020-12-07T14:57:44+03:00
New Revision: 347ea1af348e7b48341be4d85b10a7076483f59c

URL: 
https://github.com/llvm/llvm-project/commit/347ea1af348e7b48341be4d85b10a7076483f59c
DIFF: 
https://github.com/llvm/llvm-project/commit/347ea1af348e7b48341be4d85b10a7076483f59c.diff

LOG: [llvm-readobj/elf] - Refine the implementation of "printFunctionStackSize".

This rewrites the logic to get rid of "ELFSymbolRef" API where possible.
This allowed to handle possible errors better, improve warnings reported and 
add new ones.
Also 'reportWarning' was replaced with 'reportUniqueWarning'

Differential revision: https://reviews.llvm.org/D92545

Added: 


Modified: 
llvm/include/llvm/Object/ELFObjectFile.h
llvm/test/tools/llvm-readobj/ELF/stack-sizes.test
llvm/tools/llvm-readobj/ELFDumper.cpp

Removed: 




diff  --git a/llvm/include/llvm/Object/ELFObjectFile.h 
b/llvm/include/llvm/Object/ELFObjectFile.h
index a75aba86f9d4..ae4521624077 100644
--- a/llvm/include/llvm/Object/ELFObjectFile.h
+++ b/llvm/include/llvm/Object/ELFObjectFile.h
@@ -246,6 +246,10 @@ template  class ELFObjectFile : public 
ELFObjectFileBase {
 return SectionRef(toDRI(Sec), this);
   }
 
+  ELFSymbolRef toSymbolRef(const Elf_Shdr *SymTable, unsigned SymbolNum) const 
{
+return ELFSymbolRef({toDRI(SymTable, SymbolNum), this});
+  }
+
   bool IsContentValid() const { return ContentValid; }
 
 private:

diff  --git a/llvm/test/tools/llvm-readobj/ELF/stack-sizes.test 
b/llvm/test/tools/llvm-readobj/ELF/stack-sizes.test
index 01bdb7231567..35c400d69e76 100644
--- a/llvm/test/tools/llvm-readobj/ELF/stack-sizes.test
+++ b/llvm/test/tools/llvm-readobj/ELF/stack-sizes.test
@@ -74,10 +74,14 @@ Sections:
   - Offset: 0
 Symbol: separate_text_section_baz
 Type:   R_X86_64_64
+  - Name: .symtab
+Type: SHT_SYMTAB
+ShOffset: [[SYMTABOFFSET=]]
 Symbols:
   - Name:separate_text_section_baz
-Section: .text.baz
+Section: [[SEC1=.text.baz]]
 Type:STT_FUNC
+Index:   [[SEC1INDEX=]]
   - Name:.text
 Section: .text
 Type:STT_SECTION
@@ -91,6 +95,86 @@ Symbols:
 Type:STT_FUNC
 Binding: STB_GLOBAL
 
+## Check that we report a warning when we are unable to read
+## the symbol table when dumping stack sizes.
+
+# RUN: yaml2obj --docnum=1 %s -DSYMTABOFFSET=0x -o %t01.broken.symtab
+# RUN: llvm-readelf --stack-sizes %t01.broken.symtab 2>&1 | \
+# RUN:   FileCheck %s -DFILE=%t01.broken.symtab --check-prefix=SYMTAB-GNU 
--implicit-check-not=warning:
+# RUN: llvm-readobj --stack-sizes %t01.broken.symtab 2>&1 | \
+# RUN:   FileCheck %s -DFILE=%t01.broken.symtab --check-prefix=SYMTAB-LLVM 
--implicit-check-not=warning:
+
+# SYMTAB-GNU:  Stack Sizes:
+# SYMTAB-GNU-NEXT:  Size Function
+# SYMTAB-GNU-NEXT: warning: '[[FILE]]': unable to get the target of relocation 
with index 1 in SHT_RELA section with index 5: unable to access section [index 
7] data at 0xef36: offset goes past the end of file
+# SYMTAB-GNU-NEXT: warning: '[[FILE]]': unable to read the symbol table: 
section [index 7] has a sh_offset (0x) + sh_size (0x78) that is greater 
than the file size (0x450)
+# SYMTAB-GNU-NEXT: warning: '[[FILE]]': could not identify function symbol for 
stack size entry in SHT_PROGBITS section with index 3
+# SYMTAB-GNU-NEXT:16 ?
+# SYMTAB-GNU-NEXT: warning: '[[FILE]]': unable to get the target of relocation 
with index 2 in SHT_RELA section with index 5: unable to access section [index 
7] data at 0xef1e: offset goes past the end of file
+# SYMTAB-GNU-NEXT:32 ?
+# SYMTAB-GNU-NEXT: warning: '[[FILE]]': unable to get the target of relocation 
with index 1 in SHT_RELA section with index 6: unable to access section [index 
7] data at 0xef06: offset goes past the end of file
+# SYMTAB-GNU-NEXT: warning: '[[FILE]]': could not identify function symbol for 
stack size entry in SHT_PROGBITS section with index 4
+# SYMTAB-GNU-NEXT: 8 ?
+
+# SYMTAB-LLVM:  StackSizes [
+# SYMTAB-LLVM-NEXT: warning: '[[FILE]]': unable to get the target of 
relocation with index 1 in SHT_RELA section with index 5: unable to access 
section [index 7] data at 0xef36: offset goes past the end of file
+# SYMTAB-LLVM-NEXT: warning: '[[FILE]]': unable to read the symbol table: 
section [index 7] has a sh_offset (0x) + sh_size (0x78) that is greater 
than the file size (0x450)
+# SYMTAB-LLVM-NEXT: warning: '[[FILE]]': could not identify function symbol 
for stack size entry in SHT_PROGBITS section with index 3
+# SYMTAB-LLVM-NEXT:   Entry {
+# SYMTAB-LLVM-NEXT: Function: ?
+# SYMTAB-LLVM-NEXT: Size: 0x10
+# SYMTAB-LLVM-NEXT:   }
+# SYMTAB-LLVM-NEXT: warning: '[[FILE]]': unable to get the target of 
relocation with index 2 in SHT_RELA section with index 5: unable to access 
section [index 7] data at

[llvm-branch-commits] [clang] a1cb9cb - Add ability to load a FixedCompilationDatabase from a buffer.

[Sam McCall via llvm-branch-commits]

Author: Sam McCall
Date: 2020-12-07T13:07:10+01:00
New Revision: a1cb9cbf5c4939e78a6c3b3677cf8e3dbdf51932

URL: 
https://github.com/llvm/llvm-project/commit/a1cb9cbf5c4939e78a6c3b3677cf8e3dbdf51932
DIFF: 
https://github.com/llvm/llvm-project/commit/a1cb9cbf5c4939e78a6c3b3677cf8e3dbdf51932.diff

LOG: Add ability to load a FixedCompilationDatabase from a buffer.

Previously, loading one from a file meant allowing the library to do the IO.
Clangd would prefer to do such IO itself (e.g. to allow caching).

Differential Revision: https://reviews.llvm.org/D92640

Added: 


Modified: 
clang/include/clang/Tooling/CompilationDatabase.h
clang/lib/Tooling/CompilationDatabase.cpp
clang/unittests/Tooling/CompilationDatabaseTest.cpp

Removed: 




diff  --git a/clang/include/clang/Tooling/CompilationDatabase.h 
b/clang/include/clang/Tooling/CompilationDatabase.h
index b28a8a6d6e51..cbd57e9609aa 100644
--- a/clang/include/clang/Tooling/CompilationDatabase.h
+++ b/clang/include/clang/Tooling/CompilationDatabase.h
@@ -184,11 +184,16 @@ class FixedCompilationDatabase : public 
CompilationDatabase {
   int &Argc, const char *const *Argv, std::string &ErrorMsg,
   Twine Directory = ".");
 
-  /// Reads flags from the given file, one-per line.
+  /// Reads flags from the given file, one-per-line.
   /// Returns nullptr and sets ErrorMessage if we can't read the file.
   static std::unique_ptr
   loadFromFile(StringRef Path, std::string &ErrorMsg);
 
+  /// Reads flags from the given buffer, one-per-line.
+  /// Directory is the command CWD, typically the parent of compile_flags.txt.
+  static std::unique_ptr
+  loadFromBuffer(StringRef Directory, StringRef Data, std::string &ErrorMsg);
+
   /// Constructs a compilation data base from a specified directory
   /// and command line.
   FixedCompilationDatabase(Twine Directory, ArrayRef CommandLine);

diff  --git a/clang/lib/Tooling/CompilationDatabase.cpp 
b/clang/lib/Tooling/CompilationDatabase.cpp
index 79bb8c0ce09a..d339fd044c02 100644
--- a/clang/lib/Tooling/CompilationDatabase.cpp
+++ b/clang/lib/Tooling/CompilationDatabase.cpp
@@ -348,16 +348,24 @@ FixedCompilationDatabase::loadFromFile(StringRef Path, 
std::string &ErrorMsg) {
 ErrorMsg = "Error while opening fixed database: " + Result.message();
 return nullptr;
   }
+  return loadFromBuffer(llvm::sys::path::parent_path(Path),
+(*File)->getBuffer(), ErrorMsg);
+}
+
+std::unique_ptr
+FixedCompilationDatabase::loadFromBuffer(StringRef Directory, StringRef Data,
+ std::string &ErrorMsg) {
+  ErrorMsg.clear();
   std::vector Args;
-  for (llvm::StringRef Line :
-   llvm::make_range(llvm::line_iterator(**File), llvm::line_iterator())) {
+  StringRef Line;
+  while (!Data.empty()) {
+std::tie(Line, Data) = Data.split('\n');
 // Stray whitespace is almost certainly unintended.
 Line = Line.trim();
 if (!Line.empty())
   Args.push_back(Line.str());
   }
-  return std::make_unique(
-  llvm::sys::path::parent_path(Path), std::move(Args));
+  return std::make_unique(Directory, 
std::move(Args));
 }
 
 FixedCompilationDatabase::

diff  --git a/clang/unittests/Tooling/CompilationDatabaseTest.cpp 
b/clang/unittests/Tooling/CompilationDatabaseTest.cpp
index 168a1d6f0fb0..a3ea899e572e 100644
--- a/clang/unittests/Tooling/CompilationDatabaseTest.cpp
+++ b/clang/unittests/Tooling/CompilationDatabaseTest.cpp
@@ -543,6 +543,27 @@ TEST(FixedCompilationDatabase, GetAllCompileCommands) {
   EXPECT_EQ(0ul, Database.getAllCompileCommands().size());
 }
 
+TEST(FixedCompilationDatabase, FromBuffer) {
+  const char *Data = R"(
+
+ -DFOO=BAR
+
+--baz
+
+  )";
+  std::string ErrorMsg;
+  auto CDB =
+  FixedCompilationDatabase::loadFromBuffer("/cdb/dir", Data, ErrorMsg);
+
+  std::vector Result = CDB->getCompileCommands("/foo/bar.cc");
+  ASSERT_EQ(1ul, Result.size());
+  EXPECT_EQ("/cdb/dir", Result.front().Directory);
+  EXPECT_EQ("/foo/bar.cc", Result.front().Filename);
+  EXPECT_THAT(
+  Result.front().CommandLine,
+  ElementsAre(EndsWith("clang-tool"), "-DFOO=BAR", "--baz", 
"/foo/bar.cc"));
+}
+
 TEST(ParseFixedCompilationDatabase, ReturnsNullOnEmptyArgumentList) {
   int Argc = 0;
   std::string ErrorMsg;



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[llvm-branch-commits] [clang-tools-extra] 9806181 - [clang-tidy][docs] Update check options with boolean values instead of non-zero/0/1

[Nathan James via llvm-branch-commits]

Author: Nathan James
Date: 2020-12-07T12:13:57Z
New Revision: 980618145bf00a8e212cf3c6db46fb0a83081d69

URL: 
https://github.com/llvm/llvm-project/commit/980618145bf00a8e212cf3c6db46fb0a83081d69
DIFF: 
https://github.com/llvm/llvm-project/commit/980618145bf00a8e212cf3c6db46fb0a83081d69.diff

LOG: [clang-tidy][docs] Update check options with boolean values instead of 
non-zero/0/1

Using bools instead of integers better conveys the expected value of the option.

Reviewed By: Eugene.Zelenko, aaron.ballman

Differential Revision: https://reviews.llvm.org/D92652

Added: 


Modified: 
clang-tools-extra/docs/clang-tidy/checks/bugprone-argument-comment.rst

clang-tools-extra/docs/clang-tidy/checks/bugprone-misplaced-widening-cast.rst

clang-tools-extra/docs/clang-tidy/checks/bugprone-not-null-terminated-result.rst
clang-tools-extra/docs/clang-tidy/checks/bugprone-reserved-identifier.rst
clang-tools-extra/docs/clang-tidy/checks/bugprone-signed-char-misuse.rst
clang-tools-extra/docs/clang-tidy/checks/bugprone-sizeof-expression.rst
clang-tools-extra/docs/clang-tidy/checks/bugprone-string-constructor.rst

clang-tools-extra/docs/clang-tidy/checks/bugprone-suspicious-string-compare.rst

clang-tools-extra/docs/clang-tidy/checks/bugprone-unhandled-self-assignment.rst
clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines-macro-usage.rst

clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines-narrowing-conversions.rst

clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines-prefer-member-initializer.rst

clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines-pro-type-member-init.rst

clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines-special-member-functions.rst
clang-tools-extra/docs/clang-tidy/checks/hicpp-multiway-paths-covered.rst
clang-tools-extra/docs/clang-tidy/checks/misc-definitions-in-headers.rst

clang-tools-extra/docs/clang-tidy/checks/misc-throw-by-value-catch-by-reference.rst
clang-tools-extra/docs/clang-tidy/checks/misc-unused-parameters.rst
clang-tools-extra/docs/clang-tidy/checks/modernize-avoid-bind.rst
clang-tools-extra/docs/clang-tidy/checks/modernize-make-shared.rst
clang-tools-extra/docs/clang-tidy/checks/modernize-make-unique.rst
clang-tools-extra/docs/clang-tidy/checks/modernize-pass-by-value.rst
clang-tools-extra/docs/clang-tidy/checks/modernize-use-auto.rst
clang-tools-extra/docs/clang-tidy/checks/modernize-use-bool-literals.rst

clang-tools-extra/docs/clang-tidy/checks/modernize-use-default-member-init.rst
clang-tools-extra/docs/clang-tidy/checks/modernize-use-emplace.rst
clang-tools-extra/docs/clang-tidy/checks/modernize-use-equals-default.rst
clang-tools-extra/docs/clang-tidy/checks/modernize-use-equals-delete.rst
clang-tools-extra/docs/clang-tidy/checks/modernize-use-noexcept.rst
clang-tools-extra/docs/clang-tidy/checks/modernize-use-override.rst

clang-tools-extra/docs/clang-tidy/checks/modernize-use-transparent-functors.rst
clang-tools-extra/docs/clang-tidy/checks/modernize-use-using.rst
clang-tools-extra/docs/clang-tidy/checks/performance-for-range-copy.rst

clang-tools-extra/docs/clang-tidy/checks/performance-inefficient-string-concatenation.rst

clang-tools-extra/docs/clang-tidy/checks/performance-inefficient-vector-operation.rst
clang-tools-extra/docs/clang-tidy/checks/performance-move-const-arg.rst
clang-tools-extra/docs/clang-tidy/checks/portability-simd-intrinsics.rst
clang-tools-extra/docs/clang-tidy/checks/readability-identifier-naming.rst

clang-tools-extra/docs/clang-tidy/checks/readability-implicit-bool-conversion.rst

clang-tools-extra/docs/clang-tidy/checks/readability-inconsistent-declaration-parameter-name.rst
clang-tools-extra/docs/clang-tidy/checks/readability-qualified-auto.rst

clang-tools-extra/docs/clang-tidy/checks/readability-redundant-access-specifiers.rst

clang-tools-extra/docs/clang-tidy/checks/readability-redundant-declaration.rst

clang-tools-extra/docs/clang-tidy/checks/readability-redundant-member-init.rst

clang-tools-extra/docs/clang-tidy/checks/readability-redundant-smartptr-get.rst

clang-tools-extra/docs/clang-tidy/checks/readability-simplify-boolean-expr.rst

clang-tools-extra/docs/clang-tidy/checks/readability-uppercase-literal-suffix.rst

Removed: 




diff  --git 
a/clang-tools-extra/docs/clang-tidy/checks/bugprone-argument-comment.rst 
b/clang-tools-extra/docs/clang-tidy/checks/bugprone-argument-comment.rst
index 8c59541b8d42..ab7e668b971c 100644
--- a/clang-tools-extra/docs/clang-tidy/checks/bugprone-argument-comment.rst
+++ b/clang-tools-extra/docs/clang-tidy/checks/bugprone-argument-comment.rst
@@ -24,17 +24,17 @@ Options
 
 .. option:: StrictMode
 
-   When zero (default value), the check will ignore leading and trailing
+   When `false` (default valu

[llvm-branch-commits] [llvm] f6dd32f - [SVE][CodeGen] Lower scalable masked gathers

[Kerry McLaughlin via llvm-branch-commits]

Author: Kerry McLaughlin
Date: 2020-12-07T12:20:41Z
New Revision: f6dd32fd3584380730a09b042cfbac852f36eb00

URL: 
https://github.com/llvm/llvm-project/commit/f6dd32fd3584380730a09b042cfbac852f36eb00
DIFF: 
https://github.com/llvm/llvm-project/commit/f6dd32fd3584380730a09b042cfbac852f36eb00.diff

LOG: [SVE][CodeGen] Lower scalable masked gathers

Lowers the llvm.masked.gather intrinsics (scalar plus vector addressing mode 
only)

Changes in this patch:
- Add custom lowering for MGATHER, using getGatherVecOpcode() to choose the 
appropriate
  gather load opcode to use.
- Improve codegen with refineIndexType/refineUniformBase, added in D90942
- Tests added for gather loads with 32 & 64-bit scaled & unscaled offsets.

Reviewed By: sdesmalen

Differential Revision: https://reviews.llvm.org/D91092

Added: 
llvm/test/CodeGen/AArch64/sve-masked-gather-32b-signed-scaled.ll
llvm/test/CodeGen/AArch64/sve-masked-gather-32b-signed-unscaled.ll
llvm/test/CodeGen/AArch64/sve-masked-gather-32b-unsigned-scaled.ll
llvm/test/CodeGen/AArch64/sve-masked-gather-32b-unsigned-unscaled.ll
llvm/test/CodeGen/AArch64/sve-masked-gather-64b-scaled.ll
llvm/test/CodeGen/AArch64/sve-masked-gather-64b-unscaled.ll
llvm/test/CodeGen/AArch64/sve-masked-gather-legalize.ll

Modified: 
llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/lib/Target/AArch64/AArch64ISelLowering.h

Removed: 




diff  --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp 
b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
index 552545b854d8..9a0925061105 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
@@ -1746,6 +1746,7 @@ void 
DAGTypeLegalizer::SplitVecRes_MGATHER(MaskedGatherSDNode *MGT,
   SDValue PassThru = MGT->getPassThru();
   SDValue Index = MGT->getIndex();
   SDValue Scale = MGT->getScale();
+  EVT MemoryVT = MGT->getMemoryVT();
   Align Alignment = MGT->getOriginalAlign();
 
   // Split Mask operand
@@ -1759,6 +1760,10 @@ void 
DAGTypeLegalizer::SplitVecRes_MGATHER(MaskedGatherSDNode *MGT,
   std::tie(MaskLo, MaskHi) = DAG.SplitVector(Mask, dl);
   }
 
+  EVT LoMemVT, HiMemVT;
+  // Split MemoryVT
+  std::tie(LoMemVT, HiMemVT) = DAG.GetSplitDestVTs(MemoryVT);
+
   SDValue PassThruLo, PassThruHi;
   if (getTypeAction(PassThru.getValueType()) == 
TargetLowering::TypeSplitVector)
 GetSplitVector(PassThru, PassThruLo, PassThruHi);
@@ -1777,11 +1782,11 @@ void 
DAGTypeLegalizer::SplitVecRes_MGATHER(MaskedGatherSDNode *MGT,
   MGT->getRanges());
 
   SDValue OpsLo[] = {Ch, PassThruLo, MaskLo, Ptr, IndexLo, Scale};
-  Lo = DAG.getMaskedGather(DAG.getVTList(LoVT, MVT::Other), LoVT, dl, OpsLo,
+  Lo = DAG.getMaskedGather(DAG.getVTList(LoVT, MVT::Other), LoMemVT, dl, OpsLo,
MMO, MGT->getIndexType());
 
   SDValue OpsHi[] = {Ch, PassThruHi, MaskHi, Ptr, IndexHi, Scale};
-  Hi = DAG.getMaskedGather(DAG.getVTList(HiVT, MVT::Other), HiVT, dl, OpsHi,
+  Hi = DAG.getMaskedGather(DAG.getVTList(HiVT, MVT::Other), HiMemVT, dl, OpsHi,
MMO, MGT->getIndexType());
 
   // Build a factor node to remember that this load is independent of the
@@ -2421,11 +2426,11 @@ SDValue 
DAGTypeLegalizer::SplitVecOp_MGATHER(MaskedGatherSDNode *MGT,
   MGT->getRanges());
 
   SDValue OpsLo[] = {Ch, PassThruLo, MaskLo, Ptr, IndexLo, Scale};
-  SDValue Lo = DAG.getMaskedGather(DAG.getVTList(LoVT, MVT::Other), LoVT, dl,
+  SDValue Lo = DAG.getMaskedGather(DAG.getVTList(LoVT, MVT::Other), LoMemVT, 
dl,
OpsLo, MMO, MGT->getIndexType());
 
   SDValue OpsHi[] = {Ch, PassThruHi, MaskHi, Ptr, IndexHi, Scale};
-  SDValue Hi = DAG.getMaskedGather(DAG.getVTList(HiVT, MVT::Other), HiVT, dl,
+  SDValue Hi = DAG.getMaskedGather(DAG.getVTList(HiVT, MVT::Other), HiMemVT, 
dl,
OpsHi, MMO, MGT->getIndexType());
 
   // Build a factor node to remember that this load is independent of the

diff  --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp 
b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index f6e131838a16..dd837d4d495f 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -7310,17 +7310,22 @@ SDValue SelectionDAG::getMaskedGather(SDVTList VTs, EVT 
VT, const SDLoc &dl,
 return SDValue(E, 0);
   }
 
+  IndexType = TLI->getCanonicalIndexType(IndexType, VT, Ops[4]);
   auto *N = newSDNode(dl.getIROrder(), dl.getDebugLoc(),
   VTs, VT, MMO, IndexType);
   createOperands(N, Ops);
 
   assert(N->getPassThru().getValueType() == N->getValueType(0) &&
  "Incompatible type of the PassTh

[llvm-branch-commits] [llvm] 2c0536b - [NFC][LoopIdiom] Reshuffle left-shift-until-bittest test coverage (D91038)

[Roman Lebedev via llvm-branch-commits]

Author: Roman Lebedev
Date: 2020-12-07T15:27:13+03:00
New Revision: 2c0536b76b35fa592ac7b4a0e4bb176eaf55af75

URL: 
https://github.com/llvm/llvm-project/commit/2c0536b76b35fa592ac7b4a0e4bb176eaf55af75
DIFF: 
https://github.com/llvm/llvm-project/commit/2c0536b76b35fa592ac7b4a0e4bb176eaf55af75.diff

LOG: [NFC][LoopIdiom] Reshuffle left-shift-until-bittest test coverage (D91038)

Added: 


Modified: 
llvm/test/Transforms/LoopIdiom/X86/left-shift-until-bittest.ll

Removed: 




diff  --git a/llvm/test/Transforms/LoopIdiom/X86/left-shift-until-bittest.ll 
b/llvm/test/Transforms/LoopIdiom/X86/left-shift-until-bittest.ll
index e4fc1e407316..20b7a5cf0d75 100644
--- a/llvm/test/Transforms/LoopIdiom/X86/left-shift-until-bittest.ll
+++ b/llvm/test/Transforms/LoopIdiom/X86/left-shift-until-bittest.ll
@@ -153,24 +153,101 @@ end:
   ret i32 %x.curr
 }
 
-define i32 @p4_constant_mask_signbit_noncanonical(i32 %x) {
-; ALL-LABEL: @p4_constant_mask_signbit_noncanonical(
+; We don't particularly care whether %x.curr or %x.curr will live-out.
+define i32 @p4_
diff erent_liveout(i32 %x, i32 %bit) {
+; ALL-LABEL: @p4_
diff erent_liveout(
 ; ALL-NEXT:  entry:
-; ALL-NEXT:br label [[LOOP:%.*]], [[DBG72:!dbg !.*]]
+; ALL-NEXT:[[BITMASK:%.*]] = shl i32 1, [[BIT:%.*]], [[DBG73:!dbg !.*]]
+; ALL-NEXT:call void @llvm.dbg.value(metadata i32 [[BITMASK]], 
[[META68:metadata !.*]], metadata !DIExpression()), [[DBG73]]
+; ALL-NEXT:br label [[LOOP:%.*]], [[DBG74:!dbg !.*]]
 ; ALL:   loop:
-; ALL-NEXT:[[X_CURR:%.*]] = phi i32 [ [[X:%.*]], [[ENTRY:%.*]] ], [ 
[[X_NEXT:%.*]], [[LOOP]] ], [[DBG73:!dbg !.*]]
-; ALL-NEXT:call void @llvm.dbg.value(metadata i32 [[X_CURR]], 
[[META68:metadata !.*]], metadata !DIExpression()), [[DBG73]]
-; ALL-NEXT:[[X_CURR_BITMASKED:%.*]] = and i32 [[X_CURR]], -2147483648, 
[[DBG74:!dbg !.*]]
-; ALL-NEXT:call void @llvm.dbg.value(metadata i32 [[X_CURR_BITMASKED]], 
[[META69:metadata !.*]], metadata !DIExpression()), [[DBG74]]
-; ALL-NEXT:[[X_CURR_ISBITUNSET:%.*]] = icmp eq i32 [[X_CURR_BITMASKED]], 
0, [[DBG75:!dbg !.*]]
-; ALL-NEXT:call void @llvm.dbg.value(metadata i1 [[X_CURR_ISBITUNSET]], 
[[META70:metadata !.*]], metadata !DIExpression()), [[DBG75]]
-; ALL-NEXT:[[X_NEXT]] = shl i32 [[X_CURR]], 1, [[DBG76:!dbg !.*]]
-; ALL-NEXT:call void @llvm.dbg.value(metadata i32 [[X_NEXT]], 
[[META71:metadata !.*]], metadata !DIExpression()), [[DBG76]]
-; ALL-NEXT:br i1 [[X_CURR_ISBITUNSET]], label [[LOOP]], label [[END:%.*]], 
[[DBG77:!dbg !.*]]
+; ALL-NEXT:[[X_CURR:%.*]] = phi i32 [ [[X:%.*]], [[ENTRY:%.*]] ], [ 
[[X_NEXT:%.*]], [[LOOP]] ], [[DBG75:!dbg !.*]]
+; ALL-NEXT:call void @llvm.dbg.value(metadata i32 [[X_CURR]], 
[[META69:metadata !.*]], metadata !DIExpression()), [[DBG75]]
+; ALL-NEXT:[[X_CURR_BITMASKED:%.*]] = and i32 [[X_CURR]], [[BITMASK]], 
[[DBG76:!dbg !.*]]
+; ALL-NEXT:call void @llvm.dbg.value(metadata i32 [[X_CURR_BITMASKED]], 
[[META70:metadata !.*]], metadata !DIExpression()), [[DBG76]]
+; ALL-NEXT:[[X_CURR_ISBITUNSET:%.*]] = icmp eq i32 [[X_CURR_BITMASKED]], 
0, [[DBG77:!dbg !.*]]
+; ALL-NEXT:call void @llvm.dbg.value(metadata i1 [[X_CURR_ISBITUNSET]], 
[[META71:metadata !.*]], metadata !DIExpression()), [[DBG77]]
+; ALL-NEXT:[[X_NEXT]] = shl i32 [[X_CURR]], 1, [[DBG78:!dbg !.*]]
+; ALL-NEXT:call void @llvm.dbg.value(metadata i32 [[X_NEXT]], 
[[META72:metadata !.*]], metadata !DIExpression()), [[DBG78]]
+; ALL-NEXT:br i1 [[X_CURR_ISBITUNSET]], label [[LOOP]], label [[END:%.*]], 
[[DBG79:!dbg !.*]]
 ; ALL:   end:
-; ALL-NEXT:[[X_CURR_LCSSA:%.*]] = phi i32 [ [[X_CURR]], [[LOOP]] ], 
[[DBG73]]
-; ALL-NEXT:call void @llvm.dbg.value(metadata i32 [[X_CURR_LCSSA]], 
[[META68]], metadata !DIExpression()), [[DBG73]]
-; ALL-NEXT:ret i32 [[X_CURR_LCSSA]], [[DBG78:!dbg !.*]]
+; ALL-NEXT:[[X_NEXT_LCSSA:%.*]] = phi i32 [ [[X_NEXT]], [[LOOP]] ], 
[[DBG78]]
+; ALL-NEXT:ret i32 [[X_NEXT_LCSSA]], [[DBG80:!dbg !.*]]
+;
+entry:
+  %bitmask = shl i32 1, %bit
+  br label %loop
+
+loop:
+  %x.curr = phi i32 [ %x, %entry ], [ %x.next, %loop ]
+  %x.curr.bitmasked = and i32 %x.curr, %bitmask
+  %x.curr.isbitunset = icmp eq i32 %x.curr.bitmasked, 0
+  %x.next = shl i32 %x.curr, 1
+  br i1 %x.curr.isbitunset, label %loop, label %end
+
+end:
+  ret i32 %x.next ; not %x.curr
+}
+; Even both of them being live-out is fine.
+define void @p5_both_liveout(i32 %x, i32 %bit, i32* %p0, i32* %p1) {
+; ALL-LABEL: @p5_both_liveout(
+; ALL-NEXT:  entry:
+; ALL-NEXT:[[BITMASK:%.*]] = shl i32 1, [[BIT:%.*]], [[DBG88:!dbg !.*]]
+; ALL-NEXT:call void @llvm.dbg.value(metadata i32 [[BITMASK]], 
[[META83:metadata !.*]], metadata !DIExpression()), [[DBG88]]
+; ALL-NEXT:br label [[LOOP:%.*]], [[DBG89:!dbg !.*]]
+; ALL:   loop:
+; ALL-NEXT:[[X_CURR:%.*]] = phi i32 [ [[X:%.*]], [[ENTRY:%.*]] ], [ 
[[X_NEXT:%.*]], [[LOOP]] ], [[

[llvm-branch-commits] [llvm] 3a042dc - [AMDGPU] Fix default value of glc for mubuf rtn atomics

[Petar Avramovic via llvm-branch-commits]

Author: Petar Avramovic
Date: 2020-12-07T14:00:08+01:00
New Revision: 3a042dcd2e1ab53244d504cd87a81b577a62a6ea

URL: 
https://github.com/llvm/llvm-project/commit/3a042dcd2e1ab53244d504cd87a81b577a62a6ea
DIFF: 
https://github.com/llvm/llvm-project/commit/3a042dcd2e1ab53244d504cd87a81b577a62a6ea.diff

LOG: [AMDGPU] Fix default value of glc for mubuf rtn atomics

Mubuf rtn atomics use GLC_1 thus default value for glc operand
should be -1, see https://reviews.llvm.org/D90730.
This allows us to report error when rtn atomic requires glc=1
but does not have glc operand in input.

Differential Revision: https://reviews.llvm.org/D92654

Added: 


Modified: 
llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
llvm/test/MC/AMDGPU/gfx1030_err.s
llvm/test/MC/AMDGPU/gfx1030_new.s

Removed: 




diff  --git a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp 
b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
index 45774935287b..56d97588df6e 100644
--- a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+++ b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
@@ -6691,7 +6691,8 @@ void AMDGPUAsmParser::cvtMubufImpl(MCInst &Inst,
 
   addOptionalImmOperand(Inst, Operands, OptionalIdx, 
AMDGPUOperand::ImmTyOffset);
   if (!IsAtomic || IsAtomicReturn) {
-addOptionalImmOperand(Inst, Operands, OptionalIdx, 
AMDGPUOperand::ImmTyGLC);
+addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyGLC,
+  IsAtomicReturn ? -1 : 0);
   }
   addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTySLC);
 

diff  --git a/llvm/test/MC/AMDGPU/gfx1030_err.s 
b/llvm/test/MC/AMDGPU/gfx1030_err.s
index 5a57d3b3048a..dbee18bd2d91 100644
--- a/llvm/test/MC/AMDGPU/gfx1030_err.s
+++ b/llvm/test/MC/AMDGPU/gfx1030_err.s
@@ -140,3 +140,9 @@ ds_write_src2_b32 v1 offset:65535
 
 ds_write_src2_b64 v1 offset:65535
 // GFX10: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
+
+buffer_atomic_csub v5, off, s[8:11], s3 offset:4095
+// GFX10: :[[@LINE-1]]:{{[0-9]+}}: error: instruction must use glc
+
+global_atomic_csub v2, v[0:1], v2, off offset:100 slc
+// GFX10: :[[@LINE-1]]:{{[0-9]+}}: error: instruction must use glc

diff  --git a/llvm/test/MC/AMDGPU/gfx1030_new.s 
b/llvm/test/MC/AMDGPU/gfx1030_new.s
index 8dc977498cd5..94f4ff3a237a 100644
--- a/llvm/test/MC/AMDGPU/gfx1030_new.s
+++ b/llvm/test/MC/AMDGPU/gfx1030_new.s
@@ -27,7 +27,7 @@ global_atomic_csub v2, v0, v2, s[2:3] glc
 global_atomic_csub v2, v0, v2, s[2:3] offset:100 glc slc
 // GFX10: encoding: [0x64,0x80,0xd3,0xdc,0x00,0x02,0x02,0x02]
 
-buffer_atomic_csub v5, off, s[8:11], s3
+buffer_atomic_csub v5, off, s[8:11], s3 glc
 // GFX10: encoding: [0x00,0x40,0xd0,0xe0,0x00,0x05,0x02,0x03]
 
 buffer_atomic_csub v5, off, s[8:11], s3 offset:4095 glc



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[llvm-branch-commits] [llvm] ecaff13 - [MemProf] Fix a potential "permission denied" test failure on some systems.

[Haojian Wu via llvm-branch-commits]

Author: Haojian Wu
Date: 2020-12-07T14:04:23+01:00
New Revision: ecaff13fc0bc1105ad910a72a5d0dcd164b35191

URL: 
https://github.com/llvm/llvm-project/commit/ecaff13fc0bc1105ad910a72a5d0dcd164b35191
DIFF: 
https://github.com/llvm/llvm-project/commit/ecaff13fc0bc1105ad910a72a5d0dcd164b35191.diff

LOG: [MemProf] Fix a potential "permission denied" test failure on some systems.

NFC, to make the test more robost.

Added: 


Modified: 
llvm/test/Instrumentation/HeapProfiler/shadow.ll

Removed: 




diff  --git a/llvm/test/Instrumentation/HeapProfiler/shadow.ll 
b/llvm/test/Instrumentation/HeapProfiler/shadow.ll
index 4472f3d33a0f..6aa3a33aa91a 100644
--- a/llvm/test/Instrumentation/HeapProfiler/shadow.ll
+++ b/llvm/test/Instrumentation/HeapProfiler/shadow.ll
@@ -1,6 +1,6 @@
 ; RUN: opt < %s -passes='function(memprof),module(memprof-module)' -S | 
FileCheck --check-prefixes=STATIC %s
 
-; RUN: cp %s %t.pic.ll
+; RUN: cat %s > %t.pic.ll
 ; RUN: echo -e '!llvm.module.flags = !{!0}\n!0 = !{i32 7, !"PIC Level", i32 
1}' >> %t.pic.ll
 ; RUN: opt < %t.pic.ll -passes='function(memprof),module(memprof-module)' -S | 
FileCheck --check-prefixes=PIC %s
 



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[llvm-branch-commits] [llvm] 111f559 - [SVE][CodeGen] Call refineIndexType & refineUniformBase from visitMGATHER

[Kerry McLaughlin via llvm-branch-commits]

Author: Kerry McLaughlin
Date: 2020-12-07T13:20:19Z
New Revision: 111f559bbd12c59b0ac450ea2feb8f6981705647

URL: 
https://github.com/llvm/llvm-project/commit/111f559bbd12c59b0ac450ea2feb8f6981705647
DIFF: 
https://github.com/llvm/llvm-project/commit/111f559bbd12c59b0ac450ea2feb8f6981705647.diff

LOG: [SVE][CodeGen] Call refineIndexType & refineUniformBase from visitMGATHER

The refineIndexType & refineUniformBase functions added by D90942 can also be 
used to
improve CodeGen of masked gathers.

These changes were split out from D91092

Reviewed By: sdesmalen

Differential Revision: https://reviews.llvm.org/D92319

Added: 


Modified: 
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/test/CodeGen/AArch64/sve-masked-gather-32b-signed-scaled.ll
llvm/test/CodeGen/AArch64/sve-masked-gather-32b-signed-unscaled.ll
llvm/test/CodeGen/AArch64/sve-masked-gather-32b-unsigned-scaled.ll
llvm/test/CodeGen/AArch64/sve-masked-gather-32b-unsigned-unscaled.ll
llvm/test/CodeGen/AArch64/sve-masked-gather-64b-unscaled.ll
llvm/test/CodeGen/X86/masked_gather_scatter.ll

Removed: 




diff  --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp 
b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 5481c52a5b12..96baaabdb813 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -9410,13 +9410,13 @@ bool refineUniformBase(SDValue &BasePtr, SDValue 
&Index, SelectionDAG &DAG) {
 }
 
 // Fold sext/zext of index into index type.
-bool refineIndexType(MaskedScatterSDNode *MSC, SDValue &Index, bool Scaled,
- SelectionDAG &DAG) {
+bool refineIndexType(MaskedGatherScatterSDNode *MGS, SDValue &Index,
+ bool Scaled, SelectionDAG &DAG) {
   const TargetLowering &TLI = DAG.getTargetLoweringInfo();
 
   if (Index.getOpcode() == ISD::ZERO_EXTEND) {
 SDValue Op = Index.getOperand(0);
-MSC->setIndexType(Scaled ? ISD::UNSIGNED_SCALED : ISD::UNSIGNED_UNSCALED);
+MGS->setIndexType(Scaled ? ISD::UNSIGNED_SCALED : ISD::UNSIGNED_UNSCALED);
 if (TLI.shouldRemoveExtendFromGSIndex(Op.getValueType())) {
   Index = Op;
   return true;
@@ -9425,7 +9425,7 @@ bool refineIndexType(MaskedScatterSDNode *MSC, SDValue 
&Index, bool Scaled,
 
   if (Index.getOpcode() == ISD::SIGN_EXTEND) {
 SDValue Op = Index.getOperand(0);
-MSC->setIndexType(Scaled ? ISD::SIGNED_SCALED : ISD::SIGNED_UNSCALED);
+MGS->setIndexType(Scaled ? ISD::SIGNED_SCALED : ISD::SIGNED_UNSCALED);
 if (TLI.shouldRemoveExtendFromGSIndex(Op.getValueType())) {
   Index = Op;
   return true;
@@ -9494,11 +9494,30 @@ SDValue DAGCombiner::visitMSTORE(SDNode *N) {
 SDValue DAGCombiner::visitMGATHER(SDNode *N) {
   MaskedGatherSDNode *MGT = cast(N);
   SDValue Mask = MGT->getMask();
+  SDValue Chain = MGT->getChain();
+  SDValue Index = MGT->getIndex();
+  SDValue Scale = MGT->getScale();
+  SDValue PassThru = MGT->getPassThru();
+  SDValue BasePtr = MGT->getBasePtr();
   SDLoc DL(N);
 
   // Zap gathers with a zero mask.
   if (ISD::isBuildVectorAllZeros(Mask.getNode()))
-return CombineTo(N, MGT->getPassThru(), MGT->getChain());
+return CombineTo(N, PassThru, MGT->getChain());
+
+  if (refineUniformBase(BasePtr, Index, DAG)) {
+SDValue Ops[] = {Chain, PassThru, Mask, BasePtr, Index, Scale};
+return DAG.getMaskedGather(DAG.getVTList(N->getValueType(0), MVT::Other),
+   PassThru.getValueType(), DL, Ops,
+   MGT->getMemOperand(), MGT->getIndexType());
+  }
+
+  if (refineIndexType(MGT, Index, MGT->isIndexScaled(), DAG)) {
+SDValue Ops[] = {Chain, PassThru, Mask, BasePtr, Index, Scale};
+return DAG.getMaskedGather(DAG.getVTList(N->getValueType(0), MVT::Other),
+   PassThru.getValueType(), DL, Ops,
+   MGT->getMemOperand(), MGT->getIndexType());
+  }
 
   return SDValue();
 }

diff  --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp 
b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index d729252c92d9..517f5e965157 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -3894,6 +3894,9 @@ SDValue AArch64TargetLowering::LowerMGATHER(SDValue Op,
 
   SDVTList VTs = DAG.getVTList(PassThru.getSimpleValueType(), MVT::Other);
 
+  if (getGatherScatterIndexIsExtended(Index))
+Index = Index.getOperand(0);
+
   SDValue Ops[] = {Chain, Mask, BasePtr, Index, InputVT, PassThru};
   return DAG.getNode(getGatherVecOpcode(IsScaled, IsSigned, IdxNeedsExtend), 
DL,
  VTs, Ops);

diff  --git a/llvm/test/CodeGen/AArch64/sve-masked-gather-32b-signed-scaled.ll 
b/llvm/test/CodeGen/AArch64/sve-masked-gather-32b-signed-scaled.ll
index 747468ae3cf4..32dca0d26cdc 100644
--- a/llvm/test/CodeGen/AArch64

[llvm-branch-commits] [llvm] 9d4501e - [VE] Add vcp and vex intrinsic instructions

[Kazushi Marukawa via llvm-branch-commits]

Author: Kazushi (Jam) Marukawa
Date: 2020-12-07T22:56:55+09:00
New Revision: 9d4501e2b42a2f413000661155a637e495597026

URL: 
https://github.com/llvm/llvm-project/commit/9d4501e2b42a2f413000661155a637e495597026
DIFF: 
https://github.com/llvm/llvm-project/commit/9d4501e2b42a2f413000661155a637e495597026.diff

LOG: [VE] Add vcp and vex intrinsic instructions

Add vcp and vex intrinsic instructions and regression tests.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D92752

Added: 
llvm/test/CodeGen/VE/VELIntrinsics/vcp.ll
llvm/test/CodeGen/VE/VELIntrinsics/vex.ll

Modified: 
llvm/include/llvm/IR/IntrinsicsVEVL.gen.td
llvm/lib/Target/VE/VEInstrIntrinsicVL.gen.td

Removed: 




diff  --git a/llvm/include/llvm/IR/IntrinsicsVEVL.gen.td 
b/llvm/include/llvm/IR/IntrinsicsVEVL.gen.td
index f62d7cdafdd0..c7ddbbc4ffbd 100644
--- a/llvm/include/llvm/IR/IntrinsicsVEVL.gen.td
+++ b/llvm/include/llvm/IR/IntrinsicsVEVL.gen.td
@@ -798,3 +798,5 @@ let TargetPrefix = "ve" in def int_ve_vl_vmrgw_vsvMl : 
GCCBuiltin<"__builtin_ve_
 let TargetPrefix = "ve" in def int_ve_vl_vmrgw_vsvMvl : 
GCCBuiltin<"__builtin_ve_vl_vmrgw_vsvMvl">, Intrinsic<[LLVMType], 
[LLVMType, LLVMType, LLVMType, LLVMType, 
LLVMType], [IntrNoMem]>;
 let TargetPrefix = "ve" in def int_ve_vl_vshf_vvvsl : 
GCCBuiltin<"__builtin_ve_vl_vshf_vvvsl">, Intrinsic<[LLVMType], 
[LLVMType, LLVMType, LLVMType, LLVMType], 
[IntrNoMem]>;
 let TargetPrefix = "ve" in def int_ve_vl_vshf_vvvsvl : 
GCCBuiltin<"__builtin_ve_vl_vshf_vvvsvl">, Intrinsic<[LLVMType], 
[LLVMType, LLVMType, LLVMType, LLVMType, 
LLVMType], [IntrNoMem]>;
+let TargetPrefix = "ve" in def int_ve_vl_vcp_vvmvl : 
GCCBuiltin<"__builtin_ve_vl_vcp_vvmvl">, Intrinsic<[LLVMType], 
[LLVMType, LLVMType, LLVMType, LLVMType], 
[IntrNoMem]>;
+let TargetPrefix = "ve" in def int_ve_vl_vex_vvmvl : 
GCCBuiltin<"__builtin_ve_vl_vex_vvmvl">, Intrinsic<[LLVMType], 
[LLVMType, LLVMType, LLVMType, LLVMType], 
[IntrNoMem]>;

diff  --git a/llvm/lib/Target/VE/VEInstrIntrinsicVL.gen.td 
b/llvm/lib/Target/VE/VEInstrIntrinsicVL.gen.td
index 651ea2fb9015..2854ecd69872 100644
--- a/llvm/lib/Target/VE/VEInstrIntrinsicVL.gen.td
+++ b/llvm/lib/Target/VE/VEInstrIntrinsicVL.gen.td
@@ -1021,3 +1021,5 @@ def : Pat<(int_ve_vl_vshf_vvvsl v256f64:$vy, v256f64:$vz, 
i64:$sy, i32:$vl), (VS
 def : Pat<(int_ve_vl_vshf_vvvsvl v256f64:$vy, v256f64:$vz, i64:$sy, 
v256f64:$pt, i32:$vl), (VSHFvvrl_v v256f64:$vy, v256f64:$vz, i64:$sy, i32:$vl, 
v256f64:$pt)>;
 def : Pat<(int_ve_vl_vshf_vvvsl v256f64:$vy, v256f64:$vz, uimm6:$N, i32:$vl), 
(VSHFvvil v256f64:$vy, v256f64:$vz, (ULO7 $N), i32:$vl)>;
 def : Pat<(int_ve_vl_vshf_vvvsvl v256f64:$vy, v256f64:$vz, uimm6:$N, 
v256f64:$pt, i32:$vl), (VSHFvvil_v v256f64:$vy, v256f64:$vz, (ULO7 $N), 
i32:$vl, v256f64:$pt)>;
+def : Pat<(int_ve_vl_vcp_vvmvl v256f64:$vz, v256i1:$vm, v256f64:$pt, i32:$vl), 
(VCPvml_v v256f64:$vz, v256i1:$vm, i32:$vl, v256f64:$pt)>;
+def : Pat<(int_ve_vl_vex_vvmvl v256f64:$vz, v256i1:$vm, v256f64:$pt, i32:$vl), 
(VEXvml_v v256f64:$vz, v256i1:$vm, i32:$vl, v256f64:$pt)>;

diff  --git a/llvm/test/CodeGen/VE/VELIntrinsics/vcp.ll 
b/llvm/test/CodeGen/VE/VELIntrinsics/vcp.ll
new file mode 100644
index ..608a6bd2d8f4
--- /dev/null
+++ b/llvm/test/CodeGen/VE/VELIntrinsics/vcp.ll
@@ -0,0 +1,24 @@
+; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s
+
+;;; Test vector compress intrinsic instructions
+;;;
+;;; Note:
+;;;   We test VCP*vml_v instruction.
+
+; Function Attrs: nounwind readnone
+define fastcc <256 x double> @vcp_vvmvl(<256 x double> %0, <256 x i1> %1, <256 
x double> %2) {
+; CHECK-LABEL: vcp_vvmvl:
+; CHECK:   # %bb.0:
+; CHECK-NEXT:lea %s0, 128
+; CHECK-NEXT:lvl %s0
+; CHECK-NEXT:vcp %v1, %v0, %vm1
+; CHECK-NEXT:lea %s16, 256
+; CHECK-NEXT:lvl %s16
+; CHECK-NEXT:vor %v0, (0)1, %v1
+; CHECK-NEXT:b.l.t (, %s10)
+  %4 = tail call fast <256 x double> @llvm.ve.vl.vcp.vvmvl(<256 x double> %0, 
<256 x i1> %1, <256 x double> %2, i32 128)
+  ret <256 x double> %4
+}
+
+; Function Attrs: nounwind readnone
+declare <256 x double> @llvm.ve.vl.vcp.vvmvl(<256 x double>, <256 x i1>, <256 
x double>, i32)

diff  --git a/llvm/test/CodeGen/VE/VELIntrinsics/vex.ll 
b/llvm/test/CodeGen/VE/VELIntrinsics/vex.ll
new file mode 100644
index ..c33f941d48ae
--- /dev/null
+++ b/llvm/test/CodeGen/VE/VELIntrinsics/vex.ll
@@ -0,0 +1,24 @@
+; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s
+
+;;; Test vector expand intrinsic instructions
+;;;
+;;; Note:
+;;;   We test VEX*vml_v instruction.
+
+; Function Attrs: nounwind readnone
+define fastcc <256 x double> @vex_vvmvl(<256 x double> %0, <256 x i1> %1, <256 
x double> %2) {
+; CHECK-LABEL: vex_vvmvl:
+; CHECK:   # %bb.0:
+; CHECK-NEXT:lea %s0, 128
+; CHECK-NEXT:lvl %s0
+; CHECK-NEXT:vex %v1, %v0, %vm1
+; CHECK-NEXT:lea %s16, 256
+; CHECK-NEXT:lvl %s16
+; CHE

[llvm-branch-commits] [clang-tools-extra] 8625f5b - [clang-tidy][NFC] Streamline CheckOptions error reporting.

[Nathan James via llvm-branch-commits]

Author: Nathan James
Date: 2020-12-07T14:05:49Z
New Revision: 8625f5bc799f4ee1c85126bd007166fe6dff14a1

URL: 
https://github.com/llvm/llvm-project/commit/8625f5bc799f4ee1c85126bd007166fe6dff14a1
DIFF: 
https://github.com/llvm/llvm-project/commit/8625f5bc799f4ee1c85126bd007166fe6dff14a1.diff

LOG: [clang-tidy][NFC] Streamline CheckOptions error reporting.

Added: 


Modified: 
clang-tools-extra/clang-tidy/ClangTidyCheck.cpp

Removed: 




diff  --git a/clang-tools-extra/clang-tidy/ClangTidyCheck.cpp 
b/clang-tools-extra/clang-tidy/ClangTidyCheck.cpp
index c99931e0aa3a..be68dfbedb29 100644
--- a/clang-tools-extra/clang-tidy/ClangTidyCheck.cpp
+++ b/clang-tools-extra/clang-tidy/ClangTidyCheck.cpp
@@ -21,28 +21,22 @@ char UnparseableEnumOptionError::ID;
 char UnparseableIntegerOptionError::ID;
 
 std::string MissingOptionError::message() const {
-  llvm::SmallString<128> Buffer;
-  llvm::raw_svector_ostream Output(Buffer);
-  Output << "option not found '" << OptionName << '\'';
+  llvm::SmallString<128> Buffer({"option not found '", OptionName, "'"});
   return std::string(Buffer);
 }
 
 std::string UnparseableEnumOptionError::message() const {
-  llvm::SmallString<128> Buffer;
-  llvm::raw_svector_ostream Output(Buffer);
-  Output << "invalid configuration value '" << LookupValue << "' for option '"
- << LookupName << '\'';
+  llvm::SmallString<256> Buffer({"invalid configuration value '", LookupValue,
+ "' for option '", LookupName, "'"});
   if (SuggestedValue)
-Output << "; did you mean '" << *SuggestedValue << "'?";
+Buffer.append({"; did you mean '", *SuggestedValue, "'?"});
   return std::string(Buffer);
 }
 
 std::string UnparseableIntegerOptionError::message() const {
-  llvm::SmallString<128> Buffer;
-  llvm::raw_svector_ostream Output(Buffer);
-  Output << "invalid configuration value '" << LookupValue << "' for option '"
- << LookupName << "'; expected "
- << (IsBoolean ? "a bool" : "an integer value");
+  llvm::SmallString<256> Buffer({"invalid configuration value '", LookupValue,
+ "' for option '", LookupName, "'; expected ",
+ (IsBoolean ? "a bool" : "an integer value")});
   return std::string(Buffer);
 }
 



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[llvm-branch-commits] [llvm] 97c08db - [SLP]Update test checks, NFC.

[Alexey Bataev via llvm-branch-commits]

Author: Alexey Bataev
Date: 2020-12-07T06:12:05-08:00
New Revision: 97c08db84e3a7eb4eba1eab2678f6f68c2afaca3

URL: 
https://github.com/llvm/llvm-project/commit/97c08db84e3a7eb4eba1eab2678f6f68c2afaca3
DIFF: 
https://github.com/llvm/llvm-project/commit/97c08db84e3a7eb4eba1eab2678f6f68c2afaca3.diff

LOG: [SLP]Update test checks, NFC.

Added: 


Modified: 
llvm/test/Transforms/SLPVectorizer/AArch64/PR38339.ll

Removed: 




diff  --git a/llvm/test/Transforms/SLPVectorizer/AArch64/PR38339.ll 
b/llvm/test/Transforms/SLPVectorizer/AArch64/PR38339.ll
index 1a981a32804b..16e5da0a7e43 100644
--- a/llvm/test/Transforms/SLPVectorizer/AArch64/PR38339.ll
+++ b/llvm/test/Transforms/SLPVectorizer/AArch64/PR38339.ll
@@ -9,7 +9,7 @@ define void @f1(<2 x i16> %x, i16* %a) {
 ; CHECK-NEXT:[[PTR2:%.*]] = getelementptr inbounds [4 x i16], [4 x i16]* 
undef, i16 0, i16 2
 ; CHECK-NEXT:[[PTR3:%.*]] = getelementptr inbounds [4 x i16], [4 x i16]* 
undef, i16 0, i16 3
 ; CHECK-NEXT:[[TMP1:%.*]] = extractelement <4 x i16> [[SHUFFLE]], i32 0
-; CHECK-NEXT:store i16 [[TMP1]], i16* [[A:%.*]]
+; CHECK-NEXT:store i16 [[TMP1]], i16* [[A:%.*]], align 2
 ; CHECK-NEXT:[[TMP2:%.*]] = bitcast i16* [[PTR0]] to <4 x i16>*
 ; CHECK-NEXT:store <4 x i16> [[SHUFFLE]], <4 x i16>* [[TMP2]], align 2
 ; CHECK-NEXT:ret void
@@ -41,7 +41,7 @@ define void @f2(<2 x i16> %x, i16* %a) {
 ; CHECK-NEXT:[[PTR2:%.*]] = getelementptr inbounds [4 x i16], [4 x i16]* 
undef, i16 0, i16 2
 ; CHECK-NEXT:[[PTR3:%.*]] = getelementptr inbounds [4 x i16], [4 x i16]* 
undef, i16 0, i16 3
 ; CHECK-NEXT:[[TMP0:%.*]] = extractelement <4 x i16> [[SHUFFLE]], i32 0
-; CHECK-NEXT:store i16 [[TMP0]], i16* [[A]]
+; CHECK-NEXT:store i16 [[TMP0]], i16* [[A]], align 2
 ; CHECK-NEXT:[[TMP1:%.*]] = bitcast i16* [[PTR0]] to <4 x i16>*
 ; CHECK-NEXT:store <4 x i16> [[SHUFFLE]], <4 x i16>* [[TMP1]], align 2
 ; CHECK-NEXT:[[A_VAL:%.*]] = load i16, i16* [[A]], align 2
@@ -89,7 +89,7 @@ define void @f3(<2 x i16> %x, i16* %a) {
 ; CHECK-NEXT:[[PTR2:%.*]] = getelementptr inbounds [4 x i16], [4 x i16]* 
undef, i16 0, i16 2
 ; CHECK-NEXT:[[PTR3:%.*]] = getelementptr inbounds [4 x i16], [4 x i16]* 
undef, i16 0, i16 3
 ; CHECK-NEXT:[[TMP0:%.*]] = extractelement <4 x i16> [[SHUFFLE]], i32 0
-; CHECK-NEXT:store i16 [[TMP0]], i16* [[A]]
+; CHECK-NEXT:store i16 [[TMP0]], i16* [[A]], align 2
 ; CHECK-NEXT:[[TMP1:%.*]] = bitcast i16* [[PTR0]] to <4 x i16>*
 ; CHECK-NEXT:store <4 x i16> [[SHUFFLE]], <4 x i16>* [[TMP1]], align 2
 ; CHECK-NEXT:[[A_VAL:%.*]] = load i16, i16* [[A]], align 2



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[llvm-branch-commits] [lld] feadc37 - [lld/mac] Make X86_64::getImplicitAddend not do heap allocations

[Nico Weber via llvm-branch-commits]

Author: Nico Weber
Date: 2020-12-07T09:23:51-05:00
New Revision: feadc3798d9ab123057a7a1064897188ac8de934

URL: 
https://github.com/llvm/llvm-project/commit/feadc3798d9ab123057a7a1064897188ac8de934
DIFF: 
https://github.com/llvm/llvm-project/commit/feadc3798d9ab123057a7a1064897188ac8de934.diff

LOG: [lld/mac] Make X86_64::getImplicitAddend not do heap allocations

Speeds up linking Chromium's base_unittests almost 10%. According to ministat:

N   Min   MaxMedian   AvgStddev
x   50.721932890.730731960.725608110.72565799  0.0032265649
+   50.640695810.671731950.658763890.65796089   0.011349451
Difference at 95.0% confidence
-0.0676971 +/- 0.0121682
-9.32906% +/- 1.67685%
(Student's t, pooled s = 0.00834328)

Differential Revision: https://reviews.llvm.org/D92734

Added: 


Modified: 
lld/MachO/Arch/X86_64.cpp

Removed: 




diff  --git a/lld/MachO/Arch/X86_64.cpp b/lld/MachO/Arch/X86_64.cpp
index 19e62a919caf..7f4024cc998d 100644
--- a/lld/MachO/Arch/X86_64.cpp
+++ b/lld/MachO/Arch/X86_64.cpp
@@ -52,9 +52,8 @@ static std::string getErrorLocation(MemoryBufferRef mb, const 
section_64 &sec,
 
 static void validateLength(MemoryBufferRef mb, const section_64 &sec,
const relocation_info &rel,
-   const std::vector &validLengths) {
-  if (std::find(validLengths.begin(), validLengths.end(), rel.r_length) !=
-  validLengths.end())
+   ArrayRef validLengths) {
+  if (find(validLengths, rel.r_length) != validLengths.end())
 return;
 
   std::string msg = getErrorLocation(mb, sec, rel) + ": relocations of type " +



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[llvm-branch-commits] [lldb] 733e2ae - Revert "[lldb] [POSIX-DYLD] Add libraries from initial eTakeSnapshot action"

[Michał Górny via llvm-branch-commits]

Author: Michał Górny
Date: 2020-12-07T15:58:49+01:00
New Revision: 733e2ae8cdf3d13e0a1ef9878e8500f446ffa699

URL: 
https://github.com/llvm/llvm-project/commit/733e2ae8cdf3d13e0a1ef9878e8500f446ffa699
DIFF: 
https://github.com/llvm/llvm-project/commit/733e2ae8cdf3d13e0a1ef9878e8500f446ffa699.diff

LOG: Revert "[lldb] [POSIX-DYLD] Add libraries from initial eTakeSnapshot 
action"

This reverts commit 09b08833f301ea375137931d26b7193101f82ceb.

This code is wrong on Linux, and causes ld-linux and linux-vdso to be
reported twice.  I need to work on it more.

Added: 


Modified: 
lldb/source/Plugins/DynamicLoader/POSIX-DYLD/DYLDRendezvous.cpp
lldb/source/Plugins/Process/FreeBSDRemote/NativeProcessFreeBSD.cpp
lldb/test/API/api/multithreaded/TestMultithreaded.py

lldb/test/API/functionalities/breakpoint/global_constructor/TestBreakpointInGlobalConstructor.py
lldb/test/API/functionalities/memory-region/TestMemoryRegion.py
lldb/test/API/tools/lldb-server/TestLldbGdbServer.py

lldb/test/API/tools/lldb-server/libraries-svr4/TestGdbRemoteLibrariesSvr4Support.py
lldb/test/Shell/Unwind/thread-step-out-ret-addr-check.test

Removed: 




diff  --git a/lldb/source/Plugins/DynamicLoader/POSIX-DYLD/DYLDRendezvous.cpp 
b/lldb/source/Plugins/DynamicLoader/POSIX-DYLD/DYLDRendezvous.cpp
index c06d640c654c..15b3805003a5 100644
--- a/lldb/source/Plugins/DynamicLoader/POSIX-DYLD/DYLDRendezvous.cpp
+++ b/lldb/source/Plugins/DynamicLoader/POSIX-DYLD/DYLDRendezvous.cpp
@@ -295,15 +295,8 @@ bool DYLDRendezvous::SaveSOEntriesFromRemote(
   return false;
 
 // Only add shared libraries and not the executable.
-if (!SOEntryIsMainExecutable(entry)) {
+if (!SOEntryIsMainExecutable(entry))
   m_soentries.push_back(entry);
-  // This function is called only once, at the very beginning
-  // of the program.  Make sure to add all soentries that are
-  // already present at this point.  This is necessary to cover
-  // DT_NEEDED on FreeBSD since (unlike Linux) it does not report
-  // loading these libraries separately.
-  m_added_soentries.push_back(entry);
-}
   }
 
   m_loaded_modules = module_list;

diff  --git 
a/lldb/source/Plugins/Process/FreeBSDRemote/NativeProcessFreeBSD.cpp 
b/lldb/source/Plugins/Process/FreeBSDRemote/NativeProcessFreeBSD.cpp
index 163093c2ab1f..e6abab848e12 100644
--- a/lldb/source/Plugins/Process/FreeBSDRemote/NativeProcessFreeBSD.cpp
+++ b/lldb/source/Plugins/Process/FreeBSDRemote/NativeProcessFreeBSD.cpp
@@ -485,6 +485,9 @@ Status NativeProcessFreeBSD::Kill() {
 Status NativeProcessFreeBSD::GetMemoryRegionInfo(lldb::addr_t load_addr,
  MemoryRegionInfo &range_info) 
{
 
+  // TODO: figure out why it breaks stuff
+  return Status("currently breaks determining module list");
+
   if (m_supports_mem_region == LazyBool::eLazyBoolNo) {
 // We're done.
 return Status("unsupported");

diff  --git a/lldb/test/API/api/multithreaded/TestMultithreaded.py 
b/lldb/test/API/api/multithreaded/TestMultithreaded.py
index 60c2c3b372cb..c6c75de386fa 100644
--- a/lldb/test/API/api/multithreaded/TestMultithreaded.py
+++ b/lldb/test/API/api/multithreaded/TestMultithreaded.py
@@ -31,6 +31,7 @@ def setUp(self):
 @skipIfNoSBHeaders
 # clang-cl does not support throw or catch (llvm.org/pr24538)
 @skipIfWindows
+@expectedFailureAll(oslist=['freebsd'], bugnumber='llvm.org/pr48370')
 def test_python_stop_hook(self):
 """Test that you can run a python command in a stop-hook when stdin is 
File based. """
 self.build_and_test('driver.cpp test_stop-hook.cpp',

diff  --git 
a/lldb/test/API/functionalities/breakpoint/global_constructor/TestBreakpointInGlobalConstructor.py
 
b/lldb/test/API/functionalities/breakpoint/global_constructor/TestBreakpointInGlobalConstructor.py
index 4439607d91cf..81c3798ebba7 100644
--- 
a/lldb/test/API/functionalities/breakpoint/global_constructor/TestBreakpointInGlobalConstructor.py
+++ 
b/lldb/test/API/functionalities/breakpoint/global_constructor/TestBreakpointInGlobalConstructor.py
@@ -15,6 +15,7 @@ class TestBreakpointInGlobalConstructors(TestBase):
 mydir = TestBase.compute_mydir(__file__)
 NO_DEBUG_INFO_TESTCASE = True
 
+@expectedFailureAll(oslist=["freebsd"], bugnumber='llvm.org/pr48373')
 @expectedFailureNetBSD
 def test(self):
 self.build()

diff  --git a/lldb/test/API/functionalities/memory-region/TestMemoryRegion.py 
b/lldb/test/API/functionalities/memory-region/TestMemoryRegion.py
index 61e64d44e794..36984b3d1666 100644
--- a/lldb/test/API/functionalities/memory-region/TestMemoryRegion.py
+++ b/lldb/test/API/functionalities/memory-region/TestMemoryRegion.py
@@ -23,6 +23,7 @@ def setUp(self):
 'main.cpp',
 '// Run here before printing memory regions')
 
+@expectedFailureAll(oslist=["freebsd"])
   

[llvm-branch-commits] [lld] 8f91f38 - [LLD] Search archives for symbol defs to override COMMON symbols.

[Sean Fertile via llvm-branch-commits]

Author: Sean Fertile
Date: 2020-12-07T10:09:19-05:00
New Revision: 8f91f38148e84a1b3fd8b5a090e53ff5dd0258f5

URL: 
https://github.com/llvm/llvm-project/commit/8f91f38148e84a1b3fd8b5a090e53ff5dd0258f5
DIFF: 
https://github.com/llvm/llvm-project/commit/8f91f38148e84a1b3fd8b5a090e53ff5dd0258f5.diff

LOG: [LLD] Search archives for symbol defs to override COMMON symbols.

This patch changes the archive handling to enable the semantics needed
for legacy FORTRAN common blocks and block data. When we have a COMMON
definition of a symbol and are including an archive, LLD will now
search the members for global/weak defintions to override the COMMON
symbol. The previous LLD behavior (where a member would only be included
if it satisifed some other needed symbol definition) can be re-enabled with the
option '-no-fortran-common'.

Differential Revision: https://reviews.llvm.org/D86142

Added: 
lld/test/ELF/common-archive-lookup.s

Modified: 
lld/ELF/Config.h
lld/ELF/Driver.cpp
lld/ELF/InputFiles.cpp
lld/ELF/InputFiles.h
lld/ELF/Options.td
lld/ELF/Symbols.cpp
lld/docs/ld.lld.1
lld/test/ELF/warn-backrefs.s

Removed: 




diff  --git a/lld/ELF/Config.h b/lld/ELF/Config.h
index 547e290c8939..0ec4cb9a0432 100644
--- a/lld/ELF/Config.h
+++ b/lld/ELF/Config.h
@@ -163,6 +163,7 @@ struct Configuration {
   bool fixCortexA53Errata843419;
   bool fixCortexA8;
   bool formatBinary = false;
+  bool fortranCommon;
   bool gcSections;
   bool gdbIndex;
   bool gnuHash = false;

diff  --git a/lld/ELF/Driver.cpp b/lld/ELF/Driver.cpp
index 395b6200aa08..87ca200877df 100644
--- a/lld/ELF/Driver.cpp
+++ b/lld/ELF/Driver.cpp
@@ -974,6 +974,8 @@ static void readConfigs(opt::InputArgList &args) {
  !args.hasArg(OPT_relocatable);
   config->fixCortexA8 =
   args.hasArg(OPT_fix_cortex_a8) && !args.hasArg(OPT_relocatable);
+  config->fortranCommon =
+  args.hasFlag(OPT_fortran_common, OPT_no_fortran_common, true);
   config->gcSections = args.hasFlag(OPT_gc_sections, OPT_no_gc_sections, 
false);
   config->gnuUnique = args.hasFlag(OPT_gnu_unique, OPT_no_gnu_unique, true);
   config->gdbIndex = args.hasFlag(OPT_gdb_index, OPT_no_gdb_index, false);

diff  --git a/lld/ELF/InputFiles.cpp b/lld/ELF/InputFiles.cpp
index f44260959d27..3ff93c85617c 100644
--- a/lld/ELF/InputFiles.cpp
+++ b/lld/ELF/InputFiles.cpp
@@ -1237,6 +1237,88 @@ void ArchiveFile::fetch(const Archive::Symbol &sym) {
   parseFile(file);
 }
 
+// The handling of tentative definitions (COMMON symbols) in archives is murky.
+// A tentative defintion will be promoted to a global definition if there are 
no
+// non-tentative definitions to dominate it. When we hold a tentative 
definition
+// to a symbol and are inspecting archive memebers for inclusion there are 2
+// ways we can proceed:
+//
+// 1) Consider the tentative definition a 'real' definition (ie promotion from
+//tentative to real definition has already happened) and not inspect
+//archive members for Global/Weak definitions to replace the tentative
+//definition. An archive member would only be included if it satisfies some
+//other undefined symbol. This is the behavior Gold uses.
+//
+// 2) Consider the tentative definition as still undefined (ie the promotion to
+//a real definiton happens only after all symbol resolution is done).
+//The linker searches archive memebers for global or weak definitions to
+//replace the tentative definition with. This is the behavior used by
+//GNU ld.
+//
+//  The second behavior is inherited from SysVR4, which based it on the FORTRAN
+//  COMMON BLOCK model. This behavior is needed for proper initalizations in 
old
+//  (pre F90) FORTRAN code that is packaged into an archive.
+//
+//  The following functions search archive members for defintions to replace
+//  tentative defintions (implementing behavior 2).
+static bool isBitcodeNonCommonDef(MemoryBufferRef mb, StringRef symName,
+  StringRef archiveName) {
+  IRSymtabFile symtabFile = check(readIRSymtab(mb));
+  for (const irsymtab::Reader::SymbolRef &sym :
+   symtabFile.TheReader.symbols()) {
+if (sym.isGlobal() && sym.getName() == symName)
+  return !sym.isUndefined() && !sym.isCommon();
+  }
+  return false;
+}
+
+template 
+static bool isNonCommonDef(MemoryBufferRef mb, StringRef symName,
+   StringRef archiveName) {
+  ObjFile *obj = make>(mb, archiveName);
+  StringRef stringtable = obj->getStringTable();
+
+  for (auto sym : obj->template getGlobalELFSyms()) {
+Expected name = sym.getName(stringtable);
+if (name && name.get() == symName)
+  return sym.isDefined() && !sym.isCommon();
+  }
+  return false;
+}
+
+static bool isNonCommonDef(MemoryBufferRef mb, StringRef symName,
+   StringRef archiveName) {
+  switch (getELFKind(mb, ar

[llvm-branch-commits] [clang] b49b8f0 - [PowerPC][Clang] Remove QPX support

[Jinsong Ji via llvm-branch-commits]

Author: Jinsong Ji
Date: 2020-12-07T10:15:39-05:00
New Revision: b49b8f096c0382da17d3203dfaa3f54d04a47d27

URL: 
https://github.com/llvm/llvm-project/commit/b49b8f096c0382da17d3203dfaa3f54d04a47d27
DIFF: 
https://github.com/llvm/llvm-project/commit/b49b8f096c0382da17d3203dfaa3f54d04a47d27.diff

LOG: [PowerPC][Clang] Remove QPX support

Clean up QPX code in clang missed in https://reviews.llvm.org/D83915

Reviewed By: #powerpc, steven.zhang

Differential Revision: https://reviews.llvm.org/D92329

Added: 


Modified: 
clang/docs/ClangCommandLineReference.rst
clang/include/clang/Driver/Options.td
clang/lib/AST/ASTContext.cpp
clang/lib/Basic/Targets/PPC.h
clang/lib/CodeGen/TargetInfo.cpp
clang/test/CodeGen/ppc64-elf-abi.c
clang/test/Driver/linux-ld.c
clang/test/Driver/ppc-features.cpp
clang/test/OpenMP/simd_metadata.c
llvm/test/Transforms/LoopVectorize/PowerPC/vectorize-only-for-real.ll

Removed: 
clang/test/CodeGen/ppc64-qpx-vector.c



diff  --git a/clang/docs/ClangCommandLineReference.rst 
b/clang/docs/ClangCommandLineReference.rst
index 3674f3a62695..ce510f335bd4 100644
--- a/clang/docs/ClangCommandLineReference.rst
+++ b/clang/docs/ClangCommandLineReference.rst
@@ -3169,8 +3169,6 @@ PowerPC
 
 .. option:: -mpower9-vector, -mno-power9-vector
 
-.. option:: -mqpx, -mno-qpx
-
 .. option:: -msecure-plt
 
 .. option:: -mspe, -mno-spe

diff  --git a/clang/include/clang/Driver/Options.td 
b/clang/include/clang/Driver/Options.td
index b58f5cbc63d0..6480d6e80293 100644
--- a/clang/include/clang/Driver/Options.td
+++ b/clang/include/clang/Driver/Options.td
@@ -2639,8 +2639,6 @@ def mno_mfocrf : Flag<["-"], "mno-mfocrf">, 
Group;
 def mno_mfcrf : Flag<["-"], "mno-mfcrf">, Alias;
 def mpopcntd : Flag<["-"], "mpopcntd">, Group;
 def mno_popcntd : Flag<["-"], "mno-popcntd">, Group;
-def mqpx : Flag<["-"], "mqpx">, Group;
-def mno_qpx : Flag<["-"], "mno-qpx">, Group;
 def mcrbits : Flag<["-"], "mcrbits">, Group;
 def mno_crbits : Flag<["-"], "mno-crbits">, Group;
 def minvariant_function_descriptors :

diff  --git a/clang/lib/AST/ASTContext.cpp b/clang/lib/AST/ASTContext.cpp
index dacb9679c493..c52369cd8a02 100644
--- a/clang/lib/AST/ASTContext.cpp
+++ b/clang/lib/AST/ASTContext.cpp
@@ -2360,12 +2360,6 @@ unsigned ASTContext::getTypeUnadjustedAlign(const Type 
*T) const {
 
 unsigned ASTContext::getOpenMPDefaultSimdAlign(QualType T) const {
   unsigned SimdAlign = getTargetInfo().getSimdDefaultAlign();
-  // Target ppc64 with QPX: simd default alignment for pointer to double is 32.
-  if ((getTargetInfo().getTriple().getArch() == llvm::Triple::ppc64 ||
-   getTargetInfo().getTriple().getArch() == llvm::Triple::ppc64le) &&
-  getTargetInfo().getABI() == "elfv1-qpx" &&
-  T->isSpecificBuiltinType(BuiltinType::Double))
-SimdAlign = 256;
   return SimdAlign;
 }
 

diff  --git a/clang/lib/Basic/Targets/PPC.h b/clang/lib/Basic/Targets/PPC.h
index ad754462370f..a4677cd067f7 100644
--- a/clang/lib/Basic/Targets/PPC.h
+++ b/clang/lib/Basic/Targets/PPC.h
@@ -438,7 +438,7 @@ class LLVM_LIBRARY_VISIBILITY PPC64TargetInfo : public 
PPCTargetInfo {
 
   // PPC64 Linux-specific ABI options.
   bool setABI(const std::string &Name) override {
-if (Name == "elfv1" || Name == "elfv1-qpx" || Name == "elfv2") {
+if (Name == "elfv1" || Name == "elfv2") {
   ABI = Name;
   return true;
 }

diff  --git a/clang/lib/CodeGen/TargetInfo.cpp 
b/clang/lib/CodeGen/TargetInfo.cpp
index 4815266371bc..7213f7864d43 100644
--- a/clang/lib/CodeGen/TargetInfo.cpp
+++ b/clang/lib/CodeGen/TargetInfo.cpp
@@ -4885,42 +4885,12 @@ class PPC64_SVR4_ABIInfo : public SwiftABIInfo {
 private:
   static const unsigned GPRBits = 64;
   ABIKind Kind;
-  bool HasQPX;
   bool IsSoftFloatABI;
 
-  // A vector of float or double will be promoted to <4 x f32> or <4 x f64> and
-  // will be passed in a QPX register.
-  bool IsQPXVectorTy(const Type *Ty) const {
-if (!HasQPX)
-  return false;
-
-if (const VectorType *VT = Ty->getAs()) {
-  unsigned NumElements = VT->getNumElements();
-  if (NumElements == 1)
-return false;
-
-  if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::Double)) {
-if (getContext().getTypeSize(Ty) <= 256)
-  return true;
-  } else if (VT->getElementType()->
-   isSpecificBuiltinType(BuiltinType::Float)) {
-if (getContext().getTypeSize(Ty) <= 128)
-  return true;
-  }
-}
-
-return false;
-  }
-
-  bool IsQPXVectorTy(QualType Ty) const {
-return IsQPXVectorTy(Ty.getTypePtr());
-  }
-
 public:
-  PPC64_SVR4_ABIInfo(CodeGen::CodeGenTypes &CGT, ABIKind Kind, bool HasQPX,
+  PPC64_SVR4_ABIInfo(CodeGen::CodeGenTypes &CGT, ABIKind Kind,
  bool SoftFloatABI)
-  : SwiftABIInfo(CGT), Kind(Kind), HasQPX(HasQPX),
-IsSoftFloatABI(SoftFloatABI) {}
+  : SwiftABII

[llvm-branch-commits] [llvm] d823cc7 - [WebAssembly][MC] Fix placement of table section

[Andy Wingo via llvm-branch-commits]

Author: Andy Wingo
Date: 2020-12-07T16:17:32+01:00
New Revision: d823cc7cad1d8fb61cac7fa2437a5191740804f5

URL: 
https://github.com/llvm/llvm-project/commit/d823cc7cad1d8fb61cac7fa2437a5191740804f5
DIFF: 
https://github.com/llvm/llvm-project/commit/d823cc7cad1d8fb61cac7fa2437a5191740804f5.diff

LOG: [WebAssembly][MC] Fix placement of table section

The table section goes after functions.

Differential Revision: https://reviews.llvm.org/D92323

Added: 


Modified: 
llvm/lib/MC/WasmObjectWriter.cpp

Removed: 




diff  --git a/llvm/lib/MC/WasmObjectWriter.cpp 
b/llvm/lib/MC/WasmObjectWriter.cpp
index ab520ddcbe5d..211f0de3d242 100644
--- a/llvm/lib/MC/WasmObjectWriter.cpp
+++ b/llvm/lib/MC/WasmObjectWriter.cpp
@@ -1787,10 +1787,10 @@ uint64_t WasmObjectWriter::writeOneObject(MCAssembler 
&Asm,
 writeTypeSection(Signatures);
 writeImportSection(Imports, DataSize, TableElems.size());
 writeFunctionSection(Functions);
+writeTableSection(Tables);
 // Skip the "memory" section; we import the memory instead.
 writeEventSection(Events);
 writeGlobalSection(Globals);
-writeTableSection(Tables);
 writeExportSection(Exports);
 writeElemSection(TableElems);
 writeDataCountSection();



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[llvm-branch-commits] [openmp] 71f4693 - [libomptarget][amdgpu] Add plumbing to call into hostrpc lib, if linked

[Jon Chesterfield via llvm-branch-commits]

Author: Jon Chesterfield
Date: 2020-12-07T15:24:01Z
New Revision: 71f469302079baeb552b29c6959ac884da101102

URL: 
https://github.com/llvm/llvm-project/commit/71f469302079baeb552b29c6959ac884da101102
DIFF: 
https://github.com/llvm/llvm-project/commit/71f469302079baeb552b29c6959ac884da101102.diff

LOG: [libomptarget][amdgpu] Add plumbing to call into hostrpc lib, if linked

Added: 


Modified: 
openmp/libomptarget/plugins/amdgpu/src/rtl.cpp

Removed: 




diff  --git a/openmp/libomptarget/plugins/amdgpu/src/rtl.cpp 
b/openmp/libomptarget/plugins/amdgpu/src/rtl.cpp
index e688ef7f41ec..252abca08944 100644
--- a/openmp/libomptarget/plugins/amdgpu/src/rtl.cpp
+++ b/openmp/libomptarget/plugins/amdgpu/src/rtl.cpp
@@ -45,6 +45,29 @@
 #endif
 #define DEBUG_PREFIX "Target " GETNAME(TARGET_NAME) " RTL"
 
+// hostrpc interface, FIXME: consider moving to its own include these are
+// statically linked into amdgpu/plugin if present from hostrpc_services.a,
+// linked as --whole-archive to override the weak symbols that are used to
+// implement a fallback for toolchains that do not yet have a hostrpc library.
+extern "C" {
+unsigned long hostrpc_assign_buffer(hsa_agent_t agent, hsa_queue_t *this_Q,
+uint32_t device_id);
+hsa_status_t hostrpc_init();
+hsa_status_t hostrpc_terminate();
+
+__attribute__((weak)) hsa_status_t hostrpc_init() { return HSA_STATUS_SUCCESS; 
}
+__attribute__((weak)) hsa_status_t hostrpc_terminate() {
+  return HSA_STATUS_SUCCESS;
+}
+__attribute__((weak)) unsigned long
+hostrpc_assign_buffer(hsa_agent_t, hsa_queue_t *, uint32_t device_id) {
+  DP("Warning: Attempting to assign hostrpc to device %u, but hostrpc library "
+ "missing\n",
+ device_id);
+  return 0;
+}
+}
+
 int print_kernel_trace;
 
 // Size of the target call stack struture
@@ -431,6 +454,8 @@ class RTLDeviceInfoTy {
   DP("Error when initializing HSA-ATMI\n");
   return;
 }
+// Init hostcall soon after initializing ATMI
+hostrpc_init();
 
 HSAAgents = find_gpu_agents();
 NumberOfDevices = (int)HSAAgents.size();
@@ -520,6 +545,8 @@ class RTLDeviceInfoTy {
 // atmi_finalize removes access to it
 deviceStateStore.clear();
 KernelArgPoolMap.clear();
+// Terminate hostrpc before finalizing ATMI
+hostrpc_terminate();
 atmi_finalize();
   }
 };
@@ -1540,6 +1567,8 @@ static uint64_t acquire_available_packet_id(hsa_queue_t 
*queue) {
   return packet_id;
 }
 
+extern bool g_atmi_hostcall_required; // declared without header by atmi
+
 static int32_t __tgt_rtl_run_target_team_region_locked(
 int32_t device_id, void *tgt_entry_ptr, void **tgt_args,
 ptr
diff _t *tgt_offsets, int32_t arg_num, int32_t num_teams,
@@ -1683,6 +1712,22 @@ int32_t __tgt_rtl_run_target_team_region_locked(
   impl_args->offset_y = 0;
   impl_args->offset_z = 0;
 
+  // assign a hostcall buffer for the selected Q
+  if (g_atmi_hostcall_required) {
+// hostrpc_assign_buffer is not thread safe, and this function is
+// under a multiple reader lock, not a writer lock.
+static pthread_mutex_t hostcall_init_lock = PTHREAD_MUTEX_INITIALIZER;
+pthread_mutex_lock(&hostcall_init_lock);
+impl_args->hostcall_ptr = hostrpc_assign_buffer(
+DeviceInfo.HSAAgents[device_id], queue, device_id);
+pthread_mutex_unlock(&hostcall_init_lock);
+if (!impl_args->hostcall_ptr) {
+  DP("hostrpc_assign_buffer failed, gpu would dereference null and "
+ "error\n");
+  return OFFLOAD_FAIL;
+}
+  }
+
   packet->kernarg_address = kernarg;
 }
 



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[llvm-branch-commits] [llvm] d9bf624 - [ARM] Revert low overhead loops with calls before registry allocation.

[David Green via llvm-branch-commits]

Author: David Green
Date: 2020-12-07T15:44:40Z
New Revision: d9bf6245bfef41ad7606f0e64e0c4f12d65a2b46

URL: 
https://github.com/llvm/llvm-project/commit/d9bf6245bfef41ad7606f0e64e0c4f12d65a2b46
DIFF: 
https://github.com/llvm/llvm-project/commit/d9bf6245bfef41ad7606f0e64e0c4f12d65a2b46.diff

LOG: [ARM] Revert low overhead loops with calls before registry allocation.

This adds code to revert low overhead loops with calls in them before
register allocation. Ideally we would not create low overhead loops with
calls in them to begin with, but that can be difficult to always get
correct. If we want to try and glue together t2LoopDec and t2LoopEnd
into a single instruction, we need to ensure that no instructions use LR
in the loop. (Technically the final code can be better too, as it
doesn't need to use the same registers but that has not been optimized
for here, as reverting loops with calls is expected to be very rare).

It also adds a MVETailPredUtils.h header to share the revert code
between different passes, and provides a place to expand upon, with
RevertLoopWithCall becoming a place to perform other low overhead loop
alterations like removing copies or combining LoopDec and End into a
single instruction.

Differential Revision: https://reviews.llvm.org/D91273

Added: 
llvm/lib/Target/ARM/MVETailPredUtils.h
llvm/test/CodeGen/Thumb2/LowOverheadLoops/revertcallearly.mir

Modified: 
llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
llvm/lib/Target/ARM/ARMBaseInstrInfo.h
llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
llvm/lib/Target/ARM/MVEVPTOptimisationsPass.cpp
llvm/test/CodeGen/Thumb2/LowOverheadLoops/biquad-cascade-default.mir
llvm/test/CodeGen/Thumb2/LowOverheadLoops/biquad-cascade-optsize-strd-lr.mir
llvm/test/CodeGen/Thumb2/LowOverheadLoops/loop-dec-copy-chain.mir
llvm/test/CodeGen/Thumb2/LowOverheadLoops/revert-non-loop.mir
llvm/test/CodeGen/Thumb2/LowOverheadLoops/unsafe-cpsr-loop-use.mir

Removed: 




diff  --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp 
b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
index 6426d7d85dcd..f095397ec3f9 100644
--- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
@@ -19,6 +19,7 @@
 #include "ARMSubtarget.h"
 #include "MCTargetDesc/ARMAddressingModes.h"
 #include "MCTargetDesc/ARMBaseInfo.h"
+#include "MVETailPredUtils.h"
 #include "llvm/ADT/DenseMap.h"
 #include "llvm/ADT/STLExtras.h"
 #include "llvm/ADT/SmallSet.h"

diff  --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.h 
b/llvm/lib/Target/ARM/ARMBaseInstrInfo.h
index 461a83693c79..234e8db88d26 100644
--- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.h
+++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.h
@@ -614,56 +614,6 @@ unsigned VCMPOpcodeToVPT(unsigned Opcode) {
   }
 }
 
-static inline
-unsigned VCTPOpcodeToLSTP(unsigned Opcode, bool IsDoLoop) {
-  switch (Opcode) {
-  default:
-llvm_unreachable("unhandled vctp opcode");
-break;
-  case ARM::MVE_VCTP8:
-return IsDoLoop ? ARM::MVE_DLSTP_8 : ARM::MVE_WLSTP_8;
-  case ARM::MVE_VCTP16:
-return IsDoLoop ? ARM::MVE_DLSTP_16 : ARM::MVE_WLSTP_16;
-  case ARM::MVE_VCTP32:
-return IsDoLoop ? ARM::MVE_DLSTP_32 : ARM::MVE_WLSTP_32;
-  case ARM::MVE_VCTP64:
-return IsDoLoop ? ARM::MVE_DLSTP_64 : ARM::MVE_WLSTP_64;
-  }
-  return 0;
-}
-
-static inline unsigned getTailPredVectorWidth(unsigned Opcode) {
-  switch (Opcode) {
-  default:
-llvm_unreachable("unhandled vctp opcode");
-  case ARM::MVE_VCTP8:  return 16;
-  case ARM::MVE_VCTP16: return 8;
-  case ARM::MVE_VCTP32: return 4;
-  case ARM::MVE_VCTP64: return 2;
-  }
-  return 0;
-}
-
-static inline bool isVCTP(const MachineInstr *MI) {
-  switch (MI->getOpcode()) {
-  default:
-break;
-  case ARM::MVE_VCTP8:
-  case ARM::MVE_VCTP16:
-  case ARM::MVE_VCTP32:
-  case ARM::MVE_VCTP64:
-return true;
-  }
-  return false;
-}
-
-static inline
-bool isLoopStart(MachineInstr &MI) {
-  return MI.getOpcode() == ARM::t2DoLoopStart ||
- MI.getOpcode() == ARM::t2DoLoopStartTP ||
- MI.getOpcode() == ARM::t2WhileLoopStart;
-}
-
 static inline
 bool isCondBranchOpcode(int Opc) {
   return Opc == ARM::Bcc || Opc == ARM::tBcc || Opc == ARM::t2Bcc;

diff  --git a/llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp 
b/llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
index 0f0418901bec..6901272496a0 100644
--- a/llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
+++ b/llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
@@ -56,6 +56,7 @@
 #include "ARMBaseRegisterInfo.h"
 #include "ARMBasicBlockInfo.h"
 #include "ARMSubtarget.h"
+#include "MVETailPredUtils.h"
 #include "Thumb2InstrInfo.h"
 #include "llvm/ADT/SetOperations.h"
 #include "llvm/ADT/SmallSet.h"
@@ -1310,33 +1311,16 @@ bool ARMLowOverheadLoops::ProcessLoop(MachineLoop *ML) {
 // another low register.
 void ARMLowOverheadLoops::RevertWhile(MachineInstr *MI) const {
   LLVM_DEBUG(dbgs() << "ARM Loops: Reverting to cmp: " << 

[llvm-branch-commits] [llvm] 438682d - [SLP]Merge reorder and reuse shuffles.

[Alexey Bataev via llvm-branch-commits]

Author: Alexey Bataev
Date: 2020-12-07T07:50:00-08:00
New Revision: 438682de6a38ac97f89fa38faf5c8dc9b09cd9ad

URL: 
https://github.com/llvm/llvm-project/commit/438682de6a38ac97f89fa38faf5c8dc9b09cd9ad
DIFF: 
https://github.com/llvm/llvm-project/commit/438682de6a38ac97f89fa38faf5c8dc9b09cd9ad.diff

LOG: [SLP]Merge reorder and reuse shuffles.

It is possible to merge reuse and reorder shuffles and reduce the total
cost of the ivectorization tree/number of final instructions.

Differential Revision: https://reviews.llvm.org/D92668

Added: 


Modified: 
llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
llvm/test/Transforms/SLPVectorizer/AArch64/PR38339.ll
llvm/test/Transforms/SLPVectorizer/X86/PR32086.ll

Removed: 




diff  --git a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp 
b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
index 66d736974fbc..f78a4d9d9c71 100644
--- a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+++ b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
@@ -3480,6 +3480,7 @@ int BoUpSLP::getEntryCost(TreeEntry *E) {
 
 case Instruction::ExtractValue:
 case Instruction::ExtractElement: {
+  int DeadCost = 0;
   if (NeedToShuffleReuses) {
 unsigned Idx = 0;
 for (unsigned I : E->ReuseShuffleIndices) {
@@ -3507,12 +3508,10 @@ int BoUpSLP::getEntryCost(TreeEntry *E) {
   ReuseShuffleCost +=
   TTI->getVectorInstrCost(Instruction::ExtractElement, VecTy, Idx);
 }
-  }
-  int DeadCost = ReuseShuffleCost;
-  if (!E->ReorderIndices.empty()) {
-// TODO: Merge this shuffle with the ReuseShuffleCost.
-DeadCost += TTI->getShuffleCost(
-TargetTransformInfo::SK_PermuteSingleSrc, VecTy);
+DeadCost = ReuseShuffleCost;
+  } else if (!E->ReorderIndices.empty()) {
+DeadCost = 
TTI->getShuffleCost(TargetTransformInfo::SK_PermuteSingleSrc,
+   VecTy);
   }
   for (unsigned I = 0, E = VL.size(); I < E; ++I) {
 Instruction *EI = cast(VL[I]);
@@ -3738,11 +3737,9 @@ int BoUpSLP::getEntryCost(TreeEntry *E) {
 Instruction::Load, VecTy, cast(VL0)->getPointerOperand(),
 /*VariableMask=*/false, alignment, CostKind, VL0);
   }
-  if (!E->ReorderIndices.empty()) {
-// TODO: Merge this shuffle with the ReuseShuffleCost.
+  if (!NeedToShuffleReuses && !E->ReorderIndices.empty())
 VecLdCost += TTI->getShuffleCost(
 TargetTransformInfo::SK_PermuteSingleSrc, VecTy);
-  }
   LLVM_DEBUG(dumpTreeCosts(E, ReuseShuffleCost, VecLdCost, ScalarLdCost));
   return ReuseShuffleCost + VecLdCost - ScalarLdCost;
 }
@@ -3755,18 +3752,14 @@ int BoUpSLP::getEntryCost(TreeEntry *E) {
   int ScalarEltCost =
   TTI->getMemoryOpCost(Instruction::Store, ScalarTy, Alignment, 0,
CostKind, VL0);
-  if (NeedToShuffleReuses)
-ReuseShuffleCost = -(ReuseShuffleNumbers - VL.size()) * ScalarEltCost;
   int ScalarStCost = VecTy->getNumElements() * ScalarEltCost;
   int VecStCost = TTI->getMemoryOpCost(Instruction::Store,
VecTy, Alignment, 0, CostKind, VL0);
-  if (IsReorder) {
-// TODO: Merge this shuffle with the ReuseShuffleCost.
+  if (IsReorder)
 VecStCost += TTI->getShuffleCost(
 TargetTransformInfo::SK_PermuteSingleSrc, VecTy);
-  }
   LLVM_DEBUG(dumpTreeCosts(E, ReuseShuffleCost, VecStCost, ScalarStCost));
-  return ReuseShuffleCost + VecStCost - ScalarStCost;
+  return VecStCost - ScalarStCost;
 }
 case Instruction::Call: {
   CallInst *CI = cast(VL0);
@@ -4310,6 +4303,64 @@ Value *BoUpSLP::vectorizeTree(ArrayRef VL) {
   return Vec;
 }
 
+namespace {
+/// Merges shuffle masks and emits final shuffle instruction, if required.
+class ShuffleInstructionBuilder {
+  IRBuilderBase &Builder;
+  bool IsFinalized = false;
+  SmallVector Mask;
+
+public:
+  ShuffleInstructionBuilder(IRBuilderBase &Builder) : Builder(Builder) {}
+
+  /// Adds a mask, inverting it before applying.
+  void addInversedMask(ArrayRef SubMask) {
+if (SubMask.empty())
+  return;
+SmallVector NewMask;
+inversePermutation(SubMask, NewMask);
+addMask(NewMask);
+  }
+
+  /// Functions adds masks, merging them into  single one.
+  void addMask(ArrayRef SubMask) {
+SmallVector NewMask(SubMask.begin(), SubMask.end());
+addMask(NewMask);
+  }
+
+  void addMask(ArrayRef SubMask) {
+if (SubMask.empty())
+  return;
+if (Mask.empty()) {
+  Mask.append(SubMask.begin(), SubMask.end());
+  return;
+}
+SmallVector NewMask(SubMask.size(), SubMask.size());
+int TermValue = std::min(Mask.size(), SubMask.size());
+for (int I = 0, E = SubMask.size(); I < E; ++I) {
+  if (SubMask[I] >= TermValue || Mask[SubMask[I]] >= Term

[llvm-branch-commits] [clang] e6bc4a7 - [libTooling] Add `describe` combinator for formatting AST nodes for diagnostics.

[Yitzhak Mandelbaum via llvm-branch-commits]

Author: Yitzhak Mandelbaum
Date: 2020-12-07T16:08:05Z
New Revision: e6bc4a71e3450d7230205683f63d6e22fbf9bf05

URL: 
https://github.com/llvm/llvm-project/commit/e6bc4a71e3450d7230205683f63d6e22fbf9bf05
DIFF: 
https://github.com/llvm/llvm-project/commit/e6bc4a71e3450d7230205683f63d6e22fbf9bf05.diff

LOG: [libTooling] Add `describe` combinator for formatting AST nodes for 
diagnostics.

This new stencil combinator is intended for use in diagnostics and the like.

Differential Revision: https://reviews.llvm.org/D92658

Added: 


Modified: 
clang/include/clang/Tooling/Transformer/Stencil.h
clang/lib/Tooling/Transformer/Stencil.cpp
clang/unittests/Tooling/StencilTest.cpp

Removed: 




diff  --git a/clang/include/clang/Tooling/Transformer/Stencil.h 
b/clang/include/clang/Tooling/Transformer/Stencil.h
index 1b50a670f70b..b729c826c808 100644
--- a/clang/include/clang/Tooling/Transformer/Stencil.h
+++ b/clang/include/clang/Tooling/Transformer/Stencil.h
@@ -123,6 +123,15 @@ inline Stencil ifBound(llvm::StringRef Id, llvm::StringRef 
TrueText,
 /// Stencil.  This supports user-defined extensions to the \c Stencil language.
 Stencil run(MatchConsumer C);
 
+/// Produces a human-readable rendering of the node bound to `Id`, suitable for
+/// diagnostics and debugging. This operator can be applied to any node, but is
+/// targeted at those whose source cannot be printed directly, including:
+///
+/// * Types. represented based on their structure. Note that namespace
+///   qualifiers are always printed, with the anonymous namespace represented
+///   explicitly. No desugaring or canonicalization is applied.
+Stencil describe(llvm::StringRef Id);
+
 /// For debug use only; semantics are not guaranteed.
 ///
 /// \returns the string resulting from calling the node's print() method.

diff  --git a/clang/lib/Tooling/Transformer/Stencil.cpp 
b/clang/lib/Tooling/Transformer/Stencil.cpp
index 2670bf7adabf..56f145393691 100644
--- a/clang/lib/Tooling/Transformer/Stencil.cpp
+++ b/clang/lib/Tooling/Transformer/Stencil.cpp
@@ -63,6 +63,7 @@ enum class UnaryNodeOperator {
   MaybeDeref,
   AddressOf,
   MaybeAddressOf,
+  Describe,
 };
 
 // Generic container for stencil operations with a (single) node-id argument.
@@ -133,6 +134,9 @@ std::string toStringData(const UnaryOperationData &Data) {
   case UnaryNodeOperator::MaybeAddressOf:
 OpName = "maybeAddressOf";
 break;
+  case UnaryNodeOperator::Describe:
+OpName = "describe";
+break;
   }
   return (OpName + "(\"" + Data.Id + "\")").str();
 }
@@ -174,11 +178,11 @@ Error evalData(const RawTextData &Data, const 
MatchFinder::MatchResult &,
   return Error::success();
 }
 
-Error evalData(const DebugPrintNodeData &Data,
-   const MatchFinder::MatchResult &Match, std::string *Result) {
+static Error printNode(StringRef Id, const MatchFinder::MatchResult &Match,
+   std::string *Result) {
   std::string Output;
   llvm::raw_string_ostream Os(Output);
-  auto NodeOrErr = getNode(Match.Nodes, Data.Id);
+  auto NodeOrErr = getNode(Match.Nodes, Id);
   if (auto Err = NodeOrErr.takeError())
 return Err;
   NodeOrErr->print(Os, PrintingPolicy(Match.Context->getLangOpts()));
@@ -186,8 +190,18 @@ Error evalData(const DebugPrintNodeData &Data,
   return Error::success();
 }
 
+Error evalData(const DebugPrintNodeData &Data,
+   const MatchFinder::MatchResult &Match, std::string *Result) {
+  return printNode(Data.Id, Match, Result);
+}
+
 Error evalData(const UnaryOperationData &Data,
const MatchFinder::MatchResult &Match, std::string *Result) {
+  // The `Describe` operation can be applied to any node, not just expressions,
+  // so it is handled here, separately.
+  if (Data.Op == UnaryNodeOperator::Describe)
+return printNode(Data.Id, Match, Result);
+
   const auto *E = Match.Nodes.getNodeAs(Data.Id);
   if (E == nullptr)
 return llvm::make_error(
@@ -217,6 +231,8 @@ Error evalData(const UnaryOperationData &Data,
 }
 Source = tooling::buildAddressOf(*E, *Match.Context);
 break;
+  case UnaryNodeOperator::Describe:
+llvm_unreachable("This case is handled at the start of the function");
   }
   if (!Source)
 return llvm::make_error(
@@ -359,6 +375,11 @@ Stencil transformer::maybeAddressOf(llvm::StringRef 
ExprId) {
   UnaryNodeOperator::MaybeAddressOf, std::string(ExprId));
 }
 
+Stencil transformer::describe(StringRef Id) {
+  return std::make_shared>(
+  UnaryNodeOperator::Describe, std::string(Id));
+}
+
 Stencil transformer::access(StringRef BaseId, Stencil Member) {
   return std::make_shared>(BaseId, std::move(Member));
 }

diff  --git a/clang/unittests/Tooling/StencilTest.cpp 
b/clang/unittests/Tooling/StencilTest.cpp
index c843e33dd0da..56e81431e558 100644
--- a/clang/unittests/Tooling/StencilTest.cpp
+++ b/clang/unittests/Tooling/StencilTest.cpp
@@ -30,7 +30,9 @@ using 

[llvm-branch-commits] [openmp] 22558c8 - [OpenMP] libomp: Fix possible NULL dereferences

[via llvm-branch-commits]

Author: AndreyChurbanov
Date: 2020-12-07T19:09:07+03:00
New Revision: 22558c8501eaf5e7547ee13fa5a009efdec6dc90

URL: 
https://github.com/llvm/llvm-project/commit/22558c8501eaf5e7547ee13fa5a009efdec6dc90
DIFF: 
https://github.com/llvm/llvm-project/commit/22558c8501eaf5e7547ee13fa5a009efdec6dc90.diff

LOG: [OpenMP] libomp: Fix possible NULL dereferences

Check pointer returned by strchr, as it can be NULL in case of broken
format of input string. Introduced new function __kmp_str_loc_numbers
for fast parsing of numbers only in the location string.
Also made some cleanup of __kmp_str_loc_init declaration and usage:
- changed type of init_fname parameter to bool;
- changed input from true to false in places where fname is not used.

Differential Revision: https://reviews.llvm.org/D90962

Added: 


Modified: 
openmp/runtime/src/kmp_debugger.cpp
openmp/runtime/src/kmp_itt.inl
openmp/runtime/src/kmp_lock.cpp
openmp/runtime/src/kmp_str.cpp
openmp/runtime/src/kmp_str.h

Removed: 




diff  --git a/openmp/runtime/src/kmp_debugger.cpp 
b/openmp/runtime/src/kmp_debugger.cpp
index 490300f9b207..2a1f633c49c1 100644
--- a/openmp/runtime/src/kmp_debugger.cpp
+++ b/openmp/runtime/src/kmp_debugger.cpp
@@ -269,7 +269,7 @@ int __kmp_omp_num_threads(ident_t const *ident) {
   if (info->num > 0 && info->array != 0) {
 kmp_omp_nthr_item_t *items =
 (kmp_omp_nthr_item_t *)__kmp_convert_to_ptr(info->array);
-kmp_str_loc_t loc = __kmp_str_loc_init(ident->psource, 1);
+kmp_str_loc_t loc = __kmp_str_loc_init(ident->psource, true);
 int i;
 for (i = 0; i < info->num; ++i) {
   if (kmp_location_match(&loc, &items[i])) {

diff  --git a/openmp/runtime/src/kmp_itt.inl b/openmp/runtime/src/kmp_itt.inl
index 6257cea4faf3..09d5480284e0 100644
--- a/openmp/runtime/src/kmp_itt.inl
+++ b/openmp/runtime/src/kmp_itt.inl
@@ -115,7 +115,8 @@ LINKAGE void __kmp_itt_region_forking(int gtid, int 
team_size, int barriers) {
 // that the tools more or less standardized on:
 //   "$omp$parallel@[file:][:]"
 char *buff = NULL;
-kmp_str_loc_t str_loc = __kmp_str_loc_init(loc->psource, 1);
+kmp_str_loc_t str_loc =
+__kmp_str_loc_init(loc->psource, /* init_fname */ false);
 buff = __kmp_str_format("%s$omp$parallel:%d@%s:%d:%d", str_loc.func,
 team_size, str_loc.file, str_loc.line,
 str_loc.col);
@@ -155,7 +156,8 @@ LINKAGE void __kmp_itt_region_forking(int gtid, int 
team_size, int barriers) {
   if ((frm < KMP_MAX_FRAME_DOMAINS) &&
   (__kmp_itt_region_team_size[frm] != team_size)) {
 char *buff = NULL;
-kmp_str_loc_t str_loc = __kmp_str_loc_init(loc->psource, 1);
+kmp_str_loc_t str_loc = 
+__kmp_str_loc_init(loc->psource, /* init_fname */ false);
 buff = __kmp_str_format("%s$omp$parallel:%d@%s:%d:%d", str_loc.func,
 team_size, str_loc.file, str_loc.line,
 str_loc.col);
@@ -212,7 +214,8 @@ LINKAGE void __kmp_itt_frame_submit(int gtid, 
__itt_timestamp begin,
 // that the tools more or less standardized on:
 //   "$omp$parallel:team_size@[file:][:]"
 char *buff = NULL;
-kmp_str_loc_t str_loc = __kmp_str_loc_init(loc->psource, 1);
+kmp_str_loc_t str_loc = 
+__kmp_str_loc_init(loc->psource, /* init_fname */ false);
 buff = __kmp_str_format("%s$omp$parallel:%d@%s:%d:%d", str_loc.func,
 team_size, str_loc.file, str_loc.line,
 str_loc.col);
@@ -234,7 +237,8 @@ LINKAGE void __kmp_itt_frame_submit(int gtid, 
__itt_timestamp begin,
 return; // something's gone wrong, returning
   if (__kmp_itt_region_team_size[frm] != team_size) {
 char *buff = NULL;
-kmp_str_loc_t str_loc = __kmp_str_loc_init(loc->psource, 1);
+kmp_str_loc_t str_loc = 
+__kmp_str_loc_init(loc->psource, /* init_fname */ false);
 buff = __kmp_str_format("%s$omp$parallel:%d@%s:%d:%d", str_loc.func,
 team_size, str_loc.file, str_loc.line,
 str_loc.col);
@@ -273,7 +277,8 @@ LINKAGE void __kmp_itt_frame_submit(int gtid, 
__itt_timestamp begin,
   // Transform compiler-generated region location into the format
   // that the tools more or less standardized on:
   //   "$omp$frame@[file:][:]"
-  kmp_str_loc_t str_loc = __kmp_str_loc_init(loc->psource, 1);
+  kmp_str_loc_t str_loc = 
+  __kmp_str_loc_init(loc->psource, /* init_fname */ false);
   if (imbalance) {
 char *buff_imb = NULL;
 buff_imb = __kmp_str_format("%s$omp$barrier-imbalance:%d@%s:%d",
@@ -365,25 +370,12 @@ LINKAGE void __kmp_itt_metadata_loo

[llvm-branch-commits] [llvm] 3d8b746 - Test commit

[Hans Wennborg via llvm-branch-commits]

Author: Hans Wennborg
Date: 2020-12-07T17:27:03+01:00
New Revision: 3d8b7465c338c53b4950ecaaa074259dcbc8939e

URL: 
https://github.com/llvm/llvm-project/commit/3d8b7465c338c53b4950ecaaa074259dcbc8939e
DIFF: 
https://github.com/llvm/llvm-project/commit/3d8b7465c338c53b4950ecaaa074259dcbc8939e.diff

LOG: Test commit

Added: 


Modified: 
llvm/docs/ReleaseNotes.rst

Removed: 




diff  --git a/llvm/docs/ReleaseNotes.rst b/llvm/docs/ReleaseNotes.rst
index ac6aecc2abdf..b77d054079a3 100644
--- a/llvm/docs/ReleaseNotes.rst
+++ b/llvm/docs/ReleaseNotes.rst
@@ -152,7 +152,6 @@ Changes to the OCaml bindings
 -
 
 
-
 Changes to the C API
 
 



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[llvm-branch-commits] [mlir] dc930e5 - [MLIR][Affine] Add affine.for normalization support

[Uday Bondhugula via llvm-branch-commits]

Author: Navdeep Kumar
Date: 2020-12-07T22:04:07+05:30
New Revision: dc930e5f2f91e7eb5ebc9cb61f6a71bc8924559e

URL: 
https://github.com/llvm/llvm-project/commit/dc930e5f2f91e7eb5ebc9cb61f6a71bc8924559e
DIFF: 
https://github.com/llvm/llvm-project/commit/dc930e5f2f91e7eb5ebc9cb61f6a71bc8924559e.diff

LOG: [MLIR][Affine] Add affine.for normalization support

Add support to normalize affine.for ops i.e., convert the lower bound to zero
and loop step to one. The Upper bound is set to the trip count of the loop.
The exact value of loopIV is calculated just inside the body of affine.for.
Currently loops with lower bounds having single result are supported. No such
restriction exists on upper bounds.

Differential Revision: https://reviews.llvm.org/D92233

Added: 


Modified: 
mlir/lib/Dialect/Affine/Transforms/AffineLoopNormalize.cpp
mlir/test/Dialect/Affine/affine-loop-normalize.mlir

Removed: 




diff  --git a/mlir/lib/Dialect/Affine/Transforms/AffineLoopNormalize.cpp 
b/mlir/lib/Dialect/Affine/Transforms/AffineLoopNormalize.cpp
index 2ad403e73f72..d863663f86bd 100644
--- a/mlir/lib/Dialect/Affine/Transforms/AffineLoopNormalize.cpp
+++ b/mlir/lib/Dialect/Affine/Transforms/AffineLoopNormalize.cpp
@@ -79,14 +79,104 @@ void mlir::normalizeAffineParallel(AffineParallelOp op) {
   op.setUpperBounds(ranges.getOperands(), newUpperMap);
 }
 
-/// Normalization transformations for affine.for ops. For now, it only removes
-/// single iteration loops. We may want to consider separating redundant loop
-/// elimitation from loop bound normalization, if needed in the future.
+/// Normalizes affine.for ops. If the affine.for op has only a single iteration
+/// only then it is simply promoted, else it is normalized in the traditional
+/// way, by converting the lower bound to zero and loop step to one. The upper
+/// bound is set to the trip count of the loop. For now, original loops must
+/// have lower bound with a single result only. There is no such restriction on
+/// upper bounds.
 static void normalizeAffineFor(AffineForOp op) {
   if (succeeded(promoteIfSingleIteration(op)))
 return;
 
-  // TODO: Normalize loop bounds.
+  // Check if the forop is already normalized.
+  if (op.hasConstantLowerBound() && (op.getConstantLowerBound() == 0) &&
+  (op.getStep() == 1))
+return;
+
+  // Check if the lower bound has a single result only. Loops with a max lower
+  // bound can't be normalized without additional support like
+  // affine.execute_region's. If the lower bound does not have a single result
+  // then skip this op.
+  if (op.getLowerBoundMap().getNumResults() != 1)
+return;
+
+  Location loc = op.getLoc();
+  OpBuilder opBuilder(op);
+  int64_t origLoopStep = op.getStep();
+
+  // Calculate upperBound for normalized loop.
+  SmallVector ubOperands;
+  AffineBound lb = op.getLowerBound();
+  AffineBound ub = op.getUpperBound();
+  ubOperands.reserve(ub.getNumOperands() + lb.getNumOperands());
+  AffineMap origLbMap = lb.getMap();
+  AffineMap origUbMap = ub.getMap();
+
+  // Add dimension operands from upper/lower bound.
+  for (unsigned j = 0, e = origUbMap.getNumDims(); j < e; ++j)
+ubOperands.push_back(ub.getOperand(j));
+  for (unsigned j = 0, e = origLbMap.getNumDims(); j < e; ++j)
+ubOperands.push_back(lb.getOperand(j));
+
+  // Add symbol operands from upper/lower bound.
+  for (unsigned j = 0, e = origUbMap.getNumSymbols(); j < e; ++j)
+ubOperands.push_back(ub.getOperand(origUbMap.getNumDims() + j));
+  for (unsigned j = 0, e = origLbMap.getNumSymbols(); j < e; ++j)
+ubOperands.push_back(lb.getOperand(origLbMap.getNumDims() + j));
+
+  // Add original result expressions from lower/upper bound map.
+  SmallVector origLbExprs(origLbMap.getResults().begin(),
+ origLbMap.getResults().end());
+  SmallVector origUbExprs(origUbMap.getResults().begin(),
+ origUbMap.getResults().end());
+  SmallVector newUbExprs;
+
+  // The original upperBound can have more than one result. For the new
+  // upperBound of this loop, take 
diff erence of all possible combinations of
+  // the ub results and lb result and ceildiv with the loop step. For e.g.,
+  //
+  //  affine.for %i1 = 0 to min affine_map<(d0)[] -> (d0 + 32, 1024)>(%i0)
+  //  will have an upperBound map as,
+  //  affine_map<(d0)[] -> (((d0 + 32) - 0) ceildiv 1, (1024 - 0) ceildiv
+  //  1)>(%i0)
+  //
+  // Insert all combinations of upper/lower bound results.
+  for (unsigned i = 0, e = origUbExprs.size(); i < e; ++i) {
+newUbExprs.push_back(
+(origUbExprs[i] - origLbExprs[0]).ceilDiv(origLoopStep));
+  }
+
+  // Construct newUbMap.
+  AffineMap newUbMap =
+  AffineMap::get(origLbMap.getNumDims() + origUbMap.getNumDims(),
+ origLbMap.getNumSymbols() + origUbMap.getNumSymbols(),
+ newUbExprs, opBuilder.g

[llvm-branch-commits] [clang] 1b734c6 - [Parse] Delete unused declarations

[Fangrui Song via llvm-branch-commits]

Author: Fangrui Song
Date: 2020-12-07T08:46:17-08:00
New Revision: 1b734c662bd92c5ae065667fee7e11cff1e1f190

URL: 
https://github.com/llvm/llvm-project/commit/1b734c662bd92c5ae065667fee7e11cff1e1f190
DIFF: 
https://github.com/llvm/llvm-project/commit/1b734c662bd92c5ae065667fee7e11cff1e1f190.diff

LOG: [Parse] Delete unused declarations

Added: 


Modified: 
clang/include/clang/Parse/Parser.h

Removed: 




diff  --git a/clang/include/clang/Parse/Parser.h 
b/clang/include/clang/Parse/Parser.h
index 20dba70d8509..73943ed5f0a6 100644
--- a/clang/include/clang/Parse/Parser.h
+++ b/clang/include/clang/Parse/Parser.h
@@ -48,7 +48,6 @@ namespace clang {
   class PoisonSEHIdentifiersRAIIObject;
   class OMPClause;
   class ObjCTypeParamList;
-  class ObjCTypeParameter;
   struct OMPTraitProperty;
   struct OMPTraitSelector;
   struct OMPTraitSet;
@@ -702,10 +701,6 @@ class Parser : public CodeCompletionHandler {
   /// #pragma ms_struct...
   void HandlePragmaMSStruct();
 
-  /// Handle the annotation token produced for
-  /// #pragma comment...
-  void HandlePragmaMSComment();
-
   void HandlePragmaMSPointersToMembers();
 
   void HandlePragmaMSVtorDisp();
@@ -1734,7 +1729,6 @@ class Parser : public CodeCompletionHandler {
 
   ParsedType ParseObjCTypeName(ObjCDeclSpec &DS, DeclaratorContext Ctx,
ParsedAttributes *ParamAttrs);
-  void ParseObjCMethodRequirement();
   Decl *ParseObjCMethodPrototype(
 tok::ObjCKeywordKind MethodImplKind = tok::objc_not_keyword,
 bool MethodDefinition = true);
@@ -1830,7 +1824,6 @@ class Parser : public CodeCompletionHandler {
  ParsedType &CastTy,
  SourceRange &CastRange);
 
-  typedef SmallVector ExprListTy;
   typedef SmallVector CommaLocsTy;
 
   /// ParseExpressionList - Used for C/C++ (argument-)expression-list.
@@ -3306,8 +3299,6 @@ class Parser : public CodeCompletionHandler {
   NamedDecl *ParseNonTypeTemplateParameter(unsigned Depth, unsigned Position);
   bool isTypeConstraintAnnotation();
   bool TryAnnotateTypeConstraint();
-  NamedDecl *
-  ParseConstrainedTemplateTypeParameter(unsigned Depth, unsigned Position);
   void DiagnoseMisplacedEllipsis(SourceLocation EllipsisLoc,
  SourceLocation CorrectLoc,
  bool AlreadyHasEllipsis,



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[llvm-branch-commits] [openmp] fff1abc - [OpenMP] NFC: comment adjusted

[via llvm-branch-commits]

Author: AndreyChurbanov
Date: 2020-12-07T19:50:14+03:00
New Revision: fff1abc406d56401f37a1ef4431583f2e75b5039

URL: 
https://github.com/llvm/llvm-project/commit/fff1abc406d56401f37a1ef4431583f2e75b5039
DIFF: 
https://github.com/llvm/llvm-project/commit/fff1abc406d56401f37a1ef4431583f2e75b5039.diff

LOG: [OpenMP] NFC: comment adjusted

Added: 


Modified: 
openmp/runtime/src/kmp_str.cpp

Removed: 




diff  --git a/openmp/runtime/src/kmp_str.cpp b/openmp/runtime/src/kmp_str.cpp
index 24526e587412..2231a59342d9 100644
--- a/openmp/runtime/src/kmp_str.cpp
+++ b/openmp/runtime/src/kmp_str.cpp
@@ -334,7 +334,7 @@ void __kmp_str_loc_numbers(char const *Psource, int 
*LineBeg,
 *LineBeg = 0;
   }
   if (Str) {
-// Read end line number.
+// Read end line or column number.
 *LineEndOrCol = atoi(Str + 1);
   } else {
 // Broken format of input string, cannot read the number.



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[llvm-branch-commits] [clang] 224596c - Fix missing error for use of 128-bit integer inside SPIR64 device code.

[Jennifer Yu via llvm-branch-commits]

Author: Jennifer Yu
Date: 2020-12-07T10:08:30-08:00
New Revision: 224596c4fe02f741ca13a5dd7cecd8b4d2739034

URL: 
https://github.com/llvm/llvm-project/commit/224596c4fe02f741ca13a5dd7cecd8b4d2739034
DIFF: 
https://github.com/llvm/llvm-project/commit/224596c4fe02f741ca13a5dd7cecd8b4d2739034.diff

LOG: Fix missing error for use of 128-bit integer inside SPIR64 device code.
Emit error for use of 128-bit integer inside device code had been
already implemented in https://reviews.llvm.org/D74387.  However,
the error is not emitted for SPIR64, because for SPIR64, hasInt128Type
return true.

hasInt128Type: is also used to control generation of certain 128-bit
predefined macros, initializer predefined 128-bit integer types and
build 128-bit ArithmeticTypes.  Except predefined macros, only the
device target is considered, since error only emit when 128-bit
integer is used inside device code, the host target (auxtarget) also
needs to be considered.

The change address:
1. (SPIR.h) Correct hasInt128Type() for SPIR targets.
2. Sema.cpp and SemaOverload.cpp: Add additional check to consider host
   target(auxtarget) when call to hasInt128Type.  So that __int128_t
   and __int128() are allowed to avoid error when they used outside
   device code.
3. SemaType.cpp: add check for SYCLIsDevice to delay the error message.
   The error will be emitted if the use of 128-bit integer in the device
   code.

   Reviewed By: Johannes Doerfert and Aaron Ballman

   Differential Revision: https://reviews.llvm.org/D92439

Added: 
clang/test/SemaSYCL/int128.cpp

Modified: 
clang/lib/Basic/Targets/SPIR.h
clang/lib/Sema/Sema.cpp
clang/lib/Sema/SemaOverload.cpp
clang/lib/Sema/SemaType.cpp
clang/test/CodeGen/ext-int-cc.c

Removed: 




diff  --git a/clang/lib/Basic/Targets/SPIR.h b/clang/lib/Basic/Targets/SPIR.h
index 6473138982c1..130ce1872dce 100644
--- a/clang/lib/Basic/Targets/SPIR.h
+++ b/clang/lib/Basic/Targets/SPIR.h
@@ -104,6 +104,8 @@ class LLVM_LIBRARY_VISIBILITY SPIRTargetInfo : public 
TargetInfo {
   }
 
   bool hasExtIntType() const override { return true; }
+
+  bool hasInt128Type() const override { return false; }
 };
 class LLVM_LIBRARY_VISIBILITY SPIR32TargetInfo : public SPIRTargetInfo {
 public:

diff  --git a/clang/lib/Sema/Sema.cpp b/clang/lib/Sema/Sema.cpp
index 3901c5e1fec8..b99dc33d8748 100644
--- a/clang/lib/Sema/Sema.cpp
+++ b/clang/lib/Sema/Sema.cpp
@@ -236,7 +236,9 @@ void Sema::Initialize() {
 return;
 
   // Initialize predefined 128-bit integer types, if needed.
-  if (Context.getTargetInfo().hasInt128Type()) {
+  if (Context.getTargetInfo().hasInt128Type() ||
+  (Context.getAuxTargetInfo() &&
+   Context.getAuxTargetInfo()->hasInt128Type())) {
 // If either of the 128-bit integer types are unavailable to name lookup,
 // define them now.
 DeclarationName Int128 = &Context.Idents.get("__int128_t");

diff  --git a/clang/lib/Sema/SemaOverload.cpp b/clang/lib/Sema/SemaOverload.cpp
index 8db31c5fef12..8af7447b03ed 100644
--- a/clang/lib/Sema/SemaOverload.cpp
+++ b/clang/lib/Sema/SemaOverload.cpp
@@ -8199,12 +8199,16 @@ class BuiltinOperatorOverloadBuilder {
 ArithmeticTypes.push_back(S.Context.IntTy);
 ArithmeticTypes.push_back(S.Context.LongTy);
 ArithmeticTypes.push_back(S.Context.LongLongTy);
-if (S.Context.getTargetInfo().hasInt128Type())
+if (S.Context.getTargetInfo().hasInt128Type() ||
+(S.Context.getAuxTargetInfo() &&
+ S.Context.getAuxTargetInfo()->hasInt128Type()))
   ArithmeticTypes.push_back(S.Context.Int128Ty);
 ArithmeticTypes.push_back(S.Context.UnsignedIntTy);
 ArithmeticTypes.push_back(S.Context.UnsignedLongTy);
 ArithmeticTypes.push_back(S.Context.UnsignedLongLongTy);
-if (S.Context.getTargetInfo().hasInt128Type())
+if (S.Context.getTargetInfo().hasInt128Type() ||
+(S.Context.getAuxTargetInfo() &&
+ S.Context.getAuxTargetInfo()->hasInt128Type()))
   ArithmeticTypes.push_back(S.Context.UnsignedInt128Ty);
 LastPromotedIntegralType = ArithmeticTypes.size();
 LastPromotedArithmeticType = ArithmeticTypes.size();

diff  --git a/clang/lib/Sema/SemaType.cpp b/clang/lib/Sema/SemaType.cpp
index a8ba0643d41d..0d80bce10ffd 100644
--- a/clang/lib/Sema/SemaType.cpp
+++ b/clang/lib/Sema/SemaType.cpp
@@ -1515,6 +1515,7 @@ static QualType ConvertDeclSpecToType(TypeProcessingState 
&state) {
   }
   case DeclSpec::TST_int128:
 if (!S.Context.getTargetInfo().hasInt128Type() &&
+!S.getLangOpts().SYCLIsDevice &&
 !(S.getLangOpts().OpenMP && S.getLangOpts().OpenMPIsDevice))
   S.Diag(DS.getTypeSpecTypeLoc(), diag::err_type_unsupported)
 << "__int128";

diff  --git a/clang/test/CodeGen/ext-int-cc.c b/clang/test/CodeGen/ext-int-cc.c
index 02e2f3aef274..dd21845592a8 100644
--- a/clang/test/CodeGen/ext-int-cc.c
+++ b/clang/test/CodeGen/ext-int-cc.c
@@ -43,7 +43,7 @@ void P

[llvm-branch-commits] [llvm] 50bff64 - [SLP][Test] Add test for PR46983

[Anton Afanasyev via llvm-branch-commits]

Author: Anton Afanasyev
Date: 2020-12-07T21:07:40+03:00
New Revision: 50bff64158e9db3f91dd2d611a14707e8d173163

URL: 
https://github.com/llvm/llvm-project/commit/50bff64158e9db3f91dd2d611a14707e8d173163
DIFF: 
https://github.com/llvm/llvm-project/commit/50bff64158e9db3f91dd2d611a14707e8d173163.diff

LOG: [SLP][Test] Add test for PR46983

Added: 
llvm/test/Transforms/SLPVectorizer/X86/pr46983.ll

Modified: 


Removed: 




diff  --git a/llvm/test/Transforms/SLPVectorizer/X86/pr46983.ll 
b/llvm/test/Transforms/SLPVectorizer/X86/pr46983.ll
new file mode 100644
index ..7df32e665805
--- /dev/null
+++ b/llvm/test/Transforms/SLPVectorizer/X86/pr46983.ll
@@ -0,0 +1,227 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -slp-vectorizer -instcombine -S 
-mtriple=x86_64-unknown-linux-gnu -mattr=+avx | FileCheck %s 
--check-prefixes=CHECK,AVX
+; RUN: opt < %s -slp-vectorizer -instcombine -S 
-mtriple=x86_64-unknown-linux-gnu -mattr=+avx2 | FileCheck %s 
--check-prefixes=CHECK,AVX2
+
+define void @store_i32(i32* nocapture %0, i32 %1, i32 %2) {
+; CHECK-LABEL: @store_i32(
+; CHECK-NEXT:[[TMP4:%.*]] = bitcast i32* [[TMP0:%.*]] to <4 x i32>*
+; CHECK-NEXT:[[TMP5:%.*]] = load <4 x i32>, <4 x i32>* [[TMP4]], align 4, 
[[TBAA0:!tbaa !.*]]
+; CHECK-NEXT:[[TMP6:%.*]] = insertelement <4 x i32> undef, i32 
[[TMP1:%.*]], i32 0
+; CHECK-NEXT:[[TMP7:%.*]] = shufflevector <4 x i32> [[TMP6]], <4 x i32> 
undef, <4 x i32> zeroinitializer
+; CHECK-NEXT:[[TMP8:%.*]] = mul <4 x i32> [[TMP5]], [[TMP7]]
+; CHECK-NEXT:[[TMP9:%.*]] = lshr <4 x i32> [[TMP8]], 
+; CHECK-NEXT:[[TMP10:%.*]] = icmp ult <4 x i32> [[TMP9]], 
+; CHECK-NEXT:[[TMP11:%.*]] = select <4 x i1> [[TMP10]], <4 x i32> 
[[TMP9]], <4 x i32> 
+; CHECK-NEXT:[[TMP12:%.*]] = bitcast i32* [[TMP0]] to <4 x i32>*
+; CHECK-NEXT:store <4 x i32> [[TMP11]], <4 x i32>* [[TMP12]], align 4, 
[[TBAA0]]
+; CHECK-NEXT:ret void
+;
+  %4 = load i32, i32* %0, align 4, !tbaa !2
+  %5 = mul i32 %4, %1
+  %6 = lshr i32 %5, 15
+  %7 = icmp ult i32 %6, 255
+  %8 = select i1 %7, i32 %6, i32 255
+  store i32 %8, i32* %0, align 4, !tbaa !2
+  %9 = getelementptr inbounds i32, i32* %0, i64 1
+  %10 = load i32, i32* %9, align 4, !tbaa !2
+  %11 = mul i32 %10, %1
+  %12 = lshr i32 %11, 15
+  %13 = icmp ult i32 %12, 255
+  %14 = select i1 %13, i32 %12, i32 255
+  store i32 %14, i32* %9, align 4, !tbaa !2
+  %15 = getelementptr inbounds i32, i32* %0, i64 2
+  %16 = load i32, i32* %15, align 4, !tbaa !2
+  %17 = mul i32 %16, %1
+  %18 = lshr i32 %17, 15
+  %19 = icmp ult i32 %18, 255
+  %20 = select i1 %19, i32 %18, i32 255
+  store i32 %20, i32* %15, align 4, !tbaa !2
+  %21 = getelementptr inbounds i32, i32* %0, i64 3
+  %22 = load i32, i32* %21, align 4, !tbaa !2
+  %23 = mul i32 %22, %1
+  %24 = lshr i32 %23, 15
+  %25 = icmp ult i32 %24, 255
+  %26 = select i1 %25, i32 %24, i32 255
+  store i32 %26, i32* %21, align 4, !tbaa !2
+  ret void
+}
+
+define void @store_i8(i8* nocapture %0, i32 %1, i32 %2) {
+; CHECK-LABEL: @store_i8(
+; CHECK-NEXT:[[TMP4:%.*]] = load i8, i8* [[TMP0:%.*]], align 1, 
[[TBAA4:!tbaa !.*]]
+; CHECK-NEXT:[[TMP5:%.*]] = zext i8 [[TMP4]] to i32
+; CHECK-NEXT:[[TMP6:%.*]] = mul i32 [[TMP5]], [[TMP1:%.*]]
+; CHECK-NEXT:[[TMP7:%.*]] = lshr i32 [[TMP6]], 15
+; CHECK-NEXT:[[TMP8:%.*]] = icmp ult i32 [[TMP7]], 255
+; CHECK-NEXT:[[TMP9:%.*]] = select i1 [[TMP8]], i32 [[TMP7]], i32 255
+; CHECK-NEXT:[[TMP10:%.*]] = trunc i32 [[TMP9]] to i8
+; CHECK-NEXT:store i8 [[TMP10]], i8* [[TMP0]], align 1, [[TBAA4]]
+; CHECK-NEXT:[[TMP11:%.*]] = getelementptr inbounds i8, i8* [[TMP0]], i64 1
+; CHECK-NEXT:[[TMP12:%.*]] = load i8, i8* [[TMP11]], align 1, [[TBAA4]]
+; CHECK-NEXT:[[TMP13:%.*]] = zext i8 [[TMP12]] to i32
+; CHECK-NEXT:[[TMP14:%.*]] = mul i32 [[TMP13]], [[TMP1]]
+; CHECK-NEXT:[[TMP15:%.*]] = lshr i32 [[TMP14]], 15
+; CHECK-NEXT:[[TMP16:%.*]] = icmp ult i32 [[TMP15]], 255
+; CHECK-NEXT:[[TMP17:%.*]] = select i1 [[TMP16]], i32 [[TMP15]], i32 255
+; CHECK-NEXT:[[TMP18:%.*]] = trunc i32 [[TMP17]] to i8
+; CHECK-NEXT:store i8 [[TMP18]], i8* [[TMP11]], align 1, [[TBAA4]]
+; CHECK-NEXT:[[TMP19:%.*]] = getelementptr inbounds i8, i8* [[TMP0]], i64 2
+; CHECK-NEXT:[[TMP20:%.*]] = load i8, i8* [[TMP19]], align 1, [[TBAA4]]
+; CHECK-NEXT:[[TMP21:%.*]] = zext i8 [[TMP20]] to i32
+; CHECK-NEXT:[[TMP22:%.*]] = mul i32 [[TMP21]], [[TMP1]]
+; CHECK-NEXT:[[TMP23:%.*]] = lshr i32 [[TMP22]], 15
+; CHECK-NEXT:[[TMP24:%.*]] = icmp ult i32 [[TMP23]], 255
+; CHECK-NEXT:[[TMP25:%.*]] = select i1 [[TMP24]], i32 [[TMP23]], i32 255
+; CHECK-NEXT:[[TMP26:%.*]] = trunc i32 [[TMP25]] to i8
+; CHECK-NEXT:store i8 [[TMP26]], i8* [[TMP19]], align 1, [[TBAA4]]
+; CHECK-NEXT:[[TMP27:%.*]] = getelementptr inbounds i8, i8* [[TMP0]], i64 

[llvm-branch-commits] [llvm] 50dd1db - [IPO] Fix operator precedence warning. NFCI.

[Simon Pilgrim via llvm-branch-commits]

Author: Simon Pilgrim
Date: 2020-12-07T18:23:54Z
New Revision: 50dd1dba6eb3a47b715cad68f92cd9bb41bb9163

URL: 
https://github.com/llvm/llvm-project/commit/50dd1dba6eb3a47b715cad68f92cd9bb41bb9163
DIFF: 
https://github.com/llvm/llvm-project/commit/50dd1dba6eb3a47b715cad68f92cd9bb41bb9163.diff

LOG: [IPO] Fix operator precedence warning. NFCI.

Check the entire assertion condition before && with the message.

Added: 


Modified: 
llvm/lib/Transforms/IPO/SampleContextTracker.cpp

Removed: 




diff  --git a/llvm/lib/Transforms/IPO/SampleContextTracker.cpp 
b/llvm/lib/Transforms/IPO/SampleContextTracker.cpp
index 47dd84ca73bf..37fc27e91100 100644
--- a/llvm/lib/Transforms/IPO/SampleContextTracker.cpp
+++ b/llvm/lib/Transforms/IPO/SampleContextTracker.cpp
@@ -271,7 +271,7 @@ FunctionSamples 
*SampleContextTracker::getBaseSamplesFor(StringRef Name,
 continue;
 
   ContextTrieNode &ToNode = promoteMergeContextSamplesTree(*FromNode);
-  assert(!Node || Node == &ToNode && "Expect only one base profile");
+  assert((!Node || Node == &ToNode) && "Expect only one base profile");
   Node = &ToNode;
 }
   }



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[llvm-branch-commits] [llvm] b6e847c - [DAG] Cleanup by folding some single use VT.getScalarSizeInBits() calls into its comparison. NFCI.

[Simon Pilgrim via llvm-branch-commits]

Author: Simon Pilgrim
Date: 2020-12-07T18:23:54Z
New Revision: b6e847c396168e724ac6d2b98c52bca8df37b621

URL: 
https://github.com/llvm/llvm-project/commit/b6e847c396168e724ac6d2b98c52bca8df37b621
DIFF: 
https://github.com/llvm/llvm-project/commit/b6e847c396168e724ac6d2b98c52bca8df37b621.diff

LOG: [DAG] Cleanup by folding some single use VT.getScalarSizeInBits() calls 
into its comparison. NFCI.

Added: 


Modified: 
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Removed: 




diff  --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp 
b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 96baaabdb813..51de545d1db9 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -3400,12 +3400,10 @@ SDValue DAGCombiner::visitSUB(SDNode *N) {
 if (N0.getOpcode() == ISD::XOR && N1.getOpcode() == ISD::SRA) {
   SDValue X0 = N0.getOperand(0), X1 = N0.getOperand(1);
   SDValue S0 = N1.getOperand(0);
-  if ((X0 == S0 && X1 == N1) || (X0 == N1 && X1 == S0)) {
-unsigned OpSizeInBits = VT.getScalarSizeInBits();
+  if ((X0 == S0 && X1 == N1) || (X0 == N1 && X1 == S0))
 if (ConstantSDNode *C = isConstOrConstSplat(N1.getOperand(1)))
-  if (C->getAPIntValue() == (OpSizeInBits - 1))
+  if (C->getAPIntValue() == (VT.getScalarSizeInBits() - 1))
 return DAG.getNode(ISD::ABS, SDLoc(N), VT, S0);
-  }
 }
   }
 
@@ -7683,12 +7681,10 @@ SDValue DAGCombiner::visitXOR(SDNode *N) {
 if (A.getOpcode() == ISD::ADD && S.getOpcode() == ISD::SRA) {
   SDValue A0 = A.getOperand(0), A1 = A.getOperand(1);
   SDValue S0 = S.getOperand(0);
-  if ((A0 == S && A1 == S0) || (A1 == S && A0 == S0)) {
-unsigned OpSizeInBits = VT.getScalarSizeInBits();
+  if ((A0 == S && A1 == S0) || (A1 == S && A0 == S0))
 if (ConstantSDNode *C = isConstOrConstSplat(S.getOperand(1)))
-  if (C->getAPIntValue() == (OpSizeInBits - 1))
+  if (C->getAPIntValue() == (VT.getScalarSizeInBits() - 1))
 return DAG.getNode(ISD::ABS, DL, VT, S0);
-  }
 }
   }
 
@@ -21993,9 +21989,8 @@ SDValue DAGCombiner::BuildUDIV(SDNode *N) {
 /// transform: LogBase2(V) = (EltBits - 1) - ctlz(V).
 SDValue DAGCombiner::BuildLogBase2(SDValue V, const SDLoc &DL) {
   EVT VT = V.getValueType();
-  unsigned EltBits = VT.getScalarSizeInBits();
   SDValue Ctlz = DAG.getNode(ISD::CTLZ, DL, VT, V);
-  SDValue Base = DAG.getConstant(EltBits - 1, DL, VT);
+  SDValue Base = DAG.getConstant(VT.getScalarSizeInBits() - 1, DL, VT);
   SDValue LogBase2 = DAG.getNode(ISD::SUB, DL, VT, Base, Ctlz);
   return LogBase2;
 }



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[llvm-branch-commits] [llvm] c86c024 - [X86] Fix static analyzer warnings. NFCI.

[Simon Pilgrim via llvm-branch-commits]

Author: Simon Pilgrim
Date: 2020-12-07T18:23:55Z
New Revision: c86c024e10841c690c7120376c4555da019a2221

URL: 
https://github.com/llvm/llvm-project/commit/c86c024e10841c690c7120376c4555da019a2221
DIFF: 
https://github.com/llvm/llvm-project/commit/c86c024e10841c690c7120376c4555da019a2221.diff

LOG: [X86] Fix static analyzer warnings. NFCI.

Replace '|' with '||' in condition, and fix case of SignedMode variable.

Added: 


Modified: 
llvm/lib/Target/X86/X86TargetTransformInfo.cpp

Removed: 




diff  --git a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp 
b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
index 6a52714fee41..5a342d41fb5e 100644
--- a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
+++ b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
@@ -232,16 +232,16 @@ int X86TTIImpl::getArithmeticInstrCost(unsigned Opcode, 
Type *Ty,
   bool Op2Signed = false;
   unsigned Op2MinSize = BaseT::minRequiredElementSize(Args[1], Op2Signed);
 
-  bool signedMode = Op1Signed | Op2Signed;
+  bool SignedMode = Op1Signed || Op2Signed;
   unsigned OpMinSize = std::max(Op1MinSize, Op2MinSize);
 
   if (OpMinSize <= 7)
 return LT.first * 3; // pmullw/sext
-  if (!signedMode && OpMinSize <= 8)
+  if (!SignedMode && OpMinSize <= 8)
 return LT.first * 3; // pmullw/zext
   if (OpMinSize <= 15)
 return LT.first * 5; // pmullw/pmulhw/pshuf
-  if (!signedMode && OpMinSize <= 16)
+  if (!SignedMode && OpMinSize <= 16)
 return LT.first * 5; // pmullw/pmulhw/pshuf
 }
 



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[llvm-branch-commits] [llvm] 5c819eb - [RISCV] Form GORCI from (or (rotl/rotr X, Bitwidth/2), X).

[Craig Topper via llvm-branch-commits]

Author: Craig Topper
Date: 2020-12-07T10:28:04-08:00
New Revision: 5c819eb38935cb7ec30ed3c3ef2ffe1ef6420792

URL: 
https://github.com/llvm/llvm-project/commit/5c819eb38935cb7ec30ed3c3ef2ffe1ef6420792
DIFF: 
https://github.com/llvm/llvm-project/commit/5c819eb38935cb7ec30ed3c3ef2ffe1ef6420792.diff

LOG: [RISCV] Form GORCI from (or (rotl/rotr X, Bitwidth/2), X).

A rotate by half the bitwidth swaps the bottom and top half which is the same 
as one of the MSB GREVI stage.

We have to do this as a special combine because we prefer to keep (rotl/rotr X, 
BitWidth/2) as a rotate rather than a single stage GREVI.

Differential Revision: https://reviews.llvm.org/D92286

Added: 


Modified: 
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/test/CodeGen/RISCV/rv32Zbp.ll
llvm/test/CodeGen/RISCV/rv64Zbp.ll

Removed: 




diff  --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp 
b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index e9a7e4e45bdd..7ced6d126e2a 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -1354,6 +1354,7 @@ static SDValue combineORToGREV(SDValue Op, SelectionDAG 
&DAG,
 // (or (or (BITMANIP_SHL x), (BITMANIP_SRL x)), x)
 // the inner pattern will first be matched as GREVI and then the outer
 // pattern will be matched to GORC via the first rule above.
+// 4.  (or (rotl/rotr x, bitwidth/2), x)
 static SDValue combineORToGORC(SDValue Op, SelectionDAG &DAG,
const RISCVSubtarget &Subtarget) {
   EVT VT = Op.getValueType();
@@ -1363,15 +1364,29 @@ static SDValue combineORToGORC(SDValue Op, SelectionDAG 
&DAG,
 SDValue Op0 = Op.getOperand(0);
 SDValue Op1 = Op.getOperand(1);
 
+auto MatchOROfReverse = [&](SDValue Reverse, SDValue X) {
+  if (Reverse.getOpcode() == RISCVISD::GREVI && Reverse.getOperand(0) == X 
&&
+  isPowerOf2_32(Reverse.getConstantOperandVal(1)))
+return DAG.getNode(RISCVISD::GORCI, DL, VT, X, Reverse.getOperand(1));
+  // We can also form GORCI from ROTL/ROTR by half the bitwidth.
+  if ((Reverse.getOpcode() == ISD::ROTL ||
+   Reverse.getOpcode() == ISD::ROTR) &&
+  Reverse.getOperand(0) == X &&
+  isa(Reverse.getOperand(1))) {
+uint64_t RotAmt = Reverse.getConstantOperandVal(1);
+if (RotAmt == (VT.getSizeInBits() / 2))
+  return DAG.getNode(
+  RISCVISD::GORCI, DL, VT, X,
+  DAG.getTargetConstant(RotAmt, DL, Subtarget.getXLenVT()));
+  }
+  return SDValue();
+};
+
 // Check for either commutable permutation of (or (GREVI x, shamt), x)
-for (const auto &OpPair :
- {std::make_pair(Op0, Op1), std::make_pair(Op1, Op0)}) {
-  if (OpPair.first.getOpcode() == RISCVISD::GREVI &&
-  OpPair.first.getOperand(0) == OpPair.second &&
-  isPowerOf2_32(OpPair.first.getConstantOperandVal(1)))
-return DAG.getNode(RISCVISD::GORCI, DL, VT, OpPair.second,
-   OpPair.first.getOperand(1));
-}
+if (SDValue V = MatchOROfReverse(Op0, Op1))
+  return V;
+if (SDValue V = MatchOROfReverse(Op1, Op0))
+  return V;
 
 // OR is commutable so canonicalize its OR operand to the left
 if (Op0.getOpcode() != ISD::OR && Op1.getOpcode() == ISD::OR)

diff  --git a/llvm/test/CodeGen/RISCV/rv32Zbp.ll 
b/llvm/test/CodeGen/RISCV/rv32Zbp.ll
index 6115f2217fa6..0ca3a2b10b1b 100644
--- a/llvm/test/CodeGen/RISCV/rv32Zbp.ll
+++ b/llvm/test/CodeGen/RISCV/rv32Zbp.ll
@@ -813,6 +813,52 @@ define i32 @gorc16_i32(i32 %a) nounwind {
   ret i32 %or2
 }
 
+define i32 @gorc16_rotl_i32(i32 %a) nounwind {
+; RV32I-LABEL: gorc16_rotl_i32:
+; RV32I:   # %bb.0:
+; RV32I-NEXT:srli a1, a0, 16
+; RV32I-NEXT:slli a2, a0, 16
+; RV32I-NEXT:or a1, a2, a1
+; RV32I-NEXT:or a0, a1, a0
+; RV32I-NEXT:ret
+;
+; RV32IB-LABEL: gorc16_rotl_i32:
+; RV32IB:   # %bb.0:
+; RV32IB-NEXT:orc16 a0, a0
+; RV32IB-NEXT:ret
+;
+; RV32IBP-LABEL: gorc16_rotl_i32:
+; RV32IBP:   # %bb.0:
+; RV32IBP-NEXT:orc16 a0, a0
+; RV32IBP-NEXT:ret
+  %rot = tail call i32 @llvm.fshl.i32(i32 %a, i32 %a, i32 16)
+  %or = or i32 %rot, %a
+  ret i32 %or
+}
+
+define i32 @gorc16_rotr_i32(i32 %a) nounwind {
+; RV32I-LABEL: gorc16_rotr_i32:
+; RV32I:   # %bb.0:
+; RV32I-NEXT:slli a1, a0, 16
+; RV32I-NEXT:srli a2, a0, 16
+; RV32I-NEXT:or a1, a2, a1
+; RV32I-NEXT:or a0, a1, a0
+; RV32I-NEXT:ret
+;
+; RV32IB-LABEL: gorc16_rotr_i32:
+; RV32IB:   # %bb.0:
+; RV32IB-NEXT:orc16 a0, a0
+; RV32IB-NEXT:ret
+;
+; RV32IBP-LABEL: gorc16_rotr_i32:
+; RV32IBP:   # %bb.0:
+; RV32IBP-NEXT:orc16 a0, a0
+; RV32IBP-NEXT:ret
+  %rot = tail call i32 @llvm.fshr.i32(i32 %a, i32 %a, i32 16)
+  %or = or i32 %rot, %a
+  ret i32 %or
+}
+
 define i64 @gorc16_i64(i64 %a) nounwind {
 ; RV32I-LABEL: gorc16_i64:
 ; RV32I:   # 

[llvm-branch-commits] [clang] fd14a27 - [Sema] Make more overload candidate types use iterator_ranges (NFC)

[Richard Sandiford via llvm-branch-commits]

Author: Richard Sandiford
Date: 2020-12-07T18:34:53Z
New Revision: fd14a2753368bc13468d6207daccba1c45ce79e6

URL: 
https://github.com/llvm/llvm-project/commit/fd14a2753368bc13468d6207daccba1c45ce79e6
DIFF: 
https://github.com/llvm/llvm-project/commit/fd14a2753368bc13468d6207daccba1c45ce79e6.diff

LOG: [Sema] Make more overload candidate types use iterator_ranges (NFC)

I have a patch that adds another group of candidate types to
BuiltinCandidateTypeSet.  Currently two styles are in use: the older
begin/end pairs and the newer iterator_range approach.  I think the
group of candidates that I want to add should use iterator ranges,
but I'd also like to consolidate the handling of the new candidates
with some existing code that uses begin/end pairs.  This patch therefore
converts the begin/end pairs to iterator ranges as a first step.

No functional change intended.

Differential Revision: https://reviews.llvm.org/D9

Added: 


Modified: 
clang/lib/Sema/SemaOverload.cpp

Removed: 




diff  --git a/clang/lib/Sema/SemaOverload.cpp b/clang/lib/Sema/SemaOverload.cpp
index 8db31c5fef12..02638beb6627 100644
--- a/clang/lib/Sema/SemaOverload.cpp
+++ b/clang/lib/Sema/SemaOverload.cpp
@@ -7843,26 +7843,14 @@ class BuiltinCandidateTypeSet  {
  bool AllowExplicitConversions,
  const Qualifiers &VisibleTypeConversionsQuals);
 
-  /// pointer_begin - First pointer type found;
-  iterator pointer_begin() { return PointerTypes.begin(); }
-
-  /// pointer_end - Past the last pointer type found;
-  iterator pointer_end() { return PointerTypes.end(); }
-
-  /// member_pointer_begin - First member pointer type found;
-  iterator member_pointer_begin() { return MemberPointerTypes.begin(); }
-
-  /// member_pointer_end - Past the last member pointer type found;
-  iterator member_pointer_end() { return MemberPointerTypes.end(); }
-
-  /// enumeration_begin - First enumeration type found;
-  iterator enumeration_begin() { return EnumerationTypes.begin(); }
-
-  /// enumeration_end - Past the last enumeration type found;
-  iterator enumeration_end() { return EnumerationTypes.end(); }
-
+  llvm::iterator_range pointer_types() { return PointerTypes; }
+  llvm::iterator_range member_pointer_types() {
+return MemberPointerTypes;
+  }
+  llvm::iterator_range enumeration_types() {
+return EnumerationTypes;
+  }
   llvm::iterator_range vector_types() { return VectorTypes; }
-
   llvm::iterator_range matrix_types() { return MatrixTypes; }
 
   bool containsMatrixType(QualType Ty) const { return MatrixTypes.count(Ty); }
@@ -8346,19 +8334,17 @@ class BuiltinOperatorOverloadBuilder {
   //   T* operator++(T*VQ&, int);
   //   T* operator--(T*VQ&, int);
   void addPlusPlusMinusMinusPointerOverloads() {
-for (BuiltinCandidateTypeSet::iterator
-  Ptr = CandidateTypes[0].pointer_begin(),
-   PtrEnd = CandidateTypes[0].pointer_end();
- Ptr != PtrEnd; ++Ptr) {
+for (QualType PtrTy : CandidateTypes[0].pointer_types()) {
   // Skip pointer types that aren't pointers to object types.
-  if (!(*Ptr)->getPointeeType()->isObjectType())
+  if (!PtrTy->getPointeeType()->isObjectType())
 continue;
 
-  addPlusPlusMinusMinusStyleOverloads(*Ptr,
-(!(*Ptr).isVolatileQualified() &&
- VisibleTypeConversionsQuals.hasVolatile()),
-(!(*Ptr).isRestrictQualified() &&
- VisibleTypeConversionsQuals.hasRestrict()));
+  addPlusPlusMinusMinusStyleOverloads(
+  PtrTy,
+  (!PtrTy.isVolatileQualified() &&
+   VisibleTypeConversionsQuals.hasVolatile()),
+  (!PtrTy.isRestrictQualified() &&
+   VisibleTypeConversionsQuals.hasRestrict()));
 }
   }
 
@@ -8373,11 +8359,7 @@ class BuiltinOperatorOverloadBuilder {
   //   ref-qualifier, there exist candidate operator functions of the form
   //   T& operator*(T*);
   void addUnaryStarPointerOverloads() {
-for (BuiltinCandidateTypeSet::iterator
-  Ptr = CandidateTypes[0].pointer_begin(),
-   PtrEnd = CandidateTypes[0].pointer_end();
- Ptr != PtrEnd; ++Ptr) {
-  QualType ParamTy = *Ptr;
+for (QualType ParamTy : CandidateTypes[0].pointer_types()) {
   QualType PointeeTy = ParamTy->getPointeeType();
   if (!PointeeTy->isObjectType() && !PointeeTy->isFunctionType())
 continue;
@@ -8417,13 +8399,8 @@ class BuiltinOperatorOverloadBuilder {
   //
   //   T* operator+(T*);
   void addUnaryPlusPointerOverloads() {
-for (BuiltinCandidateTypeSet::iterator
-  Ptr = CandidateTypes[0].pointer_begin(),
-   PtrEnd = CandidateTypes[0].pointer_end();
- Ptr != PtrEnd; ++Ptr) {
-  QualType ParamTy = *Ptr;
+for (QualType ParamTy : CandidateTypes[0].pointer_types())
   S.AddBuiltinCandidate(&ParamTy, Args, Candida

[llvm-branch-commits] [llvm] 49921d1 - [PowerPC] Exploitation of xxeval instruction for AND and NAND

[Stefan Pintilie via llvm-branch-commits]

Author: Stefan Pintilie
Date: 2020-12-07T12:36:54-06:00
New Revision: 49921d1c3cee2d1c248a3654331384e648457435

URL: 
https://github.com/llvm/llvm-project/commit/49921d1c3cee2d1c248a3654331384e648457435
DIFF: 
https://github.com/llvm/llvm-project/commit/49921d1c3cee2d1c248a3654331384e648457435.diff

LOG: [PowerPC] Exploitation of xxeval instruction for AND and NAND

The xxeval instruction was intorduced in Power PC in Power 10.
The instruction accepts three vector registers and an immediate.
Depending on the value of the immediate the instruction can be used
to perform certain bitwise boolean operations (and, or, xor, ...) on
the given vector registers.

This patch implements the AND and NAND patterns that can be used by
the instruction.

Reviewed By: nemanjai, #powerpc, bsaleil, NeHuang, jsji

Differential Revision: https://reviews.llvm.org/D92420

Added: 
llvm/test/CodeGen/PowerPC/xxeval-and-nand.ll

Modified: 
llvm/lib/Target/PowerPC/PPCInstrPrefix.td

Removed: 




diff  --git a/llvm/lib/Target/PowerPC/PPCInstrPrefix.td 
b/llvm/lib/Target/PowerPC/PPCInstrPrefix.td
index e1b76bb3bd00..8af365bf3243 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrPrefix.td
+++ b/llvm/lib/Target/PowerPC/PPCInstrPrefix.td
@@ -2562,6 +2562,9 @@ let AddedComplexity = 400, Predicates = [IsISA3_1] in {
 (STXVRDX (COPY_TO_REGCLASS $rS, VSRC), xoaddr:$src)>;
 }
 
+class xxevalPattern  imm> :
+  Pat<(v4i32 pattern), (XXEVAL $vA, $vB, $vC, imm)> {}
+
 let AddedComplexity = 400, Predicates = [PrefixInstrs] in {
  def : Pat<(v4i32 (build_vector i32immNonAllOneNonZero:$A,
 i32immNonAllOneNonZero:$A,
@@ -2574,6 +2577,44 @@ let AddedComplexity = 400, Predicates = [PrefixInstrs] 
in {
  def : Pat<(f64 nzFPImmAsi32:$A),
(COPY_TO_REGCLASS (XXSPLTIDP (getFPAs32BitInt fpimm:$A)),
  VSFRC)>;
+
+  // Anonymous patterns for XXEVAL
+  // AND
+  // and(A, B, C)
+  def : xxevalPattern<(and v4i32:$vA, (and v4i32:$vB, v4i32:$vC)), 1>;
+  // and(A, xor(B, C))
+  def : xxevalPattern<(and v4i32:$vA, (xor v4i32:$vB, v4i32:$vC)), 6>;
+  // and(A, or(B, C))
+  def : xxevalPattern<(and v4i32:$vA, (or v4i32:$vB, v4i32:$vC)), 7>;
+  // and(A, nor(B, C))
+  def : xxevalPattern<(and v4i32:$vA, (vnot_ppc (or v4i32:$vB, v4i32:$vC))),
+   8>;
+  // and(A, eqv(B, C))
+  def : xxevalPattern<(and v4i32:$vA, (vnot_ppc (xor v4i32:$vB, v4i32:$vC))),
+   9>;
+  // and(A, nand(B, C))
+  def : xxevalPattern<(and v4i32:$vA, (vnot_ppc (and v4i32:$vB, v4i32:$vC))),
+   14>;
+
+  // NAND
+  // nand(A, B, C)
+  def : xxevalPattern<(vnot_ppc (and v4i32:$vA, (and v4i32:$vB, v4i32:$vC))),
+   !sub(255, 1)>;
+  // nand(A, xor(B, C))
+  def : xxevalPattern<(vnot_ppc (and v4i32:$vA, (xor v4i32:$vB, v4i32:$vC))),
+   !sub(255, 6)>;
+  // nand(A, or(B, C))
+  def : xxevalPattern<(vnot_ppc (and v4i32:$vA, (or v4i32:$vB, v4i32:$vC))),
+   !sub(255, 7)>;
+  // nand(A, nor(B, C))
+  def : xxevalPattern<(or (vnot_ppc v4i32:$vA), (or v4i32:$vB, v4i32:$vC)),
+   !sub(255, 8)>;
+  // nand(A, eqv(B, C))
+  def : xxevalPattern<(or (vnot_ppc v4i32:$vA), (xor v4i32:$vB, v4i32:$vC)),
+   !sub(255, 9)>;
+  // nand(A, nand(B, C))
+  def : xxevalPattern<(or (vnot_ppc v4i32:$vA), (and v4i32:$vB, v4i32:$vC)),
+   !sub(255, 14)>;
 }
 
 let Predicates = [PrefixInstrs] in {

diff  --git a/llvm/test/CodeGen/PowerPC/xxeval-and-nand.ll 
b/llvm/test/CodeGen/PowerPC/xxeval-and-nand.ll
new file mode 100644
index ..ba74df956e71
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/xxeval-and-nand.ll
@@ -0,0 +1,189 @@
+; RUN: llc -verify-machineinstrs -mcpu=pwr10 
-mtriple=powerpc64le-unknown-unknown \
+; RUN:   -ppc-asm-full-reg-names --ppc-vsr-nums-as-vr < %s | FileCheck %s
+
+; Function Attrs: nounwind
+; CHECK-LABEL: and_not
+; CHECK: xxlandc v2, v2, v3
+; CHECK-NEXT:blr
+define dso_local <4 x i32> @and_not(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C) 
local_unnamed_addr #0 {
+entry:
+  %neg = xor <4 x i32> %B, 
+  %and = and <4 x i32> %neg, %A
+  ret <4 x i32> %and
+}
+
+; Function Attrs: nounwind
+; CHECK-LABEL: and_and8
+; CHECK: xxeval v2, v3, v2, v4, 1
+; CHECK-NEXT:blr
+define dso_local <16 x i8> @and_and8(<16 x i8> %A, <16 x i8> %B, <16 x i8> %C) 
local_unnamed_addr #0 {
+entry:
+  %and = and <16 x i8> %B, %A
+  %and1 = and <16 x i8> %and, %C
+  ret <16 x i8> %and1
+}
+
+; Function Attrs: nounwind
+; CHECK-LABEL: and_and16
+; CHECK: xxeval v2, v3, v2, v4, 1
+; CHECK-NEXT:blr
+define dso_local <8 x i16> @and_and16(<8 x i16> %A, <8 x i16> %B, <8 x i16> 
%C) local_unnamed_addr #0 {
+entry:
+  %and = and <8 x i16> %B, %A
+  %and1 = and <8 x i16> %and, %C
+  ret <8 x i16> %and1
+}
+
+; Function Attrs: nounwind
+; CHECK-LABE

[llvm-branch-commits] [clang] f8d5b49 - Fix missing error for use of 128-bit integer inside SPIR64 device code.

[Jennifer Yu via llvm-branch-commits]

Author: Jennifer Yu
Date: 2020-12-07T10:42:32-08:00
New Revision: f8d5b49c786f5766aa89b59606bd4c4ae10b46f6

URL: 
https://github.com/llvm/llvm-project/commit/f8d5b49c786f5766aa89b59606bd4c4ae10b46f6
DIFF: 
https://github.com/llvm/llvm-project/commit/f8d5b49c786f5766aa89b59606bd4c4ae10b46f6.diff

LOG: Fix missing error for use of 128-bit integer inside SPIR64 device code.
Emit error for use of 128-bit integer inside device code had been
already implemented in https://reviews.llvm.org/D74387.  However,
the error is not emitted for SPIR64, because for SPIR64, hasInt128Type
return true.

hasInt128Type: is also used to control generation of certain 128-bit
predefined macros, initializer predefined 128-bit integer types and
build 128-bit ArithmeticTypes.  Except predefined macros, only the
device target is considered, since error only emit when 128-bit
integer is used inside device code, the host target (auxtarget) also
needs to be considered.

The change address:
1. (SPIR.h) Correct hasInt128Type() for SPIR targets.
2. Sema.cpp and SemaOverload.cpp: Add additional check to consider host
   target(auxtarget) when call to hasInt128Type.  So that __int128_t
   and __int128() are allowed to avoid error when they used outside
   device code.
3. SemaType.cpp: add check for SYCLIsDevice to delay the error message.
   The error will be emitted if the use of 128-bit integer in the device
   code.

   Reviewed By: Johannes Doerfert and Aaron Ballman

   Differential Revision: https://reviews.llvm.org/D92439

Added: 
clang/test/SemaSYCL/int128.cpp

Modified: 
clang/lib/Basic/Targets/SPIR.h
clang/lib/Sema/Sema.cpp
clang/lib/Sema/SemaOverload.cpp
clang/lib/Sema/SemaType.cpp
clang/test/CodeGen/ext-int-cc.c

Removed: 




diff  --git a/clang/lib/Basic/Targets/SPIR.h b/clang/lib/Basic/Targets/SPIR.h
index 6473138982c1..130ce1872dce 100644
--- a/clang/lib/Basic/Targets/SPIR.h
+++ b/clang/lib/Basic/Targets/SPIR.h
@@ -104,6 +104,8 @@ class LLVM_LIBRARY_VISIBILITY SPIRTargetInfo : public 
TargetInfo {
   }
 
   bool hasExtIntType() const override { return true; }
+
+  bool hasInt128Type() const override { return false; }
 };
 class LLVM_LIBRARY_VISIBILITY SPIR32TargetInfo : public SPIRTargetInfo {
 public:

diff  --git a/clang/lib/Sema/Sema.cpp b/clang/lib/Sema/Sema.cpp
index 3901c5e1fec8..b99dc33d8748 100644
--- a/clang/lib/Sema/Sema.cpp
+++ b/clang/lib/Sema/Sema.cpp
@@ -236,7 +236,9 @@ void Sema::Initialize() {
 return;
 
   // Initialize predefined 128-bit integer types, if needed.
-  if (Context.getTargetInfo().hasInt128Type()) {
+  if (Context.getTargetInfo().hasInt128Type() ||
+  (Context.getAuxTargetInfo() &&
+   Context.getAuxTargetInfo()->hasInt128Type())) {
 // If either of the 128-bit integer types are unavailable to name lookup,
 // define them now.
 DeclarationName Int128 = &Context.Idents.get("__int128_t");

diff  --git a/clang/lib/Sema/SemaOverload.cpp b/clang/lib/Sema/SemaOverload.cpp
index 02638beb6627..ff010fd6e4df 100644
--- a/clang/lib/Sema/SemaOverload.cpp
+++ b/clang/lib/Sema/SemaOverload.cpp
@@ -8187,12 +8187,16 @@ class BuiltinOperatorOverloadBuilder {
 ArithmeticTypes.push_back(S.Context.IntTy);
 ArithmeticTypes.push_back(S.Context.LongTy);
 ArithmeticTypes.push_back(S.Context.LongLongTy);
-if (S.Context.getTargetInfo().hasInt128Type())
+if (S.Context.getTargetInfo().hasInt128Type() ||
+(S.Context.getAuxTargetInfo() &&
+ S.Context.getAuxTargetInfo()->hasInt128Type()))
   ArithmeticTypes.push_back(S.Context.Int128Ty);
 ArithmeticTypes.push_back(S.Context.UnsignedIntTy);
 ArithmeticTypes.push_back(S.Context.UnsignedLongTy);
 ArithmeticTypes.push_back(S.Context.UnsignedLongLongTy);
-if (S.Context.getTargetInfo().hasInt128Type())
+if (S.Context.getTargetInfo().hasInt128Type() ||
+(S.Context.getAuxTargetInfo() &&
+ S.Context.getAuxTargetInfo()->hasInt128Type()))
   ArithmeticTypes.push_back(S.Context.UnsignedInt128Ty);
 LastPromotedIntegralType = ArithmeticTypes.size();
 LastPromotedArithmeticType = ArithmeticTypes.size();

diff  --git a/clang/lib/Sema/SemaType.cpp b/clang/lib/Sema/SemaType.cpp
index a8ba0643d41d..0d80bce10ffd 100644
--- a/clang/lib/Sema/SemaType.cpp
+++ b/clang/lib/Sema/SemaType.cpp
@@ -1515,6 +1515,7 @@ static QualType ConvertDeclSpecToType(TypeProcessingState 
&state) {
   }
   case DeclSpec::TST_int128:
 if (!S.Context.getTargetInfo().hasInt128Type() &&
+!S.getLangOpts().SYCLIsDevice &&
 !(S.getLangOpts().OpenMP && S.getLangOpts().OpenMPIsDevice))
   S.Diag(DS.getTypeSpecTypeLoc(), diag::err_type_unsupported)
 << "__int128";

diff  --git a/clang/test/CodeGen/ext-int-cc.c b/clang/test/CodeGen/ext-int-cc.c
index 02e2f3aef274..dd21845592a8 100644
--- a/clang/test/CodeGen/ext-int-cc.c
+++ b/clang/test/CodeGen/ext-int-cc.c
@@ -43,7 +43,7 @@ void P

[llvm-branch-commits] [llvm] 32825e8 - [ConstraintElimination] Tweak placement in pipeline.

[Florian Hahn via llvm-branch-commits]

Author: Florian Hahn
Date: 2020-12-07T19:08:40Z
New Revision: 32825e8636d6832007f30ae46ffbae124020ad31

URL: 
https://github.com/llvm/llvm-project/commit/32825e8636d6832007f30ae46ffbae124020ad31
DIFF: 
https://github.com/llvm/llvm-project/commit/32825e8636d6832007f30ae46ffbae124020ad31.diff

LOG: [ConstraintElimination] Tweak placement in pipeline.

This patch adds the ConstraintElimination pass to the LTO pipeline and
also runs it after SCCP in the function simplification pipeline.

This increases the number of cases we can elimination. Pending further
tuning.

Added: 


Modified: 
llvm/lib/Transforms/IPO/PassManagerBuilder.cpp

Removed: 




diff  --git a/llvm/lib/Transforms/IPO/PassManagerBuilder.cpp 
b/llvm/lib/Transforms/IPO/PassManagerBuilder.cpp
index e03015f8b0aa..e823a56073a4 100644
--- a/llvm/lib/Transforms/IPO/PassManagerBuilder.cpp
+++ b/llvm/lib/Transforms/IPO/PassManagerBuilder.cpp
@@ -470,6 +470,9 @@ void PassManagerBuilder::addFunctionSimplificationPasses(
   MPM.add(createMemCpyOptPass()); // Remove memcpy / form memset
   MPM.add(createSCCPPass());  // Constant prop with SCCP
 
+  if (EnableConstraintElimination)
+MPM.add(createConstraintEliminationPass());
+
   // Delete dead bit computations (instcombine runs after to fold away the dead
   // computations, and then ADCE will run later to exploit any new DCE
   // opportunities that creates).
@@ -1056,6 +1059,9 @@ void 
PassManagerBuilder::addLTOOptimizationPasses(legacy::PassManagerBase &PM) {
   if (EnableLoopInterchange)
 PM.add(createLoopInterchangePass());
 
+  if (EnableConstraintElimination)
+PM.add(createConstraintEliminationPass());
+
   // Unroll small loops
   PM.add(createSimpleLoopUnrollPass(OptLevel, DisableUnrollLoops,
 ForgetAllSCEVInLoopUnroll));



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[llvm-branch-commits] [libcxx] bf8683a - [libc++] [docs] Mark LWG3055 as complete. Use string_view instead of string in path::operator+=(ECharT).

[Marek Kurdej via llvm-branch-commits]

Author: Marek Kurdej
Date: 2020-12-07T20:18:09+01:00
New Revision: bf8683adfa39d53c223cf8b98fa036e835c9570e

URL: 
https://github.com/llvm/llvm-project/commit/bf8683adfa39d53c223cf8b98fa036e835c9570e
DIFF: 
https://github.com/llvm/llvm-project/commit/bf8683adfa39d53c223cf8b98fa036e835c9570e.diff

LOG: [libc++] [docs] Mark LWG3055 as complete. Use string_view instead of 
string in path::operator+=(ECharT).

The issue didn't change the behaviour which is tested in 
libcxx/test/std/input.output/filesystems/class.path/path.member/path.concat.pass.cpp.

The change to use string_view instead of string is not strictly necessary.

 was added in commit 998a5c88312066fcc2b2de1358edc76587611354 
(Implement ).

Reviewed By: #libc, ldionne

Differential Revision: https://reviews.llvm.org/D92731

Added: 


Modified: 
libcxx/docs/Cxx2aStatusIssuesStatus.csv
libcxx/include/filesystem

Removed: 




diff  --git a/libcxx/docs/Cxx2aStatusIssuesStatus.csv 
b/libcxx/docs/Cxx2aStatusIssuesStatus.csv
index 4ef24005a3c0..2d0af44a259e 100644
--- a/libcxx/docs/Cxx2aStatusIssuesStatus.csv
+++ b/libcxx/docs/Cxx2aStatusIssuesStatus.csv
@@ -143,7 +143,7 @@
 "`3182 `__","Specification of ``Same``\  could be 
clearer","Kona","",""
 "","","","",""
 "`2899 `__","``is_(nothrow_)move_constructible``\  
and ``tuple``\ , ``optional``\  and ``unique_ptr``\ ","Cologne","",""
-"`3055 
`__","``path::operator+=(*single-character*)``\  
misspecified","Cologne","",""
+"`3055 
`__","``path::operator+=(*single-character*)``\  
misspecified","Cologne","|Complete|","7.0"
 "`3158 `__","``tuple(allocator_arg_t, const 
Alloc&)``\  should be conditionally explicit","Cologne","",""
 "`3169 `__","``ranges``\  permutation generators 
discard useful information","Cologne","",""
 "`3183 `__","Normative permission to specialize 
Ranges variable templates","Cologne","",""

diff  --git a/libcxx/include/filesystem b/libcxx/include/filesystem
index d24751b716e3..1a44d9f360e3 100644
--- a/libcxx/include/filesystem
+++ b/libcxx/include/filesystem
@@ -940,9 +940,8 @@ public:
   template 
   typename enable_if<__can_convert_char<_ECharT>::value, path&>::type
   operator+=(_ECharT __x) {
-basic_string<_ECharT> __tmp;
-__tmp += __x;
-_PathCVT<_ECharT>::__append_source(__pn_, __tmp);
+_PathCVT<_ECharT>::__append_source(__pn_,
+   basic_string_view<_ECharT>(&__x, 1));
 return *this;
   }
 



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[llvm-branch-commits] [llvm] dd89249 - [AMDGPU] Annotate vgpr<->agpr spills in asm

[Stanislav Mekhanoshin via llvm-branch-commits]

Author: Stanislav Mekhanoshin
Date: 2020-12-07T11:25:25-08:00
New Revision: dd892494983a2e64d1e1eb3d05ce9577357336d2

URL: 
https://github.com/llvm/llvm-project/commit/dd892494983a2e64d1e1eb3d05ce9577357336d2
DIFF: 
https://github.com/llvm/llvm-project/commit/dd892494983a2e64d1e1eb3d05ce9577357336d2.diff

LOG: [AMDGPU] Annotate vgpr<->agpr spills in asm

Differential Revision: https://reviews.llvm.org/D92125

Added: 


Modified: 
llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
llvm/test/CodeGen/AMDGPU/spill-agpr.ll
llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr.ll

Removed: 




diff  --git a/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp 
b/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
index 9d7a041390ca..18be7c23c94e 100644
--- a/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
@@ -697,8 +697,10 @@ static MachineInstrBuilder spillVGPRtoAGPR(const 
GCNSubtarget &ST,
   unsigned Opc = (IsStore ^ TRI->isVGPR(MRI, Reg)) ? 
AMDGPU::V_ACCVGPR_WRITE_B32
: 
AMDGPU::V_ACCVGPR_READ_B32;
 
-  return BuildMI(*MBB, MI, MI->getDebugLoc(), TII->get(Opc), Dst)
-   .addReg(Src, getKillRegState(IsKill));
+  auto MIB = BuildMI(*MBB, MI, MI->getDebugLoc(), TII->get(Opc), Dst)
+   .addReg(Src, getKillRegState(IsKill));
+  MIB->setAsmPrinterFlag(MachineInstr::ReloadReuse);
+  return MIB;
 }
 
 // This 
diff ers from buildSpillLoadStore by only scavenging a VGPR. It does not
@@ -871,10 +873,12 @@ void 
SIRegisterInfo::buildSpillLoadStore(MachineBasicBlock::iterator MI,
   RS->setRegUsed(TmpReg);
 }
 if (IsStore) {
-  auto AccRead = BuildMI(*MBB, MI, DL, 
TII->get(AMDGPU::V_ACCVGPR_READ_B32), TmpReg)
+  auto AccRead = BuildMI(*MBB, MI, DL,
+ TII->get(AMDGPU::V_ACCVGPR_READ_B32), TmpReg)
 .addReg(SubReg, getKillRegState(IsKill));
   if (NeedSuperRegDef)
 AccRead.addReg(ValueReg, RegState::ImplicitDefine);
+  AccRead->setAsmPrinterFlag(MachineInstr::ReloadReuse);
 }
 SubReg = TmpReg;
   }
@@ -908,10 +912,12 @@ void 
SIRegisterInfo::buildSpillLoadStore(MachineBasicBlock::iterator MI,
   if (!IsAGPR && NeedSuperRegDef)
 MIB.addReg(ValueReg, RegState::ImplicitDefine);
 
-  if (!IsStore && TmpReg != AMDGPU::NoRegister)
+  if (!IsStore && TmpReg != AMDGPU::NoRegister) {
 MIB = BuildMI(*MBB, MI, DL, TII->get(AMDGPU::V_ACCVGPR_WRITE_B32),
   FinalReg)
   .addReg(TmpReg, RegState::Kill);
+MIB->setAsmPrinterFlag(MachineInstr::ReloadReuse);
+  }
 } else {
   if (NeedSuperRegDef)
 MIB.addReg(ValueReg, RegState::ImplicitDefine);

diff  --git a/llvm/test/CodeGen/AMDGPU/spill-agpr.ll 
b/llvm/test/CodeGen/AMDGPU/spill-agpr.ll
index 3e7b381a45fe..511d02a104b3 100644
--- a/llvm/test/CodeGen/AMDGPU/spill-agpr.ll
+++ b/llvm/test/CodeGen/AMDGPU/spill-agpr.ll
@@ -5,10 +5,10 @@
 ; A2M-DAG:s_mov_b32 s{{[0-9]+}}, SCRATCH_RSRC_DWORD0
 ; A2M-DAG:s_mov_b32 s{{[0-9]+}}, SCRATCH_RSRC_DWORD1
 ; A2V-NOT:SCRATCH_RSRC
-; GFX908-DAG: v_accvgpr_read_b32 v[[VSPILL:[0-9]+]], a0
+; GFX908-DAG: v_accvgpr_read_b32 v[[VSPILL:[0-9]+]], a0 ; Reload Reuse
 ; A2M:buffer_store_dword v[[VSPILL]], off, s[{{[0-9:]+}}], 0 
offset:[[FI:[0-9]+]] ; 4-byte Folded Spill
 ; A2M:buffer_load_dword v[[VSPILL:[0-9]+]], off, s[{{[0-9:]+}}], 0 
offset:[[FI]] ; 4-byte Folded Reload
-; GFX908: v_accvgpr_write_b32 a{{[0-9]+}}, v[[VSPILL]]
+; GFX908: v_accvgpr_write_b32 a{{[0-9]+}}, v[[VSPILL]] ; Reload Reuse
 ; A2V:ScratchSize: 0
 define amdgpu_kernel void @max_24regs_32a_used(<16 x float> addrspace(1)* 
%arg, float addrspace(1)* %out) #0 {
 bb:
@@ -34,10 +34,10 @@ bb:
 ; A2M-DAG:s_mov_b32 s{{[0-9]+}}, SCRATCH_RSRC_DWORD0
 ; A2M-DAG:s_mov_b32 s{{[0-9]+}}, SCRATCH_RSRC_DWORD1
 ; A2V-NOT:SCRATCH_RSRC
-; GFX908-DAG: v_accvgpr_read_b32 v[[VSPILL:[0-9]+]], a{{[0-9]+}}
+; GFX908-DAG: v_accvgpr_read_b32 v[[VSPILL:[0-9]+]], a{{[0-9]+}} ; Reload Reuse
 ; A2M:buffer_store_dword v[[VSPILL]], off, s[{{[0-9:]+}}], 0 
offset:[[FI:[0-9]+]] ; 4-byte Folded Spill
 ; A2M:buffer_load_dword v[[VSPILL:[0-9]+]], off, s[{{[0-9:]+}}], 0 
offset:[[FI]] ; 4-byte Folded Reload
-; A2V:v_accvgpr_write_b32 a{{[0-9]+}}, v[[VSPILL]]
+; A2V:v_accvgpr_write_b32 a{{[0-9]+}}, v[[VSPILL]] ; Reload Reuse
 ; A2V:ScratchSize: 0
 define amdgpu_kernel void @max_12regs_13a_used(i32 %cond, <4 x float> 
addrspace(1)* %arg, <4 x float> addrspace(1)* %out) #2 {
 bb:
@@ -55,8 +55,7 @@ use:
 st:
   %gep1 = getelementptr <4 x float>, <4 x float> addrspace(1)* %out, i64 16
   %gep2 = getelementptr <4 x float>, <4 x float> addrspace(1)* %out, i64 32
-  store <4 x float> %mai.1, <4 x float> addrspace(1)* %gep1
-  store <4 x float> %mai.2, <4 x flo

[llvm-branch-commits] [llvm] 875b4fd - [flang][openacc] Add clause validity tests for the kernels directive

[via llvm-branch-commits]

Author: Valentin Clement
Date: 2020-12-07T14:27:18-05:00
New Revision: 875b4fd5ee95bedd6ec2bcf8423c159ccecd8443

URL: 
https://github.com/llvm/llvm-project/commit/875b4fd5ee95bedd6ec2bcf8423c159ccecd8443
DIFF: 
https://github.com/llvm/llvm-project/commit/875b4fd5ee95bedd6ec2bcf8423c159ccecd8443.diff

LOG: [flang][openacc] Add clause validity tests for the kernels directive

Add some clause validity tests for the kernels directive

Reviewed By: sameeranjoshi

Differential Revision: https://reviews.llvm.org/D91873

Added: 


Modified: 
flang/test/Semantics/acc-clause-validity.f90
llvm/include/llvm/Frontend/OpenACC/ACC.td

Removed: 




diff  --git a/flang/test/Semantics/acc-clause-validity.f90 
b/flang/test/Semantics/acc-clause-validity.f90
index 64e6ca887b6c..717b5cd30418 100644
--- a/flang/test/Semantics/acc-clause-validity.f90
+++ b/flang/test/Semantics/acc-clause-validity.f90
@@ -506,26 +506,6 @@ program openacc_clause_validity
   end do
   !$acc end parallel loop
 
-  !$acc kernels device_type(*) async
-  do i = 1, N
-a(i) = 3.14
-  end do
-  !$acc end kernels
-
-  !ERROR: Clause IF is not allowed after clause DEVICE_TYPE on the KERNELS 
directive
-  !$acc kernels device_type(*) if(.TRUE.)
-  do i = 1, N
-a(i) = 3.14
-  end do
-  !$acc end kernels
-
-  !ERROR: Clause IF is not allowed after clause DEVICE_TYPE on the KERNELS 
LOOP directive
-  !$acc kernels loop device_type(*) if(.TRUE.)
-  do i = 1, N
-a(i) = 3.14
-  end do
-  !$acc end kernels loop
-
   !$acc serial device_type(*) async
   do i = 1, N
 a(i) = 3.14
@@ -622,18 +602,128 @@ program openacc_clause_validity
 reduction_l = d(i) .neqv. e(i)
   end do
 
+  !$acc kernels async
+  !$acc end kernels
+
+  !$acc kernels async(1)
+  !$acc end kernels
+
+  !$acc kernels async(async1)
+  !$acc end kernels
+
+  !$acc kernels wait(wait1)
+  !$acc end kernels
+
+  !$acc kernels wait(wait1, wait2)
+  !$acc end kernels
+
   !$acc kernels wait(1, 2) async(3)
   !$acc end kernels
 
   !$acc kernels wait(queues: 1, 2) async(3)
   !$acc end kernels
 
+  !$acc kernels wait(1) wait(2) async(3)
+  !$acc end kernels
+
   !$acc kernels wait(devnum: 1: 1, 2) async(3)
   !$acc end kernels
 
   !$acc kernels wait(devnum: 1: queues: 1, 2) async(3)
   !$acc end kernels
 
+  !$acc kernels num_gangs(8)
+  !$acc end kernels
+
+  !$acc kernels num_workers(8)
+  !$acc end kernels
+
+  !$acc kernels vector_length(128)
+  !$acc end kernels
+
+  !$acc kernels if(.true.)
+  !$acc end kernels
+
+  !$acc kernels if(ifCondition)
+  !$acc end kernels
+
+  !ERROR: At most one IF clause can appear on the KERNELS directive
+  !$acc kernels if(.true.) if(ifCondition)
+  !$acc end kernels
+
+  !$acc kernels self
+  !$acc end kernels
+
+  !$acc kernels self(.true.)
+  !$acc end kernels
+
+  !$acc kernels self(ifCondition)
+  !$acc end kernels
+
+  !$acc kernels copy(aa) copyin(bb) copyout(cc)
+  !$acc end kernels
+
+  !$acc kernels copy(aa, bb) copyout(zero: cc)
+  !$acc end kernels
+
+  !$acc kernels present(aa, bb) create(cc)
+  !$acc end kernels
+
+  !$acc kernels copyin(readonly: aa, bb) create(zero: cc)
+  !$acc end kernels
+
+  !$acc kernels deviceptr(aa, bb) no_create(cc)
+  !$acc end kernels
+
+  !$acc kernels attach(aa, bb, cc)
+  !$acc end kernels
+
+  !ERROR: PRIVATE clause is not allowed on the KERNELS directive
+  !$acc kernels private(aa, bb, cc)
+  !$acc end kernels
+
+  !$acc kernels default(none)
+  !$acc end kernels
+
+  !$acc kernels default(present)
+  !$acc end kernels
+
+  !ERROR: At most one DEFAULT clause can appear on the KERNELS directive
+  !$acc kernels default(none) default(present)
+  !$acc end kernels
+
+  !$acc kernels device_type(*)
+  !$acc end kernels
+
+  !$acc kernels device_type(1)
+  !$acc end kernels
+
+  !$acc kernels device_type(1, 3)
+  !$acc end kernels
+
+  !$acc kernels device_type(*) async wait num_gangs(8) num_workers(8) 
vector_length(128)
+  !$acc end kernels
+
+  !$acc kernels device_type(*) async
+  do i = 1, N
+a(i) = 3.14
+  end do
+  !$acc end kernels
+
+  !ERROR: Clause IF is not allowed after clause DEVICE_TYPE on the KERNELS 
directive
+  !$acc kernels device_type(*) if(.TRUE.)
+  do i = 1, N
+a(i) = 3.14
+  end do
+  !$acc end kernels
+
+  !ERROR: Clause IF is not allowed after clause DEVICE_TYPE on the KERNELS 
LOOP directive
+  !$acc kernels loop device_type(*) if(.TRUE.)
+  do i = 1, N
+a(i) = 3.14
+  end do
+  !$acc end kernels loop
+
   !$acc wait
 
   !$acc wait async

diff  --git a/llvm/include/llvm/Frontend/OpenACC/ACC.td 
b/llvm/include/llvm/Frontend/OpenACC/ACC.td
index eaca44f6b158..206f82adb1e5 100644
--- a/llvm/include/llvm/Frontend/OpenACC/ACC.td
+++ b/llvm/include/llvm/Frontend/OpenACC/ACC.td
@@ -298,7 +298,8 @@ def ACC_Kernels : Directive<"kernels"> {
 VersionedClause,
 VersionedClause,
 VersionedClause,
-VersionedClause
+VersionedClause,
+VersionedClause
   ];
   l

[llvm-branch-commits] [clang] 3ce78f5 - [analyzer] Ignore annotations if func is inlined.

[Haowei Wu via llvm-branch-commits]

Author: Yu Shan
Date: 2020-12-07T11:28:11-08:00
New Revision: 3ce78f54edcfc881377a9e567715caf2f0be2abc

URL: 
https://github.com/llvm/llvm-project/commit/3ce78f54edcfc881377a9e567715caf2f0be2abc
DIFF: 
https://github.com/llvm/llvm-project/commit/3ce78f54edcfc881377a9e567715caf2f0be2abc.diff

LOG: [analyzer] Ignore annotations if func is inlined.

When we annotating a function header so that it could be used by other
TU, we also need to make sure the function is parsed correctly within
the same TU. So if we can find the function's implementation,
ignore the annotations, otherwise, false positive would occur.
Move the escape by value case to post call and do not escape the handle
if the function is inlined and we have analyzed the handle.

Differential Revision: https://reviews.llvm.org/D91902

Added: 


Modified: 
clang/lib/StaticAnalyzer/Checkers/FuchsiaHandleChecker.cpp
clang/test/Analysis/fuchsia_handle.cpp

Removed: 




diff  --git a/clang/lib/StaticAnalyzer/Checkers/FuchsiaHandleChecker.cpp 
b/clang/lib/StaticAnalyzer/Checkers/FuchsiaHandleChecker.cpp
index d4901eb0abbb..c246a8db3067 100644
--- a/clang/lib/StaticAnalyzer/Checkers/FuchsiaHandleChecker.cpp
+++ b/clang/lib/StaticAnalyzer/Checkers/FuchsiaHandleChecker.cpp
@@ -331,11 +331,6 @@ void FuchsiaHandleChecker::checkPreCall(const CallEvent 
&Call,
   return;
 }
   }
-  if (!hasFuchsiaAttr(PVD) &&
-  PVD->getType()->isIntegerType()) {
-// Working around integer by-value escapes.
-State = State->set(Handle, HandleState::getEscaped());
-  }
 }
   }
   C.addTransition(State);
@@ -347,6 +342,10 @@ void FuchsiaHandleChecker::checkPostCall(const CallEvent 
&Call,
   if (!FuncDecl)
 return;
 
+  // If we analyzed the function body, then ignore the annotations.
+  if (C.wasInlined)
+return;
+
   ProgramStateRef State = C.getState();
 
   std::vector> Notes;
@@ -417,6 +416,14 @@ void FuchsiaHandleChecker::checkPostCall(const CallEvent 
&Call,
 });
 State = State->set(
 Handle, HandleState::getMaybeAllocated(ResultSymbol));
+  } else if (!hasFuchsiaAttr(PVD) &&
+ PVD->getType()->isIntegerType()) {
+// Working around integer by-value escapes.
+// The by-value escape would not be captured in checkPointerEscape.
+// If the function was not analyzed (otherwise wasInlined should be
+// true) and there is no annotation on the handle, we assume the handle
+// is escaped.
+State = State->set(Handle, HandleState::getEscaped());
   }
 }
   }

diff  --git a/clang/test/Analysis/fuchsia_handle.cpp 
b/clang/test/Analysis/fuchsia_handle.cpp
index 911ab7adaaa9..99f0449a4902 100644
--- a/clang/test/Analysis/fuchsia_handle.cpp
+++ b/clang/test/Analysis/fuchsia_handle.cpp
@@ -315,6 +315,45 @@ void checkHandlePtrInStructureLeak() {
   // expected-note@-1 {{Potential leak of handle}}
 }
 
+// Assume this function's declaration that has the release annotation is in one
+// header file while its implementation is in another file. We have to annotate
+// the declaration because it might be used outside the TU.
+// We also want to make sure it is okay to call the function within the same 
TU.
+zx_status_t test_release_handle(zx_handle_t handle ZX_HANDLE_RELEASE) {
+  return zx_handle_close(handle);
+}
+
+void checkReleaseImplementedFunc() {
+  zx_handle_t a, b;
+  zx_channel_create(0, &a, &b);
+  zx_handle_close(a);
+  test_release_handle(b);
+}
+
+void use_handle(zx_handle_t handle) {
+  // Do nothing.
+}
+
+void test_call_by_value() {
+  zx_handle_t a, b;
+  zx_channel_create(0, &a, &b);
+  zx_handle_close(a);
+  use_handle(b);
+  zx_handle_close(b);
+}
+
+void test_call_by_value_leak() {
+  zx_handle_t a, b;
+  zx_channel_create(0, &a, &b); // expected-note {{Handle allocated through 
3rd parameter}}
+  zx_handle_close(a);
+  // Here we are passing handle b as integer value to a function that could be
+  // analyzed by the analyzer, thus the handle should not be considered 
escaped.
+  // After the function 'use_handle', handle b is still tracked and should be
+  // reported leaked.
+  use_handle(b);
+} // expected-warning {{Potential leak of handle}}
+// expected-note@-1 {{Potential leak of handle}}
+
 // RAII
 
 template 



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[llvm-branch-commits] [clang] 1c98f98 - Stop ExtractTypeForDeductionGuide from recursing on TypeSourceInfo

[Erich Keane via llvm-branch-commits]

Author: Erich Keane
Date: 2020-12-07T11:29:57-08:00
New Revision: 1c98f984105e552daa83ed8e92c61fba0e401410

URL: 
https://github.com/llvm/llvm-project/commit/1c98f984105e552daa83ed8e92c61fba0e401410
DIFF: 
https://github.com/llvm/llvm-project/commit/1c98f984105e552daa83ed8e92c61fba0e401410.diff

LOG: Stop ExtractTypeForDeductionGuide from recursing on TypeSourceInfo

As reported in PR48177, the type-deduction extraction ends up going into
an infinite loop when the type referred to has a recursive definition.
This stops recursing and just substitutes the type-source-info the
TypeLocBuilder identified when transforming the base.

Added: 


Modified: 
clang/lib/Sema/SemaTemplate.cpp
clang/test/AST/deduction-guides.cpp

Removed: 




diff  --git a/clang/lib/Sema/SemaTemplate.cpp b/clang/lib/Sema/SemaTemplate.cpp
index a465c6594851..03715ef600bc 100644
--- a/clang/lib/Sema/SemaTemplate.cpp
+++ b/clang/lib/Sema/SemaTemplate.cpp
@@ -2084,8 +2084,7 @@ class ExtractTypeForDeductionGuide
   TypeLocBuilder InnerTLB;
   QualType Transformed =
   TransformType(InnerTLB, OrigDecl->getTypeSourceInfo()->getTypeLoc());
-  TypeSourceInfo *TSI =
-  TransformType(InnerTLB.getTypeSourceInfo(Context, Transformed));
+  TypeSourceInfo *TSI = InnerTLB.getTypeSourceInfo(Context, Transformed);
   if (isa(OrigDecl))
 Decl = TypeAliasDecl::Create(
 Context, Context.getTranslationUnitDecl(), OrigDecl->getBeginLoc(),

diff  --git a/clang/test/AST/deduction-guides.cpp 
b/clang/test/AST/deduction-guides.cpp
index 0f5293bc063d..3a7f0bf4699e 100644
--- a/clang/test/AST/deduction-guides.cpp
+++ b/clang/test/AST/deduction-guides.cpp
@@ -37,3 +37,43 @@ 
HasDeductionGuideTypeAlias()->HasDeductionGuideTypeAlias;
 // CHECK: CXXDeductionGuideDecl {{.*}} implicit  'auto (HasDeductionGuideTypeAlias) -> 
HasDeductionGuideTypeAlias'
 // CHECK: CXXDeductionGuideDecl {{.*}}  'auto () -> HasDeductionGuideTypeAlias'
 } // namespace PR46111
+
+
+namespace PR48177 {
+  template  struct Base {
+using type_alias = A;
+  };
+  template
+  struct Derived : Base {
+using type_alias = typename Derived::type_alias;
+Derived(Derived &&, typename Derived::type_alias const&);
+Derived(T);
+  };
+
+  template
+  Derived(T, A) -> Derived;
+
+  void init() {
+Derived d {1,2};
+  }
+} // namespace PR48177
+
+// CHECK: CXXRecordDecl {{.*}} struct Derived
+// CHECK: TypeAliasDecl {{.*}} type_alias 'typename Derived::type_alias'
+// CHECK-NEXT: DependentNameType {{.*}} 'typename Derived::type_alias' dependent
+
+// CHECK: CXXRecordDecl {{.*}} struct Derived
+// CHECK: TypeAliasDecl {{.*}} type_alias 'typename Derived::type_alias':'int'
+// CHECK-NEXT: ElaboratedType {{.*}} 'typename Derived::type_alias' sugar
+// CHECK-NEXT: TypedefType {{.*}} 'PR48177::Base::type_alias' sugar
+// CHECK-NEXT: TypeAlias {{.*}} 'type_alias'
+// CHECK-NEXT: SubstTemplateTypeParmType {{.*}} 'int' sugar
+// CHECK-NEXT: TemplateTypeParmType {{.*}} 'A'
+// CHECK-NEXT: TemplateTypeParm {{.*}} 'A'
+// CHECK-NEXT: BuiltinType {{.*}} 'int'
+
+// CHECK: CXXDeductionGuideDecl {{.*}} implicit  
'auto (Derived &&, const typename Derived::type_alias &) -> 
Derived'
+// CHECK: CXXDeductionGuideDecl {{.*}} implicit  
'auto (T) -> Derived'
+// CHECK: CXXDeductionGuideDecl {{.*}} implicit  
'auto (Derived) -> Derived'
+// CHECK: CXXDeductionGuideDecl {{.*}}  'auto (T, 
A) -> Derived'
+// CHECK: CXXDeductionGuideDecl {{.*}}  'auto 
(int, int) -> Derived'



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[llvm-branch-commits] [llvm] 4db9b78 - [LV] Epilogue Vectorization with Optimal Control Flow - Default Enablement

[Bardia Mahjour via llvm-branch-commits]

Author: Bardia Mahjour
Date: 2020-12-07T14:29:36-05:00
New Revision: 4db9b78c8146bb8f13cfb21939778de4e90ea32f

URL: 
https://github.com/llvm/llvm-project/commit/4db9b78c8146bb8f13cfb21939778de4e90ea32f
DIFF: 
https://github.com/llvm/llvm-project/commit/4db9b78c8146bb8f13cfb21939778de4e90ea32f.diff

LOG: [LV] Epilogue Vectorization with Optimal Control Flow - Default Enablement

This patch enables epilogue vectorization by default per reviewer requests.

Differential Revision: https://reviews.llvm.org/D89566

Added: 


Modified: 
llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
llvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll
llvm/test/Transforms/LoopVectorize/X86/invariant-load-gather.ll
llvm/test/Transforms/LoopVectorize/X86/invariant-store-vectorization.ll
llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll

Removed: 




diff  --git a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp 
b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
index 8c02be8530be..6ba14e942ff8 100644
--- a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+++ b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
@@ -175,7 +175,7 @@ STATISTIC(LoopsAnalyzed, "Number of loops analyzed for 
vectorization");
 STATISTIC(LoopsEpilogueVectorized, "Number of epilogues vectorized");
 
 static cl::opt EnableEpilogueVectorization(
-"enable-epilogue-vectorization", cl::init(false), cl::Hidden,
+"enable-epilogue-vectorization", cl::init(true), cl::Hidden,
 cl::desc("Enable vectorization of epilogue loops."));
 
 static cl::opt EpilogueVectorizationForceVF(

diff  --git a/llvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll 
b/llvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll
index f2dd89ea7d9f..8816303ebafd 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll
@@ -22,10 +22,10 @@ target triple = "x86_64-pc_linux"
 ; Function Attrs: nounwind uwtable
 define void @foo1(float* noalias %in, float* noalias %out, i32* noalias 
%trigger, i32* noalias %index) {
 ; AVX512-LABEL: @foo1(
-; AVX512-NEXT:  entry:
+; AVX512-NEXT:  iter.check:
 ; AVX512-NEXT:br label [[VECTOR_BODY:%.*]]
 ; AVX512:   vector.body:
-; AVX512-NEXT:[[INDEX6:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ 
[[INDEX_NEXT_3:%.*]], [[VECTOR_BODY]] ]
+; AVX512-NEXT:[[INDEX6:%.*]] = phi i64 [ 0, [[ITER_CHECK:%.*]] ], [ 
[[INDEX_NEXT_3:%.*]], [[VECTOR_BODY]] ]
 ; AVX512-NEXT:[[TMP0:%.*]] = getelementptr inbounds i32, i32* 
[[TRIGGER:%.*]], i64 [[INDEX6]]
 ; AVX512-NEXT:[[TMP1:%.*]] = bitcast i32* [[TMP0]] to <16 x i32>*
 ; AVX512-NEXT:[[WIDE_LOAD:%.*]] = load <16 x i32>, <16 x i32>* [[TMP1]], 
align 4

diff  --git a/llvm/test/Transforms/LoopVectorize/X86/invariant-load-gather.ll 
b/llvm/test/Transforms/LoopVectorize/X86/invariant-load-gather.ll
index ed352559b5bf..f106f05730b4 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/invariant-load-gather.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/invariant-load-gather.ll
@@ -6,12 +6,12 @@ target triple = "x86_64-unknown-linux-gnu"
 
 define i32 @inv_load_conditional(i32* %a, i64 %n, i32* %b, i32 %k) {
 ; CHECK-LABEL: @inv_load_conditional(
-; CHECK-NEXT:  entry:
+; CHECK-NEXT:  iter.check:
 ; CHECK-NEXT:[[NTRUNC:%.*]] = trunc i64 [[N:%.*]] to i32
 ; CHECK-NEXT:[[TMP0:%.*]] = icmp sgt i64 [[N]], 1
 ; CHECK-NEXT:[[SMAX:%.*]] = select i1 [[TMP0]], i64 [[N]], i64 1
-; CHECK-NEXT:[[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[SMAX]], 16
-; CHECK-NEXT:br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label 
[[VECTOR_MEMCHECK:%.*]]
+; CHECK-NEXT:[[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[SMAX]], 8
+; CHECK-NEXT:br i1 [[MIN_ITERS_CHECK]], label 
[[VEC_EPILOG_SCALAR_PH:%.*]], label [[VECTOR_MEMCHECK:%.*]]
 ; CHECK:   vector.memcheck:
 ; CHECK-NEXT:[[A4:%.*]] = bitcast i32* [[A:%.*]] to i8*
 ; CHECK-NEXT:[[B1:%.*]] = bitcast i32* [[B:%.*]] to i8*
@@ -22,20 +22,23 @@ define i32 @inv_load_conditional(i32* %a, i64 %n, i32* %b, 
i32 %k) {
 ; CHECK-NEXT:[[BOUND0:%.*]] = icmp ugt i8* [[UGLYGEP]], [[B1]]
 ; CHECK-NEXT:[[BOUND1:%.*]] = icmp ugt i32* [[SCEVGEP]], [[A]]
 ; CHECK-NEXT:[[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]
-; CHECK-NEXT:br i1 [[FOUND_CONFLICT]], label [[SCALAR_PH]], label 
[[VECTOR_PH:%.*]]
+; CHECK-NEXT:br i1 [[FOUND_CONFLICT]], label [[VEC_EPILOG_SCALAR_PH]], 
label [[VECTOR_MAIN_LOOP_ITER_CHECK:%.*]]
+; CHECK:   vector.main.loop.iter.check:
+; CHECK-NEXT:[[MIN_ITERS_CHECK5:%.*]] = icmp ult i64 [[SMAX]], 16
+; CHECK-NEXT:br i1 [[MIN_ITERS_CHECK5]], label [[VEC_EPILOG_PH:%.*]], 
label [[VECTOR_PH:%.*]]
 ; CHECK:   vector.ph:
 ; CHECK-NEXT:[[N_VEC:%.*]] = and i64 [[SMAX]], 9223372036854775792
 ; CHECK-NEXT:[[BROADCAST_SPLATINSERT:%.*]] = insertelement <16 x i32*> 
undef, i32* [[A]], i32 0
 ; CHECK-NEXT:[[BROADCAS

[llvm-branch-commits] [mlir] 74cd9e5 - [mlir][sparse] hoist loop invariant tensor loads in sparse compiler

[Aart Bik via llvm-branch-commits]

Author: Aart Bik
Date: 2020-12-07T11:59:48-08:00
New Revision: 74cd9e587d80063381242006d0690231d756aa7a

URL: 
https://github.com/llvm/llvm-project/commit/74cd9e587d80063381242006d0690231d756aa7a
DIFF: 
https://github.com/llvm/llvm-project/commit/74cd9e587d80063381242006d0690231d756aa7a.diff

LOG: [mlir][sparse] hoist loop invariant tensor loads in sparse compiler

After bufferization, the backend has much more trouble hoisting loop invariant
loads from the loops generated by the sparse compiler. Therefore, this is done
during sparse code generation. Note that we don't bother hoisting derived
invariant expressions on SSA values, since the backend does that very well.

Still TBD: scalarize reductions to avoid load-add-store cycles

Reviewed By: penpornk

Differential Revision: https://reviews.llvm.org/D92534

Added: 


Modified: 
mlir/lib/Dialect/Linalg/Transforms/Sparsification.cpp
mlir/test/Dialect/Linalg/sparse_2d.mlir
mlir/test/Dialect/Linalg/sparse_3d.mlir

Removed: 




diff  --git a/mlir/lib/Dialect/Linalg/Transforms/Sparsification.cpp 
b/mlir/lib/Dialect/Linalg/Transforms/Sparsification.cpp
index 07a3e1569622..cfdb371e3234 100644
--- a/mlir/lib/Dialect/Linalg/Transforms/Sparsification.cpp
+++ b/mlir/lib/Dialect/Linalg/Transforms/Sparsification.cpp
@@ -59,14 +59,21 @@ enum class Kind { kTensor, kInvariant, kMulF, kMulI, kAddF, 
kAddI };
 /// children tensor expressions.
 struct TensorExp {
   TensorExp(Kind k, unsigned x, unsigned y, Value v)
-  : kind(k), e0(x), e1(y), val(v) {}
+  : kind(k), e0(x), e1(y), val(v) {
+assert((kind == Kind::kTensor && e0 != -1u && e1 == -1u && !val) ||
+   (kind == Kind::kInvariant && e0 == -1u && e1 == -1u && val) ||
+   (kind >= Kind::kMulF && e0 != -1u && e1 != -1u && !val));
+  }
   Kind kind;
+  /// Indices of children expression(s).
   unsigned e0;
   unsigned e1;
+  /// Direct link to IR for an invariant. During code generation,
+  /// field is used to cache "hoisted" loop invariant tensor loads.
   Value val;
 };
 
-/// Lattice point. Each lattice point consist of a conjunction of tensor
+/// Lattice point. Each lattice point consists of a conjunction of tensor
 /// loop indices (encoded in a bitvector) and the index of the corresponding
 /// tensor expression.
 struct LatPoint {
@@ -74,7 +81,9 @@ struct LatPoint {
 bits.set(b);
   }
   LatPoint(const llvm::BitVector &b, unsigned e) : bits(b), exp(e) {}
+  /// Conjunction of tensor loop indices as bitvector.
   llvm::BitVector bits;
+  /// Index of the tensor expresssion.
   unsigned exp;
 };
 
@@ -502,8 +511,16 @@ static void genBuffers(Merger &merger, CodeGen &codegen,
 /// Generates a load on a dense or sparse tensor.
 static Value genTensorLoad(Merger &merger, CodeGen &codegen,
PatternRewriter &rewriter, linalg::GenericOp op,
-   unsigned tensor) {
+   unsigned exp) {
+  // Test if the load was hoisted to a higher loop nest.
+  Value val = merger.exp(exp).val;
+  if (val) {
+merger.exp(exp).val = Value(); // reset
+return val;
+  }
+  // Actual load.
   SmallVector args;
+  unsigned tensor = merger.exp(exp).e0;
   auto map = op.getIndexingMap(tensor);
   bool sparse = false;
   for (unsigned i = 0, m = map.getNumResults(); i < m; ++i) {
@@ -515,7 +532,9 @@ static Value genTensorLoad(Merger &merger, CodeGen &codegen,
   args.push_back(codegen.pidxs[tensor][idx]); // position index
 }
   }
-  return rewriter.create(op.getLoc(), codegen.buffers[tensor], args);
+  Location loc = op.getLoc();
+  Value ptr = codegen.buffers[tensor];
+  return rewriter.create(loc, ptr, args);
 }
 
 /// Generates a store on a dense tensor.
@@ -528,25 +547,33 @@ static void genTensorStore(Merger &merger, CodeGen 
&codegen,
 unsigned idx = map.getDimPosition(i);
 args.push_back(codegen.loops[idx]); // universal dense index
   }
-  rewriter.create(op.getLoc(), rhs, codegen.buffers[tensor], args);
+  Location loc = op.getLoc();
+  Value ptr = codegen.buffers[tensor];
+  rewriter.create(loc, rhs, ptr, args);
 }
 
 /// Generates a pointer/index load from the sparse storage scheme.
-static Value genIntLoad(PatternRewriter &rewriter, Location loc, Value ptr,
-Value s) {
+static Value genLoad(PatternRewriter &rewriter, Location loc, Value ptr,
+ Value s) {
   Value load = rewriter.create(loc, ptr, s);
   return load.getType().isa()
  ? load
  : rewriter.create(loc, load, 
rewriter.getIndexType());
 }
 
+/// Generates an invariant value.
+static Value genInvariantValue(Merger &merger, CodeGen &codegen,
+   PatternRewriter &rewriter, unsigned exp) {
+  return merger.exp(exp).val;
+}
+
 /// Recursively generates tensor expression.
 static Value genExp(Merger &merger, CodeGen &codegen, PatternRewriter 
&rewriter,

[llvm-branch-commits] [llvm] 5fe1a49 - [SLP] fix typo in debug string; NFC

[Sanjay Patel via llvm-branch-commits]

Author: Sanjay Patel
Date: 2020-12-07T15:09:21-05:00
New Revision: 5fe1a49f961d7e6a064addf6373288d5e3697e68

URL: 
https://github.com/llvm/llvm-project/commit/5fe1a49f961d7e6a064addf6373288d5e3697e68
DIFF: 
https://github.com/llvm/llvm-project/commit/5fe1a49f961d7e6a064addf6373288d5e3697e68.diff

LOG: [SLP] fix typo in debug string; NFC

Added: 


Modified: 
llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp

Removed: 




diff  --git a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp 
b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
index f78a4d9d9c71..e3f6d8cc05f7 100644
--- a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+++ b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
@@ -1727,7 +1727,7 @@ class BoUpSLP {
 dbgs() << "NULL\n";
   dbgs() << "ReuseShuffleIndices: ";
   if (ReuseShuffleIndices.empty())
-dbgs() << "Emtpy";
+dbgs() << "Empty";
   else
 for (unsigned ReuseIdx : ReuseShuffleIndices)
   dbgs() << ReuseIdx << ", ";



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[llvm-branch-commits] [llvm] 0a39106 - [WebAssembly] Add Object and ObjectWriter support for wasm COMDAT sections

[Derek Schuff via llvm-branch-commits]

Author: Derek Schuff
Date: 2020-12-07T12:12:44-08:00
New Revision: 0a391060f16dc3e10bcb0b02036073021c414006

URL: 
https://github.com/llvm/llvm-project/commit/0a391060f16dc3e10bcb0b02036073021c414006
DIFF: 
https://github.com/llvm/llvm-project/commit/0a391060f16dc3e10bcb0b02036073021c414006.diff

LOG: [WebAssembly] Add Object and ObjectWriter support for wasm COMDAT sections

Allow sections to be placed into COMDAT groups, in addtion to functions and data
segments.

Also make section symbols unnamed, which allows sections with identical names
(section names are independent of their section symbols, but previously we
gave the symbols the same name as their sections, which results in collisions
when sections are identically-named).

Differential Revision: https://reviews.llvm.org/D92691

Added: 
llvm/test/MC/WebAssembly/comdat-sections.ll

Modified: 
llvm/include/llvm/BinaryFormat/Wasm.h
llvm/include/llvm/Object/Wasm.h
llvm/lib/MC/MCContext.cpp
llvm/lib/MC/MCObjectFileInfo.cpp
llvm/lib/MC/WasmObjectWriter.cpp
llvm/lib/Object/WasmObjectFile.cpp
llvm/lib/ObjectYAML/WasmYAML.cpp
llvm/test/DebugInfo/WebAssembly/dwarf-headers.ll
llvm/tools/obj2yaml/wasm2yaml.cpp

Removed: 




diff  --git a/llvm/include/llvm/BinaryFormat/Wasm.h 
b/llvm/include/llvm/BinaryFormat/Wasm.h
index d93587593ac3..760ddf5a2368 100644
--- a/llvm/include/llvm/BinaryFormat/Wasm.h
+++ b/llvm/include/llvm/BinaryFormat/Wasm.h
@@ -330,6 +330,8 @@ enum : unsigned {
 enum : unsigned {
   WASM_COMDAT_DATA = 0x0,
   WASM_COMDAT_FUNCTION = 0x1,
+  // GLOBAL, EVENT, and TABLE are in here but LLVM doesn't use them yet.
+  WASM_COMDAT_SECTION = 0x5,
 };
 
 // Kind codes used in the custom "linking" section in the WASM_SYMBOL_TABLE

diff  --git a/llvm/include/llvm/Object/Wasm.h b/llvm/include/llvm/Object/Wasm.h
index e5091f5a8552..089046d7d42f 100644
--- a/llvm/include/llvm/Object/Wasm.h
+++ b/llvm/include/llvm/Object/Wasm.h
@@ -108,6 +108,7 @@ struct WasmSection {
   uint32_t Type = 0; // Section type (See below)
   uint32_t Offset = 0;   // Offset with in the file
   StringRef Name;// Section name (User-defined sections only)
+  uint32_t Comdat = UINT32_MAX; // From the "comdat info" section
   ArrayRef Content; // Section content
   std::vector Relocations; // Relocations for this 
section
 };

diff  --git a/llvm/lib/MC/MCContext.cpp b/llvm/lib/MC/MCContext.cpp
index 8b2925157ba5..fe84283a9112 100644
--- a/llvm/lib/MC/MCContext.cpp
+++ b/llvm/lib/MC/MCContext.cpp
@@ -644,7 +644,7 @@ MCSectionWasm *MCContext::getWasmSection(const Twine 
&Section, SectionKind Kind,
 
   StringRef CachedName = Entry.first.SectionName;
 
-  MCSymbol *Begin = createSymbol(CachedName, false, false);
+  MCSymbol *Begin = createSymbol(CachedName, true, false);
   cast(Begin)->setType(wasm::WASM_SYMBOL_TYPE_SECTION);
 
   MCSectionWasm *Result = new (WasmAllocator.Allocate())

diff  --git a/llvm/lib/MC/MCObjectFileInfo.cpp 
b/llvm/lib/MC/MCObjectFileInfo.cpp
index a67e4b33a33b..af1d7c099668 100644
--- a/llvm/lib/MC/MCObjectFileInfo.cpp
+++ b/llvm/lib/MC/MCObjectFileInfo.cpp
@@ -974,9 +974,6 @@ MCSection *MCObjectFileInfo::getDwarfComdatSection(const 
char *Name,
 return Ctx->getELFSection(Name, ELF::SHT_PROGBITS, ELF::SHF_GROUP, 0,
   utostr(Hash));
   case Triple::Wasm:
-// FIXME: When using dwarf 5, the .debug_info section is used for type 
units
-// but that section already exists, so attempting to get it as a comdate
-// section triggers an assert.
 return Ctx->getWasmSection(Name, SectionKind::getMetadata(), utostr(Hash),
MCContext::GenericSectionID);
   case Triple::MachO:

diff  --git a/llvm/lib/MC/WasmObjectWriter.cpp 
b/llvm/lib/MC/WasmObjectWriter.cpp
index 211f0de3d242..77df4acfe11a 100644
--- a/llvm/lib/MC/WasmObjectWriter.cpp
+++ b/llvm/lib/MC/WasmObjectWriter.cpp
@@ -1421,6 +1421,16 @@ uint64_t WasmObjectWriter::writeOneObject(MCAssembler 
&Asm,
 continue;
   }
 
+  // Custom sections can also belong to COMDAT groups. In this case the
+  // decriptor's "index" field is the section index (in the final object
+  // file), but that is not known until after layout, so it must be fixed 
up
+  // later
+  if (const MCSymbolWasm *C = Section.getGroup()) {
+Comdats[C->getName()].emplace_back(
+WasmComdatEntry{wasm::WASM_COMDAT_SECTION,
+static_cast(CustomSections.size())});
+  }
+
   CustomSections.emplace_back(Name, &Section);
 }
   }
@@ -1799,9 +1809,17 @@ uint64_t WasmObjectWriter::writeOneObject(MCAssembler 
&Asm,
 DataSectionIndex = writeDataSection(Layout);
   }
 
-  for (auto &CustomSection : CustomSections) {
-writeCustomSection(CustomSection, Asm, Layout);
+  // The Sections in the COMDAT list have placeholder indices (their index 
among
+ 

[llvm-branch-commits] [clang] dc361d5 - [llvm] Add asserts in (ThreadSafe)?RefCountedBase destructors

[Nathan James via llvm-branch-commits]

Author: Nathan James
Date: 2020-12-07T20:20:08Z
New Revision: dc361d5c2a2dd34839ff4cd48844cf1bf9a87c62

URL: 
https://github.com/llvm/llvm-project/commit/dc361d5c2a2dd34839ff4cd48844cf1bf9a87c62
DIFF: 
https://github.com/llvm/llvm-project/commit/dc361d5c2a2dd34839ff4cd48844cf1bf9a87c62.diff

LOG: [llvm] Add asserts in (ThreadSafe)?RefCountedBase destructors

Added a trivial destructor in release mode and in debug mode a destructor that 
asserts RefCount is indeed zero.
This ensure people aren't manually (maybe accidentally) destroying these 
objects like in this contrived example.
```lang=c++
{
  std::unique_ptr Object;
  holdIntrusiveOwnership(Object.get());
  // Object Destructor called here will assert.
}
```

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D92480

Added: 


Modified: 
clang/lib/ASTMatchers/ASTMatchersInternal.cpp
llvm/include/llvm/ADT/IntrusiveRefCntPtr.h

Removed: 




diff  --git a/clang/lib/ASTMatchers/ASTMatchersInternal.cpp 
b/clang/lib/ASTMatchers/ASTMatchersInternal.cpp
index 257a893ccaa6..7f96f4bc03af 100644
--- a/clang/lib/ASTMatchers/ASTMatchersInternal.cpp
+++ b/clang/lib/ASTMatchers/ASTMatchersInternal.cpp
@@ -150,15 +150,9 @@ class IdDynMatcher : public DynMatcherInterface {
 };
 
 /// A matcher that always returns true.
-///
-/// We only ever need one instance of this matcher, so we create a global one
-/// and reuse it to reduce the overhead of the matcher and increase the chance
-/// of cache hits.
 class TrueMatcherImpl : public DynMatcherInterface {
 public:
-  TrueMatcherImpl() {
-Retain(); // Reference count will never become zero.
-  }
+  TrueMatcherImpl() = default;
 
   bool dynMatches(const DynTypedNode &, ASTMatchFinder *,
   BoundNodesTreeBuilder *) const override {
@@ -193,8 +187,6 @@ class DynTraversalMatcherImpl : public DynMatcherInterface {
 
 } // namespace
 
-static llvm::ManagedStatic TrueMatcherInstance;
-
 bool ASTMatchFinder::isTraversalIgnoringImplicitNodes() const {
   return getASTContext().getParentMapContext().getTraversalKind() ==
  TK_IgnoreUnlessSpelledInSource;
@@ -273,7 +265,12 @@ 
DynTypedMatcher::withTraversalKind(ast_type_traits::TraversalKind TK) {
 }
 
 DynTypedMatcher DynTypedMatcher::trueMatcher(ASTNodeKind NodeKind) {
-  return DynTypedMatcher(NodeKind, NodeKind, &*TrueMatcherInstance);
+  // We only ever need one instance of TrueMatcherImpl, so we create a static
+  // instance and reuse it to reduce the overhead of the matcher and increase
+  // the chance of cache hits.
+  static const llvm::IntrusiveRefCntPtr Instance =
+  new TrueMatcherImpl();
+  return DynTypedMatcher(NodeKind, NodeKind, Instance);
 }
 
 bool DynTypedMatcher::canMatchNodesOfKind(ASTNodeKind Kind) const {

diff  --git a/llvm/include/llvm/ADT/IntrusiveRefCntPtr.h 
b/llvm/include/llvm/ADT/IntrusiveRefCntPtr.h
index 41e5e6b9f8ed..7e6585378ec4 100644
--- a/llvm/include/llvm/ADT/IntrusiveRefCntPtr.h
+++ b/llvm/include/llvm/ADT/IntrusiveRefCntPtr.h
@@ -75,6 +75,18 @@ template  class RefCountedBase {
   RefCountedBase(const RefCountedBase &) {}
   RefCountedBase &operator=(const RefCountedBase &) = delete;
 
+#ifndef NDEBUG
+  ~RefCountedBase() {
+assert(RefCount == 0 &&
+   "Destruction occured when there are still references to this.");
+  }
+#else
+  // Default the destructor in release builds, A trivial destructor may enable
+  // better codegen.
+  ~RefCountedBase() = default;
+#endif
+
+public:
   void Retain() const { ++RefCount; }
 
   void Release() const {
@@ -94,6 +106,17 @@ template  class ThreadSafeRefCountedBase {
   ThreadSafeRefCountedBase &
   operator=(const ThreadSafeRefCountedBase &) = delete;
 
+#ifndef NDEBUG
+  ~ThreadSafeRefCountedBase() {
+assert(RefCount == 0 &&
+   "Destruction occured when there are still references to this.");
+  }
+#else
+  // Default the destructor in release builds, A trivial destructor may enable
+  // better codegen.
+  ~ThreadSafeRefCountedBase() = default;
+#endif
+
 public:
   void Retain() const { RefCount.fetch_add(1, std::memory_order_relaxed); }
 



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[llvm-branch-commits] [llvm] a61d508 - [llvm][NFC] Made RefCountBase constructors protected

[Nathan James via llvm-branch-commits]

Author: Nathan James
Date: 2020-12-07T20:23:11Z
New Revision: a61d5084735a6990d895825262d4870ede0535ef

URL: 
https://github.com/llvm/llvm-project/commit/a61d5084735a6990d895825262d4870ede0535ef
DIFF: 
https://github.com/llvm/llvm-project/commit/a61d5084735a6990d895825262d4870ede0535ef.diff

LOG: [llvm][NFC] Made RefCountBase constructors protected

Matches ThreadSafeRefCountBase and forces the class to be inherited.

Added: 


Modified: 
llvm/include/llvm/ADT/IntrusiveRefCntPtr.h

Removed: 




diff  --git a/llvm/include/llvm/ADT/IntrusiveRefCntPtr.h 
b/llvm/include/llvm/ADT/IntrusiveRefCntPtr.h
index 7e6585378ec4..173fad3aeafa 100644
--- a/llvm/include/llvm/ADT/IntrusiveRefCntPtr.h
+++ b/llvm/include/llvm/ADT/IntrusiveRefCntPtr.h
@@ -70,7 +70,7 @@ namespace llvm {
 template  class RefCountedBase {
   mutable unsigned RefCount = 0;
 
-public:
+protected:
   RefCountedBase() = default;
   RefCountedBase(const RefCountedBase &) {}
   RefCountedBase &operator=(const RefCountedBase &) = delete;



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[llvm-branch-commits] [llvm] 2ac4d0f - [AArch64] Fix some minor coding style issues in AArch64CompressJumpTables

[Amara Emerson via llvm-branch-commits]

Author: Amara Emerson
Date: 2020-12-07T12:48:09-08:00
New Revision: 2ac4d0f45a2a301163ca53f3e23e675f4f5bdbd3

URL: 
https://github.com/llvm/llvm-project/commit/2ac4d0f45a2a301163ca53f3e23e675f4f5bdbd3
DIFF: 
https://github.com/llvm/llvm-project/commit/2ac4d0f45a2a301163ca53f3e23e675f4f5bdbd3.diff

LOG: [AArch64] Fix some minor coding style issues in AArch64CompressJumpTables

Added: 


Modified: 
llvm/lib/Target/AArch64/AArch64CompressJumpTables.cpp

Removed: 




diff  --git a/llvm/lib/Target/AArch64/AArch64CompressJumpTables.cpp 
b/llvm/lib/Target/AArch64/AArch64CompressJumpTables.cpp
index 57dc8a4061f1..c265592d05a7 100644
--- a/llvm/lib/Target/AArch64/AArch64CompressJumpTables.cpp
+++ b/llvm/lib/Target/AArch64/AArch64CompressJumpTables.cpp
@@ -59,7 +59,7 @@ class AArch64CompressJumpTables : public MachineFunctionPass {
   }
 };
 char AArch64CompressJumpTables::ID = 0;
-}
+} // namespace
 
 INITIALIZE_PASS(AArch64CompressJumpTables, DEBUG_TYPE,
 "AArch64 compress jump tables pass", false, false)
@@ -104,7 +104,7 @@ bool 
AArch64CompressJumpTables::compressJumpTable(MachineInstr &MI,
   int MaxOffset = std::numeric_limits::min(),
   MinOffset = std::numeric_limits::max();
   MachineBasicBlock *MinBlock = nullptr;
-  for (auto Block : JT.MBBs) {
+  for (auto *Block : JT.MBBs) {
 int BlockOffset = BlockInfo[Block->getNumber()];
 assert(BlockOffset % 4 == 0 && "misaligned basic block");
 
@@ -124,13 +124,14 @@ bool 
AArch64CompressJumpTables::compressJumpTable(MachineInstr &MI,
   }
 
   int Span = MaxOffset - MinOffset;
-  auto AFI = MF->getInfo();
+  auto *AFI = MF->getInfo();
   if (isUInt<8>(Span / 4)) {
 AFI->setJumpTableEntryInfo(JTIdx, 1, MinBlock->getSymbol());
 MI.setDesc(TII->get(AArch64::JumpTableDest8));
 ++NumJT8;
 return true;
-  } else if (isUInt<16>(Span / 4)) {
+  }
+  if (isUInt<16>(Span / 4)) {
 AFI->setJumpTableEntryInfo(JTIdx, 2, MinBlock->getSymbol());
 MI.setDesc(TII->get(AArch64::JumpTableDest16));
 ++NumJT16;



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[llvm-branch-commits] [libcxx] 98f76ad - Add new 'preferred_name' attribute.

[Richard Smith via llvm-branch-commits]

Author: Richard Smith
Date: 2020-12-07T12:53:07-08:00
New Revision: 98f76adf4e941738c0b9fe3b9965fa63603e9c89

URL: 
https://github.com/llvm/llvm-project/commit/98f76adf4e941738c0b9fe3b9965fa63603e9c89
DIFF: 
https://github.com/llvm/llvm-project/commit/98f76adf4e941738c0b9fe3b9965fa63603e9c89.diff

LOG: Add new 'preferred_name' attribute.

This attribute permits a typedef to be associated with a class template
specialization as a preferred way of naming that class template
specialization. This permits us to specify that (for example) the
preferred way to express 'std::basic_string' is as 'std::string'.

The attribute is applied to the various class templates in libc++ that have
corresponding well-known typedef names.

Differential Revision: https://reviews.llvm.org/D91311

Added: 


Modified: 
clang/include/clang/Basic/Attr.td
clang/include/clang/Basic/AttrDocs.td
clang/include/clang/Basic/DiagnosticSemaKinds.td
clang/lib/AST/TypePrinter.cpp
clang/lib/Sema/SemaDeclAttr.cpp
clang/lib/Sema/SemaTemplate.cpp
clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
clang/test/SemaTemplate/attributes.cpp
clang/utils/TableGen/ClangAttrEmitter.cpp
libcxx/include/__config
libcxx/include/iosfwd
libcxx/include/regex
libcxx/include/string
libcxx/include/string_view

Removed: 




diff  --git a/clang/include/clang/Basic/Attr.td 
b/clang/include/clang/Basic/Attr.td
index 0212b60a2afe..123313079d28 100644
--- a/clang/include/clang/Basic/Attr.td
+++ b/clang/include/clang/Basic/Attr.td
@@ -126,6 +126,9 @@ def FunctionTmpl
  FunctionDecl::TK_FunctionTemplate}],
 "function templates">;
 
+def ClassTmpl : SubsetSubjectgetDescribedClassTemplate()}],
+  "class templates">;
+
 // FIXME: this hack is needed because DeclNodes.td defines the base Decl node
 // type to be a class, not a definition. This makes it impossible to create an
 // attribute subject which accepts a Decl. Normally, this is not a problem,
@@ -2376,6 +2379,16 @@ def Pascal : DeclOrTypeAttr {
   let Documentation = [Undocumented];
 }
 
+def PreferredName : InheritableAttr {
+  let Spellings = [Clang<"preferred_name", /*AllowInC*/0>];
+  let Subjects = SubjectList<[ClassTmpl]>;
+  let Args = [TypeArgument<"TypedefType">];
+  let Documentation = [PreferredNameDocs];
+  let InheritEvenIfAlreadyPresent = 1;
+  let MeaningfulToClassTemplateDefinition = 1;
+  let TemplateDependent = 1;
+}
+
 def PreserveMost : DeclOrTypeAttr {
   let Spellings = [Clang<"preserve_most">];
   let Documentation = [PreserveMostDocs];

diff  --git a/clang/include/clang/Basic/AttrDocs.td 
b/clang/include/clang/Basic/AttrDocs.td
index bf985986e21b..a6f31e7e7f46 100644
--- a/clang/include/clang/Basic/AttrDocs.td
+++ b/clang/include/clang/Basic/AttrDocs.td
@@ -4417,6 +4417,30 @@ the old mangled name and the new code will use the new 
mangled name with tags.
   }];
 }
 
+def PreferredNameDocs : Documentation {
+  let Category = DocCatDecl;
+  let Content = [{
+The ``preferred_name`` attribute can be applied to a class template, and
+specifies a preferred way of naming a specialization of the template. The
+preferred name will be used whenever the corresponding template specialization
+would otherwise be printed in a diagnostic or similar context.
+
+The preferred name must be a typedef or type alias declaration that refers to a
+specialization of the class template (not including any type qualifiers). In
+general this requires the template to be declared at least twice. For example:
+
+.. code-block:: c++
+
+  template struct basic_string;
+  using string = basic_string;
+  using wstring = basic_string;
+  template struct [[clang::preferred_name(string),
+clang::preferred_name(wstring)]] basic_string {
+// ...
+  };
+  }];
+}
+
 def PreserveMostDocs : Documentation {
   let Category = DocCatCallingConvs;
   let Content = [{

diff  --git a/clang/include/clang/Basic/DiagnosticSemaKinds.td 
b/clang/include/clang/Basic/DiagnosticSemaKinds.td
index 01a521fc603e..e79d021c1c94 100644
--- a/clang/include/clang/Basic/DiagnosticSemaKinds.td
+++ b/clang/include/clang/Basic/DiagnosticSemaKinds.td
@@ -3941,6 +3941,9 @@ def note_protocol_decl : Note<
   "protocol is declared here">;
 def note_protocol_decl_undefined : Note<
   "protocol %0 has no definition">;
+def err_attribute_preferred_name_arg_invalid : Error<
+  "argument %0 to 'preferred_name' attribute is not a typedef for "
+  "a specialization of %1">;
 
 // objc_designated_initializer attribute diagnostics.
 def warn_objc_designated_init_missing_super_call : Warning<

diff  --git a/clang/lib/AST/TypePrinter.cpp b/clang/lib/AST/TypePrinter.cpp
index 721031932a4a..b42ffde4a069 100644
--- a/clang/lib/AST/TypePrinter.cpp
+++ b/clang/lib/AST/TypePrinter.cpp
@@ -10,8 +10,8 @@
 //
 
//===--

[llvm-branch-commits] [llvm] b570f82 - docs: Add pointer to cmake caches for PGO

[Nico Weber via llvm-branch-commits]

Author: Nico Weber
Date: 2020-12-07T15:55:26-05:00
New Revision: b570f82f43a74fc842b9fd7f03bf0eca18fc9474

URL: 
https://github.com/llvm/llvm-project/commit/b570f82f43a74fc842b9fd7f03bf0eca18fc9474
DIFF: 
https://github.com/llvm/llvm-project/commit/b570f82f43a74fc842b9fd7f03bf0eca18fc9474.diff

LOG: docs: Add pointer to cmake caches for PGO

Also add a link to end-user PGO documentation.

Differential Revision: https://reviews.llvm.org/D92768

Added: 


Modified: 
llvm/docs/HowToBuildWithPGO.rst
llvm/utils/collect_and_build_with_pgo.py

Removed: 




diff  --git a/llvm/docs/HowToBuildWithPGO.rst b/llvm/docs/HowToBuildWithPGO.rst
index a1f387745474..617aadc5dfe3 100644
--- a/llvm/docs/HowToBuildWithPGO.rst
+++ b/llvm/docs/HowToBuildWithPGO.rst
@@ -12,6 +12,14 @@ decrease overall compile time by 20%.
 This guide walks you through how to build Clang with PGO, though it also 
applies
 to other subprojects, such as LLD.
 
+If you want to build other software with PGO, see the `end-user documentation
+for PGO 
`_.
+
+
+Using preconfigured CMake caches
+
+
+See https://llvm.org/docs/AdvancedBuilds.html#multi-stage-pgo
 
 Using the script
 
@@ -62,8 +70,8 @@ This is configurable in the script itself.
 Building Clang with PGO
 ===
 
-If you prefer to not use the script, this briefly goes over how to build
-Clang/LLVM with PGO.
+If you prefer to not use the script or the cmake cache, this briefly goes over
+how to build Clang/LLVM with PGO.
 
 First, you should have at least LLVM, Clang, and compiler-rt checked out
 locally.

diff  --git a/llvm/utils/collect_and_build_with_pgo.py 
b/llvm/utils/collect_and_build_with_pgo.py
index e9f82617f4e9..38247534cf9c 100755
--- a/llvm/utils/collect_and_build_with_pgo.py
+++ b/llvm/utils/collect_and_build_with_pgo.py
@@ -10,6 +10,9 @@
 
 This is a total of four clean builds of clang (by default). This may take a
 while. :)
+
+This scripts duplicates 
https://llvm.org/docs/AdvancedBuilds.html#multi-stage-pgo
+Eventually, it will be updated to instead call the cmake cache mentioned there.
 """
 
 import argparse



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[llvm-branch-commits] [llvm] 399bc48 - [CodeView] Fix inline sites that are missing code offsets.

[Amy Huang via llvm-branch-commits]

Author: Amy Huang
Date: 2020-12-07T13:01:53-08:00
New Revision: 399bc48eccf0d983a8a4644c12ed9cc21ff33f33

URL: 
https://github.com/llvm/llvm-project/commit/399bc48eccf0d983a8a4644c12ed9cc21ff33f33
DIFF: 
https://github.com/llvm/llvm-project/commit/399bc48eccf0d983a8a4644c12ed9cc21ff33f33.diff

LOG: [CodeView] Fix inline sites that are missing code offsets.

When an inline site has a starting code offset of 0, we sometimes
don't emit the starting offset.

Bug: https://bugs.llvm.org/show_bug.cgi?id=48377

Differential Revision: https://reviews.llvm.org/D92590

Added: 


Modified: 
llvm/lib/MC/MCCodeView.cpp
llvm/test/MC/COFF/cv-inline-linetable-infloop.s
llvm/test/MC/COFF/cv-loc-unreachable-2.s
llvm/test/MC/COFF/cv-loc-unreachable.s

Removed: 




diff  --git a/llvm/lib/MC/MCCodeView.cpp b/llvm/lib/MC/MCCodeView.cpp
index 7849196432b8..3da1a9c3e331 100644
--- a/llvm/lib/MC/MCCodeView.cpp
+++ b/llvm/lib/MC/MCCodeView.cpp
@@ -563,10 +563,7 @@ void CodeViewContext::encodeInlineLineTable(MCAsmLayout 
&Layout,
 int LineDelta = CurSourceLoc.Line - LastSourceLoc.Line;
 unsigned EncodedLineDelta = encodeSignedNumber(LineDelta);
 unsigned CodeDelta = computeLabelDiff(Layout, LastLabel, Loc.getLabel());
-if (CodeDelta == 0 && LineDelta != 0) {
-  compressAnnotation(BinaryAnnotationsOpCode::ChangeLineOffset, Buffer);
-  compressAnnotation(EncodedLineDelta, Buffer);
-} else if (EncodedLineDelta < 0x8 && CodeDelta <= 0xf) {
+if (EncodedLineDelta < 0x8 && CodeDelta <= 0xf) {
   // The ChangeCodeOffsetAndLineOffset combination opcode is used when the
   // encoded line delta uses 3 or fewer set bits and the code offset fits
   // in one nibble.

diff  --git a/llvm/test/MC/COFF/cv-inline-linetable-infloop.s 
b/llvm/test/MC/COFF/cv-inline-linetable-infloop.s
index 3802a0eeda7e..6246623cd9be 100644
--- a/llvm/test/MC/COFF/cv-inline-linetable-infloop.s
+++ b/llvm/test/MC/COFF/cv-inline-linetable-infloop.s
@@ -2,7 +2,7 @@
 
 # CHECK:InlineSiteSym {
 # CHECK:  BinaryAnnotations [
-# CHECK:ChangeLineOffset: 1
+# CHECK:ChangeCodeOffsetAndLineOffset: {CodeOffset: 0x0, LineOffset: 1}
 # CHECK:ChangeCodeLength: 0x2
 # CHECK:  ]
 # CHECK:}

diff  --git a/llvm/test/MC/COFF/cv-loc-unreachable-2.s 
b/llvm/test/MC/COFF/cv-loc-unreachable-2.s
index 2906622ddd7d..4e5b331dfd61 100644
--- a/llvm/test/MC/COFF/cv-loc-unreachable-2.s
+++ b/llvm/test/MC/COFF/cv-loc-unreachable-2.s
@@ -23,7 +23,7 @@
 
 # CODEVIEW:  S_INLINESITE [size = 26]
 # CODEVIEW-NEXT: inlinee = 0x1002 (do_exit), parent = 0, end = 0
-# CODEVIEW-NEXT:   0602  line 1 (+1)
+# CODEVIEW-NEXT:   0B20  code 0x0 (+0x0) line 1 (+1)
 # CODEVIEW-NEXT:   0409  code end 0x9 (+0x9)
 # CODEVIEW-NEXT:   0B21  code 0xA (+0x1) line 2 (+1)
 # CODEVIEW-NEXT:   0B28  code 0x12 (+0x8) line 3 (+1)

diff  --git a/llvm/test/MC/COFF/cv-loc-unreachable.s 
b/llvm/test/MC/COFF/cv-loc-unreachable.s
index 333fb4523f5b..f35ed3055307 100644
--- a/llvm/test/MC/COFF/cv-loc-unreachable.s
+++ b/llvm/test/MC/COFF/cv-loc-unreachable.s
@@ -34,7 +34,7 @@
 
 # CODEVIEW:  S_INLINESITE [size = 26]
 # CODEVIEW-NEXT: inlinee = 0x1002 (do_exit), parent = 0, end = 0
-# CODEVIEW-NEXT:   0602  line 1 (+1)
+# CODEVIEW-NEXT:   0B20  code 0x0 (+0x0) line 1 (+1)
 # CODEVIEW-NEXT:   0409  code end 0x9 (+0x9)
 # CODEVIEW-NEXT:   0B21  code 0xA (+0x1) line 2 (+1)
 # CODEVIEW-NEXT:   0B28  code 0x12 (+0x8) line 3 (+1)



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[llvm-branch-commits] [polly] 6249bfe - [Polly][CodeGen] Remove use of ScalarEvolution.

[Michael Kruse via llvm-branch-commits]

Author: Michael Kruse
Date: 2020-12-07T15:21:51-06:00
New Revision: 6249bfeefeed7ee2634355d4d7523b46fb00fda6

URL: 
https://github.com/llvm/llvm-project/commit/6249bfeefeed7ee2634355d4d7523b46fb00fda6
DIFF: 
https://github.com/llvm/llvm-project/commit/6249bfeefeed7ee2634355d4d7523b46fb00fda6.diff

LOG: [Polly][CodeGen] Remove use of ScalarEvolution.

ScalarEvolution::getSCEV cannot be used during codegen. ScalarEvolution
assumes a stable IR and control flow which is under construction during
Polly's CodeGen. In particular, it uses DominatorTree for compute the
backedge taken count. However the DominatorTree is not updated during
codegen.

In this case, SCEV was used to determine the base pointer of an array
access. Replace it by our own function. Polly generates only GEP and
BitCasts for array acceses, i.e. it is sufficient to handle these to to
find the base pointer.

Fixes llvm.org/PR48422

Added: 
polly/test/Isl/CodeGen/scev-backedgetaken.ll

Modified: 
polly/lib/CodeGen/IRBuilder.cpp

Removed: 




diff  --git a/polly/lib/CodeGen/IRBuilder.cpp b/polly/lib/CodeGen/IRBuilder.cpp
index c2bb5e4ecdb4..001a907a834f 100644
--- a/polly/lib/CodeGen/IRBuilder.cpp
+++ b/polly/lib/CodeGen/IRBuilder.cpp
@@ -188,6 +188,28 @@ void ScopAnnotator::annotateSecondLevel(llvm::Instruction 
*Inst,
   Inst->setMetadata("noalias", SecondLevelOtherAliasScopeList);
 }
 
+/// Find the base pointer of an array access.
+///
+/// This should be equivalent to ScalarEvolution::getPointerBase, which we
+/// cannot use here the IR is still under construction which ScalarEvolution
+/// assumes to not be modified.
+static Value *findBasePtr(Value *Val) {
+  while (true) {
+if (auto *Gep = dyn_cast(Val)) {
+  Val = Gep->getPointerOperand();
+  continue;
+}
+if (auto *Cast = dyn_cast(Val)) {
+  Val = Cast->getOperand(0);
+  continue;
+}
+
+break;
+  }
+
+  return Val;
+}
+
 void ScopAnnotator::annotate(Instruction *Inst) {
   if (!Inst->mayReadOrWriteMemory())
 return;
@@ -209,15 +231,7 @@ void ScopAnnotator::annotate(Instruction *Inst) {
   if (!Ptr)
 return;
 
-  auto *PtrSCEV = SE->getSCEV(Ptr);
-  auto *BaseSCEV = SE->getPointerBase(PtrSCEV);
-  auto *SU = dyn_cast(BaseSCEV);
-
-  if (!SU)
-return;
-
-  auto *BasePtr = SU->getValue();
-
+  Value *BasePtr = findBasePtr(Ptr);
   if (!BasePtr)
 return;
 

diff  --git a/polly/test/Isl/CodeGen/scev-backedgetaken.ll 
b/polly/test/Isl/CodeGen/scev-backedgetaken.ll
new file mode 100644
index ..397b5ae3b737
--- /dev/null
+++ b/polly/test/Isl/CodeGen/scev-backedgetaken.ll
@@ -0,0 +1,48 @@
+; RUN: opt %loadPolly -polly-codegen -S < %s | FileCheck %s
+;
+; llvm.org/PR48422
+; Use of ScalarEvolution in Codegen not possible because DominatorTree is not 
updated.
+;
+target datalayout = 
"e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
+
+define dso_local void @func(i1 %b, i1 %p3, [14 x i32]* %d) local_unnamed_addr {
+entry:
+  %conv = zext i1 %b to i16
+  %add = select i1 %p3, i32 21, i32 20
+  br label %for.body.us.us
+
+for.body.us.us:
+  %e.062.us.us = phi i16 [ %inc.us.us, 
%omp.inner.for.cond.simd.if.end.loopexit_crit_edge.us.us ], [ %conv, %entry ]
+  %idxprom.us.us = sext i16 %e.062.us.us to i64
+  br i1 %b, label %omp.inner.for.body.us.us.us.preheader, label 
%omp.inner.for.body.us63.us.preheader
+
+omp.inner.for.body.us63.us.preheader:
+  %arrayidx25.us.le71.us = getelementptr inbounds [14 x i32], [14 x i32]* %d, 
i64 %idxprom.us.us, i64 0
+  %0 = load i32, i32* %arrayidx25.us.le71.us, align 4
+  br label %omp.inner.for.cond.simd.if.end.loopexit_crit_edge.us.us
+
+omp.inner.for.body.us.us.us.preheader:
+  %arrayidx25.us.le.us.us = getelementptr inbounds [14 x i32], [14 x i32]* %d, 
i64 %idxprom.us.us, i64 0
+  %1 = load i32, i32* %arrayidx25.us.le.us.us, align 4
+  %conv27.us.le.us.us = select i1 undef, i16 0, i16 undef
+  br label %omp.inner.for.cond.simd.if.end.loopexit_crit_edge.us.us
+
+omp.inner.for.cond.simd.if.end.loopexit_crit_edge.us.us:
+  %conv27.lcssa.us.us = phi i16 [ undef, %omp.inner.for.body.us63.us.preheader 
], [ %conv27.us.le.us.us, %omp.inner.for.body.us.us.us.preheader ]
+  %inc.us.us = add i16 %e.062.us.us, 1
+  %conv2.us.us = sext i16 %inc.us.us to i32
+  %cmp.us.us = icmp sgt i32 %add, %conv2.us.us
+  br i1 %cmp.us.us, label %for.body.us.us, label %for.cond.cleanup.loopexit
+
+for.cond.cleanup.loopexit:
+  ret void
+}
+
+
+; CHECK-LABEL: @func(
+; CHECK: polly.stmt.omp.inner.for.body.us.us.us.preheader5:
+; CHECK: load i32, i32* %scevgep6, align 4, !alias.scope !0, !noalias 
!2
+
+; CHECK:   !0 = distinct !{!0, !1, !"polly.alias.scope.MemRef_d"}
+; CHECK:   !1 = distinct !{!1, !"polly.alias.scope.domain"}
+; CHECK:   !2 = !{}



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[llvm-branch-commits] [llvm] c102c78 - [OpenMPIRBuilder] introduce createStaticWorkshareLoop

[Alex Zinenko via llvm-branch-commits]

Author: Alex Zinenko
Date: 2020-12-07T22:30:59+01:00
New Revision: c102c783cd08cb1bf9119fe33cce34f6d1563881

URL: 
https://github.com/llvm/llvm-project/commit/c102c783cd08cb1bf9119fe33cce34f6d1563881
DIFF: 
https://github.com/llvm/llvm-project/commit/c102c783cd08cb1bf9119fe33cce34f6d1563881.diff

LOG: [OpenMPIRBuilder] introduce createStaticWorkshareLoop

Introduce a function that creates a statically-scheduled workshare loop
out of a canonical loop created earlier by the OpenMPIRBuilder. This
basically amounts to injecting runtime calls to the preheader and the
after block and updating the trip count. Static scheduling kind is
currently hardcoded and needs to be extracted from the runtime library
into common TableGen definitions.

Differential Revision: https://reviews.llvm.org/D92476

Added: 


Modified: 
llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp

Removed: 




diff  --git a/llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h 
b/llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
index a09605bb1023..2e4bb20c7998 100644
--- a/llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
+++ b/llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
@@ -260,6 +260,32 @@ class OpenMPIRBuilder {
  Value *Start, Value *Stop, Value 
*Step,
  bool IsSigned, bool InclusiveStop);
 
+  /// Modifies the canonical loop to be a statically-scheduled workshare loop.
+  ///
+  /// This takes a \p LoopInfo representing a canonical loop, such as the one
+  /// created by \p createCanonicalLoop and emits additional instructions to
+  /// turn it into a workshare loop. In particular, it calls to an OpenMP
+  /// runtime function in the preheader to obtain the loop bounds to be used in
+  /// the current thread, updates the relevant instructions in the canonical
+  /// loop and calls to an OpenMP runtime finalization function after the loop.
+  ///
+  /// \param Loc  The source location description, the insertion location
+  /// is not used.
+  /// \param CLI  A descriptor of the canonical loop to workshare.
+  /// \param AllocaIP An insertion point for Alloca instructions usable in the
+  /// preheader of the loop.
+  /// \param NeedsBarrier Indicates whether a barrier must be insterted after
+  /// the loop.
+  /// \param ChunkThe size of loop chunk considered as a unit when
+  /// scheduling. If \p nullptr, defaults to 1.
+  ///
+  /// \returns Updated CanonicalLoopInfo.
+  CanonicalLoopInfo *createStaticWorkshareLoop(const LocationDescription &Loc,
+   CanonicalLoopInfo *CLI,
+   InsertPointTy AllocaIP,
+   bool NeedsBarrier,
+   Value *Chunk = nullptr);
+
   /// Generator for '#omp flush'
   ///
   /// \param Loc The location where the flush directive was encountered
@@ -636,7 +662,9 @@ class OpenMPIRBuilder {
 ///  |Cond---\
 ///  | | |
 ///  |Body   |
-///  | | |
+///  || ||
+///  |   <...>   |
+///  || ||
 ///   \--Latch   |
 ///  |
 /// Exit
@@ -644,7 +672,9 @@ class OpenMPIRBuilder {
 ///After
 ///
 /// Code in the header, condition block, latch and exit block must not have any
-/// side-effect.
+/// side-effect. The body block is the single entry point into the loop body,
+/// which may contain arbitrary control flow as long as all control paths
+/// eventually branch to the latch block.
 ///
 /// Defined outside OpenMPIRBuilder because one cannot forward-declare nested
 /// classes.
@@ -701,7 +731,7 @@ class CanonicalLoopInfo {
   /// statements/cancellations).
   BasicBlock *getAfter() const { return After; }
 
-  /// Returns the llvm::Value containing the number of loop iterations. I must
+  /// Returns the llvm::Value containing the number of loop iterations. It must
   /// be valid in the preheader and always interpreted as an unsigned integer 
of
   /// any bit-width.
   Value *getTripCount() const {

diff  --git a/llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp 
b/llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
index 044e69da8665..6587a3637c90 100644
--- a/llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
+++ b/llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
@@ -999,6 +999,118 @@ CanonicalLoopInfo *OpenMPIRBuilder::createCanonicalLoop(
   return createCanonicalLoop(Builder.saveIP(), BodyGen, TripCount);
 }
 
+// Returns an LLVM function to call for initializing loop bounds using OpenMP
+// static scheduling depending on `type`. Only i32 and i64 are supported by the
+// runtime. Always interpret integers as unsigned similarly to
+// CanonicalLoopInfo.
+static Fu

[llvm-branch-commits] [llvm] 1f05b1a - [CSSPGO][llvm-profgen] Context-sensitive profile data generation

[via llvm-branch-commits]

Author: wlei
Date: 2020-12-07T13:48:58-08:00
New Revision: 1f05b1a9f527e19fb1d7cf17689c41b7951af056

URL: 
https://github.com/llvm/llvm-project/commit/1f05b1a9f527e19fb1d7cf17689c41b7951af056
DIFF: 
https://github.com/llvm/llvm-project/commit/1f05b1a9f527e19fb1d7cf17689c41b7951af056.diff

LOG: [CSSPGO][llvm-profgen] Context-sensitive profile data generation

This stack of changes introduces `llvm-profgen` utility which generates a 
profile data file from given perf script data files for sample-based PGO. It’s 
part of(not only) the CSSPGO work. Specifically to support context-sensitive 
with/without pseudo probe profile, it implements a series of functionalities 
including perf trace parsing, instruction symbolization, LBR stack/call frame 
stack unwinding, pseudo probe decoding, etc. Also high throughput is achieved 
by multiple levels of sample aggregation and compatible format with one stop is 
generated at the end. Please refer to: 
https://groups.google.com/g/llvm-dev/c/1p1rdYbL93s for the CSSPGO RFC.

This change supports context-sensitive profile data generation into 
llvm-profgen. With simultaneous sampling for LBR and call stack, we can 
identify leaf of LBR sample with calling context from stack sample . During the 
process of deriving fall through path from LBR entries, we unwind LBR by 
replaying all the calls and returns (including implicit calls/returns due to 
inlining) backwards on top of the sampled call stack. Then the state of call 
stack as we unwind through LBR always represents the calling context of current 
fall through path.

we have two types of virtual unwinding 1) LBR unwinding and 2) linear range 
unwinding.
Specifically, for each LBR entry which can be classified into call, return, 
regular branch, LBR unwinding will replay the operation by pushing, popping or 
switching leaf frame towards the call stack and since the initial call stack is 
most recently sampled, the replay should be in anti-execution order, i.e. for 
the regular case, pop the call stack when LBR is call, push frame on call stack 
when LBR is return. After each LBR processed, it also needs to align with the 
next LBR by going through instructions from previous LBR's target to current 
LBR's source, which we named linear unwinding. As instruction from linear range 
can come from different function by inlining, linear unwinding will do the 
range splitting and record counters through the range with same inline context.

With each fall through path from LBR unwinding, we aggregate each sample into 
counters by the calling context and eventually generate full context sensitive 
profile (without relying on inlining) to driver compiler's PGO/FDO.

A breakdown of noteworthy changes:
- Added `HybridSample` class as the abstraction perf sample including LBR stack 
and call stack
* Extended `PerfReader` to implement auto-detect whether input perf script 
output contains CS profile, then do the parsing. Multiple `HybridSample` are 
extracted
* Speed up by aggregating  `HybridSample` into `AggregatedSamples`
* Added VirtualUnwinder that consumes aggregated  `HybridSample` and implements 
unwinding of calls, returns, and linear path that contains implicit call/return 
from inlining. Ranges and branches counters are aggregated by the calling 
context.
 Here calling context is string type, each context is a pair of 
function name and callsite location info, the whole context is like `main:1 @ 
foo:2 @ bar`.
* Added PorfileGenerater that accumulates counters by ranges unfolding or 
branch target mapping, then generates context-sensitive function profile 
including function body, inferring callee's head sample, callsite target 
samples, eventually records into ProfileMap.

* Leveraged LLVM build-in(`SampleProfWriter`) writer to support different 
serialization format with no stop
- `getCanonicalFnName` for callee name and name from ELF section
- Added regression test for both unwinding and profile generation

Test Plan:
ninja & ninja check-llvm

Reviewed By: hoy, wenlei, wmi

Differential Revision: https://reviews.llvm.org/D89723

Added: 
llvm/test/tools/llvm-profgen/Inputs/inline-cs-noprobe.perfbin
llvm/test/tools/llvm-profgen/Inputs/inline-cs-noprobe.perfscript
llvm/test/tools/llvm-profgen/Inputs/noinline-cs-noprobe.perfbin
llvm/test/tools/llvm-profgen/Inputs/noinline-cs-noprobe.perfscript
llvm/test/tools/llvm-profgen/inline-cs-noprobe.test
llvm/test/tools/llvm-profgen/noinline-cs-noprobe.test
llvm/tools/llvm-profgen/ProfileGenerator.cpp
llvm/tools/llvm-profgen/ProfileGenerator.h

Modified: 
llvm/docs/CommandGuide/llvm-profgen.rst
llvm/include/llvm/ProfileData/SampleProf.h
llvm/lib/ProfileData/SampleProfWriter.cpp
llvm/tools/llvm-profgen/CMakeLists.txt
llvm/tools/llvm-profgen/PerfReader.cpp
llvm/tools/llvm-profgen/PerfReader.h
llvm/tools/llvm-profgen/ProfiledBinary.cpp
llvm/tools/llvm-profgen/ProfiledBinary.h
llvm/tools/llvm-profgen/llvm-profgen.cpp

Remove

[llvm-branch-commits] [clang] 9cd2413 - [clang] Add a new nullability annotation for swift async: _Nullable_result

[Erik Pilkington via llvm-branch-commits]

Author: Erik Pilkington
Date: 2020-12-07T17:19:20-05:00
New Revision: 9cd2413f1ca7a7f40132ea3c44f251851aa325c2

URL: 
https://github.com/llvm/llvm-project/commit/9cd2413f1ca7a7f40132ea3c44f251851aa325c2
DIFF: 
https://github.com/llvm/llvm-project/commit/9cd2413f1ca7a7f40132ea3c44f251851aa325c2.diff

LOG: [clang] Add a new nullability annotation for swift async: _Nullable_result

_Nullable_result generally like _Nullable, except when being imported into a
swift async method. rdar://70106409

Differential revision: https://reviews.llvm.org/D92495

Added: 
clang/test/SemaObjC/nullable-result.m

Modified: 
clang/include/clang-c/Index.h
clang/include/clang/AST/Type.h
clang/include/clang/Basic/Attr.td
clang/include/clang/Basic/AttrDocs.td
clang/include/clang/Basic/Features.def
clang/include/clang/Basic/Specifiers.h
clang/include/clang/Basic/TokenKinds.def
clang/include/clang/Sema/Sema.h
clang/lib/APINotes/APINotesYAMLCompiler.cpp
clang/lib/AST/Type.cpp
clang/lib/AST/TypePrinter.cpp
clang/lib/Basic/Diagnostic.cpp
clang/lib/Basic/IdentifierTable.cpp
clang/lib/Parse/ParseDecl.cpp
clang/lib/Parse/ParseTentative.cpp
clang/lib/Sema/Sema.cpp
clang/lib/Sema/SemaCodeComplete.cpp
clang/lib/Sema/SemaExpr.cpp
clang/lib/Sema/SemaExprObjC.cpp
clang/lib/Sema/SemaType.cpp
clang/test/Index/nullability.c
clang/test/SemaObjC/nullability.m
clang/tools/c-index-test/c-index-test.c
clang/tools/libclang/CXType.cpp

Removed: 




diff  --git a/clang/include/clang-c/Index.h b/clang/include/clang-c/Index.h
index 1c91e059c3222..e305283bbaf19 100644
--- a/clang/include/clang-c/Index.h
+++ b/clang/include/clang-c/Index.h
@@ -3861,7 +3861,15 @@ enum CXTypeNullabilityKind {
   /**
* Nullability is not applicable to this type.
*/
-  CXTypeNullability_Invalid = 3
+  CXTypeNullability_Invalid = 3,
+
+  /**
+   * Generally behaves like Nullable, except when used in a block parameter 
that
+   * was imported into a swift async method. There, swift will assume that the
+   * parameter can get null even if no error occured. _Nullable parameters are
+   * assumed to only get null on error.
+   */
+  CXTypeNullability_NullableResult = 4
 };
 
 /**

diff  --git a/clang/include/clang/AST/Type.h b/clang/include/clang/AST/Type.h
index 6dedd097ff891..60b8ee0f16149 100644
--- a/clang/include/clang/AST/Type.h
+++ b/clang/include/clang/AST/Type.h
@@ -4716,6 +4716,9 @@ class AttributedType : public Type, public 
llvm::FoldingSetNode {
 case NullabilityKind::Nullable:
   return attr::TypeNullable;
 
+case NullabilityKind::NullableResult:
+  return attr::TypeNullableResult;
+
 case NullabilityKind::Unspecified:
   return attr::TypeNullUnspecified;
 }

diff  --git a/clang/include/clang/Basic/Attr.td 
b/clang/include/clang/Basic/Attr.td
index 123313079d286..8e12aba5dad36 100644
--- a/clang/include/clang/Basic/Attr.td
+++ b/clang/include/clang/Basic/Attr.td
@@ -1805,6 +1805,11 @@ def TypeNullable : TypeAttr {
   let Documentation = [TypeNullableDocs];
 }
 
+def TypeNullableResult : TypeAttr {
+  let Spellings = [Keyword<"_Nullable_result">];
+  let Documentation = [TypeNullableResultDocs];
+}
+
 def TypeNullUnspecified : TypeAttr {
   let Spellings = [Keyword<"_Null_unspecified">];
   let Documentation = [TypeNullUnspecifiedDocs];

diff  --git a/clang/include/clang/Basic/AttrDocs.td 
b/clang/include/clang/Basic/AttrDocs.td
index a6f31e7e7f463..1cc8d9995b857 100644
--- a/clang/include/clang/Basic/AttrDocs.td
+++ b/clang/include/clang/Basic/AttrDocs.td
@@ -3508,6 +3508,29 @@ a caller of ``fetch_or_zero`` can provide null.
   }];
 }
 
+def TypeNullableResultDocs : Documentation {
+  let Category = NullabilityDocs;
+  let Content = [{
+The ``_Nullable_result`` nullability qualifier means that a value of the
+``_Nullable_result`` pointer can be ``nil``, just like ``_Nullable``. Where 
this
+attribute 
diff ers from ``_Nullable`` is when it's used on a parameter to a
+completion handler in a Swift async method. For instance, here:
+
+  .. code-block:: objc
+
+-(void)fetchSomeDataWithID:(int)identifier
+ completionHandler:(void (^)(Data *_Nullable_result result, 
NSError *error))completionHandler;
+
+This method asynchronously calls ``completionHandler`` when the data is
+available, or calls it with an error. ``_Nullable_result`` indicates to the
+Swift importer that this is the uncommon case where ``result`` can get ``nil``
+even if no error has occured, and will therefore import it as a Swift optional
+type. Otherwise, if ``result`` was annotated with ``_Nullable``, the Swift
+importer will assume that ``result`` will always be non-nil unless an error
+occured.
+}];
+}
+
 def TypeNullUnspecifiedDocs : Documentation {
   let Category = NullabilityDocs;
   let Content = [{

diff  --git a/clang/include/clang/Basic/Features.def 
b/clang/inclu

[llvm-branch-commits] [clang] 5a28e1d - [clang] Add support for attribute 'swift_async'

[Erik Pilkington via llvm-branch-commits]

Author: Erik Pilkington
Date: 2020-12-07T17:19:26-05:00
New Revision: 5a28e1d9e50eb0b866351b5ab3213678fd28374b

URL: 
https://github.com/llvm/llvm-project/commit/5a28e1d9e50eb0b866351b5ab3213678fd28374b
DIFF: 
https://github.com/llvm/llvm-project/commit/5a28e1d9e50eb0b866351b5ab3213678fd28374b.diff

LOG: [clang] Add support for attribute 'swift_async'

This attributes specifies how (or if) a given function or method will be
imported into a swift async method. rdar://70111252

Differential revision: https://reviews.llvm.org/D92742

Added: 
clang/test/SemaObjC/attr-swift-async.m

Modified: 
clang/include/clang/Basic/Attr.td
clang/include/clang/Basic/AttrDocs.td
clang/include/clang/Basic/DiagnosticSemaKinds.td
clang/lib/Sema/SemaDeclAttr.cpp
clang/test/Misc/pragma-attribute-supported-attributes-list.test

Removed: 




diff  --git a/clang/include/clang/Basic/Attr.td 
b/clang/include/clang/Basic/Attr.td
index 8e12aba5dad36..51f654fc7613a 100644
--- a/clang/include/clang/Basic/Attr.td
+++ b/clang/include/clang/Basic/Attr.td
@@ -2352,6 +2352,16 @@ def SwiftIndirectResult : ParameterABIAttr {
   let Documentation = [SwiftIndirectResultDocs];
 }
 
+def SwiftAsync : InheritableAttr {
+  let Spellings = [Clang<"swift_async">];
+  let Subjects = SubjectList<[Function, ObjCMethod]>;
+  let Args = [EnumArgument<"Kind", "Kind",
+["none", "swift_private", "not_swift_private"],
+["None", "SwiftPrivate", "NotSwiftPrivate"]>,
+  ParamIdxArgument<"CompletionHandlerIndex", /*opt=*/1>];
+  let Documentation = [SwiftAsyncDocs];
+}
+
 def Suppress : StmtAttr {
   let Spellings = [CXX11<"gsl", "suppress">];
   let Args = [VariadicStringArgument<"DiagnosticIdentifiers">];

diff  --git a/clang/include/clang/Basic/AttrDocs.td 
b/clang/include/clang/Basic/AttrDocs.td
index 1cc8d9995b857..28f35cf2c0c74 100644
--- a/clang/include/clang/Basic/AttrDocs.td
+++ b/clang/include/clang/Basic/AttrDocs.td
@@ -4400,6 +4400,37 @@ optimizations like C++'s named return value optimization 
(NRVO).
   }];
 }
 
+def SwiftAsyncDocs : Documentation {
+  let Category = SwiftDocs;
+  let Heading = "swift_async";
+  let Content = [{
+The ``swift_async`` attribute specifies if and how a particular function or
+Objective-C method is imported into a swift async method. For instance:
+
+.. code-block:: objc
+
+  @interface MyClass : NSObject
+  -(void)notActuallyAsync:(int)p1 withCompletionHandler:(void (^)())handler
+  __attribute__((swift_async(none)));
+
+  -(void)actuallyAsync:(int)p1 callThisAsync:(void (^)())fun
+  __attribute__((swift_async(swift_private, 1)));
+  @end
+
+Here, ``notActuallyAsync:withCompletionHandler`` would have been imported as
+``async`` (because it's last parameter's selector piece is
+``withCompletionHandler``) if not for the ``swift_async(none)`` attribute.
+Conversely, ``actuallyAsync:callThisAsync`` wouldn't have been imported as
+``async`` if not for the ``swift_async`` attribute because it doesn't match the
+naming convention.
+
+When using ``swift_async`` to enable importing, the first argument to the
+attribute is either ``swift_private`` or ``not_swift_private`` to indicate
+whether the function/method is private to the current framework, and the second
+argument is the index of the completion handler parameter.
+  }];
+}
+
 def SuppressDocs : Documentation {
   let Category = DocCatStmt;
   let Content = [{

diff  --git a/clang/include/clang/Basic/DiagnosticSemaKinds.td 
b/clang/include/clang/Basic/DiagnosticSemaKinds.td
index e79d021c1c945..97773d35a6947 100644
--- a/clang/include/clang/Basic/DiagnosticSemaKinds.td
+++ b/clang/include/clang/Basic/DiagnosticSemaKinds.td
@@ -4050,6 +4050,13 @@ def err_attr_swift_error_return_type : Error<
   "%0 attribute with '%1' convention can only be applied to a "
   "%select{function|method}2 returning %select{an integral type|a pointer}3">;
 
+def err_swift_async_no_access : Error<
+  "first argument to 'swift_async' must be either 'none', 'swift_private', or "
+  "'not_swift_private'">;
+def err_swift_async_bad_block_type : Error<
+  "'swift_async' completion handler parameter must have block type returning"
+  " 'void', type here is %0">;
+
 def warn_ignored_objc_externally_retained : Warning<
   "'objc_externally_retained' can only be applied to local variables "
   "%select{of retainable type|with strong ownership}0">,

diff  --git a/clang/lib/Sema/SemaDeclAttr.cpp b/clang/lib/Sema/SemaDeclAttr.cpp
index 11286dc3d33f8..15094854300d0 100644
--- a/clang/lib/Sema/SemaDeclAttr.cpp
+++ b/clang/lib/Sema/SemaDeclAttr.cpp
@@ -6103,6 +6103,56 @@ static void handleSwiftNewType(Sema &S, Decl *D, const 
ParsedAttr &AL) {
   D->addAttr(::new (S.Context) SwiftNewTypeAttr(S.Context, AL, Kind));
 }
 
+static void handleSwiftAsyncAttr(Sema &S, Decl *D, const ParsedAttr &AL) {
+  if (!AL.isArgIdent(0)) {
+S.Diag(AL.getLoc(), diag::err

[llvm-branch-commits] [compiler-rt] 1d03a54 - Revert "[test] Fix asan/TestCases/Linux/globals-gc-sections-lld.cpp with -fsanitize-address-globals-dead-stripping"

[Mitch Phillips via llvm-branch-commits]

Author: Mitch Phillips
Date: 2020-12-07T14:30:53-08:00
New Revision: 1d03a54d9460fa122f0be9bf9018b9a4358745a9

URL: 
https://github.com/llvm/llvm-project/commit/1d03a54d9460fa122f0be9bf9018b9a4358745a9
DIFF: 
https://github.com/llvm/llvm-project/commit/1d03a54d9460fa122f0be9bf9018b9a4358745a9.diff

LOG: Revert "[test] Fix asan/TestCases/Linux/globals-gc-sections-lld.cpp with 
-fsanitize-address-globals-dead-stripping"

This reverts commit 140808768d3e5c0f4e52dd42094650f5d282e34a.

Reason: Broke the upstream bots - discussed offline.

Added: 


Modified: 
compiler-rt/test/asan/TestCases/Linux/globals-gc-sections-lld.cpp

Removed: 




diff  --git a/compiler-rt/test/asan/TestCases/Linux/globals-gc-sections-lld.cpp 
b/compiler-rt/test/asan/TestCases/Linux/globals-gc-sections-lld.cpp
index 24dd1ae5b208..f6edc7032018 100644
--- a/compiler-rt/test/asan/TestCases/Linux/globals-gc-sections-lld.cpp
+++ b/compiler-rt/test/asan/TestCases/Linux/globals-gc-sections-lld.cpp
@@ -1,11 +1,10 @@
-/// Without instrumenting globals, --gc-sections drops the undefined symbol.
-// RUN: %clangxx_asan %s -o /dev/null -Wl,--gc-sections -fuse-ld=lld 
-ffunction-sections -fdata-sections -mllvm -asan-globals=0
-/// With -fsanitize-address-globals-dead-stripping and -fdata-sections, a 
garbage
-/// collectable custom metadata section is used for instrumented globals.
-// RUN: %clangxx_asan %s -o /dev/null -Wl,--gc-sections -fuse-ld=lld 
-ffunction-sections -fdata-sections -fsanitize-address-globals-dead-stripping
+// RUN: %clangxx_asan %s -o %t -Wl,--gc-sections -fuse-ld=lld 
-ffunction-sections -fdata-sections -mllvm -asan-globals=0
+// RUN: %clangxx_asan %s -o %t -Wl,--gc-sections -fuse-ld=lld 
-ffunction-sections -fdata-sections -mllvm -asan-globals=1
 
-// https://github.com/google/sanitizers/issues/260
-// REQUIRES: lld-available
+// https://code.google.com/p/address-sanitizer/issues/detail?id=260
+// REQUIRES: lld
+// FIXME: This may pass on Android, with non-emulated-tls.
+// XFAIL: android
 int undefined();
 
 // On i386 clang adds --export-dynamic when linking with ASan, which adds all



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[llvm-branch-commits] [clang] 155fca3 - [clang] Fix noderef for array member of deref expr

[Leonard Chan via llvm-branch-commits]

Author: Leonard Chan
Date: 2020-12-07T14:39:42-08:00
New Revision: 155fca3cae275562e626d3e4fbfac70b4b75d2e7

URL: 
https://github.com/llvm/llvm-project/commit/155fca3cae275562e626d3e4fbfac70b4b75d2e7
DIFF: 
https://github.com/llvm/llvm-project/commit/155fca3cae275562e626d3e4fbfac70b4b75d2e7.diff

LOG: [clang] Fix noderef for array member of deref expr

Committing on behalf of thejh (Jann Horn).

Given an attribute((noderef)) pointer "p" to the struct

struct s { int a[2]; };
ensure that the following expressions are treated the same way by the
noderef logic:

p->a
(*p).a
Until now, the first expression would be treated correctly (nothing is
added to PossibleDerefs because CheckMemberAccessOfNoDeref() bails out
on array members), but the second expression would incorrectly warn
because "*p" creates a PossibleDerefs entry.

Handle this case the same way as for the AddrOf operator.

Differential Revision: https://reviews.llvm.org/D92140

Added: 


Modified: 
clang/lib/Sema/SemaExprMember.cpp
clang/test/Frontend/noderef.c

Removed: 




diff  --git a/clang/lib/Sema/SemaExprMember.cpp 
b/clang/lib/Sema/SemaExprMember.cpp
index 23cfae81df46..3e9d2a056c5c 100644
--- a/clang/lib/Sema/SemaExprMember.cpp
+++ b/clang/lib/Sema/SemaExprMember.cpp
@@ -1739,12 +1739,23 @@ void Sema::CheckMemberAccessOfNoDeref(const MemberExpr 
*E) {
 
   QualType ResultTy = E->getType();
 
-  // Do not warn on member accesses to arrays since this returns an array
-  // lvalue and does not actually dereference memory.
-  if (isa(ResultTy))
-return;
-
-  if (E->isArrow()) {
+  // Member accesses have four cases:
+  // 1: non-array member via "->": dereferences
+  // 2: non-array member via ".": nothing interesting happens
+  // 3: array member access via "->": nothing interesting happens
+  //(this returns an array lvalue and does not actually dereference memory)
+  // 4: array member access via ".": *adds* a layer of indirection
+  if (ResultTy->isArrayType()) {
+if (!E->isArrow()) {
+  // This might be something like:
+  // (*structPtr).arrayMember
+  // which behaves roughly like:
+  // &(*structPtr).pointerMember
+  // in that the apparent dereference in the base expression does not
+  // actually happen.
+  CheckAddressOfNoDeref(E->getBase());
+}
+  } else if (E->isArrow()) {
 if (const auto *Ptr = dyn_cast(
 E->getBase()->getType().getDesugaredType(Context))) {
   if (Ptr->getPointeeType()->hasAttr(attr::NoDeref))

diff  --git a/clang/test/Frontend/noderef.c b/clang/test/Frontend/noderef.c
index 3388f2a39992..b548ffa13273 100644
--- a/clang/test/Frontend/noderef.c
+++ b/clang/test/Frontend/noderef.c
@@ -73,6 +73,7 @@ int test() {
   // Nested struct access
   struct S2 NODEREF *s2_noderef;// expected-note 5 {{s2_noderef declared 
here}}
   p = s2_noderef->a;  // ok since result is an array in a struct
+  p = (*s2_noderef).a; // ok since result is an array in a struct
   p = s2_noderef->a2; // ok
   p = s2_noderef->b;  // expected-warning{{dereferencing s2_noderef; was 
declared with a 'noderef' type}}
   p = s2_noderef->b2; // expected-warning{{dereferencing s2_noderef; was 
declared with a 'noderef' type}}



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[llvm-branch-commits] [clang] 6dad7ec - [clang] Fix noderef for AddrOf on MemberExpr

[Leonard Chan via llvm-branch-commits]

Author: Jann Horn
Date: 2020-12-07T14:48:41-08:00
New Revision: 6dad7ec539cbcf6f59b63753a86b8015bd6ea66f

URL: 
https://github.com/llvm/llvm-project/commit/6dad7ec539cbcf6f59b63753a86b8015bd6ea66f
DIFF: 
https://github.com/llvm/llvm-project/commit/6dad7ec539cbcf6f59b63753a86b8015bd6ea66f.diff

LOG: [clang] Fix noderef for AddrOf on MemberExpr

Committing on behalf of thejh (Jann Horn).

As part of this change, one existing test case has to be adjusted
because it accidentally stripped the NoDeref attribute without
getting caught.

Depends on D92140

Differential Review: https://reviews.llvm.org/D92141

Added: 


Modified: 
clang/lib/Sema/SemaExprMember.cpp
clang/test/Frontend/noderef.c

Removed: 




diff  --git a/clang/lib/Sema/SemaExprMember.cpp 
b/clang/lib/Sema/SemaExprMember.cpp
index 3e9d2a056c5c..f5afcb76fc96 100644
--- a/clang/lib/Sema/SemaExprMember.cpp
+++ b/clang/lib/Sema/SemaExprMember.cpp
@@ -1810,6 +1810,14 @@ Sema::BuildFieldReferenceExpr(Expr *BaseExpr, bool 
IsArrow,
 Qualifiers Combined = BaseQuals + MemberQuals;
 if (Combined != MemberQuals)
   MemberType = Context.getQualifiedType(MemberType, Combined);
+
+// Pick up NoDeref from the base in case we end up using AddrOf on the
+// result. E.g. the expression
+// &someNoDerefPtr->pointerMember
+// should be a noderef pointer again.
+if (BaseType->hasAttr(attr::NoDeref))
+  MemberType =
+  Context.getAttributedType(attr::NoDeref, MemberType, MemberType);
   }
 
   auto *CurMethod = dyn_cast(CurContext);

diff  --git a/clang/test/Frontend/noderef.c b/clang/test/Frontend/noderef.c
index b548ffa13273..d136ff0c7192 100644
--- a/clang/test/Frontend/noderef.c
+++ b/clang/test/Frontend/noderef.c
@@ -70,6 +70,12 @@ int test() {
   x = sizeof(s->a + (s->b)); // ok
   x = sizeof(int[++s->a]);   // expected-warning{{dereferencing s; was 
declared with a 'noderef' type}}
 
+  // Struct member access should carry NoDeref type information through to an
+  // enclosing AddrOf.
+  p2 = &s->a;   // expected-warning{{casting to dereferenceable pointer 
removes 'noderef' attribute}}
+  p2 = &(*s).a; // expected-warning{{casting to dereferenceable pointer 
removes 'noderef' attribute}}
+  x = *&s->a;   // expected-warning{{dereferencing expression marked as 
'noderef'}}
+
   // Nested struct access
   struct S2 NODEREF *s2_noderef;// expected-note 5 {{s2_noderef declared 
here}}
   p = s2_noderef->a;  // ok since result is an array in a struct
@@ -113,7 +119,7 @@ int test() {
 
   p = s2_arr[1]->a;
   p = s2_arr[1]->b; // expected-warning{{dereferencing expression marked as 
'noderef'}}
-  int **bptr = &s2_arr[1]->b;
+  int *NODEREF *bptr = &s2_arr[1]->b;
 
   x = s2->s2->a;// expected-warning{{dereferencing expression marked 
as 'noderef'}}
   x = s2_noderef->a[1]; // expected-warning{{dereferencing s2_noderef; was 
declared with a 'noderef' type}}



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[llvm-branch-commits] [llvm] 2656885 - Teach isKnownNonEqual how to recurse through invertible multiplies

[Philip Reames via llvm-branch-commits]

Author: Philip Reames
Date: 2020-12-07T14:52:08-08:00
New Revision: 2656885390f17cceae142b4265c337fcee2410c0

URL: 
https://github.com/llvm/llvm-project/commit/2656885390f17cceae142b4265c337fcee2410c0
DIFF: 
https://github.com/llvm/llvm-project/commit/2656885390f17cceae142b4265c337fcee2410c0.diff

LOG: Teach isKnownNonEqual how to recurse through invertible multiplies

Build on the work started in 8f07629, and add the multiply case. In the 
process, more clearly describe the requirement for the operation we're looking 
through.

Differential Revision: https://reviews.llvm.org/D92726

Added: 


Modified: 
llvm/lib/Analysis/ValueTracking.cpp
llvm/test/Analysis/ValueTracking/known-non-equal.ll

Removed: 




diff  --git a/llvm/lib/Analysis/ValueTracking.cpp 
b/llvm/lib/Analysis/ValueTracking.cpp
index a1bb6e2eea78..eeb505868703 100644
--- a/llvm/lib/Analysis/ValueTracking.cpp
+++ b/llvm/lib/Analysis/ValueTracking.cpp
@@ -2502,6 +2502,7 @@ static bool isAddOfNonZero(const Value *V1, const Value 
*V2, unsigned Depth,
   return isKnownNonZero(Op, Depth + 1, Q);
 }
 
+
 /// Return true if it is known that V1 != V2.
 static bool isKnownNonEqual(const Value *V1, const Value *V2, unsigned Depth,
 const Query &Q) {
@@ -2514,7 +2515,9 @@ static bool isKnownNonEqual(const Value *V1, const Value 
*V2, unsigned Depth,
   if (Depth >= MaxAnalysisRecursionDepth)
 return false;
 
-  // See if we can recurse through (exactly one of) our operands.
+  // See if we can recurse through (exactly one of) our operands.  This
+  // requires our operation be 1-to-1 and map every input value to exactly
+  // one output value.  Such an operation is invertible.
   auto *O1 = dyn_cast(V1);
   auto *O2 = dyn_cast(V2);
   if (O1 && O2 && O1->getOpcode() == O2->getOpcode()) {
@@ -2530,6 +2533,23 @@ static bool isKnownNonEqual(const Value *V1, const Value 
*V2, unsigned Depth,
 return isKnownNonEqual(O1->getOperand(0), O2->getOperand(0),
Depth + 1, Q);
   break;
+case Instruction::Mul:
+  // invertible if A * B == (A * B) mod 2^N where A, and B are integers
+  // and N is the bitwdith.  The nsw case is non-obvious, but proven by
+  // alive2: https://alive2.llvm.org/ce/z/Z6D5qK
+  if ((!cast(O1)->hasNoUnsignedWrap() ||
+   !cast(O2)->hasNoUnsignedWrap()) &&
+  (!cast(O1)->hasNoSignedWrap() ||
+   !cast(O2)->hasNoSignedWrap()))
+break;
+
+  // Assume operand order has been canonicalized
+  if (O1->getOperand(1) == O2->getOperand(1) &&
+  isa(O1->getOperand(1)) &&
+  !cast(O1->getOperand(1))->isZero())
+return isKnownNonEqual(O1->getOperand(0), O2->getOperand(0),
+   Depth + 1, Q);
+  break;
 case Instruction::SExt:
 case Instruction::ZExt:
   if (O1->getOperand(0)->getType() == O2->getOperand(0)->getType())

diff  --git a/llvm/test/Analysis/ValueTracking/known-non-equal.ll 
b/llvm/test/Analysis/ValueTracking/known-non-equal.ll
index 664542f632ab..8bc9a86c9a93 100644
--- a/llvm/test/Analysis/ValueTracking/known-non-equal.ll
+++ b/llvm/test/Analysis/ValueTracking/known-non-equal.ll
@@ -130,4 +130,76 @@ define i1 @sub2(i8 %B, i8 %C) {
   ret i1 %cmp
 }
 
+; op could wrap mapping two values to the same output value.
+define i1 @mul1(i8 %B) {
+; CHECK-LABEL: @mul1(
+; CHECK-NEXT:[[A:%.*]] = add i8 [[B:%.*]], 1
+; CHECK-NEXT:[[A_OP:%.*]] = mul i8 [[A]], 27
+; CHECK-NEXT:[[B_OP:%.*]] = mul i8 [[B]], 27
+; CHECK-NEXT:[[CMP:%.*]] = icmp eq i8 [[A_OP]], [[B_OP]]
+; CHECK-NEXT:ret i1 [[CMP]]
+;
+  %A = add i8 %B, 1
+  %A.op = mul i8 %A, 27
+  %B.op = mul i8 %B, 27
+
+  %cmp = icmp eq i8 %A.op, %B.op
+  ret i1 %cmp
+}
+
+define i1 @mul2(i8 %B) {
+; CHECK-LABEL: @mul2(
+; CHECK-NEXT:ret i1 false
+;
+  %A = add i8 %B, 1
+  %A.op = mul nuw i8 %A, 27
+  %B.op = mul nuw i8 %B, 27
+
+  %cmp = icmp eq i8 %A.op, %B.op
+  ret i1 %cmp
+}
+
+define i1 @mul3(i8 %B) {
+; CHECK-LABEL: @mul3(
+; CHECK-NEXT:ret i1 false
+;
+  %A = add i8 %B, 1
+  %A.op = mul nsw i8 %A, 27
+  %B.op = mul nsw i8 %B, 27
+
+  %cmp = icmp eq i8 %A.op, %B.op
+  ret i1 %cmp
+}
+
+; Multiply by zero collapses all values to one
+define i1 @mul4(i8 %B) {
+; CHECK-LABEL: @mul4(
+; CHECK-NEXT:ret i1 true
+;
+  %A = add i8 %B, 1
+  %A.op = mul nuw i8 %A, 0
+  %B.op = mul nuw i8 %B, 0
+
+  %cmp = icmp eq i8 %A.op, %B.op
+  ret i1 %cmp
+}
+
+; C might be zero, we can't tell
+define i1 @mul5(i8 %B, i8 %C) {
+; CHECK-LABEL: @mul5(
+; CHECK-NEXT:[[A:%.*]] = add i8 [[B:%.*]], 1
+; CHECK-NEXT:[[A_OP:%.*]] = mul nuw nsw i8 [[A]], [[C:%.*]]
+; CHECK-NEXT:[[B_OP:%.*]] = mul nuw nsw i8 [[B]], [[C]]
+; CHECK-NEXT:[[CMP:%.*]] = icmp eq i8 [[A_OP]], [[B_OP]]
+; CHECK-NEXT:ret i1 [[CMP]]
+;
+  %A = add i8 %B, 1
+  %A.op = mul nsw nuw i8 %A, %C
+  %B.op = mul nsw nuw i

[llvm-branch-commits] [llvm] 195a7af - [AArch64][GlobalISel] Narrow 128-bit regs to 64-bit regs in emitTestBit

[Jessica Paquette via llvm-branch-commits]

Author: Jessica Paquette
Date: 2020-12-07T15:04:33-08:00
New Revision: 195a7af0abb26915f962462f69c0f17e3835f78b

URL: 
https://github.com/llvm/llvm-project/commit/195a7af0abb26915f962462f69c0f17e3835f78b
DIFF: 
https://github.com/llvm/llvm-project/commit/195a7af0abb26915f962462f69c0f17e3835f78b.diff

LOG: [AArch64][GlobalISel] Narrow 128-bit regs to 64-bit regs in emitTestBit

When we have a 128-bit register, emitTestBit would incorrectly narrow to 32
bits always. If the bit number was > 32, then we would need a TB(N)ZX. This
would cause a crash, as we'd have the wrong register class. (PR48379)

This generalizes `narrowExtReg` into `moveScalarRegClass`.

This also allows us to remove `widenGPRBankRegIfNeeded` entirely, since
`selectCopy` correctly handles SUBREG_TO_REG etc.

This does create some codegen changes (since `selectCopy` uses the `all`
regclass variants). However, I think that these will likely be optimized away,
and we can always improve the `selectCopy` code. It looks like we should
revisit `selectCopy` at this point, and possibly refactor it into at least one
`emit` function.

Differential Revision: https://reviews.llvm.org/D92707

Added: 


Modified: 
llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
llvm/test/CodeGen/AArch64/GlobalISel/opt-fold-ext-tbz-tbnz.mir
llvm/test/CodeGen/AArch64/GlobalISel/subreg-copy.mir
llvm/test/CodeGen/AArch64/GlobalISel/widen-narrow-tbz-tbnz.mir

Removed: 




diff  --git a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp 
b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
index 610bf3af8793..982de35aeef1 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
@@ -356,14 +356,15 @@ class AArch64InstructionSelector : public 
InstructionSelector {
   getExtendTypeForInst(MachineInstr &MI, MachineRegisterInfo &MRI,
bool IsLoadStore = false) const;
 
-  /// Instructions that accept extend modifiers like UXTW expect the register
-  /// being extended to be a GPR32. Narrow ExtReg to a 32-bit register using a
-  /// subregister copy if necessary. Return either ExtReg, or the result of the
-  /// new copy.
-  Register narrowExtendRegIfNeeded(Register ExtReg,
- MachineIRBuilder &MIB) const;
-  Register widenGPRBankRegIfNeeded(Register Reg, unsigned Size,
-   MachineIRBuilder &MIB) const;
+  /// Move \p Reg to \p RC if \p Reg is not already on \p RC.
+  ///
+  /// \returns Either \p Reg if no change was necessary, or the new register
+  /// created by moving \p Reg.
+  ///
+  /// Note: This uses emitCopy right now.
+  Register moveScalarRegClass(Register Reg, const TargetRegisterClass &RC,
+  MachineIRBuilder &MIB) const;
+
   ComplexRendererFns selectArithExtendedRegister(MachineOperand &Root) const;
 
   void renderTruncImm(MachineInstrBuilder &MIB, const MachineInstr &MI,
@@ -1353,10 +1354,10 @@ MachineInstr *AArch64InstructionSelector::emitTestBit(
   // TBNZW work.
   bool UseWReg = Bit < 32;
   unsigned NecessarySize = UseWReg ? 32 : 64;
-  if (Size < NecessarySize)
-TestReg = widenGPRBankRegIfNeeded(TestReg, NecessarySize, MIB);
-  else if (Size > NecessarySize)
-TestReg = narrowExtendRegIfNeeded(TestReg, MIB);
+  if (Size != NecessarySize)
+TestReg = moveScalarRegClass(
+TestReg, UseWReg ? AArch64::GPR32RegClass : AArch64::GPR64RegClass,
+MIB);
 
   static const unsigned OpcTable[2][2] = {{AArch64::TBZX, AArch64::TBNZX},
   {AArch64::TBZW, AArch64::TBNZW}};
@@ -5152,7 +5153,7 @@ AArch64InstructionSelector::selectExtendedSHL(
 
 // Need a 32-bit wide register here.
 MachineIRBuilder MIB(*MRI.getVRegDef(Root.getReg()));
-OffsetReg = narrowExtendRegIfNeeded(OffsetReg, MIB);
+OffsetReg = moveScalarRegClass(OffsetReg, AArch64::GPR32RegClass, MIB);
   }
 
   // We can use the LHS of the GEP as the base, and the LHS of the shift as an
@@ -5372,8 +5373,8 @@ 
AArch64InstructionSelector::selectAddrModeWRO(MachineOperand &Root,
 
   // Need a 32-bit wide register.
   MachineIRBuilder MIB(*PtrAdd);
-  Register ExtReg =
-  narrowExtendRegIfNeeded(OffsetInst->getOperand(1).getReg(), MIB);
+  Register ExtReg = moveScalarRegClass(OffsetInst->getOperand(1).getReg(),
+   AArch64::GPR32RegClass, MIB);
   unsigned SignExtend = Ext == AArch64_AM::SXTW;
 
   // Base is LHS, offset is ExtReg.
@@ -5647,67 +5648,21 @@ AArch64_AM::ShiftExtendType 
AArch64InstructionSelector::getExtendTypeForInst(
   }
 }
 
-Register AArch64InstructionSelector::narrowExtendRegIfNeeded(
-Register ExtReg, MachineIRBuilder &MIB) const {
+Register AArch64InstructionSelector::moveScalarRegClass(
+Register Reg, const TargetRegisterClass

[llvm-branch-commits] [llvm] 40ad476 - [clang][AMDGPU] rename sram-ecc as sramecc

[Yaxun Liu via llvm-branch-commits]

Author: Yaxun (Sam) Liu
Date: 2020-12-07T18:05:47-05:00
New Revision: 40ad476a32445ec98666adcf24d2b33fd887ccc6

URL: 
https://github.com/llvm/llvm-project/commit/40ad476a32445ec98666adcf24d2b33fd887ccc6
DIFF: 
https://github.com/llvm/llvm-project/commit/40ad476a32445ec98666adcf24d2b33fd887ccc6.diff

LOG: [clang][AMDGPU] rename sram-ecc as sramecc

As backend renamed sram-ecc to sramecc, this patch makes
corresponding change in clang.

Differential Revision: https://reviews.llvm.org/D86217

Added: 


Modified: 
clang/include/clang/Basic/DiagnosticDriverKinds.td
clang/include/clang/Basic/TargetID.h
clang/include/clang/Driver/Options.td
clang/lib/Basic/TargetID.cpp
clang/lib/Basic/Targets/AMDGPU.h
clang/test/Driver/amdgpu-features.c
clang/test/Driver/hip-invalid-target-id.hip
clang/test/Driver/hip-target-id.hip
clang/test/Driver/hip-toolchain-features.hip
clang/test/Driver/invalid-target-id.cl
clang/test/Driver/target-id-macros.cl
clang/test/Driver/target-id-macros.hip
clang/test/Driver/target-id.cl
llvm/include/llvm/Support/TargetParser.h
llvm/lib/Support/TargetParser.cpp

Removed: 




diff  --git a/clang/include/clang/Basic/DiagnosticDriverKinds.td 
b/clang/include/clang/Basic/DiagnosticDriverKinds.td
index d6a2609e60f9..8fd7a805589d 100644
--- a/clang/include/clang/Basic/DiagnosticDriverKinds.td
+++ b/clang/include/clang/Basic/DiagnosticDriverKinds.td
@@ -79,7 +79,7 @@ def err_drv_cuda_host_arch : Error<"unsupported architecture 
'%0' for host compi
 def err_drv_mix_cuda_hip : Error<"Mixed Cuda and HIP compilation is not 
supported.">;
 def err_drv_bad_target_id : Error<"Invalid target ID: %0 (A target ID is a 
processor name "
   "followed by an optional list of predefined features post-fixed by a plus or 
minus sign deliminated "
-  "by colon, e.g. 'gfx908:sram-ecc+:xnack-')">;
+  "by colon, e.g. 'gfx908:sramecc+:xnack-')">;
 def err_drv_bad_offload_arch_combo : Error<"Invalid offload arch combinations: 
%0 and %1 (For a specific "
   "processor, a feature should either exist in all offload archs, or not exist 
in any offload archs)">;
 def err_drv_invalid_thread_model_for_target : Error<

diff  --git a/clang/include/clang/Basic/TargetID.h 
b/clang/include/clang/Basic/TargetID.h
index 95fd61d22eb1..1a9785574d06 100644
--- a/clang/include/clang/Basic/TargetID.h
+++ b/clang/include/clang/Basic/TargetID.h
@@ -19,7 +19,7 @@ namespace clang {
 /// Get all feature strings that can be used in target ID for \p Processor.
 /// Target ID is a processor name with optional feature strings
 /// postfixed by a plus or minus sign delimited by colons, e.g.
-/// gfx908:xnack+:sram-ecc-. Each processor have a limited
+/// gfx908:xnack+:sramecc-. Each processor have a limited
 /// number of predefined features when showing up in a target ID.
 const llvm::SmallVector
 getAllPossibleTargetIDFeatures(const llvm::Triple &T,

diff  --git a/clang/include/clang/Driver/Options.td 
b/clang/include/clang/Driver/Options.td
index 6480d6e80293..347349031669 100644
--- a/clang/include/clang/Driver/Options.td
+++ b/clang/include/clang/Driver/Options.td
@@ -666,7 +666,7 @@ def no_cuda_include_ptx_EQ : Joined<["--"], 
"no-cuda-include-ptx=">, Flags<[NoXa
 def offload_arch_EQ : Joined<["--"], "offload-arch=">, Flags<[NoXarchOption]>,
   HelpText<"CUDA offloading device architecture (e.g. sm_35), or HIP 
offloading target ID in the form of a "
"device architecture followed by target ID features delimited by a 
colon. Each target ID feature "
-   "is a pre-defined string followed by a plus or minus sign (e.g. 
gfx908:xnack+:sram-ecc-).  May be "
+   "is a pre-defined string followed by a plus or minus sign (e.g. 
gfx908:xnack+:sramecc-).  May be "
"specified more than once.">;
 def cuda_gpu_arch_EQ : Joined<["--"], "cuda-gpu-arch=">, 
Flags<[NoXarchOption]>,
   Alias;
@@ -2568,9 +2568,9 @@ def mcumode : Flag<["-"], "mcumode">, 
Group,
   HelpText<"Specify CU (-mcumode) or WGP (-mno-cumode) wavefront execution 
mode (AMDGPU only)">;
 def mno_cumode : Flag<["-"], "mno-cumode">, Group;
 
-def msram_ecc : Flag<["-"], "msram-ecc">, Group,
+def msramecc : Flag<["-"], "msramecc">, Group,
   HelpText<"Specify SRAM ECC mode (AMDGPU only)">;
-def mno_sram_ecc : Flag<["-"], "mno-sram-ecc">, Group;
+def mno_sramecc : Flag<["-"], "mno-sramecc">, Group;
 
 def mwavefrontsize64 : Flag<["-"], "mwavefrontsize64">, Group,
   HelpText<"Specify wavefront size 64 mode (AMDGPU only)">;

diff  --git a/clang/lib/Basic/TargetID.cpp b/clang/lib/Basic/TargetID.cpp
index 3bb895f28832..59d416f0e015 100644
--- a/clang/lib/Basic/TargetID.cpp
+++ b/clang/lib/Basic/TargetID.cpp
@@ -26,8 +26,8 @@ getAllPossibleAMDGPUTargetIDFeatures(const llvm::Triple &T,
 return Ret;
   auto Features = T.isAMDGCN() ? llvm::AMDGPU::getArchAttrAMDGCN(ProcKind)
: llvm::AMD

[llvm-branch-commits] [mlir] e15ae45 - Customize exception thrown from mlir.Operation.create() python bindings

[Mehdi Amini via llvm-branch-commits]

Author: Mehdi Amini
Date: 2020-12-07T23:06:58Z
New Revision: e15ae454b4b4632d4f40a9d95a5c7e4de95990cc

URL: 
https://github.com/llvm/llvm-project/commit/e15ae454b4b4632d4f40a9d95a5c7e4de95990cc
DIFF: 
https://github.com/llvm/llvm-project/commit/e15ae454b4b4632d4f40a9d95a5c7e4de95990cc.diff

LOG: Customize exception thrown from mlir.Operation.create() python bindings

The default exception handling isn't very user friendly and does not
point accurately to the issue. Instead we can indicate which of the
operands isn't valid and provide contextual information in the error
message.

Differential Revision: https://reviews.llvm.org/D92710

Added: 


Modified: 
mlir/lib/Bindings/Python/IRModules.cpp
mlir/test/Bindings/Python/ir_operation.py

Removed: 




diff  --git a/mlir/lib/Bindings/Python/IRModules.cpp 
b/mlir/lib/Bindings/Python/IRModules.cpp
index 3a80064866c0..39a17d053543 100644
--- a/mlir/lib/Bindings/Python/IRModules.cpp
+++ b/mlir/lib/Bindings/Python/IRModules.cpp
@@ -906,11 +906,31 @@ py::object PyOperation::create(
   if (attributes) {
 mlirAttributes.reserve(attributes->size());
 for (auto &it : *attributes) {
-
-  auto name = it.first.cast();
-  auto &attribute = it.second.cast();
-  // TODO: Verify attribute originates from the same context.
-  mlirAttributes.emplace_back(std::move(name), attribute);
+  std::string key;
+  try {
+key = it.first.cast();
+  } catch (py::cast_error &err) {
+std::string msg = "Invalid attribute key (not a string) when "
+  "attempting to create the operation \"" +
+  name + "\" (" + err.what() + ")";
+throw py::cast_error(msg);
+  }
+  try {
+auto &attribute = it.second.cast();
+// TODO: Verify attribute originates from the same context.
+mlirAttributes.emplace_back(std::move(key), attribute);
+  } catch (py::reference_cast_error &) {
+// This exception seems thrown when the value is "None".
+std::string msg =
+"Found an invalid (`None`?) attribute value for the key \"" + key +
+"\" when attempting to create the operation \"" + name + "\"";
+throw py::cast_error(msg);
+  } catch (py::cast_error &err) {
+std::string msg = "Invalid attribute value for the key \"" + key +
+  "\" when attempting to create the operation \"" +
+  name + "\" (" + err.what() + ")";
+throw py::cast_error(msg);
+  }
 }
   }
   // Unpack/validate successors.

diff  --git a/mlir/test/Bindings/Python/ir_operation.py 
b/mlir/test/Bindings/Python/ir_operation.py
index d23e0b6c0b4e..1f6df8626a0a 100644
--- a/mlir/test/Bindings/Python/ir_operation.py
+++ b/mlir/test/Bindings/Python/ir_operation.py
@@ -551,3 +551,30 @@ def testPrintInvalidOperation():
 # CHECK: "module"() ( {
 # CHECK: }) : () -> ()
 run(testPrintInvalidOperation)
+
+
+# CHECK-LABEL: TEST: testCreateWithInvalidAttributes
+def testCreateWithInvalidAttributes():
+  ctx = Context()
+  with Location.unknown(ctx):
+try:
+  Operation.create("module", attributes={None:StringAttr.get("name")})
+except Exception as e:
+  # CHECK: Invalid attribute key (not a string) when attempting to create 
the operation "module" (Unable to cast Python instance of type  to C++ type
+  print(e)
+try:
+  Operation.create("module", attributes={42:StringAttr.get("name")})
+except Exception as e:
+  # CHECK: Invalid attribute key (not a string) when attempting to create 
the operation "module" (Unable to cast Python instance of type  to 
C++ type
+  print(e)
+try:
+  Operation.create("module", attributes={"some_key":ctx})
+except Exception as e:
+  # CHECK: Invalid attribute value for the key "some_key" when attempting 
to create the operation "module" (Unable to cast Python instance of type  to C++ type 'mlir::python::PyAttribute')
+  print(e)
+try:
+  Operation.create("module", attributes={"some_key":None})
+except Exception as e:
+  # CHECK: Found an invalid (`None`?) attribute value for the key 
"some_key" when attempting to create the operation "module"
+  print(e)
+run(testCreateWithInvalidAttributes)



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[llvm-branch-commits] [mlir] e56f398 - Add Python binding for MLIR Type Attribute

[Mehdi Amini via llvm-branch-commits]

Author: Mehdi Amini
Date: 2020-12-07T23:06:58Z
New Revision: e56f398dd3740d97ac3b7ec1c69a12b951efd9a3

URL: 
https://github.com/llvm/llvm-project/commit/e56f398dd3740d97ac3b7ec1c69a12b951efd9a3
DIFF: 
https://github.com/llvm/llvm-project/commit/e56f398dd3740d97ac3b7ec1c69a12b951efd9a3.diff

LOG: Add Python binding for MLIR Type Attribute

Differential Revision: https://reviews.llvm.org/D92711

Added: 


Modified: 
mlir/lib/Bindings/Python/IRModules.cpp
mlir/test/Bindings/Python/ir_attributes.py

Removed: 




diff  --git a/mlir/lib/Bindings/Python/IRModules.cpp 
b/mlir/lib/Bindings/Python/IRModules.cpp
index 39a17d053543..cffebf6c715c 100644
--- a/mlir/lib/Bindings/Python/IRModules.cpp
+++ b/mlir/lib/Bindings/Python/IRModules.cpp
@@ -1922,6 +1922,28 @@ class PyDenseFPElementsAttribute
   }
 };
 
+class PyTypeAttribute : public PyConcreteAttribute {
+public:
+  static constexpr IsAFunctionTy isaFunction = mlirAttributeIsAType;
+  static constexpr const char *pyClassName = "TypeAttr";
+  using PyConcreteAttribute::PyConcreteAttribute;
+
+  static void bindDerived(ClassTy &c) {
+c.def_static(
+"get",
+[](PyType value, DefaultingPyMlirContext context) {
+  MlirAttribute attr = mlirTypeAttrGet(value.get());
+  return PyTypeAttribute(context->getRef(), attr);
+},
+py::arg("value"), py::arg("context") = py::none(),
+"Gets a uniqued Type attribute");
+c.def_property_readonly("value", [](PyTypeAttribute &self) {
+  return PyType(self.getContext()->getRef(),
+mlirTypeAttrGetValue(self.get()));
+});
+  }
+};
+
 /// Unit Attribute subclass. Unit attributes don't have values.
 class PyUnitAttribute : public PyConcreteAttribute {
 public:
@@ -3073,6 +3095,7 @@ void mlir::python::populateIRSubmodule(py::module &m) {
   PyDenseElementsAttribute::bind(m);
   PyDenseIntElementsAttribute::bind(m);
   PyDenseFPElementsAttribute::bind(m);
+  PyTypeAttribute::bind(m);
   PyUnitAttribute::bind(m);
 
   
//

diff  --git a/mlir/test/Bindings/Python/ir_attributes.py 
b/mlir/test/Bindings/Python/ir_attributes.py
index 0572220c750d..4ad180bb1b37 100644
--- a/mlir/test/Bindings/Python/ir_attributes.py
+++ b/mlir/test/Bindings/Python/ir_attributes.py
@@ -255,3 +255,17 @@ def testDenseFPAttr():
 
 
 run(testDenseFPAttr)
+
+
+# CHECK-LABEL: TEST: testTypeAttr
+def testTypeAttr():
+  with Context():
+raw = Attribute.parse("vector<4xf32>")
+# CHECK: attr: vector<4xf32>
+print("attr:", raw)
+type_attr = TypeAttr(raw)
+# CHECK: f32
+print(ShapedType(type_attr.value).element_type)
+
+
+run(testTypeAttr)



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[llvm-branch-commits] [clang] 4bed1d9 - [HIP] fix bundle entry ID for --

[Yaxun Liu via llvm-branch-commits]

Author: Yaxun (Sam) Liu
Date: 2020-12-07T18:08:37-05:00
New Revision: 4bed1d9b32b19f786aed17865e08c966962513cd

URL: 
https://github.com/llvm/llvm-project/commit/4bed1d9b32b19f786aed17865e08c966962513cd
DIFF: 
https://github.com/llvm/llvm-project/commit/4bed1d9b32b19f786aed17865e08c966962513cd.diff

LOG: [HIP] fix bundle entry ID for --

Canonicalize triple used in fat binary. Change from
amdgcn-amd-amdhsa to amdgcn-amd-amdhsa-.

This is part of https://reviews.llvm.org/D60620

Added: 


Modified: 
clang/lib/Driver/ToolChains/HIP.cpp
clang/test/Driver/hip-target-id.hip
clang/test/Driver/hip-toolchain-device-only.hip
clang/test/Driver/hip-toolchain-no-rdc.hip
clang/test/Driver/hip-toolchain-rdc-separate.hip
clang/test/Driver/hip-toolchain-rdc-static-lib.hip
clang/test/Driver/hip-toolchain-rdc.hip

Removed: 




diff  --git a/clang/lib/Driver/ToolChains/HIP.cpp 
b/clang/lib/Driver/ToolChains/HIP.cpp
index fc1103b48a99..d2f8571e41fb 100644
--- a/clang/lib/Driver/ToolChains/HIP.cpp
+++ b/clang/lib/Driver/ToolChains/HIP.cpp
@@ -120,7 +120,7 @@ void AMDGCN::constructHIPFatbinCommand(Compilation &C, 
const JobAction &JA,
 
   for (const auto &II : Inputs) {
 const auto* A = II.getAction();
-BundlerTargetArg = BundlerTargetArg + ",hip-amdgcn-amd-amdhsa-" +
+BundlerTargetArg = BundlerTargetArg + ",hip-amdgcn-amd-amdhsa--" +
StringRef(A->getOffloadingArch()).str();
 BundlerInputArg = BundlerInputArg + "," + II.getFilename();
   }

diff  --git a/clang/test/Driver/hip-target-id.hip 
b/clang/test/Driver/hip-target-id.hip
index 073f01ca812a..4e5aba65ce11 100644
--- a/clang/test/Driver/hip-target-id.hip
+++ b/clang/test/Driver/hip-target-id.hip
@@ -47,7 +47,7 @@
 // CHECK-SAME: "-plugin-opt=-mattr=-sramecc,+xnack"
 
 // CHECK: {{"[^"]*clang-offload-bundler[^"]*"}}
-// CHECK-SAME: 
"-targets=host-x86_64-unknown-linux,hip-amdgcn-amd-amdhsa-gfx908:sramecc+:xnack+,hip-amdgcn-amd-amdhsa-gfx908:sramecc-:xnack+"
+// CHECK-SAME: 
"-targets=host-x86_64-unknown-linux,hip-amdgcn-amd-amdhsa--gfx908:sramecc+:xnack+,hip-amdgcn-amd-amdhsa--gfx908:sramecc-:xnack+"
 
 // Check canonicalization and repeating of target ID.
 
@@ -58,7 +58,7 @@
 // RUN:   --offload-arch=fiji \
 // RUN:   --rocm-path=%S/Inputs/rocm \
 // RUN:   %s 2>&1 | FileCheck -check-prefix=FIJI %s
-// FIJI: "-targets=host-x86_64-unknown-linux,hip-amdgcn-amd-amdhsa-gfx803"
+// FIJI: "-targets=host-x86_64-unknown-linux,hip-amdgcn-amd-amdhsa--gfx803"
 
 // RUN: %clang -### -target x86_64-linux-gnu \
 // RUN:   -x hip \
@@ -69,4 +69,4 @@
 // RUN:   --offload-arch=gfx906 \
 // RUN:   --rocm-path=%S/Inputs/rocm \
 // RUN:   %s 2>&1 | FileCheck -check-prefix=MULTI %s
-// MULTI: 
"-targets=host-x86_64-unknown-linux,hip-amdgcn-amd-amdhsa-gfx900:xnack+,hip-amdgcn-amd-amdhsa-gfx900:xnack-,hip-amdgcn-amd-amdhsa-gfx906,hip-amdgcn-amd-amdhsa-gfx908:sramecc+,hip-amdgcn-amd-amdhsa-gfx908:sramecc-"
+// MULTI: 
"-targets=host-x86_64-unknown-linux,hip-amdgcn-amd-amdhsa--gfx900:xnack+,hip-amdgcn-amd-amdhsa--gfx900:xnack-,hip-amdgcn-amd-amdhsa--gfx906,hip-amdgcn-amd-amdhsa--gfx908:sramecc+,hip-amdgcn-amd-amdhsa--gfx908:sramecc-"

diff  --git a/clang/test/Driver/hip-toolchain-device-only.hip 
b/clang/test/Driver/hip-toolchain-device-only.hip
index e05447f426bd..b3fd7ceb235f 100644
--- a/clang/test/Driver/hip-toolchain-device-only.hip
+++ b/clang/test/Driver/hip-toolchain-device-only.hip
@@ -25,5 +25,5 @@
 // CHECK-SAME: "-o" "[[IMG_DEV_A_900:.*out]]" [[OBJ_DEV_A_900]]
 
 // CHECK: [[BUNDLER:".*clang-offload-bundler"]] "-type=o"
-// CHECK-SAME: 
"-targets={{.*}},hip-amdgcn-amd-amdhsa-gfx803,hip-amdgcn-amd-amdhsa-gfx900"
+// CHECK-SAME: 
"-targets={{.*}},hip-amdgcn-amd-amdhsa--gfx803,hip-amdgcn-amd-amdhsa--gfx900"
 // CHECK-SAME: "-inputs={{.*}},[[IMG_DEV_A_803]],[[IMG_DEV_A_900]]" 
"-outputs=[[BUNDLE_A:.*hipfb]]"

diff  --git a/clang/test/Driver/hip-toolchain-no-rdc.hip 
b/clang/test/Driver/hip-toolchain-no-rdc.hip
index 471c3022ecef..8283bd3d078d 100644
--- a/clang/test/Driver/hip-toolchain-no-rdc.hip
+++ b/clang/test/Driver/hip-toolchain-no-rdc.hip
@@ -82,7 +82,7 @@
 
 // CHECK: [[BUNDLER:".*clang-offload-bundler"]] "-type=o"
 // CHECK-SAME: "-bundle-align=4096"
-// CHECK-SAME: 
"-targets={{.*}},hip-amdgcn-amd-amdhsa-gfx803,hip-amdgcn-amd-amdhsa-gfx900"
+// CHECK-SAME: 
"-targets={{.*}},hip-amdgcn-amd-amdhsa--gfx803,hip-amdgcn-amd-amdhsa--gfx900"
 // CHECK-SAME: "-inputs={{.*}},[[IMG_DEV_A_803]],[[IMG_DEV_A_900]]" 
"-outputs=[[BUNDLE_A:.*hipfb]]"
 
 // CHECK: [[CLANG]] "-cc1" "-triple" "x86_64-unknown-linux-gnu"
@@ -145,7 +145,7 @@
 
 // CHECK: [[BUNDLER:".*clang-offload-bundler"]] "-type=o"
 // CHECK-SAME: "-bundle-align=4096"
-// CHECK-SAME: 
"-targets={{.*}},hip-amdgcn-amd-amdhsa-gfx803,hip-amdgcn-amd-amdhsa-gfx900"
+// CHECK-SAME: 
"-targets={{.*}},hip-amdgcn-amd-amdhsa--gfx803,hip-amdgcn-amd-amdhsa--gfx900"
 // CHECK-SAME: "-inputs=

[llvm-branch-commits] [clang] 5cae708 - [clang][AMDGPU] remove mxnack and msramecc options

[Yaxun Liu via llvm-branch-commits]

Author: Yaxun (Sam) Liu
Date: 2020-12-07T18:08:37-05:00
New Revision: 5cae70800266119bbf319675a175cba9a7f315b1

URL: 
https://github.com/llvm/llvm-project/commit/5cae70800266119bbf319675a175cba9a7f315b1
DIFF: 
https://github.com/llvm/llvm-project/commit/5cae70800266119bbf319675a175cba9a7f315b1.diff

LOG: [clang][AMDGPU] remove mxnack and msramecc options

Remove mxnack and msramecc options since they
are deprecated by --offload-arch.

This is part of https://reviews.llvm.org/D60620

Added: 


Modified: 
clang/include/clang/Driver/Options.td

Removed: 




diff  --git a/clang/include/clang/Driver/Options.td 
b/clang/include/clang/Driver/Options.td
index 347349031669..4f6851774522 100644
--- a/clang/include/clang/Driver/Options.td
+++ b/clang/include/clang/Driver/Options.td
@@ -2568,19 +2568,11 @@ def mcumode : Flag<["-"], "mcumode">, 
Group,
   HelpText<"Specify CU (-mcumode) or WGP (-mno-cumode) wavefront execution 
mode (AMDGPU only)">;
 def mno_cumode : Flag<["-"], "mno-cumode">, Group;
 
-def msramecc : Flag<["-"], "msramecc">, Group,
-  HelpText<"Specify SRAM ECC mode (AMDGPU only)">;
-def mno_sramecc : Flag<["-"], "mno-sramecc">, Group;
-
 def mwavefrontsize64 : Flag<["-"], "mwavefrontsize64">, Group,
   HelpText<"Specify wavefront size 64 mode (AMDGPU only)">;
 def mno_wavefrontsize64 : Flag<["-"], "mno-wavefrontsize64">, Group,
   HelpText<"Specify wavefront size 32 mode (AMDGPU only)">;
 
-def mxnack : Flag<["-"], "mxnack">, Group,
-  HelpText<"Specify XNACK mode (AMDGPU only)">;
-def mno_xnack : Flag<["-"], "mno-xnack">, Group;
-
 def munsafe_fp_atomics : Flag<["-"], "munsafe-fp-atomics">, Group,
   HelpText<"Enable unsafe floating point atomic instructions (AMDGPU only)">,
   Flags<[CC1Option]>;



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[llvm-branch-commits] [clang] 0b81d9a - [AMDGPU] add -mcode-object-version=n

[Yaxun Liu via llvm-branch-commits]

Author: Yaxun (Sam) Liu
Date: 2020-12-07T18:08:37-05:00
New Revision: 0b81d9a992579ef55b0781c9bc678aa1f3133e9e

URL: 
https://github.com/llvm/llvm-project/commit/0b81d9a992579ef55b0781c9bc678aa1f3133e9e
DIFF: 
https://github.com/llvm/llvm-project/commit/0b81d9a992579ef55b0781c9bc678aa1f3133e9e.diff

LOG: [AMDGPU] add -mcode-object-version=n

Add option -mcode-object-version=n to control code object version for
AMDGPU.

Differential Revision: https://reviews.llvm.org/D91310

Added: 
clang/test/Driver/hip-code-object-version.hip

Modified: 
clang/docs/ClangCommandLineReference.rst
clang/include/clang/Driver/Options.td
clang/lib/Driver/ToolChains/AMDGPU.cpp
clang/lib/Driver/ToolChains/Clang.cpp
clang/lib/Driver/ToolChains/CommonArgs.cpp
clang/lib/Driver/ToolChains/CommonArgs.h
clang/lib/Driver/ToolChains/HIP.cpp
clang/test/Driver/amdgpu-features-as.s
clang/test/Driver/amdgpu-features.c
clang/test/Driver/hip-autolink.hip
clang/test/Driver/hip-device-compile.hip
clang/test/Driver/hip-host-cpu-features.hip
clang/test/Driver/hip-rdc-device-only.hip
clang/test/Driver/hip-target-id.hip
clang/test/Driver/hip-toolchain-device-only.hip
clang/test/Driver/hip-toolchain-mllvm.hip
clang/test/Driver/hip-toolchain-no-rdc.hip
clang/test/Driver/hip-toolchain-opt.hip
clang/test/Driver/hip-toolchain-rdc-separate.hip
clang/test/Driver/hip-toolchain-rdc-static-lib.hip
clang/test/Driver/hip-toolchain-rdc.hip

Removed: 




diff  --git a/clang/docs/ClangCommandLineReference.rst 
b/clang/docs/ClangCommandLineReference.rst
index ce510f335bd4..b46008970f57 100644
--- a/clang/docs/ClangCommandLineReference.rst
+++ b/clang/docs/ClangCommandLineReference.rst
@@ -2663,6 +2663,10 @@ Align selected branches (fused, jcc, jmp) within 32-byte 
boundary
 
 Legacy option to specify code object ABI V2 (-mnocode-object-v3) or V3 
(-mcode-object-v3) (AMDGPU only)
 
+.. option:: -mcode-object-version=
+
+Specify code object ABI version. Defaults to 4. (AMDGPU only)
+
 .. option:: -mconsole
 
 .. program:: clang1

diff  --git a/clang/include/clang/Driver/Options.td 
b/clang/include/clang/Driver/Options.td
index 4f6851774522..c6159f50b781 100644
--- a/clang/include/clang/Driver/Options.td
+++ b/clang/include/clang/Driver/Options.td
@@ -2560,6 +2560,10 @@ def mexec_model_EQ : Joined<["-"], "mexec-model=">, 
Group,
  HelpText<"Execution model (WebAssembly only)">;
 
+def mcode_object_version_EQ : Joined<["-"], "mcode-object-version=">, 
Group,
+  HelpText<"Specify code object ABI version. Defaults to 4. (AMDGPU only)">,
+  MetaVarName<"">, Values<"2,3,4">;
+
 def mcode_object_v3_legacy : Flag<["-"], "mcode-object-v3">, Group,
   HelpText<"Legacy option to specify code object ABI V2 (-mnocode-object-v3) 
or V3 (-mcode-object-v3) (AMDGPU only)">;
 def mno_code_object_v3_legacy : Flag<["-"], "mno-code-object-v3">, 
Group;

diff  --git a/clang/lib/Driver/ToolChains/AMDGPU.cpp 
b/clang/lib/Driver/ToolChains/AMDGPU.cpp
index 1220594281ec..565a77e07fd8 100644
--- a/clang/lib/Driver/ToolChains/AMDGPU.cpp
+++ b/clang/lib/Driver/ToolChains/AMDGPU.cpp
@@ -399,8 +399,14 @@ void amdgpu::getAMDGPUTargetFeatures(const Driver &D,
 AMDGPUToolChain::AMDGPUToolChain(const Driver &D, const llvm::Triple &Triple,
  const ArgList &Args)
 : Generic_ELF(D, Triple, Args),
-  OptionsDefault({{options::OPT_O, "3"},
-  {options::OPT_cl_std_EQ, "CL1.2"}}) {}
+  OptionsDefault(
+  {{options::OPT_O, "3"}, {options::OPT_cl_std_EQ, "CL1.2"}}) {
+  // Check code object version options. Emit warnings for legacy options
+  // and errors for the last invalid code object version options.
+  // It is done here to avoid repeated warning or error messages for
+  // each tool invocation.
+  (void)getOrCheckAMDGPUCodeObjectVersion(D, Args, /*Diagnose=*/true);
+}
 
 Tool *AMDGPUToolChain::buildLinker() const {
   return new tools::amdgpu::Linker(*this);

diff  --git a/clang/lib/Driver/ToolChains/Clang.cpp 
b/clang/lib/Driver/ToolChains/Clang.cpp
index a513c0025a62..86d4c5a8658a 100644
--- a/clang/lib/Driver/ToolChains/Clang.cpp
+++ b/clang/lib/Driver/ToolChains/Clang.cpp
@@ -1064,24 +1064,14 @@ static const char 
*RelocationModelName(llvm::Reloc::Model Model) {
   }
   llvm_unreachable("Unknown Reloc::Model kind");
 }
-
-static void HandleAmdgcnLegacyOptions(const Driver &D,
-  const ArgList &Args,
-  ArgStringList &CmdArgs) {
-  if (auto *CodeObjArg = Args.getLastArg(options::OPT_mcode_object_v3_legacy,
- 
options::OPT_mno_code_object_v3_legacy)) {
-if (CodeObjArg->getOption().getID() == 
options::OPT_mcode_object_v3_legacy) {
-  D.Diag(diag::warn_drv_deprecated_arg) << "-mcode-object-v3" <<
-"-mllvm --amdhsa-c

[llvm-branch-commits] [clang] a64c26a - Fix deserialization cycle in preferred_name attribute.

[Richard Smith via llvm-branch-commits]

Author: Richard Smith
Date: 2020-12-07T16:02:05-08:00
New Revision: a64c26a47a81b1b44e36d235ff3bc6a74a0bad9f

URL: 
https://github.com/llvm/llvm-project/commit/a64c26a47a81b1b44e36d235ff3bc6a74a0bad9f
DIFF: 
https://github.com/llvm/llvm-project/commit/a64c26a47a81b1b44e36d235ff3bc6a74a0bad9f.diff

LOG: Fix deserialization cycle in preferred_name attribute.

This is really just a workaround for a more fundamental issue in the way
we deserialize attributes. See PR48434 for details.

Also fix tablegen code generator to produce more correct indentation to
resolve buildbot issues with -Werror=misleading-indentation firing
inside the generated code.

Added: 
clang/test/PCH/decl-attrs.cpp

Modified: 
clang/include/clang/AST/TypeProperties.td
clang/lib/AST/TypePrinter.cpp
clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
clang/test/SemaTemplate/attributes.cpp
clang/utils/TableGen/ClangAttrEmitter.cpp

Removed: 




diff  --git a/clang/include/clang/AST/TypeProperties.td 
b/clang/include/clang/AST/TypeProperties.td
index a183ac0479c6a..b582395c44a64 100644
--- a/clang/include/clang/AST/TypeProperties.td
+++ b/clang/include/clang/AST/TypeProperties.td
@@ -484,8 +484,12 @@ let Class = TagType in {
 let Read = [{ node->isDependentType() }];
   }
   def : Property<"declaration", DeclRef> {
-// Serializing a reference to the canonical declaration is apparently
-// necessary to make module-merging work.
+// We don't know which declaration was originally referenced here, and we
+// cannot reference a declaration that follows the use (because that can
+// introduce deserialization cycles), so conservatively generate a
+// reference to the first declaration.
+// FIXME: If this is a reference to a class template specialization, that
+// can still introduce a deserialization cycle.
 let Read = [{ node->getDecl()->getCanonicalDecl() }];
   }
 }

diff  --git a/clang/lib/AST/TypePrinter.cpp b/clang/lib/AST/TypePrinter.cpp
index 54c451291a077..77ca0f21cc8a1 100644
--- a/clang/lib/AST/TypePrinter.cpp
+++ b/clang/lib/AST/TypePrinter.cpp
@@ -1350,11 +1350,16 @@ void TypePrinter::printTag(TagDecl *D, raw_ostream &OS) 
{
 
 void TypePrinter::printRecordBefore(const RecordType *T, raw_ostream &OS) {
   // Print the preferred name if we have one for this type.
-  for (const auto *PNA : T->getDecl()->specific_attrs()) {
-if (declaresSameEntity(PNA->getTypedefType()->getAsCXXRecordDecl(),
-   T->getDecl()))
-  return printTypeSpec(
-  PNA->getTypedefType()->castAs()->getDecl(), OS);
+  if (const auto *Spec =
+  dyn_cast(T->getDecl())) {
+for (const auto *PNA : Spec->getSpecializedTemplate()
+   ->getTemplatedDecl()
+   ->getMostRecentDecl()
+   ->specific_attrs()) {
+  if (declaresSameEntity(PNA->getTypedefType()->getAsCXXRecordDecl(), 
Spec))
+return printTypeSpec(
+PNA->getTypedefType()->castAs()->getDecl(), OS);
+}
   }
 
   printTag(T->getDecl(), OS);

diff  --git a/clang/lib/Sema/SemaTemplateInstantiateDecl.cpp 
b/clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
index 9db4f23d72967..7403d31c884ae 100644
--- a/clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
+++ b/clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
@@ -552,20 +552,10 @@ static void instantiateDependentAMDGPUWavesPerEUAttr(
 /// If not, we can skip instantiating it. The attribute may or may not have
 /// been instantiated yet.
 static bool isRelevantAttr(Sema &S, const Decl *D, const Attr *A) {
-  // 'preferred_name' is only relevant to the matching specialization of the
+  // Never instantiate preferred_name attributes; they're relevant only on the
   // template.
-  if (const auto *PNA = dyn_cast(A)) {
-QualType T = PNA->getTypedefType();
-const auto *RD = cast(D);
-if (!T->isDependentType() && !RD->isDependentContext() &&
-!declaresSameEntity(T->getAsCXXRecordDecl(), RD))
-  return false;
-for (const auto *ExistingPNA : D->specific_attrs())
-  if (S.Context.hasSameType(ExistingPNA->getTypedefType(),
-PNA->getTypedefType()))
-return false;
-return true;
-  }
+  if (const auto *PNA = dyn_cast(A))
+return false;
 
   return true;
 }

diff  --git a/clang/test/PCH/decl-attrs.cpp b/clang/test/PCH/decl-attrs.cpp
new file mode 100644
index 0..c89354d0c5de5
--- /dev/null
+++ b/clang/test/PCH/decl-attrs.cpp
@@ -0,0 +1,27 @@
+// RUN: %clang_cc1 -std=c++20 -emit-pch -o %t.a %s
+// RUN: %clang_cc1 -std=c++20 -include-pch %t.a %s -verify
+
+#ifndef HEADER
+#define HEADER
+
+namespace preferred_name {
+  template struct X;
+  using Y = X;
+  using Z = X;
+  template struct [[using clang: preferred_name(Y), 
preferred_name(Z)]] X {};
+  Y y;
+}
+
+#else
+
+namespace preferred_name {
+  Z z;
+
+  

[llvm-branch-commits] [llvm] ccc5160 - Fixup test in path to use C:\ instead of D:\ which may be mapped to a removable.

[Douglas Yung via llvm-branch-commits]

Author: Douglas Yung
Date: 2020-12-07T16:36:58-08:00
New Revision: ccc5160df100663630329e2e544fc04dd126f88f

URL: 
https://github.com/llvm/llvm-project/commit/ccc5160df100663630329e2e544fc04dd126f88f
DIFF: 
https://github.com/llvm/llvm-project/commit/ccc5160df100663630329e2e544fc04dd126f88f.diff

LOG: Fixup test in path to use C:\ instead of D:\ which may be mapped to a 
removable.

Our internal build bot hit a failure in 
llvm/test/tools/llvm-symbolizer/pdb/missing_pdb.test
because the test was checking for an error message that is emitted when a pdb 
file is
missing. But when the drive is mapped to a removalable drive (such as a DVD 
drive) in
Windows, you get a different error message which causes the test to fail.

This fixes the test by changing the drive the missing pdb is expected to be on 
to C:\
instead of D:\ as that is the drive historically used to install Windows and 
thus
if present should be a hard drive.

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D92787

Added: 


Modified: 
llvm/test/tools/llvm-symbolizer/pdb/Inputs/missing_pdb.exe

Removed: 




diff  --git a/llvm/test/tools/llvm-symbolizer/pdb/Inputs/missing_pdb.exe 
b/llvm/test/tools/llvm-symbolizer/pdb/Inputs/missing_pdb.exe
index 320e1f30e582..93aa8a788b96 100644
Binary files a/llvm/test/tools/llvm-symbolizer/pdb/Inputs/missing_pdb.exe and 
b/llvm/test/tools/llvm-symbolizer/pdb/Inputs/missing_pdb.exe 
diff er



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[llvm-branch-commits] [clang] efc063b - Fix lit test failure due to 0b81d9

[Yaxun Liu via llvm-branch-commits]

Author: Yaxun (Sam) Liu
Date: 2020-12-07T19:50:21-05:00
New Revision: efc063b621ea0c4d1e452bcade62f7fc7e1cc937

URL: 
https://github.com/llvm/llvm-project/commit/efc063b621ea0c4d1e452bcade62f7fc7e1cc937
DIFF: 
https://github.com/llvm/llvm-project/commit/efc063b621ea0c4d1e452bcade62f7fc7e1cc937.diff

LOG: Fix lit test failure due to 0b81d9

These lit tests now requires amdgpu-registered-target since they
use clang driver and clang driver passes an LLVM option which
is available only if amdgpu target is registered.

Change-Id: I2df31967409f1627fc6d342d1ab5cc8aa17c9c0c

Added: 


Modified: 
clang/test/CodeGenOpenCL/amdgpu-debug-info-pointer-address-space.cl
clang/test/CodeGenOpenCL/amdgpu-debug-info-variable-expression.cl
clang/test/Driver/amdgpu-macros.cl
clang/test/Preprocessor/predefined-arch-macros.c

Removed: 




diff  --git 
a/clang/test/CodeGenOpenCL/amdgpu-debug-info-pointer-address-space.cl 
b/clang/test/CodeGenOpenCL/amdgpu-debug-info-pointer-address-space.cl
index f09981dfa0f3..ab625f3154b2 100644
--- a/clang/test/CodeGenOpenCL/amdgpu-debug-info-pointer-address-space.cl
+++ b/clang/test/CodeGenOpenCL/amdgpu-debug-info-pointer-address-space.cl
@@ -1,3 +1,4 @@
+// REQUIRES: amdgpu-registered-target
 // RUN: %clang -cl-std=CL2.0 -emit-llvm -g -O0 -S -nogpulib -target 
amdgcn-amd-amdhsa -mcpu=fiji -o - %s | FileCheck %s
 // RUN: %clang -cl-std=CL2.0 -emit-llvm -g -O0 -S -nogpulib -target 
amdgcn-amd-amdhsa-opencl -mcpu=fiji -o - %s | FileCheck %s
 

diff  --git a/clang/test/CodeGenOpenCL/amdgpu-debug-info-variable-expression.cl 
b/clang/test/CodeGenOpenCL/amdgpu-debug-info-variable-expression.cl
index 4a4c8cc54eb3..a305875bcc66 100644
--- a/clang/test/CodeGenOpenCL/amdgpu-debug-info-variable-expression.cl
+++ b/clang/test/CodeGenOpenCL/amdgpu-debug-info-variable-expression.cl
@@ -1,3 +1,4 @@
+// REQUIRES: amdgpu-registered-target
 // RUN: %clang -cl-std=CL2.0 -emit-llvm -g -O0 -S -nogpulib -target 
amdgcn-amd-amdhsa -mcpu=fiji -o - %s | FileCheck %s
 // RUN: %clang -cl-std=CL2.0 -emit-llvm -g -O0 -S -nogpulib -target 
amdgcn-amd-amdhsa-opencl -mcpu=fiji -o - %s | FileCheck %s
 

diff  --git a/clang/test/Driver/amdgpu-macros.cl 
b/clang/test/Driver/amdgpu-macros.cl
index 57b54acf85ab..e5611446eace 100644
--- a/clang/test/Driver/amdgpu-macros.cl
+++ b/clang/test/Driver/amdgpu-macros.cl
@@ -1,3 +1,4 @@
+// REQUIRES: amdgpu-registered-target
 // Check that appropriate macros are defined for every supported AMDGPU
 // "-target" and "-mcpu" options.
 

diff  --git a/clang/test/Preprocessor/predefined-arch-macros.c 
b/clang/test/Preprocessor/predefined-arch-macros.c
index 052fb3c1bbf3..254ca60af846 100644
--- a/clang/test/Preprocessor/predefined-arch-macros.c
+++ b/clang/test/Preprocessor/predefined-arch-macros.c
@@ -1,3 +1,4 @@
+// REQUIRES: amdgpu-registered-target
 // Begin X86/GCC/Linux tests 
 
 // RUN: %clang -march=i386 -m32 -E -dM %s -o - 2>&1 \



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[llvm-branch-commits] [llvm] 700cf7d - [VNCoercion] Disallow coercion between different ni addrspaces

[Valentin Churavy via llvm-branch-commits]

Author: Valentin Churavy
Date: 2020-12-07T20:19:48-05:00
New Revision: 700cf7dcc927c0ffddc0a1acbfde490f673ffb4a

URL: 
https://github.com/llvm/llvm-project/commit/700cf7dcc927c0ffddc0a1acbfde490f673ffb4a
DIFF: 
https://github.com/llvm/llvm-project/commit/700cf7dcc927c0ffddc0a1acbfde490f673ffb4a.diff

LOG: [VNCoercion] Disallow coercion between different ni addrspaces

I'm not sure if it would be legal by the IR reference to introduce
an addrspacecast here, since the IR reference is a bit vague on
the exact semantics, but at least for our usage of it (and I
suspect for many other's usage) it is not. For us, addrspacecasts
between non-integral address spaces carry frontend information that the
optimizer cannot deduce afterwards in a generic way (though we
have frontend specific passes in our pipline that do propagate
these). In any case, I'm sure nobody is using it this way at
the moment, since it would have introduced inttoptrs, which
are definitely illegal.

Fixes PR38375

Co-authored-by: Keno Fischer 

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D50010

Added: 


Modified: 
llvm/lib/Transforms/Utils/VNCoercion.cpp
llvm/test/Transforms/GVN/non-integral-pointers.ll

Removed: 




diff  --git a/llvm/lib/Transforms/Utils/VNCoercion.cpp 
b/llvm/lib/Transforms/Utils/VNCoercion.cpp
index 3adb9d40b4ff..61cd8595a73b 100644
--- a/llvm/lib/Transforms/Utils/VNCoercion.cpp
+++ b/llvm/lib/Transforms/Utils/VNCoercion.cpp
@@ -37,23 +37,27 @@ bool canCoerceMustAliasedValueToLoad(Value *StoredVal, Type 
*LoadTy,
   if (StoreSize < DL.getTypeSizeInBits(LoadTy).getFixedSize())
 return false;
 
+  bool StoredNI = DL.isNonIntegralPointerType(StoredTy->getScalarType());
+  bool LoadNI = DL.isNonIntegralPointerType(LoadTy->getScalarType());
   // Don't coerce non-integral pointers to integers or vice versa.
-  if (DL.isNonIntegralPointerType(StoredVal->getType()->getScalarType()) !=
-  DL.isNonIntegralPointerType(LoadTy->getScalarType())) {
+  if (StoredNI != LoadNI) {
 // As a special case, allow coercion of memset used to initialize
 // an array w/null.  Despite non-integral pointers not generally having a
 // specific bit pattern, we do assume null is zero.
 if (auto *CI = dyn_cast(StoredVal))
   return CI->isNullValue();
 return false;
+  } else if (StoredNI && LoadNI &&
+ StoredTy->getPointerAddressSpace() !=
+ LoadTy->getPointerAddressSpace()) {
+return false;
   }
 
 
   // The implementation below uses inttoptr for vectors of unequal size; we
   // can't allow this for non integral pointers. We could teach it to extract
   // exact subvectors if desired. 
-  if (DL.isNonIntegralPointerType(StoredTy->getScalarType()) &&
-  StoreSize != DL.getTypeSizeInBits(LoadTy).getFixedSize())
+  if (StoredNI && StoreSize != DL.getTypeSizeInBits(LoadTy).getFixedSize())
 return false;
 
   return true;

diff  --git a/llvm/test/Transforms/GVN/non-integral-pointers.ll 
b/llvm/test/Transforms/GVN/non-integral-pointers.ll
index 872b6648084e..56f9d3179c27 100644
--- a/llvm/test/Transforms/GVN/non-integral-pointers.ll
+++ b/llvm/test/Transforms/GVN/non-integral-pointers.ll
@@ -1,7 +1,7 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt -gvn -S < %s | FileCheck %s
 
-target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128-ni:4"
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128-ni:4:5"
 target triple = "x86_64-unknown-linux-gnu"
 
 define void @f0(i1 %alwaysFalse, i64 %val, i64* %loc) {
@@ -430,3 +430,20 @@ entry:
 
 declare void @use.v2(<2 x i64 addrspace(4)*>)
 declare void @use.v4(<4 x i64 addrspace(4)*>)
+ define i8 addrspace(5)* @multini(i1 %alwaysFalse, i8 addrspace(4)* %val, i8 
addrspace(4)** %loc) {
+ ; CHECK-LABEL: @multini(
+ ; CHECK-NOT: inttoptr
+ ; CHECK-NOT: ptrtoint
+ ; CHECK-NOT: addrspacecast
+  entry:
+   store i8 addrspace(4)* %val, i8 addrspace(4)** %loc
+   br i1 %alwaysFalse, label %neverTaken, label %alwaysTaken
+
+  neverTaken:
+   %loc.bc = bitcast i8 addrspace(4)** %loc to i8 addrspace(5)**
+   %
diff erentas = load i8 addrspace(5)*, i8 addrspace(5)** %loc.bc
+   ret i8 addrspace(5)* %
diff erentas
+
+  alwaysTaken:
+   ret i8 addrspace(5)* null
+ }



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[llvm-branch-commits] [llvm] d49f649 - [AArch64][GlobalISel] Refactor G_BRCOND selection

[Jessica Paquette via llvm-branch-commits]

Author: Jessica Paquette
Date: 2020-12-07T17:24:23-08:00
New Revision: d49f6491b6d1439b5a65ff6e965b65a66d943b63

URL: 
https://github.com/llvm/llvm-project/commit/d49f6491b6d1439b5a65ff6e965b65a66d943b63
DIFF: 
https://github.com/llvm/llvm-project/commit/d49f6491b6d1439b5a65ff6e965b65a66d943b63.diff

LOG: [AArch64][GlobalISel] Refactor G_BRCOND selection

`selectCompareBranch` was hard to understand.

Also, it was being needlessly pessimistic with the `ProduceNonFlagSettingCondBr`
case. It assumed that everything in `selectCompareBranch` would emit a TB(N)Z
or C(B)NZ. That's not true; the G_FCMP + G_BRCOND case would never emit those
instructions, and the G_ICMP + G_BRCOND case was capable of emitting an integer
compare + Bcc.

- Refactor `selectCompareBranch` into separate functions based off of what is
feeding the G_BRCOND's condition.

- Move G_BRCOND selection code from `select` to `selectCompareBranch`.

- Remove duplicated constraint code from the code originally in `select`;
  `emitTestBit` already handles that, so no need to constrain twice.

- Factor out the G_FCMP + G_BRCOND case into `selectCompareBranchFedByFCmp`.

- Split the G_ICMP + G_BRCOND case into an optimization function,
`tryOptCompareBranchFedByICmp` and a general selection function,
`selectCompareBranchFedByICmp`.

- Reduce the number of things passed to `tryOptAndIntoCompareBranch`.

- Improve documentation.

- Give some variables more descriptive names.

Other than improving the code generation for functions with
speculative_load_hardening by getting the logic correct, this is NFC.

Differential Revision: https://reviews.llvm.org/D92582

Added: 


Modified: 
llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
llvm/test/CodeGen/AArch64/GlobalISel/speculative-hardening-brcond.mir

Removed: 




diff  --git a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp 
b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
index 982de35aeef1..abb0cb7b4299 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
@@ -102,11 +102,19 @@ class AArch64InstructionSelector : public 
InstructionSelector {
   bool selectVaStartDarwin(MachineInstr &I, MachineFunction &MF,
MachineRegisterInfo &MRI) const;
 
-  bool tryOptAndIntoCompareBranch(MachineInstr *LHS,
-  int64_t CmpConstant,
-  const CmpInst::Predicate &Pred,
+  ///@{
+  /// Helper functions for selectCompareBranch.
+  bool selectCompareBranchFedByFCmp(MachineInstr &I, MachineInstr &FCmp,
+MachineIRBuilder &MIB) const;
+  bool selectCompareBranchFedByICmp(MachineInstr &I, MachineInstr &ICmp,
+MachineIRBuilder &MIB) const;
+  bool tryOptCompareBranchFedByICmp(MachineInstr &I, MachineInstr &ICmp,
+MachineIRBuilder &MIB) const;
+  bool tryOptAndIntoCompareBranch(MachineInstr &AndInst, bool Invert,
   MachineBasicBlock *DstMBB,
   MachineIRBuilder &MIB) const;
+  ///@}
+
   bool selectCompareBranch(MachineInstr &I, MachineFunction &MF,
MachineRegisterInfo &MRI) const;
 
@@ -1369,8 +1377,9 @@ MachineInstr *AArch64InstructionSelector::emitTestBit(
 }
 
 bool AArch64InstructionSelector::tryOptAndIntoCompareBranch(
-MachineInstr *AndInst, int64_t CmpConstant, const CmpInst::Predicate &Pred,
-MachineBasicBlock *DstMBB, MachineIRBuilder &MIB) const {
+MachineInstr &AndInst, bool Invert, MachineBasicBlock *DstMBB,
+MachineIRBuilder &MIB) const {
+  assert(AndInst.getOpcode() == TargetOpcode::G_AND && "Expected G_AND only?");
   // Given something like this:
   //
   //  %x = ...Something...
@@ -1388,31 +1397,17 @@ bool 
AArch64InstructionSelector::tryOptAndIntoCompareBranch(
   //
   // TBNZ %x %bb.3
   //
-  if (!AndInst || AndInst->getOpcode() != TargetOpcode::G_AND)
-return false;
-
-  // Need to be comparing against 0 to fold.
-  if (CmpConstant != 0)
-return false;
-
-  MachineRegisterInfo &MRI = *MIB.getMRI();
-
-  // Only support EQ and NE. If we have LT, then it *is* possible to fold, but
-  // we don't want to do this. When we have an AND and LT, we need a TST/ANDS,
-  // so folding would be redundant.
-  assert(ICmpInst::isEquality(Pred) && "Expected only eq/ne?");
 
   // Check if the AND has a constant on its RHS which we can use as a mask.
   // If it's a power of 2, then it's the same as checking a specific bit.
   // (e.g, ANDing with 8 == ANDing with 000...100 == testing if bit 3 is set)
-  auto MaybeBit =
-  getConstantVRegValWithLookThrough(AndInst->getOperand(2).getReg(), MRI);
+  auto MaybeBit = getConstantVRegValWithLookThrough(
+  AndInst.getOperand(2).getReg(), *

[llvm-branch-commits] [llvm] 689b8e9 - [test] Fix LoopFusion tests under NewPM

[Arthur Eubanks via llvm-branch-commits]

Author: Arthur Eubanks
Date: 2020-12-07T17:37:42-08:00
New Revision: 689b8e91f256b62519042c9a118d4b0ec1553b18

URL: 
https://github.com/llvm/llvm-project/commit/689b8e91f256b62519042c9a118d4b0ec1553b18
DIFF: 
https://github.com/llvm/llvm-project/commit/689b8e91f256b62519042c9a118d4b0ec1553b18.diff

LOG: [test] Fix LoopFusion tests under NewPM

The legacy pass depended on -loop-simplify running. The NPM does not
allow for a non-analysis pass to depend on another non-analysis pass.

Added: 


Modified: 
llvm/test/Transforms/LoopFusion/cannot_fuse.ll
llvm/test/Transforms/LoopFusion/simple.ll

Removed: 




diff  --git a/llvm/test/Transforms/LoopFusion/cannot_fuse.ll 
b/llvm/test/Transforms/LoopFusion/cannot_fuse.ll
index db099c990cd3..030e79c3492b 100644
--- a/llvm/test/Transforms/LoopFusion/cannot_fuse.ll
+++ b/llvm/test/Transforms/LoopFusion/cannot_fuse.ll
@@ -1,4 +1,4 @@
-; RUN: opt -S -loop-fusion -debug-only=loop-fusion -disable-output < %s 2>&1 | 
FileCheck %s
+; RUN: opt -S -loop-simplify -loop-fusion -debug-only=loop-fusion 
-disable-output < %s 2>&1 | FileCheck %s
 ; REQUIRES: asserts
 
 @B = common global [1024 x i32] zeroinitializer, align 16

diff  --git a/llvm/test/Transforms/LoopFusion/simple.ll 
b/llvm/test/Transforms/LoopFusion/simple.ll
index bb4cf17d8469..f3ccb0f919e3 100644
--- a/llvm/test/Transforms/LoopFusion/simple.ll
+++ b/llvm/test/Transforms/LoopFusion/simple.ll
@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -S -loop-fusion < %s | FileCheck %s
+; RUN: opt -S -loop-simplify -loop-fusion < %s | FileCheck %s
 
 @B = common global [1024 x i32] zeroinitializer, align 16
 



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[llvm-branch-commits] [clang] 29295e2 - [test] Rewrite split-debug.c

[Fangrui Song via llvm-branch-commits]

Author: Fangrui Song
Date: 2020-12-07T18:40:31-08:00
New Revision: 29295e21651f7071f1961a126d1c25a5526cec5a

URL: 
https://github.com/llvm/llvm-project/commit/29295e21651f7071f1961a126d1c25a5526cec5a
DIFF: 
https://github.com/llvm/llvm-project/commit/29295e21651f7071f1961a126d1c25a5526cec5a.diff

LOG: [test] Rewrite split-debug.c

Use generic ELF target triples.
Add missing coverage: -gsplit-dwarf=split -g -fsplit-dwarf-inlining
Reorganize and add comments.
Test -gno-pubnames

Added: 


Modified: 
clang/test/Driver/debug-options.c
clang/test/Driver/fuchsia.c
clang/test/Driver/split-debug.c

Removed: 




diff  --git a/clang/test/Driver/debug-options.c 
b/clang/test/Driver/debug-options.c
index cf05fa935a8e..f4a6c72f2f82 100644
--- a/clang/test/Driver/debug-options.c
+++ b/clang/test/Driver/debug-options.c
@@ -196,8 +196,7 @@
 // RUN: %clang -### -c -gpubnames -gno-gnu-pubnames %s 2>&1 | FileCheck 
-check-prefix=NOPUB %s
 // RUN: %clang -### -c -gpubnames -gno-pubnames %s 2>&1 | FileCheck 
-check-prefix=NOPUB %s
 //
-// RUN: %clang -### -c -gsplit-dwarf %s 2>&1 | FileCheck -check-prefix=GPUB %s
-// RUN: %clang -### -c -gsplit-dwarf -gno-pubnames %s 2>&1 | FileCheck 
-check-prefix=NOPUB %s
+// RUN: %clang -### -c -gsplit-dwarf -g -gno-pubnames %s 2>&1 | FileCheck 
-check-prefix=NOPUB %s
 //
 // RUN: %clang -### -c -fdebug-ranges-base-address %s 2>&1 | FileCheck 
-check-prefix=RNGBSE %s
 // RUN: %clang -### -c %s 2>&1 | FileCheck -check-prefix=NORNGBSE %s

diff  --git a/clang/test/Driver/fuchsia.c b/clang/test/Driver/fuchsia.c
index acc2d3ad75b0..5d3b4c8d9fe3 100644
--- a/clang/test/Driver/fuchsia.c
+++ b/clang/test/Driver/fuchsia.c
@@ -239,7 +239,7 @@
 // CHECK-THINLTO: "-plugin-opt=jobs=8"
 
 // RUN: %clang %s -### --target=x86_64-fuchsia \
-// RUN: -gsplit-dwarf -c %s 2>&1 \
+// RUN: -gsplit-dwarf -g -c %s 2>&1 \
 // RUN: | FileCheck %s -check-prefix=CHECK-SPLIT-DWARF
 // CHECK-SPLIT-DWARF: "-split-dwarf-output" "fuchsia.dwo"
 

diff  --git a/clang/test/Driver/split-debug.c b/clang/test/Driver/split-debug.c
index b6ebbaa2036e..4b644c8d60ae 100644
--- a/clang/test/Driver/split-debug.c
+++ b/clang/test/Driver/split-debug.c
@@ -1,127 +1,82 @@
-// Check that we split debug output properly
-//
-// RUN: %clang -target x86_64-unknown-linux-gnu -gsplit-dwarf -c -### %s 2> %t
-// RUN: FileCheck -check-prefix=CHECK-ACTIONS < %t %s
-//
-// CHECK-ACTIONS: "-split-dwarf-file" "split-debug.dwo" "-split-dwarf-output" 
"split-debug.dwo"
-
-// RUN: %clang -target x86_64-unknown-linux-gnu -gsplit-dwarf -c -### %s 2> %t
-// RUN: FileCheck -check-prefix=CHECK-ACTIONS < %t %s
-// RUN: %clang -target x86_64-unknown-linux-gnu -gsplit-dwarf=split -c -### %s 
2> %t
-// RUN: FileCheck -check-prefix=CHECK-ACTIONS < %t %s
-
-// RUN: %clang -target wasm32-unknown-unknown -gsplit-dwarf -c -### %s 2> %t
-// RUN: FileCheck -check-prefix=CHECK-ACTIONS < %t %s
-// RUN: %clang -target wasm32-unknown-unknown -gsplit-dwarf=split -c -### %s 
2> %t
-// RUN: FileCheck -check-prefix=CHECK-ACTIONS < %t %s
-
-// RUN: %clang -target x86_64-unknown-linux-gnu -gsplit-dwarf=single -c -### 
%s 2> %t
-// RUN: FileCheck -check-prefix=CHECK-ACTIONS-SINGLE-SPLIT < %t %s
-//
-// CHECK-ACTIONS-SINGLE-SPLIT: "-split-dwarf-file" "split-debug.o"
-// CHECK-ACTIONS-SINGLE-SPLIT-NOT: "-split-dwarf-output"
-
-// RUN: %clang -target x86_64-unknown-linux-gnu -gsplit-dwarf=single -c -### 
-o %tfoo.o %s 2> %t
-// RUN: FileCheck -check-prefix=CHECK-SINGLE-SPLIT-FILENAME < %t %s
-//
-// CHECK-SINGLE-SPLIT-FILENAME: "-split-dwarf-file" "{{.*}}foo.o"
-// CHECK-SINGLE-SPLIT-FILENAME-NOT: "-split-dwarf-output"
-
-// RUN: %clang -target x86_64-macosx -gsplit-dwarf -c -### %s 2> %t
-// RUN: FileCheck -check-prefix=CHECK-NO-ACTIONS < %t %s
-//
-// CHECK-NO-ACTIONS-NOT: -split-dwarf
-
-
-// RUN: %clang -target x86_64-unknown-linux-gnu -gsplit-dwarf -o Bad.x -### %s 
2> %t
-// RUN: FileCheck -check-prefix=CHECK-BAD < %t %s
-//
-// CHECK-BAD-NOT: "Bad.dwo"
-
-// RUN: %clang -target x86_64-unknown-linux-gnu -gsplit-dwarf -c -### %s 2> %t
-// RUN: FileCheck -check-prefix=CHECK-OPTION < %t %s
-//
-// RUN: %clang -target x86_64-pc-freebsd12 -gsplit-dwarf -c -### %s 2> %t
-// RUN: FileCheck -check-prefix=CHECK-OPTION < %t %s
-//
-// RUN: %clang -target amdgcn-amd-amdhsa -gsplit-dwarf -c -### %s 2> %t
-// RUN: FileCheck -check-prefix=CHECK-OPTION < %t %s
-//
-// CHECK-OPTION: "-split-dwarf-file" "split-debug.dwo" "-split-dwarf-output" 
"split-debug.dwo"
-
-// RUN: %clang -target x86_64-unknown-linux-gnu -gsplit-dwarf -S -### %s 2> %t
-// RUN: FileCheck -check-prefix=CHECK-ASM < %t %s
-//
-// CHECK-ASM-NOT: objcopy
-
-// RUN: %clang -target x86_64-unknown-linux-gnu -no-integrated-as 
-gsplit-dwarf -c -### %s 2> %t
-// RUN: FileCheck -check-prefix=CHECK-IAS < %t %s
-//
-// CHECK-IAS: objcopy
-
-// RUN: %clang -target x86_64-unknown-linux-gnu -gsplit-dwarf -gmlt 
-fno-split-dwarf

[llvm-branch-commits] [clang] 590e146 - Fix assertion failure due to incorrect dependence bits on a DeclRefExpr

[Richard Smith via llvm-branch-commits]

Author: Richard Smith
Date: 2020-12-07T18:48:38-08:00
New Revision: 590e14653252faa97c2a32ba38aeef05ec681f9b

URL: 
https://github.com/llvm/llvm-project/commit/590e14653252faa97c2a32ba38aeef05ec681f9b
DIFF: 
https://github.com/llvm/llvm-project/commit/590e14653252faa97c2a32ba38aeef05ec681f9b.diff

LOG: Fix assertion failure due to incorrect dependence bits on a DeclRefExpr
that can only be set correctly after instantiating the initializer for a
variable.

Added: 


Modified: 
clang/include/clang/AST/Expr.h
clang/lib/AST/Expr.cpp
clang/lib/Sema/SemaExpr.cpp
clang/test/SemaCXX/recovery-expr-type.cpp

Removed: 




diff  --git a/clang/include/clang/AST/Expr.h b/clang/include/clang/AST/Expr.h
index 3ea2817f1926..c8d87ec48a3f 100644
--- a/clang/include/clang/AST/Expr.h
+++ b/clang/include/clang/AST/Expr.h
@@ -1284,7 +1284,7 @@ class DeclRefExpr final
 
   ValueDecl *getDecl() { return D; }
   const ValueDecl *getDecl() const { return D; }
-  void setDecl(ValueDecl *NewD) { D = NewD; }
+  void setDecl(ValueDecl *NewD);
 
   DeclarationNameInfo getNameInfo() const {
 return DeclarationNameInfo(getDecl()->getDeclName(), getLocation(), DNLoc);
@@ -3167,7 +3167,7 @@ class MemberExpr final
   /// The returned declaration will be a FieldDecl or (in C++) a VarDecl (for
   /// static data members), a CXXMethodDecl, or an EnumConstantDecl.
   ValueDecl *getMemberDecl() const { return MemberDecl; }
-  void setMemberDecl(ValueDecl *D) { MemberDecl = D; }
+  void setMemberDecl(ValueDecl *D);
 
   /// Retrieves the declaration found by lookup.
   DeclAccessPair getFoundDecl() const {

diff  --git a/clang/lib/AST/Expr.cpp b/clang/lib/AST/Expr.cpp
index f55ee20f2476..1bd032a04a51 100644
--- a/clang/lib/AST/Expr.cpp
+++ b/clang/lib/AST/Expr.cpp
@@ -486,6 +486,11 @@ DeclRefExpr *DeclRefExpr::CreateEmpty(const ASTContext 
&Context,
   return new (Mem) DeclRefExpr(EmptyShell());
 }
 
+void DeclRefExpr::setDecl(ValueDecl *NewD) {
+  D = NewD;
+  setDependence(computeDependence(this, NewD->getASTContext()));
+}
+
 SourceLocation DeclRefExpr::getBeginLoc() const {
   if (hasQualifier())
 return getQualifierLoc().getBeginLoc();
@@ -1572,6 +1577,11 @@ MemberExpr *MemberExpr::CreateEmpty(const ASTContext 
&Context,
   return new (Mem) MemberExpr(EmptyShell());
 }
 
+void MemberExpr::setMemberDecl(ValueDecl *D) {
+  MemberDecl = D;
+  setDependence(computeDependence(this));
+}
+
 SourceLocation MemberExpr::getBeginLoc() const {
   if (isImplicitAccess()) {
 if (hasQualifier())

diff  --git a/clang/lib/Sema/SemaExpr.cpp b/clang/lib/Sema/SemaExpr.cpp
index 738fe87d37b4..859960d13007 100644
--- a/clang/lib/Sema/SemaExpr.cpp
+++ b/clang/lib/Sema/SemaExpr.cpp
@@ -18152,6 +18152,13 @@ static void DoMarkVarDeclReferenced(Sema &SemaRef, 
SourceLocation Loc,
 SemaRef.runWithSufficientStackSpace(PointOfInstantiation, [&] {
   SemaRef.InstantiateVariableDefinition(PointOfInstantiation, Var);
 });
+
+// Re-set the member to trigger a recomputation of the dependence bits
+// for the expression.
+if (auto *DRE = dyn_cast_or_null(E))
+  DRE->setDecl(DRE->getDecl());
+else if (auto *ME = dyn_cast_or_null(E))
+  ME->setMemberDecl(ME->getMemberDecl());
   } else if (FirstInstantiation ||
  isa(Var)) {
 // FIXME: For a specialization of a variable template, we don't
@@ -18286,6 +18293,9 @@ static void MarkExprReferenced(Sema &SemaRef, 
SourceLocation Loc,
 }
 
 /// Perform reference-marking and odr-use handling for a DeclRefExpr.
+///
+/// Note, this may change the dependence of the DeclRefExpr, and so needs to be
+/// handled with care if the DeclRefExpr is not newly-created.
 void Sema::MarkDeclRefReferenced(DeclRefExpr *E, const Expr *Base) {
   // TODO: update this with DR# once a defect report is filed.
   // C++11 defect. The address of a pure member should not be an ODR use, even
@@ -18412,6 +18422,10 @@ class EvaluatedExprMarker : public 
UsedDeclVisitor {
 if (VD->hasLocalStorage())
   return;
 }
+
+// FIXME: This can trigger the instantiation of the initializer of a
+// variable, which can cause the expression to become value-dependent
+// or error-dependent. Do we need to propagate the new dependence bits?
 S.MarkDeclRefReferenced(E);
   }
 

diff  --git a/clang/test/SemaCXX/recovery-expr-type.cpp 
b/clang/test/SemaCXX/recovery-expr-type.cpp
index f4691b47ab6d..ed18b7f262cd 100644
--- a/clang/test/SemaCXX/recovery-expr-type.cpp
+++ b/clang/test/SemaCXX/recovery-expr-type.cpp
@@ -109,3 +109,10 @@ auto f(); // expected-note {{candidate function not 
viable}}
 // verify no crash on evaluating the size of undeduced auto type.
 static_assert(sizeof(f(1)), ""); // expected-error {{no matching function for 
call to 'f'}}
 }
+
+namespace test10 {
+// Ensure we don't assert here.
+int f(); // expected-note

[llvm-branch-commits] [llvm] 49599cb - [PowerPC] Correct the bit-width definition for some imm operand in td.

[via llvm-branch-commits]

Author: Esme-Yi
Date: 2020-12-08T03:20:12Z
New Revision: 49599cb1a20cc4f4d6d2f71965f2069ae8d4f96a

URL: 
https://github.com/llvm/llvm-project/commit/49599cb1a20cc4f4d6d2f71965f2069ae8d4f96a
DIFF: 
https://github.com/llvm/llvm-project/commit/49599cb1a20cc4f4d6d2f71965f2069ae8d4f96a.diff

LOG: [PowerPC] Correct the bit-width definition for some imm operand in td.

Summary: The imm operands of some instructions are not defined accurately in td.
This is a small patch to correct these definitions.

Reviewed By: steven.zhang

Differential Revision: https://reviews.llvm.org/D91603

Added: 


Modified: 
llvm/lib/Target/PowerPC/PPCInstr64Bit.td
llvm/lib/Target/PowerPC/PPCInstrInfo.td
llvm/test/MC/PowerPC/ppc64-errors.s

Removed: 




diff  --git a/llvm/lib/Target/PowerPC/PPCInstr64Bit.td 
b/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
index 931109e2cbc4..82b868ec2b10 100644
--- a/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
+++ b/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
@@ -846,7 +846,7 @@ let Interpretation64Bit = 1, isCodeGenOnly = 1 in {
   def SETB8 : XForm_44<31, 128, (outs g8rc:$RT), (ins crrc:$BFA),
"setb $RT, $BFA", IIC_IntGeneral>, isPPC64;
 }
-def DARN : XForm_45<31, 755, (outs g8rc:$RT), (ins i32imm:$L),
+def DARN : XForm_45<31, 755, (outs g8rc:$RT), (ins u2imm:$L),
  "darn $RT, $L", IIC_LdStLD>, isPPC64;
 def ADDPCIS : DXForm<19, 2, (outs g8rc:$RT), (ins i32imm:$D),
  "addpcis $RT, $D", IIC_BrB, []>, isPPC64;

diff  --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.td 
b/llvm/lib/Target/PowerPC/PPCInstrInfo.td
index c388ae75950f..849b96f507bd 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.td
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.td
@@ -1928,7 +1928,7 @@ def DCBZL  : DCB_Form<1014, 1, (outs), (ins memrr:$dst), 
"dcbzl $dst",
   IIC_LdStDCBF, [(int_ppc_dcbzl xoaddr:$dst)]>,
   PPC970_DGroup_Single;
 
-def DCBF   : DCB_Form_hint<86, (outs), (ins u5imm:$TH, memrr:$dst),
+def DCBF   : DCB_Form_hint<86, (outs), (ins u3imm:$TH, memrr:$dst),
   "dcbf $dst, $TH", IIC_LdStDCBF, []>,
   PPC970_DGroup_Single;
 
@@ -2463,7 +2463,7 @@ let mayStore = 1, mayLoad = 0, hasSideEffects = 0 in
 def STMW : DForm_1<47, (outs), (ins gprc:$rS, memri:$dst),
"stmw $rS, $dst", IIC_LdStLMW, []>;
 
-def SYNC : XForm_24_sync<31, 598, (outs), (ins i32imm:$L),
+def SYNC : XForm_24_sync<31, 598, (outs), (ins u2imm:$L),
 "sync $L", IIC_LdStSync, []>;
 
 let isCodeGenOnly = 1 in {
@@ -4309,7 +4309,7 @@ def ISYNC : XLForm_2_ext<19, 150, 0, 0, 0, (outs), (ins),
 def ICBI : XForm_1a<31, 982, (outs), (ins memrr:$src),
 "icbi $src", IIC_LdStICBI, []>;
 
-def WAIT : XForm_24_sync<31, 30, (outs), (ins i32imm:$L),
+def WAIT : XForm_24_sync<31, 30, (outs), (ins u2imm:$L),
  "wait $L", IIC_LdStLoad, []>;
 
 def MBAR : XForm_mbar<31, 854, (outs), (ins u5imm:$MO),
@@ -4327,7 +4327,7 @@ def MTSRIN: XForm_srin<31, 242, (outs), (ins gprc:$RS, 
gprc:$RB),
 def MFSRIN: XForm_srin<31, 659, (outs gprc:$RS), (ins gprc:$RB),
 "mfsrin $RS, $RB", IIC_SprMFSR>;
 
-def MTMSR: XForm_mtmsr<31, 146, (outs), (ins gprc:$RS, i32imm:$L),
+def MTMSR: XForm_mtmsr<31, 146, (outs), (ins gprc:$RS, u1imm:$L),
 "mtmsr $RS, $L", IIC_SprMTMSR>;
 
 def WRTEE: XForm_mtmsr<31, 131, (outs), (ins gprc:$RS),
@@ -4356,7 +4356,7 @@ def : InstAlias<"iccci", (ICCCI R0, R0)>, 
Requires<[IsPPC4xx]>;
 def MFMSR : XForm_rs<31, 83, (outs gprc:$RT), (ins),
   "mfmsr $RT", IIC_SprMFMSR, []>;
 
-def MTMSRD : XForm_mtmsr<31, 178, (outs), (ins gprc:$RS, i32imm:$L),
+def MTMSRD : XForm_mtmsr<31, 178, (outs), (ins gprc:$RS, u1imm:$L),
 "mtmsrd $RS, $L", IIC_SprMTMSRD>;
 
 def MCRFS : XLForm_3<63, 64, (outs crrc:$BF), (ins crrc:$BFA),
@@ -4376,11 +4376,11 @@ def : InstAlias<"mtfsfi. $BF, $U", (MTFSFI_rec 
crrc:$BF, i32imm:$U, 0)>;
 let Predicates = [HasFPU] in {
 let Defs = [RM] in {
 def MTFSF : XFLForm_1<63, 711, (outs),
-  (ins i32imm:$FLM, f8rc:$FRB, i32imm:$L, i32imm:$W),
+  (ins i32imm:$FLM, f8rc:$FRB, u1imm:$L, i32imm:$W),
   "mtfsf $FLM, $FRB, $L, $W", IIC_IntMFFS, []>;
 let Defs = [CR1] in
 def MTFSF_rec : XFLForm_1<63, 711, (outs),
-   (ins i32imm:$FLM, f8rc:$FRB, i32imm:$L, i32imm:$W),
+   (ins i32imm:$FLM, f8rc:$FRB, u1imm:$L, i32imm:$W),
"mtfsf. $FLM, $FRB, $L, $W", IIC_IntMFFS, []>, 
isRecordForm;
 }
 

diff  --git a/llvm/test/MC/PowerPC/ppc64-errors.s 
b/llvm/test/MC/PowerPC/ppc64-errors.s
index ef5d9e8e1e12..6da7406e2828 100644
--- a/llvm/test/MC/PowerPC/ppc64-errors.s
+++ b/llvm/test/MC/PowerPC/ppc64-errors.s
@@ -24,6 +24,44 @@
 # CHECK-NEXT: subf 3, 4, symbol@tls
  

[llvm-branch-commits] [llvm] 44bd8ea - [DAGCombine][PowerPC] Simplify nabs by using legal `smin` operation

[Kai Luo via llvm-branch-commits]

Author: Kai Luo
Date: 2020-12-08T03:24:07Z
New Revision: 44bd8ea167f2138de9317196a7b199840e29fb59

URL: 
https://github.com/llvm/llvm-project/commit/44bd8ea167f2138de9317196a7b199840e29fb59
DIFF: 
https://github.com/llvm/llvm-project/commit/44bd8ea167f2138de9317196a7b199840e29fb59.diff

LOG: [DAGCombine][PowerPC] Simplify nabs by using legal `smin` operation

Convert `0 - abs(x)` to `smin (x, -x)` if `smin` is a legal operation.

Verification: https://alive2.llvm.org/ce/z/vpquFR

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D92637

Added: 


Modified: 
llvm/include/llvm/CodeGen/TargetLowering.h
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
llvm/test/CodeGen/PowerPC/neg-abs.ll

Removed: 




diff  --git a/llvm/include/llvm/CodeGen/TargetLowering.h 
b/llvm/include/llvm/CodeGen/TargetLowering.h
index 4aeefd980d7a..3dce96d1c064 100644
--- a/llvm/include/llvm/CodeGen/TargetLowering.h
+++ b/llvm/include/llvm/CodeGen/TargetLowering.h
@@ -4393,8 +4393,10 @@ class TargetLowering : public TargetLoweringBase {
   /// (ABS x) -> (XOR (ADD x, (SRA x, type_size)), (SRA x, type_size))
   /// \param N Node to expand
   /// \param Result output after conversion
+  /// \param IsNegative indicate negated abs
   /// \returns True, if the expansion was successful, false otherwise
-  bool expandABS(SDNode *N, SDValue &Result, SelectionDAG &DAG) const;
+  bool expandABS(SDNode *N, SDValue &Result, SelectionDAG &DAG,
+ bool IsNegative = false) const;
 
   /// Turn load of vector type into a load of the individual elements.
   /// \param LD load to expand

diff  --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp 
b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 51de545d1db9..6d5a54198c0b 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -3193,18 +3193,12 @@ SDValue DAGCombiner::visitSUB(SDNode *N) {
   return N1;
 }
 
-// Convert 0 - abs(x) -> Y = sra (X, size(X)-1); sub (Y, xor (X, Y)).
+// Convert 0 - abs(x).
+SDValue Result;
 if (N1->getOpcode() == ISD::ABS &&
-!TLI.isOperationLegalOrCustom(ISD::ABS, VT)) {
-  SDValue X = N1->getOperand(0);
-  SDValue Shift =
-  DAG.getNode(ISD::SRA, DL, VT, X,
-  DAG.getConstant(BitWidth - 1, DL, getShiftAmountTy(VT)));
-  SDValue Xor = DAG.getNode(ISD::XOR, DL, VT, X, Shift);
-  AddToWorklist(Shift.getNode());
-  AddToWorklist(Xor.getNode());
-  return DAG.getNode(ISD::SUB, DL, VT, Shift, Xor);
-}
+!TLI.isOperationLegalOrCustom(ISD::ABS, VT) &&
+TLI.expandABS(N1.getNode(), Result, DAG, true))
+  return Result;
   }
 
   // Canonicalize (sub -1, x) -> ~x, i.e. (xor x, -1)

diff  --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp 
b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index d27ada4c4b38..3897dce20a19 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -6816,14 +6816,15 @@ bool TargetLowering::expandCTTZ(SDNode *Node, SDValue 
&Result,
 }
 
 bool TargetLowering::expandABS(SDNode *N, SDValue &Result,
-   SelectionDAG &DAG) const {
+   SelectionDAG &DAG, bool IsNegative) const {
   SDLoc dl(N);
   EVT VT = N->getValueType(0);
   EVT ShVT = getShiftAmountTy(VT, DAG.getDataLayout());
   SDValue Op = N->getOperand(0);
 
   // abs(x) -> smax(x,sub(0,x))
-  if (isOperationLegal(ISD::SUB, VT) && isOperationLegal(ISD::SMAX, VT)) {
+  if (!IsNegative && isOperationLegal(ISD::SUB, VT) &&
+  isOperationLegal(ISD::SMAX, VT)) {
 SDValue Zero = DAG.getConstant(0, dl, VT);
 Result = DAG.getNode(ISD::SMAX, dl, VT, Op,
  DAG.getNode(ISD::SUB, dl, VT, Zero, Op));
@@ -6831,24 +6832,42 @@ bool TargetLowering::expandABS(SDNode *N, SDValue 
&Result,
   }
 
   // abs(x) -> umin(x,sub(0,x))
-  if (isOperationLegal(ISD::SUB, VT) && isOperationLegal(ISD::UMIN, VT)) {
+  if (!IsNegative && isOperationLegal(ISD::SUB, VT) &&
+  isOperationLegal(ISD::UMIN, VT)) {
 SDValue Zero = DAG.getConstant(0, dl, VT);
 Result = DAG.getNode(ISD::UMIN, dl, VT, Op,
  DAG.getNode(ISD::SUB, dl, VT, Zero, Op));
 return true;
   }
 
+  // 0 - abs(x) -> smin(x, sub(0,x))
+  if (IsNegative && isOperationLegal(ISD::SUB, VT) &&
+  isOperationLegal(ISD::SMIN, VT)) {
+SDValue Zero = DAG.getConstant(0, dl, VT);
+Result = DAG.getNode(ISD::SMIN, dl, VT, Op,
+ DAG.getNode(ISD::SUB, dl, VT, Zero, Op));
+return true;
+  }
+
   // Only expand vector types if we have the appropriate vector operations.
-  if (VT.isVector() && (!isOperationLegalOrCustom(ISD::SRA, VT) ||
-!isOperationLegalOrCustom(ISD::ADD, VT) ||
-