[llvm-branch-commits] [llvm] 1dea8ed - [BasicAA] Remove unnecessary known size requirement

2020-11-28 Thread Nikita Popov via llvm-branch-commits 

Author: Nikita Popov
Date: 2020-11-28T10:17:12+01:00
New Revision: 1dea8ed8b7dd2ff5ea89dd6dcaf0b682a81e9815

URL: 
https://github.com/llvm/llvm-project/commit/1dea8ed8b7dd2ff5ea89dd6dcaf0b682a81e9815
DIFF: 
https://github.com/llvm/llvm-project/commit/1dea8ed8b7dd2ff5ea89dd6dcaf0b682a81e9815.diff

LOG: [BasicAA] Remove unnecessary known size requirement

The size requirement on V2 was present because it was not clear
whether an unknown size would allow an access before the start of
V2, which could then overlap. This is clarified since D91649: In
this part of BasicAA, all accesses can occur only after the base
pointer, even if they have unknown size.

This makes the positive and negative offset cases symmetric.

Differential Revision: https://reviews.llvm.org/D91482

Added: 


Modified: 
llvm/lib/Analysis/BasicAliasAnalysis.cpp
llvm/test/Analysis/BasicAA/negoffset.ll

Removed: 




diff  --git a/llvm/lib/Analysis/BasicAliasAnalysis.cpp 
b/llvm/lib/Analysis/BasicAliasAnalysis.cpp
index 5e6afd908ba3..2e4ee1c429dd 100644
--- a/llvm/lib/Analysis/BasicAliasAnalysis.cpp
+++ b/llvm/lib/Analysis/BasicAliasAnalysis.cpp
@@ -1336,9 +1336,7 @@ AliasResult BasicAAResult::aliasGEP(
   // >|
   // |-->V1Size   |---> V2Size
   // GEP1 V2
-  // We need to know that V2Size is not unknown, otherwise we might have
-  // stripped a gep with negative index ('gep , -1, ...).
-  if (V1Size.hasValue() && V2Size.hasValue()) {
+  if (V1Size.hasValue()) {
 if ((-DecompGEP1.Offset).ult(V1Size.getValue()))
   return PartialAlias;
 return NoAlias;

diff  --git a/llvm/test/Analysis/BasicAA/negoffset.ll 
b/llvm/test/Analysis/BasicAA/negoffset.ll
index ac1ddfdf5ac5..cc0d68a48a12 100644
--- a/llvm/test/Analysis/BasicAA/negoffset.ll
+++ b/llvm/test/Analysis/BasicAA/negoffset.ll
@@ -117,3 +117,13 @@ entry:
   %2 = load i32, i32* %1
   ret i32 %2
 }
+
+; CHECK-LABEL: Function: one_size_unknown:
+; CHECK: NoModRef:  Ptr: i8* %p.minus1 <->  call void 
@llvm.memset.p0i8.i32(i8* %p, i8 0, i32 %size, i1 false)
+define void @one_size_unknown(i8* %p, i32 %size) {
+  %p.minus1 = getelementptr inbounds i8, i8* %p, i32 -1
+  call void @llvm.memset.p0i8.i32(i8* %p, i8 0, i32 %size, i1 false)
+  ret void
+}
+
+declare void @llvm.memset.p0i8.i32(i8*, i8, i32, i1)



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[llvm-branch-commits] [mlir] acb69f3 - [mlir] Change ConvertOpToLLVMPattern::matchAndRewrite argument to concrete operand type.

2020-11-28 Thread Christian Sigg via llvm-branch-commits 

Author: Christian Sigg
Date: 2020-11-28T13:09:25+01:00
New Revision: acb69f3b7c83f411c08b77d75f2e812faf3cb83f

URL: 
https://github.com/llvm/llvm-project/commit/acb69f3b7c83f411c08b77d75f2e812faf3cb83f
DIFF: 
https://github.com/llvm/llvm-project/commit/acb69f3b7c83f411c08b77d75f2e812faf3cb83f.diff

LOG: [mlir] Change ConvertOpToLLVMPattern::matchAndRewrite argument to concrete 
operand type.

Reviewed By: herhut, ftynse

Differential Revision: https://reviews.llvm.org/D92111

Added: 


Modified: 
mlir/include/mlir/Conversion/StandardToLLVM/ConvertStandardToLLVM.h
mlir/lib/Conversion/GPUCommon/ConvertLaunchFuncToRuntimeCalls.cpp
mlir/lib/Conversion/SPIRVToLLVM/ConvertLaunchFuncToLLVMCalls.cpp
mlir/lib/Conversion/StandardToLLVM/StandardToLLVM.cpp
mlir/test/lib/Transforms/TestConvertCallOp.cpp

Removed: 




diff  --git 
a/mlir/include/mlir/Conversion/StandardToLLVM/ConvertStandardToLLVM.h 
b/mlir/include/mlir/Conversion/StandardToLLVM/ConvertStandardToLLVM.h
index 919a93ac84a2..70db4c1510bf 100644
--- a/mlir/include/mlir/Conversion/StandardToLLVM/ConvertStandardToLLVM.h
+++ b/mlir/include/mlir/Conversion/StandardToLLVM/ConvertStandardToLLVM.h
@@ -564,14 +564,47 @@ class ConvertToLLVMPattern : public ConversionPattern {
 
 /// Utility class for operation conversions targeting the LLVM dialect that
 /// match exactly one source operation.
-template 
+template 
 class ConvertOpToLLVMPattern : public ConvertToLLVMPattern {
 public:
   ConvertOpToLLVMPattern(LLVMTypeConverter &typeConverter,
  PatternBenefit benefit = 1)
-  : ConvertToLLVMPattern(OpTy::getOperationName(),
+  : ConvertToLLVMPattern(SourceOp::getOperationName(),
  &typeConverter.getContext(), typeConverter,
  benefit) {}
+
+  /// Wrappers around the RewritePattern methods that pass the derived op type.
+  void rewrite(Operation *op, ArrayRef operands,
+   ConversionPatternRewriter &rewriter) const final {
+rewrite(cast(op), operands, rewriter);
+  }
+  LogicalResult match(Operation *op) const final {
+return match(cast(op));
+  }
+  LogicalResult
+  matchAndRewrite(Operation *op, ArrayRef operands,
+  ConversionPatternRewriter &rewriter) const final {
+return matchAndRewrite(cast(op), operands, rewriter);
+  }
+
+  /// Rewrite and Match methods that operate on the SourceOp type. These must 
be
+  /// overridden by the derived pattern class.
+  virtual void rewrite(SourceOp op, ArrayRef operands,
+   ConversionPatternRewriter &rewriter) const {
+llvm_unreachable("must override rewrite or matchAndRewrite");
+  }
+  virtual LogicalResult match(SourceOp op) const {
+llvm_unreachable("must override match or matchAndRewrite");
+  }
+  virtual LogicalResult
+  matchAndRewrite(SourceOp op, ArrayRef operands,
+  ConversionPatternRewriter &rewriter) const {
+if (succeeded(match(op))) {
+  rewrite(op, operands, rewriter);
+  return success();
+}
+return failure();
+  }
 };
 
 namespace LLVM {
@@ -604,7 +637,7 @@ class OneToOneConvertToLLVMPattern : public 
ConvertOpToLLVMPattern {
   /// Converts the type of the result to an LLVM type, pass operands as is,
   /// preserve attributes.
   LogicalResult
-  matchAndRewrite(Operation *op, ArrayRef operands,
+  matchAndRewrite(SourceOp op, ArrayRef operands,
   ConversionPatternRewriter &rewriter) const override {
 return LLVM::detail::oneToOneRewrite(op, TargetOp::getOperationName(),
  operands, this->typeConverter,
@@ -621,7 +654,7 @@ class VectorConvertToLLVMPattern : public 
ConvertOpToLLVMPattern {
   using Super = VectorConvertToLLVMPattern;
 
   LogicalResult
-  matchAndRewrite(Operation *op, ArrayRef operands,
+  matchAndRewrite(SourceOp op, ArrayRef operands,
   ConversionPatternRewriter &rewriter) const override {
 static_assert(
 std::is_base_of, SourceOp>::value,

diff  --git a/mlir/lib/Conversion/GPUCommon/ConvertLaunchFuncToRuntimeCalls.cpp 
b/mlir/lib/Conversion/GPUCommon/ConvertLaunchFuncToRuntimeCalls.cpp
index d625db95e976..cb7644cb7202 100644
--- a/mlir/lib/Conversion/GPUCommon/ConvertLaunchFuncToRuntimeCalls.cpp
+++ b/mlir/lib/Conversion/GPUCommon/ConvertLaunchFuncToRuntimeCalls.cpp
@@ -163,7 +163,7 @@ class ConvertHostRegisterOpToGpuRuntimeCallPattern
 
 private:
   LogicalResult
-  matchAndRewrite(Operation *op, ArrayRef operands,
+  matchAndRewrite(gpu::HostRegisterOp hostRegisterOp, ArrayRef operands,
   ConversionPatternRewriter &rewriter) const override;
 };
 
@@ -205,7 +205,7 @@ class ConvertWaitOpToGpuRuntimeCallPattern
 
 private:
   LogicalResult
-  matchAndRewrite(Operation *op, ArrayRef operands,
+  matchAndRewrite(gpu::WaitOp waitOp, ArrayRef operands,
   ConversionPatt

[llvm-branch-commits] [mlir] e9e45b3 - [mlir] Fix bad rebase landed in acb69f3b7c83.

2020-11-28 Thread Christian Sigg via llvm-branch-commits 

Author: Christian Sigg
Date: 2020-11-28T13:57:01+01:00
New Revision: e9e45b3887ca343e90fe91fe77b98d47e66ca312

URL: 
https://github.com/llvm/llvm-project/commit/e9e45b3887ca343e90fe91fe77b98d47e66ca312
DIFF: 
https://github.com/llvm/llvm-project/commit/e9e45b3887ca343e90fe91fe77b98d47e66ca312.diff

LOG: [mlir] Fix bad rebase landed in acb69f3b7c83.

Differential Revision: https://reviews.llvm.org/D92265

Added: 


Modified: 
mlir/lib/Conversion/GPUCommon/ConvertLaunchFuncToRuntimeCalls.cpp

Removed: 




diff  --git a/mlir/lib/Conversion/GPUCommon/ConvertLaunchFuncToRuntimeCalls.cpp 
b/mlir/lib/Conversion/GPUCommon/ConvertLaunchFuncToRuntimeCalls.cpp
index cb7644cb7202..a8e282901f83 100644
--- a/mlir/lib/Conversion/GPUCommon/ConvertLaunchFuncToRuntimeCalls.cpp
+++ b/mlir/lib/Conversion/GPUCommon/ConvertLaunchFuncToRuntimeCalls.cpp
@@ -177,7 +177,7 @@ class ConvertAllocOpToGpuRuntimeCallPattern
 
 private:
   LogicalResult
-  matchAndRewrite(Operation *op, ArrayRef operands,
+  matchAndRewrite(gpu::AllocOp allocOp, ArrayRef operands,
   ConversionPatternRewriter &rewriter) const override;
 };
 
@@ -191,7 +191,7 @@ class ConvertDeallocOpToGpuRuntimeCallPattern
 
 private:
   LogicalResult
-  matchAndRewrite(Operation *op, ArrayRef operands,
+  matchAndRewrite(gpu::DeallocOp deallocOp, ArrayRef operands,
   ConversionPatternRewriter &rewriter) const override;
 };
 
@@ -343,18 +343,16 @@ LogicalResult 
ConvertHostRegisterOpToGpuRuntimeCallPattern::matchAndRewrite(
 }
 
 LogicalResult ConvertAllocOpToGpuRuntimeCallPattern::matchAndRewrite(
-Operation *op, ArrayRef operands,
+gpu::AllocOp allocOp, ArrayRef operands,
 ConversionPatternRewriter &rewriter) const {
-  auto allocOp = cast(op);
   MemRefType memRefType = allocOp.getType();
 
-  if (failed(areAllLLVMTypes(op, operands, rewriter)) ||
+  if (failed(areAllLLVMTypes(allocOp, operands, rewriter)) ||
   !isSupportedMemRefType(memRefType) ||
-  failed(
-  isAsyncWithOneDependency(rewriter, cast(op
+  failed(isAsyncWithOneDependency(rewriter, allocOp)))
 return failure();
 
-  auto loc = op->getLoc();
+  auto loc = allocOp.getLoc();
 
   // Get shape of the memref as values: static sizes are constant
   // values and dynamic sizes are passed to 'alloc' as operands.
@@ -367,7 +365,8 @@ LogicalResult 
ConvertAllocOpToGpuRuntimeCallPattern::matchAndRewrite(
   // Allocate the underlying buffer and store a pointer to it in the MemRef
   // descriptor.
   Type elementPtrType = this->getElementPtrType(memRefType);
-  auto adaptor = gpu::AllocOpAdaptor(operands, op->getAttrDictionary());
+  auto adaptor = gpu::AllocOpAdaptor(
+  operands, allocOp.getOperation()->getAttrDictionary());
   auto stream = adaptor.asyncDependencies().front();
   Value allocatedPtr =
   allocCallBuilder.create(loc, rewriter, {sizeBytes, stream}).getResult(0);
@@ -381,29 +380,29 @@ LogicalResult 
ConvertAllocOpToGpuRuntimeCallPattern::matchAndRewrite(
   auto memRefDescriptor = this->createMemRefDescriptor(
   loc, memRefType, allocatedPtr, alignedPtr, shape, strides, rewriter);
 
-  rewriter.replaceOp(op, {memRefDescriptor, stream});
+  rewriter.replaceOp(allocOp, {memRefDescriptor, stream});
 
   return success();
 }
 
 LogicalResult ConvertDeallocOpToGpuRuntimeCallPattern::matchAndRewrite(
-Operation *op, ArrayRef operands,
+gpu::DeallocOp deallocOp, ArrayRef operands,
 ConversionPatternRewriter &rewriter) const {
-  if (failed(areAllLLVMTypes(op, operands, rewriter)) ||
-  failed(
-  isAsyncWithOneDependency(rewriter, cast(op
+  if (failed(areAllLLVMTypes(deallocOp, operands, rewriter)) ||
+  failed(isAsyncWithOneDependency(rewriter, deallocOp)))
 return failure();
 
-  Location loc = op->getLoc();
+  Location loc = deallocOp.getLoc();
 
-  auto adaptor = gpu::DeallocOpAdaptor(operands, op->getAttrDictionary());
+  auto adaptor = gpu::DeallocOpAdaptor(
+  operands, deallocOp.getOperation()->getAttrDictionary());
   Value pointer =
   MemRefDescriptor(adaptor.memref()).allocatedPtr(rewriter, loc);
   auto casted = rewriter.create(loc, llvmPointerType, 
pointer);
   Value stream = adaptor.asyncDependencies().front();
   deallocCallBuilder.create(loc, rewriter, {casted, stream});
 
-  rewriter.replaceOp(op, {stream});
+  rewriter.replaceOp(deallocOp, {stream});
   return success();
 }
 



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[llvm-branch-commits] [clang-tools-extra] 4169c52 - [clangd] Add symbol origin for remote index

2020-11-28 Thread Kirill Bobyrev via llvm-branch-commits 

Author: Kirill Bobyrev
Date: 2020-11-28T15:38:11+01:00
New Revision: 4169c520f6d7029d87098997e9f256a0170aa8cf

URL: 
https://github.com/llvm/llvm-project/commit/4169c520f6d7029d87098997e9f256a0170aa8cf
DIFF: 
https://github.com/llvm/llvm-project/commit/4169c520f6d7029d87098997e9f256a0170aa8cf.diff

LOG: [clangd] Add symbol origin for remote index

Makes it easier to diagnose remote index issues with --debug-origins flag.

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D92202

Added: 


Modified: 
clang-tools-extra/clangd/index/SymbolOrigin.cpp
clang-tools-extra/clangd/index/SymbolOrigin.h
clang-tools-extra/clangd/index/remote/marshalling/Marshalling.cpp
clang-tools-extra/clangd/unittests/remote/MarshallingTests.cpp

Removed: 




diff  --git a/clang-tools-extra/clangd/index/SymbolOrigin.cpp 
b/clang-tools-extra/clangd/index/SymbolOrigin.cpp
index e98308a2dbdf..79e32137f7b8 100644
--- a/clang-tools-extra/clangd/index/SymbolOrigin.cpp
+++ b/clang-tools-extra/clangd/index/SymbolOrigin.cpp
@@ -14,7 +14,7 @@ namespace clangd {
 llvm::raw_ostream &operator<<(llvm::raw_ostream &OS, SymbolOrigin O) {
   if (O == SymbolOrigin::Unknown)
 return OS << "unknown";
-  constexpr static char Sigils[] = "ADSMI567";
+  constexpr static char Sigils[] = "ADSMIR67";
   for (unsigned I = 0; I < sizeof(Sigils); ++I)
 if (static_cast(O) & 1u << I)
   OS << Sigils[I];

diff  --git a/clang-tools-extra/clangd/index/SymbolOrigin.h 
b/clang-tools-extra/clangd/index/SymbolOrigin.h
index 8af113c75564..dd3a83230b0e 100644
--- a/clang-tools-extra/clangd/index/SymbolOrigin.h
+++ b/clang-tools-extra/clangd/index/SymbolOrigin.h
@@ -25,6 +25,7 @@ enum class SymbolOrigin : uint8_t {
   Static = 1 << 2, // From the static, externally-built index.
   Merge = 1 << 3,  // A non-trivial index merge was performed.
   Identifier = 1 << 4, // Raw identifiers in file.
+  Remote = 1 << 5, // Remote index.
   // Remaining bits reserved for index implementations.
 };
 

diff  --git a/clang-tools-extra/clangd/index/remote/marshalling/Marshalling.cpp 
b/clang-tools-extra/clangd/index/remote/marshalling/Marshalling.cpp
index 296f99cdfa38..a96a6ef1ea7a 100644
--- a/clang-tools-extra/clangd/index/remote/marshalling/Marshalling.cpp
+++ b/clang-tools-extra/clangd/index/remote/marshalling/Marshalling.cpp
@@ -161,7 +161,8 @@ llvm::Expected 
Marshaller::fromProtobuf(const Symbol &Message) {
 return Declaration.takeError();
   Result.CanonicalDeclaration = *Declaration;
   Result.References = Message.references();
-  Result.Origin = static_cast(Message.origin());
+  // Overwrite symbol origin: it's coming from remote index.
+  Result.Origin = clangd::SymbolOrigin::Remote;
   Result.Signature = Message.signature();
   Result.TemplateSpecializationArgs = Message.template_specialization_args();
   Result.CompletionSnippetSuffix = Message.completion_snippet_suffix();

diff  --git a/clang-tools-extra/clangd/unittests/remote/MarshallingTests.cpp 
b/clang-tools-extra/clangd/unittests/remote/MarshallingTests.cpp
index 6ef8da59861f..88627df0f624 100644
--- a/clang-tools-extra/clangd/unittests/remote/MarshallingTests.cpp
+++ b/clang-tools-extra/clangd/unittests/remote/MarshallingTests.cpp
@@ -16,6 +16,7 @@
 #include "index/Symbol.h"
 #include "index/SymbolID.h"
 #include "index/SymbolLocation.h"
+#include "index/SymbolOrigin.h"
 #include "index/remote/marshalling/Marshalling.h"
 #include "clang/Index/IndexSymbol.h"
 #include "llvm/ADT/SmallString.h"
@@ -154,6 +155,8 @@ TEST(RemoteMarshallingTest, SymbolSerialization) {
   ASSERT_TRUE(bool(Serialized));
   auto Deserialized = ProtobufMarshaller.fromProtobuf(*Serialized);
   ASSERT_TRUE(bool(Deserialized));
+  // Origin is overwritten when deserializing.
+  Sym.Origin = SymbolOrigin::Remote;
   EXPECT_EQ(toYAML(Sym), toYAML(*Deserialized));
   // Serialized paths are relative and have UNIX slashes.
   EXPECT_EQ(convert_to_slash(Serialized->definition().file_path(),
@@ -258,6 +261,7 @@ TEST(RemoteMarshallingTest, IncludeHeaderURIs) {
 Sym.IncludeHeaders.size());
   auto Deserialized = ProtobufMarshaller.fromProtobuf(*Serialized);
   ASSERT_TRUE(bool(Deserialized));
+  Sym.Origin = SymbolOrigin::Remote;
   EXPECT_EQ(toYAML(Sym), toYAML(*Deserialized));
 
   // This is an absolute path to a header: can not be transmitted over the 
wire.



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[llvm-branch-commits] [libcxx] 67c88e4 - [libc++] P1645 constexpr for

2020-11-28 Thread Mark de Wever via llvm-branch-commits 

Author: Mark de Wever
Date: 2020-11-28T17:02:54+01:00
New Revision: 67c88e47bdba2578150a9034a717d6ddcace4e13

URL: 
https://github.com/llvm/llvm-project/commit/67c88e47bdba2578150a9034a717d6ddcace4e13
DIFF: 
https://github.com/llvm/llvm-project/commit/67c88e47bdba2578150a9034a717d6ddcace4e13.diff

LOG: [libc++] P1645 constexpr for 

Implements P1645: constexpr for  algorithms

Reviewed By: ldionne, #libc

Differential Revision: https://reviews.llvm.org/D90569

Added: 


Modified: 
libcxx/docs/Cxx2aStatusPaperStatus.csv
libcxx/docs/FeatureTestMacroTable.rst
libcxx/include/numeric
libcxx/include/version

libcxx/test/std/language.support/support.limits/support.limits.general/numeric.version.pass.cpp

libcxx/test/std/language.support/support.limits/support.limits.general/version.version.pass.cpp
libcxx/test/std/numerics/numeric.ops/accumulate/accumulate.pass.cpp
libcxx/test/std/numerics/numeric.ops/accumulate/accumulate_op.pass.cpp

libcxx/test/std/numerics/numeric.ops/adjacent.difference/adjacent_difference.pass.cpp

libcxx/test/std/numerics/numeric.ops/adjacent.difference/adjacent_difference_op.pass.cpp
libcxx/test/std/numerics/numeric.ops/exclusive.scan/exclusive_scan.pass.cpp

libcxx/test/std/numerics/numeric.ops/exclusive.scan/exclusive_scan_init_op.pass.cpp
libcxx/test/std/numerics/numeric.ops/inclusive.scan/inclusive_scan.pass.cpp

libcxx/test/std/numerics/numeric.ops/inclusive.scan/inclusive_scan_op.pass.cpp

libcxx/test/std/numerics/numeric.ops/inclusive.scan/inclusive_scan_op_init.pass.cpp
libcxx/test/std/numerics/numeric.ops/inner.product/inner_product.pass.cpp

libcxx/test/std/numerics/numeric.ops/inner.product/inner_product_comp.pass.cpp
libcxx/test/std/numerics/numeric.ops/numeric.iota/iota.pass.cpp
libcxx/test/std/numerics/numeric.ops/partial.sum/partial_sum.pass.cpp
libcxx/test/std/numerics/numeric.ops/partial.sum/partial_sum_op.pass.cpp
libcxx/test/std/numerics/numeric.ops/reduce/reduce.pass.cpp
libcxx/test/std/numerics/numeric.ops/reduce/reduce_init.pass.cpp
libcxx/test/std/numerics/numeric.ops/reduce/reduce_init_op.pass.cpp

libcxx/test/std/numerics/numeric.ops/transform.exclusive.scan/transform_exclusive_scan_init_bop_uop.pass.cpp

libcxx/test/std/numerics/numeric.ops/transform.inclusive.scan/transform_inclusive_scan_bop_uop.pass.cpp

libcxx/test/std/numerics/numeric.ops/transform.inclusive.scan/transform_inclusive_scan_bop_uop_init.pass.cpp

libcxx/test/std/numerics/numeric.ops/transform.reduce/transform_reduce_iter_iter_init_bop_uop.pass.cpp

libcxx/test/std/numerics/numeric.ops/transform.reduce/transform_reduce_iter_iter_iter_init.pass.cpp

libcxx/test/std/numerics/numeric.ops/transform.reduce/transform_reduce_iter_iter_iter_init_op_op.pass.cpp
libcxx/utils/generate_feature_test_macro_components.py

Removed: 




diff  --git a/libcxx/docs/Cxx2aStatusPaperStatus.csv 
b/libcxx/docs/Cxx2aStatusPaperStatus.csv
index 456ac647b7a3..793fc92be5f2 100644
--- a/libcxx/docs/Cxx2aStatusPaperStatus.csv
+++ b/libcxx/docs/Cxx2aStatusPaperStatus.csv
@@ -138,7 +138,7 @@
 "`P1394 `__","LWG","Range constructor for 
std::span","Belfast","* *",""
 "`P1456 `__","LWG","Move-only views","Belfast","* 
*",""
 "`P1622 `__","LWG","Mandating the Standard Library: 
Clause 32 - Thread support library","Belfast","* *",""
-"`P1645 `__","LWG","constexpr for numeric 
algorithms","Belfast","* *",""
+"`P1645 `__","LWG","constexpr for numeric 
algorithms","Belfast","|Complete|","12.0"
 "`P1664 `__","LWG","reconstructible_range - a concept 
for putting ranges back together","Belfast","* *",""
 "`P1686 `__","LWG","Mandating the Standard Library: 
Clause 27 - Time library","Belfast","* *",""
 "`P1690 `__","LWG","Refinement Proposal for P0919 
Heterogeneous lookup for unordered containers","Belfast","|Complete|","12.0"

diff  --git a/libcxx/docs/FeatureTestMacroTable.rst 
b/libcxx/docs/FeatureTestMacroTable.rst
index 637a4849e471..aa60a033edc3 100644
--- a/libcxx/docs/FeatureTestMacroTable.rst
+++ b/libcxx/docs/FeatureTestMacroTable.rst
@@ -196,6 +196,8 @@ Status
 - -
 ``__cpp_lib_constexpr_misc``  *unimplemented*
 - -
+``__cpp_lib_constexpr_numeric``   ``201911L``
+- -
 ``__cpp_lib_constexpr_swap_algorithms``   *unimplemented*
 - -
 ``__cpp_lib_constexpr_utility``   ``201811L``

diff

[llvm-branch-commits] [llvm] 0aeaec1 - [Timer] Add a command option to enable/disable timer sorting.

2020-11-28 Thread Paul C. Anagnostopoulos via llvm-branch-commits 

Author: Paul C. Anagnostopoulos
Date: 2020-11-28T11:43:38-05:00
New Revision: 0aeaec13e76a9b268cafd9b3cd3f24eb922777b0

URL: 
https://github.com/llvm/llvm-project/commit/0aeaec13e76a9b268cafd9b3cd3f24eb922777b0
DIFF: 
https://github.com/llvm/llvm-project/commit/0aeaec13e76a9b268cafd9b3cd3f24eb922777b0.diff

LOG: [Timer] Add a command option to enable/disable timer sorting.

Add one more timer to DAGISelEmitter to test the option.

Differential Revision: https://reviews.llvm.org/D92146

Added: 


Modified: 
llvm/include/llvm/TableGen/Record.h
llvm/lib/Support/Timer.cpp
llvm/utils/TableGen/DAGISelEmitter.cpp

Removed: 




diff  --git a/llvm/include/llvm/TableGen/Record.h 
b/llvm/include/llvm/TableGen/Record.h
index 567908f93e55..a26367a6fcc6 100644
--- a/llvm/include/llvm/TableGen/Record.h
+++ b/llvm/include/llvm/TableGen/Record.h
@@ -1829,7 +1829,7 @@ class RecordKeeper {
   /// Stop timing a phase.
   void stopTimer();
 
-  /// Start timing the overall backend. If the backend starts a timer,
+  /// Start timing the overall backend. If the backend itself starts a timer,
   /// then this timer is cleared.
   void startBackendTimer(StringRef Name);
 

diff  --git a/llvm/lib/Support/Timer.cpp b/llvm/lib/Support/Timer.cpp
index c97538cb560a..a3b86cfa6811 100644
--- a/llvm/lib/Support/Timer.cpp
+++ b/llvm/lib/Support/Timer.cpp
@@ -53,6 +53,11 @@ namespace {
   InfoOutputFilename("info-output-file", cl::value_desc("filename"),
  cl::desc("File to append -stats and -timer output to"),
cl::Hidden, 
cl::location(getLibSupportInfoOutputFilename()));
+
+  static cl::opt
+  SortTimers("sort-timers", cl::desc("In the report, sort the timers in each 
group "
+ "in wall clock time order"),
+ cl::init(true), cl::Hidden);
 }
 
 std::unique_ptr llvm::CreateInfoOutputFile() {
@@ -301,8 +306,9 @@ void TimerGroup::addTimer(Timer &T) {
 }
 
 void TimerGroup::PrintQueuedTimers(raw_ostream &OS) {
-  // Sort the timers in descending order by amount of time taken.
-  llvm::sort(TimersToPrint);
+  // Perhaps sort the timers in descending order by amount of time taken.
+  if (SortTimers)
+llvm::sort(TimersToPrint);
 
   TimeRecord Total;
   for (const PrintRecord &Record : TimersToPrint)

diff  --git a/llvm/utils/TableGen/DAGISelEmitter.cpp 
b/llvm/utils/TableGen/DAGISelEmitter.cpp
index 85a62855c19b..1652281b5193 100644
--- a/llvm/utils/TableGen/DAGISelEmitter.cpp
+++ b/llvm/utils/TableGen/DAGISelEmitter.cpp
@@ -189,6 +189,7 @@ void DAGISelEmitter::run(raw_ostream &OS) {
 namespace llvm {
 
 void EmitDAGISel(RecordKeeper &RK, raw_ostream &OS) {
+  RK.startTimer("Parse patterns");
   DAGISelEmitter(RK).run(OS);
 }
 



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[llvm-branch-commits] [llvm] 47c902b - [X86] Have indirect calls take 64-bit operands in 64-bit modes

2020-11-28 Thread Harald van Dijk via llvm-branch-commits 

Author: Harald van Dijk
Date: 2020-11-28T16:46:30Z
New Revision: 47c902ba8479fc1faed73b86f59d58830df06644

URL: 
https://github.com/llvm/llvm-project/commit/47c902ba8479fc1faed73b86f59d58830df06644
DIFF: 
https://github.com/llvm/llvm-project/commit/47c902ba8479fc1faed73b86f59d58830df06644.diff

LOG: [X86] Have indirect calls take 64-bit operands in 64-bit modes

The build bots caught two additional pre-existing problems exposed by the test 
change part of my change https://reviews.llvm.org/D91339, when expensive checks 
are enabled. This fixes one of them.

X86 has CALL64r and CALL32r opcodes, where CALL64r takes a 64-bit register, and 
CALL32r takes a 32-bit register. CALL64r can only be used in 64-bit mode, 
CALL32r can only be used in 32-bit mode. LLVM would assume that after picking 
the appropriate CALLr opcode, a pointer-sized register would be a valid 
operand, but in x32 mode, a 64-bit mode, pointers are 32 bits. In this mode, it 
is invalid to directly pass a pointer to CALL64r, it needs to be extended to 64 
bits first.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D91924

Added: 


Modified: 
llvm/lib/Target/X86/X86FastISel.cpp

Removed: 




diff  --git a/llvm/lib/Target/X86/X86FastISel.cpp 
b/llvm/lib/Target/X86/X86FastISel.cpp
index 15b04c0c7357..a8db3d416c2e 100644
--- a/llvm/lib/Target/X86/X86FastISel.cpp
+++ b/llvm/lib/Target/X86/X86FastISel.cpp
@@ -1082,13 +1082,35 @@ bool X86FastISel::X86SelectCallAddress(const Value *V, 
X86AddressMode &AM) {
 
   // If all else fails, try to materialize the value in a register.
   if (!AM.GV || !Subtarget->isPICStyleRIPRel()) {
+auto GetCallRegForValue = [this](const Value *V) {
+  Register Reg = getRegForValue(V);
+
+  // In 64-bit mode, we need a 64-bit register even if pointers are 32 
bits.
+  if (Reg && Subtarget->isTarget64BitILP32()) {
+Register CopyReg = createResultReg(&X86::GR32RegClass);
+BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, 
TII.get(X86::MOV32rr),
+CopyReg)
+.addReg(Reg);
+
+Register ExtReg = createResultReg(&X86::GR64RegClass);
+BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
+TII.get(TargetOpcode::SUBREG_TO_REG), ExtReg)
+.addImm(0)
+.addReg(CopyReg)
+.addImm(X86::sub_32bit);
+Reg = ExtReg;
+  }
+
+  return Reg;
+};
+
 if (AM.Base.Reg == 0) {
-  AM.Base.Reg = getRegForValue(V);
+  AM.Base.Reg = GetCallRegForValue(V);
   return AM.Base.Reg != 0;
 }
 if (AM.IndexReg == 0) {
   assert(AM.Scale == 1 && "Scale with no index!");
-  AM.IndexReg = getRegForValue(V);
+  AM.IndexReg = GetCallRegForValue(V);
   return AM.IndexReg != 0;
 }
   }



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[llvm-branch-commits] [llvm] c6b62ef - [ConstantFold] Fold operations to poison if possible

2020-11-28 Thread Juneyoung Lee via llvm-branch-commits 

Author: Juneyoung Lee
Date: 2020-11-29T02:28:40+09:00
New Revision: c6b62efb9103466b6cefca1bd99a5b04b4ced044

URL: 
https://github.com/llvm/llvm-project/commit/c6b62efb9103466b6cefca1bd99a5b04b4ced044
DIFF: 
https://github.com/llvm/llvm-project/commit/c6b62efb9103466b6cefca1bd99a5b04b4ced044.diff

LOG: [ConstantFold] Fold operations to poison if possible

This patch updates ConstantFold, so operations are folded into poison if 
possible.


casts: https://alive2.llvm.org/ce/z/WSj7rw
binary operations (arithmetic): https://alive2.llvm.org/ce/z/_7dEyJ
binary operations (bitwise): https://alive2.llvm.org/ce/z/cezjVN
vector/aggregate operations: https://alive2.llvm.org/ce/z/BQ7hWz
unary ops: https://alive2.llvm.org/ce/z/yBRs4q
other ops: https://alive2.llvm.org/ce/z/iXbcFD

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D92203

Added: 
llvm/test/Transforms/InstSimplify/ConstProp/poison.ll

Modified: 
llvm/lib/IR/ConstantFold.cpp
llvm/lib/IR/Constants.cpp
llvm/test/Transforms/InstSimplify/ConstProp/InsertElement.ll
llvm/unittests/IR/ConstantsTest.cpp

Removed: 




diff  --git a/llvm/lib/IR/ConstantFold.cpp b/llvm/lib/IR/ConstantFold.cpp
index b8502673a829..a52cd725d530 100644
--- a/llvm/lib/IR/ConstantFold.cpp
+++ b/llvm/lib/IR/ConstantFold.cpp
@@ -522,6 +522,9 @@ static Constant *getFoldedOffsetOf(Type *Ty, Constant 
*FieldNo, Type *DestTy,
 
 Constant *llvm::ConstantFoldCastInstruction(unsigned opc, Constant *V,
 Type *DestTy) {
+  if (isa(V))
+return PoisonValue::get(DestTy);
+
   if (isa(V)) {
 // zext(undef) = 0, because the top bits will be zero.
 // sext(undef) = 0, because the top bits will all be the same.
@@ -759,7 +762,9 @@ Constant *llvm::ConstantFoldSelectInstruction(Constant 
*Cond,
   Constant *V2Element = ConstantExpr::getExtractElement(V2,
 ConstantInt::get(Ty, i));
   auto *Cond = cast(CondV->getOperand(i));
-  if (V1Element == V2Element) {
+  if (isa(Cond)) {
+V = PoisonValue::get(V1Element->getType());
+  } else if (V1Element == V2Element) {
 V = V1Element;
   } else if (isa(Cond)) {
 V = isa(V1Element) ? V1Element : V2Element;
@@ -775,6 +780,9 @@ Constant *llvm::ConstantFoldSelectInstruction(Constant 
*Cond,
   return ConstantVector::get(Result);
   }
 
+  if (isa(Cond))
+return PoisonValue::get(V1->getType());
+
   if (isa(Cond)) {
 if (isa(V1)) return V1;
 return V2;
@@ -782,9 +790,17 @@ Constant *llvm::ConstantFoldSelectInstruction(Constant 
*Cond,
 
   if (V1 == V2) return V1;
 
+  if (isa(V1))
+return V2;
+  if (isa(V2))
+return V1;
+
   // If the true or false value is undef, we can fold to the other value as
   // long as the other value isn't poison.
   auto NotPoison = [](Constant *C) {
+if (isa(C))
+  return false;
+
 // TODO: We can analyze ConstExpr by opcode to determine if there is any
 //   possibility of poison.
 if (isa(C))
@@ -821,9 +837,13 @@ Constant 
*llvm::ConstantFoldExtractElementInstruction(Constant *Val,
   Constant *Idx) {
   auto *ValVTy = cast(Val->getType());
 
+  // extractelt poison, C -> poison
+  // extractelt C, undef -> poison
+  if (isa(Val) || isa(Idx))
+return PoisonValue::get(ValVTy->getElementType());
+
   // extractelt undef, C -> undef
-  // extractelt C, undef -> undef
-  if (isa(Val) || isa(Idx))
+  if (isa(Val))
 return UndefValue::get(ValVTy->getElementType());
 
   auto *CIdx = dyn_cast(Idx);
@@ -831,9 +851,9 @@ Constant 
*llvm::ConstantFoldExtractElementInstruction(Constant *Val,
 return nullptr;
 
   if (auto *ValFVTy = dyn_cast(Val->getType())) {
-// ee({w,x,y,z}, wrong_value) -> undef
+// ee({w,x,y,z}, wrong_value) -> poison
 if (CIdx->uge(ValFVTy->getNumElements()))
-  return UndefValue::get(ValFVTy->getElementType());
+  return PoisonValue::get(ValFVTy->getElementType());
   }
 
   // ee (gep (ptr, idx0, ...), idx) -> gep (ee (ptr, idx), ee (idx0, idx), ...)
@@ -882,7 +902,7 @@ Constant 
*llvm::ConstantFoldInsertElementInstruction(Constant *Val,
  Constant *Elt,
  Constant *Idx) {
   if (isa(Idx))
-return UndefValue::get(Val->getType());
+return PoisonValue::get(Val->getType());
 
   ConstantInt *CIdx = dyn_cast(Idx);
   if (!CIdx) return nullptr;
@@ -1084,6 +1104,10 @@ Constant *llvm::ConstantFoldBinaryInstruction(unsigned 
Opcode, Constant *C1,
   return C1;
   }
 
+  // Binary operations propagate poison.
+  if (isa(C1) || isa(C2))
+return PoisonValue::get(C1->getType());
+
   // Handle scalar UndefValue and scalable vector UndefValue. Fixed-length
   // vectors are always evaluated per element.
   bool IsScala

[llvm-branch-commits] [llvm] 47e2faf - [X86] Do not allow FixupSetCC to relax constraints

2020-11-28 Thread Harald van Dijk via llvm-branch-commits 

Author: Harald van Dijk
Date: 2020-11-28T17:46:56Z
New Revision: 47e2fafbf3d933532f46ef6e8515e7005df52758

URL: 
https://github.com/llvm/llvm-project/commit/47e2fafbf3d933532f46ef6e8515e7005df52758
DIFF: 
https://github.com/llvm/llvm-project/commit/47e2fafbf3d933532f46ef6e8515e7005df52758.diff

LOG: [X86] Do not allow FixupSetCC to relax constraints

The build bots caught two additional pre-existing problems exposed by the test 
change part of my change https://reviews.llvm.org/D91339, when expensive checks 
are enabled. https://reviews.llvm.org/D91924 fixes one of them, this fixes the 
other.

FixupSetCC will change code in the form of

  %setcc = SETCCr ...
  %ext1 = MOVZX32rr8 %setcc

to

  %zero = MOV32r0
  %setcc = SETCCr ...
  %ext2 = INSERT_SUBREG %zero, %setcc, %subreg.sub_8bit

and replace uses of %ext1 with %ext2.

The register class for %ext2 did not take into account any constraints on 
%ext1, which may have been required by its uses. This change ensures that the 
original constraints are honoured, by instead of creating a new %ext2 register, 
reusing %ext1 and further constraining it as needed. This requires a slight 
reorganisation to account for the fact that it is possible for the constraining 
to fail, in which case no changes should be made.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D91933

Added: 


Modified: 
llvm/lib/Target/X86/X86FixupSetCC.cpp

Removed: 




diff  --git a/llvm/lib/Target/X86/X86FixupSetCC.cpp 
b/llvm/lib/Target/X86/X86FixupSetCC.cpp
index 09668d7c5468..269f8ce6bd7a 100644
--- a/llvm/lib/Target/X86/X86FixupSetCC.cpp
+++ b/llvm/lib/Target/X86/X86FixupSetCC.cpp
@@ -97,28 +97,31 @@ bool 
X86FixupSetCCPass::runOnMachineFunction(MachineFunction &MF) {
   if (FlagsDefMI->readsRegister(X86::EFLAGS))
 continue;
 
-  ++NumSubstZexts;
-  Changed = true;
-
   // On 32-bit, we need to be careful to force an ABCD register.
   const TargetRegisterClass *RC = MF.getSubtarget().is64Bit()
   ? &X86::GR32RegClass
   : &X86::GR32_ABCDRegClass;
-  Register ZeroReg = MRI->createVirtualRegister(RC);
-  Register InsertReg = MRI->createVirtualRegister(RC);
+  if (!MRI->constrainRegClass(ZExt->getOperand(0).getReg(), RC)) {
+// If we cannot constrain the register, we would need an additional 
copy
+// and are better off keeping the MOVZX32rr8 we have now.
+continue;
+  }
+
+  ++NumSubstZexts;
+  Changed = true;
 
   // Initialize a register with 0. This must go before the eflags def
+  Register ZeroReg = MRI->createVirtualRegister(RC);
   BuildMI(MBB, FlagsDefMI, MI.getDebugLoc(), TII->get(X86::MOV32r0),
   ZeroReg);
 
   // X86 setcc only takes an output GR8, so fake a GR32 input by inserting
   // the setcc result into the low byte of the zeroed register.
   BuildMI(*ZExt->getParent(), ZExt, ZExt->getDebugLoc(),
-  TII->get(X86::INSERT_SUBREG), InsertReg)
+  TII->get(X86::INSERT_SUBREG), ZExt->getOperand(0).getReg())
   .addReg(ZeroReg)
   .addReg(MI.getOperand(0).getReg())
   .addImm(X86::sub_8bit);
-  MRI->replaceRegWith(ZExt->getOperand(0).getReg(), InsertReg);
   ToErase.push_back(ZExt);
 }
   }



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[llvm-branch-commits] [llvm] 78a30c8 - [X86] Add -verify-machineinstrs to pic.ll

2020-11-28 Thread Harald van Dijk via llvm-branch-commits 

Author: Harald van Dijk
Date: 2020-11-28T17:54:44Z
New Revision: 78a30c830b53dcce32e8d20a966448862106

URL: 
https://github.com/llvm/llvm-project/commit/78a30c830b53dcce32e8d20a966448862106
DIFF: 
https://github.com/llvm/llvm-project/commit/78a30c830b53dcce32e8d20a966448862106.diff

LOG: [X86] Add -verify-machineinstrs to pic.ll

This ensures that failures show up in regular builds, rather than only
when expensive checks are enabled.

Differential Revision: https://reviews.llvm.org/D91339

Added: 


Modified: 
llvm/test/CodeGen/X86/pic.ll

Removed: 




diff  --git a/llvm/test/CodeGen/X86/pic.ll b/llvm/test/CodeGen/X86/pic.ll
index 1de4ca0059d0..34165d47bcb1 100644
--- a/llvm/test/CodeGen/X86/pic.ll
+++ b/llvm/test/CodeGen/X86/pic.ll
@@ -1,6 +1,6 @@
-; RUN: llc < %s -mcpu=generic -mtriple=i686-pc-linux-gnu -relocation-model=pic 
-asm-verbose=false -post-RA-scheduler=false | FileCheck %s 
-check-prefixes=CHECK,CHECK-I686
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-pc-linux-gnux32 
-relocation-model=pic -asm-verbose=false -post-RA-scheduler=false | FileCheck 
%s -check-prefixes=CHECK,CHECK-X32
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-pc-linux-gnux32 
-relocation-model=pic -asm-verbose=false -post-RA-scheduler=false -fast-isel | 
FileCheck %s -check-prefixes=CHECK,CHECK-X32
+; RUN: llc < %s -mcpu=generic -mtriple=i686-pc-linux-gnu -relocation-model=pic 
-asm-verbose=false -post-RA-scheduler=false -verify-machineinstrs | FileCheck 
%s -check-prefixes=CHECK,CHECK-I686
+; RUN: llc < %s -mcpu=generic -mtriple=x86_64-pc-linux-gnux32 
-relocation-model=pic -asm-verbose=false -post-RA-scheduler=false 
-verify-machineinstrs | FileCheck %s -check-prefixes=CHECK,CHECK-X32
+; RUN: llc < %s -mcpu=generic -mtriple=x86_64-pc-linux-gnux32 
-relocation-model=pic -asm-verbose=false -post-RA-scheduler=false -fast-isel 
-verify-machineinstrs | FileCheck %s -check-prefixes=CHECK,CHECK-X32
 
 @ptr = external global i32* 
 @dst = external global i32 



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[llvm-branch-commits] [llvm] b5e8de9 - [BasicAA] Add tests for suboptimal speculation results (NFC)

2020-11-28 Thread Nikita Popov via llvm-branch-commits 

Author: Nikita Popov
Date: 2020-11-28T19:16:17+01:00
New Revision: b5e8de9c7903d458b098a8af03939384270c1a5e

URL: 
https://github.com/llvm/llvm-project/commit/b5e8de9c7903d458b098a8af03939384270c1a5e
DIFF: 
https://github.com/llvm/llvm-project/commit/b5e8de9c7903d458b098a8af03939384270c1a5e.diff

LOG: [BasicAA] Add tests for suboptimal speculation results (NFC)

While we determine that (phi1, phi2) is noalias, we don't
determine that (gep phi1 + 1, gep phi2 + 1) are also noalias.

Added: 


Modified: 
llvm/test/Analysis/BasicAA/phi-speculation.ll

Removed: 




diff  --git a/llvm/test/Analysis/BasicAA/phi-speculation.ll 
b/llvm/test/Analysis/BasicAA/phi-speculation.ll
index 12b2310f4c45..2014fb5158d4 100644
--- a/llvm/test/Analysis/BasicAA/phi-speculation.ll
+++ b/llvm/test/Analysis/BasicAA/phi-speculation.ll
@@ -6,6 +6,8 @@ target datalayout =
 ; ptr_phi and ptr2_phi do not alias.
 ; CHECK: test_noalias_1
 ; CHECK: NoAlias: i32* %ptr2_phi, i32* %ptr_phi
+; CHECK: MayAlias: i32* %ptr2_inc, i32* %ptr_inc
+; TODO: The incs should also be NoAlias.
 define i32 @test_noalias_1(i32* %ptr2, i32 %count, i32* %coeff) {
 entry:
   %ptr = getelementptr inbounds i32, i32* %ptr2, i64 1
@@ -34,7 +36,10 @@ the_exit:
 
 ; CHECK: test_noalias_2
 ; CHECK: NoAlias: i32* %ptr_outer_phi, i32* %ptr_outer_phi2
+; CHECK: MayAlias: i32* %ptr2_inc_outer, i32* %ptr_inc_outer
 ; CHECK: NoAlias: i32* %ptr2_phi, i32* %ptr_phi
+; CHECK: MayAlias: i32* %ptr2_inc, i32* %ptr_inc
+; TODO: The incs should also be NoAlias.
 define i32 @test_noalias_2(i32* %ptr2, i32 %count, i32* %coeff) {
 entry:
   %ptr = getelementptr inbounds i32, i32* %ptr2, i64 1



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[llvm-branch-commits] [libcxx] ae5f792 - [libc++] Disable some tests using gcc 9.

2020-11-28 Thread Mark de Wever via llvm-branch-commits 

Author: Mark de Wever
Date: 2020-11-28T20:08:09+01:00
New Revision: ae5f792002d8885c091e3e2de6fcebf9b26085f8

URL: 
https://github.com/llvm/llvm-project/commit/ae5f792002d8885c091e3e2de6fcebf9b26085f8
DIFF: 
https://github.com/llvm/llvm-project/commit/ae5f792002d8885c091e3e2de6fcebf9b26085f8.diff

LOG: [libc++] Disable some tests using gcc 9.

This should fix running the libc++ unit tests.
They failed due to the changes introduced in 67c88e.

Added: 


Modified: 
libcxx/test/std/numerics/numeric.ops/accumulate/accumulate.pass.cpp
libcxx/test/std/numerics/numeric.ops/accumulate/accumulate_op.pass.cpp

libcxx/test/std/numerics/numeric.ops/adjacent.difference/adjacent_difference.pass.cpp

libcxx/test/std/numerics/numeric.ops/adjacent.difference/adjacent_difference_op.pass.cpp
libcxx/test/std/numerics/numeric.ops/exclusive.scan/exclusive_scan.pass.cpp

libcxx/test/std/numerics/numeric.ops/exclusive.scan/exclusive_scan_init_op.pass.cpp
libcxx/test/std/numerics/numeric.ops/inclusive.scan/inclusive_scan.pass.cpp

libcxx/test/std/numerics/numeric.ops/inclusive.scan/inclusive_scan_op.pass.cpp

libcxx/test/std/numerics/numeric.ops/inclusive.scan/inclusive_scan_op_init.pass.cpp
libcxx/test/std/numerics/numeric.ops/inner.product/inner_product.pass.cpp

libcxx/test/std/numerics/numeric.ops/inner.product/inner_product_comp.pass.cpp
libcxx/test/std/numerics/numeric.ops/numeric.iota/iota.pass.cpp
libcxx/test/std/numerics/numeric.ops/partial.sum/partial_sum.pass.cpp
libcxx/test/std/numerics/numeric.ops/partial.sum/partial_sum_op.pass.cpp
libcxx/test/std/numerics/numeric.ops/reduce/reduce.pass.cpp
libcxx/test/std/numerics/numeric.ops/reduce/reduce_init.pass.cpp
libcxx/test/std/numerics/numeric.ops/reduce/reduce_init_op.pass.cpp

libcxx/test/std/numerics/numeric.ops/transform.exclusive.scan/transform_exclusive_scan_init_bop_uop.pass.cpp

libcxx/test/std/numerics/numeric.ops/transform.inclusive.scan/transform_inclusive_scan_bop_uop.pass.cpp

libcxx/test/std/numerics/numeric.ops/transform.inclusive.scan/transform_inclusive_scan_bop_uop_init.pass.cpp

libcxx/test/std/numerics/numeric.ops/transform.reduce/transform_reduce_iter_iter_init_bop_uop.pass.cpp

libcxx/test/std/numerics/numeric.ops/transform.reduce/transform_reduce_iter_iter_iter_init.pass.cpp

libcxx/test/std/numerics/numeric.ops/transform.reduce/transform_reduce_iter_iter_iter_init_op_op.pass.cpp

Removed: 




diff  --git 
a/libcxx/test/std/numerics/numeric.ops/accumulate/accumulate.pass.cpp 
b/libcxx/test/std/numerics/numeric.ops/accumulate/accumulate.pass.cpp
index d491bc0394b3..6d15930c1e57 100644
--- a/libcxx/test/std/numerics/numeric.ops/accumulate/accumulate.pass.cpp
+++ b/libcxx/test/std/numerics/numeric.ops/accumulate/accumulate.pass.cpp
@@ -8,6 +8,7 @@
 
 // 
 // UNSUPPORTED: clang-8
+// UNSUPPORTED: gcc-9
 
 // Became constexpr in C++20
 // template 

diff  --git 
a/libcxx/test/std/numerics/numeric.ops/accumulate/accumulate_op.pass.cpp 
b/libcxx/test/std/numerics/numeric.ops/accumulate/accumulate_op.pass.cpp
index bef328e5ba02..6210bc373a10 100644
--- a/libcxx/test/std/numerics/numeric.ops/accumulate/accumulate_op.pass.cpp
+++ b/libcxx/test/std/numerics/numeric.ops/accumulate/accumulate_op.pass.cpp
@@ -8,6 +8,7 @@
 
 // 
 // UNSUPPORTED: clang-8
+// UNSUPPORTED: gcc-9
 
 // Became constexpr in C++20
 // template 
 // UNSUPPORTED: clang-8
+// UNSUPPORTED: gcc-9
 
 // Became constexpr in C++20
 // template 
 // UNSUPPORTED: clang-8
+// UNSUPPORTED: gcc-9
 
 // Became constexpr in C++20
 // template 
 // UNSUPPORTED: c++03, c++11, c++14
 // UNSUPPORTED: clang-8
+// UNSUPPORTED: gcc-9
 
 // Became constexpr in C++20
 // template

diff  --git 
a/libcxx/test/std/numerics/numeric.ops/exclusive.scan/exclusive_scan_init_op.pass.cpp
 
b/libcxx/test/std/numerics/numeric.ops/exclusive.scan/exclusive_scan_init_op.pass.cpp
index fb2078dae7af..c7045d950902 100644
--- 
a/libcxx/test/std/numerics/numeric.ops/exclusive.scan/exclusive_scan_init_op.pass.cpp
+++ 
b/libcxx/test/std/numerics/numeric.ops/exclusive.scan/exclusive_scan_init_op.pass.cpp
@@ -9,6 +9,7 @@
 // 
 // UNSUPPORTED: c++03, c++11, c++14
 // UNSUPPORTED: clang-8
+// UNSUPPORTED: gcc-9
 
 // Became constexpr in C++20
 // template

diff  --git 
a/libcxx/test/std/numerics/numeric.ops/inclusive.scan/inclusive_scan.pass.cpp 
b/libcxx/test/std/numerics/numeric.ops/inclusive.scan/inclusive_scan.pass.cpp
index 18178153b0b8..d529f87a7d92 100644
--- 
a/libcxx/test/std/numerics/numeric.ops/inclusive.scan/inclusive_scan.pass.cpp
+++ 
b/libcxx/test/std/numerics/numeric.ops/inclusive.scan/inclusive_scan.pass.cpp
@@ -9,6 +9,7 @@
 // 
 // UNSUPPORTED: c++03, c++11, c++14
 // UNSUPPORTED: clang-8
+// UNSUPPORTED: gcc-9
 
 // Became constexpr in C++20
 // template

diff  --git 
a/libcxx/test/std/numerics/numeric.ops/inclusive.scan/inclusive_scan_op.pa

[llvm-branch-commits] [llvm] f502b14 - [ARMAttributeParser] Correctly parse and print Tag_THUMB_ISA_use=3

2020-11-28 Thread Fangrui Song via llvm-branch-commits 

Author: LemonBoy
Date: 2020-11-28T12:28:22-08:00
New Revision: f502b14d40e751fe00afc493ef0d08f196524886

URL: 
https://github.com/llvm/llvm-project/commit/f502b14d40e751fe00afc493ef0d08f196524886
DIFF: 
https://github.com/llvm/llvm-project/commit/f502b14d40e751fe00afc493ef0d08f196524886.diff

LOG: [ARMAttributeParser] Correctly parse and print Tag_THUMB_ISA_use=3

I took the "Permitted"/"Not Permitted" combo from the `Tag_ARM_ISA_use` case 
(GNU tools print "Yes").

Reviewed By: compnerd, MaskRay, simon_tatham

Differential Revision: https://reviews.llvm.org/D90305

Added: 
llvm/test/MC/ARM/directive-arch-armv8m.s

Modified: 
llvm/lib/Support/ARMAttributeParser.cpp
llvm/test/MC/ARM/assembly-default-build-attributes.s
llvm/unittests/Support/ARMAttributeParser.cpp

Removed: 




diff  --git a/llvm/lib/Support/ARMAttributeParser.cpp 
b/llvm/lib/Support/ARMAttributeParser.cpp
index 17ad38d22614..459691923af8 100644
--- a/llvm/lib/Support/ARMAttributeParser.cpp
+++ b/llvm/lib/Support/ARMAttributeParser.cpp
@@ -113,7 +113,7 @@ Error ARMAttributeParser::ARM_ISA_use(AttrType tag) {
 }
 
 Error ARMAttributeParser::THUMB_ISA_use(AttrType tag) {
-  static const char *strings[] = {"Not Permitted", "Thumb-1", "Thumb-2"};
+  static const char *strings[] = {"Not Permitted", "Thumb-1", "Thumb-2", 
"Permitted"};
   return parseStringAttribute("THUMB_ISA_use", tag, makeArrayRef(strings));
 }
 

diff  --git a/llvm/test/MC/ARM/assembly-default-build-attributes.s 
b/llvm/test/MC/ARM/assembly-default-build-attributes.s
index be63066ff90f..40483539c2ee 100644
--- a/llvm/test/MC/ARM/assembly-default-build-attributes.s
+++ b/llvm/test/MC/ARM/assembly-default-build-attributes.s
@@ -2,6 +2,8 @@
 // RUN: llvm-mc -triple armv6m < %s -arm-add-build-attributes | FileCheck %s 
--check-prefix=v6M
 // RUN: llvm-mc -triple armv7m < %s -arm-add-build-attributes | FileCheck %s 
--check-prefix=v7M
 // RUN: llvm-mc -triple armv7a -mcpu=cortex-a15 < %s -arm-add-build-attributes 
| FileCheck %s --check-prefix=Cortex-A15
+// RUN: llvm-mc -triple armv8m.base < %s -arm-add-build-attributes | FileCheck 
%s --check-prefix=v8M_Baseline
+// RUN: llvm-mc -triple armv8m.main < %s -arm-add-build-attributes | FileCheck 
%s --check-prefix=v8M_Mainline
 
 // This isn't intended to be a through check of the build attributes emitted
 // for each target (that's tested elsewhere), but just to check that the
@@ -30,6 +32,20 @@
 // v7M: .eabi_attribute 9, 2@ Tag_THUMB_ISA_use
 // v7M: .eabi_attribute 34, 1   @ Tag_CPU_unaligned_access
 
+// v8M_Baseline-NOT: .cpu
+// v8M_Baseline: .eabi_attribute 6, 16   @ Tag_CPU_arch
+// v8M_Baseline: .eabi_attribute 7, 77   @ Tag_CPU_arch_profile
+// v8M_Baseline: .eabi_attribute 8, 0@ Tag_ARM_ISA_use
+// v8M_Baseline: .eabi_attribute 9, 3@ Tag_THUMB_ISA_use
+// v8M_Baseline: .eabi_attribute 34, 0   @ Tag_CPU_unaligned_access
+
+// v8M_Mainline-NOT: .cpu
+// v8M_Mainline: .eabi_attribute 6, 17   @ Tag_CPU_arch
+// v8M_Mainline: .eabi_attribute 7, 77   @ Tag_CPU_arch_profile
+// v8M_Mainline: .eabi_attribute 8, 0@ Tag_ARM_ISA_use
+// v8M_Mainline: .eabi_attribute 9, 3@ Tag_THUMB_ISA_use
+// v8M_Mainline: .eabi_attribute 34, 1   @ Tag_CPU_unaligned_access
+
 // Cortex-A15: .cpucortex-a15
 // Cortex-A15: .eabi_attribute 6, 10   @ Tag_CPU_arch
 // Cortex-A15: .eabi_attribute 7, 65   @ Tag_CPU_arch_profile

diff  --git a/llvm/test/MC/ARM/directive-arch-armv8m.s 
b/llvm/test/MC/ARM/directive-arch-armv8m.s
new file mode 100644
index ..5151b8f30fa5
--- /dev/null
+++ b/llvm/test/MC/ARM/directive-arch-armv8m.s
@@ -0,0 +1,34 @@
+@ Test the .arch directive for armv8m
+
+@ This test case will check the default .ARM.attributes value for the
+@ armv8-a architecture when using the armv8m.base alias.
+
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN:   | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN:   | llvm-readobj --arch-specific - | FileCheck %s -check-prefix 
CHECK-ATTR
+
+   .syntax unified
+   .arch   armv8m.base
+
+@ CHECK-ASM:   .arch   armv8-m.base
+
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR: TagName: CPU_name
+@ CHECK-ATTR: Value: 8-M.Baseline
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR: TagName: CPU_arch
+@ CHECK-ATTR: Description: ARM v8
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR: TagName: CPU_arch_profile
+@ CHECK-ATTR: Description: Microcontroller
+@ CHECK-ATTR:   }
+@ CHECK-ATTR:   Attribute {
+@ CHECK-ATTR: TagName: THUMB_ISA_use
+@ CHECK-ATTR: Description: Permitted
+@ CHECK-ATTR:   }
+@ CHECK-ATTR: }
+

diff  --git a/llvm/unittests/Support/ARMAttributeParser.cpp 
b/llvm/unittests/Support/ARMAttributeParser.cpp
index 88e3ce389a34..9a823ed1de7e 100644
--- a/llvm/unittests/Support/ARMAttributeParser.cpp
+++ b/llvm/unittests/Sup

[llvm-branch-commits] [llvm] d989ffd - Implement computeHostNumHardwareThreads() for FreeBSD

2020-11-28 Thread Dimitry Andric via llvm-branch-commits 

Author: Dimitry Andric
Date: 2020-11-29T00:49:39+01:00
New Revision: d989ffd109b2b5e7fd7c577ea549f4d1c5f5492c

URL: 
https://github.com/llvm/llvm-project/commit/d989ffd109b2b5e7fd7c577ea549f4d1c5f5492c
DIFF: 
https://github.com/llvm/llvm-project/commit/d989ffd109b2b5e7fd7c577ea549f4d1c5f5492c.diff

LOG: Implement computeHostNumHardwareThreads() for FreeBSD

This retrieves CPU affinity via FreeBSD's cpuset(2) API, and makes LLVM
respect affinity settings configured by the user via the cpuset(1)
command.

In particular, this allows to reduce the number of threads used on
machines with high core counts, which can interact badly with
parallelized build systems. This is particularly noticable with lld,
which spawns lots of threads even for linking e.g. hello_world!

This fix is related to PR48193, but does not adress the more fundamental
problem, which is that LLVM by default grabs as many CPUs and/or threads
as possible.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D92271

Added: 


Modified: 
llvm/lib/Support/Unix/Threading.inc

Removed: 




diff  --git a/llvm/lib/Support/Unix/Threading.inc 
b/llvm/lib/Support/Unix/Threading.inc
index 2d0aacabf092..667d023fc134 100644
--- a/llvm/lib/Support/Unix/Threading.inc
+++ b/llvm/lib/Support/Unix/Threading.inc
@@ -28,6 +28,7 @@
 
 #if defined(__FreeBSD__) || defined(__FreeBSD_kernel__)
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -282,7 +283,13 @@ SetThreadPriorityResult 
llvm::set_thread_priority(ThreadPriority Priority) {
 #include 
 
 int computeHostNumHardwareThreads() {
-#ifdef __linux__
+#if defined(__FreeBSD__)
+  cpuset_t mask;
+  CPU_ZERO(&mask);
+  if (cpuset_getaffinity(CPU_LEVEL_WHICH, CPU_WHICH_TID, -1, sizeof(mask),
+ &mask) == 0)
+return CPU_COUNT(&mask);
+#elif defined(__linux__)
   cpu_set_t Set;
   if (sched_getaffinity(0, sizeof(Set), &Set) == 0)
 return CPU_COUNT(&Set);



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[llvm-branch-commits] [mlir] 6dd9596 - [mlir] Add a shape function library op

2020-11-28 Thread Jacques Pienaar via llvm-branch-commits 

Author: Jacques Pienaar
Date: 2020-11-28T15:53:59-08:00
New Revision: 6dd9596b19d7679c562f8e866be6d0c3d7c21994

URL: 
https://github.com/llvm/llvm-project/commit/6dd9596b19d7679c562f8e866be6d0c3d7c21994
DIFF: 
https://github.com/llvm/llvm-project/commit/6dd9596b19d7679c562f8e866be6d0c3d7c21994.diff

LOG: [mlir] Add a shape function library op

Op with mapping from ops to corresponding shape functions for those op
in the library and mechanism to associate shape functions to functions.
The mapping of operand to shape function is kept separate from the shape
functions themselves as the operation is associated to the shape
function and not vice versa, and one could have a common library of
shape functions that can be used in different contexts.

Use fully qualified names and require a name for shape fn lib ops for
now and an explicit print/parse (based around the generated one & GPU
module op ones).

Differential Revision: https://reviews.llvm.org/D91672

Added: 
mlir/test/Analysis/test-shape-fn-report.mlir
mlir/test/lib/Dialect/Shape/CMakeLists.txt
mlir/test/lib/Dialect/Shape/TestShapeFunctions.cpp

Modified: 
mlir/include/mlir/Dialect/Shape/IR/Shape.h
mlir/include/mlir/Dialect/Shape/IR/ShapeOps.td
mlir/lib/Dialect/Shape/IR/Shape.cpp
mlir/test/lib/Dialect/CMakeLists.txt
mlir/test/lib/Dialect/Test/TestOps.td
mlir/tools/mlir-opt/CMakeLists.txt
mlir/tools/mlir-opt/mlir-opt.cpp

Removed: 




diff  --git a/mlir/include/mlir/Dialect/Shape/IR/Shape.h 
b/mlir/include/mlir/Dialect/Shape/IR/Shape.h
index f40d6154544a..cb5ed56e16a2 100644
--- a/mlir/include/mlir/Dialect/Shape/IR/Shape.h
+++ b/mlir/include/mlir/Dialect/Shape/IR/Shape.h
@@ -14,6 +14,7 @@
 #ifndef MLIR_SHAPE_IR_SHAPE_H
 #define MLIR_SHAPE_IR_SHAPE_H
 
+#include "mlir/IR/BuiltinDialect.h"
 #include "mlir/IR/Dialect.h"
 #include "mlir/IR/OpDefinition.h"
 #include "mlir/IR/OpImplementation.h"

diff  --git a/mlir/include/mlir/Dialect/Shape/IR/ShapeOps.td 
b/mlir/include/mlir/Dialect/Shape/IR/ShapeOps.td
index a852d900cf69..52768e49001d 100644
--- a/mlir/include/mlir/Dialect/Shape/IR/ShapeOps.td
+++ b/mlir/include/mlir/Dialect/Shape/IR/ShapeOps.td
@@ -18,6 +18,7 @@ include "mlir/Interfaces/ControlFlowInterfaces.td"
 include "mlir/Interfaces/InferTypeOpInterface.td"
 include "mlir/Interfaces/SideEffectInterfaces.td"
 include "mlir/IR/OpAsmInterface.td"
+include "mlir/IR/SymbolInterfaces.td"
 
 
//===--===//
 // Shape op definitions
@@ -492,7 +493,7 @@ def Shape_WithOp : Shape_Op<"with_shape", [NoSideEffect]> {
 }
 
 def Shape_YieldOp : Shape_Op<"yield",
-[HasParent<"ReduceOp">,
+[HasParent<"ReduceOp, FunctionLibraryOp">,
  NoSideEffect,
  ReturnLike,
  Terminator]> {
@@ -780,4 +781,62 @@ def Shape_CstrRequireOp : Shape_Op<"cstr_require", []> {
   let hasFolder = 1;
 }
 
+//===--===//
+// Shape collection ops.
+//===--===//
+
+def Shape_FunctionLibraryOp : Shape_Op<"function_library",
+[AffineScope, IsolatedFromAbove, NoRegionArguments, SymbolTable, Symbol,
+ SingleBlockImplicitTerminator<"ShapeFunctionLibraryTerminatorOp">]> {
+  let summary = "Represents shape functions and corresponding ops";
+  let description = [{
+Represents a list of shape functions and the ops whose shape transfer
+functions they represent.
+
+Example:
+
+```mlir
+shape.function_library {
+  func @same_result_shape(%arg: !shape.value_shape) -> !shape.shape {
+%0 = shape.shape_of %arg : !shape.value_shape -> !shape.shape
+return %0 : !shape.shape
+  }
+} mapping {
+  std.atan = @same_result_shape
+}
+```
+  }];
+
+  let arguments = (ins SymbolNameAttr:$sym_name,
+   OptionalAttr:$sym_visibility);
+  let arguments = (ins DictionaryAttr:$mapping);
+  let regions = (region AnyRegion:$body);
+
+  let extraClassDeclaration = [{
+/// Returns an associated shape function for an operation if defined.
+FuncOp getShapeFunction(Operation *op);
+  }];
+
+  let builders = [OpBuilderDAG<(ins "StringRef":$name)>];
+  let skipDefaultBuilders = 1;
+
+  let printer = [{ ::print(p, *this); }];
+  let parser = [{ return ::parse$cppClass(parser, result); }];
+}
+
+//===--===//
+// ShapeFunctionLibraryTerminatorOp
+//===--===//
+
+def ShapeFunctionLibraryTerminatorOp : Shape_Op<"fn_lib_terminator",
+[Terminator, HasParent<"FunctionLibraryOp">]> {
+  let summary = "A pseudo op that marks the end of a shape function library";
+  let description = [{
+`shape_fn_lib_terminator` is a special pseudo terminator operation for the
+shape

[llvm-branch-commits] [mlir] d9da4c3 - Revert "[mlir] Add a shape function library op"

2020-11-28 Thread Mehdi Amini via llvm-branch-commits 

Author: Mehdi Amini
Date: 2020-11-29T05:28:42Z
New Revision: d9da4c3e73720badfcac5c0dc63c0285bb690770

URL: 
https://github.com/llvm/llvm-project/commit/d9da4c3e73720badfcac5c0dc63c0285bb690770
DIFF: 
https://github.com/llvm/llvm-project/commit/d9da4c3e73720badfcac5c0dc63c0285bb690770.diff

LOG: Revert "[mlir] Add a shape function library op"

This reverts commit 6dd9596b19d7679c562f8e866be6d0c3d7c21994.

Build is broken.

Added: 


Modified: 
mlir/include/mlir/Dialect/Shape/IR/Shape.h
mlir/include/mlir/Dialect/Shape/IR/ShapeOps.td
mlir/lib/Dialect/Shape/IR/Shape.cpp
mlir/test/lib/Dialect/CMakeLists.txt
mlir/test/lib/Dialect/Test/TestOps.td
mlir/tools/mlir-opt/CMakeLists.txt
mlir/tools/mlir-opt/mlir-opt.cpp

Removed: 
mlir/test/Analysis/test-shape-fn-report.mlir
mlir/test/lib/Dialect/Shape/CMakeLists.txt
mlir/test/lib/Dialect/Shape/TestShapeFunctions.cpp



diff  --git a/mlir/include/mlir/Dialect/Shape/IR/Shape.h 
b/mlir/include/mlir/Dialect/Shape/IR/Shape.h
index cb5ed56e16a2..f40d6154544a 100644
--- a/mlir/include/mlir/Dialect/Shape/IR/Shape.h
+++ b/mlir/include/mlir/Dialect/Shape/IR/Shape.h
@@ -14,7 +14,6 @@
 #ifndef MLIR_SHAPE_IR_SHAPE_H
 #define MLIR_SHAPE_IR_SHAPE_H
 
-#include "mlir/IR/BuiltinDialect.h"
 #include "mlir/IR/Dialect.h"
 #include "mlir/IR/OpDefinition.h"
 #include "mlir/IR/OpImplementation.h"

diff  --git a/mlir/include/mlir/Dialect/Shape/IR/ShapeOps.td 
b/mlir/include/mlir/Dialect/Shape/IR/ShapeOps.td
index 52768e49001d..a852d900cf69 100644
--- a/mlir/include/mlir/Dialect/Shape/IR/ShapeOps.td
+++ b/mlir/include/mlir/Dialect/Shape/IR/ShapeOps.td
@@ -18,7 +18,6 @@ include "mlir/Interfaces/ControlFlowInterfaces.td"
 include "mlir/Interfaces/InferTypeOpInterface.td"
 include "mlir/Interfaces/SideEffectInterfaces.td"
 include "mlir/IR/OpAsmInterface.td"
-include "mlir/IR/SymbolInterfaces.td"
 
 
//===--===//
 // Shape op definitions
@@ -493,7 +492,7 @@ def Shape_WithOp : Shape_Op<"with_shape", [NoSideEffect]> {
 }
 
 def Shape_YieldOp : Shape_Op<"yield",
-[HasParent<"ReduceOp, FunctionLibraryOp">,
+[HasParent<"ReduceOp">,
  NoSideEffect,
  ReturnLike,
  Terminator]> {
@@ -781,62 +780,4 @@ def Shape_CstrRequireOp : Shape_Op<"cstr_require", []> {
   let hasFolder = 1;
 }
 
-//===--===//
-// Shape collection ops.
-//===--===//
-
-def Shape_FunctionLibraryOp : Shape_Op<"function_library",
-[AffineScope, IsolatedFromAbove, NoRegionArguments, SymbolTable, Symbol,
- SingleBlockImplicitTerminator<"ShapeFunctionLibraryTerminatorOp">]> {
-  let summary = "Represents shape functions and corresponding ops";
-  let description = [{
-Represents a list of shape functions and the ops whose shape transfer
-functions they represent.
-
-Example:
-
-```mlir
-shape.function_library {
-  func @same_result_shape(%arg: !shape.value_shape) -> !shape.shape {
-%0 = shape.shape_of %arg : !shape.value_shape -> !shape.shape
-return %0 : !shape.shape
-  }
-} mapping {
-  std.atan = @same_result_shape
-}
-```
-  }];
-
-  let arguments = (ins SymbolNameAttr:$sym_name,
-   OptionalAttr:$sym_visibility);
-  let arguments = (ins DictionaryAttr:$mapping);
-  let regions = (region AnyRegion:$body);
-
-  let extraClassDeclaration = [{
-/// Returns an associated shape function for an operation if defined.
-FuncOp getShapeFunction(Operation *op);
-  }];
-
-  let builders = [OpBuilderDAG<(ins "StringRef":$name)>];
-  let skipDefaultBuilders = 1;
-
-  let printer = [{ ::print(p, *this); }];
-  let parser = [{ return ::parse$cppClass(parser, result); }];
-}
-
-//===--===//
-// ShapeFunctionLibraryTerminatorOp
-//===--===//
-
-def ShapeFunctionLibraryTerminatorOp : Shape_Op<"fn_lib_terminator",
-[Terminator, HasParent<"FunctionLibraryOp">]> {
-  let summary = "A pseudo op that marks the end of a shape function library";
-  let description = [{
-`shape_fn_lib_terminator` is a special pseudo terminator operation for the
-shape function library. It has no semantic meaning beyond keeping the body
-well-formed.
-  }];
-  let assemblyFormat = "attr-dict";
-}
-
 #endif // SHAPE_OPS

diff  --git a/mlir/lib/Dialect/Shape/IR/Shape.cpp 
b/mlir/lib/Dialect/Shape/IR/Shape.cpp
index d8c7f4c6736d..cfac2abae3e6 100644
--- a/mlir/lib/Dialect/Shape/IR/Shape.cpp
+++ b/mlir/lib/Dialect/Shape/IR/Shape.cpp
@@ -12,7 +12,6 @@
 #include "mlir/Dialect/Traits.h"
 #include "mlir/IR/Builders.h"
 #include "mlir/IR/DialectImplementation.h"
-#include "mlir/IR/Function.h"
 #include