date:20201126

[llvm-branch-commits] [libcxx] dde0fcd - [libc++] [libc++abi] Mark a few tests as unsupported/xfail on gcc-7/8/9.

2020-11-26 Thread Marek Kurdej via llvm-branch-commits


Author: Marek Kurdej
Date: 2020-11-26T08:59:52+01:00
New Revision: dde0fcd7a7da4066c18ab5e73e0477e856da158f

URL: 
https://github.com/llvm/llvm-project/commit/dde0fcd7a7da4066c18ab5e73e0477e856da158f
DIFF: 
https://github.com/llvm/llvm-project/commit/dde0fcd7a7da4066c18ab5e73e0477e856da158f.diff

LOG: [libc++] [libc++abi] Mark a few tests as unsupported/xfail on gcc-7/8/9.

This should make the builder http://lab.llvm.org:8011/#/builders/101/ happy.
It uses gcc-9 and not Tip-Of-Trunk as its name indicates BTW.
GCC-10 passes all these tests.

Fix gcc warnings: -Wsign-compare, -Wparentheses, -Wpragmas.

Reviewed By: ldionne, #libc, #libc_abi

Differential Revision: https://reviews.llvm.org/D92099

Added: 


Modified: 
libcxx/test/std/experimental/simd/simd.access/default.pass.cpp

libcxx/test/std/strings/basic.string/string.cons/string_view_deduction.fail.cpp

libcxx/test/std/strings/basic.string/string.cons/string_view_size_size_deduction.fail.cpp
libcxx/test/support/filesystem_test_helper.h
libcxxabi/test/dynamic_cast.pass.cpp
libcxxabi/test/dynamic_cast3.pass.cpp
libcxxabi/test/dynamic_cast5.pass.cpp
libcxxabi/test/unwind_06.pass.cpp

Removed: 




diff  --git a/libcxx/test/std/experimental/simd/simd.access/default.pass.cpp 
b/libcxx/test/std/experimental/simd/simd.access/default.pass.cpp
index 1bc1500ea6a7..2ca5ec4482bf 100644
--- a/libcxx/test/std/experimental/simd/simd.access/default.pass.cpp
+++ b/libcxx/test/std/experimental/simd/simd.access/default.pass.cpp
@@ -40,12 +40,12 @@ void test_access() {
 assert(a[0] % b[0] == 42 % 4);
 assert(a[0] << b[0] == (42 << 4));
 assert(a[0] >> b[0] == (42 >> 4));
-assert(a[0] < b[0] == false);
-assert(a[0] <= b[0] == false);
-assert(a[0] > b[0] == true);
-assert(a[0] >= b[0] == true);
-assert(a[0] == b[0] == false);
-assert(a[0] != b[0] == true);
+assert((a[0] < b[0]) == false);
+assert((a[0] <= b[0]) == false);
+assert((a[0] > b[0]) == true);
+assert((a[0] >= b[0]) == true);
+assert((a[0] == b[0]) == false);
+assert((a[0] != b[0]) == true);
 assert((a[0] & b[0]) == (42 & 4));
 assert((a[0] | b[0]) == (42 | 4));
 assert((a[0] ^ b[0]) == (42 ^ 4));
@@ -198,12 +198,12 @@ void test_access() {
 assert(a[0] % b[0] == 42 % 4);
 assert(a[0] << b[0] == (42 << 4));
 assert(a[0] >> b[0] == (42 >> 4));
-assert(a[0] < b[0] == false);
-assert(a[0] <= b[0] == false);
-assert(a[0] > b[0] == true);
-assert(a[0] >= b[0] == true);
-assert(a[0] == b[0] == false);
-assert(a[0] != b[0] == true);
+assert((a[0] < b[0]) == false);
+assert((a[0] <= b[0]) == false);
+assert((a[0] > b[0]) == true);
+assert((a[0] >= b[0]) == true);
+assert((a[0] == b[0]) == false);
+assert((a[0] != b[0]) == true);
 assert((a[0] & b[0]) == (42 & 4));
 assert((a[0] | b[0]) == (42 | 4));
 assert((a[0] ^ b[0]) == (42 ^ 4));

diff  --git 
a/libcxx/test/std/strings/basic.string/string.cons/string_view_deduction.fail.cpp
 
b/libcxx/test/std/strings/basic.string/string.cons/string_view_deduction.fail.cpp
index 1fa2ee0efb1b..aa4c4559696c 100644
--- 
a/libcxx/test/std/strings/basic.string/string.cons/string_view_deduction.fail.cpp
+++ 
b/libcxx/test/std/strings/basic.string/string.cons/string_view_deduction.fail.cpp
@@ -8,6 +8,7 @@
 
 // 
 // UNSUPPORTED: c++03, c++11, c++14
+// UNSUPPORTED: gcc-7
 // XFAIL: libcpp-no-deduction-guides
 
 // template

diff  --git 
a/libcxx/test/std/strings/basic.string/string.cons/string_view_size_size_deduction.fail.cpp
 
b/libcxx/test/std/strings/basic.string/string.cons/string_view_size_size_deduction.fail.cpp
index 07c9002b5b7d..d7a8868977c8 100644
--- 
a/libcxx/test/std/strings/basic.string/string.cons/string_view_size_size_deduction.fail.cpp
+++ 
b/libcxx/test/std/strings/basic.string/string.cons/string_view_size_size_deduction.fail.cpp
@@ -8,6 +8,7 @@
 
 // 
 // UNSUPPORTED: c++03, c++11, c++14
+// UNSUPPORTED: gcc-7
 // XFAIL: libcpp-no-deduction-guides
 
 // template

diff  --git a/libcxx/test/support/filesystem_test_helper.h 
b/libcxx/test/support/filesystem_test_helper.h
index 840c6aa3ce51..ad7ade3a1a58 100644
--- a/libcxx/test/support/filesystem_test_helper.h
+++ b/libcxx/test/support/filesystem_test_helper.h
@@ -184,7 +184,9 @@ struct scoped_test_env
 
 filename = sanitize_path(std::move(filename));
 
-if (size > std::numeric_limits::max()) {
+if (size >
+static_cast::type>(
+std::numeric_limits::max())) {
 fprintf(stderr, "create_file(%s, %ju) too large\n",
 filename.c_str(), size);
 abort();

diff  --git a/libcxxabi/test/dynamic_cast.pass.cpp 
b/libcxxabi/test/dynamic_cast.pass.cpp
index 49ecddb4177b..c1a5980d552b 100644
--- a/libcxxabi/test/dynamic_cast.pass.cpp
+++ b/libcxxabi/test/dynamic_cast.pass.cpp
@@ -6,13 +

[llvm-branch-commits] [openmp] 6b42966 - [OpenMP][OMPT] Fix building with OMPT disabled after 6d3b81664a4b79

2020-11-26 Thread Martin Storsjö via llvm-branch-commits


Author: Martin Storsjö
Date: 2020-11-26T10:09:32+02:00
New Revision: 6b429668ded1aa7de4d586fc6dc8a469799b4d9c

URL: 
https://github.com/llvm/llvm-project/commit/6b429668ded1aa7de4d586fc6dc8a469799b4d9c
DIFF: 
https://github.com/llvm/llvm-project/commit/6b429668ded1aa7de4d586fc6dc8a469799b4d9c.diff

LOG: [OpenMP][OMPT] Fix building with OMPT disabled after 6d3b81664a4b79

Added: 


Modified: 
openmp/runtime/src/ompt-specific.h

Removed: 




diff  --git a/openmp/runtime/src/ompt-specific.h 
b/openmp/runtime/src/ompt-specific.h
index 49aa6451f603..18816e7337c1 100644
--- a/openmp/runtime/src/ompt-specific.h
+++ b/openmp/runtime/src/ompt-specific.h
@@ -109,6 +109,26 @@ inline void ompt_set_thread_state(kmp_info_t *thread, 
ompt_state_t state) {
 inline const char *ompt_get_runtime_version() {
   return &__kmp_version_lib_ver[KMP_VERSION_MAGIC_LEN];
 }
+
+class OmptReturnAddressGuard {
+private:
+  bool SetAddress{false};
+  int Gtid;
+
+public:
+  OmptReturnAddressGuard(int Gtid, void *ReturnAddress) : Gtid(Gtid) {
+if (ompt_enabled.enabled && Gtid >= 0 && __kmp_threads[Gtid] &&
+!__kmp_threads[Gtid]->th.ompt_thread_info.return_address) {
+  SetAddress = true;
+  __kmp_threads[Gtid]->th.ompt_thread_info.return_address = ReturnAddress;
+}
+  }
+  ~OmptReturnAddressGuard() {
+if (SetAddress)
+  __kmp_threads[Gtid]->th.ompt_thread_info.return_address = NULL;
+  }
+};
+
 #endif // OMPT_SUPPORT
 
 // macros providing the OMPT callbacks for reduction clause
@@ -135,23 +155,4 @@ inline const char *ompt_get_runtime_version() {
 #define OMPT_REDUCTION_END
 #endif // ! OMPT_SUPPORT && OMPT_OPTIONAL
 
-class OmptReturnAddressGuard {
-private:
-  bool SetAddress{false};
-  int Gtid;
-
-public:
-  OmptReturnAddressGuard(int Gtid, void *ReturnAddress) : Gtid(Gtid) {
-if (ompt_enabled.enabled && Gtid >= 0 && __kmp_threads[Gtid] &&
-!__kmp_threads[Gtid]->th.ompt_thread_info.return_address) {
-  SetAddress = true;
-  __kmp_threads[Gtid]->th.ompt_thread_info.return_address = ReturnAddress;
-}
-  }
-  ~OmptReturnAddressGuard() {
-if (SetAddress)
-  __kmp_threads[Gtid]->th.ompt_thread_info.return_address = NULL;
-  }
-};
-
 #endif



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[llvm-branch-commits] [libcxx] 69d2567 - [libc++] [www] Fix HTML. NFC.

2020-11-26 Thread Marek Kurdej via llvm-branch-commits


Author: Marek Kurdej
Date: 2020-11-26T09:31:20+01:00
New Revision: 69d25676246d05a10ab0bbee72835e82a962e404

URL: 
https://github.com/llvm/llvm-project/commit/69d25676246d05a10ab0bbee72835e82a962e404
DIFF: 
https://github.com/llvm/llvm-project/commit/69d25676246d05a10ab0bbee72835e82a962e404.diff

LOG: [libc++] [www] Fix HTML. NFC.

Needed for a future automatic update to RST.

Added: 


Modified: 
libcxx/www/cxx1z_status.html
libcxx/www/cxx2a_status.html

Removed: 




diff  --git a/libcxx/www/cxx1z_status.html b/libcxx/www/cxx1z_status.html
index 893af09d2d68..d07c7b45f7ca 100644
--- a/libcxx/www/cxx1z_status.html
+++ b/libcxx/www/cxx1z_status.html
@@ -137,10 +137,10 @@ Paper Status
https://wg21.link/P0504R0";>P0504R0LWGRevisiting 
in-place tag types for 
any/optional/variantIssaquahComplete4.0
https://wg21.link/P0505R0";>P0505R0LWGWording for GB 
50 - constexpr for 
chronoIssaquahComplete4.0
https://wg21.link/P0508R0";>P0508R0LWGWording for GB 
58 - structured bindings for 
node_handlesIssaquah
-   https://wg21.link/P0509R1";>P0509R1LWGUpdating 
“Restrictions on exception handling”IssaquahNothing to 
don/a
+   https://wg21.link/P0509R1";>P0509R1LWGUpdating 
"Restrictions on exception handling"IssaquahNothing to 
don/a
https://wg21.link/P0510R0";>P0510R0LWGDisallowing 
references, incomplete types, arrays, and empty 
variantsIssaquahComplete4.0
https://wg21.link/P0513R0";>P0513R0LWGPoisoning the 
HashIssaquahComplete5.0
-   https://wg21.link/P0516R0";>P0516R0LWGClarify That 
shared_future’s Copy Operations have Wide 
ContractsIssaquahComplete4.0
+   https://wg21.link/P0516R0";>P0516R0LWGClarify That 
shared_future's Copy Operations have Wide 
ContractsIssaquahComplete4.0
https://wg21.link/P0517R0";>P0517R0LWGMake 
future_error 
ConstructibleIssaquahComplete4.0
https://wg21.link/P0521R0";>P0521R0LWGProposed 
Resolution for CA 14 (shared_ptr 
use_count/unique)IssaquahNothing to 
don/a


diff  --git a/libcxx/www/cxx2a_status.html b/libcxx/www/cxx2a_status.html
index bd112d8573bb..9a086549b695 100644
--- a/libcxx/www/cxx2a_status.html
+++ b/libcxx/www/cxx2a_status.html
@@ -158,7 +158,7 @@ Paper Status
 

https://wg21.link/P0325";>P0325LWGto_array from LFTS 
with updatesCologneComplete10.0
-   https://wg21.link/P0408";>P0408LWGEfficient Access 
to basic_stringbuf ’s BufferCologne
+   https://wg21.link/P0408";>P0408LWGEfficient Access 
to basic_stringbuf's BufferCologne
https://wg21.link/P0466";>P0466LWGLayout-compatibility
 and Pointer-interconvertibility 
TraitsCologne
https://wg21.link/P0553";>P0553LWGBit 
operationsCologneComplete9.0
https://wg21.link/P0631";>P0631LWGMath 
ConstantsCologneComplete11.0
@@ -181,7 +181,7 @@ Paper Status
https://wg21.link/P1502";>P1502LWGStandard library 
header units for C++20Cologne
https://wg21.link/P1522";>P1522LWGIterator 
Difference Type and Integer OverflowCologne
https://wg21.link/P1523";>P1523LWGViews and Size 
TypesCologne
-   https://wg21.link/P1612";>P1612LWGRelocate Endian’s 
SpecificationCologneComplete10.0
+   https://wg21.link/P1612";>P1612LWGRelocate Endian's 
SpecificationCologneComplete10.0
https://wg21.link/P1614";>P1614LWGThe Mothership has 
LandedCologneIn Progress
https://wg21.link/P1638";>P1638LWGbasic_istream_view::iterator
 should not be copyableCologne
https://wg21.link/P1643";>P1643LWGAdd wait/notify to 
atomic_refCologne
@@ -222,7 +222,7 @@ Paper Status
https://wg21.link/P1959";>P1959LWGRemove 
std::weak_equality and std::strong_equalityBelfast 

https://wg21.link/P1960";>P1960LWGNB Comment Changes 
Reviewed by SG1Belfast 
https://wg21.link/P1961";>P1961LWGHarmonizing the 
definitions of total order for pointersBelfast 

-   https://wg21.link/P1965";>P1965LWGBlanket Wording 
for Specifying “Hidden Friends”Belfast 

+   https://wg21.link/P1965";>P1965LWGBlanket Wording 
for Specifying "Hidden Friends"Belfast 

 

https://wg21.link/P0586";>P0586LWGSafe integral 
comparisonsPrague 
@@ -467,7 +467,7 @@ Library Working group Issues Status
https://wg21.link/LWG3277";>3277Pre-increment on prvalues is 
not a requirement of 
weakly_incrementableBelfast
https://wg21.link/LWG3149";>3149DefaultConstructible 
should require default initializationBelfast
 
--->
+   
https://wg21.link/LWG1203";>1203More 
useful rvalue stream insertionPrague12.0
https://wg21.link/LWG2859";>2859Definition 
of reachable in [ptr.launder] misses pointer arithmetic from 
pointer-interconvertible objectPrague
https://wg21.link/LWG3018";>3018shared_ptr of 
function typePrague



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[llvm-branch-commits] [llvm] 345fccc - Fix use-of-uninitialized-value in rG75f50e15bf8f

2020-11-26 Thread Zhengyang Liu via llvm-branch-commits


Author: Zhengyang Liu
Date: 2020-11-26T01:39:22-07:00
New Revision: 345fcccb33795600b9c159908c606c5027a4ce19

URL: 
https://github.com/llvm/llvm-project/commit/345fcccb33795600b9c159908c606c5027a4ce19
DIFF: 
https://github.com/llvm/llvm-project/commit/345fcccb33795600b9c159908c606c5027a4ce19.diff

LOG: Fix use-of-uninitialized-value in rG75f50e15bf8f

Differential Revision: https://reviews.llvm.org/D71126

Added: 


Modified: 
llvm/lib/IR/Constants.cpp
llvm/lib/IR/LLVMContextImpl.cpp
llvm/lib/Transforms/Utils/FunctionComparator.cpp

Removed: 




diff  --git a/llvm/lib/IR/Constants.cpp b/llvm/lib/IR/Constants.cpp
index f731021492bf..764d32e39b05 100644
--- a/llvm/lib/IR/Constants.cpp
+++ b/llvm/lib/IR/Constants.cpp
@@ -519,6 +519,9 @@ void llvm::deleteConstant(Constant *C) {
   case Constant::UndefValueVal:
 delete static_cast(C);
 break;
+  case Constant::PoisonValueVal:
+delete static_cast(C);
+break;
   case Constant::ConstantExprVal:
 if (isa(C))
   delete static_cast(C);
@@ -1722,7 +1725,12 @@ UndefValue *UndefValue::get(Type *Ty) {
 /// Remove the constant from the constant table.
 void UndefValue::destroyConstantImpl() {
   // Free the constant and any dangling references to it.
-  getContext().pImpl->UVConstants.erase(getType());
+  if (getValueID() == UndefValueVal) {
+getContext().pImpl->UVConstants.erase(getType());
+  } else if (getValueID() == PoisonValueVal) {
+getContext().pImpl->PVConstants.erase(getType());
+  }
+  llvm_unreachable("Not a undef or a poison!");
 }
 
 PoisonValue *PoisonValue::get(Type *Ty) {

diff  --git a/llvm/lib/IR/LLVMContextImpl.cpp b/llvm/lib/IR/LLVMContextImpl.cpp
index c4f0a0ac8549..875c61cda423 100644
--- a/llvm/lib/IR/LLVMContextImpl.cpp
+++ b/llvm/lib/IR/LLVMContextImpl.cpp
@@ -97,6 +97,7 @@ LLVMContextImpl::~LLVMContextImpl() {
   CAZConstants.clear();
   CPNConstants.clear();
   UVConstants.clear();
+  PVConstants.clear();
   IntConstants.clear();
   FPConstants.clear();
   CDSConstants.clear();

diff  --git a/llvm/lib/Transforms/Utils/FunctionComparator.cpp 
b/llvm/lib/Transforms/Utils/FunctionComparator.cpp
index f25c4e5d6e99..2696557a719f 100644
--- a/llvm/lib/Transforms/Utils/FunctionComparator.cpp
+++ b/llvm/lib/Transforms/Utils/FunctionComparator.cpp
@@ -291,6 +291,7 @@ int FunctionComparator::cmpConstants(const Constant *L,
 
   switch (L->getValueID()) {
   case Value::UndefValueVal:
+  case Value::PoisonValueVal:
   case Value::ConstantTokenNoneVal:
 return TypesRes;
   case Value::ConstantIntVal: {



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[llvm-branch-commits] [clang-tools-extra] d1fd91d - [clangd] Do not treat line as inactive if skipped range ends at character position 0

2020-11-26 Thread Nathan Ridge via llvm-branch-commits


Author: Nathan Ridge
Date: 2020-11-26T03:42:42-05:00
New Revision: d1fd91ddaf9de95428a25d001606c23703e14b31

URL: 
https://github.com/llvm/llvm-project/commit/d1fd91ddaf9de95428a25d001606c23703e14b31
DIFF: 
https://github.com/llvm/llvm-project/commit/d1fd91ddaf9de95428a25d001606c23703e14b31.diff

LOG: [clangd] Do not treat line as inactive if skipped range ends at character 
position 0

Fixes https://github.com/clangd/clangd/issues/602

Differential Revision: https://reviews.llvm.org/D92148

Added: 


Modified: 
clang-tools-extra/clangd/SemanticHighlighting.cpp
clang-tools-extra/clangd/unittests/SemanticHighlightingTests.cpp

Removed: 




diff  --git a/clang-tools-extra/clangd/SemanticHighlighting.cpp 
b/clang-tools-extra/clangd/SemanticHighlighting.cpp
index 44d74f387dd1..5397d328b086 100644
--- a/clang-tools-extra/clangd/SemanticHighlighting.cpp
+++ b/clang-tools-extra/clangd/SemanticHighlighting.cpp
@@ -234,6 +234,10 @@ class HighlightingsBuilder {
   // with line-based 
diff ing.
   assert(R.start.line <= R.end.line);
   for (int Line = R.start.line; Line <= R.end.line; ++Line) {
+// If the end of the inactive range is at the beginning
+// of a line, that line is not inactive.
+if (Line == R.end.line && R.end.character == 0)
+  continue;
 // Copy tokens before the inactive line
 for (; It != NonConflicting.end() && It->R.start.line < Line; ++It)
   WithInactiveLines.push_back(std::move(*It));

diff  --git a/clang-tools-extra/clangd/unittests/SemanticHighlightingTests.cpp 
b/clang-tools-extra/clangd/unittests/SemanticHighlightingTests.cpp
index 232be6a78380..79f3af264c0f 100644
--- a/clang-tools-extra/clangd/unittests/SemanticHighlightingTests.cpp
+++ b/clang-tools-extra/clangd/unittests/SemanticHighlightingTests.cpp
@@ -623,18 +623,23 @@ TEST(SemanticHighlighting, GetsCorrectTokens) {
   // Code after the preamble.
   // Code inside inactive blocks does not get regular highlightings
   // because it's not part of the AST.
-$InactiveCode[[#ifdef test]]
+  #define $Macro[[test2]]
+$InactiveCode[[#if defined(test)]]
 $InactiveCode[[int Inactive2;]]
+$InactiveCode[[#elif defined(test2)]]
+  int $Variable[[Active1]];
+$InactiveCode[[#else]]
+$InactiveCode[[int Inactive3;]]
 $InactiveCode[[#endif]]
 
   #ifndef $Macro[[test]]
-  int $Variable[[Active1]];
+  int $Variable[[Active2]];
   #endif
 
 $InactiveCode[[#ifdef test]]
-$InactiveCode[[int Inactive3;]]
+$InactiveCode[[int Inactive4;]]
 $InactiveCode[[#else]]
-  int $Variable[[Active2]];
+  int $Variable[[Active3]];
   #endif
 )cpp",
   // Argument to 'sizeof...'



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[llvm-branch-commits] [lldb] 53a14a4 - [lldb] Fix TestThreadStepOut.py after "Flush local value map on every instruction"

2020-11-26 Thread Raphael Isemann via llvm-branch-commits


Author: Raphael Isemann
Date: 2020-11-26T09:43:47+01:00
New Revision: 53a14a47ee89dadb8798ca8ed19848f33f4551d5

URL: 
https://github.com/llvm/llvm-project/commit/53a14a47ee89dadb8798ca8ed19848f33f4551d5
DIFF: 
https://github.com/llvm/llvm-project/commit/53a14a47ee89dadb8798ca8ed19848f33f4551d5.diff

LOG: [lldb] Fix TestThreadStepOut.py after "Flush local value map on every 
instruction"

After cf1c774d6ace59c5adc9ab71b31e762c1be695b1, Clang seems to generate code
that is more similar to icc/Clang, so we can use the same line numbers for
all compilers in this test.

Added: 


Modified: 
lldb/test/API/functionalities/thread/step_out/TestThreadStepOut.py
lldb/test/API/functionalities/thread/step_out/main.cpp

Removed: 




diff  --git 
a/lldb/test/API/functionalities/thread/step_out/TestThreadStepOut.py 
b/lldb/test/API/functionalities/thread/step_out/TestThreadStepOut.py
index eb2d264ec2e3..ae46530f4ab5 100644
--- a/lldb/test/API/functionalities/thread/step_out/TestThreadStepOut.py
+++ b/lldb/test/API/functionalities/thread/step_out/TestThreadStepOut.py
@@ -70,12 +70,8 @@ def setUp(self):
 self.bkpt_string = '// Set breakpoint here'
 self.breakpoint = line_number('main.cpp', self.bkpt_string)   
 
-if "gcc" in self.getCompiler() or self.isIntelCompiler():
-self.step_out_destination = line_number(
-'main.cpp', '// Expect to stop here after step-out (icc and 
gcc)')
-else:
-self.step_out_destination = line_number(
-'main.cpp', '// Expect to stop here after step-out (clang)')
+self.step_out_destination = line_number(
+ 'main.cpp', '// Expect to stop here after step-out.')
 
 def step_out_single_thread_with_cmd(self):
 self.step_out_with_cmd("this-thread")

diff  --git a/lldb/test/API/functionalities/thread/step_out/main.cpp 
b/lldb/test/API/functionalities/thread/step_out/main.cpp
index 14d84010de8a..e7dd230d239c 100644
--- a/lldb/test/API/functionalities/thread/step_out/main.cpp
+++ b/lldb/test/API/functionalities/thread/step_out/main.cpp
@@ -19,10 +19,10 @@ thread_func ()
 pseudo_barrier_wait(g_barrier);
 
 // Do something
-step_out_of_here(); // Expect to stop here after step-out (clang)
+step_out_of_here();
 
 // Return
-return NULL;  // Expect to stop here after step-out (icc and gcc)
+return NULL;  // Expect to stop here after step-out.
 }
 
 int main ()



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[llvm-branch-commits] [llvm] 4f87d30 - [AMDGPU] Introduce and use isGFX10Plus. NFC.

2020-11-26 Thread Jay Foad via llvm-branch-commits


Author: Jay Foad
Date: 2020-11-26T09:02:36Z
New Revision: 4f87d30a06dd08cec45cb595e9dbed6345c9a7c5

URL: 
https://github.com/llvm/llvm-project/commit/4f87d30a06dd08cec45cb595e9dbed6345c9a7c5
DIFF: 
https://github.com/llvm/llvm-project/commit/4f87d30a06dd08cec45cb595e9dbed6345c9a7c5.diff

LOG: [AMDGPU] Introduce and use isGFX10Plus. NFC.

It's more future-proof to use isGFX10Plus from the start, on the
assumption that future architectures will be based on current
architectures.

Also make use of the existing isGFX9Plus in a few places.

Differential Revision: https://reviews.llvm.org/D92092

Added: 


Modified: 
llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp
llvm/lib/Target/AMDGPU/SIISelLowering.cpp
llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h

Removed: 




diff  --git a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp 
b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
index 8148d0487802..137f6896c87b 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
@@ -338,7 +338,7 @@ bool AMDGPUAsmPrinter::doFinalization(Module &M) {
   // causing stale data in caches. Arguably this should be done by the linker,
   // which is why this isn't done for Mesa.
   const MCSubtargetInfo &STI = *getGlobalSTI();
-  if (AMDGPU::isGFX10(STI) &&
+  if (AMDGPU::isGFX10Plus(STI) &&
   (STI.getTargetTriple().getOS() == Triple::AMDHSA ||
STI.getTargetTriple().getOS() == Triple::AMDPAL)) {
 OutStreamer->SwitchSection(getObjFileLowering().getTextSection());

diff  --git a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp 
b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
index 37a79ce4fa37..20b7c7849397 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
@@ -1485,7 +1485,7 @@ bool AMDGPUInstructionSelector::selectImageIntrinsic(
   const AMDGPU::MIMGMIPMappingInfo *MIPMappingInfo =
   AMDGPU::getMIMGMIPMappingInfo(Intr->BaseOpcode);
   unsigned IntrOpcode = Intr->BaseOpcode;
-  const bool IsGFX10 = STI.getGeneration() >= AMDGPUSubtarget::GFX10;
+  const bool IsGFX10Plus = AMDGPU::isGFX10Plus(STI);
 
   const unsigned ArgOffset = MI.getNumExplicitDefs() + 1;
 
@@ -1603,12 +1603,12 @@ bool AMDGPUInstructionSelector::selectImageIntrinsic(
 GLC = true; // TODO no-return optimization
 if (!parseCachePolicy(
 MI.getOperand(ArgOffset + Intr->CachePolicyIndex).getImm(), 
nullptr,
-&SLC, IsGFX10 ? &DLC : nullptr))
+&SLC, IsGFX10Plus ? &DLC : nullptr))
   return false;
   } else {
 if (!parseCachePolicy(
 MI.getOperand(ArgOffset + Intr->CachePolicyIndex).getImm(), &GLC,
-&SLC, IsGFX10 ? &DLC : nullptr))
+&SLC, IsGFX10Plus ? &DLC : nullptr))
   return false;
   }
 
@@ -1641,7 +1641,7 @@ bool AMDGPUInstructionSelector::selectImageIntrinsic(
 ++NumVDataDwords;
 
   int Opcode = -1;
-  if (IsGFX10) {
+  if (IsGFX10Plus) {
 Opcode = AMDGPU::getMIMGOpcode(IntrOpcode,
UseNSA ? AMDGPU::MIMGEncGfx10NSA
   : AMDGPU::MIMGEncGfx10Default,
@@ -1693,22 +1693,22 @@ bool AMDGPUInstructionSelector::selectImageIntrinsic(
 
   MIB.addImm(DMask); // dmask
 
-  if (IsGFX10)
+  if (IsGFX10Plus)
 MIB.addImm(DimInfo->Encoding);
   MIB.addImm(Unorm);
-  if (IsGFX10)
+  if (IsGFX10Plus)
 MIB.addImm(DLC);
 
   MIB.addImm(GLC);
   MIB.addImm(SLC);
   MIB.addImm(IsA16 &&  // a16 or r128
  STI.hasFeature(AMDGPU::FeatureR128A16) ? -1 : 0);
-  if (IsGFX10)
+  if (IsGFX10Plus)
 MIB.addImm(IsA16 ? -1 : 0);
 
   MIB.addImm(TFE); // tfe
   MIB.addImm(LWE); // lwe
-  if (!IsGFX10)
+  if (!IsGFX10Plus)
 MIB.addImm(DimInfo->DA ? -1 : 0);
   if (BaseOpcode->HasD16)
 MIB.addImm(IsD16 ? -1 : 0);

diff  --git a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp 
b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
index 4f05ba5ab576..b8b747ea8f99 100644
--- a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+++ b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
@@ -1232,6 +1232,8 @@ class AMDGPUAsmParser : public MCTargetAsmParser {
 return AMDGPU::isGFX10(getSTI());
   }
 
+  bool isGFX10Plus() const { return AMDGPU::isGFX10Plus(getSTI()); }
+
   bool isGFX10_BEncoding() const {
 return AMDGPU::isGFX10_BEncoding(getSTI());
   }
@@ -1248,9 +1250,7 @@ class AMDGPUAsmParser : public MCTargetAsmParser {
 return !isVI

[llvm-branch-commits] [libcxx] 841132e - [libc++] [P0966] [C++20] Fix bug PR45368 by correctly implementing P0966: string::reserve should not shrink.

2020-11-26 Thread Marek Kurdej via llvm-branch-commits


Author: Marek Kurdej
Date: 2020-11-26T10:13:12+01:00
New Revision: 841132efda2157c5f9e07cf31469470a6481ffd9

URL: 
https://github.com/llvm/llvm-project/commit/841132efda2157c5f9e07cf31469470a6481ffd9
DIFF: 
https://github.com/llvm/llvm-project/commit/841132efda2157c5f9e07cf31469470a6481ffd9.diff

LOG: [libc++] [P0966] [C++20] Fix bug PR45368 by correctly implementing P0966: 
string::reserve should not shrink.

This patch fixes the implementation as well as the tests that didn't actually 
test the wanted behaviour.
You'll find all the details in the bug report.
It adds as well deprecation warning for reserve() (without argument) and adds a 
test.

http://wg21.link/P0966R1
https://bugs.llvm.org/show_bug.cgi?id=45368
https://reviews.llvm.org/D54992

Reviewed By: ldionne, #libc

Differential Revision: https://reviews.llvm.org/D91778

Added: 
libcxx/test/libcxx/strings/basic.string/string.capacity/reserve.pass.cpp

libcxx/test/std/strings/basic.string/string.capacity/reserve.deprecated_in_cxx20.verify.cpp
libcxx/test/std/strings/basic.string/string.capacity/reserve_size.pass.cpp

Modified: 
libcxx/docs/Cxx2aStatus.rst
libcxx/docs/Cxx2aStatusPaperStatus.csv
libcxx/include/__config
libcxx/include/string
libcxx/test/std/strings/basic.string/string.capacity/reserve.pass.cpp

Removed: 




diff  --git a/libcxx/docs/Cxx2aStatus.rst b/libcxx/docs/Cxx2aStatus.rst
index 562250cebd9b..4fd4e356710f 100644
--- a/libcxx/docs/Cxx2aStatus.rst
+++ b/libcxx/docs/Cxx2aStatus.rst
@@ -40,6 +40,7 @@ Paper Status
 
.. [#note-P0202] P0202: The missing bits in P0202 are in ``copy`` and 
``copy_backwards`` (and the ones that call them: ``copy_n``, ``set_union``, 
``set_
diff erence``, and ``set_symmetric_
diff erence``). This is because the first two algorithms have specializations 
that call ``memmove`` which is not constexpr. See `Bug 25165 
`__
.. [#note-P0600] P0600: The missing bits in P0600 are in |sect|\ 
[mem.res.class], |sect|\ [mem.poly.allocator.class], and |sect|\ 
[container.node.overview].
+   .. [#note-P0966] P0966: It was previously erroneously marked as complete in 
version 8.0. See `bug 45368 `__.
 
.. [#note-P0619] P0619: Only ``std::allocator`` part is implemented.
 

diff  --git a/libcxx/docs/Cxx2aStatusPaperStatus.csv 
b/libcxx/docs/Cxx2aStatusPaperStatus.csv
index ee7acab20ba2..cf476c87a130 100644
--- a/libcxx/docs/Cxx2aStatusPaperStatus.csv
+++ b/libcxx/docs/Cxx2aStatusPaperStatus.csv
@@ -24,7 +24,7 @@
 "`P0809R0 `__","LWG","Comparing Unordered 
Containers","Jacksonville","",""
 "`P0858R0 `__","LWG","Constexpr iterator 
requirements","Jacksonville","",""
 "`P0905R1 `__","CWG","Symmetry for 
spaceship","Jacksonville","",""
-"`P0966R1 `__","LWG","``string::reserve``\  Should 
Not Shrink","Jacksonville","|Complete|","8.0"
+"`P0966R1 `__","LWG","``string::reserve``\  Should 
Not Shrink","Jacksonville","|Complete| [#note-P0966]_","12.0"
 "","","","","",""
 "`P0019R8 `__","LWG","Atomic Ref","Rapperswil","",""
 "`P0458R2 `__","LWG","Checking for Existence of an 
Element in Associative Containers","Rapperswil","|Complete|",""

diff  --git a/libcxx/include/__config b/libcxx/include/__config
index 069fc4193b53..de40ffc3162e 100644
--- a/libcxx/include/__config
+++ b/libcxx/include/__config
@@ -991,6 +991,12 @@ typedef unsigned int   char32_t;
 #  define _LIBCPP_DEPRECATED_IN_CXX17
 #endif
 
+#if _LIBCPP_STD_VER > 17
+#  define _LIBCPP_DEPRECATED_IN_CXX20 _LIBCPP_DEPRECATED
+#else
+#  define _LIBCPP_DEPRECATED_IN_CXX20
+#endif
+
 // Macros to enter and leave a state where deprecation warnings are suppressed.
 #if !defined(_LIBCPP_SUPPRESS_DEPRECATED_PUSH) && \
 (defined(_LIBCPP_COMPILER_CLANG) || defined(_LIBCPP_COMPILER_GCC))

diff  --git a/libcxx/include/string b/libcxx/include/string
index 9f7a2a9e5cb0..d3e53592f5f1 100644
--- a/libcxx/include/string
+++ b/libcxx/include/string
@@ -153,7 +153,8 @@ public:
 void resize(size_type n, value_type c);
 void resize(size_type n);
 
-void reserve(size_type res_arg = 0);
+void reserve(size_type res_arg);
+void reserve(); // deprecated in C++20
 void shrink_to_fit();
 void clear() noexcept;
 bool empty() const noexcept;
@@ -954,13 +955,13 @@ public:
 void resize(size_type __n, value_type __c);
 _LIBCPP_INLINE_VISIBILITY void resize(size_type __n) {resize(__n, 
value_type());}
 
-void reserve(size_type __res_arg);
+void reserve(size_type __requested_capacity);
 _LIBCPP_INLINE_VISIBILITY void __resize_default_init(size_type __n);
 
+_LIBCPP_DEPRECATED_IN_CXX20 _LIBCPP_INLINE_VISIBILITY
+void reserve() _NOEXCEPT {shrink_to_fit();}
 _LI

[llvm-branch-commits] [libcxx] 8db009d - [libc++] Fix gcc warning -Wsign-compare.

2020-11-26 Thread Marek Kurdej via llvm-branch-commits


Author: Marek Kurdej
Date: 2020-11-26T10:20:09+01:00
New Revision: 8db009d273676ef4c20254b75f8f8b54dca44d38

URL: 
https://github.com/llvm/llvm-project/commit/8db009d273676ef4c20254b75f8f8b54dca44d38
DIFF: 
https://github.com/llvm/llvm-project/commit/8db009d273676ef4c20254b75f8f8b54dca44d38.diff

LOG: [libc++] Fix gcc warning -Wsign-compare.

Added: 


Modified: 
libcxx/test/support/filesystem_test_helper.h

Removed: 




diff  --git a/libcxx/test/support/filesystem_test_helper.h 
b/libcxx/test/support/filesystem_test_helper.h
index ad7ade3a1a58..81366580db89 100644
--- a/libcxx/test/support/filesystem_test_helper.h
+++ b/libcxx/test/support/filesystem_test_helper.h
@@ -185,7 +185,7 @@ struct scoped_test_env
 filename = sanitize_path(std::move(filename));
 
 if (size >
-static_cast::type>(
+static_cast::type>(
 std::numeric_limits::max())) {
 fprintf(stderr, "create_file(%s, %ju) too large\n",
 filename.c_str(), size);



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[llvm-branch-commits] [libcxx] 83d2660 - [NFC][libc++] Mark LWG3296 as complete.

2020-11-26 Thread Mark de Wever via llvm-branch-commits


Author: Mark de Wever
Date: 2020-11-26T10:39:44+01:00
New Revision: 83d26603e0402befe32186d2a2706bdf79d0a1cf

URL: 
https://github.com/llvm/llvm-project/commit/83d26603e0402befe32186d2a2706bdf79d0a1cf
DIFF: 
https://github.com/llvm/llvm-project/commit/83d26603e0402befe32186d2a2706bdf79d0a1cf.diff

LOG: [NFC][libc++] Mark LWG3296 as complete.

I recalled Marshall had already made this change. The change is
committed in e3f89a989a23b9bfcb9f9d01172cebb63db627e1.

Added: 


Modified: 
libcxx/docs/Cxx2aStatusIssuesStatus.csv

Removed: 




diff  --git a/libcxx/docs/Cxx2aStatusIssuesStatus.csv 
b/libcxx/docs/Cxx2aStatusIssuesStatus.csv
index 71f54a3fa4a8..8fc666717987 100644
--- a/libcxx/docs/Cxx2aStatusIssuesStatus.csv
+++ b/libcxx/docs/Cxx2aStatusIssuesStatus.csv
@@ -225,7 +225,7 @@
 "`3291 `__","``iota_view::iterator``\  has the 
wrong ``iterator_category``\ ","Prague",""
 "`3292 `__","``iota_view``\  is 
under-constrained","Prague",""
 "`3294 `__","``zoned_time``\  deduction guides 
misinterprets ``string``\ /``char*``\ ","Prague",""
-"`3296 `__","Inconsistent default argument for 
``basic_regex<>::assign``\ ","Prague",""
+"`3296 `__","Inconsistent default argument for 
``basic_regex<>::assign``\ ","Prague","|Complete|"
 "`3299 `__","Pointers don't need customized 
iterator behavior","Prague",""
 "`3300 `__","Non-array ``ssize``\  overload is 
underconstrained","Prague",""
 "`3301 `__","``transform_view::iterator``\  has 
incorrect ``iterator_category``\ ","Prague",""



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[llvm-branch-commits] [llvm] 3b6481e - Revert "[SCEV] Use isKnownPredicateAt in isLoopBackedgeGuardedByCond"

2020-11-26 Thread Max Kazantsev via llvm-branch-commits


Author: Max Kazantsev
Date: 2020-11-26T16:42:43+07:00
New Revision: 3b6481eae2597f656b9f5bb6a5eb5438eb8cb294

URL: 
https://github.com/llvm/llvm-project/commit/3b6481eae2597f656b9f5bb6a5eb5438eb8cb294
DIFF: 
https://github.com/llvm/llvm-project/commit/3b6481eae2597f656b9f5bb6a5eb5438eb8cb294.diff

LOG: Revert "[SCEV] Use isKnownPredicateAt in isLoopBackedgeGuardedByCond"

This reverts commit 14f2ad0e3cc54d5eb254b545a469e8ffdb62b119.

Reverting to investigate compile time drop.

Differential Revision: https://reviews.llvm.org/D92152

Added: 


Modified: 
llvm/lib/Analysis/ScalarEvolution.cpp
llvm/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll

Removed: 




diff  --git a/llvm/lib/Analysis/ScalarEvolution.cpp 
b/llvm/lib/Analysis/ScalarEvolution.cpp
index 31b88c92a889..53fd668be05c 100644
--- a/llvm/lib/Analysis/ScalarEvolution.cpp
+++ b/llvm/lib/Analysis/ScalarEvolution.cpp
@@ -9911,7 +9911,42 @@ ScalarEvolution::isLoopBackedgeGuardedByCond(const Loop 
*L,
   if (isImpliedViaGuard(Latch, Pred, LHS, RHS))
 return true;
 
-  return isKnownPredicateAt(Pred, LHS, RHS, Latch->getTerminator());
+  for (DomTreeNode *DTN = DT[Latch], *HeaderDTN = DT[L->getHeader()];
+   DTN != HeaderDTN; DTN = DTN->getIDom()) {
+assert(DTN && "should reach the loop header before reaching the root!");
+
+BasicBlock *BB = DTN->getBlock();
+if (isImpliedViaGuard(BB, Pred, LHS, RHS))
+  return true;
+
+BasicBlock *PBB = BB->getSinglePredecessor();
+if (!PBB)
+  continue;
+
+BranchInst *ContinuePredicate = dyn_cast(PBB->getTerminator());
+if (!ContinuePredicate || !ContinuePredicate->isConditional())
+  continue;
+
+Value *Condition = ContinuePredicate->getCondition();
+
+// If we have an edge `E` within the loop body that dominates the only
+// latch, the condition guarding `E` also guards the backedge.  This
+// reasoning works only for loops with a single latch.
+
+BasicBlockEdge DominatingEdge(PBB, BB);
+if (DominatingEdge.isSingleEdge()) {
+  // We're constructively (and conservatively) enumerating edges within the
+  // loop body that dominate the latch.  The dominator tree better agree
+  // with us on this:
+  assert(DT.dominates(DominatingEdge, Latch) && "should be!");
+
+  if (isImpliedCond(Pred, LHS, RHS, Condition,
+BB != ContinuePredicate->getSuccessor(0)))
+return true;
+}
+  }
+
+  return false;
 }
 
 bool ScalarEvolution::isBasicBlockEntryGuardedByCond(const BasicBlock *BB,

diff  --git a/llvm/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll 
b/llvm/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll
index c39828923d5f..8a07a49303d2 100644
--- a/llvm/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll
+++ b/llvm/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll
@@ -69,7 +69,7 @@ define void @_Z15IntegerToStringjjR7Vector2(i32 %i, i32 
%radix, %struct.Vector2*
 ; CHECK-NEXT:[[UGLYGEP2:%.*]] = bitcast i8* [[UGLYGEP]] to i16*
 ; CHECK-NEXT:[[TMP29:%.*]] = load i16, i16* [[LSR_IV810]], align 2
 ; CHECK-NEXT:store i16 [[TMP29]], i16* [[UGLYGEP2]], align 2
-; CHECK-NEXT:[[LSR_IV_NEXT]] = add nuw nsw i64 [[LSR_IV]], 2
+; CHECK-NEXT:[[LSR_IV_NEXT]] = add i64 [[LSR_IV]], 2
 ; CHECK-NEXT:[[LSR_IV_NEXT3:%.*]] = inttoptr i64 [[LSR_IV_NEXT]] to i16*
 ; CHECK-NEXT:[[SCEVGEP9:%.*]] = getelementptr [33 x i16], [33 x i16]* 
[[LSR_IV8]], i64 0, i64 1
 ; CHECK-NEXT:[[TMP3]] = bitcast i16* [[SCEVGEP9]] to [33 x i16]*



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[llvm-branch-commits] [llvm] d8ffb1f - [llvm-profgen] [docs] Fix invalid header. Add to ToC. NFC.

2020-11-26 Thread Marek Kurdej via llvm-branch-commits


Author: Marek Kurdej
Date: 2020-11-26T10:45:05+01:00
New Revision: d8ffb1f6a7572b64d5fa6b821c5c143e0e90bb6d

URL: 
https://github.com/llvm/llvm-project/commit/d8ffb1f6a7572b64d5fa6b821c5c143e0e90bb6d
DIFF: 
https://github.com/llvm/llvm-project/commit/d8ffb1f6a7572b64d5fa6b821c5c143e0e90bb6d.diff

LOG: [llvm-profgen] [docs] Fix invalid header. Add to ToC. NFC.

Added: 


Modified: 
llvm/docs/CommandGuide/index.rst
llvm/docs/CommandGuide/llvm-profgen.rst

Removed: 




diff  --git a/llvm/docs/CommandGuide/index.rst 
b/llvm/docs/CommandGuide/index.rst
index f822be96ceb0..f6a1fa970642 100644
--- a/llvm/docs/CommandGuide/index.rst
+++ b/llvm/docs/CommandGuide/index.rst
@@ -74,5 +74,6 @@ Developer Tools
tblgen
lit
llvm-exegesis
-   llvm-pdbutil
llvm-locstats
+   llvm-pdbutil
+   llvm-profgen

diff  --git a/llvm/docs/CommandGuide/llvm-profgen.rst 
b/llvm/docs/CommandGuide/llvm-profgen.rst
index 5197b2318e95..d9f9692f6011 100644
--- a/llvm/docs/CommandGuide/llvm-profgen.rst
+++ b/llvm/docs/CommandGuide/llvm-profgen.rst
@@ -1,5 +1,5 @@
 llvm-profgen - LLVM SPGO profile generation tool
-=
+
 
 .. program:: llvm-profgen
 



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[llvm-branch-commits] [llvm] 8fb8fb2 - [RISCV] Add test cases for missed opportunities to use sbsetw/sbclrw/sbinvw when the result isn't known to be sign extended.

2020-11-26 Thread Craig Topper via llvm-branch-commits


Author: Craig Topper
Date: 2020-11-26T02:03:06-08:00
New Revision: 8fb8fb2c607794fe4cde69713f2fa556f613dab1

URL: 
https://github.com/llvm/llvm-project/commit/8fb8fb2c607794fe4cde69713f2fa556f613dab1
DIFF: 
https://github.com/llvm/llvm-project/commit/8fb8fb2c607794fe4cde69713f2fa556f613dab1.diff

LOG: [RISCV] Add test cases for missed opportunities to use 
sbsetw/sbclrw/sbinvw when the result isn't known to be sign extended.

If the input isn't sign extended, but the output of the or/xor/and
is used by a sign_inreg we can still use sbsetw/sbclrw/sbinvw.

Added: 


Modified: 
llvm/test/CodeGen/RISCV/rv64Zbs.ll

Removed: 




diff  --git a/llvm/test/CodeGen/RISCV/rv64Zbs.ll 
b/llvm/test/CodeGen/RISCV/rv64Zbs.ll
index c81eb7176d62..be6b5ad54004 100644
--- a/llvm/test/CodeGen/RISCV/rv64Zbs.ll
+++ b/llvm/test/CodeGen/RISCV/rv64Zbs.ll
@@ -55,6 +55,42 @@ define signext i32 @sbclr_i32_no_mask(i32 signext %a, i32 
signext %b) nounwind {
   ret i32 %and1
 }
 
+define signext i32 @sbclr_i32_load(i32* %p, i32 signext %b) nounwind {
+; RV64I-LABEL: sbclr_i32_load:
+; RV64I:   # %bb.0:
+; RV64I-NEXT:lw a0, 0(a0)
+; RV64I-NEXT:addi a2, zero, 1
+; RV64I-NEXT:sllw a1, a2, a1
+; RV64I-NEXT:not a1, a1
+; RV64I-NEXT:and a0, a1, a0
+; RV64I-NEXT:sext.w a0, a0
+; RV64I-NEXT:ret
+;
+; RV64IB-LABEL: sbclr_i32_load:
+; RV64IB:   # %bb.0:
+; RV64IB-NEXT:lw a0, 0(a0)
+; RV64IB-NEXT:addi a2, zero, 1
+; RV64IB-NEXT:sllw a1, a2, a1
+; RV64IB-NEXT:andn a0, a0, a1
+; RV64IB-NEXT:sext.w a0, a0
+; RV64IB-NEXT:ret
+;
+; RV64IBS-LABEL: sbclr_i32_load:
+; RV64IBS:   # %bb.0:
+; RV64IBS-NEXT:lw a0, 0(a0)
+; RV64IBS-NEXT:addi a2, zero, 1
+; RV64IBS-NEXT:sllw a1, a2, a1
+; RV64IBS-NEXT:not a1, a1
+; RV64IBS-NEXT:and a0, a1, a0
+; RV64IBS-NEXT:sext.w a0, a0
+; RV64IBS-NEXT:ret
+  %a = load i32, i32* %p
+  %shl = shl i32 1, %b
+  %neg = xor i32 %shl, -1
+  %and1 = and i32 %neg, %a
+  ret i32 %and1
+}
+
 define i64 @sbclr_i64(i64 %a, i64 %b) nounwind {
 ; RV64I-LABEL: sbclr_i64:
 ; RV64I:   # %bb.0:
@@ -149,6 +185,39 @@ define signext i32 @sbset_i32_no_mask(i32 signext %a, i32 
signext %b) nounwind {
   ret i32 %or
 }
 
+define signext i32 @sbset_i32_load(i32* %p, i32 signext %b) nounwind {
+; RV64I-LABEL: sbset_i32_load:
+; RV64I:   # %bb.0:
+; RV64I-NEXT:lw a0, 0(a0)
+; RV64I-NEXT:addi a2, zero, 1
+; RV64I-NEXT:sllw a1, a2, a1
+; RV64I-NEXT:or a0, a1, a0
+; RV64I-NEXT:sext.w a0, a0
+; RV64I-NEXT:ret
+;
+; RV64IB-LABEL: sbset_i32_load:
+; RV64IB:   # %bb.0:
+; RV64IB-NEXT:lw a0, 0(a0)
+; RV64IB-NEXT:addi a2, zero, 1
+; RV64IB-NEXT:sllw a1, a2, a1
+; RV64IB-NEXT:or a0, a1, a0
+; RV64IB-NEXT:sext.w a0, a0
+; RV64IB-NEXT:ret
+;
+; RV64IBS-LABEL: sbset_i32_load:
+; RV64IBS:   # %bb.0:
+; RV64IBS-NEXT:lw a0, 0(a0)
+; RV64IBS-NEXT:addi a2, zero, 1
+; RV64IBS-NEXT:sllw a1, a2, a1
+; RV64IBS-NEXT:or a0, a1, a0
+; RV64IBS-NEXT:sext.w a0, a0
+; RV64IBS-NEXT:ret
+  %a = load i32, i32* %p
+  %shl = shl i32 1, %b
+  %or = or i32 %shl, %a
+  ret i32 %or
+}
+
 define i64 @sbset_i64(i64 %a, i64 %b) nounwind {
 ; RV64I-LABEL: sbset_i64:
 ; RV64I:   # %bb.0:
@@ -239,6 +308,39 @@ define signext i32 @sbinv_i32_no_mask(i32 signext %a, i32 
signext %b) nounwind {
   ret i32 %xor
 }
 
+define signext i32 @sbinv_i32_load(i32* %p, i32 signext %b) nounwind {
+; RV64I-LABEL: sbinv_i32_load:
+; RV64I:   # %bb.0:
+; RV64I-NEXT:lw a0, 0(a0)
+; RV64I-NEXT:addi a2, zero, 1
+; RV64I-NEXT:sllw a1, a2, a1
+; RV64I-NEXT:xor a0, a1, a0
+; RV64I-NEXT:sext.w a0, a0
+; RV64I-NEXT:ret
+;
+; RV64IB-LABEL: sbinv_i32_load:
+; RV64IB:   # %bb.0:
+; RV64IB-NEXT:lw a0, 0(a0)
+; RV64IB-NEXT:addi a2, zero, 1
+; RV64IB-NEXT:sllw a1, a2, a1
+; RV64IB-NEXT:xor a0, a1, a0
+; RV64IB-NEXT:sext.w a0, a0
+; RV64IB-NEXT:ret
+;
+; RV64IBS-LABEL: sbinv_i32_load:
+; RV64IBS:   # %bb.0:
+; RV64IBS-NEXT:lw a0, 0(a0)
+; RV64IBS-NEXT:addi a2, zero, 1
+; RV64IBS-NEXT:sllw a1, a2, a1
+; RV64IBS-NEXT:xor a0, a1, a0
+; RV64IBS-NEXT:sext.w a0, a0
+; RV64IBS-NEXT:ret
+  %a = load i32, i32* %p
+  %shl = shl i32 1, %b
+  %xor = xor i32 %shl, %a
+  ret i32 %xor
+}
+
 define i64 @sbinv_i64(i64 %a, i64 %b) nounwind {
 ; RV64I-LABEL: sbinv_i64:
 ; RV64I:   # %bb.0:



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[llvm-branch-commits] [llvm] d9500c2 - [RISCV] Add isel patterns for sbsetw/sbclrw/sbinvw with sext_inreg as the root.

2020-11-26 Thread Craig Topper via llvm-branch-commits


Author: Craig Topper
Date: 2020-11-26T02:03:06-08:00
New Revision: d9500c2e230e9cc68d3d647864fa824cc3c06b3f

URL: 
https://github.com/llvm/llvm-project/commit/d9500c2e230e9cc68d3d647864fa824cc3c06b3f
DIFF: 
https://github.com/llvm/llvm-project/commit/d9500c2e230e9cc68d3d647864fa824cc3c06b3f.diff

LOG: [RISCV] Add isel patterns for sbsetw/sbclrw/sbinvw with sext_inreg as the 
root.

This handles cases were the input isn't known to be sign extended.

Added: 


Modified: 
llvm/lib/Target/RISCV/RISCVInstrInfoB.td
llvm/test/CodeGen/RISCV/rv64Zbs.ll

Removed: 




diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfoB.td 
b/llvm/lib/Target/RISCV/RISCVInstrInfoB.td
index 29ccffb05cfd..e80ef9987b45 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoB.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoB.td
@@ -893,10 +893,16 @@ def : Pat<(riscv_rolw GPR:$rs1, uimm5:$rs2),
 let Predicates = [HasStdExtZbs, IsRV64] in {
 def : Pat<(and (not (riscv_sllw 1, GPR:$rs2)), (assertsexti32 GPR:$rs1)),
   (SBCLRW GPR:$rs1, GPR:$rs2)>;
+def : Pat<(sext_inreg (and (not (riscv_sllw 1, GPR:$rs2)), GPR:$rs1), i32),
+  (SBCLRW GPR:$rs1, GPR:$rs2)>;
 def : Pat<(or (riscv_sllw 1, GPR:$rs2), (assertsexti32 GPR:$rs1)),
   (SBSETW GPR:$rs1, GPR:$rs2)>;
+def : Pat<(sext_inreg (or (riscv_sllw 1, GPR:$rs2), GPR:$rs1), i32),
+  (SBSETW GPR:$rs1, GPR:$rs2)>;
 def : Pat<(xor (riscv_sllw 1, GPR:$rs2), (assertsexti32 GPR:$rs1)),
   (SBINVW GPR:$rs1, GPR:$rs2)>;
+def : Pat<(sext_inreg (xor (riscv_sllw 1, GPR:$rs2), GPR:$rs1), i32),
+  (SBINVW GPR:$rs1, GPR:$rs2)>;
 def : Pat<(and (riscv_srlw GPR:$rs1, GPR:$rs2), 1),
   (SBEXTW GPR:$rs1, GPR:$rs2)>;
 } // Predicates = [HasStdExtZbs, IsRV64]

diff  --git a/llvm/test/CodeGen/RISCV/rv64Zbs.ll 
b/llvm/test/CodeGen/RISCV/rv64Zbs.ll
index be6b5ad54004..85d1bd5b3c2f 100644
--- a/llvm/test/CodeGen/RISCV/rv64Zbs.ll
+++ b/llvm/test/CodeGen/RISCV/rv64Zbs.ll
@@ -69,20 +69,13 @@ define signext i32 @sbclr_i32_load(i32* %p, i32 signext %b) 
nounwind {
 ; RV64IB-LABEL: sbclr_i32_load:
 ; RV64IB:   # %bb.0:
 ; RV64IB-NEXT:lw a0, 0(a0)
-; RV64IB-NEXT:addi a2, zero, 1
-; RV64IB-NEXT:sllw a1, a2, a1
-; RV64IB-NEXT:andn a0, a0, a1
-; RV64IB-NEXT:sext.w a0, a0
+; RV64IB-NEXT:sbclrw a0, a0, a1
 ; RV64IB-NEXT:ret
 ;
 ; RV64IBS-LABEL: sbclr_i32_load:
 ; RV64IBS:   # %bb.0:
 ; RV64IBS-NEXT:lw a0, 0(a0)
-; RV64IBS-NEXT:addi a2, zero, 1
-; RV64IBS-NEXT:sllw a1, a2, a1
-; RV64IBS-NEXT:not a1, a1
-; RV64IBS-NEXT:and a0, a1, a0
-; RV64IBS-NEXT:sext.w a0, a0
+; RV64IBS-NEXT:sbclrw a0, a0, a1
 ; RV64IBS-NEXT:ret
   %a = load i32, i32* %p
   %shl = shl i32 1, %b
@@ -198,19 +191,13 @@ define signext i32 @sbset_i32_load(i32* %p, i32 signext 
%b) nounwind {
 ; RV64IB-LABEL: sbset_i32_load:
 ; RV64IB:   # %bb.0:
 ; RV64IB-NEXT:lw a0, 0(a0)
-; RV64IB-NEXT:addi a2, zero, 1
-; RV64IB-NEXT:sllw a1, a2, a1
-; RV64IB-NEXT:or a0, a1, a0
-; RV64IB-NEXT:sext.w a0, a0
+; RV64IB-NEXT:sbsetw a0, a0, a1
 ; RV64IB-NEXT:ret
 ;
 ; RV64IBS-LABEL: sbset_i32_load:
 ; RV64IBS:   # %bb.0:
 ; RV64IBS-NEXT:lw a0, 0(a0)
-; RV64IBS-NEXT:addi a2, zero, 1
-; RV64IBS-NEXT:sllw a1, a2, a1
-; RV64IBS-NEXT:or a0, a1, a0
-; RV64IBS-NEXT:sext.w a0, a0
+; RV64IBS-NEXT:sbsetw a0, a0, a1
 ; RV64IBS-NEXT:ret
   %a = load i32, i32* %p
   %shl = shl i32 1, %b
@@ -321,19 +308,13 @@ define signext i32 @sbinv_i32_load(i32* %p, i32 signext 
%b) nounwind {
 ; RV64IB-LABEL: sbinv_i32_load:
 ; RV64IB:   # %bb.0:
 ; RV64IB-NEXT:lw a0, 0(a0)
-; RV64IB-NEXT:addi a2, zero, 1
-; RV64IB-NEXT:sllw a1, a2, a1
-; RV64IB-NEXT:xor a0, a1, a0
-; RV64IB-NEXT:sext.w a0, a0
+; RV64IB-NEXT:sbinvw a0, a0, a1
 ; RV64IB-NEXT:ret
 ;
 ; RV64IBS-LABEL: sbinv_i32_load:
 ; RV64IBS:   # %bb.0:
 ; RV64IBS-NEXT:lw a0, 0(a0)
-; RV64IBS-NEXT:addi a2, zero, 1
-; RV64IBS-NEXT:sllw a1, a2, a1
-; RV64IBS-NEXT:xor a0, a1, a0
-; RV64IBS-NEXT:sext.w a0, a0
+; RV64IBS-NEXT:sbinvw a0, a0, a1
 ; RV64IBS-NEXT:ret
   %a = load i32, i32* %p
   %shl = shl i32 1, %b



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[llvm-branch-commits] [llvm] 3d4c046 - [SCEV] Use isBasicBlockEntryGuardedByCond in isLoopBackedgeGuardedByCond

2020-11-26 Thread Max Kazantsev via llvm-branch-commits


Author: Max Kazantsev
Date: 2020-11-26T17:08:38+07:00
New Revision: 3d4c0460ec6040fc071e56dc113afd181294591e

URL: 
https://github.com/llvm/llvm-project/commit/3d4c0460ec6040fc071e56dc113afd181294591e
DIFF: 
https://github.com/llvm/llvm-project/commit/3d4c0460ec6040fc071e56dc113afd181294591e.diff

LOG: [SCEV] Use isBasicBlockEntryGuardedByCond in isLoopBackedgeGuardedByCond

Previously we tried to using isKnownPredicateAt, but it makes an
extra query to isKnownPredicate, which has negative impact on compile
time. Let's try to use more lightweight isBasicBlockEntryGuardedByCond.

Differential Revision: https://reviews.llvm.org/D92152

Added: 


Modified: 
llvm/lib/Analysis/ScalarEvolution.cpp
llvm/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll

Removed: 




diff  --git a/llvm/lib/Analysis/ScalarEvolution.cpp 
b/llvm/lib/Analysis/ScalarEvolution.cpp
index 53fd668be05c..b7bd54aafca7 100644
--- a/llvm/lib/Analysis/ScalarEvolution.cpp
+++ b/llvm/lib/Analysis/ScalarEvolution.cpp
@@ -9911,42 +9911,7 @@ ScalarEvolution::isLoopBackedgeGuardedByCond(const Loop 
*L,
   if (isImpliedViaGuard(Latch, Pred, LHS, RHS))
 return true;
 
-  for (DomTreeNode *DTN = DT[Latch], *HeaderDTN = DT[L->getHeader()];
-   DTN != HeaderDTN; DTN = DTN->getIDom()) {
-assert(DTN && "should reach the loop header before reaching the root!");
-
-BasicBlock *BB = DTN->getBlock();
-if (isImpliedViaGuard(BB, Pred, LHS, RHS))
-  return true;
-
-BasicBlock *PBB = BB->getSinglePredecessor();
-if (!PBB)
-  continue;
-
-BranchInst *ContinuePredicate = dyn_cast(PBB->getTerminator());
-if (!ContinuePredicate || !ContinuePredicate->isConditional())
-  continue;
-
-Value *Condition = ContinuePredicate->getCondition();
-
-// If we have an edge `E` within the loop body that dominates the only
-// latch, the condition guarding `E` also guards the backedge.  This
-// reasoning works only for loops with a single latch.
-
-BasicBlockEdge DominatingEdge(PBB, BB);
-if (DominatingEdge.isSingleEdge()) {
-  // We're constructively (and conservatively) enumerating edges within the
-  // loop body that dominate the latch.  The dominator tree better agree
-  // with us on this:
-  assert(DT.dominates(DominatingEdge, Latch) && "should be!");
-
-  if (isImpliedCond(Pred, LHS, RHS, Condition,
-BB != ContinuePredicate->getSuccessor(0)))
-return true;
-}
-  }
-
-  return false;
+  return isBasicBlockEntryGuardedByCond(Latch, Pred, LHS, RHS);
 }
 
 bool ScalarEvolution::isBasicBlockEntryGuardedByCond(const BasicBlock *BB,

diff  --git a/llvm/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll 
b/llvm/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll
index 8a07a49303d2..c39828923d5f 100644
--- a/llvm/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll
+++ b/llvm/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll
@@ -69,7 +69,7 @@ define void @_Z15IntegerToStringjjR7Vector2(i32 %i, i32 
%radix, %struct.Vector2*
 ; CHECK-NEXT:[[UGLYGEP2:%.*]] = bitcast i8* [[UGLYGEP]] to i16*
 ; CHECK-NEXT:[[TMP29:%.*]] = load i16, i16* [[LSR_IV810]], align 2
 ; CHECK-NEXT:store i16 [[TMP29]], i16* [[UGLYGEP2]], align 2
-; CHECK-NEXT:[[LSR_IV_NEXT]] = add i64 [[LSR_IV]], 2
+; CHECK-NEXT:[[LSR_IV_NEXT]] = add nuw nsw i64 [[LSR_IV]], 2
 ; CHECK-NEXT:[[LSR_IV_NEXT3:%.*]] = inttoptr i64 [[LSR_IV_NEXT]] to i16*
 ; CHECK-NEXT:[[SCEVGEP9:%.*]] = getelementptr [33 x i16], [33 x i16]* 
[[LSR_IV8]], i64 0, i64 1
 ; CHECK-NEXT:[[TMP3]] = bitcast i16* [[SCEVGEP9]] to [33 x i16]*



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[llvm-branch-commits] [llvm] 54ec9bb - [llvm-readelf/obj] - Report a warning when the value of the DT_PLTREL dynamic tag is invalid.

2020-11-26 Thread Georgii Rymar via llvm-branch-commits


Author: Georgii Rymar
Date: 2020-11-26T13:15:59+03:00
New Revision: 54ec9bb5510de301d05e8b34bb8c2484e8c95eaa

URL: 
https://github.com/llvm/llvm-project/commit/54ec9bb5510de301d05e8b34bb8c2484e8c95eaa
DIFF: 
https://github.com/llvm/llvm-project/commit/54ec9bb5510de301d05e8b34bb8c2484e8c95eaa.diff

LOG: [llvm-readelf/obj] - Report a warning when the value of the DT_PLTREL 
dynamic tag is invalid.

We report an error for unknown `DT_PLTREL` values.
This switches the error to warning.

Differential revision: https://reviews.llvm.org/D92087

Added: 


Modified: 
llvm/test/tools/llvm-readobj/ELF/broken-dynamic-reloc.test
llvm/test/tools/llvm-readobj/ELF/dynamic-reloc.test
llvm/tools/llvm-readobj/ELFDumper.cpp

Removed: 




diff  --git a/llvm/test/tools/llvm-readobj/ELF/broken-dynamic-reloc.test 
b/llvm/test/tools/llvm-readobj/ELF/broken-dynamic-reloc.test
index 741eaec90d13..8793a3e9980c 100644
--- a/llvm/test/tools/llvm-readobj/ELF/broken-dynamic-reloc.test
+++ b/llvm/test/tools/llvm-readobj/ELF/broken-dynamic-reloc.test
@@ -163,7 +163,7 @@ ProgramHeaders:
 # RUN: llvm-readelf --dyn-relocations %t10a 2>&1 | \
 # RUN:   FileCheck %s -DFILE=%t10a --check-prefix=INVALID-DT-PLTRELSZ1 
--implicit-check-not=warning:
 
-# INVALID-DT-PLTRELSZ1: warning: '[[FILE]]': invalid DT_PLTRELSZ value 
(0xff){{$}}
+# INVALID-DT-PLTRELSZ1: warning: '[[FILE]]': invalid DT_PLTRELSZ value (0xff) 
or PLTREL entry size (0x18){{$}}
 
 --- !ELF
 FileHeader:

diff  --git a/llvm/test/tools/llvm-readobj/ELF/dynamic-reloc.test 
b/llvm/test/tools/llvm-readobj/ELF/dynamic-reloc.test
index 221e0b80058e..bed9985cdc68 100644
--- a/llvm/test/tools/llvm-readobj/ELF/dynamic-reloc.test
+++ b/llvm/test/tools/llvm-readobj/ELF/dynamic-reloc.test
@@ -128,3 +128,38 @@ ProgramHeaders:
   - Type: PT_LOAD
 FirstSec: .rela.dyn
 LastSec:  .dynamic
+
+## Check we report a warning when the value of the DT_PLTREL dynamic tag is 
invalid.
+## We currently accept DT_RELA(7) and DT_REL(17) values. This test case uses 
0xff.
+
+# RUN: yaml2obj --docnum=2 %s -DDTPLTREL=0xFF -o %t3
+# RUN: llvm-readobj --dyn-relocations %t3 2>&1 | \
+# RUN:   FileCheck %s -DFILE=%t3 --implicit-check-not=warning: 
--check-prefix=PLTRELUNKNOWN-LLVM
+# RUN: llvm-readelf --dyn-relocations %t3 2>&1 | \
+# RUN:   FileCheck %s -DFILE=%t3 --implicit-check-not=warning: 
--check-prefix=PLTRELUNKNOWN-GNU
+
+# PLTRELUNKNOWN-LLVM:  warning: '[[FILE]]': unknown DT_PLTREL value of 255
+# PLTRELUNKNOWN-LLVM:  Dynamic Relocations {
+# PLTRELUNKNOWN-LLVM-NEXT:   0x1 R_X86_64_NONE foo 0x0
+# PLTRELUNKNOWN-LLVM-NEXT:   0x2 R_X86_64_NONE foo 0x0
+# PLTRELUNKNOWN-LLVM-NEXT:   0x4 R_X86_64_RELATIVE - 0x0
+# PLTRELUNKNOWN-LLVM-NEXT: warning: '[[FILE]]': invalid DT_PLTRELSZ value 
(0x10) or PLTREL entry size (0x0)
+# PLTRELUNKNOWN-LLVM-NEXT: }
+
+# PLTRELUNKNOWN-GNU:warning: '[[FILE]]': unknown DT_PLTREL value of 255
+# PLTRELUNKNOWN-GNU-EMPTY:
+# PLTRELUNKNOWN-GNU-NEXT:   'RELA' relocation section at offset 0x78 contains 
24 bytes:
+# PLTRELUNKNOWN-GNU-NEXT:   Offset Info Type   
Symbol's Value  Symbol's Name + Addend
+# PLTRELUNKNOWN-GNU-NEXT:   0001  0001 R_X86_64_NONE   
    foo + 0
+# PLTRELUNKNOWN-GNU-EMPTY:
+# PLTRELUNKNOWN-GNU-NEXT:   'REL' relocation section at offset 0x90 contains 
16 bytes:
+# PLTRELUNKNOWN-GNU-NEXT:   Offset Info Type   
Symbol's Value  Symbol's Name
+# PLTRELUNKNOWN-GNU-NEXT:   0002  0001 R_X86_64_NONE   
    foo
+# PLTRELUNKNOWN-GNU-EMPTY:
+# PLTRELUNKNOWN-GNU-NEXT:   'RELR' relocation section at offset 0xa0 contains 
8 bytes:
+# PLTRELUNKNOWN-GNU-NEXT:   Offset Info Type   
Symbol's Value  Symbol's Name
+# PLTRELUNKNOWN-GNU-NEXT:   0004  0008 
R_X86_64_RELATIVE
+# PLTRELUNKNOWN-GNU-EMPTY:
+# PLTRELUNKNOWN-GNU-NEXT:   'PLT' relocation section at offset 0xa8 contains 
16 bytes:
+# PLTRELUNKNOWN-GNU-NEXT:   Offset Info Type   
Symbol's Value  Symbol's Name
+# PLTRELUNKNOWN-GNU-NEXT:   warning: '[[FILE]]': invalid DT_PLTRELSZ value 
(0x10) or PLTREL entry size (0x0)

diff  --git a/llvm/tools/llvm-readobj/ELFDumper.cpp 
b/llvm/tools/llvm-readobj/ELFDumper.cpp
index 656b9924ece0..c546be25a951 100644
--- a/llvm/tools/llvm-readobj/ELFDumper.cpp
+++ b/llvm/tools/llvm-readobj/ELFDumper.cpp
@@ -2204,10 +2204,9 @@ void ELFDumper::parseDynamicTable() {
   else if (Dyn.getVal() == DT_RELA)
 DynPLTRelRegion.EntSize = sizeof(Elf_Rela);
   else
-reportError(createError(Twine("unknown DT_PLTREL value of ") +
-Twine((uint64_t)Dyn.getVal())),
-ObjF.getFileName());
-  DynPLTRelRegion.EntSizePrintName = "";
+reportUniq

[llvm-branch-commits] [llvm] 91d6b6b - Revert "[SCEV] Use isBasicBlockEntryGuardedByCond in isLoopBackedgeGuardedByCond"

2020-11-26 Thread Max Kazantsev via llvm-branch-commits


Author: Max Kazantsev
Date: 2020-11-26T17:28:30+07:00
New Revision: 91d6b6b5fb94656dc12e1d760a3213a3cd72c8c5

URL: 
https://github.com/llvm/llvm-project/commit/91d6b6b5fb94656dc12e1d760a3213a3cd72c8c5
DIFF: 
https://github.com/llvm/llvm-project/commit/91d6b6b5fb94656dc12e1d760a3213a3cd72c8c5.diff

LOG: Revert "[SCEV] Use isBasicBlockEntryGuardedByCond in 
isLoopBackedgeGuardedByCond"

This reverts commit 3d4c0460ec6040fc071e56dc113afd181294591e.

Compile time impact is still high. Need to understand why.

Differential Revision: https://reviews.llvm.org/D92153

Added: 


Modified: 
llvm/lib/Analysis/ScalarEvolution.cpp
llvm/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll

Removed: 




diff  --git a/llvm/lib/Analysis/ScalarEvolution.cpp 
b/llvm/lib/Analysis/ScalarEvolution.cpp
index b7bd54aafca70..53fd668be05cd 100644
--- a/llvm/lib/Analysis/ScalarEvolution.cpp
+++ b/llvm/lib/Analysis/ScalarEvolution.cpp
@@ -9911,7 +9911,42 @@ ScalarEvolution::isLoopBackedgeGuardedByCond(const Loop 
*L,
   if (isImpliedViaGuard(Latch, Pred, LHS, RHS))
 return true;
 
-  return isBasicBlockEntryGuardedByCond(Latch, Pred, LHS, RHS);
+  for (DomTreeNode *DTN = DT[Latch], *HeaderDTN = DT[L->getHeader()];
+   DTN != HeaderDTN; DTN = DTN->getIDom()) {
+assert(DTN && "should reach the loop header before reaching the root!");
+
+BasicBlock *BB = DTN->getBlock();
+if (isImpliedViaGuard(BB, Pred, LHS, RHS))
+  return true;
+
+BasicBlock *PBB = BB->getSinglePredecessor();
+if (!PBB)
+  continue;
+
+BranchInst *ContinuePredicate = dyn_cast(PBB->getTerminator());
+if (!ContinuePredicate || !ContinuePredicate->isConditional())
+  continue;
+
+Value *Condition = ContinuePredicate->getCondition();
+
+// If we have an edge `E` within the loop body that dominates the only
+// latch, the condition guarding `E` also guards the backedge.  This
+// reasoning works only for loops with a single latch.
+
+BasicBlockEdge DominatingEdge(PBB, BB);
+if (DominatingEdge.isSingleEdge()) {
+  // We're constructively (and conservatively) enumerating edges within the
+  // loop body that dominate the latch.  The dominator tree better agree
+  // with us on this:
+  assert(DT.dominates(DominatingEdge, Latch) && "should be!");
+
+  if (isImpliedCond(Pred, LHS, RHS, Condition,
+BB != ContinuePredicate->getSuccessor(0)))
+return true;
+}
+  }
+
+  return false;
 }
 
 bool ScalarEvolution::isBasicBlockEntryGuardedByCond(const BasicBlock *BB,

diff  --git a/llvm/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll 
b/llvm/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll
index c39828923d5f9..8a07a49303d20 100644
--- a/llvm/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll
+++ b/llvm/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll
@@ -69,7 +69,7 @@ define void @_Z15IntegerToStringjjR7Vector2(i32 %i, i32 
%radix, %struct.Vector2*
 ; CHECK-NEXT:[[UGLYGEP2:%.*]] = bitcast i8* [[UGLYGEP]] to i16*
 ; CHECK-NEXT:[[TMP29:%.*]] = load i16, i16* [[LSR_IV810]], align 2
 ; CHECK-NEXT:store i16 [[TMP29]], i16* [[UGLYGEP2]], align 2
-; CHECK-NEXT:[[LSR_IV_NEXT]] = add nuw nsw i64 [[LSR_IV]], 2
+; CHECK-NEXT:[[LSR_IV_NEXT]] = add i64 [[LSR_IV]], 2
 ; CHECK-NEXT:[[LSR_IV_NEXT3:%.*]] = inttoptr i64 [[LSR_IV_NEXT]] to i16*
 ; CHECK-NEXT:[[SCEVGEP9:%.*]] = getelementptr [33 x i16], [33 x i16]* 
[[LSR_IV8]], i64 0, i64 1
 ; CHECK-NEXT:[[TMP3]] = bitcast i16* [[SCEVGEP9]] to [33 x i16]*



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[llvm-branch-commits] [llvm] f690986 - Return "[SCEV] Use isBasicBlockEntryGuardedByCond in isLoopBackedgeGuardedByCond", 2nd try

2020-11-26 Thread Max Kazantsev via llvm-branch-commits


Author: Max Kazantsev
Date: 2020-11-26T17:45:13+07:00
New Revision: f690986f314fbf3f4b3ca9ec0b87b95166008dc1

URL: 
https://github.com/llvm/llvm-project/commit/f690986f314fbf3f4b3ca9ec0b87b95166008dc1
DIFF: 
https://github.com/llvm/llvm-project/commit/f690986f314fbf3f4b3ca9ec0b87b95166008dc1.diff

LOG: Return "[SCEV] Use isBasicBlockEntryGuardedByCond in 
isLoopBackedgeGuardedByCond", 2nd try

Reverted because the compile time impact is still too high.

isKnownViaNonRecursiveReasoning is used twice, we can do it just once.

Differential Revision: https://reviews.llvm.org/D92152

Added: 


Modified: 
llvm/lib/Analysis/ScalarEvolution.cpp
llvm/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll

Removed: 




diff  --git a/llvm/lib/Analysis/ScalarEvolution.cpp 
b/llvm/lib/Analysis/ScalarEvolution.cpp
index 53fd668be05c..f8c9a2372a46 100644
--- a/llvm/lib/Analysis/ScalarEvolution.cpp
+++ b/llvm/lib/Analysis/ScalarEvolution.cpp
@@ -9851,10 +9851,6 @@ ScalarEvolution::isLoopBackedgeGuardedByCond(const Loop 
*L,
 assert(!verifyFunction(*L->getHeader()->getParent(), &dbgs()) &&
"This cannot be done on broken IR!");
 
-
-  if (isKnownViaNonRecursiveReasoning(Pred, LHS, RHS))
-return true;
-
   BasicBlock *Latch = L->getLoopLatch();
   if (!Latch)
 return false;
@@ -9870,7 +9866,7 @@ ScalarEvolution::isLoopBackedgeGuardedByCond(const Loop 
*L,
   // We don't want more than one activation of the following loops on the stack
   // -- that can lead to O(n!) time complexity.
   if (WalkingBEDominatingConds)
-return false;
+return isKnownViaNonRecursiveReasoning(Pred, LHS, RHS);
 
   SaveAndRestore ClearOnExit(WalkingBEDominatingConds, true);
 
@@ -9911,42 +9907,7 @@ ScalarEvolution::isLoopBackedgeGuardedByCond(const Loop 
*L,
   if (isImpliedViaGuard(Latch, Pred, LHS, RHS))
 return true;
 
-  for (DomTreeNode *DTN = DT[Latch], *HeaderDTN = DT[L->getHeader()];
-   DTN != HeaderDTN; DTN = DTN->getIDom()) {
-assert(DTN && "should reach the loop header before reaching the root!");
-
-BasicBlock *BB = DTN->getBlock();
-if (isImpliedViaGuard(BB, Pred, LHS, RHS))
-  return true;
-
-BasicBlock *PBB = BB->getSinglePredecessor();
-if (!PBB)
-  continue;
-
-BranchInst *ContinuePredicate = dyn_cast(PBB->getTerminator());
-if (!ContinuePredicate || !ContinuePredicate->isConditional())
-  continue;
-
-Value *Condition = ContinuePredicate->getCondition();
-
-// If we have an edge `E` within the loop body that dominates the only
-// latch, the condition guarding `E` also guards the backedge.  This
-// reasoning works only for loops with a single latch.
-
-BasicBlockEdge DominatingEdge(PBB, BB);
-if (DominatingEdge.isSingleEdge()) {
-  // We're constructively (and conservatively) enumerating edges within the
-  // loop body that dominate the latch.  The dominator tree better agree
-  // with us on this:
-  assert(DT.dominates(DominatingEdge, Latch) && "should be!");
-
-  if (isImpliedCond(Pred, LHS, RHS, Condition,
-BB != ContinuePredicate->getSuccessor(0)))
-return true;
-}
-  }
-
-  return false;
+  return isBasicBlockEntryGuardedByCond(Latch, Pred, LHS, RHS);
 }
 
 bool ScalarEvolution::isBasicBlockEntryGuardedByCond(const BasicBlock *BB,

diff  --git a/llvm/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll 
b/llvm/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll
index 8a07a49303d2..c39828923d5f 100644
--- a/llvm/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll
+++ b/llvm/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll
@@ -69,7 +69,7 @@ define void @_Z15IntegerToStringjjR7Vector2(i32 %i, i32 
%radix, %struct.Vector2*
 ; CHECK-NEXT:[[UGLYGEP2:%.*]] = bitcast i8* [[UGLYGEP]] to i16*
 ; CHECK-NEXT:[[TMP29:%.*]] = load i16, i16* [[LSR_IV810]], align 2
 ; CHECK-NEXT:store i16 [[TMP29]], i16* [[UGLYGEP2]], align 2
-; CHECK-NEXT:[[LSR_IV_NEXT]] = add i64 [[LSR_IV]], 2
+; CHECK-NEXT:[[LSR_IV_NEXT]] = add nuw nsw i64 [[LSR_IV]], 2
 ; CHECK-NEXT:[[LSR_IV_NEXT3:%.*]] = inttoptr i64 [[LSR_IV_NEXT]] to i16*
 ; CHECK-NEXT:[[SCEVGEP9:%.*]] = getelementptr [33 x i16], [33 x i16]* 
[[LSR_IV8]], i64 0, i64 1
 ; CHECK-NEXT:[[TMP3]] = bitcast i16* [[SCEVGEP9]] to [33 x i16]*



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[llvm-branch-commits] [llvm] 4078383 - [X86] Fix -DAG checks on gnux32 pic tests

2020-11-26 Thread Simon Pilgrim via llvm-branch-commits


Author: Simon Pilgrim
Date: 2020-11-26T11:01:17Z
New Revision: 40783839e63a602157665d7ae3d4c9eea8fe8c9f

URL: 
https://github.com/llvm/llvm-project/commit/40783839e63a602157665d7ae3d4c9eea8fe8c9f
DIFF: 
https://github.com/llvm/llvm-project/commit/40783839e63a602157665d7ae3d4c9eea8fe8c9f.diff

LOG: [X86] Fix -DAG checks on gnux32 pic tests

Differential Revision: https://reviews.llvm.org/D91339

Added: 


Modified: 
llvm/test/CodeGen/X86/pic.ll

Removed: 




diff  --git a/llvm/test/CodeGen/X86/pic.ll b/llvm/test/CodeGen/X86/pic.ll
index 8cf0602c57a8..1de4ca0059d0 100644
--- a/llvm/test/CodeGen/X86/pic.ll
+++ b/llvm/test/CodeGen/X86/pic.ll
@@ -22,9 +22,9 @@ entry:
 ; CHECK-I686:  movlptr@GOT(%eax),
 ; CHECK-I686:  movlsrc@GOT(%eax),
 ; CHECK-I686:  ret
-; CHECK-DAG-X32:   movldst@GOTPCREL(%rip),
-; CHECK-DAG-X32:   movlptr@GOTPCREL(%rip),
-; CHECK-DAG-X32:   movlsrc@GOTPCREL(%rip),
+; CHECK-X32-DAG:   movldst@GOTPCREL(%rip),
+; CHECK-X32-DAG:   movlptr@GOTPCREL(%rip),
+; CHECK-X32-DAG:   movlsrc@GOTPCREL(%rip),
 ; CHECK-X32:   retq
 }
 
@@ -48,9 +48,9 @@ entry:
 ; CHECK-I686:  movlptr2@GOT(%eax),
 ; CHECK-I686:  movlsrc2@GOT(%eax),
 ; CHECK-I686:  ret
-; CHECK-DAG-X32:   movldst2@GOTPCREL(%rip),
-; CHECK-DAG-X32:   movlptr2@GOTPCREL(%rip),
-; CHECK-DAG-X32:   movlsrc2@GOTPCREL(%rip),
+; CHECK-X32-DAG:   movldst2@GOTPCREL(%rip),
+; CHECK-X32-DAG:   movlptr2@GOTPCREL(%rip),
+; CHECK-X32-DAG:   movlsrc2@GOTPCREL(%rip),
 ; CHECK-X32:   retq
 
 }



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[llvm-branch-commits] [llvm] 035955f - Revert "Return "[SCEV] Use isBasicBlockEntryGuardedByCond in isLoopBackedgeGuardedByCond", 2nd try"

2020-11-26 Thread Max Kazantsev via llvm-branch-commits


Author: Max Kazantsev
Date: 2020-11-26T18:12:51+07:00
New Revision: 035955f9254179b2034fac8b16777973453e00d6

URL: 
https://github.com/llvm/llvm-project/commit/035955f9254179b2034fac8b16777973453e00d6
DIFF: 
https://github.com/llvm/llvm-project/commit/035955f9254179b2034fac8b16777973453e00d6.diff

LOG: Revert "Return "[SCEV] Use isBasicBlockEntryGuardedByCond in 
isLoopBackedgeGuardedByCond", 2nd try"

This reverts commit f690986f314fbf3f4b3ca9ec0b87b95166008dc1.

Compile time then and again...

Added: 


Modified: 
llvm/lib/Analysis/ScalarEvolution.cpp
llvm/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll

Removed: 




diff  --git a/llvm/lib/Analysis/ScalarEvolution.cpp 
b/llvm/lib/Analysis/ScalarEvolution.cpp
index f8c9a2372a46..53fd668be05c 100644
--- a/llvm/lib/Analysis/ScalarEvolution.cpp
+++ b/llvm/lib/Analysis/ScalarEvolution.cpp
@@ -9851,6 +9851,10 @@ ScalarEvolution::isLoopBackedgeGuardedByCond(const Loop 
*L,
 assert(!verifyFunction(*L->getHeader()->getParent(), &dbgs()) &&
"This cannot be done on broken IR!");
 
+
+  if (isKnownViaNonRecursiveReasoning(Pred, LHS, RHS))
+return true;
+
   BasicBlock *Latch = L->getLoopLatch();
   if (!Latch)
 return false;
@@ -9866,7 +9870,7 @@ ScalarEvolution::isLoopBackedgeGuardedByCond(const Loop 
*L,
   // We don't want more than one activation of the following loops on the stack
   // -- that can lead to O(n!) time complexity.
   if (WalkingBEDominatingConds)
-return isKnownViaNonRecursiveReasoning(Pred, LHS, RHS);
+return false;
 
   SaveAndRestore ClearOnExit(WalkingBEDominatingConds, true);
 
@@ -9907,7 +9911,42 @@ ScalarEvolution::isLoopBackedgeGuardedByCond(const Loop 
*L,
   if (isImpliedViaGuard(Latch, Pred, LHS, RHS))
 return true;
 
-  return isBasicBlockEntryGuardedByCond(Latch, Pred, LHS, RHS);
+  for (DomTreeNode *DTN = DT[Latch], *HeaderDTN = DT[L->getHeader()];
+   DTN != HeaderDTN; DTN = DTN->getIDom()) {
+assert(DTN && "should reach the loop header before reaching the root!");
+
+BasicBlock *BB = DTN->getBlock();
+if (isImpliedViaGuard(BB, Pred, LHS, RHS))
+  return true;
+
+BasicBlock *PBB = BB->getSinglePredecessor();
+if (!PBB)
+  continue;
+
+BranchInst *ContinuePredicate = dyn_cast(PBB->getTerminator());
+if (!ContinuePredicate || !ContinuePredicate->isConditional())
+  continue;
+
+Value *Condition = ContinuePredicate->getCondition();
+
+// If we have an edge `E` within the loop body that dominates the only
+// latch, the condition guarding `E` also guards the backedge.  This
+// reasoning works only for loops with a single latch.
+
+BasicBlockEdge DominatingEdge(PBB, BB);
+if (DominatingEdge.isSingleEdge()) {
+  // We're constructively (and conservatively) enumerating edges within the
+  // loop body that dominate the latch.  The dominator tree better agree
+  // with us on this:
+  assert(DT.dominates(DominatingEdge, Latch) && "should be!");
+
+  if (isImpliedCond(Pred, LHS, RHS, Condition,
+BB != ContinuePredicate->getSuccessor(0)))
+return true;
+}
+  }
+
+  return false;
 }
 
 bool ScalarEvolution::isBasicBlockEntryGuardedByCond(const BasicBlock *BB,

diff  --git a/llvm/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll 
b/llvm/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll
index c39828923d5f..8a07a49303d2 100644
--- a/llvm/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll
+++ b/llvm/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll
@@ -69,7 +69,7 @@ define void @_Z15IntegerToStringjjR7Vector2(i32 %i, i32 
%radix, %struct.Vector2*
 ; CHECK-NEXT:[[UGLYGEP2:%.*]] = bitcast i8* [[UGLYGEP]] to i16*
 ; CHECK-NEXT:[[TMP29:%.*]] = load i16, i16* [[LSR_IV810]], align 2
 ; CHECK-NEXT:store i16 [[TMP29]], i16* [[UGLYGEP2]], align 2
-; CHECK-NEXT:[[LSR_IV_NEXT]] = add nuw nsw i64 [[LSR_IV]], 2
+; CHECK-NEXT:[[LSR_IV_NEXT]] = add i64 [[LSR_IV]], 2
 ; CHECK-NEXT:[[LSR_IV_NEXT3:%.*]] = inttoptr i64 [[LSR_IV_NEXT]] to i16*
 ; CHECK-NEXT:[[SCEVGEP9:%.*]] = getelementptr [33 x i16], [33 x i16]* 
[[LSR_IV8]], i64 0, i64 1
 ; CHECK-NEXT:[[TMP3]] = bitcast i16* [[SCEVGEP9]] to [33 x i16]*



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[llvm-branch-commits] [llvm] 4bee319 - [SVE][CodeGen] Extend isConstantSplatValue to support ISD::SPLAT_VECTOR

2020-11-26 Thread Kerry McLaughlin via llvm-branch-commits


Author: Kerry McLaughlin
Date: 2020-11-26T11:19:40Z
New Revision: 4bee3197f665a8c2336a6cdd4bf5c4575b9e5fe7

URL: 
https://github.com/llvm/llvm-project/commit/4bee3197f665a8c2336a6cdd4bf5c4575b9e5fe7
DIFF: 
https://github.com/llvm/llvm-project/commit/4bee3197f665a8c2336a6cdd4bf5c4575b9e5fe7.diff

LOG: [SVE][CodeGen] Extend isConstantSplatValue to support ISD::SPLAT_VECTOR

Updated the affected scalable_of_scalable tests in sve-gep.ll, as 
isConstantSplatValue now returns true in DAGCombiner::visitMUL and folds `(mul 
x, 1) -> x`

Reviewed By: sdesmalen

Differential Revision: https://reviews.llvm.org/D91363

Added: 


Modified: 
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
llvm/test/CodeGen/AArch64/sve-gep.ll

Removed: 




diff  --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp 
b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index eee80cc4bc70..20e4ac590136 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -139,6 +139,15 @@ bool ConstantFPSDNode::isValueValidForType(EVT VT,
 
//===--===//
 
 bool ISD::isConstantSplatVector(const SDNode *N, APInt &SplatVal) {
+  if (N->getOpcode() == ISD::SPLAT_VECTOR) {
+unsigned EltSize =
+N->getValueType(0).getVectorElementType().getSizeInBits();
+if (auto *Op0 = dyn_cast(N->getOperand(0))) {
+  SplatVal = Op0->getAPIntValue().truncOrSelf(EltSize);
+  return true;
+}
+  }
+
   auto *BV = dyn_cast(N);
   if (!BV)
 return false;

diff  --git a/llvm/test/CodeGen/AArch64/sve-gep.ll 
b/llvm/test/CodeGen/AArch64/sve-gep.ll
index 8f68a38e2cd2..ffde9289a55d 100644
--- a/llvm/test/CodeGen/AArch64/sve-gep.ll
+++ b/llvm/test/CodeGen/AArch64/sve-gep.ll
@@ -105,11 +105,9 @@ define *> 
@scalable_of_scalable_1( insertelement ( 
undef, i64 1, i32 0),  zeroinitializer,  
zeroinitializer
   %d = getelementptr , * %base,  %idx
@@ -120,10 +118,8 @@ define *> 
@scalable_of_scalable_2( insertelement ( 
undef, i64 1, i32 0),  zeroinitializer,  
zeroinitializer
   %d = getelementptr , *> 
%base,  %idx



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[llvm-branch-commits] [libcxx] 5641b1d - [libc++] Mark a few more tests as unsupported on gcc-8/9.

2020-11-26 Thread Marek Kurdej via llvm-branch-commits


Author: Marek Kurdej
Date: 2020-11-26T12:40:50+01:00
New Revision: 5641b1dfddff847f7f3edc484537f9314c283225

URL: 
https://github.com/llvm/llvm-project/commit/5641b1dfddff847f7f3edc484537f9314c283225
DIFF: 
https://github.com/llvm/llvm-project/commit/5641b1dfddff847f7f3edc484537f9314c283225.diff

LOG: [libc++] Mark a few more tests as unsupported on gcc-8/9.

This will fix remaining failures on gcc-9 buildbot: 
http://lab.llvm.org:8011/#/builders/101.
gcc-8 and gcc-9 do not support constexpr destructors nor constexpr allocation.

Fix gcc warnings: -Wconversion, -Wpragmas.

Added: 


Modified: 

libcxx/test/std/utilities/memory/allocator.traits/allocator.traits.members/allocate.pass.cpp

libcxx/test/std/utilities/memory/allocator.traits/allocator.traits.members/allocate_hint.pass.cpp

libcxx/test/std/utilities/memory/allocator.traits/allocator.traits.members/construct.pass.cpp

libcxx/test/std/utilities/memory/allocator.traits/allocator.traits.members/deallocate.pass.cpp

libcxx/test/std/utilities/memory/allocator.traits/allocator.traits.members/destroy.pass.cpp

libcxx/test/std/utilities/memory/default.allocator/allocator.members/allocate.pass.cpp

libcxx/test/std/utilities/memory/specialized.algorithms/specialized.destroy/destroy.pass.cpp

libcxx/test/std/utilities/memory/specialized.algorithms/specialized.destroy/destroy_at.pass.cpp

libcxx/test/std/utilities/memory/specialized.algorithms/specialized.destroy/destroy_n.pass.cpp

libcxx/test/std/utilities/meta/meta.trans/meta.trans.other/result_of11.pass.cpp
libcxxabi/src/demangle/Utility.h

Removed: 




diff  --git 
a/libcxx/test/std/utilities/memory/allocator.traits/allocator.traits.members/allocate.pass.cpp
 
b/libcxx/test/std/utilities/memory/allocator.traits/allocator.traits.members/allocate.pass.cpp
index ab354f42a1d8..e42277828750 100644
--- 
a/libcxx/test/std/utilities/memory/allocator.traits/allocator.traits.members/allocate.pass.cpp
+++ 
b/libcxx/test/std/utilities/memory/allocator.traits/allocator.traits.members/allocate.pass.cpp
@@ -6,6 +6,8 @@
 //
 
//===--===//
 
+// UNSUPPORTED: gcc-8, gcc-9
+
 // 
 
 // template 

diff  --git 
a/libcxx/test/std/utilities/memory/allocator.traits/allocator.traits.members/allocate_hint.pass.cpp
 
b/libcxx/test/std/utilities/memory/allocator.traits/allocator.traits.members/allocate_hint.pass.cpp
index 5cdb5e070bed..0960285ed543 100644
--- 
a/libcxx/test/std/utilities/memory/allocator.traits/allocator.traits.members/allocate_hint.pass.cpp
+++ 
b/libcxx/test/std/utilities/memory/allocator.traits/allocator.traits.members/allocate_hint.pass.cpp
@@ -7,6 +7,7 @@
 
//===--===//
 
 // UNSUPPORTED: clang-8
+// UNSUPPORTED: gcc-8, gcc-9
 
 // 
 

diff  --git 
a/libcxx/test/std/utilities/memory/allocator.traits/allocator.traits.members/construct.pass.cpp
 
b/libcxx/test/std/utilities/memory/allocator.traits/allocator.traits.members/construct.pass.cpp
index a3465ff22d66..6015a6150b4b 100644
--- 
a/libcxx/test/std/utilities/memory/allocator.traits/allocator.traits.members/construct.pass.cpp
+++ 
b/libcxx/test/std/utilities/memory/allocator.traits/allocator.traits.members/construct.pass.cpp
@@ -7,6 +7,7 @@
 
//===--===//
 
 // UNSUPPORTED: clang-8
+// UNSUPPORTED: gcc-8, gcc-9
 
 // 
 

diff  --git 
a/libcxx/test/std/utilities/memory/allocator.traits/allocator.traits.members/deallocate.pass.cpp
 
b/libcxx/test/std/utilities/memory/allocator.traits/allocator.traits.members/deallocate.pass.cpp
index 2f153eedc6fc..a23345942db7 100644
--- 
a/libcxx/test/std/utilities/memory/allocator.traits/allocator.traits.members/deallocate.pass.cpp
+++ 
b/libcxx/test/std/utilities/memory/allocator.traits/allocator.traits.members/deallocate.pass.cpp
@@ -6,6 +6,8 @@
 //
 
//===--===//
 
+// UNSUPPORTED: gcc-8, gcc-9
+
 // 
 
 // template 

diff  --git 
a/libcxx/test/std/utilities/memory/allocator.traits/allocator.traits.members/destroy.pass.cpp
 
b/libcxx/test/std/utilities/memory/allocator.traits/allocator.traits.members/destroy.pass.cpp
index 6d7b0bd5c44c..e85813b3ebf2 100644
--- 
a/libcxx/test/std/utilities/memory/allocator.traits/allocator.traits.members/destroy.pass.cpp
+++ 
b/libcxx/test/std/utilities/memory/allocator.traits/allocator.traits.members/destroy.pass.cpp
@@ -7,6 +7,8 @@
 
//===--===//
 
 // UNSUPPORTED: clang-8
+// constexpr destructors are only supported starting with gcc 10
+// UNSUPPORTED: gcc-8, gcc-9
 
 // 
 

diff  --git 
a/libcxx/test/std/utilities/memory/default.allocator/allocator.members/allocate.pass.cpp
 
b/libcxx/test/std/utilities/memory/default.al

[llvm-branch-commits] [clang] 45ba239 - [clang][Driver] Handle risvc in Baremetal.cpp.

2020-11-26 Thread Hafiz Abid Qadeer via llvm-branch-commits


Author: Hafiz Abid Qadeer
Date: 2020-11-26T11:43:17Z
New Revision: 45ba2392d7e00aedd4d9fb04070dbae8a7fbbeeb

URL: 
https://github.com/llvm/llvm-project/commit/45ba2392d7e00aedd4d9fb04070dbae8a7fbbeeb
DIFF: 
https://github.com/llvm/llvm-project/commit/45ba2392d7e00aedd4d9fb04070dbae8a7fbbeeb.diff

LOG: [clang][Driver] Handle risvc in Baremetal.cpp.

I am working on a baremetal riscv toolchain using LLVM runtime and
LLD linker. Baremetal.cpp provides most of the things needed for such
toolchain. So I have modified it to also handle riscv64/32-unknown-elf
 targets alongside arm-none-eabi.

Currently, targets like riscv64-unknown-elf are handled by RISCVToolChain
which mostly expects a gcc toolchain to be present. If you dont
want the dependency on gcc-toolchain/libgloss or want to use LLD, then
RISCVToolChain is not a good fit.

So in the toolchain selection code, I have made this dependency of
RISCVToolChain on gcc toolchain explicit. It is created if gcc-toolchain
option is present. Otherwise Baremetal toolchain is created. I will be
happy to hear if there is a better way to choose between these two
toolchains.

Reviewed By: jroelofs

Differential Revision: https://reviews.llvm.org/D91442

Added: 


Modified: 
clang/lib/Driver/Driver.cpp
clang/lib/Driver/ToolChains/BareMetal.cpp
clang/lib/Driver/ToolChains/RISCVToolchain.cpp
clang/lib/Driver/ToolChains/RISCVToolchain.h
clang/test/Driver/baremetal.cpp
clang/test/Driver/riscv-gnutools.c
clang/test/Driver/riscv32-toolchain-extra.c
clang/test/Driver/riscv32-toolchain.c
clang/test/Driver/riscv64-toolchain-extra.c
clang/test/Driver/riscv64-toolchain.c

Removed: 




diff  --git a/clang/lib/Driver/Driver.cpp b/clang/lib/Driver/Driver.cpp
index fb258197cfdd..5e4eb8c4e6c5 100644
--- a/clang/lib/Driver/Driver.cpp
+++ b/clang/lib/Driver/Driver.cpp
@@ -5213,7 +5213,11 @@ const ToolChain &Driver::getToolChain(const ArgList 
&Args,
 break;
   case llvm::Triple::riscv32:
   case llvm::Triple::riscv64:
-TC = std::make_unique(*this, Target, Args);
+if (toolchains::RISCVToolChain::hasGCCToolchain(*this, Args))
+  TC =
+  std::make_unique(*this, Target, 
Args);
+else
+  TC = std::make_unique(*this, Target, Args);
 break;
   case llvm::Triple::ve:
 TC = std::make_unique(*this, Target, Args);

diff  --git a/clang/lib/Driver/ToolChains/BareMetal.cpp 
b/clang/lib/Driver/ToolChains/BareMetal.cpp
index 91e2715404fe..e032d07112eb 100644
--- a/clang/lib/Driver/ToolChains/BareMetal.cpp
+++ b/clang/lib/Driver/ToolChains/BareMetal.cpp
@@ -59,8 +59,22 @@ static bool isARMBareMetal(const llvm::Triple &Triple) {
   return true;
 }
 
+static bool isRISCVBareMetal(const llvm::Triple &Triple) {
+  if (Triple.getArch() != llvm::Triple::riscv32 &&
+  Triple.getArch() != llvm::Triple::riscv64)
+return false;
+
+  if (Triple.getVendor() != llvm::Triple::UnknownVendor)
+return false;
+
+  if (Triple.getOS() != llvm::Triple::UnknownOS)
+return false;
+
+  return Triple.getEnvironmentName() == "elf";
+}
+
 bool BareMetal::handlesTarget(const llvm::Triple &Triple) {
-  return isARMBareMetal(Triple);
+  return isARMBareMetal(Triple) || isRISCVBareMetal(Triple);
 }
 
 Tool *BareMetal::buildLinker() const {

diff  --git a/clang/lib/Driver/ToolChains/RISCVToolchain.cpp 
b/clang/lib/Driver/ToolChains/RISCVToolchain.cpp
index 312c8b52c5e8..0dc12c7a84b5 100644
--- a/clang/lib/Driver/ToolChains/RISCVToolchain.cpp
+++ b/clang/lib/Driver/ToolChains/RISCVToolchain.cpp
@@ -31,6 +31,21 @@ static void addMultilibsFilePaths(const Driver &D, const 
MultilibSet &Multilibs,
   addPathIfExists(D, InstallPath + Path, Paths);
 }
 
+// This function tests whether a gcc installation is present either
+// through gcc-toolchain argument or in the same prefix where clang
+// is installed. This helps decide whether to instantiate this toolchain
+// or Baremetal toolchain.
+bool RISCVToolChain::hasGCCToolchain(const Driver &D,
+ const llvm::opt::ArgList &Args) {
+  if (Args.getLastArg(options::OPT_gcc_toolchain))
+return true;
+
+  SmallString<128> GCCDir;
+  llvm::sys::path::append(GCCDir, D.Dir, "..", D.getTargetTriple(),
+  "lib/crt0.o");
+  return llvm::sys::fs::exists(GCCDir);
+}
+
 /// RISCV Toolchain
 RISCVToolChain::RISCVToolChain(const Driver &D, const llvm::Triple &Triple,
const ArgList &Args)

diff  --git a/clang/lib/Driver/ToolChains/RISCVToolchain.h 
b/clang/lib/Driver/ToolChains/RISCVToolchain.h
index 4734aee5f1ab..62099bee0404 100644
--- a/clang/lib/Driver/ToolChains/RISCVToolchain.h
+++ b/clang/lib/Driver/ToolChains/RISCVToolchain.h
@@ -21,6 +21,7 @@ class LLVM_LIBRARY_VISIBILITY RISCVToolChain : public 
Generic_ELF {
   RISCVToolChain(const Driver &D, const llvm::Triple &Triple,

[llvm-branch-commits] [llvm] 926681b - [CostModel] Add basic implementation of getGatherScatterOpCost.

2020-11-26 Thread Florian Hahn via llvm-branch-commits


Author: Florian Hahn
Date: 2020-11-26T12:02:25Z
New Revision: 926681b6be701176f4f806e28932e8013fe4dec1

URL: 
https://github.com/llvm/llvm-project/commit/926681b6be701176f4f806e28932e8013fe4dec1
DIFF: 
https://github.com/llvm/llvm-project/commit/926681b6be701176f4f806e28932e8013fe4dec1.diff

LOG: [CostModel] Add basic implementation of getGatherScatterOpCost.

Add a basic implementation of getGatherScatterOpCost to BasicTTIImpl.

The implementation estimates the cost of scalarizing the loads/stores,
the cost of packing/extracting the individual lanes and the cost of
only selecting enabled lanes.

This more accurately reflects the current cost on targets like AArch64.

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D91984

Added: 


Modified: 
llvm/include/llvm/CodeGen/BasicTTIImpl.h
llvm/test/Analysis/CostModel/AArch64/mem-op-cost-model.ll
llvm/test/Transforms/SLPVectorizer/AArch64/gather-cost.ll

Removed: 




diff  --git a/llvm/include/llvm/CodeGen/BasicTTIImpl.h 
b/llvm/include/llvm/CodeGen/BasicTTIImpl.h
index fce025aa75f8..0b6b2655e0d5 100644
--- a/llvm/include/llvm/CodeGen/BasicTTIImpl.h
+++ b/llvm/include/llvm/CodeGen/BasicTTIImpl.h
@@ -991,6 +991,51 @@ class BasicTTIImplBase : public 
TargetTransformInfoImplCRTPBase {
 return Cost;
   }
 
+  unsigned getGatherScatterOpCost(unsigned Opcode, Type *DataTy,
+  const Value *Ptr, bool VariableMask,
+  Align Alignment, TTI::TargetCostKind 
CostKind,
+  const Instruction *I = nullptr) {
+auto *VT = cast(DataTy);
+// Assume the target does not have support for gather/scatter operations
+// and provide a rough estimate.
+//
+// First, compute the cost of extracting the individual addresses and the
+// individual memory operations.
+int LoadCost =
+VT->getNumElements() *
+(getVectorInstrCost(
+ Instruction::ExtractElement,
+ FixedVectorType::get(PointerType::get(VT->getElementType(), 0),
+  VT->getNumElements()),
+ -1) +
+ getMemoryOpCost(Opcode, VT->getElementType(), Alignment, 0, 
CostKind));
+
+// Next, compute the cost of packing the result in a vector.
+int PackingCost = getScalarizationOverhead(VT, Opcode != 
Instruction::Store,
+   Opcode == Instruction::Store);
+
+int ConditionalCost = 0;
+if (VariableMask) {
+  // Compute the cost of conditionally executing the memory operations with
+  // variable masks. This includes extracting the individual conditions, a
+  // branches and PHIs to combine the results.
+  // NOTE: Estimating the cost of conditionally executing the memory
+  // operations accurately is quite 
diff icult and the current solution
+  // provides a very rough estimate only.
+  ConditionalCost =
+  VT->getNumElements() *
+  (getVectorInstrCost(
+   Instruction::ExtractElement,
+   FixedVectorType::get(Type::getInt1Ty(DataTy->getContext()),
+VT->getNumElements()),
+   -1) +
+   getCFInstrCost(Instruction::Br, CostKind) +
+   getCFInstrCost(Instruction::PHI, CostKind));
+}
+
+return LoadCost + PackingCost + ConditionalCost;
+  }
+
   unsigned getInterleavedMemoryOpCost(
   unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef 
Indices,
   Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind,

diff  --git a/llvm/test/Analysis/CostModel/AArch64/mem-op-cost-model.ll 
b/llvm/test/Analysis/CostModel/AArch64/mem-op-cost-model.ll
index 9e9081fe4aea..78f6b8d1a03d 100644
--- a/llvm/test/Analysis/CostModel/AArch64/mem-op-cost-model.ll
+++ b/llvm/test/Analysis/CostModel/AArch64/mem-op-cost-model.ll
@@ -90,10 +90,10 @@ define <8 x i64> @load_512(<8 x i64>* %ptr) {
 declare <4 x i8> @llvm.masked.gather.v4i8.v4p0i8(<4 x i8*>, i32 immarg, <4 x 
i1>, <4 x i8>)
 define <4 x i8> @gather_load_4xi8_constant_mask(<4 x i8*> %ptrs) {
 ; CHECK: gather_load_4xi8_constant_mask
-; CHECK-NEON:Cost Model: Found an estimated cost of 1 for instruction:   
%lv = call <4 x i8> @llvm.masked.gather.v4i8.v4p0i8
-; CHECK-SVE-128: Cost Model: Found an estimated cost of 1 for instruction:   
%lv = call <4 x i8> @llvm.masked.gather.v4i8.v4p0i8
-; CHECK-SVE-256: Cost Model: Found an estimated cost of 1 for instruction:   
%lv = call <4 x i8> @llvm.masked.gather.v4i8.v4p0i8
-; CHECK-SVE-512: Cost Model: Found an estimated cost of 1 for instruction:   
%lv = call <4 x i8> @llvm.masked.gather.v4i8.v4p0i8
+; CHECK-NEON:Cost Model: Found an estimated cost of 17 for instruction:  
%lv = call <4 x i8> @llvm.masked.gather.v4i8.v4p0i8
+; CHECK-SVE-128: Cost Model: Found an estimated cost of 17 for instruction:

[llvm-branch-commits] [llvm] 2da8fa4 - [X86] Extend neg-abs test coverage

2020-11-26 Thread Simon Pilgrim via llvm-branch-commits


Author: Simon Pilgrim
Date: 2020-11-26T12:06:44Z
New Revision: 2da8fa4ebf1077b35c1bc618616ec902e737c11b

URL: 
https://github.com/llvm/llvm-project/commit/2da8fa4ebf1077b35c1bc618616ec902e737c11b
DIFF: 
https://github.com/llvm/llvm-project/commit/2da8fa4ebf1077b35c1bc618616ec902e737c11b.diff

LOG: [X86] Extend neg-abs test coverage

Add 32-bit tests and test i8/i16/i32/i64/i128 like we do for abs.ll

Added: 


Modified: 
llvm/test/CodeGen/X86/neg-abs.ll

Removed: 




diff  --git a/llvm/test/CodeGen/X86/neg-abs.ll 
b/llvm/test/CodeGen/X86/neg-abs.ll
index 099aa8bdf792..10896bb564c8 100644
--- a/llvm/test/CodeGen/X86/neg-abs.ll
+++ b/llvm/test/CodeGen/X86/neg-abs.ll
@@ -1,18 +1,156 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -verify-machineinstrs \
-; RUN:   -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
+; RUN: llc < %s -verify-machineinstrs -mtriple=i686-unknown-unknown | 
FileCheck %s --check-prefix=X86
+; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown | 
FileCheck %s --check-prefix=X64
 
-declare i64 @llvm.abs.i64(i64, i1 immarg)
+declare i8 @llvm.abs.i8(i8, i1)
+declare i16 @llvm.abs.i16(i16, i1)
+declare i24 @llvm.abs.i24(i24, i1)
+declare i32 @llvm.abs.i32(i32, i1)
+declare i64 @llvm.abs.i64(i64, i1)
+declare i128 @llvm.abs.i128(i128, i1)
 
-define i64@neg_abs(i64 %x) {
-; CHECK-LABEL: neg_abs:
-; CHECK:   # %bb.0:
-; CHECK-NEXT:movq %rdi, %rax
-; CHECK-NEXT:negq %rax
-; CHECK-NEXT:cmovlq %rdi, %rax
-; CHECK-NEXT:negq %rax
-; CHECK-NEXT:retq
+define i8 @neg_abs_i8(i8 %x) nounwind {
+; X86-LABEL: neg_abs_i8:
+; X86:   # %bb.0:
+; X86-NEXT:movb {{[0-9]+}}(%esp), %cl
+; X86-NEXT:movl %ecx, %eax
+; X86-NEXT:sarb $7, %al
+; X86-NEXT:xorb %al, %cl
+; X86-NEXT:subb %cl, %al
+; X86-NEXT:retl
+;
+; X64-LABEL: neg_abs_i8:
+; X64:   # %bb.0:
+; X64-NEXT:movl %edi, %eax
+; X64-NEXT:sarb $7, %al
+; X64-NEXT:xorb %al, %dil
+; X64-NEXT:subb %dil, %al
+; X64-NEXT:retq
+  %abs = tail call i8 @llvm.abs.i8(i8 %x, i1 true)
+  %neg = sub nsw i8 0, %abs
+  ret i8 %neg
+}
+
+define i16 @neg_abs_i16(i16 %x) nounwind {
+; X86-LABEL: neg_abs_i16:
+; X86:   # %bb.0:
+; X86-NEXT:movswl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT:movl %ecx, %eax
+; X86-NEXT:sarl $15, %eax
+; X86-NEXT:xorl %eax, %ecx
+; X86-NEXT:subl %ecx, %eax
+; X86-NEXT:# kill: def $ax killed $ax killed $eax
+; X86-NEXT:retl
+;
+; X64-LABEL: neg_abs_i16:
+; X64:   # %bb.0:
+; X64-NEXT:movl %edi, %eax
+; X64-NEXT:negw %ax
+; X64-NEXT:cmovlw %di, %ax
+; X64-NEXT:negl %eax
+; X64-NEXT:# kill: def $ax killed $ax killed $eax
+; X64-NEXT:retq
+  %abs = tail call i16 @llvm.abs.i16(i16 %x, i1 true)
+  %neg = sub nsw i16 0, %abs
+  ret i16 %neg
+}
+
+define i32 @neg_abs_i32(i32 %x) nounwind {
+; X86-LABEL: neg_abs_i32:
+; X86:   # %bb.0:
+; X86-NEXT:movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT:movl %ecx, %eax
+; X86-NEXT:sarl $31, %eax
+; X86-NEXT:xorl %eax, %ecx
+; X86-NEXT:subl %ecx, %eax
+; X86-NEXT:retl
+;
+; X64-LABEL: neg_abs_i32:
+; X64:   # %bb.0:
+; X64-NEXT:movl %edi, %eax
+; X64-NEXT:negl %eax
+; X64-NEXT:cmovll %edi, %eax
+; X64-NEXT:negl %eax
+; X64-NEXT:retq
+  %abs = tail call i32 @llvm.abs.i32(i32 %x, i1 true)
+  %neg = sub nsw i32 0, %abs
+  ret i32 %neg
+}
+
+define i64 @neg_abs_i64(i64 %x) nounwind {
+; X86-LABEL: neg_abs_i64:
+; X86:   # %bb.0:
+; X86-NEXT:pushl %esi
+; X86-NEXT:movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT:movl %ecx, %edx
+; X86-NEXT:sarl $31, %edx
+; X86-NEXT:xorl %edx, %ecx
+; X86-NEXT:movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT:xorl %edx, %esi
+; X86-NEXT:movl %edx, %eax
+; X86-NEXT:subl %esi, %eax
+; X86-NEXT:sbbl %ecx, %edx
+; X86-NEXT:popl %esi
+; X86-NEXT:retl
+;
+; X64-LABEL: neg_abs_i64:
+; X64:   # %bb.0:
+; X64-NEXT:movq %rdi, %rax
+; X64-NEXT:negq %rax
+; X64-NEXT:cmovlq %rdi, %rax
+; X64-NEXT:negq %rax
+; X64-NEXT:retq
   %abs = tail call i64 @llvm.abs.i64(i64 %x, i1 true)
   %neg = sub nsw i64 0, %abs
   ret i64 %neg
 }
+
+define i128 @neg_abs_i128(i128 %x) nounwind {
+; X86-LABEL: neg_abs_i128:
+; X86:   # %bb.0:
+; X86-NEXT:pushl %ebp
+; X86-NEXT:pushl %ebx
+; X86-NEXT:pushl %edi
+; X86-NEXT:pushl %esi
+; X86-NEXT:movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT:movl %ecx, %edx
+; X86-NEXT:sarl $31, %edx
+; X86-NEXT:xorl %edx, %ecx
+; X86-NEXT:movl {{[0-9]+}}(%esp), %esi
+; X86-NEXT:xorl %edx, %esi
+; X86-NEXT:movl {{[0-9]+}}(%esp), %edi
+; X86-NEXT:xorl %edx, %edi
+; X86-NEXT:movl {{[0-9]+}}(%esp), %ebx
+; X86-NEXT:xorl %edx, %ebx
+; X86-NEXT:movl %edx, %ebp
+; X86-NEXT:subl %ebx, %ebp
+; X86-NEXT:movl %edx,

[llvm-branch-commits] [clang-tools-extra] 1ca174b - [clangd][query-driver] Extract target

2020-11-26 Thread Aleksandr Platonov via llvm-branch-commits


Author: Aleksandr Platonov
Date: 2020-11-26T15:08:26+03:00
New Revision: 1ca174b6420a49bcd3331d6f86e237b627163597

URL: 
https://github.com/llvm/llvm-project/commit/1ca174b6420a49bcd3331d6f86e237b627163597
DIFF: 
https://github.com/llvm/llvm-project/commit/1ca174b6420a49bcd3331d6f86e237b627163597.diff

LOG: [clangd][query-driver] Extract target

In some cases system includes extractions is not enough, we also need target 
specific defines.
The problems appears when clang default target is not the same as toolchain's 
one (GCC cross-compiler, MinGW on Windows).
After this patch `query-driver` also extracts target and adds 
`--target=` compile option.

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D92012

Added: 


Modified: 
clang-tools-extra/clangd/QueryDriverDatabase.cpp
clang-tools-extra/clangd/test/system-include-extractor.test

Removed: 




diff  --git a/clang-tools-extra/clangd/QueryDriverDatabase.cpp 
b/clang-tools-extra/clangd/QueryDriverDatabase.cpp
index 9d731f5563cf..d59263e73994 100644
--- a/clang-tools-extra/clangd/QueryDriverDatabase.cpp
+++ b/clang-tools-extra/clangd/QueryDriverDatabase.cpp
@@ -33,6 +33,9 @@
 #include "support/Logger.h"
 #include "support/Path.h"
 #include "support/Trace.h"
+#include "clang/Basic/Diagnostic.h"
+#include "clang/Basic/TargetInfo.h"
+#include "clang/Basic/TargetOptions.h"
 #include "clang/Driver/Types.h"
 #include "clang/Tooling/CompilationDatabase.h"
 #include "llvm/ADT/DenseMap.h"
@@ -56,55 +59,102 @@ namespace clang {
 namespace clangd {
 namespace {
 
-std::vector parseDriverOutput(llvm::StringRef Output) {
+struct DriverInfo {
   std::vector SystemIncludes;
+  std::string Target;
+};
+
+bool isValidTarget(llvm::StringRef Triple) {
+  std::shared_ptr TargetOpts(new TargetOptions);
+  TargetOpts->Triple = Triple.str();
+  DiagnosticsEngine Diags(new DiagnosticIDs, new DiagnosticOptions,
+  new IgnoringDiagConsumer);
+  IntrusiveRefCntPtr Target =
+  TargetInfo::CreateTargetInfo(Diags, TargetOpts);
+  return bool(Target);
+}
+
+llvm::Optional parseDriverOutput(llvm::StringRef Output) {
+  DriverInfo Info;
   const char SIS[] = "#include <...> search starts here:";
   const char SIE[] = "End of search list.";
+  const char TS[] = "Target: ";
   llvm::SmallVector Lines;
   Output.split(Lines, '\n', /*MaxSplit=*/-1, /*KeepEmpty=*/false);
 
-  auto StartIt = llvm::find_if(
-  Lines, [SIS](llvm::StringRef Line) { return Line.trim() == SIS; });
-  if (StartIt == Lines.end()) {
+  enum {
+Initial,// Initial state: searching for target or includes 
list.
+IncludesExtracting, // Includes extracting.
+Done// Includes and target extraction done.
+  } State = Initial;
+  bool SeenIncludes = false;
+  bool SeenTarget = false;
+  for (auto *It = Lines.begin(); State != Done && It != Lines.end(); ++It) {
+auto Line = *It;
+switch (State) {
+case Initial:
+  if (!SeenIncludes && Line.trim() == SIS) {
+SeenIncludes = true;
+State = IncludesExtracting;
+  } else if (!SeenTarget && Line.trim().startswith(TS)) {
+SeenTarget = true;
+llvm::StringRef TargetLine = Line.trim();
+TargetLine.consume_front(TS);
+// Only detect targets that clang understands
+if (!isValidTarget(TargetLine)) {
+  elog("System include extraction: invalid target \"{0}\", ignoring",
+   TargetLine);
+} else {
+  Info.Target = TargetLine.str();
+  vlog("System include extraction: target extracted: \"{0}\"",
+   TargetLine);
+}
+  }
+  break;
+case IncludesExtracting:
+  if (Line.trim() == SIE) {
+State = SeenTarget ? Done : Initial;
+  } else {
+Info.SystemIncludes.push_back(Line.trim().str());
+vlog("System include extraction: adding {0}", Line);
+  }
+  break;
+default:
+  llvm_unreachable("Impossible state of the driver output parser");
+  break;
+}
+  }
+  if (!SeenIncludes) {
 elog("System include extraction: start marker not found: {0}", Output);
-return {};
+return llvm::None;
   }
-  ++StartIt;
-  const auto EndIt =
-  llvm::find_if(llvm::make_range(StartIt, Lines.end()),
-[SIE](llvm::StringRef Line) { return Line.trim() == SIE; 
});
-  if (EndIt == Lines.end()) {
+  if (State == IncludesExtracting) {
 elog("System include extraction: end marker missing: {0}", Output);
-return {};
+return llvm::None;
   }
-
-  for (llvm::StringRef Line : llvm::make_range(StartIt, EndIt)) {
-SystemIncludes.push_back(Line.trim().str());
-vlog("System include extraction: adding {0}", Line);
-  }
-  return SystemIncludes;
+  return std::move(Info);
 }
 
-std::vector
-extractSystemIncludes(PathRef Driver, llvm::StringRef Lang,
-  llvm::ArrayRef Command

[llvm-branch-commits] [mlir] 4dd5f79 - [mlir][bufferize] Add argument materialization for bufferization

2020-11-26 Thread Stephan Herhut via llvm-branch-commits


Author: Stephan Herhut
Date: 2020-11-26T13:43:44+01:00
New Revision: 4dd5f79f07022dbbff547f4aff13b27134331215

URL: 
https://github.com/llvm/llvm-project/commit/4dd5f79f07022dbbff547f4aff13b27134331215
DIFF: 
https://github.com/llvm/llvm-project/commit/4dd5f79f07022dbbff547f4aff13b27134331215.diff

LOG: [mlir][bufferize] Add argument materialization for bufferization

This enables partial bufferization that includes function signatures. To test 
this, this
change also makes the func-bufferize partial and adds a dedicated 
finalizing-bufferize pass.

Differential Revision: https://reviews.llvm.org/D92032

Added: 
mlir/test/Dialect/Standard/func-bufferize-partial.mlir

Modified: 
mlir/include/mlir/Dialect/StandardOps/Transforms/FuncConversions.h
mlir/include/mlir/Dialect/StandardOps/Transforms/Passes.td
mlir/include/mlir/Transforms/Passes.h
mlir/include/mlir/Transforms/Passes.td
mlir/lib/Dialect/StandardOps/Transforms/FuncBufferize.cpp
mlir/lib/Dialect/StandardOps/Transforms/FuncConversions.cpp
mlir/lib/Transforms/Bufferize.cpp
mlir/test/Dialect/Standard/func-bufferize.mlir

Removed: 




diff  --git 
a/mlir/include/mlir/Dialect/StandardOps/Transforms/FuncConversions.h 
b/mlir/include/mlir/Dialect/StandardOps/Transforms/FuncConversions.h
index 5a1bc7b9716e..55da3af88758 100644
--- a/mlir/include/mlir/Dialect/StandardOps/Transforms/FuncConversions.h
+++ b/mlir/include/mlir/Dialect/StandardOps/Transforms/FuncConversions.h
@@ -26,6 +26,13 @@ void 
populateCallOpTypeConversionPattern(OwningRewritePatternList &patterns,
  MLIRContext *ctx,
  TypeConverter &converter);
 
+/// Add a pattern to the given pattern list to rewrite branch operations and
+/// `return` to use operands that have been legalized by the conversion
+/// framework. This can only be done if the branch operation implements the
+/// BranchOpInterface. Only needed for partial conversions.
+void populateBranchOpInterfaceAndReturnOpTypeConversionPattern(
+OwningRewritePatternList &patterns, MLIRContext *ctx,
+TypeConverter &converter);
 } // end namespace mlir
 
 #endif // MLIR_DIALECT_STANDARDOPS_TRANSFORMS_FUNCCONVERSIONS_H_

diff  --git a/mlir/include/mlir/Dialect/StandardOps/Transforms/Passes.td 
b/mlir/include/mlir/Dialect/StandardOps/Transforms/Passes.td
index 3be398fecb0c..9623dd14a296 100644
--- a/mlir/include/mlir/Dialect/StandardOps/Transforms/Passes.td
+++ b/mlir/include/mlir/Dialect/StandardOps/Transforms/Passes.td
@@ -25,28 +25,26 @@ def StdExpandOps : FunctionPass<"std-expand"> {
 def FuncBufferize : Pass<"func-bufferize", "ModuleOp"> {
   let summary = "Bufferize func/call/return ops";
   let description = [{
-A finalizing bufferize pass that bufferizes std.func and std.call ops.
+A bufferize pass that bufferizes std.func and std.call ops.
 
 Because this pass updates std.func ops, it must be a module pass. It is
 useful to keep this pass separate from other bufferizations so that the
 other ones can be run at function-level in parallel.
 
-This pass must be done atomically for two reasons:
-1. This pass changes func op signatures, which requires atomically updating
-   calls as well throughout the entire module.
-2. This pass changes the type of block arguments, which requires that all
-   successor arguments of predecessors be converted. Terminators are not
-   a closed universe (and need not implement BranchOpInterface), and so we
-   cannot in general rewrite them.
+This pass must be done atomically because it changes func op signatures,
+which requires atomically updating calls as well throughout the entire
+module.
 
-Note, because this is a "finalizing" bufferize step, it can create
-invalid IR because it will not create materializations. To avoid this
-situation, the pass must only be run when the only SSA values of
-tensor type are:
-- block arguments
-- the result of tensor_load
-Other values of tensor type should be eliminated by earlier
-bufferization passes.
+This pass also changes the type of block arguments, which requires that all
+successor arguments of predecessors be converted. This is achieved by
+rewriting terminators based on the information provided by the
+`BranchOpInterface`.
+As this pass rewrites function operations, it also rewrites the
+corresponding return operations. Other return-like operations that
+implement the `ReturnLike` trait are not rewritten in general, as they
+require that the correspondign parent operation is also rewritten.
+Finally, this pass fails for unknown terminators, as we cannot decide
+whether they need rewriting. 
   }];
   let constructor = "mlir::createFuncBufferizePass()";
 }

diff  --git a/mlir/include/mlir/Transforms/Passes.h 
b/mlir/include/

[llvm-branch-commits] [llvm] c2b49b2 - [VE] Add comprehensive stackframe tests

2020-11-26 Thread Kazushi Marukawa via llvm-branch-commits


Author: Kazushi (Jam) Marukawa
Date: 2020-11-26T22:12:09+09:00
New Revision: c2b49b2fb4bfe62d64902839b39a56851cfabac7

URL: 
https://github.com/llvm/llvm-project/commit/c2b49b2fb4bfe62d64902839b39a56851cfabac7
DIFF: 
https://github.com/llvm/llvm-project/commit/c2b49b2fb4bfe62d64902839b39a56851cfabac7.diff

LOG: [VE] Add comprehensive stackframe tests

Add comprehensive stackframe regression tests as a preparation of
VEFrameLowering.cpp optimizations.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D92170

Added: 
llvm/test/CodeGen/VE/Scalar/stackframe_align.ll
llvm/test/CodeGen/VE/Scalar/stackframe_size.ll

Modified: 
llvm/test/CodeGen/VE/Scalar/stackframe_call.ll
llvm/test/CodeGen/VE/Scalar/stackframe_nocall.ll

Removed: 




diff  --git a/llvm/test/CodeGen/VE/Scalar/stackframe_align.ll 
b/llvm/test/CodeGen/VE/Scalar/stackframe_align.ll
new file mode 100644
index ..f180ae531a9d
--- /dev/null
+++ b/llvm/test/CodeGen/VE/Scalar/stackframe_align.ll
@@ -0,0 +1,582 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=ve | FileCheck %s
+; RUN: llc < %s -mtriple=ve --frame-pointer=all \
+; RUN: | FileCheck %s --check-prefix=CHECKFP
+
+;;; Check stack frame allocation with static and dynamic stack object with
+;;; alignments as a test of getFrameIndexReference().
+
+;; Allocated buffer places from 9 to 15 bytes in 16 bytes local vars area.
+
+; Function Attrs: nounwind
+define i8* @test_frame7(i8* %0) {
+; CHECK-LABEL: test_frame7:
+; CHECK:   # %bb.0:
+; CHECK-NEXT:st %s9, (, %s11)
+; CHECK-NEXT:st %s10, 8(, %s11)
+; CHECK-NEXT:st %s15, 24(, %s11)
+; CHECK-NEXT:st %s16, 32(, %s11)
+; CHECK-NEXT:or %s9, 0, %s11
+; CHECK-NEXT:lea %s13, -192
+; CHECK-NEXT:and %s13, %s13, (32)0
+; CHECK-NEXT:lea.sl %s11, -1(%s13, %s11)
+; CHECK-NEXT:brge.l.t %s11, %s8, .LBB0_2
+; CHECK-NEXT:  # %bb.1:
+; CHECK-NEXT:ld %s61, 24(, %s14)
+; CHECK-NEXT:or %s62, 0, %s0
+; CHECK-NEXT:lea %s63, 315
+; CHECK-NEXT:shm.l %s63, (%s61)
+; CHECK-NEXT:shm.l %s8, 8(%s61)
+; CHECK-NEXT:shm.l %s11, 16(%s61)
+; CHECK-NEXT:monc
+; CHECK-NEXT:or %s0, 0, %s62
+; CHECK-NEXT:  .LBB0_2:
+; CHECK-NEXT:ld1b.zx %s1, (, %s0)
+; CHECK-NEXT:lea %s0, 185(, %s11)
+; CHECK-NEXT:st1b %s1, 185(, %s11)
+; CHECK-NEXT:or %s11, 0, %s9
+; CHECK-NEXT:ld %s16, 32(, %s11)
+; CHECK-NEXT:ld %s15, 24(, %s11)
+; CHECK-NEXT:ld %s10, 8(, %s11)
+; CHECK-NEXT:ld %s9, (, %s11)
+; CHECK-NEXT:b.l.t (, %s10)
+;
+; CHECKFP-LABEL: test_frame7:
+; CHECKFP:   # %bb.0:
+; CHECKFP-NEXT:st %s9, (, %s11)
+; CHECKFP-NEXT:st %s10, 8(, %s11)
+; CHECKFP-NEXT:st %s15, 24(, %s11)
+; CHECKFP-NEXT:st %s16, 32(, %s11)
+; CHECKFP-NEXT:or %s9, 0, %s11
+; CHECKFP-NEXT:lea %s13, -192
+; CHECKFP-NEXT:and %s13, %s13, (32)0
+; CHECKFP-NEXT:lea.sl %s11, -1(%s13, %s11)
+; CHECKFP-NEXT:brge.l.t %s11, %s8, .LBB0_2
+; CHECKFP-NEXT:  # %bb.1:
+; CHECKFP-NEXT:ld %s61, 24(, %s14)
+; CHECKFP-NEXT:or %s62, 0, %s0
+; CHECKFP-NEXT:lea %s63, 315
+; CHECKFP-NEXT:shm.l %s63, (%s61)
+; CHECKFP-NEXT:shm.l %s8, 8(%s61)
+; CHECKFP-NEXT:shm.l %s11, 16(%s61)
+; CHECKFP-NEXT:monc
+; CHECKFP-NEXT:or %s0, 0, %s62
+; CHECKFP-NEXT:  .LBB0_2:
+; CHECKFP-NEXT:ld1b.zx %s1, (, %s0)
+; CHECKFP-NEXT:lea %s0, -7(, %s9)
+; CHECKFP-NEXT:st1b %s1, -7(, %s9)
+; CHECKFP-NEXT:or %s11, 0, %s9
+; CHECKFP-NEXT:ld %s16, 32(, %s11)
+; CHECKFP-NEXT:ld %s15, 24(, %s11)
+; CHECKFP-NEXT:ld %s10, 8(, %s11)
+; CHECKFP-NEXT:ld %s9, (, %s11)
+; CHECKFP-NEXT:b.l.t (, %s10)
+  %2 = alloca [7 x i8], align 1
+  %3 = getelementptr inbounds [7 x i8], [7 x i8]* %2, i64 0, i64 0
+  %4 = load i8, i8* %0, align 1
+  store i8 %4, i8* %3, align 1
+  ret i8* %3
+}
+
+;; Allocated buffer is aligned by 8, so it places from 8 to 14 bytes in 16
+;; bytes local vars area.
+
+; Function Attrs: nounwind
+define i8* @test_frame7_align8(i8* %0) {
+; CHECK-LABEL: test_frame7_align8:
+; CHECK:   # %bb.0:
+; CHECK-NEXT:st %s9, (, %s11)
+; CHECK-NEXT:st %s10, 8(, %s11)
+; CHECK-NEXT:st %s15, 24(, %s11)
+; CHECK-NEXT:st %s16, 32(, %s11)
+; CHECK-NEXT:or %s9, 0, %s11
+; CHECK-NEXT:lea %s13, -192
+; CHECK-NEXT:and %s13, %s13, (32)0
+; CHECK-NEXT:lea.sl %s11, -1(%s13, %s11)
+; CHECK-NEXT:brge.l.t %s11, %s8, .LBB1_2
+; CHECK-NEXT:  # %bb.1:
+; CHECK-NEXT:ld %s61, 24(, %s14)
+; CHECK-NEXT:or %s62, 0, %s0
+; CHECK-NEXT:lea %s63, 315
+; CHECK-NEXT:shm.l %s63, (%s61)
+; CHECK-NEXT:shm.l %s8, 8(%s61)
+; CHECK-NEXT:shm.l %s11, 16(%s61)
+; CHECK-NEXT:monc
+; CHECK-NEXT:or %s0, 0, %s62
+; CHECK-NEXT:  .LBB1_2:
+; CHECK-NEXT:ld1b.zx %s1, (, %s0)
+; CHECK-NEXT:lea %s0, 184(, %s11)
+; CHECK-NEXT:st1b %s1, 184(, %s11)
+

[llvm-branch-commits] [llvm] a3b1fcb - [AArch64][CostModel] Precommit some vector mul tests. NFC.

2020-11-26 Thread Sjoerd Meijer via llvm-branch-commits


Author: Sjoerd Meijer
Date: 2020-11-26T13:23:11Z
New Revision: a3b1fcbc0cf5b70015d0f8aa983263d1ca84a8c8

URL: 
https://github.com/llvm/llvm-project/commit/a3b1fcbc0cf5b70015d0f8aa983263d1ca84a8c8
DIFF: 
https://github.com/llvm/llvm-project/commit/a3b1fcbc0cf5b70015d0f8aa983263d1ca84a8c8.diff

LOG: [AArch64][CostModel] Precommit some vector mul tests. NFC.

The cost-model is not getting the cost right for a mul with <2 x i64>
operands, i.e. we don't have a MUL.2d, and this is precommitting some
tests before adjusting this.

Added: 
llvm/test/Analysis/CostModel/AArch64/mul.ll

Modified: 


Removed: 




diff  --git a/llvm/test/Analysis/CostModel/AArch64/mul.ll 
b/llvm/test/Analysis/CostModel/AArch64/mul.ll
new file mode 100644
index ..6a29c6d772d4
--- /dev/null
+++ b/llvm/test/Analysis/CostModel/AArch64/mul.ll
@@ -0,0 +1,211 @@
+; NOTE: Assertions have been autogenerated by 
utils/update_analyze_test_checks.py
+; RUN: opt < %s -mtriple=aarch64-unknown-linux-gnu -cost-model 
-cost-kind=throughput -analyze | FileCheck %s --check-prefix=THROUGHPUT
+
+; Verify the cost of (vector) multiply instructions.
+
+define <2 x i8> @t1(<2 x i8> %a, <2 x i8> %b)  {
+; THROUGHPUT-LABEL: 't1'
+; THROUGHPUT-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: 
%1 = mul <2 x i8> %a, %b
+; THROUGHPUT-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: 
ret <2 x i8> %1
+;
+  %1 = mul <2 x i8> %a, %b
+  ret <2 x i8> %1
+}
+
+define <4 x i8> @t2(<4 x i8> %a, <4 x i8> %b)  {
+; THROUGHPUT-LABEL: 't2'
+; THROUGHPUT-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: 
%1 = mul <4 x i8> %a, %b
+; THROUGHPUT-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: 
ret <4 x i8> %1
+;
+  %1 = mul <4 x i8> %a, %b
+  ret <4 x i8> %1
+}
+
+define <8 x i8> @t3(<8 x i8> %a, <8 x i8> %b)  {
+; THROUGHPUT-LABEL: 't3'
+; THROUGHPUT-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: 
%1 = mul <8 x i8> %a, %b
+; THROUGHPUT-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: 
ret <8 x i8> %1
+;
+  %1 = mul <8 x i8> %a, %b
+  ret <8 x i8> %1
+}
+
+define <16 x i8> @t4(<16 x i8> %a, <16 x i8> %b)  {
+; THROUGHPUT-LABEL: 't4'
+; THROUGHPUT-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: 
%1 = mul <16 x i8> %a, %b
+; THROUGHPUT-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: 
ret <16 x i8> %1
+;
+  %1 = mul <16 x i8> %a, %b
+  ret <16 x i8> %1
+}
+
+define <32 x i8> @t5(<32 x i8> %a, <32 x i8> %b)  {
+; THROUGHPUT-LABEL: 't5'
+; THROUGHPUT-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: 
%1 = mul <32 x i8> %a, %b
+; THROUGHPUT-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: 
ret <32 x i8> %1
+;
+  %1 = mul <32 x i8> %a, %b
+  ret <32 x i8> %1
+}
+
+define <2 x i16> @t6(<2 x i16> %a, <2 x i16> %b)  {
+; THROUGHPUT-LABEL: 't6'
+; THROUGHPUT-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: 
%1 = mul <2 x i16> %a, %b
+; THROUGHPUT-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: 
ret <2 x i16> %1
+;
+  %1 = mul <2 x i16> %a, %b
+  ret <2 x i16> %1
+}
+
+define <4 x i16> @t7(<4 x i16> %a, <4 x i16> %b)  {
+; THROUGHPUT-LABEL: 't7'
+; THROUGHPUT-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: 
%1 = mul <4 x i16> %a, %b
+; THROUGHPUT-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: 
ret <4 x i16> %1
+;
+  %1 = mul <4 x i16> %a, %b
+  ret <4 x i16> %1
+}
+
+define <8 x i16> @t8(<8 x i16> %a, <8 x i16> %b)  {
+; THROUGHPUT-LABEL: 't8'
+; THROUGHPUT-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: 
%1 = mul <8 x i16> %a, %b
+; THROUGHPUT-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: 
ret <8 x i16> %1
+;
+  %1 = mul <8 x i16> %a, %b
+  ret <8 x i16> %1
+}
+
+define <16 x i16> @t9(<16 x i16> %a, <16 x i16> %b)  {
+; THROUGHPUT-LABEL: 't9'
+; THROUGHPUT-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: 
%1 = mul <16 x i16> %a, %b
+; THROUGHPUT-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: 
ret <16 x i16> %1
+;
+  %1 = mul <16 x i16> %a, %b
+  ret <16 x i16> %1
+}
+
+define <2 x i32> @t10(<2 x i32> %a, <2 x i32> %b)  {
+; THROUGHPUT-LABEL: 't10'
+; THROUGHPUT-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: 
%1 = mul <2 x i32> %a, %b
+; THROUGHPUT-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: 
ret <2 x i32> %1
+;
+  %1 = mul <2 x i32> %a, %b
+  ret <2 x i32> %1
+}
+
+define <4 x i32> @t11(<4 x i32> %a, <4 x i32> %b)  {
+; THROUGHPUT-LABEL: 't11'
+; THROUGHPUT-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: 
%1 = mul <4 x i32> %a, %b
+; THROUGHPUT-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: 
ret <4 x i32> %1
+;
+  %1 = mul <4 x i32> %a, %b
+  ret <4 x i32> %1
+}
+
+define <8 x i32> @t12(<8 x i32> %a, <8 x i32> %b)  {
+; T

[llvm-branch-commits] [llvm] 384996f - [IndVarSimplify] Fix Modified status when handling dead PHI nodes

2020-11-26 Thread David Stenberg via llvm-branch-commits


Author: David Stenberg
Date: 2020-11-26T14:28:21+01:00
New Revision: 384996f9e18ff3b7fa35b2083bf352c64b05c7bc

URL: 
https://github.com/llvm/llvm-project/commit/384996f9e18ff3b7fa35b2083bf352c64b05c7bc
DIFF: 
https://github.com/llvm/llvm-project/commit/384996f9e18ff3b7fa35b2083bf352c64b05c7bc.diff

LOG: [IndVarSimplify] Fix Modified status when handling dead PHI nodes

When bailing out in rewriteLoopExitValues() you could be left with PHI
nodes in the DeadInsts vector. Those would be not handled by the use of
RecursivelyDeleteTriviallyDeadInstructions() in IndVarSimplify. This
resulted in the IndVarSimplify pass returning an incorrect modified
status. This was caught by the expensive check introduced in D86589.

This patches changes IndVarSimplify so that it deletes those PHI nodes,
using RecursivelyDeleteDeadPHINode().

This fixes PR47486.

Reviewed By: mkazantsev

Differential Revision: https://reviews.llvm.org/D91153

Added: 
llvm/test/Transforms/IndVarSimplify/rewrite-loop-exit-values-phi.ll

Modified: 
llvm/lib/Transforms/Scalar/IndVarSimplify.cpp

Removed: 




diff  --git a/llvm/lib/Transforms/Scalar/IndVarSimplify.cpp 
b/llvm/lib/Transforms/Scalar/IndVarSimplify.cpp
index 5ff4c9ad18f46..ab40a9e533de2 100644
--- a/llvm/lib/Transforms/Scalar/IndVarSimplify.cpp
+++ b/llvm/lib/Transforms/Scalar/IndVarSimplify.cpp
@@ -1869,11 +1869,15 @@ bool IndVarSimplify::run(Loop *L) {
 
   // Now that we're done iterating through lists, clean up any instructions
   // which are now dead.
-  while (!DeadInsts.empty())
-if (Instruction *Inst =
-dyn_cast_or_null(DeadInsts.pop_back_val()))
+  while (!DeadInsts.empty()) {
+Value *V = DeadInsts.pop_back_val();
+
+if (PHINode *PHI = dyn_cast_or_null(V))
+  Changed |= RecursivelyDeleteDeadPHINode(PHI, TLI, MSSAU.get());
+else if (Instruction *Inst = dyn_cast_or_null(V))
   Changed |=
   RecursivelyDeleteTriviallyDeadInstructions(Inst, TLI, MSSAU.get());
+  }
 
   // The Rewriter may not be used from this point on.
 

diff  --git 
a/llvm/test/Transforms/IndVarSimplify/rewrite-loop-exit-values-phi.ll 
b/llvm/test/Transforms/IndVarSimplify/rewrite-loop-exit-values-phi.ll
new file mode 100644
index 0..21eb9892f9c95
--- /dev/null
+++ b/llvm/test/Transforms/IndVarSimplify/rewrite-loop-exit-values-phi.ll
@@ -0,0 +1,51 @@
+; RUN: opt -indvars -S %s -o - | FileCheck %s
+
+; When bailing out in rewriteLoopExitValues() you would be left with a PHI node
+; that was not deleted, and the IndVar pass would return an incorrect modified
+; status. This was caught by the expensive check introduced in D86589.
+
+; CHECK-LABEL: header:
+; CHECK-NEXT: %idx = phi i64 [ %idx.next, %latch ], [ undef, %entry ]
+; CHECK-NEXT: %cond = icmp sgt i64 %n, %idx
+; CHECK-NEXT: br i1 %cond, label %end, label %inner.preheader
+
+; CHECK-LABEL: latch:
+; CHECK-NEXT: %idx.next = add nsw i64 %idx, -1
+; CHECK-NEXT: br label %header
+
+target datalayout = 
"e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-linux-gnu"
+
+@ptr = external global i64
+
+define dso_local void @hoge() local_unnamed_addr {
+entry:; preds = %entry
+  %n = sdiv exact i64 undef, 40
+  br label %header
+
+header:   ; preds = %latch, %entry
+  %idx = phi i64 [ %idx.next, %latch ], [ undef, %entry ]
+  %cond = icmp sgt i64 %n, %idx
+  br i1 %cond, label %end, label %inner
+
+inner:; preds = %inner, %header
+  %i = phi i64 [ %i.next, %inner ], [ 0, %header ]
+  %j = phi i64 [ %j.next, %inner ], [ %n, %header ]
+  %i.next = add nsw i64 %i, 1
+  %j.next = add nsw i64 %j, 1
+  store i64 undef, i64* @ptr
+  %cond1 = icmp slt i64 %j, %idx
+  br i1 %cond1, label %inner, label %inner_exit
+
+inner_exit:   ; preds = %inner
+  %indvar = phi i64 [ %i.next, %inner ]
+  %indvar_use = add i64 %indvar, 1
+  br label %latch
+
+latch:; preds = %inner_exit
+  %idx.next = add nsw i64 %idx, -1
+  br label %header
+
+end:  ; preds = %header
+  ret void
+}



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[llvm-branch-commits] [mlir] 87568c0 - [mlir][linalg] Mark linalg.yield as ReturnLike

2020-11-26 Thread Stephan Herhut via llvm-branch-commits


Author: Stephan Herhut
Date: 2020-11-26T14:44:08+01:00
New Revision: 87568c07f052b6872af3af4f2b7d5dcbbf72

URL: 
https://github.com/llvm/llvm-project/commit/87568c07f052b6872af3af4f2b7d5dcbbf72
DIFF: 
https://github.com/llvm/llvm-project/commit/87568c07f052b6872af3af4f2b7d5dcbbf72.diff

LOG: [mlir][linalg] Mark linalg.yield as ReturnLike

This change is required so that bufferization can properly identify
the linalg.yield as a terminator with an associated parent op.

Differential Revision: https://reviews.llvm.org/D92173

Added: 


Modified: 
mlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td
mlir/integration_test/Dialect/Linalg/CPU/test-tensor-e2e.mlir
mlir/integration_test/Dialect/Linalg/CPU/test-tensor-matmul.mlir

Removed: 




diff  --git a/mlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td 
b/mlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td
index 6a78b657aae0..454dde1bff93 100644
--- a/mlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td
+++ b/mlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td
@@ -14,6 +14,7 @@
 #define LINALG_OPS
 
 include "mlir/Dialect/Linalg/IR/LinalgBase.td"
+include "mlir/Interfaces/ControlFlowInterfaces.td"
 include "mlir/Interfaces/SideEffectInterfaces.td"
 include "mlir/Interfaces/ViewLikeInterface.td"
 
@@ -286,7 +287,7 @@ def Linalg_SliceOp : Linalg_Op<"slice", [
   let hasFolder = 1;
 }
 
-def Linalg_YieldOp : Linalg_Op<"yield", [NoSideEffect, Terminator]>,
+def Linalg_YieldOp : Linalg_Op<"yield", [NoSideEffect, ReturnLike, 
Terminator]>,
 Arguments<(ins Variadic:$values)> {
   let summary = "Linalg yield operation";
   let description = [{

diff  --git a/mlir/integration_test/Dialect/Linalg/CPU/test-tensor-e2e.mlir 
b/mlir/integration_test/Dialect/Linalg/CPU/test-tensor-e2e.mlir
index a6f24e45dbc1..61fc05f8c20b 100644
--- a/mlir/integration_test/Dialect/Linalg/CPU/test-tensor-e2e.mlir
+++ b/mlir/integration_test/Dialect/Linalg/CPU/test-tensor-e2e.mlir
@@ -1,4 +1,6 @@
-// RUN: mlir-opt %s -tensor-constant-bufferize -std-bufferize 
-linalg-bufferize -func-bufferize -convert-linalg-to-loops 
-convert-linalg-to-llvm -convert-std-to-llvm | \
+// RUN: mlir-opt %s -tensor-constant-bufferize -std-bufferize 
-linalg-bufferize \
+// RUN: -func-bufferize -finalizing-bufferize -convert-linalg-to-loops \
+// RUN: -convert-linalg-to-llvm -convert-std-to-llvm | \
 // RUN: mlir-cpu-runner -e main -entry-point-result=void \
 // RUN:   
-shared-libs=%mlir_integration_test_dir/libmlir_runner_utils%shlibext \
 // RUN: | FileCheck %s

diff  --git a/mlir/integration_test/Dialect/Linalg/CPU/test-tensor-matmul.mlir 
b/mlir/integration_test/Dialect/Linalg/CPU/test-tensor-matmul.mlir
index 4bcb3acdc162..e535febcf7dc 100644
--- a/mlir/integration_test/Dialect/Linalg/CPU/test-tensor-matmul.mlir
+++ b/mlir/integration_test/Dialect/Linalg/CPU/test-tensor-matmul.mlir
@@ -1,12 +1,14 @@
-// RUN: mlir-opt %s -linalg-bufferize -std-bufferize 
-tensor-constant-bufferize -func-bufferize \
-// RUN: -convert-linalg-to-loops -convert-linalg-to-llvm -convert-std-to-llvm 
| \
+// RUN: mlir-opt %s -linalg-bufferize -std-bufferize 
-tensor-constant-bufferize \
+// RUN: -func-bufferize -finalizing-bufferize  -convert-linalg-to-loops \
+// RUN: -convert-linalg-to-llvm -convert-std-to-llvm | \
 // RUN: mlir-cpu-runner -e main -entry-point-result=void \
 // RUN:   
-shared-libs=%mlir_integration_test_dir/libmlir_runner_utils%shlibext \
 // RUN: | FileCheck %s
 
 // RUN: mlir-opt %s  -linalg-tile="linalg-tile-sizes=1,2,3" -linalg-bufferize \
-// RUN: -scf-bufferize -std-bufferize -tensor-constant-bufferize 
-func-bufferize -convert-linalg-to-loops \
-// RUN:  -convert-scf-to-std -convert-linalg-to-llvm | \
+// RUN: -scf-bufferize -std-bufferize -tensor-constant-bufferize 
-func-bufferize \
+// RUN: -finalizing-bufferize -convert-linalg-to-loops -convert-scf-to-std \
+// RUN: -convert-linalg-to-llvm | \
 // RUN: mlir-cpu-runner -e main -entry-point-result=void \
 // RUN:   
-shared-libs=%mlir_integration_test_dir/libmlir_runner_utils%shlibext \
 // RUN: | FileCheck %s



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[llvm-branch-commits] [llvm] bd0b131 - [VPlan] Turn VPReplicateRecipe into a VPValue.

2020-11-26 Thread Florian Hahn via llvm-branch-commits


Author: Florian Hahn
Date: 2020-11-26T13:50:24Z
New Revision: bd0b1311dbd59b4b7c4188ef0ed930848dc657d1

URL: 
https://github.com/llvm/llvm-project/commit/bd0b1311dbd59b4b7c4188ef0ed930848dc657d1
DIFF: 
https://github.com/llvm/llvm-project/commit/bd0b1311dbd59b4b7c4188ef0ed930848dc657d1.diff

LOG: [VPlan] Turn VPReplicateRecipe into a VPValue.

Update VPReplicateRecipe to inherit from VPValue. This still does not
update scalarizeInstruction to set the result for the VPValue of
VPReplicateRecipe, because this first requires tracking scalar values in
VPTransformState.

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D91500

Added: 


Modified: 
llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
llvm/lib/Transforms/Vectorize/VPlan.cpp
llvm/lib/Transforms/Vectorize/VPlan.h
llvm/lib/Transforms/Vectorize/VPlanValue.h

Removed: 




diff  --git a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp 
b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
index c9d6a6199476..d72c18061b82 100644
--- a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+++ b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
@@ -2674,7 +2674,9 @@ void 
InnerLoopVectorizer::scalarizeInstruction(Instruction *Instr, VPUser &User,
   // Place the cloned scalar in the new loop.
   Builder.Insert(Cloned);
 
-  // Add the cloned scalar to the scalar map entry.
+  // TODO: Set result for VPValue of VPReciplicateRecipe. This requires
+  // representing scalar values in VPTransformState. Add the cloned scalar to
+  // the scalar map entry.
   VectorLoopValueMap.setScalarValue(Instr, Instance, Cloned);
 
   // If we just cloned a new assumption, add it the assumption cache.
@@ -7549,6 +7551,7 @@ VPBasicBlock *VPRecipeBuilder::handleReplication(
   auto *Recipe = new VPReplicateRecipe(I, Plan->mapToVPValues(I->operands()),
IsUniform, IsPredicated);
   setRecipe(I, Recipe);
+  Plan->addVPValue(I, Recipe);
 
   // Find if I uses a predicated instruction. If so, it will use its scalar
   // value. Avoid hoisting the insert-element which packs the scalar value into
@@ -8103,18 +8106,20 @@ void VPReductionRecipe::execute(VPTransformState 
&State) {
 
 void VPReplicateRecipe::execute(VPTransformState &State) {
   if (State.Instance) { // Generate a single instance.
-State.ILV->scalarizeInstruction(Ingredient, *this, *State.Instance,
-IsPredicated, State);
+State.ILV->scalarizeInstruction(getUnderlyingInstr(), *this,
+*State.Instance, IsPredicated, State);
 // Insert scalar instance packing it into a vector.
 if (AlsoPack && State.VF.isVector()) {
   // If we're constructing lane 0, initialize to start from undef.
   if (State.Instance->Lane == 0) {
 assert(!State.VF.isScalable() && "VF is assumed to be non scalable.");
-Value *Undef =
-UndefValue::get(VectorType::get(Ingredient->getType(), State.VF));
-State.ValueMap.setVectorValue(Ingredient, State.Instance->Part, Undef);
+Value *Undef = UndefValue::get(
+VectorType::get(getUnderlyingValue()->getType(), State.VF));
+State.ValueMap.setVectorValue(getUnderlyingInstr(),
+  State.Instance->Part, Undef);
   }
-  State.ILV->packScalarIntoVectorValue(Ingredient, *State.Instance);
+  State.ILV->packScalarIntoVectorValue(getUnderlyingInstr(),
+   *State.Instance);
 }
 return;
   }
@@ -8125,7 +8130,7 @@ void VPReplicateRecipe::execute(VPTransformState &State) {
   unsigned EndLane = IsUniform ? 1 : State.VF.getKnownMinValue();
   for (unsigned Part = 0; Part < State.UF; ++Part)
 for (unsigned Lane = 0; Lane < EndLane; ++Lane)
-  State.ILV->scalarizeInstruction(Ingredient, *this, {Part, Lane},
+  State.ILV->scalarizeInstruction(getUnderlyingInstr(), *this, {Part, 
Lane},
   IsPredicated, State);
 }
 

diff  --git a/llvm/lib/Transforms/Vectorize/VPlan.cpp 
b/llvm/lib/Transforms/Vectorize/VPlan.cpp
index e5ffab99af54..3b26d6b52efd 100644
--- a/llvm/lib/Transforms/Vectorize/VPlan.cpp
+++ b/llvm/lib/Transforms/Vectorize/VPlan.cpp
@@ -131,6 +131,8 @@ VPValue *VPRecipeBase::toVPValue() {
 return V;
   if (auto *V = dyn_cast(this))
 return V;
+  if (auto *V = dyn_cast(this))
+return V;
   return nullptr;
 }
 
@@ -149,6 +151,8 @@ const VPValue *VPRecipeBase::toVPValue() const {
 return V;
   if (auto *V = dyn_cast(this))
 return V;
+  if (auto *V = dyn_cast(this))
+return V;
   return nullptr;
 }
 
@@ -233,14 +237,8 @@ VPBlockBase 
*VPBlockBase::getEnclosingBlockWithPredecessors() {
 void VPBlockBase::deleteCFG(VPBlockBase *Entry) {
   SmallVector Blocks;
 
-  VPValue DummyValue;
-  for (VPBlockBase *Block : depth_first(Entry)) {
-// Drop all referen

[llvm-branch-commits] [clang] 39a5dd1 - [ASTImporter] Import the default argument of TemplateTemplateParmDecl

2020-11-26 Thread Raphael Isemann via llvm-branch-commits


Author: Raphael Isemann
Date: 2020-11-26T15:12:45+01:00
New Revision: 39a5dd164ca8648e24525869c934c9137c4887ef

URL: 
https://github.com/llvm/llvm-project/commit/39a5dd164ca8648e24525869c934c9137c4887ef
DIFF: 
https://github.com/llvm/llvm-project/commit/39a5dd164ca8648e24525869c934c9137c4887ef.diff

LOG: [ASTImporter] Import the default argument of TemplateTemplateParmDecl

Same idea as in D92103 and D92106, but I realised after creating those reviews 
that there are
also TemplateTemplateParmDecls that can have default arguments, so here's 
hopefully the
last patch for default template arguments.

Reviewed By: martong

Differential Revision: https://reviews.llvm.org/D92119

Added: 


Modified: 
clang/lib/AST/ASTImporter.cpp
clang/unittests/AST/ASTImporterTest.cpp

Removed: 




diff  --git a/clang/lib/AST/ASTImporter.cpp b/clang/lib/AST/ASTImporter.cpp
index 0886980fe905..835551528e0d 100644
--- a/clang/lib/AST/ASTImporter.cpp
+++ b/clang/lib/AST/ASTImporter.cpp
@@ -5250,15 +5250,22 @@ 
ASTNodeImporter::VisitTemplateTemplateParmDecl(TemplateTemplateParmDecl *D) {
   if (!TemplateParamsOrErr)
 return TemplateParamsOrErr.takeError();
 
-  // FIXME: Import default argument.
-
   TemplateTemplateParmDecl *ToD = nullptr;
-  (void)GetImportedOrCreateDecl(
-  ToD, D, Importer.getToContext(),
-  Importer.getToContext().getTranslationUnitDecl(), *LocationOrErr,
-  D->getDepth(), D->getPosition(), D->isParameterPack(),
-  (*NameOrErr).getAsIdentifierInfo(),
-  *TemplateParamsOrErr);
+  if (GetImportedOrCreateDecl(
+  ToD, D, Importer.getToContext(),
+  Importer.getToContext().getTranslationUnitDecl(), *LocationOrErr,
+  D->getDepth(), D->getPosition(), D->isParameterPack(),
+  (*NameOrErr).getAsIdentifierInfo(), *TemplateParamsOrErr))
+return ToD;
+
+  if (D->hasDefaultArgument()) {
+Expected ToDefaultArgOrErr =
+import(D->getDefaultArgument());
+if (!ToDefaultArgOrErr)
+  return ToDefaultArgOrErr.takeError();
+ToD->setDefaultArgument(Importer.getToContext(), *ToDefaultArgOrErr);
+  }
+
   return ToD;
 }
 

diff  --git a/clang/unittests/AST/ASTImporterTest.cpp 
b/clang/unittests/AST/ASTImporterTest.cpp
index 97a18a76622b..33e4b7226fba 100644
--- a/clang/unittests/AST/ASTImporterTest.cpp
+++ b/clang/unittests/AST/ASTImporterTest.cpp
@@ -901,6 +901,39 @@ TEST_P(ASTImporterOptionSpecificTestBase, 
ImportBeginLocOfDeclRefExpr) {
   .isValid());
 }
 
+TEST_P(ASTImporterOptionSpecificTestBase,
+   TemplateTemplateParmDeclNoDefaultArg) {
+  Decl *FromTU = getTuDecl(R"(
+   template typename TT> struct Y 
{};
+   )",
+   Lang_CXX17);
+  auto From = FirstDeclMatcher().match(
+  FromTU, templateTemplateParmDecl(hasName("TT")));
+  TemplateTemplateParmDecl *To = Import(From, Lang_CXX17);
+  ASSERT_FALSE(To->hasDefaultArgument());
+}
+
+TEST_P(ASTImporterOptionSpecificTestBase, TemplateTemplateParmDeclDefaultArg) {
+  Decl *FromTU = getTuDecl(R"(
+   template struct X {};
+   template typename TT = X> struct 
Y {};
+   )",
+   Lang_CXX17);
+  auto From = FirstDeclMatcher().match(
+  FromTU, templateTemplateParmDecl(hasName("TT")));
+  TemplateTemplateParmDecl *To = Import(From, Lang_CXX17);
+  ASSERT_TRUE(To->hasDefaultArgument());
+  const TemplateArgument &ToDefaultArg = 
To->getDefaultArgument().getArgument();
+  ASSERT_TRUE(To->isTemplateDecl());
+  TemplateDecl *ToTemplate = ToDefaultArg.getAsTemplate().getAsTemplateDecl();
+
+  // Find the default argument template 'X' in the AST and compare it against
+  // the default argument we got.
+  auto ToExpectedDecl = FirstDeclMatcher().match(
+  To->getTranslationUnitDecl(), classTemplateDecl(hasName("X")));
+  ASSERT_EQ(ToTemplate, ToExpectedDecl);
+}
+
 TEST_P(ASTImporterOptionSpecificTestBase,
ImportOfTemplatedDeclOfClassTemplateDecl) {
   Decl *FromTU = getTuDecl("template struct S{};", Lang_CXX03);



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[llvm-branch-commits] [llvm] 6464c4a - [LiveDebugVariables] Strip all debug instructions from nodebug functions

2020-11-26 Thread Robert Lougher via llvm-branch-commits


Author: Robert Lougher
Date: 2020-11-26T14:30:18Z
New Revision: 6464c4a170173a2b476ff4be6e160836032b68fe

URL: 
https://github.com/llvm/llvm-project/commit/6464c4a170173a2b476ff4be6e160836032b68fe
DIFF: 
https://github.com/llvm/llvm-project/commit/6464c4a170173a2b476ff4be6e160836032b68fe.diff

LOG: [LiveDebugVariables] Strip all debug instructions from nodebug functions

A crash/assertion failure in the greedy register allocator was tracked
down to a debug instr being passed to LiveIntervals::getInstructionIndex.
Normally this should not occur as debug instructions are collected and
removed by LiveDebugVariables before RA, and reinserted afterwards.
However, when a function has no debug info, LiveDebugVariables simply
strips any debug values that are present as they're not needed (this
situation will occur when a function with debug info is inlined into a
nodebug function). The problem is, it only removes DBG_VALUE instructions,
leaving DBG_LABELs (the cause of the crash).

This patch updates the LiveDebugVariables nodebug path to remove all debug
instructions. The test case verifies that DBG_VALUE/DBG_LABEL instructions
are present, and that they are stripped.

When -experimental-debug-variable-locations is enabled, certain variable
locations are represented by DBG_INSTR_REF instead of DBG_VALUE. The test
case verifies that a DBG_INSTR_REF is emitted by the option, and that it
is also stripped.

Differential Revision: https://reviews.llvm.org/D92127

Added: 
llvm/test/DebugInfo/X86/live-debug-vars-nodebug.ll

Modified: 
llvm/lib/CodeGen/LiveDebugVariables.cpp

Removed: 




diff  --git a/llvm/lib/CodeGen/LiveDebugVariables.cpp 
b/llvm/lib/CodeGen/LiveDebugVariables.cpp
index f4238bd38126..2325341070a3 100644
--- a/llvm/lib/CodeGen/LiveDebugVariables.cpp
+++ b/llvm/lib/CodeGen/LiveDebugVariables.cpp
@@ -1022,10 +1022,10 @@ bool LDVImpl::runOnMachineFunction(MachineFunction &mf) 
{
   return Changed;
 }
 
-static void removeDebugValues(MachineFunction &mf) {
+static void removeDebugInstrs(MachineFunction &mf) {
   for (MachineBasicBlock &MBB : mf) {
 for (auto MBBI = MBB.begin(), MBBE = MBB.end(); MBBI != MBBE; ) {
-  if (!MBBI->isDebugValue()) {
+  if (!MBBI->isDebugInstr()) {
 ++MBBI;
 continue;
   }
@@ -1038,7 +1038,7 @@ bool 
LiveDebugVariables::runOnMachineFunction(MachineFunction &mf) {
   if (!EnableLDV)
 return false;
   if (!mf.getFunction().getSubprogram()) {
-removeDebugValues(mf);
+removeDebugInstrs(mf);
 return false;
   }
   if (!pImpl)

diff  --git a/llvm/test/DebugInfo/X86/live-debug-vars-nodebug.ll 
b/llvm/test/DebugInfo/X86/live-debug-vars-nodebug.ll
new file mode 100644
index ..35d05392209d
--- /dev/null
+++ b/llvm/test/DebugInfo/X86/live-debug-vars-nodebug.ll
@@ -0,0 +1,101 @@
+; RUN: llc %s -mtriple=x86_64-unknown-unknown -o - -stop-before=finalize-isel \
+; RUN:   | FileCheck %s --check-prefix=NORMAL-INPUT
+
+; RUN: llc %s -mtriple=x86_64-unknown-unknown -o - -stop-before=finalize-isel \
+; RUN:   -experimental-debug-variable-locations \
+; RUN:   | FileCheck %s --check-prefix=EXPER-INPUT
+
+; RUN: llc %s -mtriple=x86_64-unknown-unknown -o - -stop-after=livedebugvars \
+; RUN:   | FileCheck %s --check-prefix=OUTPUT
+
+; RUN: llc %s -mtriple=x86_64-unknown-unknown -o - -stop-after=livedebugvars \
+; RUN:   -experimental-debug-variable-locations \
+; RUN:   | FileCheck %s --check-prefix=OUTPUT
+
+; This test checks that LiveDebugVariables strips all debug instructions
+; from nodebug functions. Such instructions occur when a function with debug
+; info is inlined into a nodebug function.
+
+; The test first verifies that DBG_VALUE/DBG_LABEL instructions are present in
+; the input to LiveDebugVariables. It then verifies that after the pass is ran
+; no debug instructions are present.
+
+; When -experimental-debug-variable-locations is enabled, certain variable
+; locations are represented by DBG_INSTR_REF instead of DBG_VALUE. The test
+; verifies that a DBG_INSTR_REF is emitted by the option, and that it is also
+; stripped.
+
+; Generated from:
+;
+; extern int foobar();
+; 
+; int bar(int a) {
+;   int b = 10;
+;   b += foobar();
+; label:
+;   if (a) goto label;
+;   return b;
+; }
+; 
+; __attribute__((nodebug))
+; int foo(int a) {
+;   return bar(a);
+; }
+
+; NORMAL-INPUT-DAG: DBG_VALUE
+; NORMAL-INPUT-DAG: DBG_LABEL
+
+; EXPER-INPUT-DAG: DBG_INSTR_REF
+; EXPER-INPUT-DAG: DBG_LABEL
+
+; OUTPUT-NOT: DBG_VALUE
+; OUTPUT-NOT: DBG_INSTR_REF
+; OUTPUT-NOT: DBG_LABEL
+
+target datalayout = 
"e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-linux-gnu"
+
+define dso_local i32 @_Z3fooi(i32 %a) local_unnamed_addr #0 {
+entry:
+  call void @llvm.dbg.value(metadata i32 %a, metadata !12, metadata 
!DIExpression()), !dbg !15
+  call void @llvm.dbg.value(metadata i32 10, metadata !13, metad

[llvm-branch-commits] [clang] a325856 - [clang][cli] Port Target option flags to new option parsing system

2020-11-26 Thread Jan Svoboda via llvm-branch-commits


Author: Jan Svoboda
Date: 2020-11-26T15:32:38+01:00
New Revision: a3258566868b3a16b131e8963932ac21888cb90b

URL: 
https://github.com/llvm/llvm-project/commit/a3258566868b3a16b131e8963932ac21888cb90b
DIFF: 
https://github.com/llvm/llvm-project/commit/a3258566868b3a16b131e8963932ac21888cb90b.diff

LOG: [clang][cli] Port Target option flags to new option parsing system

Depends on D83697

Original patch by Daniel Grumberg.

Differential Revision: https://reviews.llvm.org/D83698

Added: 


Modified: 
clang/include/clang/Driver/Options.td
clang/lib/Frontend/CompilerInvocation.cpp

Removed: 




diff  --git a/clang/include/clang/Driver/Options.td 
b/clang/include/clang/Driver/Options.td
index 88af70116304..0014ced5dca7 100644
--- a/clang/include/clang/Driver/Options.td
+++ b/clang/include/clang/Driver/Options.td
@@ -693,7 +693,8 @@ defm gpu_rdc : OptInFFlag<"gpu-rdc",
 def : Flag<["-"], "fcuda-rdc">, Alias;
 def : Flag<["-"], "fno-cuda-rdc">, Alias;
 defm cuda_short_ptr : OptInFFlag<"cuda-short-ptr",
-  "Use 32-bit pointers for accessing const/local/shared address spaces">;
+  "Use 32-bit pointers for accessing const/local/shared address spaces", "", 
"",
+  [], "TargetOpts->NVPTXUseShortPointers">;
 def rocm_path_EQ : Joined<["--"], "rocm-path=">, Group,
   HelpText<"ROCm installation path, used for finding and automatically linking 
required bitcode libraries.">;
 def rocm_device_lib_path_EQ : Joined<["--"], "rocm-device-lib-path=">, 
Group,
@@ -1049,7 +1050,7 @@ def fbracket_depth_EQ : Joined<["-"], "fbracket-depth=">, 
Group, Flags<
 def fsignaling_math : Flag<["-"], "fsignaling-math">, Group;
 def fno_signaling_math : Flag<["-"], "fno-signaling-math">, Group;
 defm jump_tables : OptOutFFlag<"jump-tables", "Use", "Do not use", " jump 
tables for lowering switches">;
-defm force_enable_int128 : OptInFFlag<"force-enable-int128", "Enable", 
"Disable", " support for int128_t type">;
+defm force_enable_int128 : OptInFFlag<"force-enable-int128", "Enable", 
"Disable", " support for int128_t type", [], "TargetOpts->ForceEnableInt128">;
 defm keep_static_consts : OptInFFlag<"keep-static-consts", "Keep", "Don't 
keep", " static const variables if unused", [NoXarchOption]>;
 defm fixed_point : OptInFFlag<"fixed-point", "Enable", "Disable", " fixed 
point types">;
 defm cxx_static_destructors : OptOutFFlag<"c++-static-destructors", "",

diff  --git a/clang/lib/Frontend/CompilerInvocation.cpp 
b/clang/lib/Frontend/CompilerInvocation.cpp
index 144bbe84abeb..fb79dea06320 100644
--- a/clang/lib/Frontend/CompilerInvocation.cpp
+++ b/clang/lib/Frontend/CompilerInvocation.cpp
@@ -3753,9 +3753,6 @@ static void ParseTargetArgs(TargetOptions &Opts, ArgList 
&Args,
   Opts.LinkerVersion =
   std::string(Args.getLastArgValue(OPT_target_linker_version));
   Opts.OpenCLExtensionsAsWritten = Args.getAllArgValues(OPT_cl_ext_EQ);
-  Opts.ForceEnableInt128 = Args.hasArg(OPT_fforce_enable_int128);
-  Opts.NVPTXUseShortPointers = Args.hasFlag(
-  options::OPT_fcuda_short_ptr, options::OPT_fno_cuda_short_ptr, false);
   Opts.AllowAMDGPUUnsafeFPAtomics =
   Args.hasFlag(options::OPT_munsafe_fp_atomics,
options::OPT_mno_unsafe_fp_atomics, false);



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[llvm-branch-commits] [mlir] 9549abc - Remove stray debug-only from test

2020-11-26 Thread Benjamin Kramer via llvm-branch-commits


Author: Benjamin Kramer
Date: 2020-11-26T15:37:18+01:00
New Revision: 9549abcbb8245aad271eb496a751cb65b2f7dc0f

URL: 
https://github.com/llvm/llvm-project/commit/9549abcbb8245aad271eb496a751cb65b2f7dc0f
DIFF: 
https://github.com/llvm/llvm-project/commit/9549abcbb8245aad271eb496a751cb65b2f7dc0f.diff

LOG: Remove stray debug-only from test

Added: 


Modified: 
mlir/test/Dialect/Standard/func-bufferize-partial.mlir

Removed: 




diff  --git a/mlir/test/Dialect/Standard/func-bufferize-partial.mlir 
b/mlir/test/Dialect/Standard/func-bufferize-partial.mlir
index 2afa5327e572..43ea4591e4e3 100644
--- a/mlir/test/Dialect/Standard/func-bufferize-partial.mlir
+++ b/mlir/test/Dialect/Standard/func-bufferize-partial.mlir
@@ -1,4 +1,4 @@
-// RUN: mlir-opt %s -func-bufferize -split-input-file -verify-diagnostics 
--debug-only=dialect-conversion | FileCheck %s
+// RUN: mlir-opt %s -func-bufferize -split-input-file -verify-diagnostics | 
FileCheck %s
 
 // CHECK-LABEL:   func @block_arguments(
 // CHECK-SAME:%[[ARG:.*]]: memref) -> memref {



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[llvm-branch-commits] [llvm] 12d59b6 - [DAG] Legalize umin(x, y) -> sub(x, usubsat(x, y)) and umax(x, y) -> add(x, usubsat(y, x)) iff usubsat is legal

2020-11-26 Thread Simon Pilgrim via llvm-branch-commits


Author: Simon Pilgrim
Date: 2020-11-26T14:47:28Z
New Revision: 12d59b696b33065e070d6ee7a55d2e8c019d138b

URL: 
https://github.com/llvm/llvm-project/commit/12d59b696b33065e070d6ee7a55d2e8c019d138b
DIFF: 
https://github.com/llvm/llvm-project/commit/12d59b696b33065e070d6ee7a55d2e8c019d138b.diff

LOG: [DAG] Legalize umin(x,y) -> sub(x,usubsat(x,y)) and umax(x,y) -> 
add(x,usubsat(y,x)) iff usubsat is legal

If usubsat() is legal, this is likely to result in smaller codegen expansion 
than the default cmp+select codegen expansion.

Allows us to move the x86-specific lowering to the generic expansion code.

Added: 


Modified: 
llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/midpoint-int-vec-128.ll

Removed: 




diff  --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp 
b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index 3464fe87d99f..e45a311f84a4 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -7478,10 +7478,26 @@ SDValue TargetLowering::expandIntMINMAX(SDNode *Node, 
SelectionDAG &DAG) const {
   SDValue Op0 = Node->getOperand(0);
   SDValue Op1 = Node->getOperand(1);
   EVT VT = Op0.getValueType();
+  unsigned Opcode = Node->getOpcode();
+  SDLoc DL(Node);
+
+  // umin(x,y) -> sub(x,usubsat(x,y))
+  if (Opcode == ISD::UMIN && isOperationLegal(ISD::SUB, VT) &&
+  isOperationLegal(ISD::USUBSAT, VT)) {
+return DAG.getNode(ISD::SUB, DL, VT, Op0,
+   DAG.getNode(ISD::USUBSAT, DL, VT, Op0, Op1));
+  }
+
+  // umax(x,y) -> add(x,usubsat(y,x))
+  if (Opcode == ISD::UMAX && isOperationLegal(ISD::ADD, VT) &&
+  isOperationLegal(ISD::USUBSAT, VT)) {
+return DAG.getNode(ISD::ADD, DL, VT, Op0,
+   DAG.getNode(ISD::USUBSAT, DL, VT, Op1, Op0));
+  }
 
   // Expand Y = MAX(A, B) -> Y = (A > B) ? A : B
   ISD::CondCode CC;
-  switch (Node->getOpcode()) {
+  switch (Opcode) {
   default: llvm_unreachable("How did we get here?");
   case ISD::SMAX: CC = ISD::SETGT; break;
   case ISD::SMIN: CC = ISD::SETLT; break;
@@ -7494,7 +7510,6 @@ SDValue TargetLowering::expandIntMINMAX(SDNode *Node, 
SelectionDAG &DAG) const {
   if (VT.isVector() && !isOperationLegalOrCustom(ISD::VSELECT, VT))
 return DAG.UnrollVectorOp(Node);
 
-  SDLoc DL(Node);
   SDValue Cond = DAG.getSetCC(DL, VT, Op0, Op1, CC);
   return DAG.getSelect(DL, VT, Cond, Op0, Op1);
 }

diff  --git a/llvm/lib/Target/X86/X86ISelLowering.cpp 
b/llvm/lib/Target/X86/X86ISelLowering.cpp
index fcbe1330b546..5cbca95f45f5 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -26959,22 +26959,6 @@ static SDValue LowerMINMAX(SDValue Op, SelectionDAG 
&DAG) {
   if (VT == MVT::v32i16 || VT == MVT::v64i8)
 return splitVectorIntBinary(Op, DAG);
 
-  SDLoc DL(Op);
-  unsigned Opcode = Op.getOpcode();
-  SDValue N0 = Op.getOperand(0);
-  SDValue N1 = Op.getOperand(1);
-
-  // For pre-SSE41, we can perform UMIN/UMAX v8i16 by using psubusw.
-  if (VT == MVT::v8i16) {
-assert((Opcode == ISD::UMIN || Opcode == ISD::UMAX) &&
-   "Unexpected MIN/MAX opcode");
-if (Opcode == ISD::UMIN)
-  return DAG.getNode(ISD::SUB, DL, VT, N0,
- DAG.getNode(ISD::USUBSAT, DL, VT, N0, N1));
-return DAG.getNode(ISD::ADD, DL, VT,
-   DAG.getNode(ISD::USUBSAT, DL, VT, N1, N0), N0);
-  }
-
   // Default to expand.
   return SDValue();
 }

diff  --git a/llvm/test/CodeGen/X86/midpoint-int-vec-128.ll 
b/llvm/test/CodeGen/X86/midpoint-int-vec-128.ll
index c12d90fee09e..8ef3f307d0b5 100644
--- a/llvm/test/CodeGen/X86/midpoint-int-vec-128.ll
+++ b/llvm/test/CodeGen/X86/midpoint-int-vec-128.ll
@@ -2179,8 +2179,8 @@ define <8 x i16> @vec128_i16_unsigned_reg_reg(<8 x i16> 
%a1, <8 x i16> %a2) noun
 ; SSE2-NEXT:psubusw %xmm1, %xmm2
 ; SSE2-NEXT:psubusw %xmm0, %xmm1
 ; SSE2-NEXT:psubw %xmm0, %xmm2
-; SSE2-NEXT:paddw %xmm0, %xmm2
 ; SSE2-NEXT:paddw %xmm1, %xmm2
+; SSE2-NEXT:paddw %xmm0, %xmm2
 ; SSE2-NEXT:psrlw $1, %xmm2
 ; SSE2-NEXT:pmullw %xmm3, %xmm2
 ; SSE2-NEXT:paddw %xmm0, %xmm2



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[llvm-branch-commits] [llvm] 8057ebf - Revert rG12d59b696b330 "[DAG] Legalize umin(x, y) -> sub(x, usubsat(x, y)) and umax(x, y) -> add(x, usubsat(y, x)) iff usubsat is legal"

2020-11-26 Thread Simon Pilgrim via llvm-branch-commits


Author: Simon Pilgrim
Date: 2020-11-26T15:07:45Z
New Revision: 8057ebf4a03f51ed8a7f5c87bbb234ef07ba8f66

URL: 
https://github.com/llvm/llvm-project/commit/8057ebf4a03f51ed8a7f5c87bbb234ef07ba8f66
DIFF: 
https://github.com/llvm/llvm-project/commit/8057ebf4a03f51ed8a7f5c87bbb234ef07ba8f66.diff

LOG: Revert rG12d59b696b330 "[DAG] Legalize umin(x,y) -> sub(x,usubsat(x,y)) 
and umax(x,y) -> add(x,usubsat(y,x)) iff usubsat is legal"

This reverts commit 12d59b696b33065e070d6ee7a55d2e8c019d138b.

Prematurely pushed this to trunk

Added: 


Modified: 
llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/midpoint-int-vec-128.ll

Removed: 




diff  --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp 
b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index e45a311f84a4..3464fe87d99f 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -7478,26 +7478,10 @@ SDValue TargetLowering::expandIntMINMAX(SDNode *Node, 
SelectionDAG &DAG) const {
   SDValue Op0 = Node->getOperand(0);
   SDValue Op1 = Node->getOperand(1);
   EVT VT = Op0.getValueType();
-  unsigned Opcode = Node->getOpcode();
-  SDLoc DL(Node);
-
-  // umin(x,y) -> sub(x,usubsat(x,y))
-  if (Opcode == ISD::UMIN && isOperationLegal(ISD::SUB, VT) &&
-  isOperationLegal(ISD::USUBSAT, VT)) {
-return DAG.getNode(ISD::SUB, DL, VT, Op0,
-   DAG.getNode(ISD::USUBSAT, DL, VT, Op0, Op1));
-  }
-
-  // umax(x,y) -> add(x,usubsat(y,x))
-  if (Opcode == ISD::UMAX && isOperationLegal(ISD::ADD, VT) &&
-  isOperationLegal(ISD::USUBSAT, VT)) {
-return DAG.getNode(ISD::ADD, DL, VT, Op0,
-   DAG.getNode(ISD::USUBSAT, DL, VT, Op1, Op0));
-  }
 
   // Expand Y = MAX(A, B) -> Y = (A > B) ? A : B
   ISD::CondCode CC;
-  switch (Opcode) {
+  switch (Node->getOpcode()) {
   default: llvm_unreachable("How did we get here?");
   case ISD::SMAX: CC = ISD::SETGT; break;
   case ISD::SMIN: CC = ISD::SETLT; break;
@@ -7510,6 +7494,7 @@ SDValue TargetLowering::expandIntMINMAX(SDNode *Node, 
SelectionDAG &DAG) const {
   if (VT.isVector() && !isOperationLegalOrCustom(ISD::VSELECT, VT))
 return DAG.UnrollVectorOp(Node);
 
+  SDLoc DL(Node);
   SDValue Cond = DAG.getSetCC(DL, VT, Op0, Op1, CC);
   return DAG.getSelect(DL, VT, Cond, Op0, Op1);
 }

diff  --git a/llvm/lib/Target/X86/X86ISelLowering.cpp 
b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 5cbca95f45f5..fcbe1330b546 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -26959,6 +26959,22 @@ static SDValue LowerMINMAX(SDValue Op, SelectionDAG 
&DAG) {
   if (VT == MVT::v32i16 || VT == MVT::v64i8)
 return splitVectorIntBinary(Op, DAG);
 
+  SDLoc DL(Op);
+  unsigned Opcode = Op.getOpcode();
+  SDValue N0 = Op.getOperand(0);
+  SDValue N1 = Op.getOperand(1);
+
+  // For pre-SSE41, we can perform UMIN/UMAX v8i16 by using psubusw.
+  if (VT == MVT::v8i16) {
+assert((Opcode == ISD::UMIN || Opcode == ISD::UMAX) &&
+   "Unexpected MIN/MAX opcode");
+if (Opcode == ISD::UMIN)
+  return DAG.getNode(ISD::SUB, DL, VT, N0,
+ DAG.getNode(ISD::USUBSAT, DL, VT, N0, N1));
+return DAG.getNode(ISD::ADD, DL, VT,
+   DAG.getNode(ISD::USUBSAT, DL, VT, N1, N0), N0);
+  }
+
   // Default to expand.
   return SDValue();
 }

diff  --git a/llvm/test/CodeGen/X86/midpoint-int-vec-128.ll 
b/llvm/test/CodeGen/X86/midpoint-int-vec-128.ll
index 8ef3f307d0b5..c12d90fee09e 100644
--- a/llvm/test/CodeGen/X86/midpoint-int-vec-128.ll
+++ b/llvm/test/CodeGen/X86/midpoint-int-vec-128.ll
@@ -2179,8 +2179,8 @@ define <8 x i16> @vec128_i16_unsigned_reg_reg(<8 x i16> 
%a1, <8 x i16> %a2) noun
 ; SSE2-NEXT:psubusw %xmm1, %xmm2
 ; SSE2-NEXT:psubusw %xmm0, %xmm1
 ; SSE2-NEXT:psubw %xmm0, %xmm2
-; SSE2-NEXT:paddw %xmm1, %xmm2
 ; SSE2-NEXT:paddw %xmm0, %xmm2
+; SSE2-NEXT:paddw %xmm1, %xmm2
 ; SSE2-NEXT:psrlw $1, %xmm2
 ; SSE2-NEXT:pmullw %xmm3, %xmm2
 ; SSE2-NEXT:paddw %xmm0, %xmm2



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[llvm-branch-commits] [llvm] 0e49a40 - [ARM] Cleanup for the MVETailPrediction pass

2020-11-26 Thread David Green via llvm-branch-commits


Author: David Green
Date: 2020-11-26T15:10:44Z
New Revision: 0e49a40d756b4487aebea436f8f84411c1a629e7

URL: 
https://github.com/llvm/llvm-project/commit/0e49a40d756b4487aebea436f8f84411c1a629e7
DIFF: 
https://github.com/llvm/llvm-project/commit/0e49a40d756b4487aebea436f8f84411c1a629e7.diff

LOG: [ARM] Cleanup for the MVETailPrediction pass

This strips out a lot of the code that should no longer be needed from
the MVETailPredictionPass, leaving the important part - find active lane
mask instructions and convert them to VCTP operations.

Differential Revision: https://reviews.llvm.org/D91866

Added: 


Modified: 
llvm/lib/Target/ARM/MVETailPredication.cpp
llvm/test/CodeGen/Thumb2/LowOverheadLoops/tail-pred-intrinsic-round.ll
llvm/test/CodeGen/Thumb2/active_lane_mask.ll

Removed: 




diff  --git a/llvm/lib/Target/ARM/MVETailPredication.cpp 
b/llvm/lib/Target/ARM/MVETailPredication.cpp
index 25d5fd7e69c6..8055b5cf500d 100644
--- a/llvm/lib/Target/ARM/MVETailPredication.cpp
+++ b/llvm/lib/Target/ARM/MVETailPredication.cpp
@@ -22,23 +22,13 @@
 /// The HardwareLoops pass inserts intrinsics identifying loops that the
 /// backend will attempt to convert into a low-overhead loop. The vectorizer is
 /// responsible for generating a vectorized loop in which the lanes are
-/// predicated upon the iteration counter. This pass looks at these predicated
-/// vector loops, that are targets for low-overhead loops, and prepares it for
-/// code generation. Once the vectorizer has produced a masked loop, there's a
-/// couple of final forms:
-/// - A tail-predicated loop, with implicit predication.
-/// - A loop containing multiple VCPT instructions, predicating multiple VPT
-///   blocks of instructions operating on 
diff erent vector types.
-///
-/// This pass:
-/// 1) Checks if the predicates of the masked load/store instructions are
-///generated by intrinsic @llvm.get.active.lanes(). This intrinsic consumes
-///the the scalar loop tripcount as its second argument, which we extract
-///to set up the number of elements processed by the loop.
-/// 2) Intrinsic @llvm.get.active.lanes() is then replaced by the MVE target
-///specific VCTP intrinsic to represent the effect of tail predication.
-///This will be picked up by the ARM Low-overhead loop pass, which performs
-///the final transformation to a DLSTP or WLSTP tail-predicated loop.
+/// predicated upon an get.active.lane.mask intrinsic. This pass looks at these
+/// get.active.lane.mask intrinsic and attempts to convert them to VCTP
+/// instructions. This will be picked up by the ARM Low-overhead loop pass 
later
+/// in the backend, which performs the final transformation to a DLSTP or WLSTP
+/// tail-predicated loop.
+//
+//===--===//
 
 #include "ARM.h"
 #include "ARMSubtarget.h"
@@ -57,6 +47,7 @@
 #include "llvm/InitializePasses.h"
 #include "llvm/Support/Debug.h"
 #include "llvm/Transforms/Utils/BasicBlockUtils.h"
+#include "llvm/Transforms/Utils/Local.h"
 #include "llvm/Transforms/Utils/LoopUtils.h"
 #include "llvm/Transforms/Utils/ScalarEvolutionExpander.h"
 
@@ -112,23 +103,18 @@ class MVETailPredication : public LoopPass {
   bool runOnLoop(Loop *L, LPPassManager&) override;
 
 private:
-  /// Perform the relevant checks on the loop and convert if possible.
-  bool TryConvert(Value *TripCount);
-
-  /// Return whether this is a vectorized loop, that contains masked
-  /// load/stores.
-  bool IsPredicatedVectorLoop();
+  /// Perform the relevant checks on the loop and convert active lane masks if
+  /// possible.
+  bool TryConvertActiveLaneMask(Value *TripCount);
 
   /// Perform several checks on the arguments of @llvm.get.active.lane.mask
   /// intrinsic. E.g., check that the loop induction variable and the element
   /// count are of the form we expect, and also perform overflow checks for
   /// the new expressions that are created.
-  bool IsSafeActiveMask(IntrinsicInst *ActiveLaneMask, Value *TripCount,
-FixedVectorType *VecTy);
+  bool IsSafeActiveMask(IntrinsicInst *ActiveLaneMask, Value *TripCount);
 
   /// Insert the intrinsic to represent the effect of tail predication.
-  void InsertVCTPIntrinsic(IntrinsicInst *ActiveLaneMask, Value *TripCount,
-   FixedVectorType *VecTy);
+  void InsertVCTPIntrinsic(IntrinsicInst *ActiveLaneMask, Value *TripCount);
 
   /// Rematerialize the iteration count in exit blocks, which enables
   /// ARMLowOverheadLoops to better optimise away loop update statements inside
@@ -138,25 +124,6 @@ class MVETailPredication : public LoopPass {
 
 } // end namespace
 
-static bool IsDecrement(Instruction &I) {
-  auto *Call = dyn_cast(&I);
-  if (!Call)
-return false;
-
-  Intrinsic::ID ID = Call->getIntrinsicID();
-  return ID == Intrinsic::loop_decrement_reg;
-}
-
-static bool Is

[llvm-branch-commits] [llvm] 8562d2c - [AArch64] Regenerate min/max tests and add vXi64 umin/umax test coverage

2020-11-26 Thread Simon Pilgrim via llvm-branch-commits


Author: Simon Pilgrim
Date: 2020-11-26T15:33:39Z
New Revision: 8562d2c040fce9fc9be24e85a2053146bae601ea

URL: 
https://github.com/llvm/llvm-project/commit/8562d2c040fce9fc9be24e85a2053146bae601ea
DIFF: 
https://github.com/llvm/llvm-project/commit/8562d2c040fce9fc9be24e85a2053146bae601ea.diff

LOG: [AArch64] Regenerate min/max tests and add vXi64 umin/umax test coverage

Added: 


Modified: 
llvm/test/CodeGen/AArch64/minmax.ll

Removed: 




diff  --git a/llvm/test/CodeGen/AArch64/minmax.ll 
b/llvm/test/CodeGen/AArch64/minmax.ll
index df4912ca1f7a..5e99121cac2a 100644
--- a/llvm/test/CodeGen/AArch64/minmax.ll
+++ b/llvm/test/CodeGen/AArch64/minmax.ll
@@ -1,73 +1,92 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=aarch64-linux-gnu | FileCheck %s
 
-; CHECK-LABEL: t1
-; CHECK: smax
 define <4 x i32> @t1(<4 x i32> %a, <4 x i32> %b) {
+; CHECK-LABEL: t1:
+; CHECK:   // %bb.0:
+; CHECK-NEXT:smax v0.4s, v0.4s, v1.4s
+; CHECK-NEXT:ret
   %t1 = icmp sgt <4 x i32> %a, %b
   %t2 = select <4 x i1> %t1, <4 x i32> %a, <4 x i32> %b
   ret <4 x i32> %t2
 }
 
-; CHECK-LABEL: t2
-; CHECK: smin
 define <4 x i32> @t2(<4 x i32> %a, <4 x i32> %b) {
+; CHECK-LABEL: t2:
+; CHECK:   // %bb.0:
+; CHECK-NEXT:smin v0.4s, v0.4s, v1.4s
+; CHECK-NEXT:ret
   %t1 = icmp slt <4 x i32> %a, %b
   %t2 = select <4 x i1> %t1, <4 x i32> %a, <4 x i32> %b
   ret <4 x i32> %t2
 }
 
-; CHECK-LABEL: t3
-; CHECK: umax
 define <4 x i32> @t3(<4 x i32> %a, <4 x i32> %b) {
+; CHECK-LABEL: t3:
+; CHECK:   // %bb.0:
+; CHECK-NEXT:umax v0.4s, v0.4s, v1.4s
+; CHECK-NEXT:ret
   %t1 = icmp ugt <4 x i32> %a, %b
   %t2 = select <4 x i1> %t1, <4 x i32> %a, <4 x i32> %b
   ret <4 x i32> %t2
 }
 
-; CHECK-LABEL: t4
-; CHECK: umin
 define <8 x i8> @t4(<8 x i8> %a, <8 x i8> %b) {
+; CHECK-LABEL: t4:
+; CHECK:   // %bb.0:
+; CHECK-NEXT:umin v0.8b, v0.8b, v1.8b
+; CHECK-NEXT:ret
   %t1 = icmp ult <8 x i8> %a, %b
   %t2 = select <8 x i1> %t1, <8 x i8> %a, <8 x i8> %b
   ret <8 x i8> %t2
 }
 
-; CHECK-LABEL: t5
-; CHECK: smin
 define <4 x i16> @t5(<4 x i16> %a, <4 x i16> %b) {
+; CHECK-LABEL: t5:
+; CHECK:   // %bb.0:
+; CHECK-NEXT:smin v0.4h, v1.4h, v0.4h
+; CHECK-NEXT:ret
   %t1 = icmp sgt <4 x i16> %b, %a
   %t2 = select <4 x i1> %t1, <4 x i16> %a, <4 x i16> %b
   ret <4 x i16> %t2
 }
 
-; CHECK-LABEL: t6
-; CHECK: smax
 define <2 x i32> @t6(<2 x i32> %a, <2 x i32> %b) {
+; CHECK-LABEL: t6:
+; CHECK:   // %bb.0:
+; CHECK-NEXT:smax v0.2s, v1.2s, v0.2s
+; CHECK-NEXT:ret
   %t1 = icmp slt <2 x i32> %b, %a
   %t2 = select <2 x i1> %t1, <2 x i32> %a, <2 x i32> %b
   ret <2 x i32> %t2
 }
 
-; CHECK-LABEL: t7
-; CHECK: umin
 define <16 x i8> @t7(<16 x i8> %a, <16 x i8> %b) {
+; CHECK-LABEL: t7:
+; CHECK:   // %bb.0:
+; CHECK-NEXT:umin v0.16b, v1.16b, v0.16b
+; CHECK-NEXT:ret
   %t1 = icmp ugt <16 x i8> %b, %a
   %t2 = select <16 x i1> %t1, <16 x i8> %a, <16 x i8> %b
   ret <16 x i8> %t2
 }
 
-; CHECK-LABEL: t8
-; CHECK: umax
 define <8 x i16> @t8(<8 x i16> %a, <8 x i16> %b) {
+; CHECK-LABEL: t8:
+; CHECK:   // %bb.0:
+; CHECK-NEXT:umax v0.8h, v1.8h, v0.8h
+; CHECK-NEXT:ret
   %t1 = icmp ult <8 x i16> %b, %a
   %t2 = select <8 x i1> %t1, <8 x i16> %a, <8 x i16> %b
   ret <8 x i16> %t2
 }
 
-; CHECK-LABEL: t9
-; CHECK: umin
-; CHECK: smax
 define <4 x i32> @t9(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
+; CHECK-LABEL: t9:
+; CHECK:   // %bb.0:
+; CHECK-NEXT:umin v0.4s, v1.4s, v0.4s
+; CHECK-NEXT:smax v0.4s, v0.4s, v2.4s
+; CHECK-NEXT:ret
   %t1 = icmp ugt <4 x i32> %b, %a
   %t2 = select <4 x i1> %t1, <4 x i32> %a, <4 x i32> %b
   %t3 = icmp sge <4 x i32> %t2, %c
@@ -75,33 +94,78 @@ define <4 x i32> @t9(<4 x i32> %a, <4 x i32> %b, <4 x i32> 
%c) {
   ret <4 x i32> %t4
 }
 
-; CHECK-LABEL: t10
-; CHECK: smax
-; CHECK: smax
 define <8 x i32> @t10(<8 x i32> %a, <8 x i32> %b) {
+; CHECK-LABEL: t10:
+; CHECK:   // %bb.0:
+; CHECK-NEXT:smax v0.4s, v0.4s, v2.4s
+; CHECK-NEXT:smax v1.4s, v1.4s, v3.4s
+; CHECK-NEXT:ret
   %t1 = icmp sgt <8 x i32> %a, %b
   %t2 = select <8 x i1> %t1, <8 x i32> %a, <8 x i32> %b
   ret <8 x i32> %t2
 }
 
-; CHECK-LABEL: t11
-; CHECK: smin
-; CHECK: smin
-; CHECK: smin
-; CHECK: smin
 define <16 x i32> @t11(<16 x i32> %a, <16 x i32> %b) {
+; CHECK-LABEL: t11:
+; CHECK:   // %bb.0:
+; CHECK-NEXT:smin v0.4s, v0.4s, v4.4s
+; CHECK-NEXT:smin v1.4s, v1.4s, v5.4s
+; CHECK-NEXT:smin v2.4s, v2.4s, v6.4s
+; CHECK-NEXT:smin v3.4s, v3.4s, v7.4s
+; CHECK-NEXT:ret
   %t1 = icmp sle <16 x i32> %a, %b
   %t2 = select <16 x i1> %t1, <16 x i32> %a, <16 x i32> %b
   ret <16 x i32> %t2
 }
 
-; CHECK-LABEL: t12
-; CHECK-NOT: umin
 ; The icmp is used by two instructions, so don't produce a umin node.
 define <16 x i8> @t12(<16 x i8> %a, <16 x i8> %b) {
+; CHECK-LABEL: t12:
+; C

[llvm-branch-commits] [libcxx] 0b20d0a - [libc++] Fix two fr_FR locale tests on FreeBSD

2020-11-26 Thread Alex Richardson via llvm-branch-commits


Author: Alex Richardson
Date: 2020-11-26T16:09:51Z
New Revision: 0b20d0af3f0ac71a037479984813e0da95ea0ff9

URL: 
https://github.com/llvm/llvm-project/commit/0b20d0af3f0ac71a037479984813e0da95ea0ff9
DIFF: 
https://github.com/llvm/llvm-project/commit/0b20d0af3f0ac71a037479984813e0da95ea0ff9.diff

LOG: [libc++] Fix two fr_FR locale tests on FreeBSD

FreeBSD's locale data uses the same U+2027 separator as Glibc 2.27 and newer.

Reviewed By: #libc, emaste, ldionne

Differential Revision: https://reviews.llvm.org/D91165

Added: 


Modified: 

libcxx/test/std/localization/locale.categories/category.monetary/locale.money.get/locale.money.get.members/get_long_double_fr_FR.pass.cpp

libcxx/test/std/localization/locale.categories/category.monetary/locale.money.put/locale.money.put.members/put_long_double_fr_FR.pass.cpp

Removed: 




diff  --git 
a/libcxx/test/std/localization/locale.categories/category.monetary/locale.money.get/locale.money.get.members/get_long_double_fr_FR.pass.cpp
 
b/libcxx/test/std/localization/locale.categories/category.monetary/locale.money.get/locale.money.get.members/get_long_double_fr_FR.pass.cpp
index 862bc9018cbf..f7041f96675d 100644
--- 
a/libcxx/test/std/localization/locale.categories/category.monetary/locale.money.get/locale.money.get.members/get_long_double_fr_FR.pass.cpp
+++ 
b/libcxx/test/std/localization/locale.categories/category.monetary/locale.money.get/locale.money.get.members/get_long_double_fr_FR.pass.cpp
@@ -49,14 +49,15 @@ class my_facetw
 : Fw(refs) {}
 };
 
-
 // GLIBC 2.27 and newer use U2027 (narrow non-breaking space) as a thousands 
sep.
 // this function converts the spaces in string inputs to that character if need
-// be.
+// be. FreeBSD's locale data also uses U2027 since 2018.
 static std::wstring convert_thousands_sep(std::wstring const& in) {
+#if defined(_CS_GNU_LIBC_VERSION) || defined(__FreeBSD__)
 #if defined(_CS_GNU_LIBC_VERSION)
   if (glibc_version_less_than("2.27"))
 return in;
+#endif
   std::wstring out;
   unsigned I = 0;
   bool seen_decimal = false;

diff  --git 
a/libcxx/test/std/localization/locale.categories/category.monetary/locale.money.put/locale.money.put.members/put_long_double_fr_FR.pass.cpp
 
b/libcxx/test/std/localization/locale.categories/category.monetary/locale.money.put/locale.money.put.members/put_long_double_fr_FR.pass.cpp
index e35bc2573d8c..837f542a9e62 100644
--- 
a/libcxx/test/std/localization/locale.categories/category.monetary/locale.money.put/locale.money.put.members/put_long_double_fr_FR.pass.cpp
+++ 
b/libcxx/test/std/localization/locale.categories/category.monetary/locale.money.put/locale.money.put.members/put_long_double_fr_FR.pass.cpp
@@ -49,14 +49,15 @@ class my_facetw
 : Fw(refs) {}
 };
 
-
 // GLIBC 2.27 and newer use U2027 (narrow non-breaking space) as a thousands 
sep.
 // this function converts the spaces in string inputs to that character if need
-// be.
+// be. FreeBSD's locale data also uses U2027 since 2018.
 static std::wstring convert_thousands_sep(std::wstring const& in) {
+#if defined(_CS_GNU_LIBC_VERSION) || defined(__FreeBSD__)
 #if defined(_CS_GNU_LIBC_VERSION)
   if (glibc_version_less_than("2.27"))
 return in;
+#endif
   std::wstring out;
   unsigned I = 0;
   bool seen_num_start = false;



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[llvm-branch-commits] [mlir] 20c926e - [mlir][DialectConversion] Do not prematurely drop unused cast operations

2020-11-26 Thread Stephan Herhut via llvm-branch-commits


Author: Stephan Herhut
Date: 2020-11-26T17:39:14+01:00
New Revision: 20c926e0797e074bfb946d2c8ce002888ebc2bcd

URL: 
https://github.com/llvm/llvm-project/commit/20c926e0797e074bfb946d2c8ce002888ebc2bcd
DIFF: 
https://github.com/llvm/llvm-project/commit/20c926e0797e074bfb946d2c8ce002888ebc2bcd.diff

LOG: [mlir][DialectConversion] Do not prematurely drop unused cast operations

The rewrite logic has an optimization to drop a cast operation after
rewriting block arguments if the cast operation has no users. This is
unsafe as there might be a pending rewrite that replaced the cast operation
itself and hence would trigger a second free.

Instead, do not remove the casts and leave it up to a later canonicalization
to do so.

Differential Revision: https://reviews.llvm.org/D92184

Added: 


Modified: 
mlir/lib/Transforms/Utils/DialectConversion.cpp
mlir/test/Transforms/test-legalizer.mlir

Removed: 




diff  --git a/mlir/lib/Transforms/Utils/DialectConversion.cpp 
b/mlir/lib/Transforms/Utils/DialectConversion.cpp
index c4231035c38a..0a1a6b712ff2 100644
--- a/mlir/lib/Transforms/Utils/DialectConversion.cpp
+++ b/mlir/lib/Transforms/Utils/DialectConversion.cpp
@@ -364,11 +364,6 @@ void ArgConverter::applyRewrites(ConversionValueMapping 
&mapping) {
   // If the argument is still used, replace it with the generated cast.
   if (!origArg.use_empty())
 origArg.replaceAllUsesWith(mapping.lookupOrDefault(castValue));
-
-  // If all users of the cast were removed, we can drop it. Otherwise, keep
-  // the operation alive and let the user handle any remaining usages.
-  if (castValue.use_empty() && castValue.getDefiningOp())
-castValue.getDefiningOp()->erase();
 }
   }
 }

diff  --git a/mlir/test/Transforms/test-legalizer.mlir 
b/mlir/test/Transforms/test-legalizer.mlir
index 878d903bfa18..376f0c0dc16b 100644
--- a/mlir/test/Transforms/test-legalizer.mlir
+++ b/mlir/test/Transforms/test-legalizer.mlir
@@ -36,8 +36,9 @@ func @remap_call_1_to_1(%arg0: i64) {
 
 // CHECK-LABEL: func @remap_input_1_to_N({{.*}}f16, {{.*}}f16)
 func @remap_input_1_to_N(%arg0: f32) -> f32 {
- // CHECK-NEXT: "test.return"{{.*}} : (f16, f16) -> ()
- "test.return"(%arg0) : (f32) -> ()
+  // CHECK-NEXT: [[CAST:%.*]] = "test.cast"(%arg0, %arg1) : (f16, f16) -> f32
+  // CHECK-NEXT: "test.return"{{.*}} : (f16, f16) -> ()
+  "test.return"(%arg0) : (f32) -> ()
 }
 
 // CHECK-LABEL: func @remap_input_1_to_N_remaining_use(%arg0: f16, %arg1: f16)



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[llvm-branch-commits] [libcxx] d7ca140 - [libc++] Attempt to fix spurious modules-related failures in the CI

2020-11-26 Thread Louis Dionne via llvm-branch-commits


Author: Louis Dionne
Date: 2020-11-26T12:00:11-05:00
New Revision: d7ca140c0122a55a4042fb263ea3baaa501c361d

URL: 
https://github.com/llvm/llvm-project/commit/d7ca140c0122a55a4042fb263ea3baaa501c361d
DIFF: 
https://github.com/llvm/llvm-project/commit/d7ca140c0122a55a4042fb263ea3baaa501c361d.diff

LOG: [libc++] Attempt to fix spurious modules-related failures in the CI

I'm not 100% sure what the issue actually is since I can't reproduce it
locally, however what I explain in the comment is my best attempt to
explain what's going on.

Differential Revision: https://reviews.llvm.org/D92131

Added: 


Modified: 
libcxx/utils/libcxx/test/features.py

Removed: 




diff  --git a/libcxx/utils/libcxx/test/features.py 
b/libcxx/utils/libcxx/test/features.py
index 2f9a048df345..3023caeea5d3 100644
--- a/libcxx/utils/libcxx/test/features.py
+++ b/libcxx/utils/libcxx/test/features.py
@@ -40,7 +40,15 @@
   Feature(name='has-fobjc-arc', when=lambda cfg: 
hasCompileFlag(cfg, '-xobjective-c++ -fobjc-arc') and
  
sys.platform.lower().strip() == 'darwin'), # TODO: this doesn't handle 
cross-compiling to Apple platforms.
   Feature(name='objective-c++', when=lambda cfg: 
hasCompileFlag(cfg, '-xobjective-c++ -fobjc-arc')),
-  Feature(name='modules-support',   when=lambda cfg: 
hasCompileFlag(cfg, '-fmodules')),
+
+  # Note: We use a custom modules cache path to make sure that we don't reuse
+  #   the default one, which can be shared across builds. This is important
+  #   because we define macros in headers files, and a change in these 
macros
+  #   doesn't seem to invalidate modules cache entries, which means we 
could
+  #   build against now-invalid cached headers from a previous build.
+  Feature(name='modules-support',
+  when=lambda cfg: hasCompileFlag(cfg, '-fmodules'),
+  actions=lambda cfg: 
[AddCompileFlag('-fmodules-cache-path=%t/ModuleCache')]),
 
   Feature(name='non-lockfree-atomics',
   when=lambda cfg: sourceBuilds(cfg, """



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[llvm-branch-commits] [libcxx] 3d7f19f - [libc++] Remove sysctl-based implementation of thread::hardware_concurrency()

2020-11-26 Thread Louis Dionne via llvm-branch-commits


Author: Louis Dionne
Date: 2020-11-26T12:00:59-05:00
New Revision: 3d7f19ff182b249521061cff7a908efbc68d9f54

URL: 
https://github.com/llvm/llvm-project/commit/3d7f19ff182b249521061cff7a908efbc68d9f54
DIFF: 
https://github.com/llvm/llvm-project/commit/3d7f19ff182b249521061cff7a908efbc68d9f54.diff

LOG: [libc++] Remove sysctl-based implementation of 
thread::hardware_concurrency()

Using sysctl requires including headers that are considered internal on
Linux, like  & friends. Instead, sysconf is defined by POSIX
(and we have a fallback for Windows), so all the systems we support should
be happy with just sysconf.

Differential Revision: https://reviews.llvm.org/D92135

Added: 


Modified: 
libcxx/src/thread.cpp

Removed: 




diff  --git a/libcxx/src/thread.cpp b/libcxx/src/thread.cpp
index e1dc972cba7f..5959d8b71103 100644
--- a/libcxx/src/thread.cpp
+++ b/libcxx/src/thread.cpp
@@ -15,20 +15,8 @@
 #include "future"
 #include "limits"
 
-#if __has_include()
-# include 
-#endif
-
-#if __has_include()
-# include 
-#endif
-
-#if __has_include()
-# include 
-#endif
-
 #if __has_include()
-# include 
+# include  // for sysconf
 #endif
 
 #if defined(__NetBSD__)
@@ -84,13 +72,7 @@ thread::detach()
 unsigned
 thread::hardware_concurrency() _NOEXCEPT
 {
-#if defined(CTL_HW) && defined(HW_NCPU)
-unsigned n;
-int mib[2] = {CTL_HW, HW_NCPU};
-std::size_t s = sizeof(n);
-sysctl(mib, 2, &n, &s, 0, 0);
-return n;
-#elif defined(_SC_NPROCESSORS_ONLN)
+#if defined(_SC_NPROCESSORS_ONLN)
 long result = sysconf(_SC_NPROCESSORS_ONLN);
 // sysconf returns -1 if the name is invalid, the option does not exist or
 // does not have a definite limit.



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[llvm-branch-commits] [clang] 3f6c856 - [ASTImporter] Import the default argument of TemplateTypeParmDecl

2020-11-26 Thread Raphael Isemann via llvm-branch-commits


Author: Raphael Isemann
Date: 2020-11-26T18:01:30+01:00
New Revision: 3f6c856bb5ae4426a586426bca9f1ef2848a2b12

URL: 
https://github.com/llvm/llvm-project/commit/3f6c856bb5ae4426a586426bca9f1ef2848a2b12
DIFF: 
https://github.com/llvm/llvm-project/commit/3f6c856bb5ae4426a586426bca9f1ef2848a2b12.diff

LOG: [ASTImporter] Import the default argument of TemplateTypeParmDecl

The test case isn't using the AST matchers for all checks as there doesn't seem 
to be support for
matching TemplateTypeParmDecl default arguments. Otherwise this is simply 
importing the
default arguments.

Also updates several LLDB tests that now as intended omit the default template
arguments of several std templates.

Reviewed By: martong

Differential Revision: https://reviews.llvm.org/D92103

Added: 


Modified: 
clang/lib/AST/ASTImporter.cpp
clang/unittests/AST/ASTImporterTest.cpp

lldb/test/API/commands/expression/import-std-module/deque-basic/TestDequeFromStdModule.py

lldb/test/API/commands/expression/import-std-module/deque-dbg-info-content/TestDbgInfoContentDequeFromStdModule.py

lldb/test/API/commands/expression/import-std-module/forward_list-dbg-info-content/TestDbgInfoContentForwardListFromStdModule.py

lldb/test/API/commands/expression/import-std-module/forward_list/TestForwardListFromStdModule.py

lldb/test/API/commands/expression/import-std-module/list-dbg-info-content/TestDbgInfoContentListFromStdModule.py

lldb/test/API/commands/expression/import-std-module/list/TestListFromStdModule.py

lldb/test/API/commands/expression/import-std-module/queue/TestQueueFromStdModule.py

lldb/test/API/commands/expression/import-std-module/stack/TestStackFromStdModule.py

lldb/test/API/commands/expression/import-std-module/unique_ptr-dbg-info-content/TestUniquePtrDbgInfoContent.py

lldb/test/API/commands/expression/import-std-module/unique_ptr/TestUniquePtrFromStdModule.py

lldb/test/API/commands/expression/import-std-module/vector-bool/TestVectorBoolFromStdModule.py

lldb/test/API/commands/expression/import-std-module/vector-dbg-info-content/TestDbgInfoContentVectorFromStdModule.py

lldb/test/API/commands/expression/import-std-module/vector-of-vectors/TestVectorOfVectorsFromStdModule.py

lldb/test/API/commands/expression/import-std-module/vector/TestVectorFromStdModule.py

Removed: 




diff  --git a/clang/lib/AST/ASTImporter.cpp b/clang/lib/AST/ASTImporter.cpp
index 835551528e0d..5159682da85f 100644
--- a/clang/lib/AST/ASTImporter.cpp
+++ b/clang/lib/AST/ASTImporter.cpp
@@ -5158,8 +5158,6 @@ 
ASTNodeImporter::VisitTemplateTypeParmDecl(TemplateTypeParmDecl *D) {
   // context. This context will be fixed when the actual template declaration
   // is created.
 
-  // FIXME: Import default argument  and constraint expression.
-
   ExpectedSLoc BeginLocOrErr = import(D->getBeginLoc());
   if (!BeginLocOrErr)
 return BeginLocOrErr.takeError();
@@ -5206,6 +5204,14 @@ 
ASTNodeImporter::VisitTemplateTypeParmDecl(TemplateTypeParmDecl *D) {
 ToIDC);
   }
 
+  if (D->hasDefaultArgument()) {
+Expected ToDefaultArgOrErr =
+import(D->getDefaultArgumentInfo());
+if (!ToDefaultArgOrErr)
+  return ToDefaultArgOrErr.takeError();
+ToD->setDefaultArgument(*ToDefaultArgOrErr);
+  }
+
   return ToD;
 }
 

diff  --git a/clang/unittests/AST/ASTImporterTest.cpp 
b/clang/unittests/AST/ASTImporterTest.cpp
index 33e4b7226fba..5a93a7348e7a 100644
--- a/clang/unittests/AST/ASTImporterTest.cpp
+++ b/clang/unittests/AST/ASTImporterTest.cpp
@@ -880,6 +880,25 @@ TEST_P(ImportExpr, DependentSizedArrayType) {
  has(fieldDecl(hasType(dependentSizedArrayType(;
 }
 
+TEST_P(ASTImporterOptionSpecificTestBase, TemplateTypeParmDeclNoDefaultArg) {
+  Decl *FromTU = getTuDecl("template struct X {};", Lang_CXX03);
+  auto From = FirstDeclMatcher().match(
+  FromTU, templateTypeParmDecl(hasName("T")));
+  TemplateTypeParmDecl *To = Import(From, Lang_CXX03);
+  ASSERT_FALSE(To->hasDefaultArgument());
+}
+
+TEST_P(ASTImporterOptionSpecificTestBase, TemplateTypeParmDeclDefaultArg) {
+  Decl *FromTU =
+  getTuDecl("template struct X {};", Lang_CXX03);
+  auto From = FirstDeclMatcher().match(
+  FromTU, templateTypeParmDecl(hasName("T")));
+  TemplateTypeParmDecl *To = Import(From, Lang_CXX03);
+  ASSERT_TRUE(To->hasDefaultArgument());
+  QualType ToArg = To->getDefaultArgument();
+  ASSERT_EQ(ToArg, QualType(To->getASTContext().IntTy));
+}
+
 TEST_P(ASTImporterOptionSpecificTestBase, ImportBeginLocOfDeclRefExpr) {
   Decl *FromTU =
   getTuDecl("class A { public: static int X; }; void f() { (void)A::X; }",

diff  --git 
a/lldb/test/API/commands/expression/import-std-module/deque-basic/TestDequeFromStdModule.py
 
b/lldb/test/API/commands/expression/import-std-module/deque-basic/TestDequeFromStdModule.py
index 18bd8ae37ff9..0eaa50a12727 100644
--- 
a/lldb/test/API

[llvm-branch-commits] [llvm] 6d648e6 - [AIX] Add support for non var_arg extended vector ABI calling convention on AIX

2020-11-26 Thread Zarko Todorovski via llvm-branch-commits


Author: Zarko Todorovski
Date: 2020-11-26T12:03:51-05:00
New Revision: 6d648e69c0949e8942cab88e7ec13f5037364338

URL: 
https://github.com/llvm/llvm-project/commit/6d648e69c0949e8942cab88e7ec13f5037364338
DIFF: 
https://github.com/llvm/llvm-project/commit/6d648e69c0949e8942cab88e7ec13f5037364338.diff

LOG: [AIX] Add support for non var_arg extended vector ABI calling convention 
on AIX

This patch enables passing non variadic vector type parameters on the caller 
and callee side and vector return on AIX that are passed in vector registers 
only.

So far, support is enabled for only the AIX extended Altivec ABI Calling 
convention.

Reviewed By: sfertile, DiggerLin

Differential Revision: https://reviews.llvm.org/D86476

Added: 
llvm/test/CodeGen/PowerPC/aix-cc-ext-vec-abi.ll
llvm/test/CodeGen/PowerPC/aix-vector-stack-caller.ll
llvm/test/CodeGen/PowerPC/aix-vector-stack.ll

Modified: 
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
llvm/test/CodeGen/PowerPC/aix-cc-altivec.ll
llvm/test/CodeGen/PowerPC/aix-vec-abi.ll

Removed: 
llvm/test/CodeGen/PowerPC/aix-vector-return.ll



diff  --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp 
b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index 1f3ef3efa2c2..cf369f5f12c1 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -6998,24 +6998,12 @@ static bool CC_AIX(unsigned ValNo, MVT ValVT, MVT LocVT,
.Options.EnableAIXExtendedAltivecABI)
 report_fatal_error("the default Altivec AIX ABI is not yet supported");
 
-  if (ValVT.isVector() && State.getMachineFunction()
-  .getTarget()
-  .Options.EnableAIXExtendedAltivecABI)
-report_fatal_error("the extended Altivec AIX ABI is not yet supported");
-
-  assert((!ValVT.isInteger() ||
-  (ValVT.getFixedSizeInBits() <= RegVT.getFixedSizeInBits())) &&
- "Integer argument exceeds register size: should have been legalized");
-
   if (ValVT == MVT::f128)
 report_fatal_error("f128 is unimplemented on AIX.");
 
   if (ArgFlags.isNest())
 report_fatal_error("Nest arguments are unimplemented.");
 
-  if (ValVT.isVector() || LocVT.isVector())
-report_fatal_error("Vector arguments are unimplemented on AIX.");
-
   static const MCPhysReg GPR_32[] = {// 32-bit registers.
  PPC::R3, PPC::R4, PPC::R5, PPC::R6,
  PPC::R7, PPC::R8, PPC::R9, PPC::R10};
@@ -7023,6 +7011,11 @@ static bool CC_AIX(unsigned ValNo, MVT ValVT, MVT LocVT,
  PPC::X3, PPC::X4, PPC::X5, PPC::X6,
  PPC::X7, PPC::X8, PPC::X9, PPC::X10};
 
+  static const MCPhysReg VR[] = {// Vector registers.
+ PPC::V2,  PPC::V3,  PPC::V4,  PPC::V5,
+ PPC::V6,  PPC::V7,  PPC::V8,  PPC::V9,
+ PPC::V10, PPC::V11, PPC::V12, PPC::V13};
+
   if (ArgFlags.isByVal()) {
 if (ArgFlags.getNonZeroByValAlign() > PtrAlign)
   report_fatal_error("Pass-by-value arguments with alignment greater than "
@@ -7118,6 +7111,25 @@ static bool CC_AIX(unsigned ValNo, MVT ValVT, MVT LocVT,
 
 return false;
   }
+  case MVT::v4f32:
+  case MVT::v4i32:
+  case MVT::v8i16:
+  case MVT::v16i8:
+  case MVT::v2i64:
+  case MVT::v2f64:
+  case MVT::v1i128: {
+if (State.isVarArg())
+  report_fatal_error(
+  "variadic arguments for vector types are unimplemented for AIX");
+
+if (unsigned VReg = State.AllocateReg(VR))
+  State.addLoc(CCValAssign::getReg(ValNo, ValVT, VReg, LocVT, LocInfo));
+else {
+  report_fatal_error(
+  "passing vector parameters to the stack is unimplemented for AIX");
+}
+return false;
+  }
   }
   return true;
 }
@@ -7138,6 +7150,14 @@ static const TargetRegisterClass 
*getRegClassForSVT(MVT::SimpleValueType SVT,
 return &PPC::F4RCRegClass;
   case MVT::f64:
 return &PPC::F8RCRegClass;
+  case MVT::v4f32:
+  case MVT::v4i32:
+  case MVT::v8i16:
+  case MVT::v16i8:
+  case MVT::v2i64:
+  case MVT::v2f64:
+  case MVT::v1i128:
+return &PPC::VRRCRegClass;
   }
 }
 
@@ -7254,6 +7274,9 @@ SDValue PPCTargetLowering::LowerFormalArguments_AIX(
 CCValAssign &VA = ArgLocs[I++];
 MVT LocVT = VA.getLocVT();
 ISD::ArgFlagsTy Flags = Ins[VA.getValNo()].Flags;
+if (VA.isMemLoc() && VA.getValVT().isVector())
+  report_fatal_error(
+  "passing vector parameters to the stack is unimplemented for AIX");
 
 // For compatibility with the AIX XL compiler, the float args in the
 // parameter save area are initialized even if the argument is available
@@ -7451,8 +7474,6 @@ SDValue PPCTargetLowering::LowerCall_AIX(
 
   const PPCSubtarget& Subtarget =

[llvm-branch-commits] [llvm] 668da8c - [MC] Set the unique id of .stack_sizes to the associated .text section's

2020-11-26 Thread Fangrui Song via llvm-branch-commits


Author: Fangrui Song
Date: 2020-11-26T09:13:09-08:00
New Revision: 668da8c361fef5ada092534d4d20ea450831f6f6

URL: 
https://github.com/llvm/llvm-project/commit/668da8c361fef5ada092534d4d20ea450831f6f6
DIFF: 
https://github.com/llvm/llvm-project/commit/668da8c361fef5ada092534d4d20ea450831f6f6.diff

LOG: [MC] Set the unique id of .stack_sizes to the associated .text section's

Similar to D92113. Currently `clang -fstack-size-section 
-fno-unique-section-names`
sets the linked-to symbol to the first `.text`, which is:

* incorrect for COMDAT sections
* inferior for non-COMDAT sections in -ffunction-sections mode (poor 
--gc-sections: .stack_sizes cannot be separately discarded)

Note, if the section symbol can be referenced in more places (if the
function begin symbol does not apply), we probably should consider
defining a different BeginSymbol for sections with ",unique" linkage.

Reviewed By: grimar, jhenderson

Differential Revision: https://reviews.llvm.org/D92151

Added: 


Modified: 
llvm/lib/MC/MCObjectFileInfo.cpp
llvm/test/CodeGen/X86/stack-size-section-function-sections.ll

Removed: 




diff  --git a/llvm/lib/MC/MCObjectFileInfo.cpp 
b/llvm/lib/MC/MCObjectFileInfo.cpp
index b8c66c68f71c..75e65e3f10f4 100644
--- a/llvm/lib/MC/MCObjectFileInfo.cpp
+++ b/llvm/lib/MC/MCObjectFileInfo.cpp
@@ -997,7 +997,7 @@ MCObjectFileInfo::getStackSizesSection(const MCSection 
&TextSec) const {
   }
 
   return Ctx->getELFSection(".stack_sizes", ELF::SHT_PROGBITS, Flags, 0,
-GroupName, MCSection::NonUniqueID,
+GroupName, ElfSec.getUniqueID(),
 cast(TextSec.getBeginSymbol()));
 }
 

diff  --git a/llvm/test/CodeGen/X86/stack-size-section-function-sections.ll 
b/llvm/test/CodeGen/X86/stack-size-section-function-sections.ll
index 3fb2fa97e775..92f312bd1185 100644
--- a/llvm/test/CodeGen/X86/stack-size-section-function-sections.ll
+++ b/llvm/test/CodeGen/X86/stack-size-section-function-sections.ll
@@ -1,14 +1,23 @@
-; RUN: llc < %s -mtriple=x86_64-linux -stack-size-section -function-sections | 
FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-linux -stack-size-section -function-sections | 
\
+; RUN:   FileCheck %s --check-prefix=UNIQ
+; RUN: llc < %s -mtriple=x86_64-linux -stack-size-section -function-sections 
-unique-section-names=0 | \
+; RUN:   FileCheck %s --check-prefix=NOUNIQ
 
 ; Check we add SHF_LINK_ORDER for .stack_sizes and link it with the 
corresponding .text sections.
-; CHECK: .section.text._Z3barv,"ax",@progbits
-; CHECK: .section.stack_sizes,"o",@progbits,.text._Z3barv{{$}}
-; CHECK: .section.text._Z3foov,"ax",@progbits
-; CHECK: .section.stack_sizes,"o",@progbits,.text._Z3foov{{$}}
+; UNIQ:   .section.text._Z3barv,"ax",@progbits{{$}}
+; UNIQ:   .section.stack_sizes,"o",@progbits,.text._Z3barv{{$}}
+; UNIQ:   .section.text._Z3foov,"ax",@progbits{{$}}
+; UNIQ:   .section.stack_sizes,"o",@progbits,.text._Z3foov{{$}}
+; NOUNIQ: .section.text,"ax",@progbits,unique,1
+; NOUNIQ: .section.stack_sizes,"o",@progbits,.text,unique,1
+; NOUNIQ: .section.text,"ax",@progbits,unique,2
+; NOUNIQ: .section.stack_sizes,"o",@progbits,.text,unique,2
 
 ; Check we add .stack_size section to a COMDAT group with the corresponding 
.text section if such a COMDAT exists.
-; CHECK: .section
.text._Z4fooTIiET_v,"axG",@progbits,_Z4fooTIiET_v,comdat
-; CHECK: .section
.stack_sizes,"Go",@progbits,_Z4fooTIiET_v,comdat,.text._Z4fooTIiET_v{{$}}
+; UNIQ:   .section
.text._Z4fooTIiET_v,"axG",@progbits,_Z4fooTIiET_v,comdat{{$}}
+; UNIQ:   .section
.stack_sizes,"Go",@progbits,_Z4fooTIiET_v,comdat,.text._Z4fooTIiET_v{{$}}
+; NOUNIQ: .section.text,"axG",@progbits,_Z4fooTIiET_v,comdat,unique,3
+; NOUNIQ: .section
.stack_sizes,"Go",@progbits,_Z4fooTIiET_v,comdat,.text,unique,3
 
 $_Z4fooTIiET_v = comdat any
 



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[llvm-branch-commits] [llvm] 4df8efc - [AA] Split up LocationSize::unknown()

2020-11-26 Thread Nikita Popov via llvm-branch-commits


Author: Nikita Popov
Date: 2020-11-26T18:39:55+01:00
New Revision: 4df8efce80e373dd1e05bd4910c796a0c91383e7

URL: 
https://github.com/llvm/llvm-project/commit/4df8efce80e373dd1e05bd4910c796a0c91383e7
DIFF: 
https://github.com/llvm/llvm-project/commit/4df8efce80e373dd1e05bd4910c796a0c91383e7.diff

LOG: [AA] Split up LocationSize::unknown()

Currently, we have some confusion in the codebase regarding the
meaning of LocationSize::unknown(): Some parts (including most of
BasicAA) assume that LocationSize::unknown() only allows accesses
after the base pointer. Some parts (various callers of AA) assume
that LocationSize::unknown() allows accesses both before and after
the base pointer (but within the underlying object).

This patch splits up LocationSize::unknown() into
LocationSize::afterPointer() and LocationSize::beforeOrAfterPointer()
to make this completely unambiguous. I tried my best to determine
which one is appropriate for all the existing uses.

The test changes in cs-cs.ll in particular illustrate a previously
clearly incorrect AA result: We were effectively assuming that
argmemonly functions were only allowed to access their arguments
after the passed pointer, but not before it. I'm pretty sure that
this was not intentional, and it's certainly not specified by
LangRef that way.

Differential Revision: https://reviews.llvm.org/D91649

Added: 


Modified: 
llvm/include/llvm/Analysis/AliasAnalysis.h
llvm/include/llvm/Analysis/MemoryDependenceAnalysis.h
llvm/include/llvm/Analysis/MemoryLocation.h
llvm/include/llvm/Analysis/MemorySSA.h
llvm/include/llvm/LinkAllPasses.h
llvm/lib/Analysis/AliasAnalysisEvaluator.cpp
llvm/lib/Analysis/AliasSetTracker.cpp
llvm/lib/Analysis/BasicAliasAnalysis.cpp
llvm/lib/Analysis/DependenceAnalysis.cpp
llvm/lib/Analysis/GlobalsModRef.cpp
llvm/lib/Analysis/Lint.cpp
llvm/lib/Analysis/LoopAccessAnalysis.cpp
llvm/lib/Analysis/MemoryDependenceAnalysis.cpp
llvm/lib/Analysis/MemoryLocation.cpp
llvm/lib/Analysis/MemorySSA.cpp
llvm/lib/Analysis/ObjCARCAliasAnalysis.cpp
llvm/lib/Analysis/ScalarEvolutionAliasAnalysis.cpp
llvm/lib/CodeGen/ImplicitNullChecks.cpp
llvm/lib/CodeGen/MachinePipeliner.cpp
llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
llvm/lib/Target/AMDGPU/AMDGPUAnnotateUniformValues.cpp
llvm/lib/Target/AMDGPU/AMDGPURewriteOutArguments.cpp
llvm/lib/Target/ARM/ARMParallelDSP.cpp
llvm/lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp
llvm/lib/Transforms/IPO/FunctionAttrs.cpp
llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
llvm/lib/Transforms/Scalar/LICM.cpp
llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
llvm/test/Analysis/AliasSet/argmemonly.ll
llvm/test/Analysis/AliasSet/memset.ll
llvm/test/Analysis/AliasSet/memtransfer.ll
llvm/test/Analysis/BasicAA/cs-cs.ll
llvm/test/CodeGen/AMDGPU/global_smrd_cfg.ll
llvm/unittests/Analysis/AliasAnalysisTest.cpp
llvm/unittests/Analysis/MemorySSATest.cpp
polly/lib/Analysis/ScopDetection.cpp

Removed: 




diff  --git a/llvm/include/llvm/Analysis/AliasAnalysis.h 
b/llvm/include/llvm/Analysis/AliasAnalysis.h
index 6e642d4e6f4c..736917cf327a 100644
--- a/llvm/include/llvm/Analysis/AliasAnalysis.h
+++ b/llvm/include/llvm/Analysis/AliasAnalysis.h
@@ -407,7 +407,8 @@ class AAResults {
 
   /// A convenience wrapper around the primary \c alias interface.
   AliasResult alias(const Value *V1, const Value *V2) {
-return alias(V1, LocationSize::unknown(), V2, LocationSize::unknown());
+return alias(MemoryLocation::getBeforeOrAfter(V1),
+ MemoryLocation::getBeforeOrAfter(V2));
   }
 
   /// A trivial helper function to check to see if the specified pointers are
@@ -424,8 +425,8 @@ class AAResults {
 
   /// A convenience wrapper around the \c isNoAlias helper interface.
   bool isNoAlias(const Value *V1, const Value *V2) {
-return isNoAlias(MemoryLocation(V1, LocationSize::unknown()),
- MemoryLocation(V2, LocationSize::unknown()));
+return isNoAlias(MemoryLocation::getBeforeOrAfter(V1),
+ MemoryLocation::getBeforeOrAfter(V2));
   }
 
   /// A trivial helper function to check to see if the specified pointers are
@@ -447,8 +448,7 @@ class AAResults {
   /// A convenience wrapper around the primary \c pointsToConstantMemory
   /// interface.
   bool pointsToConstantMemory(const Value *P, bool OrLocal = false) {
-return pointsToConstantMemory(MemoryLocation(P, LocationSize::unknown()),
-  OrLocal);
+return pointsToConstantMemory(MemoryLocation::getBeforeOrAfter(P), 
OrLocal);
   }
 
   /// @}

diff  --git a/llvm/include/llvm/Analysis/MemoryDependenceAnalysis.h 
b/llvm/include/llvm/Analysis/MemoryDependenceAnalysis.h
index 0777dc7d7862..efde00f82d57 100644
--- a/llvm/include/llvm/Analysis/MemoryDependenceAna

[llvm-branch-commits] [llvm] 92a67e1 - [BPF][NewPM] Port bpf-adjust-opt to NPM and add it to pipeline

2020-11-26 Thread Arthur Eubanks via llvm-branch-commits


Author: Arthur Eubanks
Date: 2020-11-26T10:11:26-08:00
New Revision: 92a67e131f3d0440ef87c6038cf239e641a3167c

URL: 
https://github.com/llvm/llvm-project/commit/92a67e131f3d0440ef87c6038cf239e641a3167c
DIFF: 
https://github.com/llvm/llvm-project/commit/92a67e131f3d0440ef87c6038cf239e641a3167c.diff

LOG: [BPF][NewPM] Port bpf-adjust-opt to NPM and add it to pipeline

Reviewed By: yonghong-song

Differential Revision: https://reviews.llvm.org/D91990

Added: 


Modified: 
llvm/lib/Target/BPF/BPF.h
llvm/lib/Target/BPF/BPFAdjustOpt.cpp
llvm/lib/Target/BPF/BPFTargetMachine.cpp
llvm/test/CodeGen/BPF/adjust-opt-icmp1.ll

Removed: 




diff  --git a/llvm/lib/Target/BPF/BPF.h b/llvm/lib/Target/BPF/BPF.h
index 8629c1503b4e..a98a3e08d5de 100644
--- a/llvm/lib/Target/BPF/BPF.h
+++ b/llvm/lib/Target/BPF/BPF.h
@@ -56,6 +56,11 @@ class BPFPreserveDITypePass : public 
PassInfoMixin {
 
   static bool isRequired() { return true; }
 };
+
+class BPFAdjustOptPass : public PassInfoMixin {
+public:
+  PreservedAnalyses run(Module &M, ModuleAnalysisManager &AM);
+};
 } // namespace llvm
 
 #endif

diff  --git a/llvm/lib/Target/BPF/BPFAdjustOpt.cpp 
b/llvm/lib/Target/BPF/BPFAdjustOpt.cpp
index 8efaa9d72b57..6afd2d77485d 100644
--- a/llvm/lib/Target/BPF/BPFAdjustOpt.cpp
+++ b/llvm/lib/Target/BPF/BPFAdjustOpt.cpp
@@ -39,6 +39,14 @@ static cl::opt DisableBPFavoidSpeculation(
 namespace {
 
 class BPFAdjustOpt final : public ModulePass {
+public:
+  static char ID;
+
+  BPFAdjustOpt() : ModulePass(ID) {}
+  bool runOnModule(Module &M) override;
+};
+
+class BPFAdjustOptImpl {
   struct PassThroughInfo {
 Instruction *Input;
 Instruction *UsedInst;
@@ -48,13 +56,12 @@ class BPFAdjustOpt final : public ModulePass {
   };
 
 public:
-  static char ID;
-  Module *Mod;
+  BPFAdjustOptImpl(Module *M) : M(M) {}
 
-  BPFAdjustOpt() : ModulePass(ID) {}
-  bool runOnModule(Module &M) override;
+  bool run();
 
 private:
+  Module *M;
   SmallVector PassThroughs;
 
   void adjustBasicBlock(BasicBlock &BB);
@@ -73,9 +80,10 @@ INITIALIZE_PASS(BPFAdjustOpt, "bpf-adjust-opt", "BPF Adjust 
Optimization",
 
 ModulePass *llvm::createBPFAdjustOpt() { return new BPFAdjustOpt(); }
 
-bool BPFAdjustOpt::runOnModule(Module &M) {
-  Mod = &M;
-  for (Function &F : M)
+bool BPFAdjustOpt::runOnModule(Module &M) { return BPFAdjustOptImpl(&M).run(); 
}
+
+bool BPFAdjustOptImpl::run() {
+  for (Function &F : *M)
 for (auto &BB : F) {
   adjustBasicBlock(BB);
   for (auto &I : BB)
@@ -85,10 +93,10 @@ bool BPFAdjustOpt::runOnModule(Module &M) {
   return insertPassThrough();
 }
 
-bool BPFAdjustOpt::insertPassThrough() {
+bool BPFAdjustOptImpl::insertPassThrough() {
   for (auto &Info : PassThroughs) {
 auto *CI = BPFCoreSharedInfo::insertPassThrough(
-Mod, Info.UsedInst->getParent(), Info.Input, Info.UsedInst);
+M, Info.UsedInst->getParent(), Info.Input, Info.UsedInst);
 Info.UsedInst->setOperand(Info.OpIdx, CI);
   }
 
@@ -97,7 +105,7 @@ bool BPFAdjustOpt::insertPassThrough() {
 
 // To avoid combining conditionals in the same basic block by
 // instrcombine optimization.
-bool BPFAdjustOpt::serializeICMPInBB(Instruction &I) {
+bool BPFAdjustOptImpl::serializeICMPInBB(Instruction &I) {
   // For:
   //   comp1 = icmp  ...;
   //   comp2 = icmp  ...;
@@ -130,7 +138,7 @@ bool BPFAdjustOpt::serializeICMPInBB(Instruction &I) {
 
 // To avoid combining conditionals in the same basic block by
 // instrcombine optimization.
-bool BPFAdjustOpt::serializeICMPCrossBB(BasicBlock &BB) {
+bool BPFAdjustOptImpl::serializeICMPCrossBB(BasicBlock &BB) {
   // For:
   //   B1:
   // comp1 = icmp  ...;
@@ -204,7 +212,7 @@ bool BPFAdjustOpt::serializeICMPCrossBB(BasicBlock &BB) {
 
 // To avoid speculative hoisting certain computations out of
 // a basic block.
-bool BPFAdjustOpt::avoidSpeculation(Instruction &I) {
+bool BPFAdjustOptImpl::avoidSpeculation(Instruction &I) {
   if (auto *LdInst = dyn_cast(&I)) {
 if (auto *GV = dyn_cast(LdInst->getOperand(0))) {
   if (GV->hasAttribute(BPFCoreSharedInfo::AmaAttr) ||
@@ -297,14 +305,19 @@ bool BPFAdjustOpt::avoidSpeculation(Instruction &I) {
   return true;
 }
 
-void BPFAdjustOpt::adjustBasicBlock(BasicBlock &BB) {
+void BPFAdjustOptImpl::adjustBasicBlock(BasicBlock &BB) {
   if (!DisableBPFserializeICMP && serializeICMPCrossBB(BB))
 return;
 }
 
-void BPFAdjustOpt::adjustInst(Instruction &I) {
+void BPFAdjustOptImpl::adjustInst(Instruction &I) {
   if (!DisableBPFserializeICMP && serializeICMPInBB(I))
 return;
   if (!DisableBPFavoidSpeculation && avoidSpeculation(I))
 return;
 }
+
+PreservedAnalyses BPFAdjustOptPass::run(Module &M, ModuleAnalysisManager &AM) {
+  return BPFAdjustOptImpl(&M).run() ? PreservedAnalyses::none()
+: PreservedAnalyses::all();
+}

diff  --git a/llvm/lib/Target/BPF/BPFTargetMachine.cpp 
b/llvm/lib/Targe

[llvm-branch-commits] [llvm] 17df537 - [X86] Regenerate i64-to-float.ll tests with avx512 coverage

2020-11-26 Thread Simon Pilgrim via llvm-branch-commits


Author: Simon Pilgrim
Date: 2020-11-26T18:29:47Z
New Revision: 17df5373e6174f56ccdb78ffa072a954731639cc

URL: 
https://github.com/llvm/llvm-project/commit/17df5373e6174f56ccdb78ffa072a954731639cc
DIFF: 
https://github.com/llvm/llvm-project/commit/17df5373e6174f56ccdb78ffa072a954731639cc.diff

LOG: [X86] Regenerate i64-to-float.ll tests with avx512 coverage

Rename prefix from X32 to X86 as we typically use X32 for gnux32 triples

Added: 


Modified: 
llvm/test/CodeGen/X86/i64-to-float.ll

Removed: 




diff  --git a/llvm/test/CodeGen/X86/i64-to-float.ll 
b/llvm/test/CodeGen/X86/i64-to-float.ll
index 6c04c21d636a..c181f71e0d81 100644
--- a/llvm/test/CodeGen/X86/i64-to-float.ll
+++ b/llvm/test/CodeGen/X86/i64-to-float.ll
@@ -1,24 +1,40 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s 
--check-prefix=X32-SSE
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx | FileCheck %s 
--check-prefix=X32-AVX
+; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s 
--check-prefix=X86-SSE
+; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx | FileCheck %s 
--check-prefix=X86-AVX
+; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx512f,+avx512vl | FileCheck %s 
--check-prefix=X86-AVX512F
+; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx512f,+avx512dq,+avx512vl | 
FileCheck %s --check-prefix=X86-AVX512DQ
 ; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s 
--check-prefix=X64-SSE
 ; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s 
--check-prefix=X64-AVX
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512f,+avx512vl | FileCheck 
%s --check-prefix=X64-AVX512F
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512f,+avx512dq,+avx512vl | 
FileCheck %s --check-prefix=X64-AVX512DQ
 
 ;PR29078
 
 define <2 x double> @mask_sitofp_2i64_2f64(<2 x i64> %a) nounwind {
-; X32-SSE-LABEL: mask_sitofp_2i64_2f64:
-; X32-SSE:   # %bb.0:
-; X32-SSE-NEXT:pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
-; X32-SSE-NEXT:pand {{\.LCPI.*}}, %xmm0
-; X32-SSE-NEXT:cvtdq2pd %xmm0, %xmm0
-; X32-SSE-NEXT:retl
-;
-; X32-AVX-LABEL: mask_sitofp_2i64_2f64:
-; X32-AVX:   # %bb.0:
-; X32-AVX-NEXT:vpshufb {{.*#+}} xmm0 = 
xmm0[0],zero,zero,zero,xmm0[8,9],zero,zero,xmm0[u,u,u,u,u,u,u,u]
-; X32-AVX-NEXT:vcvtdq2pd %xmm0, %xmm0
-; X32-AVX-NEXT:retl
+; X86-SSE-LABEL: mask_sitofp_2i64_2f64:
+; X86-SSE:   # %bb.0:
+; X86-SSE-NEXT:pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
+; X86-SSE-NEXT:pand {{\.LCPI.*}}, %xmm0
+; X86-SSE-NEXT:cvtdq2pd %xmm0, %xmm0
+; X86-SSE-NEXT:retl
+;
+; X86-AVX-LABEL: mask_sitofp_2i64_2f64:
+; X86-AVX:   # %bb.0:
+; X86-AVX-NEXT:vpshufb {{.*#+}} xmm0 = 
xmm0[0],zero,zero,zero,xmm0[8,9],zero,zero,xmm0[u,u,u,u,u,u,u,u]
+; X86-AVX-NEXT:vcvtdq2pd %xmm0, %xmm0
+; X86-AVX-NEXT:retl
+;
+; X86-AVX512F-LABEL: mask_sitofp_2i64_2f64:
+; X86-AVX512F:   # %bb.0:
+; X86-AVX512F-NEXT:vpshufb {{.*#+}} xmm0 = 
xmm0[0],zero,zero,zero,xmm0[8,9],zero,zero,xmm0[u,u,u,u,u,u,u,u]
+; X86-AVX512F-NEXT:vcvtdq2pd %xmm0, %xmm0
+; X86-AVX512F-NEXT:retl
+;
+; X86-AVX512DQ-LABEL: mask_sitofp_2i64_2f64:
+; X86-AVX512DQ:   # %bb.0:
+; X86-AVX512DQ-NEXT:vandps {{\.LCPI.*}}, %xmm0, %xmm0
+; X86-AVX512DQ-NEXT:vcvtqq2pd %xmm0, %xmm0
+; X86-AVX512DQ-NEXT:retl
 ;
 ; X64-SSE-LABEL: mask_sitofp_2i64_2f64:
 ; X64-SSE:   # %bb.0:
@@ -32,24 +48,48 @@ define <2 x double> @mask_sitofp_2i64_2f64(<2 x i64> %a) 
nounwind {
 ; X64-AVX-NEXT:vpshufb {{.*#+}} xmm0 = 
xmm0[0],zero,zero,zero,xmm0[8,9],zero,zero,xmm0[u,u,u,u,u,u,u,u]
 ; X64-AVX-NEXT:vcvtdq2pd %xmm0, %xmm0
 ; X64-AVX-NEXT:retq
+;
+; X64-AVX512F-LABEL: mask_sitofp_2i64_2f64:
+; X64-AVX512F:   # %bb.0:
+; X64-AVX512F-NEXT:vpshufb {{.*#+}} xmm0 = 
xmm0[0],zero,zero,zero,xmm0[8,9],zero,zero,xmm0[u,u,u,u,u,u,u,u]
+; X64-AVX512F-NEXT:vcvtdq2pd %xmm0, %xmm0
+; X64-AVX512F-NEXT:retq
+;
+; X64-AVX512DQ-LABEL: mask_sitofp_2i64_2f64:
+; X64-AVX512DQ:   # %bb.0:
+; X64-AVX512DQ-NEXT:vandps {{.*}}(%rip), %xmm0, %xmm0
+; X64-AVX512DQ-NEXT:vcvtqq2pd %xmm0, %xmm0
+; X64-AVX512DQ-NEXT:retq
   %and = and <2 x i64> %a, 
   %cvt = sitofp <2 x i64> %and to <2 x double>
   ret <2 x double> %cvt
 }
 
 define <2 x double> @mask_uitofp_2i64_2f64(<2 x i64> %a) nounwind {
-; X32-SSE-LABEL: mask_uitofp_2i64_2f64:
-; X32-SSE:   # %bb.0:
-; X32-SSE-NEXT:pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
-; X32-SSE-NEXT:pand {{\.LCPI.*}}, %xmm0
-; X32-SSE-NEXT:cvtdq2pd %xmm0, %xmm0
-; X32-SSE-NEXT:retl
-;
-; X32-AVX-LABEL: mask_uitofp_2i64_2f64:
-; X32-AVX:   # %bb.0:
-; X32-AVX-NEXT:vpshufb {{.*#+}} xmm0 = 
xmm0[0],zero,zero,zero,xmm0[8,9],zero,zero,xmm0[u,u,u,u,u,u,u,u]
-; X32-AVX-NEXT:vcvtdq2pd %xmm0, %xmm0
-; X32-AVX-NEXT:retl
+; X86-SSE-LABEL: mask_uitofp_2i64_2f64:
+; X8

[llvm-branch-commits] [clang-tools-extra] 9d87739 - [clangd] AddUsing: do not crash on non-namespace using decls.

2020-11-26 Thread Adam Czachorowski via llvm-branch-commits


Author: Adam Czachorowski
Date: 2020-11-26T20:07:56+01:00
New Revision: 9d87739f664b5b454ff78a3016ab05a1987f0d7c

URL: 
https://github.com/llvm/llvm-project/commit/9d87739f664b5b454ff78a3016ab05a1987f0d7c
DIFF: 
https://github.com/llvm/llvm-project/commit/9d87739f664b5b454ff78a3016ab05a1987f0d7c.diff

LOG: [clangd] AddUsing: do not crash on non-namespace using decls.

Differential Revision: https://reviews.llvm.org/D92186

Added: 


Modified: 
clang-tools-extra/clangd/refactor/tweaks/AddUsing.cpp
clang-tools-extra/clangd/unittests/TweakTests.cpp

Removed: 




diff  --git a/clang-tools-extra/clangd/refactor/tweaks/AddUsing.cpp 
b/clang-tools-extra/clangd/refactor/tweaks/AddUsing.cpp
index 4b3fbc02c411..b00c2716005c 100644
--- a/clang-tools-extra/clangd/refactor/tweaks/AddUsing.cpp
+++ b/clang-tools-extra/clangd/refactor/tweaks/AddUsing.cpp
@@ -152,12 +152,14 @@ findInsertionPoint(const Tweak::Selection &Inputs,
 if (SM.isBeforeInTranslationUnit(Inputs.Cursor, U->getUsingLoc()))
   // "Usings" is sorted, so we're done.
   break;
-if (U->getQualifier()->getAsNamespace()->getCanonicalDecl() ==
-QualifierToRemove.getNestedNameSpecifier()
-->getAsNamespace()
-->getCanonicalDecl() &&
-U->getName() == Name) {
-  return InsertionPointData();
+if (const auto *Namespace = U->getQualifier()->getAsNamespace()) {
+  if (Namespace->getCanonicalDecl() ==
+  QualifierToRemove.getNestedNameSpecifier()
+  ->getAsNamespace()
+  ->getCanonicalDecl() &&
+  U->getName() == Name) {
+return InsertionPointData();
+  }
 }
 
 // Insertion point will be before last UsingDecl that affects cursor

diff  --git a/clang-tools-extra/clangd/unittests/TweakTests.cpp 
b/clang-tools-extra/clangd/unittests/TweakTests.cpp
index 4a2360dda739..eefc50d754e2 100644
--- a/clang-tools-extra/clangd/unittests/TweakTests.cpp
+++ b/clang-tools-extra/clangd/unittests/TweakTests.cpp
@@ -2884,6 +2884,17 @@ using xx::yy;
 void fun() {
   yy();
 }
+)cpp"},
+// Existing using with non-namespace part.
+{R"cpp(
+#include "test.hpp"
+using one::two::ee::ee_one;
+one::t^wo::cc c;
+)cpp",
+ R"cpp(
+#include "test.hpp"
+using one::two::cc;using one::two::ee::ee_one;
+cc c;
 )cpp"}};
   llvm::StringMap EditedFiles;
   for (const auto &Case : Cases) {
@@ -2892,7 +2903,7 @@ void fun() {
 namespace one {
 void oo() {}
 namespace two {
-enum ee {};
+enum ee {ee_one};
 void ff() {}
 class cc {
 public:



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[llvm-branch-commits] [libcxx] e9f7dc4 - [libc++] Fix the Homebrew tap to install Buildkite on macOS hosts

2020-11-26 Thread Louis Dionne via llvm-branch-commits


Author: Louis Dionne
Date: 2020-11-26T14:40:53-05:00
New Revision: e9f7dc4f1c29eaf354d3108a0c243b3128c140bb

URL: 
https://github.com/llvm/llvm-project/commit/e9f7dc4f1c29eaf354d3108a0c243b3128c140bb
DIFF: 
https://github.com/llvm/llvm-project/commit/e9f7dc4f1c29eaf354d3108a0c243b3128c140bb.diff

LOG: [libc++] Fix the Homebrew tap to install Buildkite on macOS hosts

Added: 


Modified: 
libcxx/utils/ci/macos-ci-setup

Removed: 




diff  --git a/libcxx/utils/ci/macos-ci-setup b/libcxx/utils/ci/macos-ci-setup
index ac9f5951b2f0..fbd596c10fa8 100755
--- a/libcxx/utils/ci/macos-ci-setup
+++ b/libcxx/utils/ci/macos-ci-setup
@@ -10,7 +10,7 @@ source secrets.env
 /bin/bash -c "$(curl -fsSL 
https://raw.githubusercontent.com/Homebrew/install/master/install.sh)"
 
 # Install the required tools to run CI
-brew install sphinx-doc python3 buildkite-agent ninja cmake
+brew install sphinx-doc python3 ninja cmake buildkite/buildkite/buildkite-agent
 
 CFG_DIR="$(brew --prefix)/etc/buildkite-agent"
 



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[llvm-branch-commits] [llvm] 65db7d3 - [NFC][SimplifyCFG] Add statistic to `FoldBranchToCommonDest()` fold

2020-11-26 Thread Roman Lebedev via llvm-branch-commits


Author: Roman Lebedev
Date: 2020-11-26T22:51:21+03:00
New Revision: 65db7d38e0502db7b5753e974e630fd1663cb65b

URL: 
https://github.com/llvm/llvm-project/commit/65db7d38e0502db7b5753e974e630fd1663cb65b
DIFF: 
https://github.com/llvm/llvm-project/commit/65db7d38e0502db7b5753e974e630fd1663cb65b.diff

LOG: [NFC][SimplifyCFG] Add statistic to `FoldBranchToCommonDest()` fold

Added: 


Modified: 
llvm/lib/Transforms/Utils/SimplifyCFG.cpp

Removed: 




diff  --git a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp 
b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
index 7a4188ed..0f4c1b4038e5 100644
--- a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
+++ b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
@@ -159,6 +159,8 @@ STATISTIC(
 NumLookupTablesHoles,
 "Number of switch instructions turned into lookup tables (holes checked)");
 STATISTIC(NumTableCmpReuses, "Number of reused switch table lookup compares");
+STATISTIC(NumFoldBranchToCommonDest,
+  "Number of branches folded into predecessor basic block");
 STATISTIC(
 NumHoistCommonCode,
 "Number of common instruction 'blocks' hoisted up to the begin block");
@@ -2710,6 +2712,12 @@ bool llvm::FoldBranchToCommonDest(BranchInst *BI, 
MemorySSAUpdater *MSSAU,
   const unsigned PredCount = pred_size(BB);
 
   bool Changed = false;
+
+  auto _ = make_scope_exit([&]() {
+if (Changed)
+  ++NumFoldBranchToCommonDest;
+  });
+
   TargetTransformInfo::TargetCostKind CostKind =
 BB->getParent()->hasMinSize() ? TargetTransformInfo::TCK_CodeSize
   : TargetTransformInfo::TCK_SizeAndLatency;



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[llvm-branch-commits] [llvm] 394b4fd - [NFC][SimplifyCFG] Add test coverage for FoldBranchToCommonDest xform with live-out bonus instuctions

2020-11-26 Thread Roman Lebedev via llvm-branch-commits


Author: Roman Lebedev
Date: 2020-11-26T22:51:21+03:00
New Revision: 394b4fdb41542f695ed478c33275c54afb081efe

URL: 
https://github.com/llvm/llvm-project/commit/394b4fdb41542f695ed478c33275c54afb081efe
DIFF: 
https://github.com/llvm/llvm-project/commit/394b4fdb41542f695ed478c33275c54afb081efe.diff

LOG: [NFC][SimplifyCFG] Add test coverage for FoldBranchToCommonDest xform with 
live-out bonus instuctions

The uses of the bonus instructions should not be preventing the transformation.

Added: 
llvm/test/Transforms/SimplifyCFG/fold-branch-to-common-dest.ll

Modified: 


Removed: 




diff  --git a/llvm/test/Transforms/SimplifyCFG/fold-branch-to-common-dest.ll 
b/llvm/test/Transforms/SimplifyCFG/fold-branch-to-common-dest.ll
new file mode 100644
index ..1a6f7955fd80
--- /dev/null
+++ b/llvm/test/Transforms/SimplifyCFG/fold-branch-to-common-dest.ll
@@ -0,0 +1,571 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -S -simplifycfg -bonus-inst-threshold=10 | FileCheck %s
+
+declare void @sideeffect0()
+declare void @sideeffect1()
+declare void @use8(i8)
+
+; Basic cases, blocks have nothing other than the comparison itself.
+
+define void @one_pred(i8 %v0, i8 %v1) {
+; CHECK-LABEL: @one_pred(
+; CHECK-NEXT:  pred:
+; CHECK-NEXT:[[C0:%.*]] = icmp eq i8 [[V0:%.*]], 0
+; CHECK-NEXT:[[C1:%.*]] = icmp eq i8 [[V1:%.*]], 0
+; CHECK-NEXT:[[OR_COND:%.*]] = and i1 [[C0]], [[C1]]
+; CHECK-NEXT:br i1 [[OR_COND]], label [[FINAL_LEFT:%.*]], label 
[[FINAL_RIGHT:%.*]]
+; CHECK:   final_left:
+; CHECK-NEXT:call void @sideeffect0()
+; CHECK-NEXT:ret void
+; CHECK:   final_right:
+; CHECK-NEXT:call void @sideeffect1()
+; CHECK-NEXT:ret void
+;
+pred:
+  %c0 = icmp eq i8 %v0, 0
+  br i1 %c0, label %dispatch, label %final_right
+dispatch:
+  %c1 = icmp eq i8 %v1, 0
+  br i1 %c1, label %final_left, label %final_right
+final_left:
+  call void @sideeffect0()
+  ret void
+final_right:
+  call void @sideeffect1()
+  ret void
+}
+
+define void @two_preds(i8 %v0, i8 %v1, i8 %v2, i8 %v3) {
+; CHECK-LABEL: @two_preds(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:[[C0:%.*]] = icmp eq i8 [[V0:%.*]], 0
+; CHECK-NEXT:br i1 [[C0]], label [[PRED0:%.*]], label [[PRED1:%.*]]
+; CHECK:   pred0:
+; CHECK-NEXT:[[C1:%.*]] = icmp eq i8 [[V1:%.*]], 0
+; CHECK-NEXT:[[C3_OLD:%.*]] = icmp eq i8 [[V3:%.*]], 0
+; CHECK-NEXT:[[OR_COND1:%.*]] = or i1 [[C1]], [[C3_OLD]]
+; CHECK-NEXT:br i1 [[OR_COND1]], label [[FINAL_LEFT:%.*]], label 
[[FINAL_RIGHT:%.*]]
+; CHECK:   pred1:
+; CHECK-NEXT:[[C2:%.*]] = icmp eq i8 [[V2:%.*]], 0
+; CHECK-NEXT:[[C3:%.*]] = icmp eq i8 [[V3]], 0
+; CHECK-NEXT:[[OR_COND:%.*]] = and i1 [[C2]], [[C3]]
+; CHECK-NEXT:br i1 [[OR_COND]], label [[FINAL_LEFT]], label [[FINAL_RIGHT]]
+; CHECK:   final_left:
+; CHECK-NEXT:call void @sideeffect0()
+; CHECK-NEXT:ret void
+; CHECK:   final_right:
+; CHECK-NEXT:call void @sideeffect1()
+; CHECK-NEXT:ret void
+;
+entry:
+  %c0 = icmp eq i8 %v0, 0
+  br i1 %c0, label %pred0, label %pred1
+pred0:
+  %c1 = icmp eq i8 %v1, 0
+  br i1 %c1, label %final_left, label %dispatch
+pred1:
+  %c2 = icmp eq i8 %v2, 0
+  br i1 %c2, label %dispatch, label %final_right
+dispatch:
+  %c3 = icmp eq i8 %v3, 0
+  br i1 %c3, label %final_left, label %final_right
+final_left:
+  call void @sideeffect0()
+  ret void
+final_right:
+  call void @sideeffect1()
+  ret void
+}
+
+; More complex case, there's an extra op that is safe to execute 
unconditionally.
+
+define void @one_pred_with_extra_op(i8 %v0, i8 %v1) {
+; CHECK-LABEL: @one_pred_with_extra_op(
+; CHECK-NEXT:  pred:
+; CHECK-NEXT:[[C0:%.*]] = icmp eq i8 [[V0:%.*]], 0
+; CHECK-NEXT:[[V1_ADJ:%.*]] = add i8 [[V0]], [[V1:%.*]]
+; CHECK-NEXT:[[C1:%.*]] = icmp eq i8 [[V1_ADJ]], 0
+; CHECK-NEXT:[[OR_COND:%.*]] = and i1 [[C0]], [[C1]]
+; CHECK-NEXT:br i1 [[OR_COND]], label [[FINAL_LEFT:%.*]], label 
[[FINAL_RIGHT:%.*]]
+; CHECK:   final_left:
+; CHECK-NEXT:call void @sideeffect0()
+; CHECK-NEXT:ret void
+; CHECK:   final_right:
+; CHECK-NEXT:call void @sideeffect1()
+; CHECK-NEXT:ret void
+;
+pred:
+  %c0 = icmp eq i8 %v0, 0
+  br i1 %c0, label %dispatch, label %final_right
+dispatch:
+  %v1_adj = add i8 %v0, %v1
+  %c1 = icmp eq i8 %v1_adj, 0
+  br i1 %c1, label %final_left, label %final_right
+final_left:
+  call void @sideeffect0()
+  ret void
+final_right:
+  call void @sideeffect1()
+  ret void
+}
+
+define void @two_preds_with_extra_op(i8 %v0, i8 %v1, i8 %v2, i8 %v3) {
+; CHECK-LABEL: @two_preds_with_extra_op(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:[[C0:%.*]] = icmp eq i8 [[V0:%.*]], 0
+; CHECK-NEXT:br i1 [[C0]], label [[PRED0:%.*]], label [[PRED1:%.*]]
+; CHECK:   pred0:
+; CHECK-NEXT:[[C1:%.*]] = icmp eq i8 [[V1:%.*]], 0
+; CHECK-NEXT:[[DOTOLD:%.*]] = add i8

[llvm-branch-commits] [llvm] 2245fb8 - [SimplifyCFG] FoldBranchToCommonDest: lift use-restriction on bonus instructions

2020-11-26 Thread Roman Lebedev via llvm-branch-commits


Author: Roman Lebedev
Date: 2020-11-26T22:51:22+03:00
New Revision: 2245fb8aaa1c1f85f53f7b19a1ee3ac69b1a1dfe

URL: 
https://github.com/llvm/llvm-project/commit/2245fb8aaa1c1f85f53f7b19a1ee3ac69b1a1dfe
DIFF: 
https://github.com/llvm/llvm-project/commit/2245fb8aaa1c1f85f53f7b19a1ee3ac69b1a1dfe.diff

LOG: [SimplifyCFG] FoldBranchToCommonDest: lift use-restriction on bonus 
instructions

1. It doesn't make sense to enforce that the bonus instruction
   is only used once in it's basic block. What matters is
   whether those user instructions fit within our budget, sure,
   but that is another question.
2. It doesn't make sense to enforce that said bonus instructions
   are only used within their basic block. Perhaps the branch
   condition isn't using the value computed by said bonus instruction,
   and said bonus instruction is simply being calculated
   to be used in successors?

So iff we can clone bonus instructions, to lift these restrictions,
we just need to carefully update their external uses
to use the new cloned instructions.

Notably, this transform (even without this change) appears to be
poison-unsafe as per alive2, but is otherwise (including the patch) legal.

We don't introduce any new PHI nodes, but only "move" the instructions
around, i'm not really seeing much potential for extra cost modelling
for the transform, especially since now we allow at most one such
bonus instruction by default.

This causes the fold to fire +11.4% more (13216 -> 14725)
as of vanilla llvm test-suite + RawSpeed.

The motivational pattern is IEEE-754-2008 Binary16->Binary32
extension code:
https://github.com/darktable-org/rawspeed/blob/ca57d77fb2ba81f21fc712cfac26e54f46406473/src/librawspeed/common/FloatingPoint.h#L115-L120
^ that should be a switch, but it is not now: https://godbolt.org/z/bvja5v
That being said, even thought this seemed like this would fix it: 
https://godbolt.org/z/xGq3TM
apparently that fold is happening somewhere else afterall,
so something else also has a similar 'artificial' restriction.

Added: 


Modified: 
llvm/lib/Transforms/Utils/SimplifyCFG.cpp
llvm/test/Transforms/LoopUnroll/peel-loop-inner.ll
llvm/test/Transforms/SimplifyCFG/fold-branch-to-common-dest.ll

Removed: 




diff  --git a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp 
b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
index 0f4c1b4038e5..1bb6ea794bb0 100644
--- a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
+++ b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
@@ -2779,15 +2779,9 @@ bool llvm::FoldBranchToCommonDest(BranchInst *BI, 
MemorySSAUpdater *MSSAU,
 // Ignore dbg intrinsics.
 if (isa(I))
   continue;
-if (!I->hasOneUse() || !isSafeToSpeculativelyExecute(&*I))
+// I must be safe to execute unconditionally.
+if (!isSafeToSpeculativelyExecute(&*I))
   return Changed;
-// I has only one use and can be executed unconditionally.
-Instruction *User = dyn_cast(I->user_back());
-if (User == nullptr || User->getParent() != BB)
-  return Changed;
-// I is used in the same BB. Since BI uses Cond and doesn't have more slots
-// to use any other instruction, User must be an instruction between 
next(I)
-// and Cond.
 
 // Account for the cost of duplicating this instruction into each
 // predecessor.
@@ -2883,6 +2877,13 @@ bool llvm::FoldBranchToCommonDest(BranchInst *BI, 
MemorySSAUpdater *MSSAU,
   PBI->swapSuccessors();
 }
 
+// Before cloning instructions, notify the successor basic block that it
+// is about to have a new predecessor. This will update PHI nodes,
+// which will allow us to update live-out uses of bonus instructions.
+if (BI->isConditional())
+  AddPredecessorToBlock(PBI->getSuccessor(0) == BB ? TrueDest : FalseDest,
+PredBlock, BB, MSSAU);
+
 // If we have bonus instructions, clone them into the predecessor block.
 // Note that there may be multiple predecessor blocks, so we cannot move
 // bonus instructions to a predecessor block.
@@ -2914,6 +2915,18 @@ bool llvm::FoldBranchToCommonDest(BranchInst *BI, 
MemorySSAUpdater *MSSAU,
   PredBlock->getInstList().insert(PBI->getIterator(), NewBonusInst);
   NewBonusInst->takeName(&*BonusInst);
   BonusInst->setName(BonusInst->getName() + ".old");
+  BonusInst->replaceUsesWithIf(
+  NewBonusInst, [CurrBB = BonusInst->getParent(), PredBlock](Use &U) {
+auto *User = cast(U.getUser());
+// Ignore uses in the same block as the bonus instruction itself.
+if (User->getParent() == CurrBB)
+  return false;
+// We can safely update external non-PHI uses.
+if (!isa(User))
+  return true;
+// For PHI nodes, only update the uses for the current predecessor.
+return cast(User)->getIncomingBlock(U) == PredBlock;
+  });
 }
 
 /

[llvm-branch-commits] [llvm] 1de56d6 - [llvmbuildectomy] Also include component groups in llvm-config --components list

2020-11-26 Thread via llvm-branch-commits


Author: Mariusz Ceier
Date: 2020-11-26T21:05:56+01:00
New Revision: 1de56d6d13c083c996dfd44a32041dacae037d66

URL: 
https://github.com/llvm/llvm-project/commit/1de56d6d13c083c996dfd44a32041dacae037d66
DIFF: 
https://github.com/llvm/llvm-project/commit/1de56d6d13c083c996dfd44a32041dacae037d66.diff

LOG: [llvmbuildectomy] Also include component groups in llvm-config 
--components list

Without this change mesa fails while looking for llvm components like amdgpu, 
engine or native:

Run-time dependency LLVM (modules: amdgpu(missing), bitreader, bitwriter, 
core, engine(missing), executionengine, instcombine, ipo, mcdisassembler, 
mcjit, native(missing), scalaropts, transformutils, coroutines)
Looking for a fallback subproject for the dependency llvm (modules: 
bitwriter, engine, mcdisassembler, mcjit, core, executionengine, scalaropts, 
transformutils, instcombine, amdgpu, native, bitreader, ipo)

This change adds component groups (like all-targets, engine, native, amdgpu) to 
the "all" component.

Differential Revision: https://reviews.llvm.org/D92158

Added: 


Modified: 
llvm/cmake/modules/LLVM-Build.cmake

Removed: 




diff  --git a/llvm/cmake/modules/LLVM-Build.cmake 
b/llvm/cmake/modules/LLVM-Build.cmake
index ce56273c5a1d..525186cbbb19 100644
--- a/llvm/cmake/modules/LLVM-Build.cmake
+++ b/llvm/cmake/modules/LLVM-Build.cmake
@@ -11,12 +11,9 @@ function(LLVMBuildGenerateCFragment)
 list(APPEND all_component_libdeps ${component_name})
   endforeach()
   list(APPEND llvmbuild_components all)
-  list(APPEND llvmbuild_components all-targets)
-  list(APPEND llvmbuild_components Engine)
-  list(APPEND llvmbuild_components Native)
-  list(APPEND llvmbuild_components NativeCodeGen)
-  foreach(llvm_target_to_build ${LLVM_TARGETS_TO_BUILD})
-list(APPEND llvmbuild_components ${llvm_target_to_build})
+  foreach(llvm_component all-targets Engine Native NativeCodeGen 
${LLVM_TARGETS_TO_BUILD})
+list(APPEND llvmbuild_components ${llvm_component})
+list(APPEND all_component_libdeps ${llvm_component})
   endforeach()
 
   list(LENGTH llvmbuild_components llvmbuild_components_size)



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[llvm-branch-commits] [llvm] f3abd54 - Revert "[SimplifyCFG] FoldBranchToCommonDest: lift use-restriction on bonus instructions"

2020-11-26 Thread Roman Lebedev via llvm-branch-commits


Author: Roman Lebedev
Date: 2020-11-26T23:13:43+03:00
New Revision: f3abd54958ab90ba7c100d3fa936a3ce0dd2ad04

URL: 
https://github.com/llvm/llvm-project/commit/f3abd54958ab90ba7c100d3fa936a3ce0dd2ad04
DIFF: 
https://github.com/llvm/llvm-project/commit/f3abd54958ab90ba7c100d3fa936a3ce0dd2ad04.diff

LOG: Revert "[SimplifyCFG] FoldBranchToCommonDest: lift use-restriction on 
bonus instructions"

Many bots are unhappy, at the very least missed a few codegen tests,
and possibly this has a logic hole inducing a miscompile
(will be really awesome to have ready reproducer..)

Need to investigate.

This reverts commit 2245fb8aaa1c1f85f53f7b19a1ee3ac69b1a1dfe.

Added: 


Modified: 
llvm/lib/Transforms/Utils/SimplifyCFG.cpp
llvm/test/Transforms/LoopUnroll/peel-loop-inner.ll
llvm/test/Transforms/SimplifyCFG/fold-branch-to-common-dest.ll

Removed: 




diff  --git a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp 
b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
index 1bb6ea794bb0..0f4c1b4038e5 100644
--- a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
+++ b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
@@ -2779,9 +2779,15 @@ bool llvm::FoldBranchToCommonDest(BranchInst *BI, 
MemorySSAUpdater *MSSAU,
 // Ignore dbg intrinsics.
 if (isa(I))
   continue;
-// I must be safe to execute unconditionally.
-if (!isSafeToSpeculativelyExecute(&*I))
+if (!I->hasOneUse() || !isSafeToSpeculativelyExecute(&*I))
   return Changed;
+// I has only one use and can be executed unconditionally.
+Instruction *User = dyn_cast(I->user_back());
+if (User == nullptr || User->getParent() != BB)
+  return Changed;
+// I is used in the same BB. Since BI uses Cond and doesn't have more slots
+// to use any other instruction, User must be an instruction between 
next(I)
+// and Cond.
 
 // Account for the cost of duplicating this instruction into each
 // predecessor.
@@ -2877,13 +2883,6 @@ bool llvm::FoldBranchToCommonDest(BranchInst *BI, 
MemorySSAUpdater *MSSAU,
   PBI->swapSuccessors();
 }
 
-// Before cloning instructions, notify the successor basic block that it
-// is about to have a new predecessor. This will update PHI nodes,
-// which will allow us to update live-out uses of bonus instructions.
-if (BI->isConditional())
-  AddPredecessorToBlock(PBI->getSuccessor(0) == BB ? TrueDest : FalseDest,
-PredBlock, BB, MSSAU);
-
 // If we have bonus instructions, clone them into the predecessor block.
 // Note that there may be multiple predecessor blocks, so we cannot move
 // bonus instructions to a predecessor block.
@@ -2915,18 +2914,6 @@ bool llvm::FoldBranchToCommonDest(BranchInst *BI, 
MemorySSAUpdater *MSSAU,
   PredBlock->getInstList().insert(PBI->getIterator(), NewBonusInst);
   NewBonusInst->takeName(&*BonusInst);
   BonusInst->setName(BonusInst->getName() + ".old");
-  BonusInst->replaceUsesWithIf(
-  NewBonusInst, [CurrBB = BonusInst->getParent(), PredBlock](Use &U) {
-auto *User = cast(U.getUser());
-// Ignore uses in the same block as the bonus instruction itself.
-if (User->getParent() == CurrBB)
-  return false;
-// We can safely update external non-PHI uses.
-if (!isa(User))
-  return true;
-// For PHI nodes, only update the uses for the current predecessor.
-return cast(User)->getIncomingBlock(U) == PredBlock;
-  });
 }
 
 // Clone Cond into the predecessor basic block, and or/and the
@@ -2968,6 +2955,7 @@ bool llvm::FoldBranchToCommonDest(BranchInst *BI, 
MemorySSAUpdater *MSSAU,
(SuccFalseWeight + SuccTrueWeight) +
PredTrueWeight * SuccFalseWeight);
 }
+AddPredecessorToBlock(TrueDest, PredBlock, BB, MSSAU);
 PBI->setSuccessor(0, TrueDest);
   }
   if (PBI->getSuccessor(1) == BB) {
@@ -2982,6 +2970,7 @@ bool llvm::FoldBranchToCommonDest(BranchInst *BI, 
MemorySSAUpdater *MSSAU,
   // FalseWeight is FalseWeight for PBI * FalseWeight for BI.
   NewWeights.push_back(PredFalseWeight * SuccFalseWeight);
 }
+AddPredecessorToBlock(FalseDest, PredBlock, BB, MSSAU);
 PBI->setSuccessor(1, FalseDest);
   }
   if (NewWeights.size() == 2) {

diff  --git a/llvm/test/Transforms/LoopUnroll/peel-loop-inner.ll 
b/llvm/test/Transforms/LoopUnroll/peel-loop-inner.ll
index 664702c53595..7b088b31a54c 100644
--- a/llvm/test/Transforms/LoopUnroll/peel-loop-inner.ll
+++ b/llvm/test/Transforms/LoopUnroll/peel-loop-inner.ll
@@ -1,4 +1,3 @@
-; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s -S 
-passes='require,loop-unroll,simplify-cfg,instcombine'
 -unroll-force-peel-count=3 -verify-dom-info | FileCheck %s
 
 defin

[llvm-branch-commits] [libcxx] 76667c7 - [libc++] Install missing package in the Dockerfile

2020-11-26 Thread Louis Dionne via llvm-branch-commits


Author: Louis Dionne
Date: 2020-11-26T15:14:48-05:00
New Revision: 76667c768e6403e71718340a946e6f2f356bf745

URL: 
https://github.com/llvm/llvm-project/commit/76667c768e6403e71718340a946e6f2f356bf745
DIFF: 
https://github.com/llvm/llvm-project/commit/76667c768e6403e71718340a946e6f2f356bf745.diff

LOG: [libc++] Install missing package in the Dockerfile

python3-distutils is required to use `import distutils.spawn`, which is
required by the ABI list targets.

Added: 


Modified: 
libcxx/utils/ci/Dockerfile

Removed: 




diff  --git a/libcxx/utils/ci/Dockerfile b/libcxx/utils/ci/Dockerfile
index d9cd5d9b206a..21fb7ff535e8 100644
--- a/libcxx/utils/ci/Dockerfile
+++ b/libcxx/utils/ci/Dockerfile
@@ -45,7 +45,7 @@ ENV DEBIAN_FRONTEND=noninteractive
 RUN apt-get update && apt-get install -y bash curl
 
 # Install various tools used by the build or the test suite
-RUN apt-get update && apt-get install -y ninja-build python3 python3-sphinx 
git gdb
+RUN apt-get update && apt-get install -y ninja-build python3 python3-sphinx 
python3-distutils git gdb
 
 # Install the most recently released LLVM
 RUN apt-get update && apt-get install -y lsb-release wget 
software-properties-common



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[llvm-branch-commits] [llvm] f342ed1 - [test] Fix runtime-pointer-checking-insert-typesize.ll under NPM

2020-11-26 Thread Arthur Eubanks via llvm-branch-commits


Author: Arthur Eubanks
Date: 2020-11-26T12:34:32-08:00
New Revision: f342ed1cd16a56f2a349caba4319d1c3df4cc99a

URL: 
https://github.com/llvm/llvm-project/commit/f342ed1cd16a56f2a349caba4319d1c3df4cc99a
DIFF: 
https://github.com/llvm/llvm-project/commit/f342ed1cd16a56f2a349caba4319d1c3df4cc99a.diff

LOG: [test] Fix runtime-pointer-checking-insert-typesize.ll under NPM

Also clean it up a bit.

Added: 


Modified: 

llvm/test/Analysis/LoopAccessAnalysis/runtime-pointer-checking-insert-typesize.ll

Removed: 




diff  --git 
a/llvm/test/Analysis/LoopAccessAnalysis/runtime-pointer-checking-insert-typesize.ll
 
b/llvm/test/Analysis/LoopAccessAnalysis/runtime-pointer-checking-insert-typesize.ll
index d8f2d364ae3a..d1a980f51c37 100644
--- 
a/llvm/test/Analysis/LoopAccessAnalysis/runtime-pointer-checking-insert-typesize.ll
+++ 
b/llvm/test/Analysis/LoopAccessAnalysis/runtime-pointer-checking-insert-typesize.ll
@@ -1,5 +1,5 @@
-; RUN: opt -loop-accesses -analyze < %s >/dev/null 2>%t
-; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t
+; RUN: opt -loop-accesses -analyze -enable-new-pm=0 %s | FileCheck %s
+; RUN: opt -passes='print-access-info' -disable-output < %s 2>&1 | FileCheck %s
 
 ; This regression test is defending against a TypeSize warning 'assumption that
 ; TypeSize is not scalable'. This warning cropped up in
@@ -7,7 +7,7 @@
 ; this function was previously unaware of scalable types.
 
 ; If this check fails please read test/CodeGen/AArch64/README for instructions 
on how to resolve it.
-; WARN-NOT: warning: {{.*}}TypeSize is not scalable
+; CHECK-NOT: warning: {{.*}}TypeSize is not scalable
 
 define void @runtime_pointer_checking_insert_typesize(* %a,
   * %b) {



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[llvm-branch-commits] [llvm] 8166ed1 - [BasicAA] Fix BatchAA results for phi-phi assumptions

2020-11-26 Thread Nikita Popov via llvm-branch-commits


Author: Nikita Popov
Date: 2020-11-26T21:43:50+01:00
New Revision: 8166ed1a7a26ee8ea8db9005cc8ee5d156adad9b

URL: 
https://github.com/llvm/llvm-project/commit/8166ed1a7a26ee8ea8db9005cc8ee5d156adad9b
DIFF: 
https://github.com/llvm/llvm-project/commit/8166ed1a7a26ee8ea8db9005cc8ee5d156adad9b.diff

LOG: [BasicAA] Fix BatchAA results for phi-phi assumptions

Add a flag that disables caching when computing aliasing results
potentially based on a phi-phi NoAlias assumption. We'll still
insert cache entries temporarily to catch infinite recursion,
but will drop them afterwards, so they won't persist in BatchAA.

Differential Revision: https://reviews.llvm.org/D91936

Added: 


Modified: 
llvm/include/llvm/Analysis/BasicAliasAnalysis.h
llvm/lib/Analysis/BasicAliasAnalysis.cpp
llvm/unittests/Analysis/AliasAnalysisTest.cpp

Removed: 




diff  --git a/llvm/include/llvm/Analysis/BasicAliasAnalysis.h 
b/llvm/include/llvm/Analysis/BasicAliasAnalysis.h
index 3717fc9e2c36..6f5a31d6a4b5 100644
--- a/llvm/include/llvm/Analysis/BasicAliasAnalysis.h
+++ b/llvm/include/llvm/Analysis/BasicAliasAnalysis.h
@@ -162,6 +162,10 @@ class BasicAAResult : public AAResultBase {
   /// Tracks instructions visited by pointsToConstantMemory.
   SmallPtrSet Visited;
 
+  /// Whether to disable persistent caching in AAQI. This is used to prevent
+  /// caching of results based on temporary assumptions.
+  bool DisableCache = false;
+
   static const Value *
   GetLinearExpression(const Value *V, APInt &Scale, APInt &Offset,
   unsigned &ZExtBits, unsigned &SExtBits,
@@ -216,6 +220,12 @@ class BasicAAResult : public AAResultBase {
  LocationSize V2Size, const AAMDNodes &V2AATag,
  AAQueryInfo &AAQI, const Value *O1 = nullptr,
  const Value *O2 = nullptr);
+
+  AliasResult aliasCheckRecursive(const Value *V1, LocationSize V1Size,
+  const AAMDNodes &V1AATag, const Value *V2,
+  LocationSize V2Size, const AAMDNodes 
&V2AATag,
+  AAQueryInfo &AAQI, const Value *O1,
+  const Value *O2);
 };
 
 /// Analysis pass providing a never-invalidated alias analysis result.

diff  --git a/llvm/lib/Analysis/BasicAliasAnalysis.cpp 
b/llvm/lib/Analysis/BasicAliasAnalysis.cpp
index 5e6afd908ba3..0f13f98868cf 100644
--- a/llvm/lib/Analysis/BasicAliasAnalysis.cpp
+++ b/llvm/lib/Analysis/BasicAliasAnalysis.cpp
@@ -1489,8 +1489,10 @@ AliasResult BasicAAResult::aliasPHI(const PHINode *PN, 
LocationSize PNSize,
   // operand from outside the PHIs' cycle that is MayAlias/MustAlias or
   // there must be an operation on the PHIs within the PHIs' value cycle
   // that causes a MayAlias.
-  // Pretend the phis do not alias.
-  AliasResult Alias = NoAlias;
+  // Disable persistent caching, so intermediate results based on a
+  // possibly incorrect assumption do not get cached.
+  bool OrigDisableCache = DisableCache;
+  DisableCache = true;
   AliasResult OrigAliasResult;
   {
 // Limited lifetime iterator invalidated by the aliasCheck call below.
@@ -1501,6 +1503,7 @@ AliasResult BasicAAResult::aliasPHI(const PHINode *PN, 
LocationSize PNSize,
 CacheIt->second = NoAlias;
   }
 
+  AliasResult Alias = NoAlias;
   for (unsigned i = 0, e = PN->getNumIncomingValues(); i != e; ++i) {
 AliasResult ThisAlias =
 aliasCheck(PN->getIncomingValue(i), PNSize, PNAAInfo,
@@ -1514,6 +1517,7 @@ AliasResult BasicAAResult::aliasPHI(const PHINode *PN, 
LocationSize PNSize,
   // Reset if speculation failed.
   if (Alias != NoAlias)
 AAQI.updateResult(Locs, OrigAliasResult);
+  DisableCache = OrigDisableCache;
   return Alias;
 }
 
@@ -1753,59 +1757,73 @@ AliasResult BasicAAResult::aliasCheck(const Value *V1, 
LocationSize V1Size,
   if (!Pair.second)
 return Pair.first->second;
 
+  AliasResult Result = aliasCheckRecursive(V1, V1Size, V1AAInfo, V2, V2Size,
+   V2AAInfo, AAQI, O1, O2);
+
+  // If caching is disabled, remove the entry once the recursive checks are
+  // done. We only needed it to prevent infinite recursion.
+  if (DisableCache)
+AAQI.AliasCache.erase(AAQI.AliasCache.find(Locs));
+  else if (Result != MayAlias)
+AAQI.updateResult(Locs, Result);
+  return Result;
+}
+
+AliasResult BasicAAResult::aliasCheckRecursive(
+const Value *V1, LocationSize V1Size, const AAMDNodes &V1AAInfo,
+const Value *V2, LocationSize V2Size, const AAMDNodes &V2AAInfo,
+AAQueryInfo &AAQI, const Value *O1, const Value *O2) {
   if (const GEPOperator *GV1 = dyn_cast(V1)) {
 AliasResult Result =
 aliasGEP(GV1, V1Size, V1AAInfo, V2, V2Size, V2AAInfo, O1, O2, AAQI);
 if (Result != MayAlias)

[llvm-branch-commits] [llvm] f095ac1 - [clangd] Fix use of system-installed GRPC after f726101b6240a6740b3c0926af759da5e7336f8a

2020-11-26 Thread Sam McCall via llvm-branch-commits


Author: Sam McCall
Date: 2020-11-26T23:08:27+01:00
New Revision: f095ac11a9550530a4a54298debb8b04b36422be

URL: 
https://github.com/llvm/llvm-project/commit/f095ac11a9550530a4a54298debb8b04b36422be
DIFF: 
https://github.com/llvm/llvm-project/commit/f095ac11a9550530a4a54298debb8b04b36422be.diff

LOG: [clangd] Fix use of system-installed GRPC after 
f726101b6240a6740b3c0926af759da5e7336f8a

We need a real target now, and it was only being created if grpc was
built from source or imported from homebrew.

Differential Revision: https://reviews.llvm.org/D92107

Added: 


Modified: 
llvm/cmake/modules/FindGRPC.cmake

Removed: 




diff  --git a/llvm/cmake/modules/FindGRPC.cmake 
b/llvm/cmake/modules/FindGRPC.cmake
index 7031c5f0016a..8fdb3506dff1 100644
--- a/llvm/cmake/modules/FindGRPC.cmake
+++ b/llvm/cmake/modules/FindGRPC.cmake
@@ -40,6 +40,8 @@ else()
   endif()
   # On macOS the libraries are typically installed via Homebrew and are not on
   # the system path.
+  set(GRPC_OPTS "")
+  set(PROTOBUF_OPTS "")
   if (${APPLE})
 find_program(HOMEBREW brew)
 # If Homebrew is not found, the user might have installed libraries
@@ -57,28 +59,22 @@ else()
   # system path.
   if (GRPC_HOMEBREW_RETURN_CODE EQUAL "0")
 include_directories(${GRPC_HOMEBREW_PATH}/include)
-find_library(GRPC_LIBRARY
- grpc++
- PATHS ${GRPC_HOMEBREW_PATH}/lib
- NO_DEFAULT_PATH
- REQUIRED)
-add_library(grpc++ UNKNOWN IMPORTED GLOBAL)
-set_target_properties(grpc++ PROPERTIES
-  IMPORTED_LOCATION ${GRPC_LIBRARY})
+list(APPEND GRPC_OPTS PATHS ${GRPC_HOMEBREW_PATH}/lib NO_DEFAULT_PATH)
   endif()
   if (PROTOBUF_HOMEBREW_RETURN_CODE EQUAL "0")
 include_directories(${PROTOBUF_HOMEBREW_PATH}/include)
-find_library(PROTOBUF_LIBRARY
- protobuf
- PATHS ${PROTOBUF_HOMEBREW_PATH}/lib
- NO_DEFAULT_PATH
- REQUIRED)
-add_library(protobuf UNKNOWN IMPORTED GLOBAL)
-set_target_properties(protobuf PROPERTIES
-  IMPORTED_LOCATION ${PROTOBUF_LIBRARY})
+list(APPEND PROTOBUF_OPTS PATHS ${PROTOBUF_HOMEBREW_PATH}/lib 
NO_DEFAULT_PATH)
   endif()
 endif()
   endif()
+  find_library(GRPC_LIBRARY grpc++ $GRPC_OPTS REQUIRED)
+  add_library(grpc++ UNKNOWN IMPORTED GLOBAL)
+  message(STATUS "Using grpc++: " ${GRPC_LIBRARY})
+  set_target_properties(grpc++ PROPERTIES IMPORTED_LOCATION ${GRPC_LIBRARY})
+  find_library(PROTOBUF_LIBRARY protobuf $PROTOBUF_OPTS REQUIRED)
+  message(STATUS "Using protobuf: " ${PROTOBUF_LIBRARY})
+  add_library(protobuf UNKNOWN IMPORTED GLOBAL)
+  set_target_properties(protobuf PROPERTIES IMPORTED_LOCATION 
${PROTOBUF_LIBRARY})
 endif()
 
 # Proto headers are generated in ${CMAKE_CURRENT_BINARY_DIR}.



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[llvm-branch-commits] [llvm] 5836e52 - [RISCV] Add isel patterns to use SBSET for (1 << X) by using X0 as the input.

2020-11-26 Thread Craig Topper via llvm-branch-commits


Author: Craig Topper
Date: 2020-11-26T15:35:13-08:00
New Revision: 5836e52063763e5d1e5f6e08b84a5bf832d0da5d

URL: 
https://github.com/llvm/llvm-project/commit/5836e52063763e5d1e5f6e08b84a5bf832d0da5d
DIFF: 
https://github.com/llvm/llvm-project/commit/5836e52063763e5d1e5f6e08b84a5bf832d0da5d.diff

LOG: [RISCV] Add isel patterns to use SBSET for (1 << X) by using X0 as the 
input.

Added: 


Modified: 
llvm/lib/Target/RISCV/RISCVInstrInfoB.td
llvm/test/CodeGen/RISCV/rv32Zbs.ll
llvm/test/CodeGen/RISCV/rv64Zbs.ll

Removed: 




diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfoB.td 
b/llvm/lib/Target/RISCV/RISCVInstrInfoB.td
index e80ef9987b45..7a8a1bc364e1 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoB.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoB.td
@@ -689,6 +689,9 @@ def : Pat<(xor (shiftop 1, GPR:$rs2), GPR:$rs1),
   (SBINV GPR:$rs1, GPR:$rs2)>;
 def : Pat<(and (shiftop GPR:$rs1, GPR:$rs2), 1),
   (SBEXT GPR:$rs1, GPR:$rs2)>;
+
+def : Pat<(shiftop 1, GPR:$rs2),
+  (SBSET X0, GPR:$rs2)>;
 }
 
 let Predicates = [HasStdExtZbb] in {
@@ -905,6 +908,9 @@ def : Pat<(sext_inreg (xor (riscv_sllw 1, GPR:$rs2), 
GPR:$rs1), i32),
   (SBINVW GPR:$rs1, GPR:$rs2)>;
 def : Pat<(and (riscv_srlw GPR:$rs1, GPR:$rs2), 1),
   (SBEXTW GPR:$rs1, GPR:$rs2)>;
+
+def : Pat<(riscv_sllw 1, GPR:$rs2),
+  (SBSETW X0, GPR:$rs2)>;
 } // Predicates = [HasStdExtZbs, IsRV64]
 
 let Predicates = [HasStdExtZbb, IsRV64] in {

diff  --git a/llvm/test/CodeGen/RISCV/rv32Zbs.ll 
b/llvm/test/CodeGen/RISCV/rv32Zbs.ll
index 56e8ac57bc7c..355389340da5 100644
--- a/llvm/test/CodeGen/RISCV/rv32Zbs.ll
+++ b/llvm/test/CodeGen/RISCV/rv32Zbs.ll
@@ -79,36 +79,34 @@ define i64 @sbclr_i64(i64 %a, i64 %b) nounwind {
 ; RV32IB-LABEL: sbclr_i64:
 ; RV32IB:   # %bb.0:
 ; RV32IB-NEXT:andi a3, a2, 63
-; RV32IB-NEXT:addi a4, a3, -32
-; RV32IB-NEXT:addi a3, zero, 1
-; RV32IB-NEXT:bltz a4, .LBB2_2
+; RV32IB-NEXT:addi a3, a3, -32
+; RV32IB-NEXT:bltz a3, .LBB2_2
 ; RV32IB-NEXT:  # %bb.1:
 ; RV32IB-NEXT:mv a2, zero
-; RV32IB-NEXT:sll a4, a3, a4
+; RV32IB-NEXT:sbset a3, zero, a3
 ; RV32IB-NEXT:j .LBB2_3
 ; RV32IB-NEXT:  .LBB2_2:
-; RV32IB-NEXT:mv a4, zero
-; RV32IB-NEXT:sll a2, a3, a2
+; RV32IB-NEXT:mv a3, zero
+; RV32IB-NEXT:sbset a2, zero, a2
 ; RV32IB-NEXT:  .LBB2_3:
 ; RV32IB-NEXT:andn a0, a0, a2
-; RV32IB-NEXT:andn a1, a1, a4
+; RV32IB-NEXT:andn a1, a1, a3
 ; RV32IB-NEXT:ret
 ;
 ; RV32IBS-LABEL: sbclr_i64:
 ; RV32IBS:   # %bb.0:
 ; RV32IBS-NEXT:andi a3, a2, 63
-; RV32IBS-NEXT:addi a4, a3, -32
-; RV32IBS-NEXT:addi a3, zero, 1
-; RV32IBS-NEXT:bltz a4, .LBB2_2
+; RV32IBS-NEXT:addi a3, a3, -32
+; RV32IBS-NEXT:bltz a3, .LBB2_2
 ; RV32IBS-NEXT:  # %bb.1:
 ; RV32IBS-NEXT:mv a2, zero
-; RV32IBS-NEXT:sll a4, a3, a4
+; RV32IBS-NEXT:sbset a3, zero, a3
 ; RV32IBS-NEXT:j .LBB2_3
 ; RV32IBS-NEXT:  .LBB2_2:
-; RV32IBS-NEXT:mv a4, zero
-; RV32IBS-NEXT:sll a2, a3, a2
+; RV32IBS-NEXT:mv a3, zero
+; RV32IBS-NEXT:sbset a2, zero, a2
 ; RV32IBS-NEXT:  .LBB2_3:
-; RV32IBS-NEXT:not a3, a4
+; RV32IBS-NEXT:not a3, a3
 ; RV32IBS-NEXT:not a2, a2
 ; RV32IBS-NEXT:and a0, a2, a0
 ; RV32IBS-NEXT:and a1, a3, a1
@@ -165,6 +163,27 @@ define i32 @sbset_i32_no_mask(i32 %a, i32 %b) nounwind {
   ret i32 %or
 }
 
+; We can use sbsetw for 1 << x by setting the first source to zero.
+define signext i32 @sbset_i32_zero(i32 signext %a) nounwind {
+; RV32I-LABEL: sbset_i32_zero:
+; RV32I:   # %bb.0:
+; RV32I-NEXT:addi a1, zero, 1
+; RV32I-NEXT:sll a0, a1, a0
+; RV32I-NEXT:ret
+;
+; RV32IB-LABEL: sbset_i32_zero:
+; RV32IB:   # %bb.0:
+; RV32IB-NEXT:sbset a0, zero, a0
+; RV32IB-NEXT:ret
+;
+; RV32IBS-LABEL: sbset_i32_zero:
+; RV32IBS:   # %bb.0:
+; RV32IBS-NEXT:sbset a0, zero, a0
+; RV32IBS-NEXT:ret
+  %shl = shl i32 1, %a
+  ret i32 %shl
+}
+
 ; As we are not matching directly i64 code patterns on RV32 some i64 patterns
 ; don't have yet any matching bit manipulation instructions on RV32.
 ; This test is presented here in case future expansions of the experimental-b
@@ -182,8 +201,7 @@ define i64 @sbset_i64(i64 %a, i64 %b) nounwind {
 ;
 ; RV32IB-LABEL: sbset_i64:
 ; RV32IB:   # %bb.0:
-; RV32IB-NEXT:addi a3, zero, 1
-; RV32IB-NEXT:sll a3, a3, a2
+; RV32IB-NEXT:sbset a3, zero, a2
 ; RV32IB-NEXT:srai a3, a3, 31
 ; RV32IB-NEXT:sbset a0, a0, a2
 ; RV32IB-NEXT:or a1, a3, a1
@@ -191,8 +209,7 @@ define i64 @sbset_i64(i64 %a, i64 %b) nounwind {
 ;
 ; RV32IBS-LABEL: sbset_i64:
 ; RV32IBS:   # %bb.0:
-; RV32IBS-NEXT:addi a3, zero, 1
-; RV32IBS-NEXT:sll a3, a3, a2
+; RV32IBS-NEXT:sbset a3, zero, a2
 ; RV32IBS-NEXT:srai a3, a3, 31
 ; RV32IBS-NEXT:sbset a0, a0, a2
 ; RV32IBS-NEXT:or a1, a3, a1
@@ -205,6 +222,50 @@ define i64

[llvm-branch-commits] [llvm] 2e32c49 - [LangRef] Add poison constant

2020-11-26 Thread Juneyoung Lee via llvm-branch-commits


Author: Juneyoung Lee
Date: 2020-11-27T10:29:52+09:00
New Revision: 2e32c49d974fdacf8fb598c99782cd7256478a28

URL: 
https://github.com/llvm/llvm-project/commit/2e32c49d974fdacf8fb598c99782cd7256478a28
DIFF: 
https://github.com/llvm/llvm-project/commit/2e32c49d974fdacf8fb598c99782cd7256478a28.diff

LOG: [LangRef] Add poison constant

This patch adds a description about the newly added poison constant to LangRef.

Differential Revision: https://reviews.llvm.org/D92162

Added: 


Modified: 
llvm/docs/LangRef.rst

Removed: 




diff  --git a/llvm/docs/LangRef.rst b/llvm/docs/LangRef.rst
index 47f24e9aa9f7..2cd3f93cffef 100644
--- a/llvm/docs/LangRef.rst
+++ b/llvm/docs/LangRef.rst
@@ -3657,13 +3657,13 @@ input IR as well.
 Poison Values
 -
 
+A poison value is a result of an erroneous operation.
 In order to facilitate speculative execution, many instructions do not
 invoke immediate undefined behavior when provided with illegal operands,
 and return a poison value instead.
-
-There is currently no way of representing a poison value in the IR; they
-only exist when produced by operations such as :ref:`add ` with
-the ``nsw`` flag.
+The string '``poison``' can be used anywhere a constant is expected, and
+operations such as :ref:`add ` with the ``nsw`` flag can produce
+a poison value.
 
 Poison value behavior is defined in terms of value *dependence*:
 
@@ -3732,13 +3732,14 @@ Here are some examples:
 
 entry:
   %poison = sub nuw i32 0, 1   ; Results in a poison value.
+  %poison2 = sub i32 poison, 1 ; Also results in a poison value.
   %still_poison = and i32 %poison, 0   ; 0, but also poison.
   %poison_yet_again = getelementptr i32, i32* @h, i32 %still_poison
   store i32 0, i32* %poison_yet_again  ; Undefined behavior due to
; store to poison.
 
   store i32 %poison, i32* @g   ; Poison value stored to memory.
-  %poison2 = load i32, i32* @g ; Poison value loaded back from 
memory.
+  %poison3 = load i32, i32* @g ; Poison value loaded back from 
memory.
 
   %narrowaddr = bitcast i32* @g to i16*
   %wideaddr = bitcast i32* @g to i64*



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[llvm-branch-commits] [llvm] 60e749a - [InlineCost] Fix indentation (NFC)

2020-11-26 Thread Kazu Hirata via llvm-branch-commits


Author: Kazu Hirata
Date: 2020-11-26T18:00:55-08:00
New Revision: 60e749aa2348e43e6f66a7f4c44a58006a534837

URL: 
https://github.com/llvm/llvm-project/commit/60e749aa2348e43e6f66a7f4c44a58006a534837
DIFF: 
https://github.com/llvm/llvm-project/commit/60e749aa2348e43e6f66a7f4c44a58006a534837.diff

LOG: [InlineCost] Fix indentation (NFC)

Added: 


Modified: 
llvm/lib/Analysis/InlineCost.cpp

Removed: 




diff  --git a/llvm/lib/Analysis/InlineCost.cpp 
b/llvm/lib/Analysis/InlineCost.cpp
index 80be0040e7b3..f6a1f2dc3879 100644
--- a/llvm/lib/Analysis/InlineCost.cpp
+++ b/llvm/lib/Analysis/InlineCost.cpp
@@ -2578,7 +2578,7 @@ InlineCostAnnotationPrinterPass::run(Function &F,
   // We can add a flag which determines InlineParams for this run. Right now,
   // the default InlineParams are used.
   const InlineParams Params = llvm::getInlineParams();
-for (BasicBlock &BB : F) {
+  for (BasicBlock &BB : F) {
 for (Instruction &I : BB) {
   if (CallInst *CI = dyn_cast(&I)) {
 Function *CalledFunction = CI->getCalledFunction();



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[llvm-branch-commits] [llvm] 4d83aba - [DAGCombine] Adding a hook to improve the precision of fsqrt if the input is denormal

2020-11-26 Thread QingShan Zhang via llvm-branch-commits


Author: QingShan Zhang
Date: 2020-11-27T02:10:55Z
New Revision: 4d83aba4228ecb7dfefaf10a36a35f7299467819

URL: 
https://github.com/llvm/llvm-project/commit/4d83aba4228ecb7dfefaf10a36a35f7299467819
DIFF: 
https://github.com/llvm/llvm-project/commit/4d83aba4228ecb7dfefaf10a36a35f7299467819.diff

LOG: [DAGCombine] Adding a hook to improve the precision of fsqrt if the input 
is denormal

For now, we will hardcode the result as 0.0 if the input is denormal or 0. That 
will
have the impact the precision. As the fsqrt added belong to the cold path of the
cmp+branch, it won't impact the performance for normal inputs for PowerPC, but 
improve
the precision if the input is denormal.

Reviewed By: Spatel

Differential Revision: https://reviews.llvm.org/D80974

Added: 


Modified: 
llvm/include/llvm/CodeGen/TargetLowering.h
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
llvm/lib/Target/PowerPC/PPCISelLowering.h
llvm/lib/Target/PowerPC/PPCInstrInfo.td
llvm/lib/Target/PowerPC/PPCInstrVSX.td
llvm/test/CodeGen/PowerPC/fma-mutate.ll
llvm/test/CodeGen/PowerPC/recipest.ll

Removed: 




diff  --git a/llvm/include/llvm/CodeGen/TargetLowering.h 
b/llvm/include/llvm/CodeGen/TargetLowering.h
index 16580a9160b9..4aeefd980d7a 100644
--- a/llvm/include/llvm/CodeGen/TargetLowering.h
+++ b/llvm/include/llvm/CodeGen/TargetLowering.h
@@ -4286,6 +4286,13 @@ class TargetLowering : public TargetLoweringBase {
 return SDValue();
   }
 
+  /// Return a target-dependent result if the input operand is not suitable for
+  /// use with a square root estimate calculation.
+  virtual SDValue getSqrtResultForDenormInput(SDValue Operand,
+  SelectionDAG &DAG) const {
+return DAG.getConstantFP(0.0, SDLoc(Operand), Operand.getValueType());
+  }
+
   
//======//
   // Legalization utility functions
   //

diff  --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp 
b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 4ac1743d2d34..1b5debfe602e 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -22052,8 +22052,6 @@ SDValue DAGCombiner::buildSqrtEstimateImpl(SDValue Op, 
SDNodeFlags Flags,
 : buildSqrtNRTwoConst(Op, Est, Iterations, Flags, Reciprocal);
 
   if (!Reciprocal) {
-// The estimate is now completely wrong if the input was exactly 0.0 or
-// possibly a denormal. Force the answer to 0.0 for those cases.
 SDLoc DL(Op);
 EVT CCVT = getSetCCResultType(VT);
 SDValue FPZero = DAG.getConstantFP(0.0, DL, VT);
@@ -22077,10 +22075,13 @@ SDValue DAGCombiner::buildSqrtEstimateImpl(SDValue 
Op, SDNodeFlags Flags,
 // Test = X == 0.0
 Test = DAG.getSetCC(DL, CCVT, Op, FPZero, ISD::SETEQ);
 }
-// Test ? 0.0 : Est
-Est = DAG.getNode(Test.getValueType().isVector() ? ISD::VSELECT
- : ISD::SELECT,
-  DL, VT, Test, FPZero, Est);
+
+// The estimate is now completely wrong if the input was exactly 0.0 or
+// possibly a denormal. Force the answer to 0.0 or value provided by
+// target for those cases.
+Est = DAG.getNode(
+Test.getValueType().isVector() ? ISD::VSELECT : ISD::SELECT, DL, 
VT,
+Test, TLI.getSqrtResultForDenormInput(Op, DAG), Est);
   }
 }
 return Est;

diff  --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp 
b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index cf369f5f12c1..2d8dfb63f19c 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -1441,6 +1441,8 @@ const char *PPCTargetLowering::getTargetNodeName(unsigned 
Opcode) const {
   case PPCISD::FRSQRTE: return "PPCISD::FRSQRTE";
   case PPCISD::FTSQRT:
 return "PPCISD::FTSQRT";
+  case PPCISD::FSQRT:
+return "PPCISD::FSQRT";
   case PPCISD::STFIWX:  return "PPCISD::STFIWX";
   case PPCISD::VPERM:   return "PPCISD::VPERM";
   case PPCISD::XXSPLT:  return "PPCISD::XXSPLT";
@@ -12761,6 +12763,17 @@ SDValue PPCTargetLowering::getSqrtInputTest(SDValue 
Op, SelectionDAG &DAG,
  0);
 }
 
+SDValue
+PPCTargetLowering::getSqrtResultForDenormInput(SDValue Op,
+   SelectionDAG &DAG) const {
+  // TODO - add support for v2f64/v4f32
+  EVT VT = Op.getValueType();
+  if (VT != MVT::f64)
+return TargetLowering::getSqrtResultForDenormInput(Op, DAG);
+
+  return DAG.getNode(PPCISD::FSQRT, SDLoc(Op), VT, Op);
+}
+
 SDValue PPCTargetLowering::getSqrtEstimate(SDValue Operand, SelectionDAG &DAG,
int Enabled, int &RefinementSteps,

[llvm-branch-commits] [clang-tools-extra] abfcb60 - [clangd] Add support for within-file rename of complicated fields

2020-11-26 Thread Kirill Bobyrev via llvm-branch-commits


Author: Kirill Bobyrev
Date: 2020-11-27T03:59:28+01:00
New Revision: abfcb606c2f86da6dbf25bc260e4d716bc87eaf0

URL: 
https://github.com/llvm/llvm-project/commit/abfcb606c2f86da6dbf25bc260e4d716bc87eaf0
DIFF: 
https://github.com/llvm/llvm-project/commit/abfcb606c2f86da6dbf25bc260e4d716bc87eaf0.diff

LOG: [clangd] Add support for within-file rename of complicated fields

This was originally a part of D71880 but is separated for simplicity and ease
of reviewing.

Fixes: https://github.com/clangd/clangd/issues/582

Reviewed By: hokein

Differential Revision: https://reviews.llvm.org/D91952

Added: 


Modified: 
clang-tools-extra/clangd/refactor/Rename.cpp
clang-tools-extra/clangd/unittests/RenameTests.cpp

Removed: 




diff  --git a/clang-tools-extra/clangd/refactor/Rename.cpp 
b/clang-tools-extra/clangd/refactor/Rename.cpp
index 78aaa9930cd4..946daaf6d158 100644
--- a/clang-tools-extra/clangd/refactor/Rename.cpp
+++ b/clang-tools-extra/clangd/refactor/Rename.cpp
@@ -124,6 +124,28 @@ const NamedDecl *canonicalRenameDecl(const NamedDecl *D) {
   if (const auto *Function = dyn_cast(D))
 if (const FunctionTemplateDecl *Template = Function->getPrimaryTemplate())
   return canonicalRenameDecl(Template);
+  if (const auto *Field = dyn_cast(D)) {
+// This is a hacky way to do something like
+// CXXMethodDecl::getInstantiatedFromMemberFunction for the field because
+// Clang AST does not store relevant information about the field that is
+// instantiated.
+const auto *FieldParent = dyn_cast(Field->getParent());
+if (!FieldParent)
+  return Field->getCanonicalDecl();
+FieldParent = FieldParent->getTemplateInstantiationPattern();
+// Field is not instantiation.
+if (!FieldParent || Field->getParent() == FieldParent)
+  return Field->getCanonicalDecl();
+for (const FieldDecl *Candidate : FieldParent->fields())
+  if (Field->getDeclName() == Candidate->getDeclName())
+return Candidate->getCanonicalDecl();
+elog("FieldParent should have field with the same name as Field.");
+  }
+  if (const auto *VD = dyn_cast(D)) {
+if (const VarDecl *OriginalVD = VD->getInstantiatedFromStaticDataMember())
+  VD = OriginalVD;
+return VD->getCanonicalDecl();
+  }
   return dyn_cast(D->getCanonicalDecl());
 }
 

diff  --git a/clang-tools-extra/clangd/unittests/RenameTests.cpp 
b/clang-tools-extra/clangd/unittests/RenameTests.cpp
index c67339ff2be4..2382dba19659 100644
--- a/clang-tools-extra/clangd/unittests/RenameTests.cpp
+++ b/clang-tools-extra/clangd/unittests/RenameTests.cpp
@@ -540,6 +540,94 @@ TEST(RenameTest, WithinFileRename) {
 }
   )cpp",
 
+  // Fields in classes & partial and full specialiations.
+  R"cpp(
+template
+struct Foo {
+  T [[Vari^able]] = 42;
+};
+
+void foo() {
+  Foo f;
+  f.[[Varia^ble]] = 9000;
+}
+  )cpp",
+  R"cpp(
+template
+struct Foo {
+  T Variable[42];
+  U Another;
+
+  void bar() {}
+};
+
+template
+struct Foo {
+  T [[Var^iable]];
+  void bar() { ++[[Var^iable]]; }
+};
+
+void foo() {
+  Foo f;
+  f.[[Var^iable]] = 9000;
+}
+  )cpp",
+  R"cpp(
+template
+struct Foo {
+  T Variable[42];
+  U Another;
+
+  void bar() {}
+};
+
+template
+struct Foo {
+  T Variable;
+  void bar() { ++Variable; }
+};
+
+template<>
+struct Foo {
+  unsigned [[Var^iable]];
+  void bar() { ++[[Var^iable]]; }
+};
+
+void foo() {
+  Foo f;
+  f.[[Var^iable]] = 9000;
+}
+  )cpp",
+  // Static fields.
+  R"cpp(
+struct Foo {
+  static int [[Var^iable]];
+};
+
+int Foo::[[Var^iable]] = 42;
+
+void foo() {
+  int LocalInt = Foo::[[Var^iable]];
+}
+  )cpp",
+  R"cpp(
+template
+struct Foo {
+  static T [[Var^iable]];
+};
+
+template <>
+int Foo::[[Var^iable]] = 42;
+
+template <>
+bool Foo::[[Var^iable]] = true;
+
+void foo() {
+  int LocalInt = Foo::[[Var^iable]];
+  bool LocalBool = Foo::[[Var^iable]];
+}
+  )cpp",
+
   // Template parameters.
   R"cpp(
 template 



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[llvm-branch-commits] [llvm] faf1838 - [IndVars] LCSSA Phi users should not prevent widening

2020-11-26 Thread Max Kazantsev via llvm-branch-commits


Author: Max Kazantsev
Date: 2020-11-27T11:19:54+07:00
New Revision: faf183874cb6f434815e2b1c0b59cd452219f89e

URL: 
https://github.com/llvm/llvm-project/commit/faf183874cb6f434815e2b1c0b59cd452219f89e
DIFF: 
https://github.com/llvm/llvm-project/commit/faf183874cb6f434815e2b1c0b59cd452219f89e.diff

LOG: [IndVars] LCSSA Phi users should not prevent widening

When widening an IndVar that has LCSSA Phi users outside
the loop, we can safely widen it as usual and then truncate
the result outside the loop without hurting the performance.

Differential Revision: https://reviews.llvm.org/D91593
Reviewed By: skatkov

Added: 


Modified: 
llvm/lib/Transforms/Utils/SimplifyIndVar.cpp
llvm/test/Transforms/IndVarSimplify/widen-loop-comp.ll

Removed: 




diff  --git a/llvm/lib/Transforms/Utils/SimplifyIndVar.cpp 
b/llvm/lib/Transforms/Utils/SimplifyIndVar.cpp
index 290f3671afca..d37fe74a0039 100644
--- a/llvm/lib/Transforms/Utils/SimplifyIndVar.cpp
+++ b/llvm/lib/Transforms/Utils/SimplifyIndVar.cpp
@@ -1542,16 +1542,26 @@ bool 
WidenIV::widenWithVariantUse(WidenIV::NarrowIVDefUse DU) {
   auto AnotherOpExtKind = ExtKind;
 
   // Check that all uses are either s/zext, or narrow def (in case of we are
-  // widening the IV increment).
+  // widening the IV increment), or single-input LCSSA Phis.
   SmallVector ExtUsers;
+  SmallVector LCSSAPhiUsers;
   for (Use &U : NarrowUse->uses()) {
-if (U.getUser() == NarrowDef)
+Instruction *User = cast(U.getUser());
+if (User == NarrowDef)
   continue;
-Instruction *User = nullptr;
+if (!L->contains(User)) {
+  auto *LCSSAPhi = cast(User);
+  // Make sure there is only 1 input, so that we don't have to split
+  // critical edges.
+  if (LCSSAPhi->getNumOperands() != 1)
+return false;
+  LCSSAPhiUsers.push_back(LCSSAPhi);
+  continue;
+}
 if (ExtKind == SignExtended)
-  User = dyn_cast(U.getUser());
+  User = dyn_cast(User);
 else
-  User = dyn_cast(U.getUser());
+  User = dyn_cast(User);
 if (!User || User->getType() != WideType)
   return false;
 ExtUsers.push_back(User);
@@ -1630,6 +1640,21 @@ bool 
WidenIV::widenWithVariantUse(WidenIV::NarrowIVDefUse DU) {
 User->replaceAllUsesWith(WideBO);
 DeadInsts.emplace_back(User);
   }
+
+  for (PHINode *User : LCSSAPhiUsers) {
+assert(User->getNumOperands() == 1 && "Checked before!");
+Builder.SetInsertPoint(User);
+auto *WidePN =
+Builder.CreatePHI(WideBO->getType(), 1, User->getName() + ".wide");
+BasicBlock *LoopExitingBlock = User->getParent()->getSinglePredecessor();
+assert(LoopExitingBlock && L->contains(LoopExitingBlock) &&
+   "Not a LCSSA Phi?");
+WidePN->addIncoming(WideBO, LoopExitingBlock);
+Builder.SetInsertPoint(User->getParent()->getFirstNonPHI());
+auto *TruncPN = Builder.CreateTrunc(WidePN, User->getType());
+User->replaceAllUsesWith(TruncPN);
+DeadInsts.emplace_back(User);
+  }
   return true;
 }
 

diff  --git a/llvm/test/Transforms/IndVarSimplify/widen-loop-comp.ll 
b/llvm/test/Transforms/IndVarSimplify/widen-loop-comp.ll
index 2bb37d23866e..fb9b198fe8af 100644
--- a/llvm/test/Transforms/IndVarSimplify/widen-loop-comp.ll
+++ b/llvm/test/Transforms/IndVarSimplify/widen-loop-comp.ll
@@ -697,20 +697,18 @@ define i32 @test14(i32 %start, i32* %p, i32* %q) {
 ; CHECK:   loop:
 ; CHECK-NEXT:[[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], 
[[BACKEDGE:%.*]] ], [ [[TMP0]], [[ENTRY:%.*]] ]
 ; CHECK-NEXT:[[COND:%.*]] = icmp eq i64 [[INDVARS_IV]], 0
-; CHECK-NEXT:[[TMP1:%.*]] = trunc i64 [[INDVARS_IV]] to i32
-; CHECK-NEXT:[[FOO:%.*]] = add i32 [[TMP1]], -1
+; CHECK-NEXT:[[TMP1:%.*]] = add nsw i64 [[INDVARS_IV]], -1
 ; CHECK-NEXT:br i1 [[COND]], label [[EXIT:%.*]], label [[BACKEDGE]]
 ; CHECK:   backedge:
-; CHECK-NEXT:[[INDEX:%.*]] = zext i32 [[FOO]] to i64
-; CHECK-NEXT:[[STORE_ADDR:%.*]] = getelementptr i32, i32* [[P:%.*]], i64 
[[INDEX]]
+; CHECK-NEXT:[[STORE_ADDR:%.*]] = getelementptr i32, i32* [[P:%.*]], i64 
[[TMP1]]
 ; CHECK-NEXT:store i32 1, i32* [[STORE_ADDR]], align 4
-; CHECK-NEXT:[[LOAD_ADDR:%.*]] = getelementptr i32, i32* [[Q:%.*]], i64 
[[INDEX]]
-; CHECK-NEXT:[[STOP:%.*]] = load i32, i32* [[Q]], align 4
+; CHECK-NEXT:[[STOP:%.*]] = load i32, i32* [[Q:%.*]], align 4
 ; CHECK-NEXT:[[LOOP_COND:%.*]] = icmp eq i32 [[STOP]], 0
 ; CHECK-NEXT:[[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], -1
 ; CHECK-NEXT:br i1 [[LOOP_COND]], label [[LOOP]], label [[FAILURE:%.*]]
 ; CHECK:   exit:
-; CHECK-NEXT:ret i32 -1
+; CHECK-NEXT:[[TMP2:%.*]] = trunc i64 -1 to i32
+; CHECK-NEXT:ret i32 [[TMP2]]
 ; CHECK:   failure:
 ; CHECK-NEXT:unreachable
 ;
@@ -750,24 +748,23 @@ define i32 @test15(i32 %start, i32* %p, i32* %q) {
 ; CHECK:   loop:
 ; CHECK-NEXT:[[INDVARS_IV:%.*]] =

[llvm-branch-commits] [llvm] 9178c63 - [IR] Use llvm::is_contained and pred_size (NFC)

2020-11-26 Thread Kazu Hirata via llvm-branch-commits


Author: Kazu Hirata
Date: 2020-11-26T22:02:04-08:00
New Revision: 9178c630c3418a53973fc70c0c169834befddbbd

URL: 
https://github.com/llvm/llvm-project/commit/9178c630c3418a53973fc70c0c169834befddbbd
DIFF: 
https://github.com/llvm/llvm-project/commit/9178c630c3418a53973fc70c0c169834befddbbd.diff

LOG: [IR] Use llvm::is_contained and pred_size (NFC)

Added: 


Modified: 
llvm/include/llvm/IR/InstrTypes.h
llvm/include/llvm/IR/PredIteratorCache.h

Removed: 




diff  --git a/llvm/include/llvm/IR/InstrTypes.h 
b/llvm/include/llvm/IR/InstrTypes.h
index 5d3b603ad01b..1091c4b0dc0f 100644
--- a/llvm/include/llvm/IR/InstrTypes.h
+++ b/llvm/include/llvm/IR/InstrTypes.h
@@ -1338,7 +1338,7 @@ class CallBase : public Instruction {
   /// Returns true if this CallSite passes the given Value* as an argument to
   /// the called function.
   bool hasArgument(const Value *V) const {
-return llvm::any_of(args(), [V](const Value *Arg) { return Arg == V; });
+return llvm::is_contained(args(), V);
   }
 
   Value *getCalledOperand() const { return Op(); }

diff  --git a/llvm/include/llvm/IR/PredIteratorCache.h 
b/llvm/include/llvm/IR/PredIteratorCache.h
index cc835277910b..4d8efcfa9eab 100644
--- a/llvm/include/llvm/IR/PredIteratorCache.h
+++ b/llvm/include/llvm/IR/PredIteratorCache.h
@@ -58,7 +58,7 @@ class PredIteratorCache {
 auto Result = BlockToPredCountMap.find(BB);
 if (Result != BlockToPredCountMap.end())
   return Result->second;
-return BlockToPredCountMap[BB] = std::distance(pred_begin(BB), 
pred_end(BB));
+return BlockToPredCountMap[BB] = pred_size(BB);
   }
 
 public:



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[llvm-branch-commits] [llvm] 0077e16 - [Test] Add some more tests showing how we fail to widen IV

2020-11-26 Thread Max Kazantsev via llvm-branch-commits


Author: Max Kazantsev
Date: 2020-11-27T14:03:38+07:00
New Revision: 0077e1680f83cf2ae014c7f3c2847fe106e24a5f

URL: 
https://github.com/llvm/llvm-project/commit/0077e1680f83cf2ae014c7f3c2847fe106e24a5f
DIFF: 
https://github.com/llvm/llvm-project/commit/0077e1680f83cf2ae014c7f3c2847fe106e24a5f.diff

LOG: [Test] Add some more tests showing how we fail to widen IV

Added: 


Modified: 
llvm/test/Transforms/IndVarSimplify/widen-loop-comp.ll

Removed: 




diff  --git a/llvm/test/Transforms/IndVarSimplify/widen-loop-comp.ll 
b/llvm/test/Transforms/IndVarSimplify/widen-loop-comp.ll
index fb9b198fe8af..dd095c008772 100644
--- a/llvm/test/Transforms/IndVarSimplify/widen-loop-comp.ll
+++ b/llvm/test/Transforms/IndVarSimplify/widen-loop-comp.ll
@@ -794,3 +794,413 @@ failure:
   call void @use(i32 %foo)
   unreachable
 }
+
+; TODO: We can widen here despite the icmp user of %foo in guarded block.
+define i32 @test16_unsigned_pos1(i32 %start, i32* %p, i32* %q, i32 %x) {
+; CHECK-LABEL: @test16_unsigned_pos1(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:[[TMP0:%.*]] = zext i32 [[START:%.*]] to i64
+; CHECK-NEXT:[[TMP1:%.*]] = add i32 [[START]], -1
+; CHECK-NEXT:br label [[LOOP:%.*]]
+; CHECK:   loop:
+; CHECK-NEXT:[[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], 
[[BACKEDGE:%.*]] ], [ [[TMP0]], [[ENTRY:%.*]] ]
+; CHECK-NEXT:[[COND:%.*]] = icmp eq i64 [[INDVARS_IV]], 0
+; CHECK-NEXT:[[TMP2:%.*]] = trunc i64 [[INDVARS_IV]] to i32
+; CHECK-NEXT:[[FOO:%.*]] = add i32 [[TMP2]], -1
+; CHECK-NEXT:br i1 [[COND]], label [[EXIT:%.*]], label [[GUARDED:%.*]]
+; CHECK:   guarded:
+; CHECK-NEXT:[[ICMP_USER3:%.*]] = icmp ult i32 [[TMP1]], [[X:%.*]]
+; CHECK-NEXT:br i1 [[ICMP_USER3]], label [[BACKEDGE]], label 
[[SIDE_EXIT:%.*]]
+; CHECK:   backedge:
+; CHECK-NEXT:[[INDEX:%.*]] = zext i32 [[FOO]] to i64
+; CHECK-NEXT:[[STORE_ADDR:%.*]] = getelementptr i32, i32* [[P:%.*]], i64 
[[INDEX]]
+; CHECK-NEXT:store i32 1, i32* [[STORE_ADDR]], align 4
+; CHECK-NEXT:[[LOAD_ADDR:%.*]] = getelementptr i32, i32* [[Q:%.*]], i64 
[[INDEX]]
+; CHECK-NEXT:[[STOP:%.*]] = load i32, i32* [[Q]], align 4
+; CHECK-NEXT:[[LOOP_COND:%.*]] = icmp eq i32 [[STOP]], 0
+; CHECK-NEXT:[[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], -1
+; CHECK-NEXT:br i1 [[LOOP_COND]], label [[LOOP]], label [[FAILURE:%.*]]
+; CHECK:   exit:
+; CHECK-NEXT:call void @use(i32 -1)
+; CHECK-NEXT:ret i32 -1
+; CHECK:   failure:
+; CHECK-NEXT:[[FOO_LCSSA2:%.*]] = phi i32 [ [[FOO]], [[BACKEDGE]] ]
+; CHECK-NEXT:call void @use(i32 [[FOO_LCSSA2]])
+; CHECK-NEXT:unreachable
+; CHECK:   side_exit:
+; CHECK-NEXT:ret i32 0
+;
+entry:
+  br label %loop
+
+loop:
+  %iv = phi i32 [%start, %entry], [%iv.next.1, %backedge]
+  %cond = icmp eq i32 %iv, 0
+  %foo = add i32 %iv, -1
+  br i1 %cond, label %exit, label %guarded
+
+guarded:
+  %icmp_user = icmp ult i32 %foo, %x
+  br i1 %icmp_user, label %backedge, label %side_exit
+
+backedge:
+  %index = zext i32 %foo to i64
+  %store.addr = getelementptr i32, i32* %p, i64 %index
+  store i32 1, i32* %store.addr
+  %load.addr = getelementptr i32, i32* %q, i64 %index
+  %stop = load i32, i32* %q
+  %loop.cond = icmp eq i32 %stop, 0
+  %iv.next.1 = add i32 %iv, -1
+  br i1 %loop.cond, label %loop, label %failure
+
+exit:
+  call void @use(i32 %foo)
+  ret i32 %foo
+
+failure:
+  call void @use(i32 %foo)
+  unreachable
+
+side_exit:
+  ret i32 0
+}
+
+; TODO: We can widen here despite the icmp user of %foo in guarded block.
+define i32 @test16_unsigned_pos2(i32 %start, i32* %p, i32* %q, i32 %x) {
+; CHECK-LABEL: @test16_unsigned_pos2(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:[[TMP0:%.*]] = zext i32 [[START:%.*]] to i64
+; CHECK-NEXT:br label [[LOOP:%.*]]
+; CHECK:   loop:
+; CHECK-NEXT:[[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], 
[[BACKEDGE:%.*]] ], [ [[TMP0]], [[ENTRY:%.*]] ]
+; CHECK-NEXT:[[COND:%.*]] = icmp eq i64 [[INDVARS_IV]], 0
+; CHECK-NEXT:[[TMP1:%.*]] = trunc i64 [[INDVARS_IV]] to i32
+; CHECK-NEXT:[[FOO:%.*]] = add i32 [[TMP1]], -1
+; CHECK-NEXT:br i1 [[COND]], label [[EXIT:%.*]], label [[GUARDED:%.*]]
+; CHECK:   guarded:
+; CHECK-NEXT:[[ICMP_USER:%.*]] = icmp ne i32 [[FOO]], [[X:%.*]]
+; CHECK-NEXT:br i1 [[ICMP_USER]], label [[BACKEDGE]], label 
[[SIDE_EXIT:%.*]]
+; CHECK:   backedge:
+; CHECK-NEXT:[[INDEX:%.*]] = zext i32 [[FOO]] to i64
+; CHECK-NEXT:[[STORE_ADDR:%.*]] = getelementptr i32, i32* [[P:%.*]], i64 
[[INDEX]]
+; CHECK-NEXT:store i32 1, i32* [[STORE_ADDR]], align 4
+; CHECK-NEXT:[[LOAD_ADDR:%.*]] = getelementptr i32, i32* [[Q:%.*]], i64 
[[INDEX]]
+; CHECK-NEXT:[[STOP:%.*]] = load i32, i32* [[Q]], align 4
+; CHECK-NEXT:[[LOOP_COND:%.*]] = icmp eq i32 [[STOP]], 0
+; CHECK-NEXT:[[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], -1
+; CHECK-NEXT:

[llvm-branch-commits] [llvm] e048104 - [RISCV] Don't remove (and X, 0xffffffff) from inputs when matching RISCVISD::DIVUW/REMUW to 64-bit DIVU/REMU.

2020-11-26 Thread Craig Topper via llvm-branch-commits


Author: Craig Topper
Date: 2020-11-26T23:15:41-08:00
New Revision: e0481048abd33079261c9aa701c0916a52941dc3

URL: 
https://github.com/llvm/llvm-project/commit/e0481048abd33079261c9aa701c0916a52941dc3
DIFF: 
https://github.com/llvm/llvm-project/commit/e0481048abd33079261c9aa701c0916a52941dc3.diff

LOG: [RISCV] Don't remove (and X, 0x) from inputs when matching 
RISCVISD::DIVUW/REMUW to 64-bit DIVU/REMU.

These patterns are using zexti32 which matches either assertzexti32
or (and X, 0x). But if we match (and X, 0x) it will
remove the AND and the inputs may no longer have the zero bits
needed to guarantee the result has enough zeros.

This commit changes the patterns to only match assertzexti32.
I'm not sure how to test the broken case since the DIVUW/REMUW nodes
are created during type legalization, but type legalization won't
create an (and X, 0xf) directly on the inputs.

I've also changed the zexti32 on the root of the pattern to just
checking for AND. We were previously also matching assertzexti32,
but I doubt that pattern would ever occur.

Added: 


Modified: 
llvm/lib/Target/RISCV/RISCVInstrInfoM.td

Removed: 




diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfoM.td 
b/llvm/lib/Target/RISCV/RISCVInstrInfoM.td
index 987534aadd79..8cfb903a173c 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoM.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoM.td
@@ -81,9 +81,11 @@ def : PatGprGpr;
 // Handle the specific cases where using DIVU/REMU would be correct and result
 // in fewer instructions than emitting DIVUW/REMUW then zero-extending the
 // result.
-def : Pat<(zexti32 (riscv_divuw (zexti32 GPR:$rs1), (zexti32 GPR:$rs2))),
+def : Pat<(and (riscv_divuw (assertzexti32 GPR:$rs1),
+(assertzexti32 GPR:$rs2)), 0x),
   (DIVU GPR:$rs1, GPR:$rs2)>;
-def : Pat<(zexti32 (riscv_remuw (zexti32 GPR:$rs1), (zexti32 GPR:$rs2))),
+def : Pat<(and (riscv_remuw (assertzexti32 GPR:$rs1),
+(assertzexti32 GPR:$rs2)), 0x),
   (REMU GPR:$rs1, GPR:$rs2)>;
 
 // Although the sexti32 operands may not have originated from an i32 srem,



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[llvm-branch-commits] [llvm] 3d811c5 - [llvm-readelf/obj] - Stop calling `reportError` in `printArchSpecificInfo()`.

2020-11-26 Thread Georgii Rymar via llvm-branch-commits


Author: Georgii Rymar
Date: 2020-11-27T10:27:00+03:00
New Revision: 3d811c57aa1a26fb2ba737dfc6f922fd98c96622

URL: 
https://github.com/llvm/llvm-project/commit/3d811c57aa1a26fb2ba737dfc6f922fd98c96622
DIFF: 
https://github.com/llvm/llvm-project/commit/3d811c57aa1a26fb2ba737dfc6f922fd98c96622.diff

LOG: [llvm-readelf/obj] - Stop calling `reportError` in 
`printArchSpecificInfo()`.

This is related to MIPS. Currently we might report an error and exit,
though there is no problem to report a warning and try to continue dumping
an object. The code uses `MipsGOTParser Parser`, which is isolated
in this method.

Differential revision: https://reviews.llvm.org/D92090

Added: 


Modified: 
llvm/test/tools/llvm-readobj/ELF/mips-got.test
llvm/test/tools/llvm-readobj/ELF/mips-plt.test
llvm/tools/llvm-readobj/ELFDumper.cpp

Removed: 




diff  --git a/llvm/test/tools/llvm-readobj/ELF/mips-got.test 
b/llvm/test/tools/llvm-readobj/ELF/mips-got.test
index 1615ce0b0e1b..01bff1b914f8 100644
--- a/llvm/test/tools/llvm-readobj/ELF/mips-got.test
+++ b/llvm/test/tools/llvm-readobj/ELF/mips-got.test
@@ -368,19 +368,13 @@ DynamicSymbols: []
 ## Check we report errors when dynamic tags, needed for dumping GOT, are 
missing.
 
 # RUN: yaml2obj --docnum=4 -DTAG1=DT_MIPS_LOCAL_GOTNO -DTAG2=DT_MIPS_GOTSYM %s 
-o %t.err1.o
-# RUN: not llvm-readobj -A %t.err1.o 2>&1 | FileCheck %s -DFILE=%t.err1.o 
-check-prefix ERR1
-
-# ERR1: error: '[[FILE]]': cannot find PLTGOT dynamic tag
+# RUN: llvm-readobj -A %t.err1.o 2>&1 | FileCheck %s -DFILE=%t.err1.o 
-check-prefixes=NO-OUTPUT,ERR1
 
 # RUN: yaml2obj --docnum=4 -DTAG1=DT_PLTGOT -DTAG2=DT_MIPS_GOTSYM %s -o 
%t.err2.o
-# RUN: not llvm-readobj -A %t.err2.o 2>&1 | FileCheck %s -DFILE=%t.err2.o 
-check-prefix ERR2
-
-# ERR2: error: '[[FILE]]': cannot find MIPS_LOCAL_GOTNO dynamic tag
+# RUN: llvm-readobj -A %t.err2.o 2>&1 | FileCheck %s -DFILE=%t.err2.o 
-check-prefixes=NO-OUTPUT,ERR2
 
 # RUN: yaml2obj --docnum=4 -DTAG1=DT_PLTGOT -DTAG2=DT_MIPS_LOCAL_GOTNO %s -o 
%t.err3.o
-# RUN: not llvm-readobj -A %t.err3.o 2>&1 | FileCheck %s -DFILE=%t.err3.o 
-check-prefix ERR3
-
-# ERR3: error: '[[FILE]]': cannot find MIPS_GOTSYM dynamic tag
+# RUN: llvm-readobj -A %t.err3.o 2>&1 | FileCheck %s -DFILE=%t.err3.o 
-check-prefixes=NO-OUTPUT,ERR3
 
 --- !ELF
 FileHeader:
@@ -401,14 +395,10 @@ Sections:
 DynamicSymbols: []
 
 # RUN: yaml2obj --docnum=5 -DVAL1=0x %s -o %t.err4.o
-# RUN: not llvm-readobj -A %t.err4.o 2>&1 | FileCheck %s -DFILE=%t.err4.o 
-check-prefix=ERR4
-
-# ERR4: error: '[[FILE]]': DT_MIPS_GOTSYM value (65535) exceeds the number of 
dynamic symbols (1)
+# RUN: llvm-readobj -A %t.err4.o 2>&1 | FileCheck %s -DFILE=%t.err4.o 
-check-prefixes=NO-OUTPUT,ERR4
 
 # RUN: yaml2obj --docnum=5 -DVAL2=0x %s -o %t.err5.o
-# RUN: not llvm-readobj -A %t.err5.o 2>&1 | FileCheck %s -DFILE=%t.err5.o 
-check-prefix=ERR5
-
-# ERR5: error: '[[FILE]]': there is no non-empty GOT section at 0x
+# RUN: llvm-readobj -A %t.err5.o 2>&1 | FileCheck %s -DFILE=%t.err5.o 
-check-prefixes=NO-OUTPUT,ERR5
 
 --- !ELF
 FileHeader:
@@ -428,6 +418,20 @@ Sections:
 Value: [[VAL2=0]]
 DynamicSymbols: []
 
+# NO-OUTPUT:  LoadName: 
+# NO-OUTPUT-NEXT: There is no .MIPS.abiflags section in the file.
+# NO-OUTPUT-NEXT: There is no .MIPS.options section in the file.
+# NO-OUTPUT-NEXT: There is no .reginfo section in the file.
+
+# ERR1-NEXT: warning: '[[FILE]]': cannot find PLTGOT dynamic tag
+# ERR2-NEXT: warning: '[[FILE]]': cannot find MIPS_LOCAL_GOTNO dynamic tag
+# ERR3-NEXT: warning: '[[FILE]]': cannot find MIPS_GOTSYM dynamic tag
+# ERR4-NEXT: warning: '[[FILE]]': DT_MIPS_GOTSYM value (65535) exceeds the 
number of dynamic symbols (1)
+# ERR5-NEXT: warning: '[[FILE]]': there is no non-empty GOT section at 0x
+
+# NO-OUTPUT-EMPTY:
+# NO-OUTPUT-NOT: {{.}}
+
 ## Check that we do not report a warning about the .got section when we are 
able to locate it by name.
 # RUN: yaml2obj --docnum=6 -DNAME=0x %s -o %t.err6.o
 # RUN: llvm-readobj -A %t.err6.o 2>&1 | \

diff  --git a/llvm/test/tools/llvm-readobj/ELF/mips-plt.test 
b/llvm/test/tools/llvm-readobj/ELF/mips-plt.test
index 3f57a39988e8..607388cb852b 100644
--- a/llvm/test/tools/llvm-readobj/ELF/mips-plt.test
+++ b/llvm/test/tools/llvm-readobj/ELF/mips-plt.test
@@ -89,14 +89,10 @@ DynamicSymbols:
 ## Check we report errors when dynamic tags, needed for dumping PLT, are 
missing.
 
 # RUN: yaml2obj --docnum=2 -DTAG=DT_MIPS_PLTGOT %s -o %t.err1.o
-# RUN: not llvm-readobj -A %t.err1.o 2>&1 | FileCheck %s -DFILE=%t.err1.o 
--check-prefix=ERR1
-
-# ERR1: error: '[[FILE]]': cannot find JMPREL dynamic tag
+# RUN: llvm-readobj -A %t.err1.o 2>&1 | FileCheck %s -DFILE=%t.err1.o 
--check-prefixes=NO-OUTPUT,ERR1
 
 # RUN: yaml2obj --docnum=2 -DTAG=DT_JMPREL %s -o %t.err2.o
-# RUN: not llvm-readobj -A %t.err2.o 2>&1 | FileCheck %s -DFILE=%t.err2.o 
--check-prefix=ER

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